#![allow(non_snake_case)]
#![allow(unused)]
#![allow(clippy::upper_case_acronyms)]

#[derive(Debug, PartialEq, Copy, Clone)]
pub enum InstructionKind {
    CBZ32Compbranch {
        Rt: u8,
        imm19: u32,
    },
    CBNZ32Compbranch {
        Rt: u8,
        imm19: u32,
    },
    CBZ64Compbranch {
        Rt: u8,
        imm19: u32,
    },
    CBNZ64Compbranch {
        Rt: u8,
        imm19: u32,
    },
    BOnlyCondbranch {
        cond: u8,
        imm19: u32,
    },
    SVCExException {
        imm16: u16,
    },
    HVCExException {
        imm16: u16,
    },
    SMCExException {
        imm16: u16,
    },
    BRKExException {
        imm16: u16,
    },
    HLTExException {
        imm16: u16,
    },
    DCPS1DcException {
        imm16: u16,
    },
    DCPS2DcException {
        imm16: u16,
    },
    DCPS3DcException {
        imm16: u16,
    },
    NOPHiSystem,
    YIELDHiSystem,
    WFEHiSystem,
    WFIHiSystem,
    SEVHiSystem,
    SEVLHiSystem,
    XPACLRIHiSystem,
    PACIA1716HiSystem,
    PACIB1716HiSystem,
    AUTIA1716HiSystem,
    AUTIB1716HiSystem,
    ESBHiSystem,
    PSBHcSystem,
    PACIAZHiSystem,
    PACIASPHiSystem,
    PACIBZHiSystem,
    PACIBSPHiSystem,
    AUTIAZHiSystem,
    AUTIASPHiSystem,
    AUTIBZHiSystem,
    AUTIBSPHiSystem,
    HINT1 {
        op2: u8,
    },
    CLREXBnSystem {
        CRm: u8,
    },
    DSBBoSystem {
        CRm: u8,
    },
    DMBBoSystem {
        CRm: u8,
    },
    ISBBiSystem {
        CRm: u8,
    },
    MSRSiSystem {
        CRm: u8,
        op1: u8,
        op2: u8,
    },
    SYSCrSystem {
        CRm: u8,
        CRn: u8,
        Rt: u8,
        op1: u8,
        op2: u8,
    },
    SYSLRcSystem {
        CRm: u8,
        CRn: u8,
        Rt: u8,
        op1: u8,
        op2: u8,
    },
    MSRSrSystem {
        CRm: u8,
        CRn: u8,
        Rt: u8,
        op0: u32,
        op1: u8,
        op2: u8,
    },
    MRSRsSystem {
        CRm: u8,
        CRn: u8,
        Rt: u8,
        op0: u32,
        op1: u8,
        op2: u8,
    },
    HINT3 {
        op2: u8,
    },
    HINT2 {
        CRm: u8,
        op2: u8,
    },
    TBZOnlyTestbranch {
        Rt: u8,
        b40: u8,
        b5: u8,
        imm14: u16,
    },
    TBNZOnlyTestbranch {
        Rt: u8,
        b40: u8,
        b5: u8,
        imm14: u16,
    },
    BOnlyBranchImm {
        imm26: u32,
    },
    BLOnlyBranchImm {
        imm26: u32,
    },
    RETAA64EBranchReg,
    RETAB64EBranchReg,
    ERET64EBranchReg,
    ERETAA64EBranchReg,
    ERETAB64EBranchReg,
    DRPS64EBranchReg,
    BR64BranchReg {
        Rn: u8,
    },
    BRAAZ64BranchReg {
        Rn: u8,
    },
    BRABZ64BranchReg {
        Rn: u8,
    },
    BLR64BranchReg {
        Rn: u8,
    },
    BLRAAZ64BranchReg {
        Rn: u8,
    },
    BLRABZ64BranchReg {
        Rn: u8,
    },
    RET64RBranchReg {
        Rn: u8,
    },
    BRAA64PBranchReg {
        Rn: u8,
        op4: u32,
    },
    BRAB64PBranchReg {
        Rn: u8,
        op4: u32,
    },
    BLRAA64PBranchReg {
        Rn: u8,
        op4: u32,
    },
    BLRAB64PBranchReg {
        Rn: u8,
        op4: u32,
    },
    ST4AsisdlseR4 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlseR44V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST3AsisdlseR3 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlseR33V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlseR11V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST2AsisdlseR2 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlseR22V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD4AsisdlseR4 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlseR44V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD3AsisdlseR3 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlseR33V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlseR11V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD2AsisdlseR2 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlseR22V {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST4AsisdlsepI4I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepI4I4 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST3AsisdlsepI3I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepI3I3 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepI1I1 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST2AsisdlsepI2I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepI2I2 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD4AsisdlsepI4I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepI4I4 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD3AsisdlsepI3I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepI3I3 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepI1I1 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD2AsisdlsepI2I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepI2I2 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST4AsisdlsepR4R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepR4R4 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST3AsisdlsepR3R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepR3R3 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepR1R1 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST2AsisdlsepR2R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsepR2R2 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD4AsisdlsepR4R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepR4R4 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD3AsisdlsepR3R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepR3R3 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepR1R1 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD2AsisdlsepR2R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD1AsisdlsepR2R2 {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsoD11D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST3AsisdlsoD33D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST2AsisdlsoD22D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST4AsisdlsoD44D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD1AsisdlsoD11D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD3AsisdlsoD33D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD2AsisdlsoD22D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD4AsisdlsoD44D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST1AsisdlsoS11S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST3AsisdlsoS33S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST2AsisdlsoS22S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST4AsisdlsoS44S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD1AsisdlsoS11S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD3AsisdlsoS33S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD2AsisdlsoS22S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD4AsisdlsoS44S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST1AsisdlsoH11H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST3AsisdlsoH33H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST2AsisdlsoH22H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST4AsisdlsoH44H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1AsisdlsoH11H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD3AsisdlsoH33H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD2AsisdlsoH22H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD4AsisdlsoH44H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1RAsisdlsoR1 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD3RAsisdlsoR3 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD2RAsisdlsoR2 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD4RAsisdlsoR4 {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsoB11B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST3AsisdlsoB33B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST2AsisdlsoB22B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST4AsisdlsoB44B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1AsisdlsoB11B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD3AsisdlsoB33B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD2AsisdlsoB22B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD4AsisdlsoB44B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST1AsisdlsopD1I1D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST3AsisdlsopD3I3D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST2AsisdlsopD2I2D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST4AsisdlsopD4I4D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD1AsisdlsopD1I1D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD3AsisdlsopD3I3D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD2AsisdlsopD2I2D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    LD4AsisdlsopD4I4D {
        Q: u8,
        Rn: u8,
        Rt: u8,
    },
    ST1AsisdlsopS1I1S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST3AsisdlsopS3I3S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST2AsisdlsopS2I2S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST4AsisdlsopS4I4S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD1AsisdlsopS1I1S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD3AsisdlsopS3I3S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD2AsisdlsopS2I2S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD4AsisdlsopS4I4S {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST1AsisdlsopH1I1H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST3AsisdlsopH3I3H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST2AsisdlsopH2I2H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST4AsisdlsopH4I4H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1AsisdlsopH1I1H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD3AsisdlsopH3I3H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD2AsisdlsopH2I2H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD4AsisdlsopH4I4H {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1RAsisdlsopR1I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD3RAsisdlsopR3I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD2RAsisdlsopR2I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD4RAsisdlsopR4I {
        Q: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsopB1I1B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST3AsisdlsopB3I3B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST2AsisdlsopB2I2B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST4AsisdlsopB4I4B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1AsisdlsopB1I1B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD3AsisdlsopB3I3B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD2AsisdlsopB2I2B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD4AsisdlsopB4I4B {
        Q: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST1AsisdlsopDx1R1D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    ST3AsisdlsopDx3R3D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    ST2AsisdlsopDx2R2D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    ST4AsisdlsopDx4R4D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    LD1AsisdlsopDx1R1D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    LD3AsisdlsopDx3R3D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    LD2AsisdlsopDx2R2D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    LD4AsisdlsopDx4R4D {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
    },
    ST1AsisdlsopSx1R1S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST3AsisdlsopSx3R3S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST2AsisdlsopSx2R2S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST4AsisdlsopSx4R4S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD1AsisdlsopSx1R1S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD3AsisdlsopSx3R3S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD2AsisdlsopSx2R2S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LD4AsisdlsopSx4R4S {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    ST1AsisdlsopHx1R1H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST3AsisdlsopHx3R3H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST2AsisdlsopHx2R2H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST4AsisdlsopHx4R4H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1AsisdlsopHx1R1H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD3AsisdlsopHx3R3H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD2AsisdlsopHx2R2H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD4AsisdlsopHx4R4H {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1RAsisdlsopRx1R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD3RAsisdlsopRx3R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD2RAsisdlsopRx2R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    LD4RAsisdlsopRx4R {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        size: u8,
    },
    ST1AsisdlsopBx1R1B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST3AsisdlsopBx3R3B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST2AsisdlsopBx2R2B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    ST4AsisdlsopBx4R4B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD1AsisdlsopBx1R1B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD3AsisdlsopBx3R3B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD2AsisdlsopBx2R2B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    LD4AsisdlsopBx4R4B {
        Q: u8,
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        size: u8,
    },
    STADDB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLRB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEORB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSETB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAXB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMINB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAXB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMINB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STADDLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLRLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEORLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSETLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAXLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMINLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAXLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMINLB32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STADDH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLRH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEORH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSETH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAXH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMINH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAXH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMINH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STADDLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLRLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEORLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSETLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAXLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMINLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAXLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMINLH32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STADD32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLR32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEOR32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSET32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAX32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMIN32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAX32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMIN32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STADDL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLRL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEORL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSETL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAXL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMINL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAXL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMINL32SMemop {
        Rn: u8,
        Rs: u8,
    },
    STADD64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLR64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEOR64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSET64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAX64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMIN64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAX64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMIN64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STADDL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STCLRL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STEORL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSETL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMAXL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STSMINL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMAXL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    STUMINL64SMemop {
        Rn: u8,
        Rs: u8,
    },
    SWPB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPAB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDAPRB32LMemop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPALB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPAH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDAPRH32LMemop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPALH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWP32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPA32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDAPR32LMemop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPAL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWP64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPA64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDAPR64LMemop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    SWPAL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINLB32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINLH32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADD32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLR32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEOR32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSET32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAX32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMIN32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAX32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMIN32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINL32Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADD64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLR64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEOR64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSET64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAX64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMIN64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAX64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMIN64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDADDL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDCLRL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDEORL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSETL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMAXL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDSMINL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMAXL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDUMINL64Memop {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    LDR32Loadlit {
        Rt: u8,
        imm19: u32,
    },
    LDRSLoadlit {
        Rt: u8,
        imm19: u32,
    },
    LDR64Loadlit {
        Rt: u8,
        imm19: u32,
    },
    LDRDLoadlit {
        Rt: u8,
        imm19: u32,
    },
    LDRSW64Loadlit {
        Rt: u8,
        imm19: u32,
    },
    LDRQLoadlit {
        Rt: u8,
        imm19: u32,
    },
    PRFMPLoadlit {
        Rt: u8,
        imm19: u32,
    },
    CASPCp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASPLCp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASPACp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASPALCp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASBC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASLBC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASABC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASALBC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASPCp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASPLCp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASPACp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASPALCp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASHC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASLHC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASAHC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASALHC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASLC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASAC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASALC32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASC64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASLC64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASAC64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    CASALC64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
    },
    STXRBSr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLXRBSr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDXRBLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDAXRBLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLLRBSl32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLRBSl32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDLARBLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDARBLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STXRHSr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLXRHSr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDXRHLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDAXRHLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLLRHSl32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLRHSl32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDLARHLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDARHLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STXRSr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLXRSr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STXPSp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLXPSp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDXRLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDAXRLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDXPLp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDAXPLp32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLLRSl32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLRSl32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDLARLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDARLr32Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STXRSr64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLXRSr64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STXPSp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLXPSp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDXRLr64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDAXRLr64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDXPLp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDAXPLp64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLLRSl64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STLRSl64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDLARLr64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    LDARLr64Ldstexcl {
        Rn: u8,
        Rs: u8,
        Rt: u8,
        Rt2: u8,
    },
    STNP32LdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDNP32LdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STNPSLdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDNPSLdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STNPDLdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDNPDLdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STNP64LdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDNP64LdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STNPQLdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDNPQLdstnapairOffs {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STRB32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRB32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSB64LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSB32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRBLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRBLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRQLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRQLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRH32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRH32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSH64LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSH32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRHLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRHLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STR32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDR32LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSW64LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRSLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STR64LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDR64LdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRDLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRDLdstImmpost {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRB32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRB32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSB64LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSB32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRBLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRBLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRQLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRQLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRH32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRH32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSH64LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSH32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRHLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRHLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STR32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDR32LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSW64LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRSLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRSLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STR64LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDR64LdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRDLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRDLdstImmpre {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDRAA64LdstPac {
        Rn: u8,
        Rt: u8,
        S: u8,
        V: u32,
        imm9: u16,
    },
    LDRAA64WLdstPac {
        Rn: u8,
        Rt: u8,
        S: u8,
        V: u32,
        imm9: u16,
    },
    LDRAB64LdstPac {
        Rn: u8,
        Rt: u8,
        S: u8,
        V: u32,
        imm9: u16,
    },
    LDRAB64WLdstPac {
        Rn: u8,
        Rt: u8,
        S: u8,
        V: u32,
        imm9: u16,
    },
    STRB32BlLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LDRB32BlLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LDRSB64BlLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LDRSB32BlLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    STRBlLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    LDRBlLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
    },
    STRQLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRQLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STRH32LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRH32LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRSH64LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRSH32LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STRHLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRHLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STR32LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDR32LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRSW64LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STRSLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRSLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STR64LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDR64LdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    PRFMPLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STRDLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRDLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STRB32BLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRB32BLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRSB64BLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRSB32BLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STRBLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    LDRBLdstRegoff {
        Rm: u8,
        Rn: u8,
        Rt: u8,
        S: u8,
        option: u8,
    },
    STTRB32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTRB32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTRSB64LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTRSB32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STTRH32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTRH32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTRSH64LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTRSH32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STTR32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTR32LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTRSW64LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STTR64LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDTR64LdstUnpriv {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STURB32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURB32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURSB64LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURSB32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STURBLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURBLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STURQLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURQLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STURH32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURH32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURSH64LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURSH32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STURHLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURHLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STUR32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDUR32LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURSW64LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STURSLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURSLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STUR64LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDUR64LdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    PRFUMPLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STURDLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    LDURDLdstUnscaled {
        Rn: u8,
        Rt: u8,
        imm9: u16,
    },
    STRB32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRB32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRSB64LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRSB32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STRBLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRBLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STRQLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRQLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STRH32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRH32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRSH64LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRSH32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STRHLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRHLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STR32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDR32LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRSW64LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STRSLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRSLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STR64LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDR64LdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    PRFMPLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STRDLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    LDRDLdstPos {
        Rn: u8,
        Rt: u8,
        imm12: u16,
    },
    STP32LdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDP32LdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPSLdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPSLdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPSW64LdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPDLdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPDLdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STP64LdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDP64LdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPQLdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPQLdstpairOff {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STP32LdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDP32LdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPSLdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPSLdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPSW64LdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPDLdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPDLdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STP64LdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDP64LdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPQLdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPQLdstpairPost {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STP32LdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDP32LdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPSLdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPSLdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPSW64LdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPDLdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPDLdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STP64LdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDP64LdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    STPQLdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    LDPQLdstpairPre {
        Rn: u8,
        Rt: u8,
        Rt2: u8,
        imm7: u8,
    },
    ADD32AddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    ADDS32SAddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    SUB32AddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    SUBS32SAddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    ADD64AddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    ADDS64SAddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    SUB64AddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    SUBS64SAddsubImm {
        Rd: u8,
        Rn: u8,
        imm12: u16,
        shift: u8,
    },
    SBFM32MBitfield {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    BFM32MBitfield {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    UBFM32MBitfield {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    SBFM64MBitfield {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    BFM64MBitfield {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    UBFM64MBitfield {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    EXTR32Extract {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imms: u8,
    },
    EXTR64Extract {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imms: u8,
    },
    AND32LogImm {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    ORR32LogImm {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    EOR32LogImm {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    ANDS32SLogImm {
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    AND64LogImm {
        N: u8,
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    ORR64LogImm {
        N: u8,
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    EOR64LogImm {
        N: u8,
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    ANDS64SLogImm {
        N: u8,
        Rd: u8,
        Rn: u8,
        immr: u8,
        imms: u8,
    },
    MOVN32Movewide {
        Rd: u8,
        hw: u32,
        imm16: u16,
    },
    MOVZ32Movewide {
        Rd: u8,
        hw: u32,
        imm16: u16,
    },
    MOVK32Movewide {
        Rd: u8,
        hw: u32,
        imm16: u16,
    },
    MOVN64Movewide {
        Rd: u8,
        hw: u32,
        imm16: u16,
    },
    MOVZ64Movewide {
        Rd: u8,
        hw: u32,
        imm16: u16,
    },
    MOVK64Movewide {
        Rd: u8,
        hw: u32,
        imm16: u16,
    },
    ADROnlyPcreladdr {
        Rd: u8,
        immhi: u32,
        immlo: u8,
    },
    ADRPOnlyPcreladdr {
        Rd: u8,
        immhi: u32,
        immlo: u8,
    },
    ADD32AddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    ADDS32SAddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    SUB32AddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    SUBS32SAddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    ADD64AddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    ADDS64SAddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    SUB64AddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    SUBS64SAddsubExt {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm3: u8,
        option: u8,
    },
    ADD32AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ADDS32AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    SUB32AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    SUBS32AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ADD64AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ADDS64AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    SUB64AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    SUBS64AddsubShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ADC32AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    ADCS32AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SBC32AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SBCS32AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    ADC64AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    ADCS64AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SBC64AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SBCS64AddsubCarry {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CCMN32CondcmpImm {
        Rn: u8,
        cond: u8,
        imm5: u8,
        nzcv: u8,
    },
    CCMP32CondcmpImm {
        Rn: u8,
        cond: u8,
        imm5: u8,
        nzcv: u8,
    },
    CCMN64CondcmpImm {
        Rn: u8,
        cond: u8,
        imm5: u8,
        nzcv: u8,
    },
    CCMP64CondcmpImm {
        Rn: u8,
        cond: u8,
        imm5: u8,
        nzcv: u8,
    },
    CCMN32CondcmpReg {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    CCMP32CondcmpReg {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    CCMN64CondcmpReg {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    CCMP64CondcmpReg {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    CSEL32Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    CSINC32Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    CSINV32Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    CSNEG32Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    CSEL64Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    CSINC64Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    CSINV64Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    CSNEG64Condsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    PACIZA64ZDp1Src {
        Rd: u8,
    },
    PACIZB64ZDp1Src {
        Rd: u8,
    },
    PACDZA64ZDp1Src {
        Rd: u8,
    },
    PACDZB64ZDp1Src {
        Rd: u8,
    },
    AUTIZA64ZDp1Src {
        Rd: u8,
    },
    AUTIZB64ZDp1Src {
        Rd: u8,
    },
    AUTDZA64ZDp1Src {
        Rd: u8,
    },
    AUTDZB64ZDp1Src {
        Rd: u8,
    },
    XPACI64ZDp1Src {
        Rd: u8,
    },
    XPACD64ZDp1Src {
        Rd: u8,
    },
    RBIT32Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    REV1632Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    REV32Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    CLZ32Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    CLS32Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    RBIT64Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    REV1664Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    REV3264Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    REV64Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    CLZ64Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    CLS64Dp1Src {
        Rd: u8,
        Rn: u8,
    },
    PACIA64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    PACIB64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    PACDA64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    PACDB64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    AUTIA64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    AUTIB64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    AUTDA64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    AUTDB64PDp1Src {
        Rd: u8,
        Rn: u8,
    },
    UDIV32Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SDIV32Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    LSLV32Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    LSRV32Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    ASRV32Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    RORV32Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32B32CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32H32CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32W32CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32CB32CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32CH32CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32CW32CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    UDIV64Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SDIV64Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    LSLV64Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    LSRV64Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    ASRV64Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    RORV64Dp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    PACGA64PDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32X64CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    CRC32CX64CDp2Src {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    MADD32ADp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    MSUB32ADp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    MADD64ADp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    MSUB64ADp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SMADDL64WaDp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SMSUBL64WaDp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SMULH64Dp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    UMADDL64WaDp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    UMSUBL64WaDp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    UMULH64Dp3Src {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    AND32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    BIC32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ORR32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ORN32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    EOR32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    EON32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ANDS32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    BICS32LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    AND64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    BIC64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ORR64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ORN64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    EOR64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    EON64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    ANDS64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    BICS64LogShift {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
        shift: u8,
    },
    FMAXNMVAsimdallOnlyH {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FMAXVAsimdallOnlyH {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FMINNMVAsimdallOnlyH {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FMINVAsimdallOnlyH {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FMAXNMVAsimdallOnlySd {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FMAXVAsimdallOnlySd {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FMINNMVAsimdallOnlySd {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FMINVAsimdallOnlySd {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SADDLVAsimdallOnly {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SMAXVAsimdallOnly {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SMINVAsimdallOnly {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    ADDVAsimdallOnly {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UADDLVAsimdallOnly {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UMAXVAsimdallOnly {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UMINVAsimdallOnly {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UMOVAsimdinsXX {
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    SMOVAsimdinsWW {
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    UMOVAsimdinsWW {
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    INSAsimdinsIrR {
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    SMOVAsimdinsXX {
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    DUPAsimdinsDvV {
        Q: u8,
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    DUPAsimdinsDrR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    INSAsimdinsIvV {
        Rd: u8,
        Rn: u8,
        imm4: u8,
        imm5: u8,
    },
    EXTAsimdextOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm4: u8,
    },
    MOVIAsimdimmDDs {
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MOVIAsimdimmD2D {
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    FMOVAsimdimmD2D {
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MOVIAsimdimmNB {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    FMOVAsimdimmSS {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    FMOVAsimdimmHH {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MOVIAsimdimmLHl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    ORRAsimdimmLHl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MVNIAsimdimmLHl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    BICAsimdimmLHl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MOVIAsimdimmMSm {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MVNIAsimdimmMSm {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MOVIAsimdimmLSl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    ORRAsimdimmLSl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    MVNIAsimdimmLSl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    BICAsimdimmLSl {
        Q: u8,
        Rd: u8,
        a: u8,
        b: u8,
        c: u8,
        cmode: u32,
        d: u8,
        e: u8,
        f: u8,
        g: u8,
        h: u8,
    },
    UZP1AsimdpermOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    TRN1AsimdpermOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    ZIP1AsimdpermOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UZP2AsimdpermOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    TRN2AsimdpermOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    ZIP2AsimdpermOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    DUPAsisdoneOnly {
        Rd: u8,
        Rn: u8,
        imm5: u8,
    },
    FMAXNMPAsisdpairOnlyH {
        Rd: u8,
        Rn: u8,
    },
    FADDPAsisdpairOnlyH {
        Rd: u8,
        Rn: u8,
    },
    FMAXPAsisdpairOnlyH {
        Rd: u8,
        Rn: u8,
    },
    FMINNMPAsisdpairOnlyH {
        Rd: u8,
        Rn: u8,
    },
    FMINPAsisdpairOnlyH {
        Rd: u8,
        Rn: u8,
    },
    FMAXNMPAsisdpairOnlySd {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FADDPAsisdpairOnlySd {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FMAXPAsisdpairOnlySd {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FMINNMPAsisdpairOnlySd {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FMINPAsisdpairOnlySd {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    ADDPAsisdpairOnly {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SSHRAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SSRAAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SRSHRAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SRSRAAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SHLAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHLAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHRNAsisdshfN {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQRSHRNAsisdshfN {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SCVTFAsisdshfC {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    FCVTZSAsisdshfC {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    USHRAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    USRAAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    URSHRAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    URSRAAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SRIAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SLIAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHLUAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UQSHLAsisdshfR {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHRUNAsisdshfN {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQRSHRUNAsisdshfN {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UQSHRNAsisdshfN {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UQRSHRNAsisdshfN {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UCVTFAsisdshfC {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    FCVTZUAsisdshfC {
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQDMLALAsisddiffOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMLSLAsisddiffOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULLAsisddiffOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULXAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCMEQAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FRECPSAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FRSQRTSAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCMGEAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FACGEAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FABDAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCMGTAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FACGTAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQADDAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQSUBAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMGTAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMGEAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SSHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQSHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SRSHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRSHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    ADDAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMTSTAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULHAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQADDAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQSUBAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMHIAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMHSAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    USHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQSHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    URSHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQRSHLAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SUBAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMEQAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMULHAsisdsameOnly {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULXAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FCMEQAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FRECPSAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FRSQRTSAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FCMGEAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FACGEAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FABDAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FCMGTAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FACGTAsisdsamefp16Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SQRDMLAHAsisdsame2Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMLSHAsisdsame2Only {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCVTNSAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTMSAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTASAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SCVTFAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMGTAsisdmiscFz {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMEQAsisdmiscFz {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMLTAsisdmiscFz {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTPSAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTZSAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRECPEAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRECPXAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTXNAsisdmiscN {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTNUAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTMUAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTAUAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UCVTFAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMGEAsisdmiscFz {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMLEAsisdmiscFz {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTPUAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTZUAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRSQRTEAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SUQADDAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQABSAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMGTAsisdmiscZ {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMEQAsisdmiscZ {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMLTAsisdmiscZ {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    ABSAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQXTNAsisdmiscN {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    USQADDAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQNEGAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMGEAsisdmiscZ {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMLEAsisdmiscZ {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    NEGAsisdmiscR {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQXTUNAsisdmiscN {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UQXTNAsisdmiscN {
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTNSAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCVTMSAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCVTASAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    SCVTFAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCMGTAsisdmiscfp16Fz {
        Rd: u8,
        Rn: u8,
    },
    FCMEQAsisdmiscfp16Fz {
        Rd: u8,
        Rn: u8,
    },
    FCMLTAsisdmiscfp16Fz {
        Rd: u8,
        Rn: u8,
    },
    FCVTPSAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCVTZSAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FRECPEAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FRECPXAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCVTNUAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCVTMUAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCVTAUAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    UCVTFAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCMGEAsisdmiscfp16Fz {
        Rd: u8,
        Rn: u8,
    },
    FCMLEAsisdmiscfp16Fz {
        Rd: u8,
        Rn: u8,
    },
    FCVTPUAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FCVTZUAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FRSQRTEAsisdmiscfp16R {
        Rd: u8,
        Rn: u8,
    },
    FMLAAsisdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMLSAsisdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULAsisdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULXAsisdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMLAAsisdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMLSAsisdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULAsisdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULXAsisdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMLALAsisdelemL {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMLSLAsisdelemL {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULLAsisdelemL {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULHAsisdelemR {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMULHAsisdelemR {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMLAHAsisdelemR {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMLSHAsisdelemR {
        H: u8,
        L: u8,
        M: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SSHRAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SSRAAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SRSHRAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SRSRAAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SHLAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHLAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SHRNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    RSHRNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHRNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQRSHRNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SSHLLAsimdshfL {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SCVTFAsimdshfC {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    FCVTZSAsimdshfC {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    USHRAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    USRAAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    URSHRAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    URSRAAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SRIAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SLIAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHLUAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UQSHLAsimdshfR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQSHRUNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    SQRSHRUNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UQSHRNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UQRSHRNAsimdshfN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    USHLLAsimdshfL {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    UCVTFAsimdshfC {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    FCVTZUAsimdshfC {
        Q: u8,
        Rd: u8,
        Rn: u8,
        immb: u8,
        immh: u8,
    },
    TBLAsimdtblL11 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    TBXAsimdtblL11 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    TBLAsimdtblL22 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    TBXAsimdtblL22 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    TBLAsimdtblL33 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    TBXAsimdtblL33 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    TBLAsimdtblL44 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    TBXAsimdtblL44 {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SADDLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SADDWAsimddiffW {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SSUBLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SSUBWAsimddiffW {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    ADDHNAsimddiffN {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SABALAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SUBHNAsimddiffN {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SABDLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMLALAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMLALAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMLSLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMLSLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMULLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    PMULLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UADDLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UADDWAsimddiffW {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    USUBLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    USUBWAsimddiffW {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    RADDHNAsimddiffN {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UABALAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    RSUBHNAsimddiffN {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UABDLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMLALAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMLSLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMULLAsimddiffL {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    ANDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    BICAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    ORRAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    ORNAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    EORAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    BSLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    BITAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    BIFAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXNMAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMLAAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULXAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCMEQAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMAXAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FRECPSAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMINNMAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMLSAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FSUBAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMINAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FRSQRTSAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMAXNMPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FADDPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCMGEAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FACGEAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMAXPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FDIVAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMINNMPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FABDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCMGTAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FACGTAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMINPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SHADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SRHADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SHSUBAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQSUBAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMGTAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMGEAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SSHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQSHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SRSHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRSHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMAXAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMINAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SABDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SABAAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    ADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMTSTAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    MLAAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    MULAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMAXPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMINPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULHAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    ADDPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UHADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    URHADDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UHSUBAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQSUBAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMHIAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMHSAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    USHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQSHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    URSHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UQRSHLAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMAXAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMINAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UABDAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UABAAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SUBAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    CMEQAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    MLSAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    PMULAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMAXPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMINPAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMULHAsimdsameOnly {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMAXNMAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMLAAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FADDAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULXAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FCMEQAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FRECPSAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINNMAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMLSAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FSUBAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FRSQRTSAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXNMPAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FADDPAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FCMGEAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FACGEAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXPAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FDIVAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINNMPAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FABDAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FCMGTAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FACGTAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINPAsimdsamefp16Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SDOTAsimdsame2D {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMLAHAsimdsame2Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMLSHAsimdsame2Only {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UDOTAsimdsame2D {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCADDAsimdsame2C {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        opcode: u32,
        size: u8,
    },
    FCMLAAsimdsame2C {
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        opcode: u32,
        size: u8,
    },
    NOTAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    RBITAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTNAsimdmiscN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTLAsimdmiscL {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTNAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTMAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTNSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTMSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTASAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SCVTFAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMGTAsimdmiscFz {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMEQAsimdmiscFz {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMLTAsimdmiscFz {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FABSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTPAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTZAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTPSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTZSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    URECPEAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRECPEAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTXNAsimdmiscN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTAAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTXAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTNUAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTMUAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTAUAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UCVTFAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMGEAsimdmiscFz {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCMLEAsimdmiscFz {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FNEGAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTIAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTPUAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FCVTZUAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    URSQRTEAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRSQRTEAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FSQRTAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    REV64AsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    REV16AsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SADDLPAsimdmiscP {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SUQADDAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CLSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CNTAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SADALPAsimdmiscP {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQABSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMGTAsimdmiscZ {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMEQAsimdmiscZ {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMLTAsimdmiscZ {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    ABSAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    XTNAsimdmiscN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQXTNAsimdmiscN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    REV32AsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UADDLPAsimdmiscP {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    USQADDAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CLZAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UADALPAsimdmiscP {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQNEGAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMGEAsimdmiscZ {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    CMLEAsimdmiscZ {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    NEGAsimdmiscR {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SQXTUNAsimdmiscN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    SHLLAsimdmiscS {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    UQXTNAsimdmiscN {
        Q: u8,
        Rd: u8,
        Rn: u8,
        size: u8,
    },
    FRINTNAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRINTMAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTNSAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTMSAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTASAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    SCVTFAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCMGTAsimdmiscfp16Fz {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCMEQAsimdmiscfp16Fz {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCMLTAsimdmiscfp16Fz {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FABSAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRINTPAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRINTZAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTPSAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTZSAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRECPEAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRINTAAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRINTXAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTNUAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTMUAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTAUAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    UCVTFAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCMGEAsimdmiscfp16Fz {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCMLEAsimdmiscfp16Fz {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FNEGAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRINTIAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTPUAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FCVTZUAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FRSQRTEAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FSQRTAsimdmiscfp16R {
        Q: u8,
        Rd: u8,
        Rn: u8,
    },
    FMLAAsimdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMLSAsimdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULAsimdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULXAsimdelemRhH {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMLAAsimdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMLSAsimdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULAsimdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FMULXAsimdelemRSd {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMLALAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMLALAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMLSLAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMLSLAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    MULAsimdelemR {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SMULLAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULLAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQDMULHAsimdelemR {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMULHAsimdelemR {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SDOTAsimdelemD {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    MLAAsimdelemR {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMLALAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    MLSAsimdelemR {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMLSLAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UMULLAsimdelemL {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMLAHAsimdelemR {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    UDOTAsimdelemD {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    SQRDMLSHAsimdelemR {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        size: u8,
    },
    FCMLAAsimdelemCH {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        opcode: u32,
    },
    FCMLAAsimdelemCS {
        H: u8,
        L: u8,
        M: u8,
        Q: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
        opcode: u32,
    },
    SCVTFS32Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    UCVTFS32Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZS32SFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZU32SFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    SCVTFD32Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    UCVTFD32Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZS32DFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZU32DFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    SCVTFH32Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    UCVTFH32Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZS32HFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZU32HFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    SCVTFS64Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    UCVTFS64Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZS64SFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZU64SFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    SCVTFD64Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    UCVTFD64Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZS64DFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZU64DFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    SCVTFH64Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    UCVTFH64Float2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZS64HFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTZU64HFloat2Fix {
        Rd: u8,
        Rn: u8,
        scale: u32,
    },
    FCVTNS32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNU32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    SCVTFS32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    UCVTFS32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAS32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAU32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOV32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOVS32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPS32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPU32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMS32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMU32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZS32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZU32SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNS32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNU32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    SCVTFD32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    UCVTFD32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAS32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAU32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPS32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPU32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMS32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMU32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZS32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZU32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FJCVTZS32DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNS32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNU32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    SCVTFH32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    UCVTFH32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAS32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAU32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOV32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOVH32Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPS32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPU32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMS32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMU32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZS32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZU32HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNS64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNU64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    SCVTFS64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    UCVTFS64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAS64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAU64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPS64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPU64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMS64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMU64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZS64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZU64SFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNS64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNU64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    SCVTFD64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    UCVTFD64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAS64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAU64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOV64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOVD64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPS64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPU64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMS64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMU64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZS64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZU64DFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOV64VxFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOVV64IFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNS64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTNU64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    SCVTFH64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    UCVTFH64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAS64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTAU64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOV64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FMOVH64Float2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPS64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTPU64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMS64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTMU64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZS64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    FCVTZU64HFloat2Int {
        Rd: u8,
        Rn: u8,
    },
    AESEBCryptoaes {
        Rd: u8,
        Rn: u8,
    },
    AESDBCryptoaes {
        Rd: u8,
        Rn: u8,
    },
    AESMCBCryptoaes {
        Rd: u8,
        Rn: u8,
    },
    AESIMCBCryptoaes {
        Rd: u8,
        Rn: u8,
    },
    EOR3Vvv16Crypto4 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    BCAXVvv16Crypto4 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SM3SS1Vvv4Crypto4 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA1CQsvCryptosha3 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA1PQsvCryptosha3 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA1MQsvCryptosha3 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA1SU0VvvCryptosha3 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA256HQqvCryptosha3 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA256H2QqvCryptosha3 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA256SU1VvvCryptosha3 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA512HQqvCryptosha5123 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA512H2QqvCryptosha5123 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SHA512SU1Vvv2Cryptosha5123 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    RAX1Vvv2Cryptosha5123 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SM3PARTW1Vvv4Cryptosha5123 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SM3PARTW2Vvv4Cryptosha5123 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SM4EKEYVvv4Cryptosha5123 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    SM3TT1AVvv4Crypto3Imm2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm2: u8,
    },
    SM3TT1BVvv4Crypto3Imm2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm2: u8,
    },
    SM3TT2AVvv4Crypto3Imm2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm2: u8,
    },
    SM3TT2BVvvCrypto3Imm2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm2: u8,
    },
    XARVvv2Crypto3Imm6 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        imm6: u8,
    },
    SHA1HSsCryptosha2 {
        Rd: u8,
        Rn: u8,
    },
    SHA1SU1VvCryptosha2 {
        Rd: u8,
        Rn: u8,
    },
    SHA256SU0VvCryptosha2 {
        Rd: u8,
        Rn: u8,
    },
    SHA512SU0Vv2Cryptosha5122 {
        Rd: u8,
        Rn: u8,
    },
    SM4EVv4Cryptosha5122 {
        Rd: u8,
        Rn: u8,
    },
    FCMPSFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPSzFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPESFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPESzFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPDFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPDzFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPEDFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPEDzFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPHFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPHzFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPEHFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCMPEHzFloatcmp {
        Rm: u8,
        Rn: u8,
    },
    FCCMPSFloatccmp {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    FCCMPESFloatccmp {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    FCCMPDFloatccmp {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    FCCMPEDFloatccmp {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    FCCMPHFloatccmp {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    FCCMPEHFloatccmp {
        Rm: u8,
        Rn: u8,
        cond: u8,
        nzcv: u8,
    },
    FCSELSFloatsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    FCSELDFloatsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    FCSELHFloatsel {
        Rd: u8,
        Rm: u8,
        Rn: u8,
        cond: u8,
    },
    FMOVSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FABSSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FNEGSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FSQRTSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FCVTDsFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FCVTHsFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTNSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTPSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTMSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTZSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTASFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTXSFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTISFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FMOVDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FABSDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FNEGDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FSQRTDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FCVTSdFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FCVTHdFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTNDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTPDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTMDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTZDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTADFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTXDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTIDFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FMOVHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FABSHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FNEGHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FSQRTHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FCVTShFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FCVTDhFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTNHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTPHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTMHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTZHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTAHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTXHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FRINTIHFloatdp1 {
        Rd: u8,
        Rn: u8,
    },
    FMULSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FDIVSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FADDSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FSUBSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXNMSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINNMSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMULSFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FDIVDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FADDDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FSUBDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXNMDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINNMDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMULDFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMULHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FDIVHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FADDHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FSUBHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMAXNMHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMINNMHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMULHFloatdp2 {
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMADDSFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMSUBSFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMADDSFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMSUBSFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMADDDFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMSUBDFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMADDDFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMSUBDFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMADDHFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMSUBHFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMADDHFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FNMSUBHFloatdp3 {
        Ra: u8,
        Rd: u8,
        Rm: u8,
        Rn: u8,
    },
    FMOVSFloatimm {
        Rd: u8,
        imm8: u8,
    },
    FMOVDFloatimm {
        Rd: u8,
        imm8: u8,
    },
    FMOVHFloatimm {
        Rd: u8,
        imm8: u8,
    },
}
