#[doc = "Register `INTFLAGC` reader"]
pub type R = crate::R<IntflagcSpec>;
#[doc = "Register `INTFLAGC` writer"]
pub type W = crate::W<IntflagcSpec>;
#[doc = "Field `EVSYS_` reader - EVSYS"]
pub type Evsys_R = crate::BitReader;
#[doc = "Field `EVSYS_` writer - EVSYS"]
pub type Evsys_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SERCOM0_` reader - SERCOM0"]
pub type Sercom0_R = crate::BitReader;
#[doc = "Field `SERCOM0_` writer - SERCOM0"]
pub type Sercom0_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SERCOM1_` reader - SERCOM1"]
pub type Sercom1_R = crate::BitReader;
#[doc = "Field `SERCOM1_` writer - SERCOM1"]
pub type Sercom1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SERCOM2_` reader - SERCOM2"]
pub type Sercom2_R = crate::BitReader;
#[doc = "Field `SERCOM2_` writer - SERCOM2"]
pub type Sercom2_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SERCOM3_` reader - SERCOM3"]
pub type Sercom3_R = crate::BitReader;
#[doc = "Field `SERCOM3_` writer - SERCOM3"]
pub type Sercom3_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TCC0_` reader - TCC0"]
pub type Tcc0_R = crate::BitReader;
#[doc = "Field `TCC0_` writer - TCC0"]
pub type Tcc0_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TC0_` reader - TC0"]
pub type Tc0_R = crate::BitReader;
#[doc = "Field `TC0_` writer - TC0"]
pub type Tc0_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TC1_` reader - TC1"]
pub type Tc1_R = crate::BitReader;
#[doc = "Field `TC1_` writer - TC1"]
pub type Tc1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TC2_` reader - TC2"]
pub type Tc2_R = crate::BitReader;
#[doc = "Field `TC2_` writer - TC2"]
pub type Tc2_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TC3_` reader - TC3"]
pub type Tc3_R = crate::BitReader;
#[doc = "Field `TC3_` writer - TC3"]
pub type Tc3_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ADC_` reader - ADC"]
pub type Adc_R = crate::BitReader;
#[doc = "Field `ADC_` writer - ADC"]
pub type Adc_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `AC_` reader - AC"]
pub type Ac_R = crate::BitReader;
#[doc = "Field `AC_` writer - AC"]
pub type Ac_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PTC_` reader - PTC"]
pub type Ptc_R = crate::BitReader;
#[doc = "Field `PTC_` writer - PTC"]
pub type Ptc_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SLCD_` reader - SLCD"]
pub type Slcd_R = crate::BitReader;
#[doc = "Field `SLCD_` writer - SLCD"]
pub type Slcd_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `AES_` reader - AES"]
pub type Aes_R = crate::BitReader;
#[doc = "Field `AES_` writer - AES"]
pub type Aes_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TRNG_` reader - TRNG"]
pub type Trng_R = crate::BitReader;
#[doc = "Field `TRNG_` writer - TRNG"]
pub type Trng_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `CCL_` reader - CCL"]
pub type Ccl_R = crate::BitReader;
#[doc = "Field `CCL_` writer - CCL"]
pub type Ccl_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - EVSYS"]
    #[inline(always)]
    pub fn evsys_(&self) -> Evsys_R {
        Evsys_R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - SERCOM0"]
    #[inline(always)]
    pub fn sercom0_(&self) -> Sercom0_R {
        Sercom0_R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - SERCOM1"]
    #[inline(always)]
    pub fn sercom1_(&self) -> Sercom1_R {
        Sercom1_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - SERCOM2"]
    #[inline(always)]
    pub fn sercom2_(&self) -> Sercom2_R {
        Sercom2_R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - SERCOM3"]
    #[inline(always)]
    pub fn sercom3_(&self) -> Sercom3_R {
        Sercom3_R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 7 - TCC0"]
    #[inline(always)]
    pub fn tcc0_(&self) -> Tcc0_R {
        Tcc0_R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 8 - TC0"]
    #[inline(always)]
    pub fn tc0_(&self) -> Tc0_R {
        Tc0_R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 9 - TC1"]
    #[inline(always)]
    pub fn tc1_(&self) -> Tc1_R {
        Tc1_R::new(((self.bits >> 9) & 1) != 0)
    }
    #[doc = "Bit 10 - TC2"]
    #[inline(always)]
    pub fn tc2_(&self) -> Tc2_R {
        Tc2_R::new(((self.bits >> 10) & 1) != 0)
    }
    #[doc = "Bit 11 - TC3"]
    #[inline(always)]
    pub fn tc3_(&self) -> Tc3_R {
        Tc3_R::new(((self.bits >> 11) & 1) != 0)
    }
    #[doc = "Bit 12 - ADC"]
    #[inline(always)]
    pub fn adc_(&self) -> Adc_R {
        Adc_R::new(((self.bits >> 12) & 1) != 0)
    }
    #[doc = "Bit 13 - AC"]
    #[inline(always)]
    pub fn ac_(&self) -> Ac_R {
        Ac_R::new(((self.bits >> 13) & 1) != 0)
    }
    #[doc = "Bit 14 - PTC"]
    #[inline(always)]
    pub fn ptc_(&self) -> Ptc_R {
        Ptc_R::new(((self.bits >> 14) & 1) != 0)
    }
    #[doc = "Bit 15 - SLCD"]
    #[inline(always)]
    pub fn slcd_(&self) -> Slcd_R {
        Slcd_R::new(((self.bits >> 15) & 1) != 0)
    }
    #[doc = "Bit 16 - AES"]
    #[inline(always)]
    pub fn aes_(&self) -> Aes_R {
        Aes_R::new(((self.bits >> 16) & 1) != 0)
    }
    #[doc = "Bit 17 - TRNG"]
    #[inline(always)]
    pub fn trng_(&self) -> Trng_R {
        Trng_R::new(((self.bits >> 17) & 1) != 0)
    }
    #[doc = "Bit 18 - CCL"]
    #[inline(always)]
    pub fn ccl_(&self) -> Ccl_R {
        Ccl_R::new(((self.bits >> 18) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - EVSYS"]
    #[inline(always)]
    pub fn evsys_(&mut self) -> Evsys_W<IntflagcSpec> {
        Evsys_W::new(self, 0)
    }
    #[doc = "Bit 1 - SERCOM0"]
    #[inline(always)]
    pub fn sercom0_(&mut self) -> Sercom0_W<IntflagcSpec> {
        Sercom0_W::new(self, 1)
    }
    #[doc = "Bit 2 - SERCOM1"]
    #[inline(always)]
    pub fn sercom1_(&mut self) -> Sercom1_W<IntflagcSpec> {
        Sercom1_W::new(self, 2)
    }
    #[doc = "Bit 3 - SERCOM2"]
    #[inline(always)]
    pub fn sercom2_(&mut self) -> Sercom2_W<IntflagcSpec> {
        Sercom2_W::new(self, 3)
    }
    #[doc = "Bit 4 - SERCOM3"]
    #[inline(always)]
    pub fn sercom3_(&mut self) -> Sercom3_W<IntflagcSpec> {
        Sercom3_W::new(self, 4)
    }
    #[doc = "Bit 7 - TCC0"]
    #[inline(always)]
    pub fn tcc0_(&mut self) -> Tcc0_W<IntflagcSpec> {
        Tcc0_W::new(self, 7)
    }
    #[doc = "Bit 8 - TC0"]
    #[inline(always)]
    pub fn tc0_(&mut self) -> Tc0_W<IntflagcSpec> {
        Tc0_W::new(self, 8)
    }
    #[doc = "Bit 9 - TC1"]
    #[inline(always)]
    pub fn tc1_(&mut self) -> Tc1_W<IntflagcSpec> {
        Tc1_W::new(self, 9)
    }
    #[doc = "Bit 10 - TC2"]
    #[inline(always)]
    pub fn tc2_(&mut self) -> Tc2_W<IntflagcSpec> {
        Tc2_W::new(self, 10)
    }
    #[doc = "Bit 11 - TC3"]
    #[inline(always)]
    pub fn tc3_(&mut self) -> Tc3_W<IntflagcSpec> {
        Tc3_W::new(self, 11)
    }
    #[doc = "Bit 12 - ADC"]
    #[inline(always)]
    pub fn adc_(&mut self) -> Adc_W<IntflagcSpec> {
        Adc_W::new(self, 12)
    }
    #[doc = "Bit 13 - AC"]
    #[inline(always)]
    pub fn ac_(&mut self) -> Ac_W<IntflagcSpec> {
        Ac_W::new(self, 13)
    }
    #[doc = "Bit 14 - PTC"]
    #[inline(always)]
    pub fn ptc_(&mut self) -> Ptc_W<IntflagcSpec> {
        Ptc_W::new(self, 14)
    }
    #[doc = "Bit 15 - SLCD"]
    #[inline(always)]
    pub fn slcd_(&mut self) -> Slcd_W<IntflagcSpec> {
        Slcd_W::new(self, 15)
    }
    #[doc = "Bit 16 - AES"]
    #[inline(always)]
    pub fn aes_(&mut self) -> Aes_W<IntflagcSpec> {
        Aes_W::new(self, 16)
    }
    #[doc = "Bit 17 - TRNG"]
    #[inline(always)]
    pub fn trng_(&mut self) -> Trng_W<IntflagcSpec> {
        Trng_W::new(self, 17)
    }
    #[doc = "Bit 18 - CCL"]
    #[inline(always)]
    pub fn ccl_(&mut self) -> Ccl_W<IntflagcSpec> {
        Ccl_W::new(self, 18)
    }
}
#[doc = "Peripheral interrupt flag status - Bridge C\n\nYou can [`read`](crate::Reg::read) this register and get [`intflagc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflagc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct IntflagcSpec;
impl crate::RegisterSpec for IntflagcSpec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`intflagc::R`](R) reader structure"]
impl crate::Readable for IntflagcSpec {}
#[doc = "`write(|w| ..)` method takes [`intflagc::W`](W) writer structure"]
impl crate::Writable for IntflagcSpec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets INTFLAGC to value 0"]
impl crate::Resettable for IntflagcSpec {
    const RESET_VALUE: u32 = 0;
}
