#[doc = "Register `PLCFG` reader"]
pub type R = crate::R<PlcfgSpec>;
#[doc = "Register `PLCFG` writer"]
pub type W = crate::W<PlcfgSpec>;
#[doc = "Performance Level Select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum Plselselect {
    #[doc = "0: Performance Level 0"]
    Pl0 = 0,
    #[doc = "1: Performance Level 1"]
    Pl1 = 1,
    #[doc = "2: Performance Level 2"]
    Pl2 = 2,
}
impl From<Plselselect> for u8 {
    #[inline(always)]
    fn from(variant: Plselselect) -> Self {
        variant as _
    }
}
impl crate::FieldSpec for Plselselect {
    type Ux = u8;
}
impl crate::IsEnum for Plselselect {}
#[doc = "Field `PLSEL` reader - Performance Level Select"]
pub type PlselR = crate::FieldReader<Plselselect>;
impl PlselR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Option<Plselselect> {
        match self.bits {
            0 => Some(Plselselect::Pl0),
            1 => Some(Plselselect::Pl1),
            2 => Some(Plselselect::Pl2),
            _ => None,
        }
    }
    #[doc = "Performance Level 0"]
    #[inline(always)]
    pub fn is_pl0(&self) -> bool {
        *self == Plselselect::Pl0
    }
    #[doc = "Performance Level 1"]
    #[inline(always)]
    pub fn is_pl1(&self) -> bool {
        *self == Plselselect::Pl1
    }
    #[doc = "Performance Level 2"]
    #[inline(always)]
    pub fn is_pl2(&self) -> bool {
        *self == Plselselect::Pl2
    }
}
#[doc = "Field `PLSEL` writer - Performance Level Select"]
pub type PlselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Plselselect>;
impl<'a, REG> PlselW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
    REG::Ux: From<u8>,
{
    #[doc = "Performance Level 0"]
    #[inline(always)]
    pub fn pl0(self) -> &'a mut crate::W<REG> {
        self.variant(Plselselect::Pl0)
    }
    #[doc = "Performance Level 1"]
    #[inline(always)]
    pub fn pl1(self) -> &'a mut crate::W<REG> {
        self.variant(Plselselect::Pl1)
    }
    #[doc = "Performance Level 2"]
    #[inline(always)]
    pub fn pl2(self) -> &'a mut crate::W<REG> {
        self.variant(Plselselect::Pl2)
    }
}
#[doc = "Field `PLDIS` reader - Performance Level Disable"]
pub type PldisR = crate::BitReader;
#[doc = "Field `PLDIS` writer - Performance Level Disable"]
pub type PldisW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bits 0:1 - Performance Level Select"]
    #[inline(always)]
    pub fn plsel(&self) -> PlselR {
        PlselR::new(self.bits & 3)
    }
    #[doc = "Bit 7 - Performance Level Disable"]
    #[inline(always)]
    pub fn pldis(&self) -> PldisR {
        PldisR::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bits 0:1 - Performance Level Select"]
    #[inline(always)]
    pub fn plsel(&mut self) -> PlselW<PlcfgSpec> {
        PlselW::new(self, 0)
    }
    #[doc = "Bit 7 - Performance Level Disable"]
    #[inline(always)]
    pub fn pldis(&mut self) -> PldisW<PlcfgSpec> {
        PldisW::new(self, 7)
    }
}
#[doc = "Performance Level Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`plcfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`plcfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct PlcfgSpec;
impl crate::RegisterSpec for PlcfgSpec {
    type Ux = u8;
}
#[doc = "`read()` method returns [`plcfg::R`](R) reader structure"]
impl crate::Readable for PlcfgSpec {}
#[doc = "`write(|w| ..)` method takes [`plcfg::W`](W) writer structure"]
impl crate::Writable for PlcfgSpec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
}
#[doc = "`reset()` method sets PLCFG to value 0"]
impl crate::Resettable for PlcfgSpec {
    const RESET_VALUE: u8 = 0;
}
