<?xml version="1.0" encoding="UTF-8"?>
<avr-tools-device-file xmlns:xalan="http://xml.apache.org/xalan" xmlns:NumHelper="NumHelper" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" schema-version="0.3" xsi:noNamespaceSchemaLocation="../../schema/avr_tools_device_file.xsd">
  <variants>
    <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="2.7" vccmax="5.5"/>
  </variants>
  <devices>
    <device name="AT90PWM161" architecture="AVR8" family="megaAVR">
      <address-spaces>
        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x4000">
          <memory-segment start="0x0000" size="0x4000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x80"/>
          <memory-segment start="0x3f00" size="0x0100" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x80"/>
          <memory-segment start="0x3e00" size="0x0200" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x80"/>
          <memory-segment start="0x3c00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x80"/>
          <memory-segment start="0x3800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x80"/>
        </address-space>
        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
        </address-space>
        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
        </address-space>
        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
        </address-space>
        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x0500">
          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
          <memory-segment name="MAPPED_IO" start="0x0020" size="0x00e0" type="io" external="false"/>
          <memory-segment name="IRAM" start="0x0100" size="0x0400" type="ram" external="false"/>
        </address-space>
        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x0200">
          <memory-segment start="0x0000" size="0x0200" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x04"/>
        </address-space>
        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
        <address-space endianness="little" name="osccal" id="osccal" start="0" size="2">
          <memory-segment start="0" size="2" type="osccal" rw="R" exec="0" name="OSCCAL"/>
        </address-space>
      </address-spaces>
      <peripherals>
        <module name="PORT">
          <instance name="PORTB" caption="I/O Port">
            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
          </instance>
          <instance name="PORTD" caption="I/O Port">
            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
          </instance>
          <instance name="PORTE" caption="I/O Port">
            <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
          </instance>
        </module>
        <module name="DAC">
          <instance name="DAC" caption="Digital-to-Analog Converter">
            <register-group name="DAC" name-in-module="DAC" offset="0x00" address-space="data" caption="Digital-to-Analog Converter"/>
          </instance>
        </module>
        <module name="SPI">
          <instance name="SPI" caption="Serial Peripheral Interface">
            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
          </instance>
        </module>
        <module name="WDT">
          <instance name="WDT" caption="Watchdog Timer">
            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
          </instance>
        </module>
        <module name="EXINT">
          <instance name="EXINT" caption="External Interrupts">
            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
          </instance>
        </module>
        <module name="ADC">
          <instance name="ADC" caption="Analog-to-Digital Converter">
            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
          </instance>
        </module>
        <module name="AC">
          <instance name="AC" caption="Analog Comparator">
            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
          </instance>
        </module>
        <module name="CPU">
          <instance name="CPU" caption="CPU Registers">
            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
          </instance>
        </module>
        <module name="EEPROM">
          <instance name="EEPROM" caption="EEPROM">
            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
          </instance>
        </module>
        <module name="PSC">
          <instance name="PSC0" caption="Power Stage Controller">
            <register-group name="PSC0" name-in-module="PSC0" offset="0x00" address-space="data" caption="Power Stage Controller"/>
          </instance>
          <instance name="PSC2" caption="Power Stage Controller">
            <register-group name="PSC2" name-in-module="PSC2" offset="0x00" address-space="data" caption="Power Stage Controller"/>
          </instance>
        </module>
        <module name="TC16">
          <instance name="TC1" caption="Timer/Counter, 16-bit">
            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
          </instance>
        </module>
        <module name="BOOT_LOAD">
          <instance name="BOOT_LOAD" caption="Bootloader">
            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
          </instance>
        </module>
        <module name="FUSE">
          <instance name="FUSE" caption="Fuses">
            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
          </instance>
        </module>
        <module name="LOCKBIT">
          <instance name="LOCKBIT" caption="Lockbits">
            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
          </instance>
        </module>
      </peripherals>
      <interrupts>
        <interrupt index="0" name="RESET" caption="External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset and JTAG AVR Reset"/>
        <interrupt index="1" name="PSC2_CAPT" caption="PSC2 Capture Event"/>
        <interrupt index="2" name="PSC2_EC" caption="PSC2 End Cycle"/>
        <interrupt index="3" name="PSC2_EEC" caption="PSC2 End Of Enhanced Cycle"/>
        <interrupt index="4" name="PSC0_CAPT" caption="PSC0 Capture Event"/>
        <interrupt index="5" name="PSC0_EC" caption="PSC0 End Cycle"/>
        <interrupt index="6" name="PSC0_EEC" caption="PSC0 End Of Enhanced Cycle"/>
        <interrupt index="7" name="ANALOG_COMP_1" caption="Analog Comparator 1"/>
        <interrupt index="8" name="ANALOG_COMP_2" caption="Analog Comparator 2"/>
        <interrupt index="9" name="ANALOG_COMP_3" caption="Analog Comparator 3"/>
        <interrupt index="10" name="INT0" caption="External Interrupt Request 0"/>
        <interrupt index="11" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
        <interrupt index="12" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
        <interrupt index="13" name="ADC" caption="ADC Conversion Complete"/>
        <interrupt index="14" name="INT1" caption="External Interrupt Request 1"/>
        <interrupt index="15" name="SPI_STC" caption="SPI Serial Transfer Complet"/>
        <interrupt index="16" name="INT2" caption="External Interrupt Request 2"/>
        <interrupt index="17" name="WDT" caption="Watchdog Timeout Interrupt"/>
        <interrupt index="18" name="EE_READY" caption="EEPROM Ready"/>
        <interrupt index="19" name="SPM_READY" caption="Store Program Memory Read"/>
      </interrupts>
      <interfaces>
        <interface name="ISP" type="isp"/>
        <interface name="HVPP" type="hvpp"/>
        <interface name="debugWIRE" type="dw"/>
      </interfaces>
      <property-groups>
        <property-group name="SIGNATURES">
          <property name="JTAGID" value="0x948B"/>
          <property name="SIGNATURE0" value="0x1e"/>
          <property name="SIGNATURE1" value="0x94"/>
          <property name="SIGNATURE2" value="0x8B"/>
        </property-group>
        <property-group name="OCD">
          <property name="OCD_REVISION" value="1"/>
          <property name="OCD_DATAREG" value="0x31"/>
          <property name="PROGBASE" value="0x0000"/>
        </property-group>
        <property-group name="JTAG_INTERFACE">
          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
        </property-group>
        <property-group name="ISP_INTERFACE">
          <property name="IspEnterProgMode_timeout" value="200"/>
          <property name="IspEnterProgMode_stabDelay" value="100"/>
          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
          <property name="IspEnterProgMode_synchLoops" value="32"/>
          <property name="IspEnterProgMode_byteDelay" value="0"/>
          <property name="IspEnterProgMode_pollIndex" value="3"/>
          <property name="IspEnterProgMode_pollValue" value="0x53"/>
          <property name="IspLeaveProgMode_preDelay" value="1"/>
          <property name="IspLeaveProgMode_postDelay" value="1"/>
          <property name="IspChipErase_eraseDelay" value="45"/>
          <property name="IspChipErase_pollMethod" value="1"/>
          <property name="IspProgramFlash_mode" value="0x41"/>
          <property name="IspProgramFlash_blockSize" value="64"/>
          <property name="IspProgramFlash_delay" value="10"/>
          <property name="IspProgramFlash_cmd1" value="0x40"/>
          <property name="IspProgramFlash_cmd2" value="0x4C"/>
          <property name="IspProgramFlash_cmd3" value="0x00"/>
          <property name="IspProgramFlash_pollVal1" value="0x00"/>
          <property name="IspProgramFlash_pollVal2" value="0x00"/>
          <property name="IspProgramEeprom_mode" value="0x41"/>
          <property name="IspProgramEeprom_blockSize" value="4"/>
          <property name="IspProgramEeprom_delay" value="5"/>
          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
          <property name="IspProgramEeprom_cmd3" value="0x00"/>
          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
          <property name="IspReadFlash_blockSize" value="256"/>
          <property name="IspReadEeprom_blockSize" value="256"/>
          <property name="IspReadFuse_pollIndex" value="4"/>
          <property name="IspReadLock_pollIndex" value="4"/>
          <property name="IspReadSign_pollIndex" value="4"/>
          <property name="IspReadOsccal_pollIndex" value="4"/>
        </property-group>
        <property-group name="PP_INTERFACE">
          <property name="PpControlStack" value="0xC4 0xE4 0xC4 0xE4 0xCC 0xEC 0xCC 0xEC 0xD4 0xF4 0xD4 0xF4 0xDC 0xFC 0xDC 0xFC 0xC8 0xE8 0xD8 0xF8 0x4C 0x6C 0x5C 0x7C 0xEC 0xBC 0x00 0x06 0x00 0x00 0x00 0x00"/>
          <property name="PpEnterProgMode_stabDelay" value="100"/>
          <property name="PpEnterProgMode_progModeDelay" value="0"/>
          <property name="PpEnterProgMode_latchCycles" value="5"/>
          <property name="PpEnterProgMode_toggleVtg" value="1"/>
          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
          <property name="PpLeaveProgMode_stabDelay" value="15"/>
          <property name="PpLeaveProgMode_resetDelay" value="15"/>
          <property name="PpChipErase_pulseWidth" value="0"/>
          <property name="PpChipErase_pollTimeout" value="10"/>
          <property name="PpProgramFlash_pollTimeout" value="5"/>
          <property name="PpProgramFlash_mode" value="0x0D"/>
          <property name="PpProgramFlash_blockSize" value="256"/>
          <property name="PpReadFlash_blockSize" value="256"/>
          <property name="PpProgramEeprom_pollTimeout" value="5"/>
          <property name="PpProgramEeprom_mode" value="0x05"/>
          <property name="PpProgramEeprom_blockSize" value="256"/>
          <property name="PpReadEeprom_blockSize" value="256"/>
          <property name="PpProgramFuse_pulseWidth" value="0"/>
          <property name="PpProgramFuse_pollTimeout" value="5"/>
          <property name="PpProgramLock_pulseWidth" value="0"/>
          <property name="PpProgramLock_pollTimeout" value="5"/>
        </property-group>
        <property-group name="ISP_INTERFACE_STK600">
          <property name="IspEnterProgMode_timeout" value="200"/>
          <property name="IspEnterProgMode_stabDelay" value="100"/>
          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
          <property name="IspEnterProgMode_synchLoops" value="32"/>
          <property name="IspEnterProgMode_byteDelay" value="0"/>
          <property name="IspEnterProgMode_pollIndex" value="3"/>
          <property name="IspEnterProgMode_pollValue" value="0x53"/>
          <property name="IspLeaveProgMode_preDelay" value="1"/>
          <property name="IspLeaveProgMode_postDelay" value="1"/>
          <property name="IspChipErase_eraseDelay" value="45"/>
          <property name="IspChipErase_pollMethod" value="1"/>
          <property name="IspProgramFlash_mode" value="0x41"/>
          <property name="IspProgramFlash_blockSize" value="64"/>
          <property name="IspProgramFlash_delay" value="6"/>
          <property name="IspProgramFlash_cmd1" value="0x40"/>
          <property name="IspProgramFlash_cmd2" value="0x4C"/>
          <property name="IspProgramFlash_cmd3" value="0x00"/>
          <property name="IspProgramFlash_pollVal1" value="0x00"/>
          <property name="IspProgramFlash_pollVal2" value="0x00"/>
          <property name="IspProgramEeprom_mode" value="0x41"/>
          <property name="IspProgramEeprom_blockSize" value="4"/>
          <property name="IspProgramEeprom_delay" value="5"/>
          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
          <property name="IspProgramEeprom_cmd3" value="0x00"/>
          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
          <property name="IspReadFlash_blockSize" value="256"/>
          <property name="IspReadEeprom_blockSize" value="256"/>
          <property name="IspReadFuse_pollIndex" value="4"/>
          <property name="IspReadLock_pollIndex" value="4"/>
          <property name="IspReadSign_pollIndex" value="4"/>
          <property name="IspReadOsccal_pollIndex" value="4"/>
        </property-group>
        <property-group name="PP_INTERFACE_STK600">
          <property name="PpControlStack" value="0x0C 0x1C 0x0C 0x1C 0x2C 0x3C 0x2C 0x3C 0x4C 0x5C 0x4C 0x5C 0x6C 0x7C 0x6C 0x7C 0x24 0x34 0x64 0x74 0x28 0x38 0x68 0x78 0x7C 0x7C 0x00 0x01 0x00 0x00 0x00 0x00"/>
          <property name="PpEnterProgMode_stabDelay" value="100"/>
          <property name="PpEnterProgMode_progModeDelay" value="0"/>
          <property name="PpEnterProgMode_latchCycles" value="6"/>
          <property name="PpEnterProgMode_toggleVtg" value="1"/>
          <property name="PpEnterProgMode_powerOffDelay" value="20"/>
          <property name="PpEnterProgMode_resetDelayMs" value="0"/>
          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
          <property name="PpLeaveProgMode_stabDelay" value="15"/>
          <property name="PpLeaveProgMode_resetDelay" value="15"/>
          <property name="PpChipErase_pulseWidth" value="0"/>
          <property name="PpChipErase_pollTimeout" value="10"/>
          <property name="PpProgramFlash_pollTimeout" value="5"/>
          <property name="PpProgramFlash_mode" value="0x0D"/>
          <property name="PpProgramFlash_blockSize" value="256"/>
          <property name="PpReadFlash_blockSize" value="256"/>
          <property name="PpProgramEeprom_pollTimeout" value="5"/>
          <property name="PpProgramEeprom_mode" value="0x05"/>
          <property name="PpProgramEeprom_blockSize" value="256"/>
          <property name="PpReadEeprom_blockSize" value="256"/>
          <property name="PpProgramFuse_pulseWidth" value="0"/>
          <property name="PpProgramFuse_pollTimeout" value="5"/>
          <property name="PpProgramLock_pulseWidth" value="0"/>
          <property name="PpProgramLock_pollTimeout" value="5"/>
        </property-group>
      </property-groups>
    </device>
  </devices>
  <modules>
    <module caption="Fuses" name="FUSE">
      <register-group caption="Fuses" name="FUSE">
        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFD">
          <bitfield caption="PSC2 Reset Behavior" mask="0x80" name="PSC2RB"/>
          <bitfield caption="PSC2 Reset Behavior for 22 and 23" mask="0x40" name="PSC2RBA"/>
          <bitfield caption="PSC0 Reset Behavior" mask="0x20" name="PSC0RB"/>
          <bitfield caption="PSC Reset Value" mask="0x10" name="PSCRV"/>
          <bitfield caption="PSC2 and PSC0 input Reset Behavior" mask="0x08" name="PSCINRB"/>
          <bitfield caption="Brown-out Detector Trigger Level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
        </register>
        <register caption="" name="HIGH" offset="0x01" size="1" initval="0xD9">
          <bitfield caption="Reset Disabled (Enable PE0 as I/O pin)" mask="0x80" name="RSTDISBL"/>
          <bitfield caption="Debug Wire enable" mask="0x40" name="DWEN"/>
          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
          <bitfield caption="Watch-dog Timer always on" mask="0x10" name="WDTON"/>
          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
          <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
          <bitfield caption="Select Reset Vector" mask="0x01" name="BOOTRST"/>
        </register>
        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
          <bitfield caption="Clock output on PORTD1" mask="0x40" name="CKOUT"/>
          <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
        </register>
      </register-group>
      <value-group caption="" name="ENUM_SUT_CKSEL">
        <value caption="Ext. CK; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0000 SUT=00]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x00"/>
        <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+4.1 ms; [CKSEL=0000 SUT=01]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x10"/>
        <value caption="Ext. CK; PLLin: RC8 MHz; SUT:6 CK/14CK+65 ms; [CKSEL=0000 SUT=10]" name="EXTCLK_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x20"/>
        <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+0ms; [CKSEL=0010 SUT=00]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_0MS" value="0x02"/>
        <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+4.1 ms; [CKSEL=0010 SUT=01]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_4MS1" value="0x12"/>
        <value caption="RC8 MHz; PLLin: RC8; SUT: 6CK/14CK+65 ms;  [CKSEL=0010 SUT=10]" name="RC_8MHZ_PLLIN_RC_8MHZ_6CK_14CK_65MS" value="0x22"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1000 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x08"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1000 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x18"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1000 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x28"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1000 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x38"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1001 SUT=00]" name="XOSC_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x09"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1001 SUT=01]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x19"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1001 SUT=10]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x29"/>
        <value caption="XOSC.9-3MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1001 SUT=11]" name="XOSC_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x39"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1010 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0A"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms; [CKSEL=1010 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1A"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1010 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2A"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1010 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3A"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms;  [CKSEL=1011 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0B"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1011 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1B"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1011 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2B"/>
        <value caption="XOSC3-8MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1011 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3B"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+4.1 ms; [CKSEL=1100 SUT=00]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_4MS1" value="0x0C"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 258CK/14CK+65 ms;  [CKSEL=1100 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_258CK_14CK_65MS" value="0x1C"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=1100 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_0MS" value="0x2C"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1100 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_4MS1" value="0x3C"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 1KCK/14CK+65 ms;  [CKSEL=1101 SUT=00" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_1KCK_14CK_65MS" value="0x0D"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=1101 SUT=01]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_0MS" value="0x1D"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1101 SUT=10]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_4MS1" value="0x2D"/>
        <value caption="XOSC3-8MHz; PLLin: XOSC; SUT: 16KCK/14CK+65 ms;  [CKSEL=1101 SUT=11]" name="XOSC_3MHZ_8MHZ_PLLIN_XOSC_16KCK_14CK_65MS" value="0x3D"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+4.1 ms; [CKSEL=1110 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_4MS1" value="0x0E"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 258CK/14CK+65 ms;  [CKSEL=1110 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_258CK_14CK_65MS" value="0x1E"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=1110 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x2E"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+4.1 ms; [CKSEL=1110 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_4MS1" value="0x3E"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 1KCK/14CK+65 ms; [CKSEL=1111 SUT=00]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_1KCK_14CK_65MS" value="0x0F"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+0 ms; [CKSEL=1111 SUT=01]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_0MS" value="0x1F"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+4.1 ms; [CKSEL=1111 SUT=10]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_4MS1" value="0x2F"/>
        <value caption="XOSC8-16MHz; PLLin: RC8; SUT: 16KCK/14CK+65 ms;  [CKSEL=1111 SUT=11]" name="XOSC_8MHZ_16MHZ_PLLIN_RC_8MHZ_16KCK_14CK_65MS" value="0x3F"/>
        <value caption="WD128 KHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0011 SUT=00]" name="WDOSC_128KHZ_1KCK_14CK_0MS" value="0x03"/>
        <value caption="WD128 KHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0011 SUT=01]" name="WDOSC_128KHZ_1KCK_14CK_4MS1" value="0x13"/>
        <value caption="WD128 KHz; SUT: 1KCK/14CK+65 ms; [CKSEL=0011 SUT=10]" name="WDOSC_128KHZ_1KCK_14CK_65MS" value="0x23"/>
        <value caption="WD128 KHz; SUT: 16KCK/14CK+0 ms; [CKSEL=0011 SUT=11]" name="WDOSC_128KHZ_16KCK_14CK_0MS" value="0x33"/>
        <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+0 ms; [CKSEL=0001 SUT=00]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_0MS" value="0x01"/>
        <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+4 ms;   [CKSEL=0001 SUT=01]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_4MS" value="0x11"/>
        <value caption="PLL/4; PLLin: RC8; SUT: 1KCK/14CK+64 ms;   [CKSEL=0001 SUT=10]" name="PLLCLK_DIV4_PLLIN_RC_8MHZ_1KCK_14CK_64MS" value="0x21"/>
        <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+0 ms; [CKSEL=0101 SUT=00]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_0MS" value="0x05"/>
        <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=01]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x15"/>
        <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+4 ms; [CKSEL=0101 SUT=10]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_4MS" value="0x25"/>
        <value caption="PLL/4; PLLin: Ext. CK; SUT: 16KCK/14CK+64 ms; [CKSEL=0101 SUT=11]" name="PLLCLK_DIV4_PLLIN_EXTCLK_16KCK_14CK_64MS" value="0x35"/>
        <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+0 ms; [CKSEL=0100 SUT=00]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_0MS" value="0x04"/>
        <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+4 ms; [CKSEL=0100 SUT=01]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_4MS" value="0x14"/>
        <value caption="PLL/4; PLLin: XOSC; SUT: 1KCK/14CK+64 ms; [CKSEL=0100 SUT=10]" name="PLLCLK_DIV4_PLLIN_XOSC_1KCK_14CK_64MS" value="0x24"/>
        <value caption="PLL/4; PLLin: XOSC; SUT: 16KCK/14CK+0 ms; [CKSEL=0100 SUT=11]" name="PLLCLK_DIV4_PLLIN_XOSC_16KCK_14CK_0MS" value="0x34"/>
        <value caption="RC 1 MHz; SUT: 1KCK/14CK+0 ms; [CKSEL=0110 SUT=00]" name="RC_1MHZ_1KCK_14CK_0MS" value="0x06"/>
        <value caption="RC 1 MHz; SUT: 1KCK/14CK+4.1 ms; [CKSEL=0110 SUT=01]" name="RC_1MHZ_1KCK_14CK_4MS1" value="0x16"/>
        <value caption="RC 1 MHz; SUT: 1KCK/14CK+65 ms;  [CKSEL=0110 SUT=10]" name="RC_1MHZ_1KCK_14CK_65MS" value="0x26"/>
      </value-group>
      <value-group caption="" name="ENUM_BOOTSZ">
        <value caption="Boot Flash size=128 words Boot address=$0F80" name="128W_0F80" value="0x03"/>
        <value caption="Boot Flash size=256 words Boot address=$0F00" name="256W_0F00" value="0x02"/>
        <value caption="Boot Flash size=512 words Boot address=$0E00" name="512W_0E00" value="0x01"/>
        <value caption="Boot Flash size=1024 words Boot address=$0C00" name="1024W_0C00" value="0x00"/>
      </value-group>
      <value-group caption="" name="ENUM_BODLEVEL">
        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
        <value caption="Brown-out detection at VCC=2.3 V" name="2V3" value="0x03"/>
        <value caption="Brown-out detection at VCC=2.2 V" name="2V2" value="0x02"/>
        <value caption="Brown-out detection at VCC=1.9 V" name="1V9" value="0x01"/>
        <value caption="Brown-out detection at VCC=2.0 V" name="2V0" value="0x00"/>
      </value-group>
    </module>
    <module caption="Lockbits" name="LOCKBIT">
      <register-group caption="Lockbits" name="LOCKBIT">
        <register caption="" name="LOCKBIT" offset="0x00" size="1">
          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
          <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
          <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
        </register>
      </register-group>
      <value-group caption="" name="ENUM_LB">
        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
      </value-group>
      <value-group caption="" name="ENUM_BLB">
        <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
        <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
        <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
        <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
      </value-group>
      <value-group caption="" name="ENUM_BLB2">
        <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
        <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
        <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
        <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
      </value-group>
    </module>
    <module caption="I/O Port" name="PORT">
      <register-group caption="I/O Port" name="PORTB">
        <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
        <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
        <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTD">
        <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
        <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
        <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTE">
        <register caption="Port E Data Register" name="PORTE" offset="0x2E" size="1" mask="0x07"/>
        <register caption="Port E Data Direction Register" name="DDRE" offset="0x2D" size="1" mask="0x07"/>
        <register caption="Port E Input Pins" name="PINE" offset="0x2C" size="1" mask="0x07" ocd-rw="R"/>
      </register-group>
    </module>
    <module caption="Digital-to-Analog Converter" name="DAC">
      <register-group caption="Digital-to-Analog Converter" name="DAC">
        <register caption="DAC Data Register High Byte" name="DACH" offset="0x59" size="1" ocd-rw="">
          <bitfield caption="DAC Data Register High Byte Bits" mask="0xFF" name="DACH"/>
        </register>
        <register caption="DAC Data Register Low Byte" name="DACL" offset="0x58" size="1" ocd-rw="">
          <bitfield caption="DAC Data Register Low Byte Bits" mask="0xFF" name="DACL"/>
        </register>
        <register caption="DAC Control Register" name="DACON" offset="0x76" size="1">
          <bitfield caption="DAC Auto Trigger Enable Bit" mask="0x80" name="DAATE"/>
          <bitfield caption="DAC Trigger Selection Bits" mask="0x70" name="DATS" values="ANALOG_DAC_AUTO_TRIGGER"/>
          <bitfield caption="DAC Left Adjust" mask="0x04" name="DALA"/>
          <bitfield caption="DAC Enable Bit" mask="0x01" name="DAEN"/>
        </register>
      </register-group>
      <value-group caption="" name="ANALOG_DAC_AUTO_TRIGGER">
        <value caption="Analog Comparator 0" name="VAL_0x00" value="0x00"/>
        <value caption="Analog Comparator 1" name="VAL_0x01" value="0x01"/>
        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="Serial Peripheral Interface" name="SPI">
      <register-group caption="Serial Peripheral Interface" name="SPI">
        <register caption="SPI Control Register" name="SPCR" offset="0x37" size="1">
          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
        </register>
        <register caption="SPI Status Register" name="SPSR" offset="0x38" size="1" ocd-rw="R">
          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
        </register>
        <register caption="SPI Data Register" name="SPDR" offset="0x56" size="1" mask="0xFF" ocd-rw=""/>
      </register-group>
      <value-group caption="" name="COMM_SCK_RATE_3BIT">
        <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
        <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
        <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
        <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
        <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
        <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
        <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
        <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="Watchdog Timer" name="WDT">
      <register-group caption="Watchdog Timer" name="WDT">
        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x82" size="1" ocd-rw="R">
          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
        </register>
      </register-group>
      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
      </value-group>
    </module>
    <module caption="External Interrupts" name="EXINT">
      <register-group caption="External Interrupts" name="EXINT">
        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x89" size="1">
          <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
        </register>
        <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x41" size="1">
          <bitfield caption="External Interrupt Request 2 Enable" mask="0x07" name="INT"/>
        </register>
        <register caption="External Interrupt Flag Register" name="EIFR" offset="0x40" size="1" ocd-rw="R">
          <bitfield caption="External Interrupt Flags" mask="0x07" name="INTF"/>
        </register>
      </register-group>
      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
      </value-group>
    </module>
    <module caption="Analog-to-Digital Converter" name="ADC">
      <register-group caption="Analog-to-Digital Converter" name="ADC">
        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x28" size="1">
          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF2"/>
          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x0F" name="MUX"/>
        </register>
        <register caption="The ADC Control and Status register" name="ADCSRA" offset="0x26" size="1" ocd-rw="R">
          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
          <bitfield caption="ADC Auto Trigger Enable" mask="0x20" name="ADATE"/>
          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS"/>
        </register>
        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x4C" size="2" mask="0xFFFF"/>
        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x27" size="1">
          <bitfield caption="ADC High Speed Mode" mask="0x80" name="ADHSM"/>
          <bitfield caption="ADC Noise Canceller Disable" mask="0x40" name="ADNCDIS"/>
          <bitfield caption="ADC Single Shot Enable on PSC's Synchronisation Signals" mask="0x10" name="ADSSEN"/>
          <bitfield caption="ADC Auto Trigger Sources" mask="0x0F" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER_4BITS"/>
        </register>
        <register caption="Digital Input Disable Register 0" name="DIDR0" offset="0x77" size="1">
          <bitfield caption="" mask="0x80" name="ADC7D"/>
          <bitfield caption="ADC7 Digital input Disable" mask="0x40" name="ADC6D"/>
          <bitfield caption="ADC5 Digital input Disable" mask="0x20" name="ADC5D"/>
          <bitfield caption="ADC4 Digital input Disable" mask="0x10" name="ADC4D"/>
          <bitfield caption="ADC3 Digital input Disable" mask="0x08" name="ADC3D"/>
          <bitfield caption="ADC2 Digital input Disable" mask="0x04" name="ADC2D"/>
          <bitfield caption="ADC1 Digital input Disable" mask="0x02" name="ADC1D"/>
          <bitfield caption="ADC0 Digital input Disable" mask="0x01" name="ADC0D"/>
        </register>
        <register caption="Digital Input Disable Register 0" name="DIDR1" offset="0x78" size="1">
          <bitfield caption="" mask="0x08" name="ACMP1MD"/>
          <bitfield caption="" mask="0x04" name="AMP0POSD"/>
          <bitfield caption="" mask="0x02" name="ADC10D"/>
          <bitfield caption="" mask="0x01" name="ADC9D"/>
        </register>
        <register caption="" name="AMP0CSR" offset="0x79" size="1">
          <bitfield caption="" mask="0x80" name="AMP0EN"/>
          <bitfield caption="" mask="0x40" name="AMP0IS"/>
          <bitfield caption="" mask="0x30" name="AMP0G"/>
          <bitfield caption="" mask="0x08" name="AMP0GS"/>
          <bitfield caption="" mask="0x03" name="AMP0TS"/>
        </register>
      </register-group>
      <value-group caption="" name="ANALOG_ADC_V_REF2">
        <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
        <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
        <value caption="Reserved" name="VAL_0x02" value="0x02"/>
        <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
      </value-group>
      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER_4BITS">
        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
        <value caption="PSC0ASY Event" name="VAL_0x08" value="0x08"/>
        <value caption="PSC1ASY Event" name="VAL_0x09" value="0x09"/>
        <value caption="PSC2ASY Event" name="VAL_0x0A" value="0x0A"/>
        <value caption="Analog comparator 1" name="VAL_0x0B" value="0x0B"/>
        <value caption="Analog comparator 2" name="VAL_0x0C" value="0x0C"/>
      </value-group>
    </module>
    <module caption="Analog Comparator" name="AC">
      <register-group caption="Analog Comparator" name="AC">
        <register caption="Analog Comparator3 Control Register" name="AC3CON" offset="0x7F" size="1">
          <bitfield caption="Analog Comparator3 Enable Bit" mask="0x80" name="AC3EN"/>
          <bitfield caption="Analog Comparator 3 Interrupt Enable Bit" mask="0x40" name="AC3IE"/>
          <bitfield caption="Analog Comparator 3  Interrupt Select Bit" mask="0x30" name="AC3IS"/>
          <bitfield caption="Analog Comparator 3 Alternate Output Enable" mask="0x08" name="AC3OEA"/>
          <bitfield caption="Analog Comparator 3 Multiplexer Register" mask="0x07" name="AC3M"/>
        </register>
        <register caption="Analog Comparator 1 Control Register" name="AC1CON" offset="0x7D" size="1">
          <bitfield caption="Analog Comparator 1 Enable Bit" mask="0x80" name="AC1EN"/>
          <bitfield caption="Analog Comparator 1 Interrupt Enable Bit" mask="0x40" name="AC1IE"/>
          <bitfield caption="Analog Comparator 1  Interrupt Select Bit" mask="0x30" name="AC1IS" values="ANALOG_COMP_INTERRUPT"/>
          <bitfield caption="Analog Comparator 1 Multiplexer Register" mask="0x07" name="AC1M"/>
        </register>
        <register caption="Analog Comparator 2 Control Register" name="AC2CON" offset="0x7E" size="1">
          <bitfield caption="Analog Comparator 2 Enable Bit" mask="0x80" name="AC2EN"/>
          <bitfield caption="Analog Comparator 2 Interrupt Enable Bit" mask="0x40" name="AC2IE"/>
          <bitfield caption="Analog Comparator 2  Interrupt Select Bit" mask="0x30" name="AC2IS" values="ANALOG_COMP_INTERRUPT"/>
          <bitfield caption="Analog Comparator 2 Multiplexer Register" mask="0x07" name="AC2M"/>
        </register>
        <register caption="Analog Comparator Status Register" name="ACSR" offset="0x20" size="1" ocd-rw="R">
          <bitfield caption="Analog Comparator 3 Interrupt Flag Bit" mask="0x80" name="AC3IF"/>
          <bitfield caption="Analog Comparator 2 Interrupt Flag Bit" mask="0x40" name="AC2IF"/>
          <bitfield caption="Analog Comparator 1  Interrupt Flag Bit" mask="0x20" name="AC1IF"/>
          <bitfield caption="Analog Comparator 3 Output Bit" mask="0x08" name="AC3O"/>
          <bitfield caption="Analog Comparator 2 Output Bit" mask="0x04" name="AC2O"/>
          <bitfield caption="Analog Comparator 1 Output Bit" mask="0x02" name="AC1O"/>
        </register>
        <register caption="" name="AC3ECON" offset="0x7C" size="1">
          <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC3OI"/>
          <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC3OE"/>
          <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC3H"/>
        </register>
        <register caption="" name="AC2ECON" offset="0x7B" size="1">
          <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC2OI"/>
          <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC2OE"/>
          <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC2H"/>
        </register>
        <register caption="" name="AC1ECON" offset="0x7A" size="1">
          <bitfield caption="Analog Comparator Ouput Invert" mask="0x20" name="AC1OI"/>
          <bitfield caption="Analog Comparator Ouput Enable" mask="0x10" name="AC1OE"/>
          <bitfield caption="Analog Comparator Interrupt Capture Enable" mask="0x08" name="AC1ICE"/>
          <bitfield caption="Analog Comparator Hysteresis Select" mask="0x07" name="AC1H"/>
        </register>
      </register-group>
      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
      </value-group>
    </module>
    <module caption="CPU Registers" name="CPU">
      <register-group caption="CPU Registers" name="CPU">
        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
        </register>
        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
          <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
          <bitfield caption="Reset Pin Disable" mask="0x08" name="RSTDIS"/>
          <bitfield caption="Frequency Selection of the Calibrated RC Oscillator" mask="0x04" name="CKRC81"/>
          <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
          <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
        </register>
        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1">
          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
        </register>
        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x88" size="1" mask="0xFF" ocd-rw="R">
          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
        </register>
        <register caption="" name="CLKPR" offset="0x83" size="1" ocd-rw="R">
          <bitfield caption="" mask="0x80" name="CLKPCE"/>
          <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
        </register>
        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
          <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS4"/>
          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
        </register>
        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x3B" size="1">
          <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
        </register>
        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x3A" size="1">
          <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
        </register>
        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x39" size="1">
          <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
          <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
          <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
          <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
          <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
          <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
          <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
          <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
        </register>
        <register caption="PLL Control And Status Register" name="PLLCSR" offset="0x87" size="1">
          <bitfield caption="" mask="0x3C" name="PLLF"/>
          <bitfield caption="PLL Enable" mask="0x02" name="PLLE"/>
          <bitfield caption="PLL Lock Detector" mask="0x01" name="PLOCK"/>
        </register>
        <register caption="Power Reduction Register" name="PRR" offset="0x86" size="1">
          <bitfield caption="Power Reduction PSC2" mask="0x80" name="PRPSC2"/>
          <bitfield caption="Power Reduction PSC0" mask="0x20" name="PRPSCR"/>
          <bitfield caption="Power Reduction Timer/Counter1" mask="0x10" name="PRTIM1"/>
          <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
        </register>
        <register caption="" name="CLKCSR" offset="0x84" size="1">
          <bitfield caption="Clock Control Change Enable" mask="0x80" name="CLKCCE"/>
          <bitfield caption="Clock Ready Flag" mask="0x10" name="CLKRDY"/>
          <bitfield caption="Clock Control" mask="0x0F" name="CLKC"/>
        </register>
        <register caption="" name="CLKSELR" offset="0x85" size="1">
          <bitfield caption="Clock OUT" mask="0x40" name="COUT"/>
          <bitfield caption="Clock Start up Time" mask="0x30" name="CSUT"/>
          <bitfield caption="Clock Source Select" mask="0x0F" name="CKSEL"/>
        </register>
        <register caption="BandGap Current Calibration Register" name="BGCCR" offset="0x81" size="1">
          <bitfield caption="" mask="0x0F" name="BGCC"/>
        </register>
        <register caption="BandGap Resistor Calibration Register" name="BGCRR" offset="0x80" size="1">
          <bitfield caption="" mask="0x0F" name="BGCR"/>
        </register>
      </register-group>
      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
        <value caption="1" name="VAL_0x00" value="0x00"/>
        <value caption="2" name="VAL_0x01" value="0x01"/>
        <value caption="4" name="VAL_0x02" value="0x02"/>
        <value caption="8" name="VAL_0x03" value="0x03"/>
        <value caption="16" name="VAL_0x04" value="0x04"/>
        <value caption="32" name="VAL_0x05" value="0x05"/>
        <value caption="64" name="VAL_0x06" value="0x06"/>
        <value caption="128" name="VAL_0x07" value="0x07"/>
        <value caption="256" name="VAL_0x08" value="0x08"/>
      </value-group>
      <value-group caption="" name="CPU_SLEEP_MODE_3BITS4">
        <value caption="Idle" name="IDLE" value="0x00"/>
        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
        <value caption="Power Down" name="PDOWN" value="0x02"/>
        <value caption="Reserved" name="VAL_0x03" value="0x03"/>
        <value caption="Reserved" name="VAL_0x04" value="0x04"/>
        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
        <value caption="Standby" name="STDBY" value="0x06"/>
        <value caption="Reserved" name="VAL_0x07" value="0x07"/>
      </value-group>
      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
        <value value="0x00" caption="2.0 MHz" name="2_0_MHz"/>
        <value value="0x01" caption="8.0 MHz" name="8_0_MHz"/>
      </value-group>
      <parameters>
        <param name="CORE_VERSION" value="V2E"/>
      </parameters>
    </module>
    <module caption="EEPROM" name="EEPROM">
      <register-group caption="EEPROM" name="EEPROM">
        <register caption="EEPROM Read/Write Access  Bytes" name="EEAR" offset="0x3E" size="2" mask="0x01FF"/>
        <register caption="EEPROM Data Register" name="EEDR" offset="0x3D" size="1" mask="0xFF"/>
        <register caption="EEPROM Control Register" name="EECR" offset="0x3C" size="1">
          <bitfield caption="None Volatile Busy Memory Busy" mask="0x80" name="NVMBSY"/>
          <bitfield caption="EEPROM Page Access" mask="0x40" name="EEPAGE"/>
          <bitfield caption="EEPROM Programming Mode" mask="0x30" name="EEPM"/>
          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMWE"/>
          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEWE"/>
          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
        </register>
      </register-group>
    </module>
    <module caption="Power Stage Controller" name="PSC">
      <register-group caption="Power Stage Controller" name="PSC0">
        <register caption="PSC 0 Input Capture Register " name="PICR0" offset="0x68" size="2" mask="0x8FFF"/>
        <register caption="PSC 0 Input B Control" name="PFRC0B" offset="0x63" size="1">
          <bitfield caption="PSC 0 Capture Enable Input Part B" mask="0x80" name="PCAE0B"/>
          <bitfield caption="PSC 0 Input Select for Part B" mask="0x40" name="PISEL0B"/>
          <bitfield caption="PSC 0 Edge Level Selector on Input Part B" mask="0x20" name="PELEV0B"/>
          <bitfield caption="PSC 0 Filter Enable on Input Part B" mask="0x10" name="PFLTE0B"/>
          <bitfield caption="PSC 0 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM0B"/>
        </register>
        <register caption="PSC 0 Input A Control" name="PFRC0A" offset="0x62" size="1">
          <bitfield caption="PSC 0 Capture Enable Input Part A" mask="0x80" name="PCAE0A"/>
          <bitfield caption="PSC 0 Input Select for Part A" mask="0x40" name="PISEL0A"/>
          <bitfield caption="PSC 0 Edge Level Selector on Input Part A" mask="0x20" name="PELEV0A"/>
          <bitfield caption="PSC 0 Filter Enable on Input Part A" mask="0x10" name="PFLTE0A"/>
          <bitfield caption="PSC 0 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM0A"/>
        </register>
        <register caption="PSC 0 Control Register" name="PCTL0" offset="0x32" size="1">
          <bitfield caption="PSC 0 Prescaler Selects" mask="0xC0" name="PPRE0"/>
          <bitfield caption="PSC 0 Balance Flank Width Modulation" mask="0x24" name="PBFM0"/>
          <bitfield caption="PSC 0 Asynchronous Output Control B" mask="0x10" name="PAOC0B"/>
          <bitfield caption="PSC 0 Asynchronous Output Control A" mask="0x08" name="PAOC0A"/>
          <bitfield caption="PSC0 Complete Cycle" mask="0x02" name="PCCYC0"/>
          <bitfield caption="PSC 0 Run" mask="0x01" name="PRUN0"/>
        </register>
        <register caption="PSC 0 Configuration Register" name="PCNF0" offset="0x31" size="1">
          <bitfield caption="PSC 0 Fifty" mask="0x80" name="PFIFTY0"/>
          <bitfield caption="PSC 0 Autolock" mask="0x40" name="PALOCK0"/>
          <bitfield caption="PSC 0 Lock" mask="0x20" name="PLOCK0"/>
          <bitfield caption="PSC 0 Mode" mask="0x18" name="PMODE0"/>
          <bitfield caption="PSC 0 Output Polarity" mask="0x04" name="POP0"/>
          <bitfield caption="PSC 0 Input Clock Select" mask="0x02" name="PCLKSEL0"/>
        </register>
        <register caption="Output Compare RB Register " name="OCR0RB" offset="0x44" size="2" mask="0xFFFF"/>
        <register caption="Output Compare SB Register " name="OCR0SB" offset="0x42" size="2" mask="0x0FFF"/>
        <register caption="Output Compare RA Register " name="OCR0RA" offset="0x4A" size="2" mask="0x0FFF"/>
        <register caption="Output Compare SA Register " name="OCR0SA" offset="0x60" size="2" mask="0x0FFF"/>
        <register caption="PSC0 Synchro and Output Configuration" name="PSOC0" offset="0x6A" size="1">
          <bitfield caption="PSC Input Select" mask="0x80" name="PISEL0A1"/>
          <bitfield caption="PSC Input Select" mask="0x40" name="PISEL0B1"/>
          <bitfield caption="Synchronisation out for ADC selection" mask="0x30" name="PSYNC0"/>
          <bitfield caption="PSCOUT01 Output Enable" mask="0x04" name="POEN0B"/>
          <bitfield caption="PSCOUT00 Output Enable" mask="0x01" name="POEN0A"/>
        </register>
        <register caption="PSC0 Interrupt Mask Register" name="PIM0" offset="0x2F" size="1">
          <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE0B"/>
          <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE0A"/>
          <bitfield caption="End of Enhanced Cycle Enable" mask="0x02" name="PEOEPE0"/>
          <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE0"/>
        </register>
        <register caption="PSC0 Interrupt Flag Register" name="PIFR0" offset="0x30" size="1">
          <bitfield caption="PSC 0 Output A Activity" mask="0x80" name="POAC0B"/>
          <bitfield caption="PSC 0 Output A Activity" mask="0x40" name="POAC0A"/>
          <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV0B"/>
          <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV0A"/>
          <bitfield caption="Ramp Number" mask="0x06" name="PRN0"/>
          <bitfield caption="End of PSC0 Interrupt" mask="0x01" name="PEOP0"/>
        </register>
      </register-group>
      <register-group caption="Power Stage Controller" name="PSC2">
        <register caption="PSC 2 Input Capture Register High" name="PICR2H" offset="0x6D" size="1">
          <bitfield caption="PSC 2 Capture Software Trigger Bit" mask="0x80" name="PCST2"/>
          <bitfield caption="" mask="0x0C" name="PICR21"/>
          <bitfield caption="" mask="0x03" name="PICR2" lsb="8"/>
        </register>
        <register caption="PSC 2 Input Capture Register Low" name="PICR2L" offset="0x6C" size="1" mask="0xFF" ocd-rw="R"/>
        <register caption="PSC 2 Input B Control" name="PFRC2B" offset="0x67" size="1">
          <bitfield caption="PSC 2 Capture Enable Input Part B" mask="0x80" name="PCAE2B"/>
          <bitfield caption="PSC 2 Input Select for Part B" mask="0x40" name="PISEL2B"/>
          <bitfield caption="PSC 2 Edge Level Selector on Input Part B" mask="0x20" name="PELEV2B"/>
          <bitfield caption="PSC 2 Filter Enable on Input Part B" mask="0x10" name="PFLTE2B"/>
          <bitfield caption="PSC 2 Retrigger and Fault Mode for Part B" mask="0x0F" name="PRFM2B"/>
        </register>
        <register caption="PSC 2 Input B Control" name="PFRC2A" offset="0x66" size="1">
          <bitfield caption="PSC 2 Capture Enable Input Part A" mask="0x80" name="PCAE2A"/>
          <bitfield caption="PSC 2 Input Select for Part A" mask="0x40" name="PISEL2A"/>
          <bitfield caption="PSC 2 Edge Level Selector on Input Part A" mask="0x20" name="PELEV2A"/>
          <bitfield caption="PSC 2 Filter Enable on Input Part A" mask="0x10" name="PFLTE2A"/>
          <bitfield caption="PSC 2 Retrigger and Fault Mode for Part A" mask="0x0F" name="PRFM2A"/>
        </register>
        <register caption="PSC 2 Control Register" name="PCTL2" offset="0x36" size="1">
          <bitfield caption="PSC 2 Prescaler Selects" mask="0xC0" name="PPRE2"/>
          <bitfield caption="Balance Flank Width Modulation" mask="0x20" name="PBFM2"/>
          <bitfield caption="PSC 2 Asynchronous Output Control B" mask="0x10" name="PAOC2B"/>
          <bitfield caption="PSC 2 Asynchronous Output Control A" mask="0x08" name="PAOC2A"/>
          <bitfield caption="PSC2 Auto Run" mask="0x04" name="PARUN2"/>
          <bitfield caption="PSC2 Complete Cycle" mask="0x02" name="PCCYC2"/>
          <bitfield caption="PSC 2 Run" mask="0x01" name="PRUN2"/>
        </register>
        <register caption="PSC 2 Configuration Register" name="PCNF2" offset="0x35" size="1">
          <bitfield caption="PSC 2 Fifty" mask="0x80" name="PFIFTY2"/>
          <bitfield caption="PSC 2 Autolock" mask="0x40" name="PALOCK2"/>
          <bitfield caption="PSC 2 Lock" mask="0x20" name="PLOCK2"/>
          <bitfield caption="PSC 2 Mode" mask="0x18" name="PMODE2"/>
          <bitfield caption="PSC 2 Output Polarity" mask="0x04" name="POP2"/>
          <bitfield caption="PSC 2 Input Clock Select" mask="0x02" name="PCLKSEL2"/>
          <bitfield caption="PSC 2 Output Matrix Enable" mask="0x01" name="POME2"/>
        </register>
        <register caption="PSC 2 Enhanced Configuration Register" name="PCNFE2" offset="0x70" size="1">
          <bitfield caption="" mask="0xE0" name="PASDLK2"/>
          <bitfield caption="" mask="0x10" name="PBFM21"/>
          <bitfield caption="" mask="0x08" name="PELEV2A1"/>
          <bitfield caption="" mask="0x04" name="PELEV2B1"/>
          <bitfield caption="" mask="0x02" name="PISEL2A1"/>
          <bitfield caption="" mask="0x01" name="PISEL2B1"/>
        </register>
        <register caption="Output Compare RB Register " name="OCR2RB" offset="0x48" size="2" mask="0xFFFF"/>
        <register caption="Output Compare SB Register " name="OCR2SB" offset="0x46" size="2" mask="0x0FFF"/>
        <register caption="Output Compare RA Register " name="OCR2RA" offset="0x4E" size="2" mask="0x0FFF"/>
        <register caption="Output Compare SA Register " name="OCR2SA" offset="0x64" size="2" mask="0x0FFF"/>
        <register caption="PSC 2 Output Matrix" name="POM2" offset="0x6F" size="1">
          <bitfield caption="Output Matrix Output B Ramps" mask="0xF0" name="POMV2B"/>
          <bitfield caption="Output Matrix Output A Ramps" mask="0x0F" name="POMV2A"/>
        </register>
        <register caption="PSC2 Synchro and Output Configuration" name="PSOC2" offset="0x6E" size="1">
          <bitfield caption="PSC 2 Output 23 Select" mask="0xC0" name="POS2" lsb="2"/>
          <bitfield caption="Synchronization Out for ADC Selection" mask="0x30" name="PSYNC2"/>
          <bitfield caption="PSCOUT23 Output Enable" mask="0x08" name="POEN2D"/>
          <bitfield caption="PSCOUT21 Output Enable" mask="0x04" name="POEN2B"/>
          <bitfield caption="PSCOUT22 Output Enable" mask="0x02" name="POEN2C"/>
          <bitfield caption="PSCOUT20 Output Enable" mask="0x01" name="POEN2A"/>
        </register>
        <register caption="PSC2 Interrupt Mask Register" name="PIM2" offset="0x33" size="1">
          <bitfield caption="PSC 2 Synchro Error Interrupt Enable" mask="0x20" name="PSEIE2"/>
          <bitfield caption="External Event B Interrupt Enable" mask="0x10" name="PEVE2B"/>
          <bitfield caption="External Event A Interrupt Enable" mask="0x08" name="PEVE2A"/>
          <bitfield caption="End of Enhanced Cycle Interrupt Enable" mask="0x02" name="PEOEPE2"/>
          <bitfield caption="End of Cycle Interrupt Enable" mask="0x01" name="PEOPE2"/>
        </register>
        <register caption="PSC2 Interrupt Flag Register" name="PIFR2" offset="0x34" size="1">
          <bitfield caption="PSC 2 Output A Activity" mask="0x80" name="POAC2B"/>
          <bitfield caption="PSC 2 Output A Activity" mask="0x40" name="POAC2A"/>
          <bitfield caption="PSC 2 Synchro Error Interrupt" mask="0x20" name="PSEI2"/>
          <bitfield caption="External Event B Interrupt" mask="0x10" name="PEV2B"/>
          <bitfield caption="External Event A Interrupt" mask="0x08" name="PEV2A"/>
          <bitfield caption="Ramp Number" mask="0x06" name="PRN2"/>
          <bitfield caption="End of PSC2 Interrupt" mask="0x01" name="PEOP2"/>
        </register>
        <register caption="Analog Synchronization Delay Register" name="PASDLY2" offset="0x71" size="1" mask="0xFF"/>
      </register-group>
    </module>
    <module caption="Timer/Counter, 16-bit" name="TC16">
      <register-group caption="Timer/Counter, 16-bit" name="TC1">
        <register caption="Timer/Counter Interrupt Mask Register" name="TIMSK1" offset="0x21" size="1">
          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
        </register>
        <register caption="Timer/Counter Interrupt Flag register" name="TIFR1" offset="0x22" size="1" ocd-rw="R">
          <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
        </register>
        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x8A" size="1">
          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
          <bitfield caption="Waveform Generation Mode" mask="0x10" name="WGM13"/>
          <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
        </register>
        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x5A" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x8C" size="2" mask="0xFFFF"/>
      </register-group>
      <value-group caption="" name="CLK_SEL_3BIT_EXT">
        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
        <value caption="Running, ExtClk Tx Falling Edge" name="VAL_0x06" value="0x06"/>
        <value caption="Running, ExtClk Tx Rising Edge" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="Bootloader" name="BOOT_LOAD">
      <register-group caption="Bootloader" name="BOOT_LOAD">
        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
          <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
          <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
          <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
          <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
          <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
        </register>
      </register-group>
    </module>
  </modules>
</avr-tools-device-file>
