<?xml version="1.0" encoding="UTF-8"?>
<avr-tools-device-file xmlns:xalan="http://xml.apache.org/xalan" xmlns:NumHelper="NumHelper" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" schema-version="0.3" xsi:noNamespaceSchemaLocation="../../schema/avr_tools_device_file.xsd">
  <variants>
      <variant ordercode="ATmega1280V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="TQFP100" pinout="TQFP"/>
      <variant ordercode="ATmega1280V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5" package="CBGA100" pinout="CBGA"/>
      <variant ordercode="ATmega1280-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="TQFP100" pinout="TQFP"/>
      <variant ordercode="ATmega1280-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5" package="CBGA100" pinout="CBGA"/>
  </variants>
  <devices>
    <device name="ATmega1280" architecture="AVR8" family="megaAVR">
      <address-spaces>
        <address-space endianness="little" name="prog" id="prog" start="0x0000" size="0x20000">
          <memory-segment start="0x0000" size="0x20000" type="flash" rw="RW" exec="1" name="FLASH" pagesize="0x100"/>
          <memory-segment start="0x1fc00" size="0x0400" type="flash" rw="RW" exec="1" name="BOOT_SECTION_1" pagesize="0x100"/>
          <memory-segment start="0x1f800" size="0x0800" type="flash" rw="RW" exec="1" name="BOOT_SECTION_2" pagesize="0x100"/>
          <memory-segment start="0x1f000" size="0x1000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_3" pagesize="0x100"/>
          <memory-segment start="0x1e000" size="0x2000" type="flash" rw="RW" exec="1" name="BOOT_SECTION_4" pagesize="0x100"/>
        </address-space>
        <address-space endianness="little" name="signatures" id="signatures" start="0" size="3">
          <memory-segment start="0" size="3" type="signatures" rw="R" exec="0" name="SIGNATURES"/>
        </address-space>
        <address-space endianness="little" name="fuses" id="fuses" start="0" size="0x0003">
          <memory-segment start="0" size="0x0003" type="fuses" rw="RW" exec="0" name="FUSES"/>
        </address-space>
        <address-space endianness="little" name="lockbits" id="lockbits" start="0" size="0x0001">
          <memory-segment start="0" size="0x0001" type="lockbits" rw="RW" exec="0" name="LOCKBITS"/>
        </address-space>
        <address-space endianness="little" name="data" id="data" start="0x0000" size="0x10000">
          <memory-segment external="false" type="regs" size="0x0020" start="0x0000" name="REGISTERS"/>
          <memory-segment name="MAPPED_IO" start="0x0020" size="0x01e0" type="io" external="false"/>
          <memory-segment name="IRAM" start="0x0200" size="0x2000" type="ram" external="false"/>
          <memory-segment name="XRAM" start="0x2200" size="0xde00" type="ram" external="true"/>
        </address-space>
        <address-space endianness="little" name="eeprom" id="eeprom" start="0x0000" size="0x1000">
          <memory-segment start="0x0000" size="0x1000" type="eeprom" rw="RW" exec="0" name="EEPROM" pagesize="0x08"/>
        </address-space>
        <address-space size="0x40" start="0x00" endianness="little" name="io" id="io"/>
        <address-space endianness="little" name="osccal" id="osccal" start="0" size="1">
          <memory-segment start="0" size="1" type="osccal" rw="R" exec="0" name="OSCCAL"/>
        </address-space>
      </address-spaces>
      <peripherals>
        <module name="AC">
          <instance name="AC" caption="Analog Comparator">
            <register-group name="AC" name-in-module="AC" offset="0x00" address-space="data" caption="Analog Comparator"/>
            <signals>
              <signal group="AIN" index="0" function="default" pad="PE2"/>
              <signal group="AIN" index="1" function="default" pad="PE3"/>
            </signals>
          </instance>
        </module>
        <module name="USART">
          <instance name="USART0" caption="USART">
            <register-group name="USART0" name-in-module="USART0" offset="0x00" address-space="data" caption="USART"/>
            <signals>
              <signal group="TXD" function="default" pad="PE1"/>
              <signal group="RXD" function="default" pad="PE0"/>
              <signal group="XCK" function="default" pad="PE2"/>
            </signals>
          </instance>
          <instance name="USART1" caption="USART">
            <register-group name="USART1" name-in-module="USART1" offset="0x00" address-space="data" caption="USART"/>
            <signals>
              <signal group="TXD" function="default" pad="PD3"/>
              <signal group="RXD" function="default" pad="PD2"/>
              <signal group="XCK" function="default" pad="PD5"/>
            </signals>
          </instance>
          <instance name="USART2" caption="USART">
            <register-group name="USART2" name-in-module="USART2" offset="0x00" address-space="data" caption="USART"/>
            <signals>
              <signal group="XCK" pad="PH2" function="default"/>
              <signal group="TXD" pad="PH1" function="default"/>
              <signal group="RXD" pad="PH0" function="default"/>
            </signals>
          </instance>
          <instance name="USART3" caption="USART">
            <register-group name="USART3" name-in-module="USART3" offset="0x00" address-space="data" caption="USART"/>
            <signals>
              <signal group="XCK" pad="PJ2" function="default"/>
              <signal group="TXD" pad="PJ1" function="default"/>
              <signal group="RXD" pad="PJ0" function="default"/>
            </signals>
          </instance>
        </module>
        <module name="TWI">
          <instance name="TWI" caption="Two Wire Serial Interface">
            <register-group name="TWI" name-in-module="TWI" offset="0x00" address-space="data" caption="Two Wire Serial Interface"/>
            <signals>
              <signal group="SDA" function="default" pad="PD1"/>
              <signal group="SCL" function="default" pad="PD0"/>
            </signals>
          </instance>
        </module>
        <module name="SPI">
          <instance name="SPI" caption="Serial Peripheral Interface">
            <register-group name="SPI" name-in-module="SPI" offset="0x00" address-space="data" caption="Serial Peripheral Interface"/>
            <signals>
              <signal group="SS" function="default" pad="PB0"/>
              <signal group="MOSI" function="default" pad="PB2"/>
              <signal group="MISO" function="default" pad="PB3"/>
              <signal group="SCK" function="default" pad="PB1"/>
            </signals>
          </instance>
        </module>
        <module name="PORT">
          <instance name="PORTA" caption="I/O Port">
            <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PA0" index="0"/>
              <signal group="P" function="default" pad="PA1" index="1"/>
              <signal group="P" function="default" pad="PA2" index="2"/>
              <signal group="P" function="default" pad="PA3" index="3"/>
              <signal group="P" function="default" pad="PA4" index="4"/>
              <signal group="P" function="default" pad="PA5" index="5"/>
              <signal group="P" function="default" pad="PA6" index="6"/>
              <signal group="P" function="default" pad="PA7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTB" caption="I/O Port">
            <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PB0" index="0"/>
              <signal group="P" function="default" pad="PB1" index="1"/>
              <signal group="P" function="default" pad="PB2" index="2"/>
              <signal group="P" function="default" pad="PB3" index="3"/>
              <signal group="P" function="default" pad="PB4" index="4"/>
              <signal group="P" function="default" pad="PB5" index="5"/>
              <signal group="P" function="default" pad="PB6" index="6"/>
              <signal group="P" function="default" pad="PB7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTC" caption="I/O Port">
            <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PC0" index="0"/>
              <signal group="P" function="default" pad="PC1" index="1"/>
              <signal group="P" function="default" pad="PC2" index="2"/>
              <signal group="P" function="default" pad="PC3" index="3"/>
              <signal group="P" function="default" pad="PC4" index="4"/>
              <signal group="P" function="default" pad="PC5" index="5"/>
              <signal group="P" function="default" pad="PC6" index="6"/>
              <signal group="P" function="default" pad="PC7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTD" caption="I/O Port">
            <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PD0" index="0"/>
              <signal group="P" function="default" pad="PD1" index="1"/>
              <signal group="P" function="default" pad="PD2" index="2"/>
              <signal group="P" function="default" pad="PD3" index="3"/>
              <signal group="P" function="default" pad="PD4" index="4"/>
              <signal group="P" function="default" pad="PD5" index="5"/>
              <signal group="P" function="default" pad="PD6" index="6"/>
              <signal group="P" function="default" pad="PD7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTE" caption="I/O Port">
            <register-group name="PORTE" name-in-module="PORTE" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PE0" index="0"/>
              <signal group="P" function="default" pad="PE1" index="1"/>
              <signal group="P" function="default" pad="PE2" index="2"/>
              <signal group="P" function="default" pad="PE3" index="3"/>
              <signal group="P" function="default" pad="PE4" index="4"/>
              <signal group="P" function="default" pad="PE5" index="5"/>
              <signal group="P" function="default" pad="PE6" index="6"/>
              <signal group="P" function="default" pad="PE7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTF" caption="I/O Port">
            <register-group name="PORTF" name-in-module="PORTF" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PF0" index="0"/>
              <signal group="P" function="default" pad="PF1" index="1"/>
              <signal group="P" function="default" pad="PF2" index="2"/>
              <signal group="P" function="default" pad="PF3" index="3"/>
              <signal group="P" function="default" pad="PF4" index="4"/>
              <signal group="P" function="default" pad="PF5" index="5"/>
              <signal group="P" function="default" pad="PF6" index="6"/>
              <signal group="P" function="default" pad="PF7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTG" caption="I/O Port">
            <register-group name="PORTG" name-in-module="PORTG" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PG0" index="0"/>
              <signal group="P" function="default" pad="PG1" index="1"/>
              <signal group="P" function="default" pad="PG2" index="2"/>
              <signal group="P" function="default" pad="PG3" index="3"/>
              <signal group="P" function="default" pad="PG4" index="4"/>
              <signal group="P" function="default" pad="PG5" index="5"/>
              <signal group="P" function="default" pad="PG6" index="6"/>
              <signal group="P" function="default" pad="PG7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTH" caption="I/O Port">
            <register-group name="PORTH" name-in-module="PORTH" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PH0" index="0"/>
              <signal group="P" function="default" pad="PH1" index="1"/>
              <signal group="P" function="default" pad="PH2" index="2"/>
              <signal group="P" function="default" pad="PH3" index="3"/>
              <signal group="P" function="default" pad="PH4" index="4"/>
              <signal group="P" function="default" pad="PH5" index="5"/>
              <signal group="P" function="default" pad="PH6" index="6"/>
              <signal group="P" function="default" pad="PH7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTJ" caption="I/O Port">
            <register-group name="PORTJ" name-in-module="PORTJ" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PJ0" index="0"/>
              <signal group="P" function="default" pad="PJ1" index="1"/>
              <signal group="P" function="default" pad="PJ2" index="2"/>
              <signal group="P" function="default" pad="PJ3" index="3"/>
              <signal group="P" function="default" pad="PJ4" index="4"/>
              <signal group="P" function="default" pad="PJ5" index="5"/>
              <signal group="P" function="default" pad="PJ6" index="6"/>
              <signal group="P" function="default" pad="PJ7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTK" caption="I/O Port">
            <register-group name="PORTK" name-in-module="PORTK" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PK0" index="0"/>
              <signal group="P" function="default" pad="PK1" index="1"/>
              <signal group="P" function="default" pad="PK2" index="2"/>
              <signal group="P" function="default" pad="PK3" index="3"/>
              <signal group="P" function="default" pad="PK4" index="4"/>
              <signal group="P" function="default" pad="PK5" index="5"/>
              <signal group="P" function="default" pad="PK6" index="6"/>
              <signal group="P" function="default" pad="PK7" index="7"/>
            </signals>
          </instance>
          <instance name="PORTL" caption="I/O Port">
            <register-group name="PORTL" name-in-module="PORTL" offset="0x00" address-space="data" caption="I/O Port"/>
            <signals>
              <signal group="P" function="default" pad="PL0" index="0"/>
              <signal group="P" function="default" pad="PL1" index="1"/>
              <signal group="P" function="default" pad="PL2" index="2"/>
              <signal group="P" function="default" pad="PL3" index="3"/>
              <signal group="P" function="default" pad="PL4" index="4"/>
              <signal group="P" function="default" pad="PL5" index="5"/>
              <signal group="P" function="default" pad="PL6" index="6"/>
              <signal group="P" function="default" pad="PL7" index="7"/>
            </signals>
          </instance>
        </module>
        <module name="TC8">
          <instance name="TC0" caption="Timer/Counter, 8-bit">
            <register-group name="TC0" name-in-module="TC0" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit"/>
            <signals>
              <signal group="T" function="default" pad="PD7"/>
              <signal group="OCB" function="default" pad="PG5"/>
              <signal group="OCA" function="default" pad="PB7"/>
            </signals>
          </instance>
        </module>
        <module name="TC8_ASYNC">
          <instance name="TC2" caption="Timer/Counter, 8-bit Async">
            <register-group name="TC2" name-in-module="TC2" offset="0x00" address-space="data" caption="Timer/Counter, 8-bit Async"/>
            <signals>
              <signal group="TOSC" index="1" function="default" pad="PG4"/>
              <signal group="TOSC" index="2" function="default" pad="PG3"/>
              <signal group="OCB" function="default" pad="PH6"/>
              <signal group="OCA" function="default" pad="PB4"/>
            </signals>
          </instance>
        </module>
        <module name="WDT">
          <instance name="WDT" caption="Watchdog Timer">
            <register-group name="WDT" name-in-module="WDT" offset="0x00" address-space="data" caption="Watchdog Timer"/>
          </instance>
        </module>
        <module name="EEPROM">
          <instance name="EEPROM" caption="EEPROM">
            <register-group name="EEPROM" name-in-module="EEPROM" offset="0x00" address-space="data" caption="EEPROM"/>
          </instance>
        </module>
        <module name="TC16">
          <instance name="TC5" caption="Timer/Counter, 16-bit">
            <register-group name="TC5" name-in-module="TC5" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
            <signals>
              <signal group="OCC" pad="PL5" function="default"/>
              <signal group="OCB" pad="PL4" function="default"/>
              <signal group="OCA" pad="PL3" function="default"/>
              <signal group="T" pad="PL2" function="default"/>
              <signal group="ICP" pad="PL1" function="default"/>
            </signals>
          </instance>
          <instance name="TC4" caption="Timer/Counter, 16-bit">
            <register-group name="TC4" name-in-module="TC4" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
            <signals>
              <signal group="T" pad="PH7" function="default"/>
              <signal group="OCC" pad="PH5" function="default"/>
              <signal group="OCB" pad="PH4" function="default"/>
              <signal group="OCA" pad="PH3" function="default"/>
              <signal group="ICP" pad="PL0" function="default"/>
            </signals>
          </instance>
          <instance name="TC3" caption="Timer/Counter, 16-bit">
            <register-group name="TC3" name-in-module="TC3" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
            <signals>
              <signal group="T" function="default" pad="PE6"/>
              <signal group="ICP" function="default" pad="PE7"/>
              <signal group="OCA" function="default" pad="PE3"/>
              <signal group="OCB" function="default" pad="PE4"/>
              <signal group="OCC" function="default" pad="PE5"/>
            </signals>
          </instance>
          <instance name="TC1" caption="Timer/Counter, 16-bit">
            <register-group name="TC1" name-in-module="TC1" offset="0x00" address-space="data" caption="Timer/Counter, 16-bit"/>
            <signals>
              <signal group="T" function="default" pad="PD6"/>
              <signal group="ICP" function="default" pad="PD4"/>
              <signal group="OCA" function="default" pad="PB5"/>
              <signal group="OCB" function="default" pad="PB6"/>
              <signal group="OCC" function="default" pad="PB7"/>
            </signals>
          </instance>
        </module>
        <module name="JTAG">
          <instance name="JTAG" caption="JTAG Interface">
            <register-group name="JTAG" name-in-module="JTAG" offset="0x00" address-space="data" caption="JTAG Interface"/>
            <signals>
              <signal group="TCK" function="default" pad="PF4"/>
              <signal group="TMS" function="default" pad="PF5"/>
              <signal group="TDO" function="default" pad="PF6"/>
              <signal group="TDI" function="default" pad="PF7"/>
            </signals>
          </instance>
        </module>
        <module name="EXINT">
          <instance name="EXINT" caption="External Interrupts">
            <register-group name="EXINT" name-in-module="EXINT" offset="0x00" address-space="data" caption="External Interrupts"/>
            <signals>
              <signal group="PCINT" index="0" function="default" pad="PB0"/>
              <signal group="PCINT" index="1" function="default" pad="PB1"/>
              <signal group="PCINT" index="2" function="default" pad="PB2"/>
              <signal group="PCINT" index="3" function="default" pad="PB3"/>
              <signal group="PCINT" index="4" function="default" pad="PB4"/>
              <signal group="PCINT" index="5" function="default" pad="PB5"/>
              <signal group="PCINT" index="6" function="default" pad="PB6"/>
              <signal group="PCINT" index="7" function="default" pad="PB7"/>
              <signal group="PCINT" index="8" function="default" pad="PE0"/>
              <signal group="PCINT" index="9" function="default" pad="PJ0"/>
              <signal group="PCINT" index="10" function="default" pad="PJ1"/>
              <signal group="PCINT" index="11" function="default" pad="PJ2"/>
              <signal group="PCINT" index="12" function="default" pad="PJ3"/>
              <signal group="PCINT" index="13" function="default" pad="PJ4"/>
              <signal group="PCINT" index="14" function="default" pad="PJ5"/>
              <signal group="PCINT" index="15" function="default" pad="PJ6"/>
              <signal group="PCINT" index="16" function="default" pad="PK0"/>
              <signal group="PCINT" index="17" function="default" pad="PK1"/>
              <signal group="PCINT" index="18" function="default" pad="PK2"/>
              <signal group="PCINT" index="19" function="default" pad="PK3"/>
              <signal group="PCINT" index="20" function="default" pad="PK4"/>
              <signal group="PCINT" index="21" function="default" pad="PK5"/>
              <signal group="PCINT" index="22" function="default" pad="PK6"/>
              <signal group="PCINT" index="23" function="default" pad="PK7"/>
              <signal group="INT" index="0" function="default" pad="PD0"/>
              <signal group="INT" index="1" function="default" pad="PD1"/>
              <signal group="INT" index="2" function="default" pad="PD2"/>
              <signal group="INT" index="3" function="default" pad="PD3"/>
              <signal group="INT" index="4" function="default" pad="PE4"/>
              <signal group="INT" index="5" function="default" pad="PE5"/>
              <signal group="INT" index="6" function="default" pad="PE6"/>
              <signal group="INT" index="7" function="default" pad="PE7"/>
            </signals>
          </instance>
        </module>
        <module name="CPU">
          <instance name="CPU" caption="CPU Registers">
            <register-group name="CPU" name-in-module="CPU" offset="0x00" address-space="data" caption="CPU Registers"/>
            <signals>
              <signal group="CLKO" index="0" function="default" pad="PE7"/>
            </signals>
          </instance>
        </module>
        <module name="ADC">
          <instance name="ADC" caption="Analog-to-Digital Converter">
            <register-group name="ADC" name-in-module="ADC" offset="0x00" address-space="data" caption="Analog-to-Digital Converter"/>
            <signals>
              <signal group="ADC" index="0" function="default" pad="PF0"/>
              <signal group="ADC" index="1" function="default" pad="PF1"/>
              <signal group="ADC" index="2" function="default" pad="PF2"/>
              <signal group="ADC" index="3" function="default" pad="PF3"/>
              <signal group="ADC" index="4" function="default" pad="PF4"/>
              <signal group="ADC" index="5" function="default" pad="PF5"/>
              <signal group="ADC" index="6" function="default" pad="PF6"/>
              <signal group="ADC" index="7" function="default" pad="PF7"/>
              <signal group="ADC" index="8" function="default" pad="PK0"/>
              <signal group="ADC" index="9" function="default" pad="PK1"/>
              <signal group="ADC" index="10" function="default" pad="PK2"/>
              <signal group="ADC" index="11" function="default" pad="PK3"/>
              <signal group="ADC" index="12" function="default" pad="PK4"/>
              <signal group="ADC" index="13" function="default" pad="PK5"/>
              <signal group="ADC" index="14" function="default" pad="PK6"/>
              <signal group="ADC" index="15" function="default" pad="PK7"/>
            </signals>
          </instance>
        </module>
        <module name="BOOT_LOAD">
          <instance name="BOOT_LOAD" caption="Bootloader">
            <register-group name="BOOT_LOAD" name-in-module="BOOT_LOAD" offset="0x00" address-space="data" caption="Bootloader"/>
          </instance>
        </module>
        <module name="FUSE">
          <instance name="FUSE" caption="Fuses">
            <register-group name="FUSE" name-in-module="FUSE" offset="0" address-space="fuses" caption="Fuses"/>
          </instance>
        </module>
        <module name="LOCKBIT">
          <instance name="LOCKBIT" caption="Lockbits">
            <register-group name="LOCKBIT" name-in-module="LOCKBIT" offset="0" address-space="lockbits" caption="Lockbits"/>
          </instance>
        </module>
      </peripherals>
      <interrupts>
        <interrupt index="0" name="RESET" caption="External Pin,Power-on Reset,Brown-out Reset,Watchdog Reset,and JTAG AVR Reset. See Datasheet.     "/>
        <interrupt index="1" name="INT0" caption="External Interrupt Request 0"/>
        <interrupt index="2" name="INT1" caption="External Interrupt Request 1"/>
        <interrupt index="3" name="INT2" caption="External Interrupt Request 2"/>
        <interrupt index="4" name="INT3" caption="External Interrupt Request 3"/>
        <interrupt index="5" name="INT4" caption="External Interrupt Request 4"/>
        <interrupt index="6" name="INT5" caption="External Interrupt Request 5"/>
        <interrupt index="7" name="INT6" caption="External Interrupt Request 6"/>
        <interrupt index="8" name="INT7" caption="External Interrupt Request 7"/>
        <interrupt index="9" name="PCINT0" caption="Pin Change Interrupt Request 0"/>
        <interrupt index="10" name="PCINT1" caption="Pin Change Interrupt Request 1"/>
        <interrupt index="11" name="PCINT2" caption="Pin Change Interrupt Request 2"/>
        <interrupt index="12" name="WDT" caption="Watchdog Time-out Interrupt"/>
        <interrupt index="13" name="TIMER2_COMPA" caption="Timer/Counter2 Compare Match A"/>
        <interrupt index="14" name="TIMER2_COMPB" caption="Timer/Counter2 Compare Match B"/>
        <interrupt index="15" name="TIMER2_OVF" caption="Timer/Counter2 Overflow"/>
        <interrupt index="16" name="TIMER1_CAPT" caption="Timer/Counter1 Capture Event"/>
        <interrupt index="17" name="TIMER1_COMPA" caption="Timer/Counter1 Compare Match A"/>
        <interrupt index="18" name="TIMER1_COMPB" caption="Timer/Counter1 Compare Match B"/>
        <interrupt index="19" name="TIMER1_COMPC" caption="Timer/Counter1 Compare Match C"/>
        <interrupt index="20" name="TIMER1_OVF" caption="Timer/Counter1 Overflow"/>
        <interrupt index="21" name="TIMER0_COMPA" caption="Timer/Counter0 Compare Match A"/>
        <interrupt index="22" name="TIMER0_COMPB" caption="Timer/Counter0 Compare Match B"/>
        <interrupt index="23" name="TIMER0_OVF" caption="Timer/Counter0 Overflow"/>
        <interrupt index="24" name="SPI_STC" caption="SPI Serial Transfer Complete"/>
        <interrupt index="25" name="USART0_RX" caption="USART0, Rx Complete"/>
        <interrupt index="26" name="USART0_UDRE" caption="USART0 Data register Empty"/>
        <interrupt index="27" name="USART0_TX" caption="USART0, Tx Complete"/>
        <interrupt index="28" name="ANALOG_COMP" caption="Analog Comparator"/>
        <interrupt index="29" name="ADC" caption="ADC Conversion Complete"/>
        <interrupt index="30" name="EE_READY" caption="EEPROM Ready"/>
        <interrupt index="31" name="TIMER3_CAPT" caption="Timer/Counter3 Capture Event"/>
        <interrupt index="32" name="TIMER3_COMPA" caption="Timer/Counter3 Compare Match A"/>
        <interrupt index="33" name="TIMER3_COMPB" caption="Timer/Counter3 Compare Match B"/>
        <interrupt index="34" name="TIMER3_COMPC" caption="Timer/Counter3 Compare Match C"/>
        <interrupt index="35" name="TIMER3_OVF" caption="Timer/Counter3 Overflow"/>
        <interrupt index="36" name="USART1_RX" caption="USART1, Rx Complete"/>
        <interrupt index="37" name="USART1_UDRE" caption="USART1 Data register Empty"/>
        <interrupt index="38" name="USART1_TX" caption="USART1, Tx Complete"/>
        <interrupt index="39" name="TWI" caption="2-wire Serial Interface"/>
        <interrupt index="40" name="SPM_READY" caption="Store Program Memory Read"/>
        <interrupt index="41" name="TIMER4_CAPT" caption="Timer/Counter4 Capture Event"/>
        <interrupt index="42" name="TIMER4_COMPA" caption="Timer/Counter4 Compare Match A"/>
        <interrupt index="43" name="TIMER4_COMPB" caption="Timer/Counter4 Compare Match B"/>
        <interrupt index="44" name="TIMER4_COMPC" caption="Timer/Counter4 Compare Match C"/>
        <interrupt index="45" name="TIMER4_OVF" caption="Timer/Counter4 Overflow"/>
        <interrupt index="46" name="TIMER5_CAPT" caption="Timer/Counter5 Capture Event"/>
        <interrupt index="47" name="TIMER5_COMPA" caption="Timer/Counter5 Compare Match A"/>
        <interrupt index="48" name="TIMER5_COMPB" caption="Timer/Counter5 Compare Match B"/>
        <interrupt index="49" name="TIMER5_COMPC" caption="Timer/Counter5 Compare Match C"/>
        <interrupt index="50" name="TIMER5_OVF" caption="Timer/Counter5 Overflow"/>
        <interrupt index="51" name="USART2_RX" caption="USART2, Rx Complete"/>
        <interrupt index="52" name="USART2_UDRE" caption="USART2 Data register Empty"/>
        <interrupt index="53" name="USART2_TX" caption="USART2, Tx Complete"/>
        <interrupt index="54" name="USART3_RX" caption="USART3, Rx Complete"/>
        <interrupt index="55" name="USART3_UDRE" caption="USART3 Data register Empty"/>
        <interrupt index="56" name="USART3_TX" caption="USART3, Tx Complete"/>
      </interrupts>
      <interfaces>
        <interface name="ISP" type="isp"/>
        <interface name="HVPP" type="hvpp"/>
        <interface name="JTAG" type="megajtag"/>
      </interfaces>
      <property-groups>
        <property-group name="SIGNATURES">
          <property name="JTAGID" value="0x0970303F"/>
          <property name="SIGNATURE0" value="0x1e"/>
          <property name="SIGNATURE1" value="0x97"/>
          <property name="SIGNATURE2" value="0x03"/>
        </property-group>
        <property-group name="OCD">
          <property name="OCD_REVISION" value="3"/>
          <property name="OCD_DATAREG" value="0x31"/>
          <property name="PROGBASE" value="0x0000"/>
        </property-group>
        <property-group name="JTAG_INTERFACE">
          <property name="ALLOWFULLPAGESTREAM" value="0x00"/>
        </property-group>
        <property-group name="ISP_INTERFACE">
          <property name="IspEnterProgMode_timeout" value="200"/>
          <property name="IspEnterProgMode_stabDelay" value="100"/>
          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
          <property name="IspEnterProgMode_synchLoops" value="32"/>
          <property name="IspEnterProgMode_byteDelay" value="0"/>
          <property name="IspEnterProgMode_pollIndex" value="3"/>
          <property name="IspEnterProgMode_pollValue" value="0x53"/>
          <property name="IspLeaveProgMode_preDelay" value="1"/>
          <property name="IspLeaveProgMode_postDelay" value="1"/>
          <property name="IspChipErase_eraseDelay" value="55"/>
          <property name="IspChipErase_pollMethod" value="1"/>
          <property name="IspProgramFlash_mode" value="0x41"/>
          <property name="IspProgramFlash_blockSize" value="256"/>
          <property name="IspProgramFlash_delay" value="10"/>
          <property name="IspProgramFlash_cmd1" value="0x40"/>
          <property name="IspProgramFlash_cmd2" value="0x4C"/>
          <property name="IspProgramFlash_cmd3" value="0x00"/>
          <property name="IspProgramFlash_pollVal1" value="0x00"/>
          <property name="IspProgramFlash_pollVal2" value="0x00"/>
          <property name="IspProgramEeprom_mode" value="0x41"/>
          <property name="IspProgramEeprom_blockSize" value="8"/>
          <property name="IspProgramEeprom_delay" value="10"/>
          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
          <property name="IspProgramEeprom_cmd3" value="0x00"/>
          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
          <property name="IspReadFlash_blockSize" value="256"/>
          <property name="IspReadEeprom_blockSize" value="256"/>
          <property name="IspReadFuse_pollIndex" value="4"/>
          <property name="IspReadLock_pollIndex" value="4"/>
          <property name="IspReadSign_pollIndex" value="4"/>
          <property name="IspReadOsccal_pollIndex" value="4"/>
        </property-group>
        <property-group name="PP_INTERFACE">
          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
          <property name="PpEnterProgMode_stabDelay" value="100"/>
          <property name="PpEnterProgMode_progModeDelay" value="0"/>
          <property name="PpEnterProgMode_latchCycles" value="5"/>
          <property name="PpEnterProgMode_toggleVtg" value="1"/>
          <property name="PpEnterProgMode_powerOffDelay" value="15"/>
          <property name="PpEnterProgMode_resetDelayMs" value="1"/>
          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
          <property name="PpLeaveProgMode_stabDelay" value="15"/>
          <property name="PpLeaveProgMode_resetDelay" value="15"/>
          <property name="PpChipErase_pulseWidth" value="0"/>
          <property name="PpChipErase_pollTimeout" value="10"/>
          <property name="PpProgramFlash_pollTimeout" value="5"/>
          <property name="PpProgramFlash_mode" value="0x01"/>
          <property name="PpProgramFlash_blockSize" value="256"/>
          <property name="PpReadFlash_blockSize" value="256"/>
          <property name="PpProgramEeprom_pollTimeout" value="5"/>
          <property name="PpProgramEeprom_mode" value="0x07"/>
          <property name="PpProgramEeprom_blockSize" value="256"/>
          <property name="PpReadEeprom_blockSize" value="256"/>
          <property name="PpProgramFuse_pulseWidth" value="0"/>
          <property name="PpProgramFuse_pollTimeout" value="5"/>
          <property name="PpProgramLock_pulseWidth" value="0"/>
          <property name="PpProgramLock_pollTimeout" value="5"/>
        </property-group>
        <property-group name="ISP_INTERFACE_STK600">
          <property name="IspEnterProgMode_timeout" value="200"/>
          <property name="IspEnterProgMode_stabDelay" value="100"/>
          <property name="IspEnterProgMode_cmdexeDelay" value="25"/>
          <property name="IspEnterProgMode_synchLoops" value="32"/>
          <property name="IspEnterProgMode_byteDelay" value="0"/>
          <property name="IspEnterProgMode_pollIndex" value="3"/>
          <property name="IspEnterProgMode_pollValue" value="0x53"/>
          <property name="IspLeaveProgMode_preDelay" value="1"/>
          <property name="IspLeaveProgMode_postDelay" value="1"/>
          <property name="IspChipErase_eraseDelay" value="55"/>
          <property name="IspChipErase_pollMethod" value="1"/>
          <property name="IspProgramFlash_mode" value="0x41"/>
          <property name="IspProgramFlash_blockSize" value="256"/>
          <property name="IspProgramFlash_delay" value="6"/>
          <property name="IspProgramFlash_cmd1" value="0x40"/>
          <property name="IspProgramFlash_cmd2" value="0x4C"/>
          <property name="IspProgramFlash_cmd3" value="0x00"/>
          <property name="IspProgramFlash_pollVal1" value="0x00"/>
          <property name="IspProgramFlash_pollVal2" value="0x00"/>
          <property name="IspProgramEeprom_mode" value="0x41"/>
          <property name="IspProgramEeprom_blockSize" value="8"/>
          <property name="IspProgramEeprom_delay" value="10"/>
          <property name="IspProgramEeprom_cmd1" value="0xC1"/>
          <property name="IspProgramEeprom_cmd2" value="0xC2"/>
          <property name="IspProgramEeprom_cmd3" value="0x00"/>
          <property name="IspProgramEeprom_pollVal1" value="0x00"/>
          <property name="IspProgramEeprom_pollVal2" value="0x00"/>
          <property name="IspReadFlash_blockSize" value="256"/>
          <property name="IspReadEeprom_blockSize" value="256"/>
          <property name="IspReadFuse_pollIndex" value="4"/>
          <property name="IspReadLock_pollIndex" value="4"/>
          <property name="IspReadSign_pollIndex" value="4"/>
          <property name="IspReadOsccal_pollIndex" value="4"/>
        </property-group>
        <property-group name="PP_INTERFACE_STK600">
          <property name="PpControlStack" value="0x0E 0x1E 0x0F 0x1F 0x2E 0x3E 0x2F 0x3F 0x4E 0x5E 0x4F 0x5F 0x6E 0x7E 0x6F 0x7F 0x66 0x76 0x67 0x77 0x6A 0x7A 0x6B 0x7B 0xBE 0xFD 0x00 0x01 0x00 0x00 0x00 0x00"/>
          <property name="PpEnterProgMode_stabDelay" value="100"/>
          <property name="PpEnterProgMode_progModeDelay" value="0"/>
          <property name="PpEnterProgMode_latchCycles" value="6"/>
          <property name="PpEnterProgMode_toggleVtg" value="0"/>
          <property name="PpEnterProgMode_powerOffDelay" value="0"/>
          <property name="PpEnterProgMode_resetDelayMs" value="0"/>
          <property name="PpEnterProgMode_resetDelayUs" value="0"/>
          <property name="PpLeaveProgMode_stabDelay" value="15"/>
          <property name="PpLeaveProgMode_resetDelay" value="15"/>
          <property name="PpChipErase_pulseWidth" value="0"/>
          <property name="PpChipErase_pollTimeout" value="10"/>
          <property name="PpProgramFlash_pollTimeout" value="5"/>
          <property name="PpProgramFlash_mode" value="0x01"/>
          <property name="PpProgramFlash_blockSize" value="256"/>
          <property name="PpReadFlash_blockSize" value="256"/>
          <property name="PpProgramEeprom_pollTimeout" value="5"/>
          <property name="PpProgramEeprom_mode" value="0x07"/>
          <property name="PpProgramEeprom_blockSize" value="256"/>
          <property name="PpReadEeprom_blockSize" value="256"/>
          <property name="PpProgramFuse_pulseWidth" value="0"/>
          <property name="PpProgramFuse_pollTimeout" value="5"/>
          <property name="PpProgramLock_pulseWidth" value="0"/>
          <property name="PpProgramLock_pollTimeout" value="5"/>
        </property-group>
      </property-groups>
    </device>
  </devices>
  <modules>
    <module caption="Fuses" name="FUSE">
      <register-group caption="Fuses" name="FUSE">
        <register caption="" name="EXTENDED" offset="0x02" size="1" initval="0xFF">
          <bitfield caption="Brown-out Detector trigger level" mask="0x07" name="BODLEVEL" values="ENUM_BODLEVEL"/>
        </register>
        <register caption="" name="HIGH" offset="0x01" size="1" initval="0x99">
          <bitfield caption="On-Chip Debug Enabled" mask="0x80" name="OCDEN"/>
          <bitfield caption="JTAG Interface Enabled" mask="0x40" name="JTAGEN"/>
          <bitfield caption="Serial program downloading (SPI) enabled" mask="0x20" name="SPIEN"/>
          <bitfield caption="Watchdog timer always on" mask="0x10" name="WDTON"/>
          <bitfield caption="Preserve EEPROM through the Chip Erase cycle" mask="0x08" name="EESAVE"/>
          <bitfield caption="Select Boot Size" mask="0x06" name="BOOTSZ" values="ENUM_BOOTSZ"/>
          <bitfield caption="Boot Reset vector Enabled" mask="0x01" name="BOOTRST"/>
        </register>
        <register caption="" name="LOW" offset="0x00" size="1" initval="0x62">
          <bitfield caption="Divide clock by 8 internally" mask="0x80" name="CKDIV8"/>
          <bitfield caption="Clock output on PORTE7" mask="0x40" name="CKOUT"/>
          <bitfield caption="Select Clock Source" mask="0x3F" name="SUT_CKSEL" values="ENUM_SUT_CKSEL"/>
        </register>
      </register-group>
      <value-group caption="" name="ENUM_SUT_CKSEL">
        <value caption="Ext. Clock; Start-up time: 6 CK + 0 ms" name="EXTCLK_6CK_0MS" value="0x00"/>
        <value caption="Ext. Clock; Start-up time: 6 CK + 4.1 ms" name="EXTCLK_6CK_4MS1" value="0x10"/>
        <value caption="Ext. Clock; Start-up time: 6 CK + 65 ms" name="EXTCLK_6CK_65MS" value="0x20"/>
        <value caption="Int. RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_6CK_0MS" value="0x02"/>
        <value caption="Int. RC Osc.; Start-up time: 6 CK + 4.1 ms" name="INTRCOSC_6CK_4MS1" value="0x12"/>
        <value caption="Int. RC Osc.; Start-up time: 6 CK + 65 ms" name="INTRCOSC_6CK_65MS" value="0x22"/>
        <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 0 ms" name="INTRCOSC_128KHZ_6CK_0MS" value="0x03"/>
        <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 4 ms" name="INTRCOSC_128KHZ_6CK_4MS" value="0x13"/>
        <value caption="Int. 128kHz RC Osc.; Start-up time: 6 CK + 64 ms" name="INTRCOSC_128KHZ_6CK_64MS" value="0x23"/>
        <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 0 ms" name="EXTLOFXTAL_1KCK_0MS" value="0x04"/>
        <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 4.1 ms" name="EXTLOFXTAL_1KCK_4MS1" value="0x14"/>
        <value caption="Ext. Low-Freq. Crystal; Start-up time: 1K CK + 65 ms" name="EXTLOFXTAL_1KCK_65MS" value="0x24"/>
        <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 0 ms" name="EXTLOFXTAL_32KCK_0MS" value="0x05"/>
        <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 4.1 ms" name="EXTLOFXTAL_32KCK_4MS1" value="0x15"/>
        <value caption="Ext. Low-Freq. Crystal; Start-up time: 32K CK + 65 ms" name="EXTLOFXTAL_32KCK_65MS" value="0x25"/>
        <value caption="Full Swing Oscillator; Start-up time: 258 CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_258CK_4MS1_CRES_FASTPWR" value="0x06"/>
        <value caption="Full Swing Oscillator; Start-up time: 258 CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_258CK_65MS_CRES_SLOWPWR" value="0x16"/>
        <value caption="Full Swing Oscillator; Start-up time: 1K CK + 0 ms; Ceramic res.; BOD enable" name="FSOSC_1KCK_0MS_CRES_BODEN" value="0x26"/>
        <value caption="Full Swing Oscillator; Start-up time: 1K CK + 4.1 ms; Ceramic res.; fast rising power" name="FSOSC_1KCK_4MS1_CRES_FASTPWR" value="0x36"/>
        <value caption="Full Swing Oscillator; Start-up time: 1K CK + 65 ms; Ceramic res.; slowly rising power" name="FSOSC_1KCK_65MS_CRES_SLOWPWR" value="0x07"/>
        <value caption="Full Swing Oscillator; Start-up time: 16K CK + 0 ms; Crystal Osc.; BOD enabled" name="FSOSC_16KCK_0MS_XOSC_BODEN" value="0x17"/>
        <value caption="Full Swing Oscillator; Start-up time: 16K CK + 4.1 ms; Crystal Osc.; fast rising power" name="FSOSC_16KCK_4MS1_XOSC_FASTPWR" value="0x27"/>
        <value caption="Full Swing Oscillator; Start-up time: 16K CK + 65 ms; Crystal Osc.; slowly rising power" name="FSOSC_16KCK_65MS_XOSC_SLOWPWR" value="0x37"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_4MS1" value="0x08"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_258CK_65MS" value="0x18"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_0MS" value="0x28"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_4MS1" value="0x38"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_1KCK_65MS" value="0x09"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_0MS" value="0x19"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_4MS1" value="0x29"/>
        <value caption="Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ4_0MHZ9_16KCK_65MS" value="0x39"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_4MS1" value="0x0A"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_258CK_65MS" value="0x1A"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_0MS" value="0x2A"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_4MS1" value="0x3A"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_1KCK_65MS" value="0x0B"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_0MS" value="0x1B"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_4MS1" value="0x2B"/>
        <value caption="Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_0MHZ9_3MHZ_16KCK_65MS" value="0x3B"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_4MS1" value="0x0C"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_258CK_65MS" value="0x1C"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_0MS" value="0x2C"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_4MS1" value="0x3C"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_1KCK_65MS" value="0x0D"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_0MS" value="0x1D"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_4MS1" value="0x2D"/>
        <value caption="Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_3MHZ_8MHZ_16KCK_65MS" value="0x3D"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_258CK_4MS1" value="0x0E"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 258 CK + 65 ms" name="EXTXOSC_8MHZ_XX_258CK_65MS" value="0x1E"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 0 ms" name="EXTXOSC_8MHZ_XX_1KCK_0MS" value="0x2E"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_1KCK_4MS1" value="0x3E"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 1K CK + 65 ms" name="EXTXOSC_8MHZ_XX_1KCK_65MS" value="0x0F"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 0 ms" name="EXTXOSC_8MHZ_XX_16KCK_0MS" value="0x1F"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 4.1 ms" name="EXTXOSC_8MHZ_XX_16KCK_4MS1" value="0x2F"/>
        <value caption="Ext. Crystal Osc. 8.0-    MHz; Start-up time: 16K CK + 65 ms" name="EXTXOSC_8MHZ_XX_16KCK_65MS" value="0x3F"/>
      </value-group>
      <value-group caption="" name="ENUM_BOOTSZ">
        <value caption="Boot Flash size=512 words start address=$FE00" name="512W_FE00" value="0x03"/>
        <value caption="Boot Flash size=1024 words start address=$FC00" name="1024W_FC00" value="0x02"/>
        <value caption="Boot Flash size=2048 words start address=$F800" name="2048W_F800" value="0x01"/>
        <value caption="Boot Flash size=4096 words start address=$F000" name="4096W_F000" value="0x00"/>
      </value-group>
      <value-group caption="" name="ENUM_BODLEVEL">
        <value caption="Brown-out detection disabled" name="DISABLED" value="0x07"/>
        <value caption="Brown-out detection at VCC=1.8 V" name="1V8" value="0x06"/>
        <value caption="Brown-out detection at VCC=2.7 V" name="2V7" value="0x05"/>
        <value caption="Brown-out detection at VCC=4.3 V" name="4V3" value="0x04"/>
      </value-group>
    </module>
    <module caption="Lockbits" name="LOCKBIT">
      <register-group caption="Lockbits" name="LOCKBIT">
        <register caption="" name="LOCKBIT" offset="0x00" size="1">
          <bitfield caption="Memory Lock" mask="0x03" name="LB" values="ENUM_LB"/>
          <bitfield caption="Boot Loader Protection Mode" mask="0x0C" name="BLB0" values="ENUM_BLB"/>
          <bitfield caption="Boot Loader Protection Mode" mask="0x30" name="BLB1" values="ENUM_BLB2"/>
        </register>
      </register-group>
      <value-group caption="" name="ENUM_LB">
        <value caption="Further programming and verification disabled" name="PROG_VER_DISABLED" value="0x00"/>
        <value caption="Further programming disabled" name="PROG_DISABLED" value="0x02"/>
        <value caption="No memory lock features enabled" name="NO_LOCK" value="0x03"/>
      </value-group>
      <value-group caption="" name="ENUM_BLB">
        <value caption="LPM and SPM prohibited in Application Section" name="LPM_SPM_DISABLE" value="0x00"/>
        <value caption="LPM prohibited in Application Section" name="LPM_DISABLE" value="0x01"/>
        <value caption="SPM prohibited in Application Section" name="SPM_DISABLE" value="0x02"/>
        <value caption="No lock on SPM and LPM in Application Section" name="NO_LOCK" value="0x03"/>
      </value-group>
      <value-group caption="" name="ENUM_BLB2">
        <value caption="LPM and SPM prohibited in Boot Section" name="LPM_SPM_DISABLE" value="0x00"/>
        <value caption="LPM prohibited in Boot Section" name="LPM_DISABLE" value="0x01"/>
        <value caption="SPM prohibited in Boot Section" name="SPM_DISABLE" value="0x02"/>
        <value caption="No lock on SPM and LPM in Boot Section" name="NO_LOCK" value="0x03"/>
      </value-group>
    </module>
    <module caption="Analog Comparator" name="AC">
      <register-group caption="Analog Comparator" name="AC">
        <register caption="ADC Control and Status Register B" name="ADCSRB" offset="0x7B" size="1">
          <bitfield caption="Analog Comparator Multiplexer Enable" mask="0x40" name="ACME"/>
        </register>
        <register caption="Analog Comparator Control And Status Register" name="ACSR" offset="0x50" size="1" ocd-rw="R">
          <bitfield caption="Analog Comparator Disable" mask="0x80" name="ACD"/>
          <bitfield caption="Analog Comparator Bandgap Select" mask="0x40" name="ACBG"/>
          <bitfield caption="Analog Compare Output" mask="0x20" name="ACO"/>
          <bitfield caption="Analog Comparator Interrupt Flag" mask="0x10" name="ACI"/>
          <bitfield caption="Analog Comparator Interrupt Enable" mask="0x08" name="ACIE"/>
          <bitfield caption="Analog Comparator Input Capture Enable" mask="0x04" name="ACIC"/>
          <bitfield caption="Analog Comparator Interrupt Mode Select bits" mask="0x03" name="ACIS" values="ANALOG_COMP_INTERRUPT"/>
        </register>
        <register caption="Digital Input Disable Register 1" name="DIDR1" offset="0x7F" size="1">
          <bitfield caption="AIN1 Digital Input Disable" mask="0x02" name="AIN1D"/>
          <bitfield caption="AIN0 Digital Input Disable" mask="0x01" name="AIN0D"/>
        </register>
      </register-group>
      <value-group caption="" name="ANALOG_COMP_INTERRUPT">
        <value caption="Interrupt on Toggle" name="VAL_0x00" value="0x00"/>
        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
        <value caption="Interrupt on Falling Edge" name="VAL_0x02" value="0x02"/>
        <value caption="Interrupt on Rising Edge" name="VAL_0x03" value="0x03"/>
      </value-group>
    </module>
    <module caption="USART" name="USART">
      <register-group caption="USART" name="USART0">
        <register caption="USART I/O Data Register" name="UDR0" offset="0xC6" size="1" mask="0xFF" ocd-rw=""/>
        <register caption="USART Control and Status Register A" name="UCSR0A" offset="0xC0" size="1" ocd-rw="R">
          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC0"/>
          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC0"/>
          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE0"/>
          <bitfield caption="Framing Error" mask="0x10" name="FE0"/>
          <bitfield caption="Data overRun" mask="0x08" name="DOR0"/>
          <bitfield caption="Parity Error" mask="0x04" name="UPE0"/>
          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X0"/>
          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM0"/>
        </register>
        <register caption="USART Control and Status Register B" name="UCSR0B" offset="0xC1" size="1">
          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE0"/>
          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE0"/>
          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE0"/>
          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN0"/>
          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN0"/>
          <bitfield caption="Character Size" mask="0x04" name="UCSZ02"/>
          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB80"/>
          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB80"/>
        </register>
        <register caption="USART Control and Status Register C" name="UCSR0C" offset="0xC2" size="1">
          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL0" values="COMM_USART_MODE_2BIT"/>
          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM0" values="COMM_UPM_PARITY_MODE"/>
          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS0" values="COMM_STOP_BIT_SEL"/>
          <bitfield caption="Character Size" mask="0x06" name="UCSZ0"/>
          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL0"/>
        </register>
        <register caption="USART Baud Rate Register  Bytes" name="UBRR0" offset="0xC4" size="2" mask="0x0FFF"/>
      </register-group>
      <register-group caption="USART" name="USART1">
        <register caption="USART I/O Data Register" name="UDR1" offset="0xCE" size="1" mask="0xFF" ocd-rw=""/>
        <register caption="USART Control and Status Register A" name="UCSR1A" offset="0xC8" size="1" ocd-rw="R">
          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC1"/>
          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC1"/>
          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE1"/>
          <bitfield caption="Framing Error" mask="0x10" name="FE1"/>
          <bitfield caption="Data overRun" mask="0x08" name="DOR1"/>
          <bitfield caption="Parity Error" mask="0x04" name="UPE1"/>
          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X1"/>
          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM1"/>
        </register>
        <register caption="USART Control and Status Register B" name="UCSR1B" offset="0xC9" size="1">
          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE1"/>
          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE1"/>
          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE1"/>
          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN1"/>
          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN1"/>
          <bitfield caption="Character Size" mask="0x04" name="UCSZ12"/>
          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB81"/>
          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB81"/>
        </register>
        <register caption="USART Control and Status Register C" name="UCSR1C" offset="0xCA" size="1">
          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL1" values="COMM_USART_MODE_2BIT"/>
          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM1" values="COMM_UPM_PARITY_MODE"/>
          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS1" values="COMM_STOP_BIT_SEL"/>
          <bitfield caption="Character Size" mask="0x06" name="UCSZ1"/>
          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL1"/>
        </register>
        <register caption="USART Baud Rate Register  Bytes" name="UBRR1" offset="0xCC" size="2" mask="0x0FFF"/>
      </register-group>
      <register-group caption="USART" name="USART2">
        <register caption="USART I/O Data Register" name="UDR2" offset="0xD6" size="1" mask="0xFF" ocd-rw=""/>
        <register caption="USART Control and Status Register A" name="UCSR2A" offset="0xD0" size="1" ocd-rw="R">
          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC2"/>
          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC2"/>
          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE2"/>
          <bitfield caption="Framing Error" mask="0x10" name="FE2"/>
          <bitfield caption="Data overRun" mask="0x08" name="DOR2"/>
          <bitfield caption="Parity Error" mask="0x04" name="UPE2"/>
          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X2"/>
          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM2"/>
        </register>
        <register caption="USART Control and Status Register B" name="UCSR2B" offset="0xD1" size="1">
          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE2"/>
          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE2"/>
          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE2"/>
          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN2"/>
          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN2"/>
          <bitfield caption="Character Size" mask="0x04" name="UCSZ22"/>
          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB82"/>
          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB82"/>
        </register>
        <register caption="USART Control and Status Register C" name="UCSR2C" offset="0xD2" size="1">
          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL2" values="COMM_USART_MODE_2BIT"/>
          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM2" values="COMM_UPM_PARITY_MODE"/>
          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS2" values="COMM_STOP_BIT_SEL"/>
          <bitfield caption="Character Size" mask="0x06" name="UCSZ2"/>
          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL2"/>
        </register>
        <register caption="USART Baud Rate Register  Bytes" name="UBRR2" offset="0xD4" size="2" mask="0x0FFF"/>
      </register-group>
      <register-group caption="USART" name="USART3">
        <register caption="USART I/O Data Register" name="UDR3" offset="0x136" size="1" mask="0xFF" ocd-rw=""/>
        <register caption="USART Control and Status Register A" name="UCSR3A" offset="0x130" size="1" ocd-rw="R">
          <bitfield caption="USART Receive Complete" mask="0x80" name="RXC3"/>
          <bitfield caption="USART Transmitt Complete" mask="0x40" name="TXC3"/>
          <bitfield caption="USART Data Register Empty" mask="0x20" name="UDRE3"/>
          <bitfield caption="Framing Error" mask="0x10" name="FE3"/>
          <bitfield caption="Data overRun" mask="0x08" name="DOR3"/>
          <bitfield caption="Parity Error" mask="0x04" name="UPE3"/>
          <bitfield caption="Double the USART transmission speed" mask="0x02" name="U2X3"/>
          <bitfield caption="Multi-processor Communication Mode" mask="0x01" name="MPCM3"/>
        </register>
        <register caption="USART Control and Status Register B" name="UCSR3B" offset="0x131" size="1">
          <bitfield caption="RX Complete Interrupt Enable" mask="0x80" name="RXCIE3"/>
          <bitfield caption="TX Complete Interrupt Enable" mask="0x40" name="TXCIE3"/>
          <bitfield caption="USART Data register Empty Interrupt Enable" mask="0x20" name="UDRIE3"/>
          <bitfield caption="Receiver Enable" mask="0x10" name="RXEN3"/>
          <bitfield caption="Transmitter Enable" mask="0x08" name="TXEN3"/>
          <bitfield caption="Character Size" mask="0x04" name="UCSZ32"/>
          <bitfield caption="Receive Data Bit 8" mask="0x02" name="RXB83"/>
          <bitfield caption="Transmit Data Bit 8" mask="0x01" name="TXB83"/>
        </register>
        <register caption="USART Control and Status Register C" name="UCSR3C" offset="0x132" size="1">
          <bitfield caption="USART Mode Select" mask="0xC0" name="UMSEL3" values="COMM_USART_MODE_2BIT"/>
          <bitfield caption="Parity Mode Bits" mask="0x30" name="UPM3" values="COMM_UPM_PARITY_MODE"/>
          <bitfield caption="Stop Bit Select" mask="0x08" name="USBS3" values="COMM_STOP_BIT_SEL"/>
          <bitfield caption="Character Size" mask="0x06" name="UCSZ3"/>
          <bitfield caption="Clock Polarity" mask="0x01" name="UCPOL3"/>
        </register>
        <register caption="USART Baud Rate Register  Bytes" name="UBRR3" offset="0x134" size="2" mask="0x0FFF"/>
      </register-group>
      <value-group caption="" name="COMM_UPM_PARITY_MODE">
        <value caption="Disabled" name="VAL_0x00" value="0x00"/>
        <value caption="Reserved" name="VAL_0x01" value="0x01"/>
        <value caption="Enabled, Even Parity" name="VAL_0x02" value="0x02"/>
        <value caption="Enabled, Odd Parity" name="VAL_0x03" value="0x03"/>
      </value-group>
      <value-group caption="" name="COMM_STOP_BIT_SEL">
        <value caption="1-bit" name="VAL_0x00" value="0x00"/>
        <value caption="2-bit" name="VAL_0x01" value="0x01"/>
      </value-group>
      <value-group caption="" name="COMM_USART_MODE_2BIT">
        <value caption="Asynchronous USART" name="VAL_0x00" value="0x00"/>
        <value caption="Synchronous USART" name="VAL_0x01" value="0x01"/>
        <value caption="Master SPI" name="VAL_0x03" value="0x03"/>
      </value-group>
    </module>
    <module caption="Two Wire Serial Interface" name="TWI">
      <register-group caption="Two Wire Serial Interface" name="TWI">
        <register caption="TWI (Slave) Address Mask Register" name="TWAMR" offset="0xBD" size="1">
          <bitfield caption="" mask="0xFE" name="TWAM"/>
        </register>
        <register caption="TWI Bit Rate register" name="TWBR" offset="0xB8" size="1" mask="0xFF"/>
        <register caption="TWI Control Register" name="TWCR" offset="0xBC" size="1" ocd-rw="R">
          <bitfield caption="TWI Interrupt Flag" mask="0x80" name="TWINT"/>
          <bitfield caption="TWI Enable Acknowledge Bit" mask="0x40" name="TWEA"/>
          <bitfield caption="TWI Start Condition Bit" mask="0x20" name="TWSTA"/>
          <bitfield caption="TWI Stop Condition Bit" mask="0x10" name="TWSTO"/>
          <bitfield caption="TWI Write Collition Flag" mask="0x08" name="TWWC"/>
          <bitfield caption="TWI Enable Bit" mask="0x04" name="TWEN"/>
          <bitfield caption="TWI Interrupt Enable" mask="0x01" name="TWIE"/>
        </register>
        <register caption="TWI Status Register" name="TWSR" offset="0xB9" size="1">
          <bitfield caption="TWI Status" mask="0xF8" name="TWS" lsb="3"/>
          <bitfield caption="TWI Prescaler" mask="0x03" name="TWPS" values="COMM_TWI_PRESACLE"/>
        </register>
        <register caption="TWI Data register" name="TWDR" offset="0xBB" size="1" mask="0xFF"/>
        <register caption="TWI (Slave) Address register" name="TWAR" offset="0xBA" size="1">
          <bitfield caption="TWI (Slave) Address register Bits" mask="0xFE" name="TWA"/>
          <bitfield caption="TWI General Call Recognition Enable Bit" mask="0x01" name="TWGCE"/>
        </register>
      </register-group>
      <value-group caption="" name="COMM_TWI_PRESACLE">
        <value caption="1" name="VAL_0x00" value="0x00"/>
        <value caption="4" name="VAL_0x01" value="0x01"/>
        <value caption="16" name="VAL_0x02" value="0x02"/>
        <value caption="64" name="VAL_0x03" value="0x03"/>
      </value-group>
    </module>
    <module caption="Serial Peripheral Interface" name="SPI">
      <register-group caption="Serial Peripheral Interface" name="SPI">
        <register caption="SPI Control Register" name="SPCR" offset="0x4C" size="1">
          <bitfield caption="SPI Interrupt Enable" mask="0x80" name="SPIE"/>
          <bitfield caption="SPI Enable" mask="0x40" name="SPE"/>
          <bitfield caption="Data Order" mask="0x20" name="DORD"/>
          <bitfield caption="Master/Slave Select" mask="0x10" name="MSTR"/>
          <bitfield caption="Clock polarity" mask="0x08" name="CPOL"/>
          <bitfield caption="Clock Phase" mask="0x04" name="CPHA"/>
          <bitfield caption="SPI Clock Rate Selects" mask="0x03" name="SPR" values="COMM_SCK_RATE_3BIT"/>
        </register>
        <register caption="SPI Status Register" name="SPSR" offset="0x4D" size="1" ocd-rw="R">
          <bitfield caption="SPI Interrupt Flag" mask="0x80" name="SPIF"/>
          <bitfield caption="Write Collision Flag" mask="0x40" name="WCOL"/>
          <bitfield caption="Double SPI Speed Bit" mask="0x01" name="SPI2X"/>
        </register>
        <register caption="SPI Data Register" name="SPDR" offset="0x4E" size="1" mask="0xFF" ocd-rw=""/>
      </register-group>
      <value-group caption="" name="COMM_SCK_RATE_3BIT">
        <value caption="fosc/4" name="VAL_0x00" value="0x00"/>
        <value caption="fosc/16" name="VAL_0x01" value="0x01"/>
        <value caption="fosc/64" name="VAL_0x02" value="0x02"/>
        <value caption="fosc/128" name="VAL_0x03" value="0x03"/>
        <value caption="fosc/2" name="VAL_0x04" value="0x04"/>
        <value caption="fosc/8" name="VAL_0x05" value="0x05"/>
        <value caption="fosc/32" name="VAL_0x06" value="0x06"/>
        <value caption="fosc/64" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="I/O Port" name="PORT">
      <register-group caption="I/O Port" name="PORTA">
        <register caption="Port A Data Register" name="PORTA" offset="0x22" size="1" mask="0xFF"/>
        <register caption="Port A Data Direction Register" name="DDRA" offset="0x21" size="1" mask="0xFF"/>
        <register caption="Port A Input Pins" name="PINA" offset="0x20" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTB">
        <register caption="Port B Data Register" name="PORTB" offset="0x25" size="1" mask="0xFF"/>
        <register caption="Port B Data Direction Register" name="DDRB" offset="0x24" size="1" mask="0xFF"/>
        <register caption="Port B Input Pins" name="PINB" offset="0x23" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTC">
        <register caption="Port C Data Register" name="PORTC" offset="0x28" size="1" mask="0xFF"/>
        <register caption="Port C Data Direction Register" name="DDRC" offset="0x27" size="1" mask="0xFF"/>
        <register caption="Port C Input Pins" name="PINC" offset="0x26" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTD">
        <register caption="Port D Data Register" name="PORTD" offset="0x2B" size="1" mask="0xFF"/>
        <register caption="Port D Data Direction Register" name="DDRD" offset="0x2A" size="1" mask="0xFF"/>
        <register caption="Port D Input Pins" name="PIND" offset="0x29" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTE">
        <register caption="Data Register, Port E" name="PORTE" offset="0x2E" size="1" mask="0xFF"/>
        <register caption="Data Direction Register, Port E" name="DDRE" offset="0x2D" size="1" mask="0xFF"/>
        <register caption="Input Pins, Port E" name="PINE" offset="0x2C" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTF">
        <register caption="Data Register, Port F" name="PORTF" offset="0x31" size="1" mask="0xFF"/>
        <register caption="Data Direction Register, Port F" name="DDRF" offset="0x30" size="1" mask="0xFF"/>
        <register caption="Input Pins, Port F" name="PINF" offset="0x2F" size="1" mask="0xFF" ocd-rw="R"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTG">
        <register caption="Data Register, Port G" name="PORTG" offset="0x34" size="1" mask="0x3F"/>
        <register caption="Data Direction Register, Port G" name="DDRG" offset="0x33" size="1" mask="0x3F"/>
        <register caption="Input Pins, Port G" name="PING" offset="0x32" size="1" mask="0x3F"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTH">
        <register caption="PORT H Data Register" name="PORTH" offset="0x102" size="1" mask="0xFF"/>
        <register caption="PORT H Data Direction Register" name="DDRH" offset="0x101" size="1" mask="0xFF"/>
        <register caption="PORT H Input Pins" name="PINH" offset="0x100" size="1" mask="0xFF"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTJ">
        <register caption="PORT J Data Register" name="PORTJ" offset="0x105" size="1" mask="0xFF"/>
        <register caption="PORT J Data Direction Register" name="DDRJ" offset="0x104" size="1" mask="0xFF"/>
        <register caption="PORT J Input Pins" name="PINJ" offset="0x103" size="1" mask="0xFF"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTK">
        <register caption="PORT K Data Register" name="PORTK" offset="0x108" size="1" mask="0xFF"/>
        <register caption="PORT K Data Direction Register" name="DDRK" offset="0x107" size="1" mask="0xFF"/>
        <register caption="PORT K Input Pins" name="PINK" offset="0x106" size="1" mask="0xFF"/>
      </register-group>
      <register-group caption="I/O Port" name="PORTL">
        <register caption="PORT L Data Register" name="PORTL" offset="0x10B" size="1" mask="0xFF"/>
        <register caption="PORT L Data Direction Register" name="DDRL" offset="0x10A" size="1" mask="0xFF"/>
        <register caption="PORT L Input Pins" name="PINL" offset="0x109" size="1" mask="0xFF"/>
      </register-group>
    </module>
    <module caption="Timer/Counter, 8-bit" name="TC8">
      <register-group caption="Timer/Counter, 8-bit" name="TC0">
        <register caption="Timer/Counter0 Output Compare Register" name="OCR0B" offset="0x48" size="1" mask="0xFF"/>
        <register caption="Timer/Counter0 Output Compare Register" name="OCR0A" offset="0x47" size="1" mask="0xFF"/>
        <register caption="Timer/Counter0" name="TCNT0" offset="0x46" size="1" mask="0xFF"/>
        <register caption="Timer/Counter Control Register B" name="TCCR0B" offset="0x45" size="1">
          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC0A"/>
          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC0B"/>
          <bitfield caption="" mask="0x08" name="WGM02"/>
          <bitfield caption="Clock Select" mask="0x07" name="CS0" values="CLK_SEL_3BIT_EXT"/>
        </register>
        <register caption="Timer/Counter  Control Register A" name="TCCR0A" offset="0x44" size="1">
          <bitfield caption="Compare Output Mode, Phase Correct PWM Mode" mask="0xC0" name="COM0A"/>
          <bitfield caption="Compare Output Mode, Fast PWm" mask="0x30" name="COM0B"/>
          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM0"/>
        </register>
        <register caption="Timer/Counter0 Interrupt Mask Register" name="TIMSK0" offset="0x6E" size="1">
          <bitfield caption="Timer/Counter0 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE0B"/>
          <bitfield caption="Timer/Counter0 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE0A"/>
          <bitfield caption="Timer/Counter0 Overflow Interrupt Enable" mask="0x01" name="TOIE0"/>
        </register>
        <register caption="Timer/Counter0 Interrupt Flag register" name="TIFR0" offset="0x35" size="1" ocd-rw="R">
          <bitfield caption="Timer/Counter0 Output Compare Flag 0B" mask="0x04" name="OCF0B"/>
          <bitfield caption="Timer/Counter0 Output Compare Flag 0A" mask="0x02" name="OCF0A"/>
          <bitfield caption="Timer/Counter0 Overflow Flag" mask="0x01" name="TOV0"/>
        </register>
        <register caption="General Timer/Counter Control Register" name="GTCCR" offset="0x43" size="1">
          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
          <bitfield caption="Prescaler Reset Timer/Counter1 and Timer/Counter0" mask="0x01" name="PSRSYNC"/>
        </register>
      </register-group>
      <value-group caption="" name="CLK_SEL_3BIT_EXT">
        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
        <value caption="Running, ExtClk Tx Falling Edge" name="VAL_0x06" value="0x06"/>
        <value caption="Running, ExtClk Tx Rising Edge" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="Timer/Counter, 8-bit Async" name="TC8_ASYNC">
      <register-group caption="Timer/Counter, 8-bit Async" name="TC2">
        <register caption="Timer/Counter Interrupt Mask register" name="TIMSK2" offset="0x70" size="1">
          <bitfield caption="Timer/Counter2 Output Compare Match B Interrupt Enable" mask="0x04" name="OCIE2B"/>
          <bitfield caption="Timer/Counter2 Output Compare Match A Interrupt Enable" mask="0x02" name="OCIE2A"/>
          <bitfield caption="Timer/Counter2 Overflow Interrupt Enable" mask="0x01" name="TOIE2"/>
        </register>
        <register caption="Timer/Counter Interrupt Flag Register" name="TIFR2" offset="0x37" size="1" ocd-rw="R">
          <bitfield caption="Output Compare Flag 2B" mask="0x04" name="OCF2B"/>
          <bitfield caption="Output Compare Flag 2A" mask="0x02" name="OCF2A"/>
          <bitfield caption="Timer/Counter2 Overflow Flag" mask="0x01" name="TOV2"/>
        </register>
        <register caption="Timer/Counter2 Control Register A" name="TCCR2A" offset="0xB0" size="1">
          <bitfield caption="Compare Output Mode bits" mask="0xC0" name="COM2A"/>
          <bitfield caption="Compare Output Mode bits" mask="0x30" name="COM2B"/>
          <bitfield caption="Waveform Genration Mode" mask="0x03" name="WGM2"/>
        </register>
        <register caption="Timer/Counter2 Control Register B" name="TCCR2B" offset="0xB1" size="1">
          <bitfield caption="Force Output Compare A" mask="0x80" name="FOC2A"/>
          <bitfield caption="Force Output Compare B" mask="0x40" name="FOC2B"/>
          <bitfield caption="Waveform Generation Mode" mask="0x08" name="WGM22"/>
          <bitfield caption="Clock Select bits" mask="0x07" name="CS2" values="CLK_SEL_3BIT"/>
        </register>
        <register caption="Timer/Counter2" name="TCNT2" offset="0xB2" size="1" mask="0xFF"/>
        <register caption="Timer/Counter2 Output Compare Register B" name="OCR2B" offset="0xB4" size="1" mask="0xFF"/>
        <register caption="Timer/Counter2 Output Compare Register A" name="OCR2A" offset="0xB3" size="1" mask="0xFF"/>
        <register caption="Asynchronous Status Register" name="ASSR" offset="0xB6" size="1">
          <bitfield caption="Enable External Clock Input" mask="0x40" name="EXCLK"/>
          <bitfield caption="Asynchronous Timer/Counter2" mask="0x20" name="AS2"/>
          <bitfield caption="Timer/Counter2 Update Busy" mask="0x10" name="TCN2UB"/>
          <bitfield caption="Output Compare Register2 Update Busy" mask="0x08" name="OCR2AUB"/>
          <bitfield caption="Output Compare Register 2 Update Busy" mask="0x04" name="OCR2BUB"/>
          <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x02" name="TCR2AUB"/>
          <bitfield caption="Timer/Counter Control Register2 Update Busy" mask="0x01" name="TCR2BUB"/>
        </register>
        <register caption="General Timer Counter Control register" name="GTCCR" offset="0x43" size="1">
          <bitfield caption="Timer/Counter Synchronization Mode" mask="0x80" name="TSM"/>
          <bitfield caption="Prescaler Reset Timer/Counter2" mask="0x02" name="PSRASY"/>
        </register>
      </register-group>
      <value-group caption="" name="CLK_SEL_3BIT">
        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
        <value caption="Running, CLK/32" name="VAL_0x03" value="0x03"/>
        <value caption="Running, CLK/64" name="VAL_0x04" value="0x04"/>
        <value caption="Running, CLK/128" name="VAL_0x05" value="0x05"/>
        <value caption="Running, CLK/256" name="VAL_0x06" value="0x06"/>
        <value caption="Running, CLK/1024" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="Watchdog Timer" name="WDT">
      <register-group caption="Watchdog Timer" name="WDT">
        <register caption="Watchdog Timer Control Register" name="WDTCSR" offset="0x60" size="1" ocd-rw="R">
          <bitfield caption="Watchdog Timeout Interrupt Flag" mask="0x80" name="WDIF"/>
          <bitfield caption="Watchdog Timeout Interrupt Enable" mask="0x40" name="WDIE"/>
          <bitfield caption="Watchdog Timer Prescaler Bits" mask="0x27" name="WDP" values="WDOG_TIMER_PRESCALE_4BITS"/>
          <bitfield caption="Watchdog Change Enable" mask="0x10" name="WDCE"/>
          <bitfield caption="Watch Dog Enable" mask="0x08" name="WDE"/>
        </register>
      </register-group>
      <value-group caption="" name="WDOG_TIMER_PRESCALE_4BITS">
        <value caption="Oscillator Cycles 2K" name="VAL_0x00" value="0x00"/>
        <value caption="Oscillator Cycles 4K" name="VAL_0x01" value="0x01"/>
        <value caption="Oscillator Cycles 8K" name="VAL_0x02" value="0x02"/>
        <value caption="Oscillator Cycles 16K" name="VAL_0x03" value="0x03"/>
        <value caption="Oscillator Cycles 32K" name="VAL_0x04" value="0x04"/>
        <value caption="Oscillator Cycles 64K" name="VAL_0x05" value="0x05"/>
        <value caption="Oscillator Cycles 128K" name="VAL_0x06" value="0x06"/>
        <value caption="Oscillator Cycles 256K" name="VAL_0x07" value="0x07"/>
        <value caption="Oscillator Cycles 512K" name="VAL_0x08" value="0x08"/>
        <value caption="Oscillator Cycles 1024K" name="VAL_0x09" value="0x09"/>
      </value-group>
    </module>
    <module caption="EEPROM" name="EEPROM">
      <register-group caption="EEPROM" name="EEPROM">
        <register caption="EEPROM Address Register Low Bytes" name="EEAR" offset="0x41" size="2" mask="0x0FFF"/>
        <register caption="EEPROM Data Register" name="EEDR" offset="0x40" size="1" mask="0xFF"/>
        <register caption="EEPROM Control Register" name="EECR" offset="0x3F" size="1">
          <bitfield caption="EEPROM Programming Mode Bits" mask="0x30" name="EEPM" values="EEP_MODE"/>
          <bitfield caption="EEPROM Ready Interrupt Enable" mask="0x08" name="EERIE"/>
          <bitfield caption="EEPROM Master Write Enable" mask="0x04" name="EEMPE"/>
          <bitfield caption="EEPROM Write Enable" mask="0x02" name="EEPE"/>
          <bitfield caption="EEPROM Read Enable" mask="0x01" name="EERE"/>
        </register>
      </register-group>
      <value-group caption="" name="EEP_MODE">
        <value caption="Erase and Write in one operation" name="VAL_0x00" value="0x00"/>
        <value caption="Erase Only" name="VAL_0x01" value="0x01"/>
        <value caption="Write Only" name="VAL_0x02" value="0x02"/>
      </value-group>
    </module>
    <module caption="Timer/Counter, 16-bit" name="TC16">
      <register-group caption="Timer/Counter, 16-bit" name="TC5">
        <register caption="Timer/Counter5 Control Register A" name="TCCR5A" offset="0x120" size="1">
          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM5A"/>
          <bitfield caption="Compare Output Mode 5B, bits" mask="0x30" name="COM5B"/>
          <bitfield caption="Compare Output Mode 5C, bits" mask="0x0C" name="COM5C"/>
          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM5"/>
        </register>
        <register caption="Timer/Counter5 Control Register B" name="TCCR5B" offset="0x121" size="1">
          <bitfield caption="Input Capture 5 Noise Canceler" mask="0x80" name="ICNC5"/>
          <bitfield caption="Input Capture 5 Edge Select" mask="0x40" name="ICES5"/>
          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM5" lsb="2"/>
          <bitfield caption="Prescaler source of Timer/Counter 5" mask="0x07" name="CS5" values="CLK_SEL_3BIT_EXT"/>
        </register>
        <register caption="Timer/Counter 5 Control Register C" name="TCCR5C" offset="0x122" size="1">
          <bitfield caption="Force Output Compare 5A" mask="0x80" name="FOC5A"/>
          <bitfield caption="Force Output Compare 5B" mask="0x40" name="FOC5B"/>
          <bitfield caption="Force Output Compare 5C" mask="0x20" name="FOC5C"/>
        </register>
        <register caption="Timer/Counter5  Bytes" name="TCNT5" offset="0x124" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter5 Output Compare Register A  Bytes" name="OCR5A" offset="0x128" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5B" offset="0x12A" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter5 Output Compare Register B  Bytes" name="OCR5C" offset="0x12C" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter5 Input Capture Register  Bytes" name="ICR5" offset="0x126" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter5 Interrupt Mask Register" name="TIMSK5" offset="0x73" size="1">
          <bitfield caption="Timer/Counter5 Input Capture Interrupt Enable" mask="0x20" name="ICIE5"/>
          <bitfield caption="Timer/Counter5 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE5C"/>
          <bitfield caption="Timer/Counter5 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE5B"/>
          <bitfield caption="Timer/Counter5 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE5A"/>
          <bitfield caption="Timer/Counter5 Overflow Interrupt Enable" mask="0x01" name="TOIE5"/>
        </register>
        <register caption="Timer/Counter5 Interrupt Flag register" name="TIFR5" offset="0x3A" size="1" ocd-rw="">
          <bitfield caption="Input Capture Flag 5" mask="0x20" name="ICF5"/>
          <bitfield caption="Output Compare Flag 5C" mask="0x08" name="OCF5C"/>
          <bitfield caption="Output Compare Flag 5B" mask="0x04" name="OCF5B"/>
          <bitfield caption="Output Compare Flag 5A" mask="0x02" name="OCF5A"/>
          <bitfield caption="Timer/Counter5 Overflow Flag" mask="0x01" name="TOV5"/>
        </register>
      </register-group>
      <register-group caption="Timer/Counter, 16-bit" name="TC4">
        <register caption="Timer/Counter4 Control Register A" name="TCCR4A" offset="0xA0" size="1">
          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM4A"/>
          <bitfield caption="Compare Output Mode 4B, bits" mask="0x30" name="COM4B"/>
          <bitfield caption="Compare Output Mode 4C, bits" mask="0x0C" name="COM4C"/>
          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM4"/>
        </register>
        <register caption="Timer/Counter4 Control Register B" name="TCCR4B" offset="0xA1" size="1">
          <bitfield caption="Input Capture 4 Noise Canceler" mask="0x80" name="ICNC4"/>
          <bitfield caption="Input Capture 4 Edge Select" mask="0x40" name="ICES4"/>
          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM4" lsb="2"/>
          <bitfield caption="Prescaler source of Timer/Counter 4" mask="0x07" name="CS4" values="CLK_SEL_3BIT_EXT"/>
        </register>
        <register caption="Timer/Counter 4 Control Register C" name="TCCR4C" offset="0xA2" size="1">
          <bitfield caption="Force Output Compare 4A" mask="0x80" name="FOC4A"/>
          <bitfield caption="Force Output Compare 4B" mask="0x40" name="FOC4B"/>
          <bitfield caption="Force Output Compare 4C" mask="0x20" name="FOC4C"/>
        </register>
        <register caption="Timer/Counter4  Bytes" name="TCNT4" offset="0xA4" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter4 Output Compare Register A  Bytes" name="OCR4A" offset="0xA8" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4B" offset="0xAA" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter4 Output Compare Register B  Bytes" name="OCR4C" offset="0xAC" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter4 Input Capture Register  Bytes" name="ICR4" offset="0xA6" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter4 Interrupt Mask Register" name="TIMSK4" offset="0x72" size="1">
          <bitfield caption="Timer/Counter4 Input Capture Interrupt Enable" mask="0x20" name="ICIE4"/>
          <bitfield caption="Timer/Counter4 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE4C"/>
          <bitfield caption="Timer/Counter4 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE4B"/>
          <bitfield caption="Timer/Counter4 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE4A"/>
          <bitfield caption="Timer/Counter4 Overflow Interrupt Enable" mask="0x01" name="TOIE4"/>
        </register>
        <register caption="Timer/Counter4 Interrupt Flag register" name="TIFR4" offset="0x39" size="1" ocd-rw="">
          <bitfield caption="Input Capture Flag 4" mask="0x20" name="ICF4"/>
          <bitfield caption="Output Compare Flag 4C" mask="0x08" name="OCF4C"/>
          <bitfield caption="Output Compare Flag 4B" mask="0x04" name="OCF4B"/>
          <bitfield caption="Output Compare Flag 4A" mask="0x02" name="OCF4A"/>
          <bitfield caption="Timer/Counter4 Overflow Flag" mask="0x01" name="TOV4"/>
        </register>
      </register-group>
      <register-group caption="Timer/Counter, 16-bit" name="TC3">
        <register caption="Timer/Counter3 Control Register A" name="TCCR3A" offset="0x90" size="1">
          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM3A"/>
          <bitfield caption="Compare Output Mode 3B, bits" mask="0x30" name="COM3B"/>
          <bitfield caption="Compare Output Mode 3C, bits" mask="0x0C" name="COM3C"/>
          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM3"/>
        </register>
        <register caption="Timer/Counter3 Control Register B" name="TCCR3B" offset="0x91" size="1">
          <bitfield caption="Input Capture 3 Noise Canceler" mask="0x80" name="ICNC3"/>
          <bitfield caption="Input Capture 3 Edge Select" mask="0x40" name="ICES3"/>
          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM3" lsb="2"/>
          <bitfield caption="Prescaler source of Timer/Counter 3" mask="0x07" name="CS3" values="CLK_SEL_3BIT_EXT"/>
        </register>
        <register caption="Timer/Counter 3 Control Register C" name="TCCR3C" offset="0x92" size="1">
          <bitfield caption="Force Output Compare 3A" mask="0x80" name="FOC3A"/>
          <bitfield caption="Force Output Compare 3B" mask="0x40" name="FOC3B"/>
          <bitfield caption="Force Output Compare 3C" mask="0x20" name="FOC3C"/>
        </register>
        <register caption="Timer/Counter3  Bytes" name="TCNT3" offset="0x94" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter3 Output Compare Register A  Bytes" name="OCR3A" offset="0x98" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3B" offset="0x9A" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter3 Output Compare Register B  Bytes" name="OCR3C" offset="0x9C" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter3 Input Capture Register  Bytes" name="ICR3" offset="0x96" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter3 Interrupt Mask Register" name="TIMSK3" offset="0x71" size="1">
          <bitfield caption="Timer/Counter3 Input Capture Interrupt Enable" mask="0x20" name="ICIE3"/>
          <bitfield caption="Timer/Counter3 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE3C"/>
          <bitfield caption="Timer/Counter3 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE3B"/>
          <bitfield caption="Timer/Counter3 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE3A"/>
          <bitfield caption="Timer/Counter3 Overflow Interrupt Enable" mask="0x01" name="TOIE3"/>
        </register>
        <register caption="Timer/Counter3 Interrupt Flag register" name="TIFR3" offset="0x38" size="1" ocd-rw="R">
          <bitfield caption="Input Capture Flag 3" mask="0x20" name="ICF3"/>
          <bitfield caption="Output Compare Flag 3C" mask="0x08" name="OCF3C"/>
          <bitfield caption="Output Compare Flag 3B" mask="0x04" name="OCF3B"/>
          <bitfield caption="Output Compare Flag 3A" mask="0x02" name="OCF3A"/>
          <bitfield caption="Timer/Counter3 Overflow Flag" mask="0x01" name="TOV3"/>
        </register>
      </register-group>
      <register-group caption="Timer/Counter, 16-bit" name="TC1">
        <register caption="Timer/Counter1 Control Register A" name="TCCR1A" offset="0x80" size="1">
          <bitfield caption="Compare Output Mode 1A, bits" mask="0xC0" name="COM1A"/>
          <bitfield caption="Compare Output Mode 1B, bits" mask="0x30" name="COM1B"/>
          <bitfield caption="Compare Output Mode 1C, bits" mask="0x0C" name="COM1C"/>
          <bitfield caption="Waveform Generation Mode" mask="0x03" name="WGM1"/>
        </register>
        <register caption="Timer/Counter1 Control Register B" name="TCCR1B" offset="0x81" size="1">
          <bitfield caption="Input Capture 1 Noise Canceler" mask="0x80" name="ICNC1"/>
          <bitfield caption="Input Capture 1 Edge Select" mask="0x40" name="ICES1"/>
          <bitfield caption="Waveform Generation Mode" mask="0x18" name="WGM1" lsb="2"/>
          <bitfield caption="Prescaler source of Timer/Counter 1" mask="0x07" name="CS1" values="CLK_SEL_3BIT_EXT"/>
        </register>
        <register caption="Timer/Counter 1 Control Register C" name="TCCR1C" offset="0x82" size="1">
          <bitfield caption="Force Output Compare 1A" mask="0x80" name="FOC1A"/>
          <bitfield caption="Force Output Compare 1B" mask="0x40" name="FOC1B"/>
          <bitfield caption="Force Output Compare 1C" mask="0x20" name="FOC1C"/>
        </register>
        <register caption="Timer/Counter1  Bytes" name="TCNT1" offset="0x84" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter1 Output Compare Register A  Bytes" name="OCR1A" offset="0x88" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter1 Output Compare Register B  Bytes" name="OCR1B" offset="0x8A" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter1 Output Compare Register C  Bytes" name="OCR1C" offset="0x8C" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter1 Input Capture Register  Bytes" name="ICR1" offset="0x86" size="2" mask="0xFFFF"/>
        <register caption="Timer/Counter1 Interrupt Mask Register" name="TIMSK1" offset="0x6F" size="1">
          <bitfield caption="Timer/Counter1 Input Capture Interrupt Enable" mask="0x20" name="ICIE1"/>
          <bitfield caption="Timer/Counter1 Output Compare C Match Interrupt Enable" mask="0x08" name="OCIE1C"/>
          <bitfield caption="Timer/Counter1 Output Compare B Match Interrupt Enable" mask="0x04" name="OCIE1B"/>
          <bitfield caption="Timer/Counter1 Output Compare A Match Interrupt Enable" mask="0x02" name="OCIE1A"/>
          <bitfield caption="Timer/Counter1 Overflow Interrupt Enable" mask="0x01" name="TOIE1"/>
        </register>
        <register caption="Timer/Counter1 Interrupt Flag register" name="TIFR1" offset="0x36" size="1" ocd-rw="R">
          <bitfield caption="Input Capture Flag 1" mask="0x20" name="ICF1"/>
          <bitfield caption="Output Compare Flag 1C" mask="0x08" name="OCF1C"/>
          <bitfield caption="Output Compare Flag 1B" mask="0x04" name="OCF1B"/>
          <bitfield caption="Output Compare Flag 1A" mask="0x02" name="OCF1A"/>
          <bitfield caption="Timer/Counter1 Overflow Flag" mask="0x01" name="TOV1"/>
        </register>
      </register-group>
      <value-group caption="" name="CLK_SEL_3BIT_EXT">
        <value caption="No Clock Source (Stopped)" name="VAL_0x00" value="0x00"/>
        <value caption="Running, No Prescaling" name="VAL_0x01" value="0x01"/>
        <value caption="Running, CLK/8" name="VAL_0x02" value="0x02"/>
        <value caption="Running, CLK/64" name="VAL_0x03" value="0x03"/>
        <value caption="Running, CLK/256" name="VAL_0x04" value="0x04"/>
        <value caption="Running, CLK/1024" name="VAL_0x05" value="0x05"/>
        <value caption="Running, ExtClk Tx Falling Edge" name="VAL_0x06" value="0x06"/>
        <value caption="Running, ExtClk Tx Rising Edge" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="JTAG Interface" name="JTAG">
      <register-group caption="JTAG Interface" name="JTAG">
        <register caption="On-Chip Debug Related Register in I/O Memory" name="OCDR" offset="0x51" size="1" mask="0xFF" ocd-rw=""/>
        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
          <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
        </register>
        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
          <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
        </register>
      </register-group>
    </module>
    <module caption="External Interrupts" name="EXINT">
      <register-group caption="External Interrupts" name="EXINT">
        <register caption="External Interrupt Control Register A" name="EICRA" offset="0x69" size="1">
          <bitfield caption="External Interrupt Sense Control Bit" mask="0xC0" name="ISC3" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt Sense Control Bit" mask="0x30" name="ISC2" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt Sense Control Bit" mask="0x0C" name="ISC1" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt Sense Control Bit" mask="0x03" name="ISC0" values="INTERRUPT_SENSE_CONTROL"/>
        </register>
        <register caption="External Interrupt Control Register B" name="EICRB" offset="0x6A" size="1">
          <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0xC0" name="ISC7" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x30" name="ISC6" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x0C" name="ISC5" values="INTERRUPT_SENSE_CONTROL"/>
          <bitfield caption="External Interrupt 7-4 Sense Control Bit" mask="0x03" name="ISC4" values="INTERRUPT_SENSE_CONTROL"/>
        </register>
        <register caption="External Interrupt Mask Register" name="EIMSK" offset="0x3D" size="1">
          <bitfield caption="External Interrupt Request 7 Enable" mask="0xFF" name="INT"/>
        </register>
        <register caption="External Interrupt Flag Register" name="EIFR" offset="0x3C" size="1" ocd-rw="R">
          <bitfield caption="External Interrupt Flags" mask="0xFF" name="INTF"/>
        </register>
        <register caption="Pin Change Mask Register 2" name="PCMSK2" offset="0x6D" size="1" mask="0xFF">
          <bitfield caption="Pin Change Enable bits" mask="0xFF" name="PCINT" lsb="16"/>
        </register>
        <register caption="Pin Change Mask Register 1" name="PCMSK1" offset="0x6C" size="1" mask="0xFF">
          <bitfield caption="Pin Change Enable bits" mask="0xFF" name="PCINT" lsb="8"/>
        </register>
        <register caption="Pin Change Mask Register 0" name="PCMSK0" offset="0x6B" size="1" mask="0xFF">
          <bitfield caption="Pin Change Enable bits" mask="0xFF" name="PCINT"/>
        </register>
        <register caption="Pin Change Interrupt Flag Register" name="PCIFR" offset="0x3B" size="1" ocd-rw="R">
          <bitfield caption="Pin Change Interrupt Flags" mask="0x07" name="PCIF"/>
        </register>
        <register caption="Pin Change Interrupt Control Register" name="PCICR" offset="0x68" size="1">
          <bitfield caption="Pin Change Interrupt Enables" mask="0x07" name="PCIE"/>
        </register>
      </register-group>
      <value-group caption="Interrupt Sense Control" name="INTERRUPT_SENSE_CONTROL">
        <value caption="Low Level of INTX" name="VAL_0x00" value="0x00"/>
        <value caption="Any Logical Change of INTX" name="VAL_0x01" value="0x01"/>
        <value caption="Falling Edge of INTX" name="VAL_0x02" value="0x02"/>
        <value caption="Rising Edge of INTX" name="VAL_0x03" value="0x03"/>
      </value-group>
    </module>
    <module caption="CPU Registers" name="CPU">
      <register-group caption="CPU Registers" name="CPU">
        <register caption="Status Register" name="SREG" offset="0x5F" size="1">
          <bitfield caption="Global Interrupt Enable" mask="0x80" name="I"/>
          <bitfield caption="Bit Copy Storage" mask="0x40" name="T"/>
          <bitfield caption="Half Carry Flag" mask="0x20" name="H"/>
          <bitfield caption="Sign Bit" mask="0x10" name="S"/>
          <bitfield caption="Two's Complement Overflow Flag" mask="0x08" name="V"/>
          <bitfield caption="Negative Flag" mask="0x04" name="N"/>
          <bitfield caption="Zero Flag" mask="0x02" name="Z"/>
          <bitfield caption="Carry Flag" mask="0x01" name="C"/>
        </register>
        <register caption="Stack Pointer " name="SP" offset="0x5D" size="2" mask="0xFFFF"/>
        <register caption="MCU Control Register" name="MCUCR" offset="0x55" size="1">
          <bitfield caption="JTAG Interface Disable" mask="0x80" name="JTD"/>
          <bitfield caption="Pull-up disable" mask="0x10" name="PUD"/>
          <bitfield caption="Interrupt Vector Select" mask="0x02" name="IVSEL"/>
          <bitfield caption="Interrupt Vector Change Enable" mask="0x01" name="IVCE"/>
        </register>
        <register caption="MCU Status Register" name="MCUSR" offset="0x54" size="1" ocd-rw="R">
          <bitfield caption="JTAG Reset Flag" mask="0x10" name="JTRF"/>
          <bitfield caption="Watchdog Reset Flag" mask="0x08" name="WDRF"/>
          <bitfield caption="Brown-out Reset Flag" mask="0x04" name="BORF"/>
          <bitfield caption="External Reset Flag" mask="0x02" name="EXTRF"/>
          <bitfield caption="Power-on reset flag" mask="0x01" name="PORF"/>
        </register>
        <register caption="External Memory Control Register A" name="XMCRA" offset="0x74" size="1">
          <bitfield caption="External SRAM Enable" mask="0x80" name="SRE"/>
          <bitfield caption="Wait state page limit" mask="0x70" name="SRL" values="CPU_SECTOR_LIMITS2"/>
          <bitfield caption="Wait state select bit upper page" mask="0x0C" name="SRW1" values="CPU_WAIT_STATES"/>
          <bitfield caption="Wait state select bit lower page" mask="0x03" name="SRW0" values="CPU_WAIT_STATES"/>
        </register>
        <register caption="External Memory Control Register B" name="XMCRB" offset="0x75" size="1">
          <bitfield caption="External Memory Bus Keeper Enable" mask="0x80" name="XMBK"/>
          <bitfield caption="External Memory High Mask" mask="0x07" name="XMM"/>
        </register>
        <register caption="Oscillator Calibration Value" name="OSCCAL" offset="0x66" size="1" mask="0xFF">
          <bitfield caption="Oscillator Calibration " mask="0xFF" name="OSCCAL"/>
        </register>
        <register caption="" name="CLKPR" offset="0x61" size="1">
          <bitfield caption="" mask="0x80" name="CLKPCE"/>
          <bitfield caption="" mask="0x0F" name="CLKPS" values="CPU_CLK_PRESCALE_4_BITS_SMALL"/>
        </register>
        <register caption="Sleep Mode Control Register" name="SMCR" offset="0x53" size="1">
          <bitfield caption="Sleep Mode Select bits" mask="0x0E" name="SM" values="CPU_SLEEP_MODE_3BITS"/>
          <bitfield caption="Sleep Enable" mask="0x01" name="SE"/>
        </register>
        <register caption="Extended Indirect Register" name="EIND" offset="0x5C" size="1" mask="0x01"/>
        <register caption="RAM Page Z Select Register" name="RAMPZ" offset="0x5B" size="1" mask="0x03"/>
        <register caption="General Purpose IO Register 2" name="GPIOR2" offset="0x4B" size="1">
          <bitfield caption="General Purpose IO Register 2 bis" mask="0xFF" name="GPIOR" lsb="20"/>
        </register>
        <register caption="General Purpose IO Register 1" name="GPIOR1" offset="0x4A" size="1">
          <bitfield caption="General Purpose IO Register 1 bis" mask="0xFF" name="GPIOR" lsb="10"/>
        </register>
        <register caption="General Purpose IO Register 0" name="GPIOR0" offset="0x3E" size="1">
          <bitfield caption="General Purpose IO Register 0 bit 7" mask="0x80" name="GPIOR07"/>
          <bitfield caption="General Purpose IO Register 0 bit 6" mask="0x40" name="GPIOR06"/>
          <bitfield caption="General Purpose IO Register 0 bit 5" mask="0x20" name="GPIOR05"/>
          <bitfield caption="General Purpose IO Register 0 bit 4" mask="0x10" name="GPIOR04"/>
          <bitfield caption="General Purpose IO Register 0 bit 3" mask="0x08" name="GPIOR03"/>
          <bitfield caption="General Purpose IO Register 0 bit 2" mask="0x04" name="GPIOR02"/>
          <bitfield caption="General Purpose IO Register 0 bit 1" mask="0x02" name="GPIOR01"/>
          <bitfield caption="General Purpose IO Register 0 bit 0" mask="0x01" name="GPIOR00"/>
        </register>
        <register caption="Power Reduction Register1" name="PRR1" offset="0x65" size="1">
          <bitfield caption="Power Reduction Timer/Counter5" mask="0x20" name="PRTIM5"/>
          <bitfield caption="Power Reduction Timer/Counter4" mask="0x10" name="PRTIM4"/>
          <bitfield caption="Power Reduction Timer/Counter3" mask="0x08" name="PRTIM3"/>
          <bitfield caption="Power Reduction USART3" mask="0x04" name="PRUSART3"/>
          <bitfield caption="Power Reduction USART2" mask="0x02" name="PRUSART2"/>
          <bitfield caption="Power Reduction USART1" mask="0x01" name="PRUSART1"/>
        </register>
        <register caption="Power Reduction Register0" name="PRR0" offset="0x64" size="1">
          <bitfield caption="Power Reduction TWI" mask="0x80" name="PRTWI"/>
          <bitfield caption="Power Reduction Timer/Counter2" mask="0x40" name="PRTIM2"/>
          <bitfield caption="Power Reduction Timer/Counter0" mask="0x20" name="PRTIM0"/>
          <bitfield caption="Power Reduction Timer/Counter1" mask="0x08" name="PRTIM1"/>
          <bitfield caption="Power Reduction Serial Peripheral Interface" mask="0x04" name="PRSPI"/>
          <bitfield caption="Power Reduction USART0" mask="0x02" name="PRUSART0"/>
          <bitfield caption="Power Reduction ADC" mask="0x01" name="PRADC"/>
        </register>
      </register-group>
      <value-group caption="" name="CPU_SECTOR_LIMITS2">
        <value caption="LS = N/A, US = 0x1100 - 0xFFFF" name="VAL_0x00" value="0x00"/>
        <value caption="LS = 0x2200 - 0x1FFF, US = 0x2000 - 0xFFFF" name="VAL_0x01" value="0x01"/>
        <value caption="LS = 0x2200 - 0x3FFF, US = 0x4000 - 0xFFFF" name="VAL_0x02" value="0x02"/>
        <value caption="LS = 0x2200 - 0x5FFF, US = 0x6000 - 0xFFFF" name="VAL_0x03" value="0x03"/>
        <value caption="LS = 0x2200 - 0x7FFF, US = 0x8000 - 0xFFFF" name="VAL_0x04" value="0x04"/>
        <value caption="LS = 0x2200 - 0x9FFF, US = 0xA000 - 0xFFFF" name="VAL_0x05" value="0x05"/>
        <value caption="LS = 0x2200 - 0xBFFF, US = 0xC000 - 0xFFFF" name="VAL_0x06" value="0x06"/>
        <value caption="LS = 0x2200 - 0xDFFF, US = 0xE000 - 0xFFFF" name="VAL_0x07" value="0x07"/>
      </value-group>
      <value-group caption="" name="CPU_WAIT_STATES">
        <value caption="No wait-states" name="VAL_0x00" value="0x00"/>
        <value caption="Wait one cycle during read/write strobe" name="VAL_0x01" value="0x01"/>
        <value caption="Wait two cycles during read/write strobe" name="VAL_0x02" value="0x02"/>
        <value caption="Wait two cycles during read/write and wait one cycle before driving out new address" name="VAL_0x03" value="0x03"/>
      </value-group>
      <value-group caption="" name="CPU_CLK_PRESCALE_4_BITS_SMALL">
        <value caption="1" name="VAL_0x00" value="0x00"/>
        <value caption="2" name="VAL_0x01" value="0x01"/>
        <value caption="4" name="VAL_0x02" value="0x02"/>
        <value caption="8" name="VAL_0x03" value="0x03"/>
        <value caption="16" name="VAL_0x04" value="0x04"/>
        <value caption="32" name="VAL_0x05" value="0x05"/>
        <value caption="64" name="VAL_0x06" value="0x06"/>
        <value caption="128" name="VAL_0x07" value="0x07"/>
        <value caption="256" name="VAL_0x08" value="0x08"/>
      </value-group>
      <value-group caption="" name="CPU_SLEEP_MODE_3BITS">
        <value caption="Idle" name="IDLE" value="0x00"/>
        <value caption="ADC Noise Reduction (If Available)" name="ADC" value="0x01"/>
        <value caption="Power Down" name="PDOWN" value="0x02"/>
        <value caption="Power Save" name="PSAVE" value="0x03"/>
        <value caption="Reserved" name="VAL_0x04" value="0x04"/>
        <value caption="Reserved" name="VAL_0x05" value="0x05"/>
        <value caption="Standby" name="STDBY" value="0x06"/>
        <value caption="Extended Standby" name="ESTDBY" value="0x07"/>
      </value-group>
      <value-group caption="Oscillator Calibration Values" name="OSCCAL_VALUE_ADDRESSES">
        <value value="0x00" caption="8.0 MHz" name="8_0_MHz"/>
      </value-group>
      <parameters>
        <param name="CORE_VERSION" value="V3"/>
      </parameters>
    </module>
    <module caption="Analog-to-Digital Converter" name="ADC">
      <register-group caption="Analog-to-Digital Converter" name="ADC">
        <register caption="The ADC multiplexer Selection Register" name="ADMUX" offset="0x7C" size="1">
          <bitfield caption="Reference Selection Bits" mask="0xC0" name="REFS" values="ANALOG_ADC_V_REF6"/>
          <bitfield caption="Left Adjust Result" mask="0x20" name="ADLAR"/>
          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x1F" name="MUX"/>
        </register>
        <register caption="ADC Data Register  Bytes" name="ADC" offset="0x78" size="2" mask="0xFFFF"/>
        <register caption="The ADC Control and Status register A" name="ADCSRA" offset="0x7A" size="1" ocd-rw="R">
          <bitfield caption="ADC Enable" mask="0x80" name="ADEN"/>
          <bitfield caption="ADC Start Conversion" mask="0x40" name="ADSC"/>
          <bitfield caption="ADC  Auto Trigger Enable" mask="0x20" name="ADATE"/>
          <bitfield caption="ADC Interrupt Flag" mask="0x10" name="ADIF"/>
          <bitfield caption="ADC Interrupt Enable" mask="0x08" name="ADIE"/>
          <bitfield caption="ADC  Prescaler Select Bits" mask="0x07" name="ADPS" values="ANALOG_ADC_PRESCALER"/>
        </register>
        <register caption="The ADC Control and Status register B" name="ADCSRB" offset="0x7B" size="1">
          <bitfield caption="" mask="0x40" name="ACME"/>
          <bitfield caption="Analog Channel and Gain Selection Bits" mask="0x08" name="MUX5"/>
          <bitfield caption="ADC Auto Trigger Source bits" mask="0x07" name="ADTS" values="ANALOG_ADC_AUTO_TRIGGER"/>
        </register>
        <register caption="Digital Input Disable Register" name="DIDR2" offset="0x7D" size="1">
          <bitfield caption="" mask="0x80" name="ADC15D"/>
          <bitfield caption="" mask="0x40" name="ADC14D"/>
          <bitfield caption="" mask="0x20" name="ADC13D"/>
          <bitfield caption="" mask="0x10" name="ADC12D"/>
          <bitfield caption="" mask="0x08" name="ADC11D"/>
          <bitfield caption="" mask="0x04" name="ADC10D"/>
          <bitfield caption="" mask="0x02" name="ADC9D"/>
          <bitfield caption="" mask="0x01" name="ADC8D"/>
        </register>
        <register caption="Digital Input Disable Register" name="DIDR0" offset="0x7E" size="1">
          <bitfield caption="" mask="0x80" name="ADC7D"/>
          <bitfield caption="" mask="0x40" name="ADC6D"/>
          <bitfield caption="" mask="0x20" name="ADC5D"/>
          <bitfield caption="" mask="0x10" name="ADC4D"/>
          <bitfield caption="" mask="0x08" name="ADC3D"/>
          <bitfield caption="" mask="0x04" name="ADC2D"/>
          <bitfield caption="" mask="0x02" name="ADC1D"/>
          <bitfield caption="" mask="0x01" name="ADC0D"/>
        </register>
      </register-group>
      <value-group caption="" name="ANALOG_ADC_V_REF6">
        <value caption="AREF, Internal Vref turned off" name="VAL_0x00" value="0x00"/>
        <value caption="AVCC with external capacitor at AREF pin" name="VAL_0x01" value="0x01"/>
        <value caption="Internal 1.1V Voltage Reference with external capacitor at AREF pin" name="VAL_0x02" value="0x02"/>
        <value caption="Internal 2.56V Voltage Reference with external capacitor at AREF pin" name="VAL_0x03" value="0x03"/>
      </value-group>
      <value-group caption="" name="ANALOG_ADC_PRESCALER">
        <value caption="2" name="VAL_0x00" value="0x00"/>
        <value caption="2" name="VAL_0x01" value="0x01"/>
        <value caption="4" name="VAL_0x02" value="0x02"/>
        <value caption="8" name="VAL_0x03" value="0x03"/>
        <value caption="16" name="VAL_0x04" value="0x04"/>
        <value caption="32" name="VAL_0x05" value="0x05"/>
        <value caption="64" name="VAL_0x06" value="0x06"/>
        <value caption="128" name="VAL_0x07" value="0x07"/>
      </value-group>
      <value-group caption="" name="ANALOG_ADC_AUTO_TRIGGER">
        <value caption="Free Running mode" name="VAL_0x00" value="0x00"/>
        <value caption="Analog Comparator" name="VAL_0x01" value="0x01"/>
        <value caption="External Interrupt Request 0" name="VAL_0x02" value="0x02"/>
        <value caption="Timer/Counter0 Compare Match A" name="VAL_0x03" value="0x03"/>
        <value caption="Timer/Counter0 Overflow" name="VAL_0x04" value="0x04"/>
        <value caption="Timer/Counter1 Compare Match B" name="VAL_0x05" value="0x05"/>
        <value caption="Timer/Counter1 Overflow" name="VAL_0x06" value="0x06"/>
        <value caption="Timer/Counter1 Capture Event" name="VAL_0x07" value="0x07"/>
      </value-group>
    </module>
    <module caption="Bootloader" name="BOOT_LOAD">
      <register-group caption="Bootloader" name="BOOT_LOAD">
        <register caption="Store Program Memory Control Register" name="SPMCSR" offset="0x57" size="1">
          <bitfield caption="SPM Interrupt Enable" mask="0x80" name="SPMIE"/>
          <bitfield caption="Read While Write Section Busy" mask="0x40" name="RWWSB"/>
          <bitfield caption="Signature Row Read" mask="0x20" name="SIGRD"/>
          <bitfield caption="Read While Write section read enable" mask="0x10" name="RWWSRE"/>
          <bitfield caption="Boot Lock Bit Set" mask="0x08" name="BLBSET"/>
          <bitfield caption="Page Write" mask="0x04" name="PGWRT"/>
          <bitfield caption="Page Erase" mask="0x02" name="PGERS"/>
          <bitfield caption="Store Program Memory Enable" mask="0x01" name="SPMEN"/>
        </register>
      </register-group>
    </module>
  </modules>
  <pinouts>
    <pinout name="TQFP">
      <pin pad="PG5" position="1"/>
      <pin pad="PE0" position="2"/>
      <pin pad="PE1" position="3"/>
      <pin pad="PE2" position="4"/>
      <pin pad="PE3" position="5"/>
      <pin pad="PE4" position="6"/>
      <pin pad="PE5" position="7"/>
      <pin pad="PE6" position="8"/>
      <pin pad="PE7" position="9"/>
      <pin pad="VCC" position="10"/>
      <pin pad="GND" position="11"/>
      <pin pad="PH0" position="12"/>
      <pin pad="PH1" position="13"/>
      <pin pad="PH2" position="14"/>
      <pin pad="PH3" position="15"/>
      <pin pad="PH4" position="16"/>
      <pin pad="PH5" position="17"/>
      <pin pad="PH6" position="18"/>
      <pin pad="PB0" position="19"/>
      <pin pad="PB1" position="20"/>
      <pin pad="PB2" position="21"/>
      <pin pad="PB3" position="22"/>
      <pin pad="PB4" position="23"/>
      <pin pad="PB5" position="24"/>
      <pin pad="PB6" position="25"/>
      <pin pad="PB7" position="26"/>
      <pin pad="PH7" position="27"/>
      <pin pad="PG3" position="28"/>
      <pin pad="PG4" position="29"/>
      <pin pad="RESET" position="30"/>
      <pin pad="VCC" position="31"/>
      <pin pad="GND" position="32"/>
      <pin pad="XTAL2" position="33"/>
      <pin pad="XTAL1" position="34"/>
      <pin pad="PL0" position="35"/>
      <pin pad="PL1" position="36"/>
      <pin pad="PL2" position="37"/>
      <pin pad="PL3" position="38"/>
      <pin pad="PL4" position="39"/>
      <pin pad="PL5" position="40"/>
      <pin pad="PL6" position="41"/>
      <pin pad="PL7" position="42"/>
      <pin pad="PD0" position="43"/>
      <pin pad="PD1" position="44"/>
      <pin pad="PD2" position="45"/>
      <pin pad="PD3" position="46"/>
      <pin pad="PD4" position="47"/>
      <pin pad="PD5" position="48"/>
      <pin pad="PD6" position="49"/>
      <pin pad="PD7" position="50"/>
      <pin pad="PG0" position="51"/>
      <pin pad="PG1" position="52"/>
      <pin pad="PC0" position="53"/>
      <pin pad="PC1" position="54"/>
      <pin pad="PC2" position="55"/>
      <pin pad="PC3" position="56"/>
      <pin pad="PC4" position="57"/>
      <pin pad="PC5" position="58"/>
      <pin pad="PC6" position="59"/>
      <pin pad="PC7" position="60"/>
      <pin pad="VCC" position="61"/>
      <pin pad="GND" position="62"/>
      <pin pad="PJ0" position="63"/>
      <pin pad="PJ1" position="64"/>
      <pin pad="PJ2" position="65"/>
      <pin pad="PJ3" position="66"/>
      <pin pad="PJ4" position="67"/>
      <pin pad="PJ5" position="68"/>
      <pin pad="PJ6" position="69"/>
      <pin pad="PG2" position="70"/>
      <pin pad="PA7" position="71"/>
      <pin pad="PA6" position="72"/>
      <pin pad="PA5" position="73"/>
      <pin pad="PA4" position="74"/>
      <pin pad="PA3" position="75"/>
      <pin pad="PA2" position="76"/>
      <pin pad="PA1" position="77"/>
      <pin pad="PA0" position="78"/>
      <pin pad="PJ7" position="79"/>
      <pin pad="VCC" position="80"/>
      <pin pad="GND" position="81"/>
      <pin pad="PK7" position="82"/>
      <pin pad="PK6" position="83"/>
      <pin pad="PK5" position="84"/>
      <pin pad="PK4" position="85"/>
      <pin pad="PK3" position="86"/>
      <pin pad="PK2" position="87"/>
      <pin pad="PK1" position="88"/>
      <pin pad="PK0" position="89"/>
      <pin pad="PF7" position="90"/>
      <pin pad="PF6" position="91"/>
      <pin pad="PF5" position="92"/>
      <pin pad="PF4" position="93"/>
      <pin pad="PF3" position="94"/>
      <pin pad="PF2" position="95"/>
      <pin pad="PF1" position="96"/>
      <pin pad="PF0" position="97"/>
      <pin pad="AREF" position="98"/>
      <pin pad="GND" position="99"/>
      <pin pad="AVCC" position="100"/>
    </pinout>
    <pinout name="CBGA">
      <pin pad="GND" position="A1"/>
      <pin pad="AVCC" position="B1"/>
      <pin pad="PE2" position="C1"/>
      <pin pad="PE3" position="D1"/>
      <pin pad="PE7" position="E1"/>
      <pin pad="VCC" position="F1"/>
      <pin pad="GND" position="G1"/>
      <pin pad="PB3" position="H1"/>
      <pin pad="PH7" position="J1"/>
      <pin pad="PB7" position="K1"/>
      <pin pad="AREF" position="A2"/>
      <pin pad="PG5" position="B2"/>
      <pin pad="PE0" position="C2"/>
      <pin pad="PE4" position="D2"/>
      <pin pad="PH0" position="E2"/>
      <pin pad="PH4" position="F2"/>
      <pin pad="PB1" position="G2"/>
      <pin pad="PB4" position="H2"/>
      <pin pad="PG3" position="J2"/>
      <pin pad="PG4" position="K2"/>
      <pin pad="PF0" position="A3"/>
      <pin pad="PF1" position="B3"/>
      <pin pad="PE1" position="C3"/>
      <pin pad="PE5" position="D3"/>
      <pin pad="PH1" position="E3"/>
      <pin pad="PH6" position="F3"/>
      <pin pad="PB2" position="G3"/>
      <pin pad="RESET" position="H3"/>
      <pin pad="PB6" position="J3"/>
      <pin pad="VCC" position="K3"/>
      <pin pad="PF2" position="A4"/>
      <pin pad="PF3" position="B4"/>
      <pin pad="PF4" position="C4"/>
      <pin pad="PE6" position="D4"/>
      <pin pad="PH3" position="E4"/>
      <pin pad="PB0" position="F4"/>
      <pin pad="PB5" position="G4"/>
      <pin pad="PL1" position="H4"/>
      <pin pad="PL0" position="J4"/>
      <pin pad="GND" position="K4"/>
      <pin pad="PF5" position="A5"/>
      <pin pad="PF6" position="B5"/>
      <pin pad="PF7" position="C5"/>
      <pin pad="PH2" position="D5"/>
      <pin pad="PH5" position="E5"/>
      <pin pad="PL4" position="F5"/>
      <pin pad="PL2" position="G5"/>
      <pin pad="PL3" position="H5"/>
      <pin pad="XTAL2" position="J5"/>
      <pin pad="XTAL1" position="K5"/>
      <pin pad="PK0" position="A6"/>
      <pin pad="PK1" position="B6"/>
      <pin pad="PK2" position="C6"/>
      <pin pad="PA4" position="D6"/>
      <pin pad="PJ6" position="E6"/>
      <pin pad="PD1" position="F6"/>
      <pin pad="PD0" position="G6"/>
      <pin pad="PL7" position="H6"/>
      <pin pad="PL6" position="J6"/>
      <pin pad="PL5" position="K6"/>
      <pin pad="PK3" position="A7"/>
      <pin pad="PK4" position="B7"/>
      <pin pad="PK5" position="C7"/>
      <pin pad="PA5" position="D7"/>
      <pin pad="PJ5" position="E7"/>
      <pin pad="PJ1" position="F7"/>
      <pin pad="PD5" position="G7"/>
      <pin pad="PD4" position="H7"/>
      <pin pad="PD3" position="J7"/>
      <pin pad="PD2" position="K7"/>
      <pin pad="PK6" position="A8"/>
      <pin pad="PK7" position="B8"/>
      <pin pad="PJ7" position="C8"/>
      <pin pad="PA6" position="D8"/>
      <pin pad="PJ4" position="E8"/>
      <pin pad="PJ0" position="F8"/>
      <pin pad="PC5" position="G8"/>
      <pin pad="PC4" position="H8"/>
      <pin pad="PC1" position="J8"/>
      <pin pad="PD6" position="K8"/>
      <pin pad="GND" position="A9"/>
      <pin pad="PA0" position="B9"/>
      <pin pad="PA1" position="C9"/>
      <pin pad="PA7" position="D9"/>
      <pin pad="PJ3" position="E9"/>
      <pin pad="PC7" position="F9"/>
      <pin pad="PC6" position="G9"/>
      <pin pad="PC3" position="H9"/>
      <pin pad="PC0" position="J9"/>
      <pin pad="PD7" position="K9"/>
      <pin pad="VCC" position="A10"/>
      <pin pad="PA2" position="B10"/>
      <pin pad="PA3" position="C10"/>
      <pin pad="PG2" position="D10"/>
      <pin pad="PJ2" position="E10"/>
      <pin pad="GND" position="F10"/>
      <pin pad="VCC" position="G10"/>
      <pin pad="PC2" position="H10"/>
      <pin pad="PG1" position="J10"/>
      <pin pad="PG0" position="K10"/>
    </pinout>
  </pinouts>
</avr-tools-device-file>
