# Example cellsmith input — the cells cited in the README.
#
#   cellsmith examples/cells.toml -o out      # -> out/cells_arcs.tcl, out/cells.v, out/cells.lib
#   cellsmith examples/cells.toml --stdout    # preview everything on stdout

[[cell]]
name = "AND2"
inputs = ["A", "B"]
[cell.outputs]
Y = "A*B"

[[cell]]
name = "C2"                    # physical cell name used in the arcs
inputs = ["A", "B"]            # ordered: defines pinlist/vector order
[cell.outputs]
Q = "A*B + Q*(A+B)"            # Q on the RHS => feedback/delayed Q (a 2-input C-element)

[[cell]]
name = "RCELEM2"
inputs = ["A", "B", "R"]
[cell.outputs]                 #   -> their arcs are emitted as `-type async`
Q = "(A*B + Q*(A+B))*!R"

[[cell]]
name = "RACELEM21"
inputs = ["M1", "M2", "P1", "P2", "C", "R"]
[cell.outputs]                 #   -> their arcs are emitted as `-type async`
Q = "(P1*P2*C+Q*(M1+M2+C))*!R"

[[cell]]
name = "SR"
inputs = ["S", "R"]
[cell.outputs]
Q  = "!(R+Qn)"                # cross-coupling: Q and Qn reference each other
Qn = "!(S+Q)"

[[cell]]
name = "MUT"
inputs = ["A", "B"]            # mutex/arbiter: grants are mutually exclusive, oscillates at A*B
[cell.outputs]                 #   -> arcs condition each grant on the other; oscillation is annotated
Qa  = "!Qb * A"
Qb  = "!Qa * B"

[[cell]]
name = "DFF"
inputs = ["CLK", "D"]
clock = ["CLK"]                # CLK is a clock: setup/hold of D is characterised w.r.t. it, and the
                               #   concomitant non_seq hazard on (CLK, D) is subsumed by the setup/hold
constraint_arcs = true         # opt in: emit the derived setup/hold constraint arcs of D w.r.t. CLK
[cell.internal]                # internal master latch: a state node with no external pin
M = "!CLK*D + CLK*M"           #   transparent when CLK low, holds when high
[cell.outputs]
Q = "CLK*M + !CLK*Q"           # slave: captures M on the rising edge (M established by the prevector)

[[cell]]
name = "ICM"
inputs = ["CLKA", "CLKB", "RA", "RB", "S"]
clock = ["CLKA", "CLKB"]

[cell.internal]
# selection interlock
sela = "!enB*!S"
selb = "!enA*S"
# CLKA synchroniser
sela1 = "!RA*(!CLKA*sela+CLKA*sela1)"
sela2 = "!RA*(CLKA*sela1+!CLKA*sela2)"
enA   = "!RA*(!CLKA*sela2+CLKA*enA)"
# CLKB synchroniser
selb1 = "!RB*(!CLKB*selb+CLKB*selb1)"
selb2 = "!RB*(CLKB*selb1+!CLKB*selb2)"
enB   = "!RB*(!CLKB*selb2+CLKB*enB)"
[cell.outputs]
GCLK = "enA*CLKA+enB*CLKB"

[[cell]]
name = "C2GATE"               # gate-level C-element: complementary internals collapse to one bit
inputs = ["A", "B"]
[cell.internal]
IQ = "!QN"
QN = "!(A*B + IQ*(A+B))"
[cell.outputs]
Q = "!QN"                      # must minimise to the single coordinate Q, delta_Q = A*B + Q*(A+B)
