#![doc = "Peripheral access API for ESP32-C3 microcontrollers (generated using svd2rust v0.37.1 (f74f0b3 2026-04-17))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.37.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
#![allow(non_camel_case_types)]
#![allow(non_snake_case)]
#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
#![no_std]
#![cfg_attr(docsrs, feature(doc_cfg))]
#[doc = r"Number available in the NVIC for configuring priority"]
pub const NVIC_PRIO_BITS: u8 = 0;
#[allow(unused_imports)]
use generic::*;
#[doc = r"Common register and bit access and modify traits"]
pub mod generic;
#[cfg(feature = "rt")]
extern "C" {
    fn WIFI_MAC();
    fn WIFI_MAC_NMI();
    fn WIFI_PWR();
    fn WIFI_BB();
    fn BT_MAC();
    fn BT_BB();
    fn BT_BB_NMI();
    fn RWBT();
    fn RWBLE();
    fn RWBT_NMI();
    fn RWBLE_NMI();
    fn I2C_MASTER();
    fn SLC0();
    fn SLC1();
    fn APB_CTRL();
    fn UHCI0();
    fn GPIO();
    fn GPIO_NMI();
    fn SPI1();
    fn SPI2();
    fn I2S0();
    fn UART0();
    fn UART1();
    fn LEDC();
    fn EFUSE();
    fn TWAI0();
    fn USB_DEVICE();
    fn RTC_CORE();
    fn RMT();
    fn I2C_EXT0();
    fn TIMER1();
    fn TIMER2();
    fn TG0_T0_LEVEL();
    fn TG0_WDT_LEVEL();
    fn TG1_T0_LEVEL();
    fn TG1_WDT_LEVEL();
    fn CACHE_IA();
    fn SYSTIMER_TARGET0();
    fn SYSTIMER_TARGET1();
    fn SYSTIMER_TARGET2();
    fn SPI_MEM_REJECT_CACHE();
    fn ICACHE_PRELOAD0();
    fn ICACHE_SYNC0();
    fn APB_ADC();
    fn DMA_CH0();
    fn DMA_CH1();
    fn DMA_CH2();
    fn RSA();
    fn AES();
    fn SHA();
    fn FROM_CPU_INTR0();
    fn FROM_CPU_INTR1();
    fn FROM_CPU_INTR2();
    fn FROM_CPU_INTR3();
    fn ASSIST_DEBUG();
    fn DMA_APBPERI_PMS();
    fn CORE0_IRAM0_PMS();
    fn CORE0_DRAM0_PMS();
    fn CORE0_PIF_PMS();
    fn CORE0_PIF_PMS_SIZE();
    fn BAK_PMS_VIOLATE();
    fn CACHE_CORE0_ACS();
}
#[doc(hidden)]
#[repr(C)]
pub union Vector {
    pub _handler: unsafe extern "C" fn(),
    pub _reserved: usize,
}
#[cfg(feature = "rt")]
#[doc(hidden)]
#[link_section = ".rwtext"]
#[no_mangle]
pub static __EXTERNAL_INTERRUPTS: [Vector; 62] = [
    Vector { _handler: WIFI_MAC },
    Vector {
        _handler: WIFI_MAC_NMI,
    },
    Vector { _handler: WIFI_PWR },
    Vector { _handler: WIFI_BB },
    Vector { _handler: BT_MAC },
    Vector { _handler: BT_BB },
    Vector {
        _handler: BT_BB_NMI,
    },
    Vector { _handler: RWBT },
    Vector { _handler: RWBLE },
    Vector { _handler: RWBT_NMI },
    Vector {
        _handler: RWBLE_NMI,
    },
    Vector {
        _handler: I2C_MASTER,
    },
    Vector { _handler: SLC0 },
    Vector { _handler: SLC1 },
    Vector { _handler: APB_CTRL },
    Vector { _handler: UHCI0 },
    Vector { _handler: GPIO },
    Vector { _handler: GPIO_NMI },
    Vector { _handler: SPI1 },
    Vector { _handler: SPI2 },
    Vector { _handler: I2S0 },
    Vector { _handler: UART0 },
    Vector { _handler: UART1 },
    Vector { _handler: LEDC },
    Vector { _handler: EFUSE },
    Vector { _handler: TWAI0 },
    Vector {
        _handler: USB_DEVICE,
    },
    Vector { _handler: RTC_CORE },
    Vector { _handler: RMT },
    Vector { _handler: I2C_EXT0 },
    Vector { _handler: TIMER1 },
    Vector { _handler: TIMER2 },
    Vector {
        _handler: TG0_T0_LEVEL,
    },
    Vector {
        _handler: TG0_WDT_LEVEL,
    },
    Vector {
        _handler: TG1_T0_LEVEL,
    },
    Vector {
        _handler: TG1_WDT_LEVEL,
    },
    Vector { _handler: CACHE_IA },
    Vector {
        _handler: SYSTIMER_TARGET0,
    },
    Vector {
        _handler: SYSTIMER_TARGET1,
    },
    Vector {
        _handler: SYSTIMER_TARGET2,
    },
    Vector {
        _handler: SPI_MEM_REJECT_CACHE,
    },
    Vector {
        _handler: ICACHE_PRELOAD0,
    },
    Vector {
        _handler: ICACHE_SYNC0,
    },
    Vector { _handler: APB_ADC },
    Vector { _handler: DMA_CH0 },
    Vector { _handler: DMA_CH1 },
    Vector { _handler: DMA_CH2 },
    Vector { _handler: RSA },
    Vector { _handler: AES },
    Vector { _handler: SHA },
    Vector {
        _handler: FROM_CPU_INTR0,
    },
    Vector {
        _handler: FROM_CPU_INTR1,
    },
    Vector {
        _handler: FROM_CPU_INTR2,
    },
    Vector {
        _handler: FROM_CPU_INTR3,
    },
    Vector {
        _handler: ASSIST_DEBUG,
    },
    Vector {
        _handler: DMA_APBPERI_PMS,
    },
    Vector {
        _handler: CORE0_IRAM0_PMS,
    },
    Vector {
        _handler: CORE0_DRAM0_PMS,
    },
    Vector {
        _handler: CORE0_PIF_PMS,
    },
    Vector {
        _handler: CORE0_PIF_PMS_SIZE,
    },
    Vector {
        _handler: BAK_PMS_VIOLATE,
    },
    Vector {
        _handler: CACHE_CORE0_ACS,
    },
];
#[doc(hidden)]
pub mod interrupt;
pub use self::interrupt::Interrupt;
#[doc = "AES (Advanced Encryption Standard) Accelerator"]
pub type AES = crate::Periph<aes::RegisterBlock, 0x6003_a000>;
impl core::fmt::Debug for AES {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("AES").finish()
    }
}
#[doc = "AES (Advanced Encryption Standard) Accelerator"]
pub mod aes;
#[doc = "APB (Advanced Peripheral Bus) Controller"]
pub type APB_CTRL = crate::Periph<apb_ctrl::RegisterBlock, 0x6002_6000>;
impl core::fmt::Debug for APB_CTRL {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("APB_CTRL").finish()
    }
}
#[doc = "APB (Advanced Peripheral Bus) Controller"]
pub mod apb_ctrl;
#[doc = "SAR (Successive Approximation Register) Analog-to-Digital Converter"]
pub type APB_SARADC = crate::Periph<apb_saradc::RegisterBlock, 0x6004_0000>;
impl core::fmt::Debug for APB_SARADC {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("APB_SARADC").finish()
    }
}
#[doc = "SAR (Successive Approximation Register) Analog-to-Digital Converter"]
pub mod apb_saradc;
#[doc = "Debug Assist"]
pub type ASSIST_DEBUG = crate::Periph<assist_debug::RegisterBlock, 0x600c_e000>;
impl core::fmt::Debug for ASSIST_DEBUG {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("ASSIST_DEBUG").finish()
    }
}
#[doc = "Debug Assist"]
pub mod assist_debug;
#[doc = "BB Peripheral"]
pub type BB = crate::Periph<bb::RegisterBlock, 0x6001_d000>;
impl core::fmt::Debug for BB {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("BB").finish()
    }
}
#[doc = "BB Peripheral"]
pub mod bb;
#[doc = "DMA (Direct Memory Access) Controller"]
pub type DMA = crate::Periph<dma::RegisterBlock, 0x6003_f000>;
impl core::fmt::Debug for DMA {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DMA").finish()
    }
}
#[doc = "DMA (Direct Memory Access) Controller"]
pub mod dma;
#[doc = "Digital Signature"]
pub type DS = crate::Periph<ds::RegisterBlock, 0x6003_d000>;
impl core::fmt::Debug for DS {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DS").finish()
    }
}
#[doc = "Digital Signature"]
pub mod ds;
#[doc = "eFuse Controller"]
pub type EFUSE = crate::Periph<efuse::RegisterBlock, 0x6000_8800>;
impl core::fmt::Debug for EFUSE {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("EFUSE").finish()
    }
}
#[doc = "eFuse Controller"]
pub mod efuse;
#[doc = "External Memory"]
pub type EXTMEM = crate::Periph<extmem::RegisterBlock, 0x600c_4000>;
impl core::fmt::Debug for EXTMEM {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("EXTMEM").finish()
    }
}
#[doc = "External Memory"]
pub mod extmem;
#[doc = "General Purpose Input/Output"]
pub type GPIO = crate::Periph<gpio::RegisterBlock, 0x6000_4000>;
impl core::fmt::Debug for GPIO {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("GPIO").finish()
    }
}
#[doc = "General Purpose Input/Output"]
pub mod gpio;
#[doc = "Sigma-Delta Modulation"]
pub type GPIO_SD = crate::Periph<gpio_sd::RegisterBlock, 0x6000_4f00>;
impl core::fmt::Debug for GPIO_SD {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("GPIO_SD").finish()
    }
}
#[doc = "Sigma-Delta Modulation"]
pub mod gpio_sd;
#[doc = "need des"]
pub type FE2 = crate::Periph<fe2::RegisterBlock, 0x6000_5000>;
impl core::fmt::Debug for FE2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("FE2").finish()
    }
}
#[doc = "need des"]
pub mod fe2;
#[doc = "need des"]
pub type FE = crate::Periph<fe::RegisterBlock, 0x6000_6000>;
impl core::fmt::Debug for FE {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("FE").finish()
    }
}
#[doc = "need des"]
pub mod fe;
#[doc = "HMAC (Hash-based Message Authentication Code) Accelerator"]
pub type HMAC = crate::Periph<hmac::RegisterBlock, 0x6003_e000>;
impl core::fmt::Debug for HMAC {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("HMAC").finish()
    }
}
#[doc = "HMAC (Hash-based Message Authentication Code) Accelerator"]
pub mod hmac;
#[doc = "I2C (Inter-Integrated Circuit) Controller 0"]
pub type I2C0 = crate::Periph<i2c0::RegisterBlock, 0x6001_3000>;
impl core::fmt::Debug for I2C0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("I2C0").finish()
    }
}
#[doc = "I2C (Inter-Integrated Circuit) Controller 0"]
pub mod i2c0;
#[doc = "I2S (Inter-IC Sound) Controller 0"]
pub type I2S0 = crate::Periph<i2s0::RegisterBlock, 0x6002_d000>;
impl core::fmt::Debug for I2S0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("I2S0").finish()
    }
}
#[doc = "I2S (Inter-IC Sound) Controller 0"]
pub mod i2s0;
#[doc = "Interrupt Controller (Core 0)"]
pub type INTERRUPT_CORE0 = crate::Periph<interrupt_core0::RegisterBlock, 0x600c_2000>;
impl core::fmt::Debug for INTERRUPT_CORE0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("INTERRUPT_CORE0").finish()
    }
}
#[doc = "Interrupt Controller (Core 0)"]
pub mod interrupt_core0;
#[doc = "Input/Output Multiplexer"]
pub type IO_MUX = crate::Periph<io_mux::RegisterBlock, 0x6000_9000>;
impl core::fmt::Debug for IO_MUX {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("IO_MUX").finish()
    }
}
#[doc = "Input/Output Multiplexer"]
pub mod io_mux;
#[doc = "I2C_MST_ANA Peripheral"]
pub type I2C_ANA_MST = crate::Periph<i2c_ana_mst::RegisterBlock, 0x6000_e040>;
impl core::fmt::Debug for I2C_ANA_MST {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("I2C_ANA_MST").finish()
    }
}
#[doc = "I2C_MST_ANA Peripheral"]
pub mod i2c_ana_mst;
#[doc = "LED Control PWM (Pulse Width Modulation)"]
pub type LEDC = crate::Periph<ledc::RegisterBlock, 0x6001_9000>;
impl core::fmt::Debug for LEDC {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("LEDC").finish()
    }
}
#[doc = "LED Control PWM (Pulse Width Modulation)"]
pub mod ledc;
#[doc = "NRX Peripheral"]
pub type NRX = crate::Periph<nrx::RegisterBlock, 0x6001_cc00>;
impl core::fmt::Debug for NRX {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("NRX").finish()
    }
}
#[doc = "NRX Peripheral"]
pub mod nrx;
#[doc = "Remote Control"]
pub type RMT = crate::Periph<rmt::RegisterBlock, 0x6001_6000>;
impl core::fmt::Debug for RMT {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("RMT").finish()
    }
}
#[doc = "Remote Control"]
pub mod rmt;
#[doc = "Hardware Random Number Generator"]
pub type RNG = crate::Periph<rng::RegisterBlock, 0x6002_6000>;
impl core::fmt::Debug for RNG {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("RNG").finish()
    }
}
#[doc = "Hardware Random Number Generator"]
pub mod rng;
#[doc = "RSA (Rivest Shamir Adleman) Accelerator"]
pub type RSA = crate::Periph<rsa::RegisterBlock, 0x6003_c000>;
impl core::fmt::Debug for RSA {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("RSA").finish()
    }
}
#[doc = "RSA (Rivest Shamir Adleman) Accelerator"]
pub mod rsa;
#[doc = "Real-Time Clock Control"]
pub type RTC_CNTL = crate::Periph<rtc_cntl::RegisterBlock, 0x6000_8000>;
impl core::fmt::Debug for RTC_CNTL {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("RTC_CNTL").finish()
    }
}
#[doc = "Real-Time Clock Control"]
pub mod rtc_cntl;
#[doc = "SENSITIVE Peripheral"]
pub type SENSITIVE = crate::Periph<sensitive::RegisterBlock, 0x600c_1000>;
impl core::fmt::Debug for SENSITIVE {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SENSITIVE").finish()
    }
}
#[doc = "SENSITIVE Peripheral"]
pub mod sensitive;
#[doc = "SHA (Secure Hash Algorithm) Accelerator"]
pub type SHA = crate::Periph<sha::RegisterBlock, 0x6003_b000>;
impl core::fmt::Debug for SHA {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SHA").finish()
    }
}
#[doc = "SHA (Secure Hash Algorithm) Accelerator"]
pub mod sha;
#[doc = "SPI (Serial Peripheral Interface) Controller 0"]
pub type SPI0 = crate::Periph<spi0::RegisterBlock, 0x6000_3000>;
impl core::fmt::Debug for SPI0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SPI0").finish()
    }
}
#[doc = "SPI (Serial Peripheral Interface) Controller 0"]
pub mod spi0;
#[doc = "SPI (Serial Peripheral Interface) Controller 1"]
pub type SPI1 = crate::Periph<spi1::RegisterBlock, 0x6000_2000>;
impl core::fmt::Debug for SPI1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SPI1").finish()
    }
}
#[doc = "SPI (Serial Peripheral Interface) Controller 1"]
pub mod spi1;
#[doc = "SPI (Serial Peripheral Interface) Controller 2"]
pub type SPI2 = crate::Periph<spi2::RegisterBlock, 0x6002_4000>;
impl core::fmt::Debug for SPI2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SPI2").finish()
    }
}
#[doc = "SPI (Serial Peripheral Interface) Controller 2"]
pub mod spi2;
#[doc = "System Configuration Registers"]
pub type SYSTEM = crate::Periph<system::RegisterBlock, 0x600c_0000>;
impl core::fmt::Debug for SYSTEM {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SYSTEM").finish()
    }
}
#[doc = "System Configuration Registers"]
pub mod system;
#[doc = "System Timer"]
pub type SYSTIMER = crate::Periph<systimer::RegisterBlock, 0x6002_3000>;
impl core::fmt::Debug for SYSTIMER {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SYSTIMER").finish()
    }
}
#[doc = "System Timer"]
pub mod systimer;
#[doc = "Timer Group 0"]
pub type TIMG0 = crate::Periph<timg0::RegisterBlock, 0x6001_f000>;
impl core::fmt::Debug for TIMG0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("TIMG0").finish()
    }
}
#[doc = "Timer Group 0"]
pub mod timg0;
#[doc = "Timer Group 1"]
pub type TIMG1 = crate::Periph<timg0::RegisterBlock, 0x6002_0000>;
impl core::fmt::Debug for TIMG1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("TIMG1").finish()
    }
}
#[doc = "Timer Group 1"]
pub use self::timg0 as timg1;
#[doc = "Two-Wire Automotive Interface"]
pub type TWAI0 = crate::Periph<twai0::RegisterBlock, 0x6002_b000>;
impl core::fmt::Debug for TWAI0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("TWAI0").finish()
    }
}
#[doc = "Two-Wire Automotive Interface"]
pub mod twai0;
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 0"]
pub type UART0 = crate::Periph<uart0::RegisterBlock, 0x6000_0000>;
impl core::fmt::Debug for UART0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("UART0").finish()
    }
}
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 0"]
pub mod uart0;
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 1"]
pub type UART1 = crate::Periph<uart0::RegisterBlock, 0x6001_0000>;
impl core::fmt::Debug for UART1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("UART1").finish()
    }
}
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 1"]
pub use self::uart0 as uart1;
#[doc = "Universal Host Controller Interface 0"]
pub type UHCI0 = crate::Periph<uhci0::RegisterBlock, 0x6001_4000>;
impl core::fmt::Debug for UHCI0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("UHCI0").finish()
    }
}
#[doc = "Universal Host Controller Interface 0"]
pub mod uhci0;
#[doc = "Full-speed USB Serial/JTAG Controller"]
pub type USB_DEVICE = crate::Periph<usb_device::RegisterBlock, 0x6004_3000>;
impl core::fmt::Debug for USB_DEVICE {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("USB_DEVICE").finish()
    }
}
#[doc = "Full-speed USB Serial/JTAG Controller"]
pub mod usb_device;
#[doc = "XTS-AES-128 Flash Encryption"]
pub type XTS_AES = crate::Periph<xts_aes::RegisterBlock, 0x600c_c000>;
impl core::fmt::Debug for XTS_AES {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("XTS_AES").finish()
    }
}
#[doc = "XTS-AES-128 Flash Encryption"]
pub mod xts_aes;
