# QEMU Tests for exp-rs

This directory contains tests that run in QEMU to validate exp-rs on ARM Cortex-M7 hardware.

## Test Types

1. **FFI Test (`test_ffi.c`)**: Tests the basic FFI interface to exp-rs.
2. **EvalContext Test (`eval_context.c`)**: Tests the EvalContext functionality.
3. **Benchmark Test (`benchmark.c`)**: Benchmarks expression evaluation performance in QEMU, comparing:
   - Native C implementations
   - exp-rs with a reused context
   - exp-rs with a fresh context for each evaluation
4. **CMSIS6-DSP Test (`cmsis_dsp_test.c`)**: Demonstrates and tests integration with CMSIS6-DSP functions when using the `no-builtin-math` feature. This includes support for 64-bit FPU operations.

## Running the Tests

### Prerequisites

- QEMU installed with ARM support
- Meson build system
- Ninja build tool
- ARM GCC toolchain

### Build and Run

From the root of the project:

```bash
# Configure the build
meson setup build --cross-file qemu_test/qemu_harness/arm-cortex-m7-qemu.ini

# Build all tests
ninja -C build

# Run all tests
meson test -C build

# Run a specific test
meson test -C build test_ffi
meson test -C build test_eval_context
meson test -C build test_benchmark
meson test -C build test_cmsis_dsp
```

## CMSIS6-DSP Integration

The CMSIS6-DSP test demonstrates how to use exp-rs with custom math functions from the CMSIS6-DSP library when compiled with the `no-builtin-math` feature. It shows:

1. How to register CMSIS6-DSP functions with an exp-rs context
2. How to evaluate expressions using these functions
3. Performance benchmarks comparing to native implementations

### CMSIS6 Features

CMSIS6-DSP provides significant enhancements over previous versions:

- **64-bit FPU Support**: Full support for 64-bit floating point operations for higher precision
- **16-bit FPU Support**: Optimized half-precision floating point for faster performance when high precision is not needed
- **MVE (M-Profile Vector Extension)**: Optimized vector operations for ARMv8.1-M architecture
- **Auto-vectorization**: Improved compiler hints for automatic SIMD optimization

### About CMSIS-DSP Integration

This test demonstrates how to use CMSIS-DSP functions with the exp-rs library to access optimized math functions for ARM Cortex-M7.

> **IMPORTANT**: The `exp_rs.h` header file is automatically generated by cbindgen during the Rust build process. When you run `cargo build`, cbindgen reads the Rust code annotations and generates the C header file with all the necessary FFI function declarations and type definitions.

The test uses the actual CMSIS-DSP library directly from ARM's GitHub repository:
- CMSIS-DSP is downloaded automatically using Meson's wrap system
- The library is compiled with 64-bit FPU support (via MVE extensions)
- Half-precision float (fp16) support is also enabled for better performance

#### How it works

1. When you run `meson setup build`, Meson automatically:
   - Downloads CMSIS-DSP from GitHub
   - Applies our meson.build patch
   - Builds the CMSIS-DSP library with the appropriate flags

2. The test demonstrates:
   - How to call CMSIS-DSP functions directly from C
   - How to create wrapper functions to integrate with exp-rs
   - Performance comparison between standard C math and CMSIS-DSP

3. Future enhancements would include:
   - Extending exp_rs.h to expose function registration APIs
   - Exposing parameter setting functionality
   - Adding direct support for CMSIS-DSP's optimized math functions

In a real implementation, you would:

1. Include the actual CMSIS6-DSP library in your build
2. Use the real CMSIS6-DSP headers and implementation
3. Link against the CMSIS6-DSP library
4. Enable the specific optimizations needed (64-bit, 16-bit, MVE)

### Enabling No-builtin-math Feature

When building exp-rs to use with CMSIS6-DSP, enable the `no-builtin-math` feature:

```bash
# In your Cargo.toml
[dependencies]
exp-rs = { version = "0.1.0", features = ["f32", "no-builtin-math"] }
```

This disables the built-in math functions in exp-rs, allowing you to register your own CMSIS6-DSP implementations.