/* automatically generated by rust-bindgen 0.72.1 */

pub const EMB_CMP1_DISABLE: u32 = 0;
pub const EMB_CMP2_DISABLE: u32 = 0;
pub const EMB_CMP3_DISABLE: u32 = 0;
pub const EMB_CMP4_DISABLE: u32 = 0;
pub const EMB_CMP1_ENABLE: u32 = 1;
pub const EMB_CMP2_ENABLE: u32 = 2;
pub const EMB_CMP3_ENABLE: u32 = 4;
pub const EMB_CMP4_ENABLE: u32 = 8;
pub const EMB_OSC_DISABLE: u32 = 0;
pub const EMB_OSC_ENABLE: u32 = 134217728;
pub const EMB_SRAM_ECC_ERR_DISABLE: u32 = 0;
pub const EMB_SRAM_ECC_ERR_ENABLE: u32 = 268435456;
pub const EMB_SRAM_PARITY_ERR_DISABLE: u32 = 0;
pub const EMB_SRAM_PARITY_ERR_ENABLE: u32 = 536870912;
pub const EMB_LOCKUP_DISABLE: u32 = 0;
pub const EMB_LOCKUP_ENABLE: u32 = 1073741824;
pub const EMB_LVD_DISABLE: u32 = 0;
pub const EMB_LVD_ENABLE: u32 = 2147483648;
pub const EMB_TMR4_PWM_X_DISABLE: u32 = 0;
pub const EMB_TMR4_PWM_W_DISABLE: u32 = 0;
pub const EMB_TMR4_PWM_V_DISABLE: u32 = 0;
pub const EMB_TMR4_PWM_U_DISABLE: u32 = 0;
pub const EMB_TMR4_PWM_X_ENABLE: u32 = 256;
pub const EMB_TMR4_PWM_W_ENABLE: u32 = 32;
pub const EMB_TMR4_PWM_V_ENABLE: u32 = 64;
pub const EMB_TMR4_PWM_U_ENABLE: u32 = 128;
pub const EMB_DETECT_TMR4_PWM_X_BOTH_LOW: u32 = 0;
pub const EMB_DETECT_TMR4_PWM_W_BOTH_LOW: u32 = 0;
pub const EMB_DETECT_TMR4_PWM_V_BOTH_LOW: u32 = 0;
pub const EMB_DETECT_TMR4_PWM_U_BOTH_LOW: u32 = 0;
pub const EMB_DETECT_TMR4_PWM_X_BOTH_HIGH: u32 = 8;
pub const EMB_DETECT_TMR4_PWM_W_BOTH_HIGH: u32 = 1;
pub const EMB_DETECT_TMR4_PWM_V_BOTH_HIGH: u32 = 2;
pub const EMB_DETECT_TMR4_PWM_U_BOTH_HIGH: u32 = 4;
pub const EMB_TMR6_1_PWM_DISABLE: u32 = 0;
pub const EMB_TMR6_2_PWM_DISABLE: u32 = 0;
pub const EMB_TMR6_1_PWM_ENABLE: u32 = 32;
pub const EMB_TMR6_2_PWM_ENABLE: u32 = 64;
pub const EMB_DETECT_TMR6_1_PWM_BOTH_LOW: u32 = 0;
pub const EMB_DETECT_TMR6_2_PWM_BOTH_LOW: u32 = 0;
pub const EMB_DETECT_TMR6_1_PWM_BOTH_HIGH: u32 = 1;
pub const EMB_DETECT_TMR6_2_PWM_BOTH_HIGH: u32 = 2;
pub const EMB_PORT1_DISABLE: u32 = 0;
pub const EMB_PORT2_DISABLE: u32 = 0;
pub const EMB_PORT3_DISABLE: u32 = 0;
pub const EMB_PORT4_DISABLE: u32 = 0;
pub const EMB_PORT1_ENABLE: u32 = 65536;
pub const EMB_PORT2_ENABLE: u32 = 131072;
pub const EMB_PORT3_ENABLE: u32 = 262144;
pub const EMB_PORT4_ENABLE: u32 = 524288;
pub const EMB_PORT1_DETECT_LVL_HIGH: u32 = 0;
pub const EMB_PORT2_DETECT_LVL_HIGH: u32 = 0;
pub const EMB_PORT3_DETECT_LVL_HIGH: u32 = 0;
pub const EMB_PORT4_DETECT_LVL_HIGH: u32 = 0;
pub const EMB_PORT1_DETECT_LVL_LOW: u32 = 4194304;
pub const EMB_PORT2_DETECT_LVL_LOW: u32 = 8388608;
pub const EMB_PORT3_DETECT_LVL_LOW: u32 = 16777216;
pub const EMB_PORT4_DETECT_LVL_LOW: u32 = 33554432;
pub const EMB_PORT1_FILTER_DISABLE: u32 = 0;
pub const EMB_PORT2_FILTER_DISABLE: u32 = 0;
pub const EMB_PORT3_FILTER_DISABLE: u32 = 0;
pub const EMB_PORT4_FILTER_DISABLE: u32 = 0;
pub const EMB_PORT1_FILTER_ENABLE: u32 = 262144;
pub const EMB_PORT2_FILTER_ENABLE: u32 = 2097152;
pub const EMB_PORT3_FILTER_ENABLE: u32 = 16777216;
pub const EMB_PORT4_FILTER_ENABLE: u32 = 134217728;
pub const EMB_PORT1_FILTER_CLK_DIV1: u32 = 0;
pub const EMB_PORT1_FILTER_CLK_DIV8: u32 = 65536;
pub const EMB_PORT1_FILTER_CLK_DIV32: u32 = 131072;
pub const EMB_PORT1_FILTER_CLK_DIV128: u32 = 196608;
pub const EMB_PORT2_FILTER_CLK_DIV1: u32 = 0;
pub const EMB_PORT2_FILTER_CLK_DIV8: u32 = 524288;
pub const EMB_PORT2_FILTER_CLK_DIV32: u32 = 1048576;
pub const EMB_PORT2_FILTER_CLK_DIV128: u32 = 1572864;
pub const EMB_PORT3_FILTER_CLK_DIV1: u32 = 0;
pub const EMB_PORT3_FILTER_CLK_DIV8: u32 = 4194304;
pub const EMB_PORT3_FILTER_CLK_DIV32: u32 = 8388608;
pub const EMB_PORT3_FILTER_CLK_DIV128: u32 = 12582912;
pub const EMB_PORT4_FILTER_CLK_DIV1: u32 = 0;
pub const EMB_PORT4_FILTER_CLK_DIV8: u32 = 33554432;
pub const EMB_PORT4_FILTER_CLK_DIV32: u32 = 67108864;
pub const EMB_PORT4_FILTER_CLK_DIV128: u32 = 100663296;
pub const EMB_FLAG_PWMS: u32 = 2;
pub const EMB_FLAG_CMP: u32 = 4;
pub const EMB_FLAG_SYS: u32 = 8;
pub const EMB_FLAG_PORT1: u32 = 256;
pub const EMB_FLAG_PORT2: u32 = 512;
pub const EMB_FLAG_PORT3: u32 = 1024;
pub const EMB_FLAG_PORT4: u32 = 2048;
pub const EMB_STAT_PWMS: u32 = 32;
pub const EMB_STAT_CMP: u32 = 64;
pub const EMB_STAT_SYS: u32 = 128;
pub const EMB_STAT_PORT1: u32 = 16384;
pub const EMB_STAT_PORT2: u32 = 32768;
pub const EMB_STAT_PORT3: u32 = 65536;
pub const EMB_STAT_PORT4: u32 = 131072;
pub const EMB_FLAG_ALL: u32 = 249838;
pub const EMB_FLAG_CLR_ALL: u32 = 3854;
pub const EMB_INT_PWMS: u32 = 2;
pub const EMB_INT_CMP: u32 = 4;
pub const EMB_INT_SYS: u32 = 8;
pub const EMB_INT_PORT1: u32 = 256;
pub const EMB_INT_PORT2: u32 = 512;
pub const EMB_INT_PORT3: u32 = 1024;
pub const EMB_INT_PORT4: u32 = 2048;
pub const EMB_INT_ALL: u32 = 3854;
pub const EMB_RELEASE_PWM_COND_FLAG_ZERO: u32 = 0;
pub const EMB_RELEASE_PWM_COND_STAT_ZERO: u32 = 1;
pub const EMB_EVT_PWMS: u32 = 2;
pub const EMB_EVT_CMP: u32 = 4;
pub const EMB_EVT_SYS: u32 = 8;
pub const EMB_EVT_PORT1: u32 = 256;
pub const EMB_EVT_PORT2: u32 = 512;
pub const EMB_EVT_PORT3: u32 = 1024;
pub const EMB_EVT_PORT4: u32 = 2048;
pub const EMB_EVT_ALL: u32 = 3854;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " @brief EMB"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct CM_EMB_TypeDef {
    pub CTL1: u32,
    pub CTL2: u32,
    pub SOE: u32,
    pub STAT: u32,
    pub STATCLR: u32,
    pub INTEN: u32,
    pub RLSSEL: u32,
}
#[doc = " @brief EMB monitor system exception configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_monitor_sys_t {
    #[doc = "< Enable or disable EMB detect OSC failure function\nThis parameter can be a value of @ref EMB_OSC_Selection"]
    pub u32Osc: u32,
    #[doc = "< EMB detect SRAM ECC error function\nThis parameter can be a value of @ref EMB_SRAM_ECC_Error_Selection"]
    pub u32SramEccError: u32,
    #[doc = "< EMB detect SRAM parity error function\nThis parameter can be a value of @ref EMB_SRAM_Parity_Error_Selection"]
    pub u32SramParityError: u32,
    #[doc = "< EMB detect lockup function\nThis parameter can be a value of @ref EMB_Lockup_Selection"]
    pub u32Lockup: u32,
    #[doc = "< EMB detect LVD function\nThis parameter can be a value of @ref EMB_LVD_Selection"]
    pub u32Lvd: u32,
}
#[doc = " @brief EMB monitor EMB port configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_monitor_port_config_t {
    #[doc = "< Enable or disable EMB detect port in control function\nThis parameter can be a value of @ref EMB_Port_Selection"]
    pub u32PortState: u32,
    #[doc = "< EMB detect port level\nThis parameter can be a value of @ref EMB_Detect_Port_Level"]
    pub u32PortLevel: u32,
    #[doc = "< EMB port filter division\nThis parameter can be a value of @ref EMB_Port_Filter_Clock_Division"]
    pub u32PortFilterDiv: u32,
    #[doc = "< Enable or disable EMB detect port filter in control function\nThis parameter can be a value of @ref EMB_Port_Filter_Selection"]
    pub u32PortFilterState: u32,
}
#[doc = " @brief EMB monitor PWM configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_monitor_tmr_pwm_t {
    #[doc = "< Enable or disable EMB detect timer same phase function\nThis parameter can be a value of @ref EMB_Detect_PWM state."]
    pub u32PwmState: u32,
    #[doc = "< Detect timer polarity level\nThis parameter can be a value of @ref EMB_Detect_PWM level"]
    pub u32PwmLevel: u32,
}
#[doc = " @brief EMB monitor port in configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_monitor_port_t {
    #[doc = "< EMB detect EMB port in function\nThis parameter details refer @ref stc_emb_monitor_port_config_t structure"]
    pub stcPort1: stc_emb_monitor_port_config_t,
    #[doc = "< EMB detect EMB port in function\nThis parameter details refer @ref stc_emb_monitor_port_config_t structure"]
    pub stcPort2: stc_emb_monitor_port_config_t,
    #[doc = "< EMB detect EMB port in function\nThis parameter details refer @ref stc_emb_monitor_port_config_t structure"]
    pub stcPort3: stc_emb_monitor_port_config_t,
    #[doc = "< EMB detect EMB port in function\nThis parameter details refer @ref stc_emb_monitor_port_config_t structure"]
    pub stcPort4: stc_emb_monitor_port_config_t,
}
#[doc = " @brief EMB monitor CMP configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_monitor_cmp_t {
    #[doc = "< Enable or disable EMB detect CMP1 result function\nThis parameter can be a value of @ref EMB_CMP_Selection"]
    pub u32Cmp1State: u32,
    #[doc = "< Enable or disable EMB detect CMP2 result function\nThis parameter can be a value of @ref EMB_CMP_Selection"]
    pub u32Cmp2State: u32,
    #[doc = "< Enable or disable EMB detect CMP3 result function\nThis parameter can be a value of @ref EMB_CMP_Selection"]
    pub u32Cmp3State: u32,
    #[doc = "< Enable or disable EMB detect CMP4 result function\nThis parameter can be a value of @ref EMB_CMP_Selection"]
    pub u32Cmp4State: u32,
}
#[doc = " @brief EMB monitor TMR4 configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_monitor_tmr4_t {
    #[doc = "< EMB detect TMR4 function\nThis parameter details refer @ref stc_emb_monitor_tmr_pwm_t structure"]
    pub stcTmr4PwmU: stc_emb_monitor_tmr_pwm_t,
    #[doc = "< EMB detect TMR4 function\nThis parameter details refer @ref stc_emb_monitor_tmr_pwm_t structure"]
    pub stcTmr4PwmV: stc_emb_monitor_tmr_pwm_t,
    #[doc = "< EMB detect TMR4 function\nThis parameter details refer @ref stc_emb_monitor_tmr_pwm_t structure"]
    pub stcTmr4PwmW: stc_emb_monitor_tmr_pwm_t,
    #[doc = "< EMB detect TMR4 function\nThis parameter details refer @ref stc_emb_monitor_tmr_pwm_t structure"]
    pub stcTmr4PwmX: stc_emb_monitor_tmr_pwm_t,
}
#[doc = " @brief EMB control TMR4 initialization configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_tmr4_init_t {
    #[doc = "< EMB detect CMP function\nThis parameter details refer @ref stc_emb_monitor_cmp_t structure"]
    pub stcCmp: stc_emb_monitor_cmp_t,
    #[doc = "< EMB detect EMB port function\nThis parameter details refer @ref stc_emb_monitor_port_t structure"]
    pub stcPort: stc_emb_monitor_port_t,
    #[doc = "< EMB detect TMR4 function\nThis parameter details refer @ref stc_emb_monitor_tmr4_t structure"]
    pub stcTmr4: stc_emb_monitor_tmr4_t,
    #[doc = "< EMB detect System function\nThis parameter details refer @ref stc_emb_monitor_sys_t structure"]
    pub stcSys: stc_emb_monitor_sys_t,
}
#[doc = " @brief EMB monitor TMR6 configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_monitor_tmr6_t {
    #[doc = "< EMB detect TMR6 function\nThis parameter details refer @ref stc_emb_monitor_tmr_pwm_t structure"]
    pub stcTmr6_1: stc_emb_monitor_tmr_pwm_t,
    #[doc = "< EMB detect TMR6 function\nThis parameter details refer @ref stc_emb_monitor_tmr_pwm_t structure"]
    pub stcTmr6_2: stc_emb_monitor_tmr_pwm_t,
}
#[doc = " @brief EMB control TMR6 initialization configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_emb_tmr6_init_t {
    #[doc = "< EMB detect CMP function\nThis parameter details refer @ref stc_emb_monitor_cmp_t structure"]
    pub stcCmp: stc_emb_monitor_cmp_t,
    #[doc = "< EMB detect EMB port function\nThis parameter details refer @ref stc_emb_monitor_port_t structure"]
    pub stcPort: stc_emb_monitor_port_t,
    #[doc = "< EMB detect TMR6 function\nThis parameter details refer @ref stc_emb_monitor_tmr6_t structure"]
    pub stcTmr6: stc_emb_monitor_tmr6_t,
    #[doc = "< EMB detect System function\nThis parameter details refer @ref stc_emb_monitor_sys_t structure"]
    pub stcSys: stc_emb_monitor_sys_t,
}
unsafe extern "C" {
    #[doc = "Global function prototypes (definition in C source)\n/\n/**\n @addtogroup EMB_Global_Functions\n @{"]
    pub fn EMB_TMR4_StructInit(pstcEmbInit: *mut stc_emb_tmr4_init_t) -> i32;
    pub fn EMB_TMR4_Init(EMBx: *mut CM_EMB_TypeDef, pstcEmbInit: *const stc_emb_tmr4_init_t)
        -> i32;
    pub fn EMB_TMR6_StructInit(pstcEmbInit: *mut stc_emb_tmr6_init_t) -> i32;
    pub fn EMB_TMR6_Init(EMBx: *mut CM_EMB_TypeDef, pstcEmbInit: *const stc_emb_tmr6_init_t)
        -> i32;
    pub fn EMB_DeInit(EMBx: *mut CM_EMB_TypeDef);
    pub fn EMB_IntCmd(
        EMBx: *mut CM_EMB_TypeDef,
        u32IntType: u32,
        enNewState: en_functional_state_t,
    );
    pub fn EMB_ClearStatus(EMBx: *mut CM_EMB_TypeDef, u32Flag: u32);
    pub fn EMB_GetStatus(EMBx: *const CM_EMB_TypeDef, u32Flag: u32) -> en_flag_status_t;
    pub fn EMB_SWBrake(EMBx: *mut CM_EMB_TypeDef, enNewState: en_functional_state_t);
    pub fn EMB_SetReleasePwmCond(EMBx: *mut CM_EMB_TypeDef, u32Event: u32, u32Cond: u32);
}
