/* automatically generated by rust-bindgen 0.72.1 */

pub const TMRA_CNT_SRC_SW: u32 = 0;
pub const TMRA_CNT_SRC_HW: u32 = 1;
pub const TMRA_CH1: u32 = 0;
pub const TMRA_CH2: u32 = 1;
pub const TMRA_CH3: u32 = 2;
pub const TMRA_CH4: u32 = 3;
pub const TMRA_CH5: u32 = 4;
pub const TMRA_CH6: u32 = 5;
pub const TMRA_CH7: u32 = 6;
pub const TMRA_CH8: u32 = 7;
pub const TMRA_DIR_DOWN: u32 = 0;
pub const TMRA_DIR_UP: u32 = 2;
pub const TMRA_MD_SAWTOOTH: u32 = 0;
pub const TMRA_MD_TRIANGLE: u32 = 4;
pub const TMRA_FUNC_CMP: u32 = 0;
pub const TMRA_FUNC_CAPT: u32 = 1;
pub const TMRA_CNT_RELOAD_DISABLE: u32 = 1;
pub const TMRA_CNT_RELOAD_ENABLE: u32 = 0;
pub const TMRA_CLK_DIV1: u32 = 0;
pub const TMRA_CLK_DIV2: u32 = 16;
pub const TMRA_CLK_DIV4: u32 = 32;
pub const TMRA_CLK_DIV8: u32 = 48;
pub const TMRA_CLK_DIV16: u32 = 64;
pub const TMRA_CLK_DIV32: u32 = 80;
pub const TMRA_CLK_DIV64: u32 = 96;
pub const TMRA_CLK_DIV128: u32 = 112;
pub const TMRA_CLK_DIV256: u32 = 128;
pub const TMRA_CLK_DIV512: u32 = 144;
pub const TMRA_CLK_DIV1024: u32 = 160;
pub const TMRA_PIN_TRIG: u32 = 0;
pub const TMRA_PIN_CLKA: u32 = 1;
pub const TMRA_PIN_CLKB: u32 = 2;
pub const TMRA_PIN_PWM1: u32 = 3;
pub const TMRA_PIN_PWM2: u32 = 4;
pub const TMRA_PIN_PWM3: u32 = 5;
pub const TMRA_PIN_PWM4: u32 = 6;
pub const TMRA_PIN_PWM5: u32 = 7;
pub const TMRA_PIN_PWM6: u32 = 8;
pub const TMRA_PIN_PWM7: u32 = 9;
pub const TMRA_PIN_PWM8: u32 = 10;
pub const TMRA_CNT_UP_COND_INVD: u32 = 0;
pub const TMRA_CNT_UP_COND_CLKA_LOW_CLKB_RISING: u32 = 1;
pub const TMRA_CNT_UP_COND_CLKA_LOW_CLKB_FALLING: u32 = 2;
pub const TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING: u32 = 4;
pub const TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_FALLING: u32 = 8;
pub const TMRA_CNT_UP_COND_CLKB_LOW_CLKA_RISING: u32 = 16;
pub const TMRA_CNT_UP_COND_CLKB_LOW_CLKA_FALLING: u32 = 32;
pub const TMRA_CNT_UP_COND_CLKB_HIGH_CLKA_RISING: u32 = 64;
pub const TMRA_CNT_UP_COND_CLKB_HIGH_CLKA_FALLING: u32 = 128;
pub const TMRA_CNT_UP_COND_TRIG_RISING: u32 = 256;
pub const TMRA_CNT_UP_COND_TRIG_FALLING: u32 = 512;
pub const TMRA_CNT_UP_COND_EVT: u32 = 1024;
pub const TMRA_CNT_UP_COND_SYM_OVF: u32 = 2048;
pub const TMRA_CNT_UP_COND_SYM_UDF: u32 = 4096;
pub const TMRA_CNT_UP_COND_ALL: u32 = 8191;
pub const TMRA_CNT_DOWN_COND_INVD: u32 = 0;
pub const TMRA_CNT_DOWN_COND_CLKA_LOW_CLKB_RISING: u32 = 1;
pub const TMRA_CNT_DOWN_COND_CLKA_LOW_CLKB_FALLING: u32 = 2;
pub const TMRA_CNT_DOWN_COND_CLKA_HIGH_CLKB_RISING: u32 = 4;
pub const TMRA_CNT_DOWN_COND_CLKA_HIGH_CLKB_FALLING: u32 = 8;
pub const TMRA_CNT_DOWN_COND_CLKB_LOW_CLKA_RISING: u32 = 16;
pub const TMRA_CNT_DOWN_COND_CLKB_LOW_CLKA_FALLING: u32 = 32;
pub const TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING: u32 = 64;
pub const TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_FALLING: u32 = 128;
pub const TMRA_CNT_DOWN_COND_TRIG_RISING: u32 = 256;
pub const TMRA_CNT_DOWN_COND_TRIG_FALLING: u32 = 512;
pub const TMRA_CNT_DOWN_COND_EVT: u32 = 1024;
pub const TMRA_CNT_DOWN_COND_SYM_OVF: u32 = 2048;
pub const TMRA_CNT_DOWN_COND_SYM_UDF: u32 = 4096;
pub const TMRA_CNT_DOWN_COND_ALL: u32 = 8191;
pub const TMRA_INT_OVF: u32 = 16;
pub const TMRA_INT_UDF: u32 = 32;
pub const TMRA_INT_CMP_CH1: u32 = 65536;
pub const TMRA_INT_CMP_CH2: u32 = 131072;
pub const TMRA_INT_CMP_CH3: u32 = 262144;
pub const TMRA_INT_CMP_CH4: u32 = 524288;
pub const TMRA_INT_CMP_CH5: u32 = 1048576;
pub const TMRA_INT_CMP_CH6: u32 = 2097152;
pub const TMRA_INT_CMP_CH7: u32 = 4194304;
pub const TMRA_INT_CMP_CH8: u32 = 8388608;
pub const TMRA_INT_ALL: u32 = 16711728;
pub const TMRA_EVT_CMP_CH1: u32 = 1;
pub const TMRA_EVT_CMP_CH2: u32 = 2;
pub const TMRA_EVT_CMP_CH3: u32 = 4;
pub const TMRA_EVT_CMP_CH4: u32 = 8;
pub const TMRA_EVT_CMP_CH5: u32 = 16;
pub const TMRA_EVT_CMP_CH6: u32 = 32;
pub const TMRA_EVT_CMP_CH7: u32 = 64;
pub const TMRA_EVT_CMP_CH8: u32 = 128;
pub const TMRA_EVT_ALL: u32 = 255;
pub const TMRA_FLAG_OVF: u32 = 64;
pub const TMRA_FLAG_UDF: u32 = 128;
pub const TMRA_FLAG_CMP_CH1: u32 = 65536;
pub const TMRA_FLAG_CMP_CH2: u32 = 131072;
pub const TMRA_FLAG_CMP_CH3: u32 = 262144;
pub const TMRA_FLAG_CMP_CH4: u32 = 524288;
pub const TMRA_FLAG_CMP_CH5: u32 = 1048576;
pub const TMRA_FLAG_CMP_CH6: u32 = 2097152;
pub const TMRA_FLAG_CMP_CH7: u32 = 4194304;
pub const TMRA_FLAG_CMP_CH8: u32 = 8388608;
pub const TMRA_FLAG_CAPT_AGAIN_CH1: u32 = 16777216;
pub const TMRA_FLAG_CAPT_AGAIN_CH2: u32 = 33554432;
pub const TMRA_FLAG_CAPT_AGAIN_CH3: u32 = 67108864;
pub const TMRA_FLAG_CAPT_AGAIN_CH4: u32 = 134217728;
pub const TMRA_FLAG_CAPT_AGAIN_CH5: u32 = 268435456;
pub const TMRA_FLAG_CAPT_AGAIN_CH6: u32 = 536870912;
pub const TMRA_FLAG_CAPT_AGAIN_CH7: u32 = 1073741824;
pub const TMRA_FLAG_CAPT_AGAIN_CH8: u32 = 2147483648;
pub const TMRA_FLAG_ALL: u32 = 4294901952;
pub const TMRA_CAPT_COND_INVD: u32 = 0;
pub const TMRA_CAPT_COND_PWM_RISING: u32 = 16;
pub const TMRA_CAPT_COND_PWM_FALLING: u32 = 32;
pub const TMRA_CAPT_COND_EVT: u32 = 64;
pub const TMRA_CAPT_COND_TRIG_RISING: u32 = 256;
pub const TMRA_CAPT_COND_TRIG_FALLING: u32 = 512;
pub const TMRA_CAPT_COND_XOR_RISING: u32 = 1024;
pub const TMRA_CAPT_COND_XOR_FALLING: u32 = 2048;
pub const TMRA_CAPT_COND_ALL: u32 = 3952;
pub const TMRA_BUF_TRANS_COND_OVF_UDF_CLR: u32 = 0;
pub const TMRA_BUF_TRANS_COND_PEAK: u32 = 2;
pub const TMRA_BUF_TRANS_COND_VALLEY: u32 = 4;
pub const TMRA_BUF_TRANS_COND_PEAK_VALLEY: u32 = 6;
pub const TMRA_FILTER_CLK_DIV1: u32 = 0;
pub const TMRA_FILTER_CLK_DIV4: u32 = 1;
pub const TMRA_FILTER_CLK_DIV16: u32 = 2;
pub const TMRA_FILTER_CLK_DIV64: u32 = 3;
pub const TMRA_CNT_STAT_START: u32 = 0;
pub const TMRA_CNT_STAT_STOP: u32 = 1;
pub const TMRA_CNT_STAT_MATCH_CMP: u32 = 2;
pub const TMRA_CNT_STAT_MATCH_PERIOD: u32 = 3;
pub const TMRA_PWM_LOW: u32 = 0;
pub const TMRA_PWM_HIGH: u32 = 1;
pub const TMRA_PWM_HOLD: u32 = 2;
pub const TMRA_PWM_INVT: u32 = 3;
pub const TMRA_PWM_FORCE_INVD: u32 = 0;
pub const TMRA_PWM_FORCE_LOW: u32 = 512;
pub const TMRA_PWM_FORCE_HIGH: u32 = 768;
pub const TMRA_START_COND_INVD: u32 = 0;
pub const TMRA_START_COND_TRIG_RISING: u32 = 1;
pub const TMRA_START_COND_TRIG_FALLING: u32 = 2;
pub const TMRA_START_COND_EVT: u32 = 4;
pub const TMRA_START_COND_ALL: u32 = 7;
pub const TMRA_STOP_COND_INVD: u32 = 0;
pub const TMRA_STOP_COND_TRIG_RISING: u32 = 16;
pub const TMRA_STOP_COND_TRIG_FALLING: u32 = 32;
pub const TMRA_STOP_COND_EVT: u32 = 64;
pub const TMRA_STOP_COND_ALL: u32 = 112;
pub const TMRA_CLR_COND_INVD: u32 = 0;
pub const TMRA_CLR_COND_TRIG_RISING: u32 = 256;
pub const TMRA_CLR_COND_TRIG_FALLING: u32 = 512;
pub const TMRA_CLR_COND_EVT: u32 = 1024;
pub const TMRA_CLR_COND_SYM_TRIG_RISING: u32 = 4096;
pub const TMRA_CLR_COND_SYM_TRIG_FALLING: u32 = 8192;
pub const TMRA_CLR_COND_PWM3_RISING: u32 = 16384;
pub const TMRA_CLR_COND_PWM3_FALLING: u32 = 32768;
pub const TMRA_CLR_COND_ALL: u32 = 63232;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " @brief TMRA"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct CM_TMRA_TypeDef {
    pub CNTER: u32,
    pub PERAR: u32,
    pub RESERVED0: [u8; 56usize],
    pub CMPAR1: u32,
    pub CMPAR2: u32,
    pub CMPAR3: u32,
    pub CMPAR4: u32,
    pub CMPAR5: u32,
    pub CMPAR6: u32,
    pub CMPAR7: u32,
    pub CMPAR8: u32,
    pub RESERVED1: [u8; 32usize],
    pub BCSTRL: u8,
    pub BCSTRH: u8,
    pub RESERVED2: [u8; 2usize],
    pub HCONR: u16,
    pub RESERVED3: [u8; 2usize],
    pub HCUPR: u16,
    pub RESERVED4: [u8; 2usize],
    pub HCDOR: u16,
    pub RESERVED5: [u8; 2usize],
    pub ICONR: u16,
    pub RESERVED6: [u8; 2usize],
    pub ECONR: u16,
    pub RESERVED7: [u8; 2usize],
    pub FCONR: u16,
    pub RESERVED8: [u8; 2usize],
    pub STFLR: u16,
    pub RESERVED9: [u8; 34usize],
    pub BCONR1: u16,
    pub RESERVED10: [u8; 6usize],
    pub BCONR2: u16,
    pub RESERVED11: [u8; 6usize],
    pub BCONR3: u16,
    pub RESERVED12: [u8; 6usize],
    pub BCONR4: u16,
    pub RESERVED13: [u8; 38usize],
    pub CCONR1: u16,
    pub RESERVED14: [u8; 2usize],
    pub CCONR2: u16,
    pub RESERVED15: [u8; 2usize],
    pub CCONR3: u16,
    pub RESERVED16: [u8; 2usize],
    pub CCONR4: u16,
    pub RESERVED17: [u8; 2usize],
    pub CCONR5: u16,
    pub RESERVED18: [u8; 2usize],
    pub CCONR6: u16,
    pub RESERVED19: [u8; 2usize],
    pub CCONR7: u16,
    pub RESERVED20: [u8; 2usize],
    pub CCONR8: u16,
    pub RESERVED21: [u8; 34usize],
    pub PCONR1: u16,
    pub RESERVED22: [u8; 2usize],
    pub PCONR2: u16,
    pub RESERVED23: [u8; 2usize],
    pub PCONR3: u16,
    pub RESERVED24: [u8; 2usize],
    pub PCONR4: u16,
    pub RESERVED25: [u8; 2usize],
    pub PCONR5: u16,
    pub RESERVED26: [u8; 2usize],
    pub PCONR6: u16,
    pub RESERVED27: [u8; 2usize],
    pub PCONR7: u16,
    pub RESERVED28: [u8; 2usize],
    pub PCONR8: u16,
}
#[doc = " Global type definitions ('typedef')\n/\n/**\n @defgroup TMRA_Global_Types TMRA Global Types\n @{\n/\n/**\n @brief TMRA initialization structure."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmra_init_t {
    #[doc = "< Specifies the count source of TMRA.\nThis parameter can be a value of @ref TMRA_Count_Src"]
    pub u8CountSrc: u8,
    pub sw_count: stc_tmra_init_t__bindgen_ty_1,
    pub hw_count: stc_tmra_init_t__bindgen_ty_2,
    #[doc = "< Specifies the period reference value.\nThis parameter can be a number between 0U and 0xFFFFU, inclusive."]
    pub u32PeriodValue: u32,
    #[doc = "< Continue counting or stop when counter overflow/underflow.\nThis parameter can be a value of @ref TMRA_Count_Reload_En"]
    pub u8CountReload: u8,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmra_init_t__bindgen_ty_1 {
    #[doc = "< Specifies the divider of software clock source.\nThis parameter can be a value of @ref TMRA_Clock_Divider"]
    pub u8ClockDiv: u8,
    #[doc = "< Specifies count mode.\nThis parameter can be a value of @ref TMRA_Count_Mode"]
    pub u8CountMode: u8,
    #[doc = "< Specifies count direction.\nThis parameter can be a value of @ref TMRA_Count_Dir"]
    pub u8CountDir: u8,
}
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmra_init_t__bindgen_ty_2 {
    #[doc = "< Hardware count up condition.\nThis parameter can be a value of @ref TMRA_Hard_Count_Up_Condition"]
    pub u16CountUpCond: u16,
    #[doc = "< Hardware count down condition.\nThis parameter can be a value of @ref TMRA_Hard_Count_Down_Condition"]
    pub u16CountDownCond: u16,
}
#[doc = " @brief TMRA PWM configuration structure."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_tmra_pwm_init_t {
    #[doc = "< Specifies compare value of the TMRA channel.\nThis parameter can be a number between:\n0UL and 0xFFFFFFFFUL for 32-bit TimerA units.\n0UL and 0xFFFFUL for 16-bit TimerA units."]
    pub u32CompareValue: u32,
    #[doc = "< Specifies the polarity when the counter start counting.\nThis parameter can be a value of @ref TMRA_PWM_Polarity\nNOTE: CAN NOT be specified as TMRA_PWM_LOW or TMRA_PWM_HIGH when\nsw_count.u16ClockDiv of @ref stc_tmra_init_t is NOT specified\nas @ref TMRA_CLK_DIV1"]
    pub u16StartPolarity: u16,
    #[doc = "< Specifies the polarity when the counter stop counting.\nThis parameter can be a value of @ref TMRA_PWM_Polarity"]
    pub u16StopPolarity: u16,
    #[doc = "< Specifies the polarity when the counter matches the compare register.\nThis parameter can be a value of @ref TMRA_PWM_Polarity"]
    pub u16CompareMatchPolarity: u16,
    #[doc = "< Specifies the polarity when the counter matches the period register.\nThis parameter can be a value of @ref TMRA_PWM_Polarity"]
    pub u16PeriodMatchPolarity: u16,
}
unsafe extern "C" {
    #[doc = "Global function prototypes (definition in C source)\n/\n/**\n @addtogroup TMRA_Global_Functions\n @{"]
    pub fn TMRA_Init(TMRAx: *mut CM_TMRA_TypeDef, pstcTmraInit: *const stc_tmra_init_t) -> i32;
    pub fn TMRA_StructInit(pstcTmraInit: *mut stc_tmra_init_t) -> i32;
    pub fn TMRA_SetCountMode(TMRAx: *mut CM_TMRA_TypeDef, u8Mode: u8);
    pub fn TMRA_SetCountDir(TMRAx: *mut CM_TMRA_TypeDef, u8Dir: u8);
    pub fn TMRA_SetClockDiv(TMRAx: *mut CM_TMRA_TypeDef, u8Div: u8);
    pub fn TMRA_HWCountUpCondCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u16Cond: u16,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_HWCountDownCondCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u16Cond: u16,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_SetFunc(TMRAx: *mut CM_TMRA_TypeDef, u32Ch: u32, u16Func: u16);
    pub fn TMRA_PWM_Init(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32Ch: u32,
        pstcPwmInit: *const stc_tmra_pwm_init_t,
    ) -> i32;
    pub fn TMRA_PWM_StructInit(pstcPwmInit: *mut stc_tmra_pwm_init_t) -> i32;
    pub fn TMRA_PWM_OutputCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32Ch: u32,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_PWM_SetPolarity(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32Ch: u32,
        u8CountState: u8,
        u16Polarity: u16,
    );
    pub fn TMRA_PWM_SetForcePolarity(TMRAx: *mut CM_TMRA_TypeDef, u32Ch: u32, u16Polarity: u16);
    pub fn TMRA_HWCaptureCondCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32Ch: u32,
        u16Cond: u16,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_HWStartCondCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u16Cond: u16,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_HWStopCondCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u16Cond: u16,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_HWClearCondCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u16Cond: u16,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_SetFilterClockDiv(TMRAx: *mut CM_TMRA_TypeDef, u32Pin: u32, u16Div: u16);
    pub fn TMRA_FilterCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32Pin: u32,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_DeInit(TMRAx: *mut CM_TMRA_TypeDef) -> i32;
    pub fn TMRA_GetCountDir(TMRAx: *const CM_TMRA_TypeDef) -> u8;
    pub fn TMRA_SetPeriodValue(TMRAx: *mut CM_TMRA_TypeDef, u32Value: u32);
    pub fn TMRA_GetPeriodValue(TMRAx: *const CM_TMRA_TypeDef) -> u32;
    pub fn TMRA_SetCountValue(TMRAx: *mut CM_TMRA_TypeDef, u32Value: u32);
    pub fn TMRA_GetCountValue(TMRAx: *const CM_TMRA_TypeDef) -> u32;
    pub fn TMRA_SetCompareValue(TMRAx: *mut CM_TMRA_TypeDef, u32Ch: u32, u32Value: u32);
    pub fn TMRA_GetCompareValue(TMRAx: *const CM_TMRA_TypeDef, u32Ch: u32) -> u32;
    pub fn TMRA_SyncStartCmd(TMRAx: *mut CM_TMRA_TypeDef, enNewState: en_functional_state_t);
    pub fn TMRA_CountReloadCmd(TMRAx: *mut CM_TMRA_TypeDef, enNewState: en_functional_state_t);
    pub fn TMRA_SetCompareBufCond(TMRAx: *mut CM_TMRA_TypeDef, u32Ch: u32, u16Cond: u16);
    pub fn TMRA_CompareBufCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32Ch: u32,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_SpecialCompareBufCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32Ch: u32,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_GetStatus(TMRAx: *const CM_TMRA_TypeDef, u32Flag: u32) -> en_flag_status_t;
    pub fn TMRA_ClearStatus(TMRAx: *mut CM_TMRA_TypeDef, u32Flag: u32);
    pub fn TMRA_IntCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32IntType: u32,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_EventCmd(
        TMRAx: *mut CM_TMRA_TypeDef,
        u32EventType: u32,
        enNewState: en_functional_state_t,
    );
    pub fn TMRA_Start(TMRAx: *mut CM_TMRA_TypeDef);
    pub fn TMRA_Stop(TMRAx: *mut CM_TMRA_TypeDef);
}
