/* automatically generated by rust-bindgen 0.72.1 */

pub const PWC_PD_MD1: u32 = 0;
pub const PWC_PD_MD2: u32 = 1;
pub const PWC_PD_MD3: u32 = 2;
pub const PWC_PD_MD4: u32 = 3;
pub const PWC_PD_IO_KEEP1: u32 = 0;
pub const PWC_PD_IO_KEEP2: u32 = 16;
pub const PWC_PD_IO_HIZ: u32 = 32;
pub const PWC_PD_VCAP_0P1UF: u32 = 0;
pub const PWC_PD_VCAP_0P047UF: u32 = 1;
pub const PWC_STOP_DRV_HIGH: u32 = 0;
pub const PWC_STOP_DRV_LOW: u32 = 192;
pub const PWC_STOP_EXBUS_HIZ: u32 = 0;
pub const PWC_STOP_EXBUS_HOLD: u32 = 16384;
pub const PWC_STOP_CLK_KEEP: u32 = 0;
pub const PWC_STOP_CLK_MRC: u32 = 2;
pub const PWC_STOP_FLASH_WAIT_ON: u32 = 0;
pub const PWC_STOP_FLASH_WAIT_OFF: u32 = 1;
pub const PWC_STOP_WFI: u32 = 0;
pub const PWC_STOP_WFE_INT: u32 = 1;
pub const PWC_STOP_WFE_EVT: u32 = 2;
pub const PWC_SLEEP_WFI: u32 = 0;
pub const PWC_SLEEP_WFE_INT: u32 = 1;
pub const PWC_SLEEP_WFE_EVT: u32 = 2;
pub const PWC_RAM_HIGH_SPEED: u32 = 32835;
pub const PWC_RAM_ULOW_SPEED: u32 = 36962;
pub const PWC_RAM_PD_MCAN: u32 = 1;
pub const PWC_RAM_PD_CACHE: u32 = 4;
pub const PWC_RAM_PD_ALL: u32 = 5;
pub const PWC_RAM_PD_SRAM0: u32 = 1;
pub const PWC_RAM_PD_SRAMH: u32 = 1024;
pub const PWC_LVD_CH1: u32 = 0;
pub const PWC_LVD_CH2: u32 = 1;
pub const PWC_LVD_ON: u32 = 32;
pub const PWC_LVD_OFF: u32 = 0;
pub const PWC_LVD_EXP_TYPE_NONE: u32 = 0;
pub const PWC_LVD_EXP_TYPE_NMI: u32 = 1;
pub const PWC_LVD_EXP_TYPE_RST: u32 = 3;
pub const PWC_LVD_CMP_OFF: u32 = 0;
pub const PWC_LVD_CMP_ON: u32 = 4;
pub const PWC_LVD_FILTER_ON: u32 = 0;
pub const PWC_LVD_FILTER_OFF: u32 = 1;
pub const PWC_LVD_FILTER_LRC_DIV4: u32 = 0;
pub const PWC_LVD_FILTER_LRC_DIV2: u32 = 2;
pub const PWC_LVD_FILTER_LRC_DIV1: u32 = 4;
pub const PWC_LVD_FILTER_LRC_MUL2: u32 = 6;
pub const PWC_LVD_THRESHOLD_LVL0: u32 = 0;
pub const PWC_LVD_THRESHOLD_LVL1: u32 = 1;
pub const PWC_LVD_THRESHOLD_LVL2: u32 = 2;
pub const PWC_LVD_THRESHOLD_LVL3: u32 = 3;
pub const PWC_LVD_THRESHOLD_LVL4: u32 = 4;
pub const PWC_LVD_THRESHOLD_LVL5: u32 = 5;
pub const PWC_LVD_THRESHOLD_LVL6: u32 = 6;
pub const PWC_LVD_THRESHOLD_LVL7: u32 = 7;
pub const PWC_LVD_EXTVCC: u32 = 7;
pub const PWC_LVD_TRIG_FALLING: u32 = 0;
pub const PWC_LVD_TRIG_RISING: u32 = 2;
pub const PWC_LVD_TRIG_BOTH: u32 = 4;
pub const PWC_LVD1_FLAG_DETECT: u32 = 2;
pub const PWC_LVD2_FLAG_DETECT: u32 = 32;
pub const PWC_LVD1_FLAG_MON: u32 = 1;
pub const PWC_LVD2_FLAG_MON: u32 = 16;
pub const PWC_PD_WKUP0_POS: u32 = 0;
pub const PWC_PD_WKUP1_POS: u32 = 8;
pub const PWC_PD_WKUP2_POS: u32 = 16;
pub const PWC_PD_WKUP_WKUP00: u32 = 1;
pub const PWC_PD_WKUP_WKUP01: u32 = 2;
pub const PWC_PD_WKUP_WKUP02: u32 = 4;
pub const PWC_PD_WKUP_WKUP03: u32 = 8;
pub const PWC_PD_WKUP_WKUP10: u32 = 16;
pub const PWC_PD_WKUP_WKUP11: u32 = 32;
pub const PWC_PD_WKUP_WKUP12: u32 = 64;
pub const PWC_PD_WKUP_WKUP13: u32 = 128;
pub const PWC_PD_WKUP_WKUP20: u32 = 256;
pub const PWC_PD_WKUP_WKUP21: u32 = 512;
pub const PWC_PD_WKUP_WKUP22: u32 = 1024;
pub const PWC_PD_WKUP_WKUP23: u32 = 2048;
pub const PWC_PD_WKUP_WKUP30: u32 = 4096;
pub const PWC_PD_WKUP_WKUP31: u32 = 8192;
pub const PWC_PD_WKUP_WKUP32: u32 = 16384;
pub const PWC_PD_WKUP_WKUP33: u32 = 32768;
pub const PWC_PD_WKUP_LVD1: u32 = 65536;
pub const PWC_PD_WKUP_LVD2: u32 = 131072;
pub const PWC_PD_WKUP_RTCPRD: u32 = 1048576;
pub const PWC_PD_WKUP_RTCALM: u32 = 2097152;
pub const PWC_PD_WKUP_WKTM: u32 = 8388608;
pub const PWC_PD_WKUP_TRIG_LVD1: u32 = 16;
pub const PWC_PD_WKUP_TRIG_LVD2: u32 = 32;
pub const PWC_PD_WKUP_TRIG_WKUP0: u32 = 1;
pub const PWC_PD_WKUP_TRIG_WKUP1: u32 = 2;
pub const PWC_PD_WKUP_TRIG_WKUP2: u32 = 4;
pub const PWC_PD_WKUP_TRIG_WKUP3: u32 = 8;
pub const PWC_PD_WKUP_TRIG_ALL: u32 = 63;
pub const PWC_PD_WKUP_TRIG_FALLING: u32 = 0;
pub const PWC_PD_WKUP_TRIG_RISING: u32 = 1;
pub const PWC_PD_WKUP_FLAG0_POS: u32 = 0;
pub const PWC_PD_WKUP_FLAG1_POS: u32 = 8;
pub const PWC_PD_WKUP_FLAG_WKUP0: u32 = 1;
pub const PWC_PD_WKUP_FLAG_WKUP1: u32 = 2;
pub const PWC_PD_WKUP_FLAG_WKUP2: u32 = 4;
pub const PWC_PD_WKUP_FLAG_WKUP3: u32 = 8;
pub const PWC_PD_WKUP_FLAG_LVD1: u32 = 16;
pub const PWC_PD_WKUP_FLAG_LVD2: u32 = 32;
pub const PWC_PD_WKUP_FLAG_RTCPRD: u32 = 4096;
pub const PWC_PD_WKUP_FLAG_RTCALM: u32 = 8192;
pub const PWC_PD_WKUP_FLAG_WKTM: u32 = 32768;
pub const PWC_PD_WKUP_FLAG_ALL: u32 = 45119;
pub const PWC_WKT_OFF: u32 = 0;
pub const PWC_WKT_ON: u32 = 32768;
pub const PWC_WKT_CLK_SRC_64HZ: u32 = 0;
pub const PWC_WKT_CLK_SRC_XTAL32: u32 = 8192;
pub const PWC_WKT_CLK_SRC_LRC: u32 = 16384;
pub const PWC_LDO_HRC: u32 = 4;
pub const PWC_LDO_PLL: u32 = 3;
pub const PWC_LDO_MASK: u32 = 7;
pub const PWC_RTC_CLK_LRC: u32 = 0;
pub const PWC_RTC_CLK_XTAL_DIV: u32 = 1;
pub const PWC_WRITE_ENABLE: u32 = 42240;
pub const PWC_UNLOCK_CODE0: u32 = 42241;
pub const PWC_UNLOCK_CODE1: u32 = 42242;
pub const PWC_UNLOCK_CODE2: u32 = 42248;
pub const PWC_FCG0_REG_UNLOCK_KEY: u32 = 2779054081;
pub const PWC_FCG0_REG_LOCK_KEY: u32 = 2779054080;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " Global type definitions ('typedef')\n/\n/**\n @defgroup PWC_Global_Types PWC Global Types\n @{\n/\n/**\n @brief PWC LVD Init"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_pwc_lvd_init_t {
    #[doc = "< LVD function setting, @ref PWC_LVD_Config for details"]
    pub u32State: u32,
    #[doc = "< LVD compare output function setting, @ref PWC_LVD_CMP_Config for details"]
    pub u32CompareOutputState: u32,
    #[doc = "< LVD interrupt or reset selection, @ref PWC_LVD_Exception_Type_Sel for details"]
    pub u32ExceptionType: u32,
    #[doc = "< LVD digital filter function setting, @ref PWC_LVD_DF_Config for details"]
    pub u32Filter: u32,
    #[doc = "< LVD digital filter clock setting, @ref PWC_LVD_DFS_Clk_Sel for details"]
    pub u32FilterClock: u32,
    #[doc = "< LVD detect voltage setting, @ref PWC_LVD_Detection_Voltage_Sel for details"]
    pub u32ThresholdVoltage: u32,
    #[doc = "< LVD trigger setting, @ref PWC_LVD_TRIG_Sel for details"]
    pub u32TriggerEdge: u32,
}
#[doc = " @brief PWC power down mode innit"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_pwc_pd_mode_config_t {
    #[doc = "< Power down mode, @ref PWC_PDMode_Sel for details."]
    pub u8Mode: u8,
    #[doc = "< IO state in power down mode, @ref PWC_PDMode_IO_Sel for details."]
    pub u8IOState: u8,
    #[doc = "< Power down Wakeup time control, @ref PWC_PD_VCAP_Sel for details."]
    pub u8VcapCtrl: u8,
}
#[doc = " @brief PWC Stop mode Init"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_pwc_stop_mode_config_t {
    #[doc = "< System clock setting after wake-up from stop mode,\n@ref PWC_STOP_CLK_Sel for details."]
    pub u16Clock: u16,
    #[doc = "< Stop mode drive capacity,\n@ref PWC_STOP_DRV_Sel for details."]
    pub u8StopDrv: u8,
    #[doc = "< Expos status in stop mode,\n@ref PWC_STOP_EXBUS_Sel for details."]
    pub u16ExBusHold: u16,
    #[doc = "< Waiting flash stable after wake-up from stop mode,\n@ref PWC_STOP_Flash_Wait_Sel for details."]
    pub u16FlashWait: u16,
}
unsafe extern "C" {
    pub fn PWC_PD_Enter() -> i32;
    pub fn PWC_PD_StructInit(pstcPDModeConfig: *mut stc_pwc_pd_mode_config_t) -> i32;
    pub fn PWC_PD_Config(pstcPDModeConfig: *const stc_pwc_pd_mode_config_t) -> i32;
    pub fn PWC_PD_SetIoState(u8IoState: u8);
    pub fn PWC_PD_SetMode(u8PdMode: u8);
    pub fn PWC_PD_WakeupCmd(u32Event: u32, enNewState: en_functional_state_t);
    pub fn PWC_PD_SetWakeupTriggerEdge(u8Event: u8, u8TrigEdge: u8);
    pub fn PWC_PD_GetWakeupStatus(u16Flag: u16) -> en_flag_status_t;
    pub fn PWC_PD_ClearWakeupStatus(u16Flag: u16);
    pub fn PWC_PD_PeriphRamCmd(u32PeriphRam: u32, enNewState: en_functional_state_t);
    pub fn PWC_PD_VdrCmd(enNewState: en_functional_state_t);
    pub fn PWC_WKT_Config(u16ClkSrc: u16, u16CmpVal: u16);
    pub fn PWC_WKT_SetCompareValue(u16CmpVal: u16);
    pub fn PWC_WKT_GetCompareValue() -> u16;
    pub fn PWC_WKT_Cmd(enNewState: en_functional_state_t);
    pub fn PWC_WKT_GetStatus() -> en_flag_status_t;
    pub fn PWC_WKT_ClearStatus();
    pub fn PWC_PD_RamCmd(u32Ram: u32, enNewState: en_functional_state_t);
    pub fn PWC_RamModeConfig(u16Mode: u16);
    pub fn PWC_SLEEP_Enter(u8SleepType: u8);
    pub fn PWC_STOP_Enter(u8StopType: u8);
    pub fn PWC_STOP_StructInit(pstcStopConfig: *mut stc_pwc_stop_mode_config_t) -> i32;
    pub fn PWC_STOP_Config(pstcStopConfig: *const stc_pwc_stop_mode_config_t) -> i32;
    pub fn PWC_STOP_ClockSelect(u8Clock: u8);
    pub fn PWC_STOP_SetDrv(u8StopDrv: u8);
    pub fn PWC_STOP_FlashWaitCmd(enNewState: en_functional_state_t);
    pub fn PWC_STOP_ExBusHoldConfig(u16ExBusHold: u16);
    pub fn PWC_HighSpeedToLowSpeed() -> i32;
    pub fn PWC_LowSpeedToHighSpeed() -> i32;
    pub fn PWC_LDO_Cmd(u16Ldo: u16, enNewState: en_functional_state_t);
    pub fn PWC_LVD_Init(u8Ch: u8, pstcLvdInit: *const stc_pwc_lvd_init_t) -> i32;
    pub fn PWC_LVD_DeInit(u8Ch: u8);
    pub fn PWC_LVD_StructInit(pstcLvdInit: *mut stc_pwc_lvd_init_t) -> i32;
    pub fn PWC_LVD_Cmd(u8Ch: u8, enNewState: en_functional_state_t);
    pub fn PWC_LVD_ExtInputCmd(enNewState: en_functional_state_t);
    pub fn PWC_LVD_CompareOutputCmd(u8Ch: u8, enNewState: en_functional_state_t);
    pub fn PWC_LVD_DigitalFilterCmd(u8Ch: u8, enNewState: en_functional_state_t);
    pub fn PWC_LVD_SetFilterClock(u8Ch: u8, u32Clock: u32);
    pub fn PWC_LVD_SetThresholdVoltage(u8Ch: u8, u32Voltage: u32);
    pub fn PWC_LVD_ClearStatus(u8Flag: u8);
    pub fn PWC_LVD_GetStatus(u8Flag: u8) -> en_flag_status_t;
    pub fn PWC_PowerMonitorCmd(enNewState: en_functional_state_t);
    pub fn PWC_XTAL32_PowerCmd(enNewState: en_functional_state_t);
    pub fn PWC_RetSram_PowerCmd(enNewState: en_functional_state_t);
    pub fn PWC_SetRtcClock(u8Clock: u8);
}
