#[doc = "Register `CLR%s` writer"]
pub type W = crate::W<ClrSpec>;
#[doc = "Field `PINCLR0` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR1` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR2` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR3` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR4` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR5` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR6` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR7` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr7W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR8` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr8W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR9` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr9W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR10` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr10W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR11` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr11W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR12` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr12W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR13` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr13W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR14` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr14W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR15` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr15W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR16` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr16W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR17` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr17W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR18` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr18W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR19` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr19W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR20` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr20W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR21` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr21W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR22` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr22W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR23` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr23W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR24` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr24W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR25` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr25W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR26` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr26W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR27` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr27W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR28` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr28W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR29` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr29W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR30` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr30W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINCLR31` writer - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
pub type Pinclr31W<'a, REG> = crate::BitWriter<'a, REG>;
impl W {
    #[doc = "Bit 0 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr0(&mut self) -> Pinclr0W<'_, ClrSpec> {
        Pinclr0W::new(self, 0)
    }
    #[doc = "Bit 1 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr1(&mut self) -> Pinclr1W<'_, ClrSpec> {
        Pinclr1W::new(self, 1)
    }
    #[doc = "Bit 2 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr2(&mut self) -> Pinclr2W<'_, ClrSpec> {
        Pinclr2W::new(self, 2)
    }
    #[doc = "Bit 3 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr3(&mut self) -> Pinclr3W<'_, ClrSpec> {
        Pinclr3W::new(self, 3)
    }
    #[doc = "Bit 4 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr4(&mut self) -> Pinclr4W<'_, ClrSpec> {
        Pinclr4W::new(self, 4)
    }
    #[doc = "Bit 5 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr5(&mut self) -> Pinclr5W<'_, ClrSpec> {
        Pinclr5W::new(self, 5)
    }
    #[doc = "Bit 6 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr6(&mut self) -> Pinclr6W<'_, ClrSpec> {
        Pinclr6W::new(self, 6)
    }
    #[doc = "Bit 7 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr7(&mut self) -> Pinclr7W<'_, ClrSpec> {
        Pinclr7W::new(self, 7)
    }
    #[doc = "Bit 8 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr8(&mut self) -> Pinclr8W<'_, ClrSpec> {
        Pinclr8W::new(self, 8)
    }
    #[doc = "Bit 9 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr9(&mut self) -> Pinclr9W<'_, ClrSpec> {
        Pinclr9W::new(self, 9)
    }
    #[doc = "Bit 10 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr10(&mut self) -> Pinclr10W<'_, ClrSpec> {
        Pinclr10W::new(self, 10)
    }
    #[doc = "Bit 11 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr11(&mut self) -> Pinclr11W<'_, ClrSpec> {
        Pinclr11W::new(self, 11)
    }
    #[doc = "Bit 12 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr12(&mut self) -> Pinclr12W<'_, ClrSpec> {
        Pinclr12W::new(self, 12)
    }
    #[doc = "Bit 13 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr13(&mut self) -> Pinclr13W<'_, ClrSpec> {
        Pinclr13W::new(self, 13)
    }
    #[doc = "Bit 14 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr14(&mut self) -> Pinclr14W<'_, ClrSpec> {
        Pinclr14W::new(self, 14)
    }
    #[doc = "Bit 15 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr15(&mut self) -> Pinclr15W<'_, ClrSpec> {
        Pinclr15W::new(self, 15)
    }
    #[doc = "Bit 16 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr16(&mut self) -> Pinclr16W<'_, ClrSpec> {
        Pinclr16W::new(self, 16)
    }
    #[doc = "Bit 17 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr17(&mut self) -> Pinclr17W<'_, ClrSpec> {
        Pinclr17W::new(self, 17)
    }
    #[doc = "Bit 18 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr18(&mut self) -> Pinclr18W<'_, ClrSpec> {
        Pinclr18W::new(self, 18)
    }
    #[doc = "Bit 19 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr19(&mut self) -> Pinclr19W<'_, ClrSpec> {
        Pinclr19W::new(self, 19)
    }
    #[doc = "Bit 20 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr20(&mut self) -> Pinclr20W<'_, ClrSpec> {
        Pinclr20W::new(self, 20)
    }
    #[doc = "Bit 21 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr21(&mut self) -> Pinclr21W<'_, ClrSpec> {
        Pinclr21W::new(self, 21)
    }
    #[doc = "Bit 22 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr22(&mut self) -> Pinclr22W<'_, ClrSpec> {
        Pinclr22W::new(self, 22)
    }
    #[doc = "Bit 23 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr23(&mut self) -> Pinclr23W<'_, ClrSpec> {
        Pinclr23W::new(self, 23)
    }
    #[doc = "Bit 24 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr24(&mut self) -> Pinclr24W<'_, ClrSpec> {
        Pinclr24W::new(self, 24)
    }
    #[doc = "Bit 25 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr25(&mut self) -> Pinclr25W<'_, ClrSpec> {
        Pinclr25W::new(self, 25)
    }
    #[doc = "Bit 26 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr26(&mut self) -> Pinclr26W<'_, ClrSpec> {
        Pinclr26W::new(self, 26)
    }
    #[doc = "Bit 27 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr27(&mut self) -> Pinclr27W<'_, ClrSpec> {
        Pinclr27W::new(self, 27)
    }
    #[doc = "Bit 28 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr28(&mut self) -> Pinclr28W<'_, ClrSpec> {
        Pinclr28W::new(self, 28)
    }
    #[doc = "Bit 29 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr29(&mut self) -> Pinclr29W<'_, ClrSpec> {
        Pinclr29W::new(self, 29)
    }
    #[doc = "Bit 30 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr30(&mut self) -> Pinclr30W<'_, ClrSpec> {
        Pinclr30W::new(self, 30)
    }
    #[doc = "Bit 31 - Fast GPIO output value Clear bits. Bit 0 in CLRx controls pin Px\\[0\\], bit 31 in CLRx controls pin Px\\[31\\]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW."]
    #[inline(always)]
    pub fn pinclr31(&mut self) -> Pinclr31W<'_, ClrSpec> {
        Pinclr31W::new(self, 31)
    }
}
#[doc = "Port Output Clear register using FIOMASK.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct ClrSpec;
impl crate::RegisterSpec for ClrSpec {
    type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [`clr::W`](W) writer structure"]
impl crate::Writable for ClrSpec {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets CLR%s to value 0"]
impl crate::Resettable for ClrSpec {}
