#[doc = "Register `MASK%s` reader"]
pub type R = crate::R<MaskSpec>;
#[doc = "Register `MASK%s` writer"]
pub type W = crate::W<MaskSpec>;
#[doc = "Field `PINMASK0` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask0R = crate::BitReader;
#[doc = "Field `PINMASK0` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK1` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask1R = crate::BitReader;
#[doc = "Field `PINMASK1` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK2` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask2R = crate::BitReader;
#[doc = "Field `PINMASK2` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK3` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask3R = crate::BitReader;
#[doc = "Field `PINMASK3` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK4` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask4R = crate::BitReader;
#[doc = "Field `PINMASK4` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK5` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask5R = crate::BitReader;
#[doc = "Field `PINMASK5` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK6` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask6R = crate::BitReader;
#[doc = "Field `PINMASK6` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK7` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask7R = crate::BitReader;
#[doc = "Field `PINMASK7` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask7W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK8` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask8R = crate::BitReader;
#[doc = "Field `PINMASK8` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask8W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK9` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask9R = crate::BitReader;
#[doc = "Field `PINMASK9` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask9W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK10` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask10R = crate::BitReader;
#[doc = "Field `PINMASK10` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask10W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK11` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask11R = crate::BitReader;
#[doc = "Field `PINMASK11` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask11W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK12` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask12R = crate::BitReader;
#[doc = "Field `PINMASK12` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask12W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK13` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask13R = crate::BitReader;
#[doc = "Field `PINMASK13` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask13W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK14` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask14R = crate::BitReader;
#[doc = "Field `PINMASK14` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask14W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK15` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask15R = crate::BitReader;
#[doc = "Field `PINMASK15` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask15W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK16` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask16R = crate::BitReader;
#[doc = "Field `PINMASK16` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask16W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK17` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask17R = crate::BitReader;
#[doc = "Field `PINMASK17` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask17W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK18` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask18R = crate::BitReader;
#[doc = "Field `PINMASK18` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask18W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK19` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask19R = crate::BitReader;
#[doc = "Field `PINMASK19` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask19W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK20` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask20R = crate::BitReader;
#[doc = "Field `PINMASK20` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask20W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK21` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask21R = crate::BitReader;
#[doc = "Field `PINMASK21` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask21W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK22` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask22R = crate::BitReader;
#[doc = "Field `PINMASK22` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask22W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK23` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask23R = crate::BitReader;
#[doc = "Field `PINMASK23` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask23W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK24` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask24R = crate::BitReader;
#[doc = "Field `PINMASK24` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask24W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK25` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask25R = crate::BitReader;
#[doc = "Field `PINMASK25` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask25W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK26` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask26R = crate::BitReader;
#[doc = "Field `PINMASK26` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask26W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK27` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask27R = crate::BitReader;
#[doc = "Field `PINMASK27` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask27W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK28` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask28R = crate::BitReader;
#[doc = "Field `PINMASK28` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask28W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK29` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask29R = crate::BitReader;
#[doc = "Field `PINMASK29` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask29W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK30` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask30R = crate::BitReader;
#[doc = "Field `PINMASK30` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask30W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PINMASK31` reader - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask31R = crate::BitReader;
#[doc = "Field `PINMASK31` writer - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
pub type Pinmask31W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask0(&self) -> Pinmask0R {
        Pinmask0R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask1(&self) -> Pinmask1R {
        Pinmask1R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask2(&self) -> Pinmask2R {
        Pinmask2R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask3(&self) -> Pinmask3R {
        Pinmask3R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask4(&self) -> Pinmask4R {
        Pinmask4R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask5(&self) -> Pinmask5R {
        Pinmask5R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask6(&self) -> Pinmask6R {
        Pinmask6R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask7(&self) -> Pinmask7R {
        Pinmask7R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 8 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask8(&self) -> Pinmask8R {
        Pinmask8R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 9 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask9(&self) -> Pinmask9R {
        Pinmask9R::new(((self.bits >> 9) & 1) != 0)
    }
    #[doc = "Bit 10 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask10(&self) -> Pinmask10R {
        Pinmask10R::new(((self.bits >> 10) & 1) != 0)
    }
    #[doc = "Bit 11 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask11(&self) -> Pinmask11R {
        Pinmask11R::new(((self.bits >> 11) & 1) != 0)
    }
    #[doc = "Bit 12 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask12(&self) -> Pinmask12R {
        Pinmask12R::new(((self.bits >> 12) & 1) != 0)
    }
    #[doc = "Bit 13 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask13(&self) -> Pinmask13R {
        Pinmask13R::new(((self.bits >> 13) & 1) != 0)
    }
    #[doc = "Bit 14 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask14(&self) -> Pinmask14R {
        Pinmask14R::new(((self.bits >> 14) & 1) != 0)
    }
    #[doc = "Bit 15 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask15(&self) -> Pinmask15R {
        Pinmask15R::new(((self.bits >> 15) & 1) != 0)
    }
    #[doc = "Bit 16 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask16(&self) -> Pinmask16R {
        Pinmask16R::new(((self.bits >> 16) & 1) != 0)
    }
    #[doc = "Bit 17 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask17(&self) -> Pinmask17R {
        Pinmask17R::new(((self.bits >> 17) & 1) != 0)
    }
    #[doc = "Bit 18 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask18(&self) -> Pinmask18R {
        Pinmask18R::new(((self.bits >> 18) & 1) != 0)
    }
    #[doc = "Bit 19 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask19(&self) -> Pinmask19R {
        Pinmask19R::new(((self.bits >> 19) & 1) != 0)
    }
    #[doc = "Bit 20 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask20(&self) -> Pinmask20R {
        Pinmask20R::new(((self.bits >> 20) & 1) != 0)
    }
    #[doc = "Bit 21 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask21(&self) -> Pinmask21R {
        Pinmask21R::new(((self.bits >> 21) & 1) != 0)
    }
    #[doc = "Bit 22 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask22(&self) -> Pinmask22R {
        Pinmask22R::new(((self.bits >> 22) & 1) != 0)
    }
    #[doc = "Bit 23 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask23(&self) -> Pinmask23R {
        Pinmask23R::new(((self.bits >> 23) & 1) != 0)
    }
    #[doc = "Bit 24 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask24(&self) -> Pinmask24R {
        Pinmask24R::new(((self.bits >> 24) & 1) != 0)
    }
    #[doc = "Bit 25 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask25(&self) -> Pinmask25R {
        Pinmask25R::new(((self.bits >> 25) & 1) != 0)
    }
    #[doc = "Bit 26 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask26(&self) -> Pinmask26R {
        Pinmask26R::new(((self.bits >> 26) & 1) != 0)
    }
    #[doc = "Bit 27 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask27(&self) -> Pinmask27R {
        Pinmask27R::new(((self.bits >> 27) & 1) != 0)
    }
    #[doc = "Bit 28 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask28(&self) -> Pinmask28R {
        Pinmask28R::new(((self.bits >> 28) & 1) != 0)
    }
    #[doc = "Bit 29 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask29(&self) -> Pinmask29R {
        Pinmask29R::new(((self.bits >> 29) & 1) != 0)
    }
    #[doc = "Bit 30 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask30(&self) -> Pinmask30R {
        Pinmask30R::new(((self.bits >> 30) & 1) != 0)
    }
    #[doc = "Bit 31 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask31(&self) -> Pinmask31R {
        Pinmask31R::new(((self.bits >> 31) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask0(&mut self) -> Pinmask0W<'_, MaskSpec> {
        Pinmask0W::new(self, 0)
    }
    #[doc = "Bit 1 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask1(&mut self) -> Pinmask1W<'_, MaskSpec> {
        Pinmask1W::new(self, 1)
    }
    #[doc = "Bit 2 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask2(&mut self) -> Pinmask2W<'_, MaskSpec> {
        Pinmask2W::new(self, 2)
    }
    #[doc = "Bit 3 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask3(&mut self) -> Pinmask3W<'_, MaskSpec> {
        Pinmask3W::new(self, 3)
    }
    #[doc = "Bit 4 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask4(&mut self) -> Pinmask4W<'_, MaskSpec> {
        Pinmask4W::new(self, 4)
    }
    #[doc = "Bit 5 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask5(&mut self) -> Pinmask5W<'_, MaskSpec> {
        Pinmask5W::new(self, 5)
    }
    #[doc = "Bit 6 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask6(&mut self) -> Pinmask6W<'_, MaskSpec> {
        Pinmask6W::new(self, 6)
    }
    #[doc = "Bit 7 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask7(&mut self) -> Pinmask7W<'_, MaskSpec> {
        Pinmask7W::new(self, 7)
    }
    #[doc = "Bit 8 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask8(&mut self) -> Pinmask8W<'_, MaskSpec> {
        Pinmask8W::new(self, 8)
    }
    #[doc = "Bit 9 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask9(&mut self) -> Pinmask9W<'_, MaskSpec> {
        Pinmask9W::new(self, 9)
    }
    #[doc = "Bit 10 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask10(&mut self) -> Pinmask10W<'_, MaskSpec> {
        Pinmask10W::new(self, 10)
    }
    #[doc = "Bit 11 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask11(&mut self) -> Pinmask11W<'_, MaskSpec> {
        Pinmask11W::new(self, 11)
    }
    #[doc = "Bit 12 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask12(&mut self) -> Pinmask12W<'_, MaskSpec> {
        Pinmask12W::new(self, 12)
    }
    #[doc = "Bit 13 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask13(&mut self) -> Pinmask13W<'_, MaskSpec> {
        Pinmask13W::new(self, 13)
    }
    #[doc = "Bit 14 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask14(&mut self) -> Pinmask14W<'_, MaskSpec> {
        Pinmask14W::new(self, 14)
    }
    #[doc = "Bit 15 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask15(&mut self) -> Pinmask15W<'_, MaskSpec> {
        Pinmask15W::new(self, 15)
    }
    #[doc = "Bit 16 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask16(&mut self) -> Pinmask16W<'_, MaskSpec> {
        Pinmask16W::new(self, 16)
    }
    #[doc = "Bit 17 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask17(&mut self) -> Pinmask17W<'_, MaskSpec> {
        Pinmask17W::new(self, 17)
    }
    #[doc = "Bit 18 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask18(&mut self) -> Pinmask18W<'_, MaskSpec> {
        Pinmask18W::new(self, 18)
    }
    #[doc = "Bit 19 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask19(&mut self) -> Pinmask19W<'_, MaskSpec> {
        Pinmask19W::new(self, 19)
    }
    #[doc = "Bit 20 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask20(&mut self) -> Pinmask20W<'_, MaskSpec> {
        Pinmask20W::new(self, 20)
    }
    #[doc = "Bit 21 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask21(&mut self) -> Pinmask21W<'_, MaskSpec> {
        Pinmask21W::new(self, 21)
    }
    #[doc = "Bit 22 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask22(&mut self) -> Pinmask22W<'_, MaskSpec> {
        Pinmask22W::new(self, 22)
    }
    #[doc = "Bit 23 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask23(&mut self) -> Pinmask23W<'_, MaskSpec> {
        Pinmask23W::new(self, 23)
    }
    #[doc = "Bit 24 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask24(&mut self) -> Pinmask24W<'_, MaskSpec> {
        Pinmask24W::new(self, 24)
    }
    #[doc = "Bit 25 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask25(&mut self) -> Pinmask25W<'_, MaskSpec> {
        Pinmask25W::new(self, 25)
    }
    #[doc = "Bit 26 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask26(&mut self) -> Pinmask26W<'_, MaskSpec> {
        Pinmask26W::new(self, 26)
    }
    #[doc = "Bit 27 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask27(&mut self) -> Pinmask27W<'_, MaskSpec> {
        Pinmask27W::new(self, 27)
    }
    #[doc = "Bit 28 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask28(&mut self) -> Pinmask28W<'_, MaskSpec> {
        Pinmask28W::new(self, 28)
    }
    #[doc = "Bit 29 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask29(&mut self) -> Pinmask29W<'_, MaskSpec> {
        Pinmask29W::new(self, 29)
    }
    #[doc = "Bit 30 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask30(&mut self) -> Pinmask30W<'_, MaskSpec> {
        Pinmask30W::new(self, 30)
    }
    #[doc = "Bit 31 - Fast GPIO physical pin access control. 0 = Controlled pin is affected by writes to the port's SETx, CLRx, and PINx register(s). Current state of the pin can be read from the PINx register. 1 = Controlled pin is not affected by writes into the port's SETx, CLRx and PINx register(s). When the PINx register is read, this bit will not be updated with the state of the physical pin."]
    #[inline(always)]
    pub fn pinmask31(&mut self) -> Pinmask31W<'_, MaskSpec> {
        Pinmask31W::new(self, 31)
    }
}
#[doc = "Mask register for Port.\n\nYou can [`read`](crate::Reg::read) this register and get [`mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct MaskSpec;
impl crate::RegisterSpec for MaskSpec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`mask::R`](R) reader structure"]
impl crate::Readable for MaskSpec {}
#[doc = "`write(|w| ..)` method takes [`mask::W`](W) writer structure"]
impl crate::Writable for MaskSpec {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets MASK%s to value 0"]
impl crate::Resettable for MaskSpec {}
