#[doc = "Register `EOTINTSET` writer"]
pub type W = crate::W<EotintsetSpec>;
#[doc = "Field `EPTXINTSET0` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET1` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET2` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET3` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET4` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET5` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET6` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET7` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset7W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET8` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset8W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET9` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset9W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET10` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset10W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET11` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset11W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET12` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset12W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET13` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset13W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET14` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset14W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET15` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset15W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET16` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset16W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET17` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset17W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET18` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset18W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET19` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset19W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET20` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset20W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET21` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset21W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET22` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset22W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET23` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset23W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET24` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset24W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET25` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset25W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET26` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset26W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET27` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset27W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET28` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset28W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET29` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset29W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET30` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset30W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPTXINTSET31` writer - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
pub type Eptxintset31W<'a, REG> = crate::BitWriter<'a, REG>;
impl W {
    #[doc = "Bit 0 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset0(&mut self) -> Eptxintset0W<'_, EotintsetSpec> {
        Eptxintset0W::new(self, 0)
    }
    #[doc = "Bit 1 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset1(&mut self) -> Eptxintset1W<'_, EotintsetSpec> {
        Eptxintset1W::new(self, 1)
    }
    #[doc = "Bit 2 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset2(&mut self) -> Eptxintset2W<'_, EotintsetSpec> {
        Eptxintset2W::new(self, 2)
    }
    #[doc = "Bit 3 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset3(&mut self) -> Eptxintset3W<'_, EotintsetSpec> {
        Eptxintset3W::new(self, 3)
    }
    #[doc = "Bit 4 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset4(&mut self) -> Eptxintset4W<'_, EotintsetSpec> {
        Eptxintset4W::new(self, 4)
    }
    #[doc = "Bit 5 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset5(&mut self) -> Eptxintset5W<'_, EotintsetSpec> {
        Eptxintset5W::new(self, 5)
    }
    #[doc = "Bit 6 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset6(&mut self) -> Eptxintset6W<'_, EotintsetSpec> {
        Eptxintset6W::new(self, 6)
    }
    #[doc = "Bit 7 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset7(&mut self) -> Eptxintset7W<'_, EotintsetSpec> {
        Eptxintset7W::new(self, 7)
    }
    #[doc = "Bit 8 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset8(&mut self) -> Eptxintset8W<'_, EotintsetSpec> {
        Eptxintset8W::new(self, 8)
    }
    #[doc = "Bit 9 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset9(&mut self) -> Eptxintset9W<'_, EotintsetSpec> {
        Eptxintset9W::new(self, 9)
    }
    #[doc = "Bit 10 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset10(&mut self) -> Eptxintset10W<'_, EotintsetSpec> {
        Eptxintset10W::new(self, 10)
    }
    #[doc = "Bit 11 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset11(&mut self) -> Eptxintset11W<'_, EotintsetSpec> {
        Eptxintset11W::new(self, 11)
    }
    #[doc = "Bit 12 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset12(&mut self) -> Eptxintset12W<'_, EotintsetSpec> {
        Eptxintset12W::new(self, 12)
    }
    #[doc = "Bit 13 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset13(&mut self) -> Eptxintset13W<'_, EotintsetSpec> {
        Eptxintset13W::new(self, 13)
    }
    #[doc = "Bit 14 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset14(&mut self) -> Eptxintset14W<'_, EotintsetSpec> {
        Eptxintset14W::new(self, 14)
    }
    #[doc = "Bit 15 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset15(&mut self) -> Eptxintset15W<'_, EotintsetSpec> {
        Eptxintset15W::new(self, 15)
    }
    #[doc = "Bit 16 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset16(&mut self) -> Eptxintset16W<'_, EotintsetSpec> {
        Eptxintset16W::new(self, 16)
    }
    #[doc = "Bit 17 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset17(&mut self) -> Eptxintset17W<'_, EotintsetSpec> {
        Eptxintset17W::new(self, 17)
    }
    #[doc = "Bit 18 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset18(&mut self) -> Eptxintset18W<'_, EotintsetSpec> {
        Eptxintset18W::new(self, 18)
    }
    #[doc = "Bit 19 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset19(&mut self) -> Eptxintset19W<'_, EotintsetSpec> {
        Eptxintset19W::new(self, 19)
    }
    #[doc = "Bit 20 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset20(&mut self) -> Eptxintset20W<'_, EotintsetSpec> {
        Eptxintset20W::new(self, 20)
    }
    #[doc = "Bit 21 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset21(&mut self) -> Eptxintset21W<'_, EotintsetSpec> {
        Eptxintset21W::new(self, 21)
    }
    #[doc = "Bit 22 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset22(&mut self) -> Eptxintset22W<'_, EotintsetSpec> {
        Eptxintset22W::new(self, 22)
    }
    #[doc = "Bit 23 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset23(&mut self) -> Eptxintset23W<'_, EotintsetSpec> {
        Eptxintset23W::new(self, 23)
    }
    #[doc = "Bit 24 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset24(&mut self) -> Eptxintset24W<'_, EotintsetSpec> {
        Eptxintset24W::new(self, 24)
    }
    #[doc = "Bit 25 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset25(&mut self) -> Eptxintset25W<'_, EotintsetSpec> {
        Eptxintset25W::new(self, 25)
    }
    #[doc = "Bit 26 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset26(&mut self) -> Eptxintset26W<'_, EotintsetSpec> {
        Eptxintset26W::new(self, 26)
    }
    #[doc = "Bit 27 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset27(&mut self) -> Eptxintset27W<'_, EotintsetSpec> {
        Eptxintset27W::new(self, 27)
    }
    #[doc = "Bit 28 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset28(&mut self) -> Eptxintset28W<'_, EotintsetSpec> {
        Eptxintset28W::new(self, 28)
    }
    #[doc = "Bit 29 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset29(&mut self) -> Eptxintset29W<'_, EotintsetSpec> {
        Eptxintset29W::new(self, 29)
    }
    #[doc = "Bit 30 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset30(&mut self) -> Eptxintset30W<'_, EotintsetSpec> {
        Eptxintset30W::new(self, 30)
    }
    #[doc = "Bit 31 - Set endpoint xx (2 <= xx <= 31) End of Transfer Interrupt request. 0 = No effect. 1 = Set the EPxx End of Transfer Interrupt request in the USBEoTIntSt register."]
    #[inline(always)]
    pub fn eptxintset31(&mut self) -> Eptxintset31W<'_, EotintsetSpec> {
        Eptxintset31W::new(self, 31)
    }
}
#[doc = "USB End of Transfer Interrupt Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`eotintset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct EotintsetSpec;
impl crate::RegisterSpec for EotintsetSpec {
    type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [`eotintset::W`](W) writer structure"]
impl crate::Writable for EotintsetSpec {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets EOTINTSET to value 0"]
impl crate::Resettable for EotintsetSpec {}
