#![doc = "Peripheral access API for MCXA256 microcontrollers (generated using svd2rust v0.37.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.37.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
#![allow(non_camel_case_types)]
#![allow(non_snake_case)]
#![no_std]
#![cfg_attr(docsrs, feature(doc_cfg))]
#[doc = r"Number available in the NVIC for configuring priority"]
pub const NVIC_PRIO_BITS: u8 = 3;
#[cfg(feature = "rt")]
pub use self::Interrupt as interrupt;
#[cfg(feature = "rt")]
pub use cortex_m_rt::interrupt;
#[allow(unused_imports)]
use generic::*;
#[doc = r"Common register and bit access and modify traits"]
pub mod generic;
#[cfg(feature = "rt")]
extern "C" {
    fn Reserved16();
    fn CMC();
    fn DMA_CH0();
    fn DMA_CH1();
    fn DMA_CH2();
    fn DMA_CH3();
    fn DMA_CH4();
    fn DMA_CH5();
    fn DMA_CH6();
    fn DMA_CH7();
    fn ERM0_SINGLE_BIT();
    fn ERM0_MULTI_BIT();
    fn FMU0();
    fn GLIKEY0();
    fn MBC0();
    fn SCG0();
    fn SPC0();
    fn TDET();
    fn WUU0();
    fn CAN0();
    fn CAN1();
    fn FLEXIO();
    fn I3C0();
    fn LPI2C0();
    fn LPI2C1();
    fn LPSPI0();
    fn LPSPI1();
    fn LPUART0();
    fn LPUART1();
    fn LPUART2();
    fn LPUART3();
    fn LPUART4();
    fn USB0();
    fn CDOG0();
    fn CTIMER0();
    fn CTIMER1();
    fn CTIMER2();
    fn CTIMER3();
    fn CTIMER4();
    fn FLEXPWM0_RELOAD_ERROR();
    fn FLEXPWM0_FAULT();
    fn FLEXPWM0_SUBMODULE0();
    fn FLEXPWM0_SUBMODULE1();
    fn FLEXPWM0_SUBMODULE2();
    fn FLEXPWM0_SUBMODULE3();
    fn EQDC0_COMPARE();
    fn EQDC0_HOME();
    fn EQDC0_WATCHDOG();
    fn EQDC0_INDEX();
    fn FREQME0();
    fn LPTMR0();
    fn OS_EVENT();
    fn WAKETIMER0();
    fn UTICK0();
    fn WWDT0();
    fn ADC0();
    fn ADC1();
    fn CMP0();
    fn CMP1();
    fn CMP2();
    fn DAC0();
    fn GPIO0();
    fn GPIO1();
    fn GPIO2();
    fn GPIO3();
    fn GPIO4();
    fn LPI2C2();
    fn LPI2C3();
    fn FLEXPWM1_RELOAD_ERROR();
    fn FLEXPWM1_FAULT();
    fn FLEXPWM1_SUBMODULE0();
    fn FLEXPWM1_SUBMODULE1();
    fn FLEXPWM1_SUBMODULE2();
    fn FLEXPWM1_SUBMODULE3();
    fn EQDC1_COMPARE();
    fn EQDC1_HOME();
    fn EQDC1_WATCHDOG();
    fn EQDC1_INDEX();
    fn LPUART5();
    fn MAU();
    fn SMARTDMA();
    fn CDOG1();
    fn PKC();
    fn SGI();
    fn TRNG0();
    fn ADC2();
    fn ADC3();
    fn RTC();
    fn RTC_1HZ();
    fn SLCD();
}
#[doc(hidden)]
#[repr(C)]
pub union Vector {
    _handler: unsafe extern "C" fn(),
    _reserved: u32,
}
#[cfg(feature = "rt")]
#[doc(hidden)]
#[link_section = ".vector_table.interrupts"]
#[no_mangle]
pub static __INTERRUPTS: [Vector; 122] = [
    Vector { _handler: Reserved16 },
    Vector { _handler: CMC },
    Vector { _handler: DMA_CH0 },
    Vector { _handler: DMA_CH1 },
    Vector { _handler: DMA_CH2 },
    Vector { _handler: DMA_CH3 },
    Vector { _handler: DMA_CH4 },
    Vector { _handler: DMA_CH5 },
    Vector { _handler: DMA_CH6 },
    Vector { _handler: DMA_CH7 },
    Vector {
        _handler: ERM0_SINGLE_BIT,
    },
    Vector {
        _handler: ERM0_MULTI_BIT,
    },
    Vector { _handler: FMU0 },
    Vector { _handler: GLIKEY0 },
    Vector { _handler: MBC0 },
    Vector { _handler: SCG0 },
    Vector { _handler: SPC0 },
    Vector { _handler: TDET },
    Vector { _handler: WUU0 },
    Vector { _handler: CAN0 },
    Vector { _handler: CAN1 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _handler: FLEXIO },
    Vector { _handler: I3C0 },
    Vector { _reserved: 0 },
    Vector { _handler: LPI2C0 },
    Vector { _handler: LPI2C1 },
    Vector { _handler: LPSPI0 },
    Vector { _handler: LPSPI1 },
    Vector { _reserved: 0 },
    Vector { _handler: LPUART0 },
    Vector { _handler: LPUART1 },
    Vector { _handler: LPUART2 },
    Vector { _handler: LPUART3 },
    Vector { _handler: LPUART4 },
    Vector { _handler: USB0 },
    Vector { _reserved: 0 },
    Vector { _handler: CDOG0 },
    Vector { _handler: CTIMER0 },
    Vector { _handler: CTIMER1 },
    Vector { _handler: CTIMER2 },
    Vector { _handler: CTIMER3 },
    Vector { _handler: CTIMER4 },
    Vector {
        _handler: FLEXPWM0_RELOAD_ERROR,
    },
    Vector {
        _handler: FLEXPWM0_FAULT,
    },
    Vector {
        _handler: FLEXPWM0_SUBMODULE0,
    },
    Vector {
        _handler: FLEXPWM0_SUBMODULE1,
    },
    Vector {
        _handler: FLEXPWM0_SUBMODULE2,
    },
    Vector {
        _handler: FLEXPWM0_SUBMODULE3,
    },
    Vector {
        _handler: EQDC0_COMPARE,
    },
    Vector { _handler: EQDC0_HOME },
    Vector {
        _handler: EQDC0_WATCHDOG,
    },
    Vector { _handler: EQDC0_INDEX },
    Vector { _handler: FREQME0 },
    Vector { _handler: LPTMR0 },
    Vector { _reserved: 0 },
    Vector { _handler: OS_EVENT },
    Vector { _handler: WAKETIMER0 },
    Vector { _handler: UTICK0 },
    Vector { _handler: WWDT0 },
    Vector { _reserved: 0 },
    Vector { _handler: ADC0 },
    Vector { _handler: ADC1 },
    Vector { _handler: CMP0 },
    Vector { _handler: CMP1 },
    Vector { _handler: CMP2 },
    Vector { _handler: DAC0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _handler: GPIO0 },
    Vector { _handler: GPIO1 },
    Vector { _handler: GPIO2 },
    Vector { _handler: GPIO3 },
    Vector { _handler: GPIO4 },
    Vector { _reserved: 0 },
    Vector { _handler: LPI2C2 },
    Vector { _handler: LPI2C3 },
    Vector {
        _handler: FLEXPWM1_RELOAD_ERROR,
    },
    Vector {
        _handler: FLEXPWM1_FAULT,
    },
    Vector {
        _handler: FLEXPWM1_SUBMODULE0,
    },
    Vector {
        _handler: FLEXPWM1_SUBMODULE1,
    },
    Vector {
        _handler: FLEXPWM1_SUBMODULE2,
    },
    Vector {
        _handler: FLEXPWM1_SUBMODULE3,
    },
    Vector {
        _handler: EQDC1_COMPARE,
    },
    Vector { _handler: EQDC1_HOME },
    Vector {
        _handler: EQDC1_WATCHDOG,
    },
    Vector { _handler: EQDC1_INDEX },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _handler: LPUART5 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _handler: MAU },
    Vector { _handler: SMARTDMA },
    Vector { _handler: CDOG1 },
    Vector { _handler: PKC },
    Vector { _handler: SGI },
    Vector { _reserved: 0 },
    Vector { _handler: TRNG0 },
    Vector { _reserved: 0 },
    Vector { _reserved: 0 },
    Vector { _handler: ADC2 },
    Vector { _handler: ADC3 },
    Vector { _reserved: 0 },
    Vector { _handler: RTC },
    Vector { _handler: RTC_1HZ },
    Vector { _handler: SLCD },
];
#[doc = r"Enumeration of all the interrupts."]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[repr(u16)]
pub enum Interrupt {
    #[doc = "0 - Reserved16"]
    Reserved16 = 0,
    #[doc = "1 - CMC"]
    CMC = 1,
    #[doc = "2 - DMA_CH0"]
    DMA_CH0 = 2,
    #[doc = "3 - DMA_CH1"]
    DMA_CH1 = 3,
    #[doc = "4 - DMA_CH2"]
    DMA_CH2 = 4,
    #[doc = "5 - DMA_CH3"]
    DMA_CH3 = 5,
    #[doc = "6 - DMA_CH4"]
    DMA_CH4 = 6,
    #[doc = "7 - DMA_CH5"]
    DMA_CH5 = 7,
    #[doc = "8 - DMA_CH6"]
    DMA_CH6 = 8,
    #[doc = "9 - DMA_CH7"]
    DMA_CH7 = 9,
    #[doc = "10 - ERM0_SINGLE_BIT"]
    ERM0_SINGLE_BIT = 10,
    #[doc = "11 - ERM0_MULTI_BIT"]
    ERM0_MULTI_BIT = 11,
    #[doc = "12 - FMU0"]
    FMU0 = 12,
    #[doc = "13 - GLIKEY0"]
    GLIKEY0 = 13,
    #[doc = "14 - MBC0"]
    MBC0 = 14,
    #[doc = "15 - SCG0"]
    SCG0 = 15,
    #[doc = "16 - SPC0"]
    SPC0 = 16,
    #[doc = "17 - TDET"]
    TDET = 17,
    #[doc = "18 - WUU0"]
    WUU0 = 18,
    #[doc = "19 - CAN0"]
    CAN0 = 19,
    #[doc = "20 - CAN1"]
    CAN1 = 20,
    #[doc = "23 - FLEXIO"]
    FLEXIO = 23,
    #[doc = "24 - I3C0"]
    I3C0 = 24,
    #[doc = "26 - LPI2C0"]
    LPI2C0 = 26,
    #[doc = "27 - LPI2C1"]
    LPI2C1 = 27,
    #[doc = "28 - LPSPI0"]
    LPSPI0 = 28,
    #[doc = "29 - LPSPI1"]
    LPSPI1 = 29,
    #[doc = "31 - LPUART0"]
    LPUART0 = 31,
    #[doc = "32 - LPUART1"]
    LPUART1 = 32,
    #[doc = "33 - LPUART2"]
    LPUART2 = 33,
    #[doc = "34 - LPUART3"]
    LPUART3 = 34,
    #[doc = "35 - LPUART4"]
    LPUART4 = 35,
    #[doc = "36 - USB0"]
    USB0 = 36,
    #[doc = "38 - CDOG0"]
    CDOG0 = 38,
    #[doc = "39 - CTIMER0"]
    CTIMER0 = 39,
    #[doc = "40 - CTIMER1"]
    CTIMER1 = 40,
    #[doc = "41 - CTIMER2"]
    CTIMER2 = 41,
    #[doc = "42 - CTIMER3"]
    CTIMER3 = 42,
    #[doc = "43 - CTIMER4"]
    CTIMER4 = 43,
    #[doc = "44 - FLEXPWM0_RELOAD_ERROR"]
    FLEXPWM0_RELOAD_ERROR = 44,
    #[doc = "45 - FLEXPWM0_FAULT"]
    FLEXPWM0_FAULT = 45,
    #[doc = "46 - FLEXPWM0_SUBMODULE0"]
    FLEXPWM0_SUBMODULE0 = 46,
    #[doc = "47 - FLEXPWM0_SUBMODULE1"]
    FLEXPWM0_SUBMODULE1 = 47,
    #[doc = "48 - FLEXPWM0_SUBMODULE2"]
    FLEXPWM0_SUBMODULE2 = 48,
    #[doc = "49 - FLEXPWM0_SUBMODULE3"]
    FLEXPWM0_SUBMODULE3 = 49,
    #[doc = "50 - EQDC0_COMPARE"]
    EQDC0_COMPARE = 50,
    #[doc = "51 - EQDC0_HOME"]
    EQDC0_HOME = 51,
    #[doc = "52 - EQDC0_WATCHDOG"]
    EQDC0_WATCHDOG = 52,
    #[doc = "53 - EQDC0_INDEX"]
    EQDC0_INDEX = 53,
    #[doc = "54 - FREQME0"]
    FREQME0 = 54,
    #[doc = "55 - LPTMR0"]
    LPTMR0 = 55,
    #[doc = "57 - OS_EVENT"]
    OS_EVENT = 57,
    #[doc = "58 - WAKETIMER0"]
    WAKETIMER0 = 58,
    #[doc = "59 - UTICK0"]
    UTICK0 = 59,
    #[doc = "60 - WWDT0"]
    WWDT0 = 60,
    #[doc = "62 - ADC0"]
    ADC0 = 62,
    #[doc = "63 - ADC1"]
    ADC1 = 63,
    #[doc = "64 - CMP0"]
    CMP0 = 64,
    #[doc = "65 - CMP1"]
    CMP1 = 65,
    #[doc = "66 - CMP2"]
    CMP2 = 66,
    #[doc = "67 - DAC0"]
    DAC0 = 67,
    #[doc = "71 - GPIO0"]
    GPIO0 = 71,
    #[doc = "72 - GPIO1"]
    GPIO1 = 72,
    #[doc = "73 - GPIO2"]
    GPIO2 = 73,
    #[doc = "74 - GPIO3"]
    GPIO3 = 74,
    #[doc = "75 - GPIO4"]
    GPIO4 = 75,
    #[doc = "77 - LPI2C2"]
    LPI2C2 = 77,
    #[doc = "78 - LPI2C3"]
    LPI2C3 = 78,
    #[doc = "79 - FLEXPWM1_RELOAD_ERROR"]
    FLEXPWM1_RELOAD_ERROR = 79,
    #[doc = "80 - FLEXPWM1_FAULT"]
    FLEXPWM1_FAULT = 80,
    #[doc = "81 - FLEXPWM1_SUBMODULE0"]
    FLEXPWM1_SUBMODULE0 = 81,
    #[doc = "82 - FLEXPWM1_SUBMODULE1"]
    FLEXPWM1_SUBMODULE1 = 82,
    #[doc = "83 - FLEXPWM1_SUBMODULE2"]
    FLEXPWM1_SUBMODULE2 = 83,
    #[doc = "84 - FLEXPWM1_SUBMODULE3"]
    FLEXPWM1_SUBMODULE3 = 84,
    #[doc = "85 - EQDC1_COMPARE"]
    EQDC1_COMPARE = 85,
    #[doc = "86 - EQDC1_HOME"]
    EQDC1_HOME = 86,
    #[doc = "87 - EQDC1_WATCHDOG"]
    EQDC1_WATCHDOG = 87,
    #[doc = "88 - EQDC1_INDEX"]
    EQDC1_INDEX = 88,
    #[doc = "95 - LPUART5"]
    LPUART5 = 95,
    #[doc = "107 - MAU"]
    MAU = 107,
    #[doc = "108 - SMARTDMA"]
    SMARTDMA = 108,
    #[doc = "109 - CDOG1"]
    CDOG1 = 109,
    #[doc = "110 - PKC"]
    PKC = 110,
    #[doc = "111 - SGI"]
    SGI = 111,
    #[doc = "113 - TRNG0"]
    TRNG0 = 113,
    #[doc = "116 - ADC2"]
    ADC2 = 116,
    #[doc = "117 - ADC3"]
    ADC3 = 117,
    #[doc = "119 - RTC"]
    RTC = 119,
    #[doc = "120 - RTC_1HZ"]
    RTC_1HZ = 120,
    #[doc = "121 - SLCD"]
    SLCD = 121,
}
unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
    #[inline(always)]
    fn number(self) -> u16 {
        self as u16
    }
}
#[doc = "INPUTMUX"]
pub type Inputmux0 = crate::Periph<inputmux0::RegisterBlock, 0x4000_1000>;
impl core::fmt::Debug for Inputmux0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Inputmux0").finish()
    }
}
#[doc = "INPUTMUX"]
pub mod inputmux0;
#[doc = "Improved Inter-Integrated Circuit"]
pub type I3c0 = crate::Periph<i3c0::RegisterBlock, 0x4000_2000>;
impl core::fmt::Debug for I3c0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("I3c0").finish()
    }
}
#[doc = "Improved Inter-Integrated Circuit"]
pub mod i3c0;
#[doc = "Standard Counter or Timer"]
pub type Ctimer0 = crate::Periph<ctimer0::RegisterBlock, 0x4000_4000>;
impl core::fmt::Debug for Ctimer0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Ctimer0").finish()
    }
}
#[doc = "Standard Counter or Timer"]
pub mod ctimer0;
#[doc = "Standard Counter or Timer"]
pub type Ctimer1 = crate::Periph<ctimer0::RegisterBlock, 0x4000_5000>;
impl core::fmt::Debug for Ctimer1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Ctimer1").finish()
    }
}
#[doc = "Standard Counter or Timer"]
pub use self::ctimer0 as ctimer1;
#[doc = "Standard Counter or Timer"]
pub type Ctimer2 = crate::Periph<ctimer0::RegisterBlock, 0x4000_6000>;
impl core::fmt::Debug for Ctimer2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Ctimer2").finish()
    }
}
#[doc = "Standard Counter or Timer"]
pub use self::ctimer0 as ctimer2;
#[doc = "Standard Counter or Timer"]
pub type Ctimer3 = crate::Periph<ctimer0::RegisterBlock, 0x4000_7000>;
impl core::fmt::Debug for Ctimer3 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Ctimer3").finish()
    }
}
#[doc = "Standard Counter or Timer"]
pub use self::ctimer0 as ctimer3;
#[doc = "Standard Counter or Timer"]
pub type Ctimer4 = crate::Periph<ctimer0::RegisterBlock, 0x4000_8000>;
impl core::fmt::Debug for Ctimer4 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Ctimer4").finish()
    }
}
#[doc = "Standard Counter or Timer"]
pub use self::ctimer0 as ctimer4;
#[doc = "FREQME"]
pub type Freqme0 = crate::Periph<freqme0::RegisterBlock, 0x4000_9000>;
impl core::fmt::Debug for Freqme0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Freqme0").finish()
    }
}
#[doc = "FREQME"]
pub mod freqme0;
#[doc = "UTICK"]
pub type Utick0 = crate::Periph<utick0::RegisterBlock, 0x4000_b000>;
impl core::fmt::Debug for Utick0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Utick0").finish()
    }
}
#[doc = "UTICK"]
pub mod utick0;
#[doc = "WWDT"]
pub type Wwdt0 = crate::Periph<wwdt0::RegisterBlock, 0x4000_c000>;
impl core::fmt::Debug for Wwdt0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Wwdt0").finish()
    }
}
#[doc = "WWDT"]
pub mod wwdt0;
#[doc = "Smart DMA Controller"]
pub type Smartdma0 = crate::Periph<smartdma0::RegisterBlock, 0x4000_e000>;
impl core::fmt::Debug for Smartdma0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Smartdma0").finish()
    }
}
#[doc = "Smart DMA Controller"]
pub mod smartdma0;
#[doc = "DMA MP"]
pub type Dma0 = crate::Periph<dma0::RegisterBlock, 0x4008_0000>;
impl core::fmt::Debug for Dma0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Dma0").finish()
    }
}
#[doc = "DMA MP"]
pub mod dma0;
#[doc = "DMA TCD"]
pub type Edma0Tcd0 = crate::Periph<edma_0_tcd0::RegisterBlock, 0x4008_1000>;
impl core::fmt::Debug for Edma0Tcd0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Edma0Tcd0").finish()
    }
}
#[doc = "DMA TCD"]
pub mod edma_0_tcd0;
#[doc = "AOI"]
pub type Aoi0 = crate::Periph<aoi0::RegisterBlock, 0x4008_9000>;
impl core::fmt::Debug for Aoi0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Aoi0").finish()
    }
}
#[doc = "AOI"]
pub mod aoi0;
#[doc = "AOI"]
pub type Aoi1 = crate::Periph<aoi0::RegisterBlock, 0x4009_7000>;
impl core::fmt::Debug for Aoi1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Aoi1").finish()
    }
}
#[doc = "AOI"]
pub use self::aoi0 as aoi1;
#[doc = "CRC"]
pub type Crc0 = crate::Periph<crc0::RegisterBlock, 0x4008_a000>;
impl core::fmt::Debug for Crc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Crc0").finish()
    }
}
#[doc = "CRC"]
pub mod crc0;
#[doc = "CMC"]
pub type Cmc = crate::Periph<cmc::RegisterBlock, 0x4008_b000>;
impl core::fmt::Debug for Cmc {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Cmc").finish()
    }
}
#[doc = "CMC"]
pub mod cmc;
#[doc = "Error Injection Module"]
pub type Eim0 = crate::Periph<eim0::RegisterBlock, 0x4008_c000>;
impl core::fmt::Debug for Eim0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Eim0").finish()
    }
}
#[doc = "Error Injection Module"]
pub mod eim0;
#[doc = "Error Reporting Module"]
pub type Erm0 = crate::Periph<erm0::RegisterBlock, 0x4008_d000>;
impl core::fmt::Debug for Erm0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Erm0").finish()
    }
}
#[doc = "Error Reporting Module"]
pub mod erm0;
#[doc = "TRDC"]
pub type Mbc0 = crate::Periph<mbc0::RegisterBlock, 0x4008_e000>;
impl core::fmt::Debug for Mbc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Mbc0").finish()
    }
}
#[doc = "TRDC"]
pub mod mbc0;
#[doc = "System Clock Generator"]
pub type Scg0 = crate::Periph<scg0::RegisterBlock, 0x4008_f000>;
impl core::fmt::Debug for Scg0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Scg0").finish()
    }
}
#[doc = "System Clock Generator"]
pub mod scg0;
#[doc = "SPC"]
pub type Spc0 = crate::Periph<spc0::RegisterBlock, 0x4009_0000>;
impl core::fmt::Debug for Spc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Spc0").finish()
    }
}
#[doc = "SPC"]
pub mod spc0;
#[doc = "MRCC"]
pub type Mrcc0 = crate::Periph<mrcc0::RegisterBlock, 0x4009_1000>;
impl core::fmt::Debug for Mrcc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Mrcc0").finish()
    }
}
#[doc = "MRCC"]
pub mod mrcc0;
#[doc = "SYSCON"]
pub type Syscon = crate::Periph<syscon::RegisterBlock, 0x4009_1000>;
impl core::fmt::Debug for Syscon {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Syscon").finish()
    }
}
#[doc = "SYSCON"]
pub mod syscon;
#[doc = "GLIKEY"]
pub type Glikey0 = crate::Periph<glikey0::RegisterBlock, 0x4009_1d00>;
impl core::fmt::Debug for Glikey0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Glikey0").finish()
    }
}
#[doc = "GLIKEY"]
pub mod glikey0;
#[doc = "Low-Leakage Wakeup Unit"]
pub type Wuu0 = crate::Periph<wuu0::RegisterBlock, 0x4009_2000>;
impl core::fmt::Debug for Wuu0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Wuu0").finish()
    }
}
#[doc = "Low-Leakage Wakeup Unit"]
pub mod wuu0;
#[doc = "VBAT"]
pub type Vbat0 = crate::Periph<vbat0::RegisterBlock, 0x4009_3000>;
impl core::fmt::Debug for Vbat0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Vbat0").finish()
    }
}
#[doc = "VBAT"]
pub mod vbat0;
#[doc = "NPX"]
pub type Fmc0 = crate::Periph<fmc0::RegisterBlock, 0x4009_4000>;
impl core::fmt::Debug for Fmc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Fmc0").finish()
    }
}
#[doc = "NPX"]
pub mod fmc0;
#[doc = "Flash"]
pub type Fmu0 = crate::Periph<fmu0::RegisterBlock, 0x4009_5000>;
impl core::fmt::Debug for Fmu0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Fmu0").finish()
    }
}
#[doc = "Flash"]
pub mod fmu0;
#[doc = "Flexible I/O"]
pub type Flexio0 = crate::Periph<flexio0::RegisterBlock, 0x4009_9000>;
impl core::fmt::Debug for Flexio0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Flexio0").finish()
    }
}
#[doc = "Flexible I/O"]
pub mod flexio0;
#[doc = "Low-Power Inter-Integrated Circuit"]
pub type Lpi2c0 = crate::Periph<lpi2c0::RegisterBlock, 0x4009_a000>;
impl core::fmt::Debug for Lpi2c0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpi2c0").finish()
    }
}
#[doc = "Low-Power Inter-Integrated Circuit"]
pub mod lpi2c0;
#[doc = "Low-Power Inter-Integrated Circuit"]
pub type Lpi2c1 = crate::Periph<lpi2c0::RegisterBlock, 0x4009_b000>;
impl core::fmt::Debug for Lpi2c1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpi2c1").finish()
    }
}
#[doc = "Low-Power Inter-Integrated Circuit"]
pub use self::lpi2c0 as lpi2c1;
#[doc = "Low-Power Inter-Integrated Circuit"]
pub type Lpi2c2 = crate::Periph<lpi2c0::RegisterBlock, 0x400d_4000>;
impl core::fmt::Debug for Lpi2c2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpi2c2").finish()
    }
}
#[doc = "Low-Power Inter-Integrated Circuit"]
pub use self::lpi2c0 as lpi2c2;
#[doc = "Low-Power Inter-Integrated Circuit"]
pub type Lpi2c3 = crate::Periph<lpi2c0::RegisterBlock, 0x400d_5000>;
impl core::fmt::Debug for Lpi2c3 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpi2c3").finish()
    }
}
#[doc = "Low-Power Inter-Integrated Circuit"]
pub use self::lpi2c0 as lpi2c3;
#[doc = "LPUART"]
pub type Lpuart5 = crate::Periph<lpuart0::RegisterBlock, 0x400d_a000>;
impl core::fmt::Debug for Lpuart5 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpuart5").finish()
    }
}
#[doc = "LPUART"]
pub use self::lpuart0 as lpuart5;
#[doc = "Low-Power Serial Peripheral Interface"]
pub type Lpspi0 = crate::Periph<lpspi0::RegisterBlock, 0x4009_c000>;
impl core::fmt::Debug for Lpspi0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpspi0").finish()
    }
}
#[doc = "Low-Power Serial Peripheral Interface"]
pub mod lpspi0;
#[doc = "Low-Power Serial Peripheral Interface"]
pub type Lpspi1 = crate::Periph<lpspi0::RegisterBlock, 0x4009_d000>;
impl core::fmt::Debug for Lpspi1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpspi1").finish()
    }
}
#[doc = "Low-Power Serial Peripheral Interface"]
pub use self::lpspi0 as lpspi1;
#[doc = "LPUART"]
pub type Lpuart0 = crate::Periph<lpuart0::RegisterBlock, 0x4009_f000>;
impl core::fmt::Debug for Lpuart0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpuart0").finish()
    }
}
#[doc = "LPUART"]
pub mod lpuart0;
#[doc = "LPUART"]
pub type Lpuart1 = crate::Periph<lpuart0::RegisterBlock, 0x400a_0000>;
impl core::fmt::Debug for Lpuart1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpuart1").finish()
    }
}
#[doc = "LPUART"]
pub use self::lpuart0 as lpuart1;
#[doc = "LPUART"]
pub type Lpuart2 = crate::Periph<lpuart0::RegisterBlock, 0x400a_1000>;
impl core::fmt::Debug for Lpuart2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpuart2").finish()
    }
}
#[doc = "LPUART"]
pub use self::lpuart0 as lpuart2;
#[doc = "LPUART"]
pub type Lpuart3 = crate::Periph<lpuart0::RegisterBlock, 0x400a_2000>;
impl core::fmt::Debug for Lpuart3 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpuart3").finish()
    }
}
#[doc = "LPUART"]
pub use self::lpuart0 as lpuart3;
#[doc = "LPUART"]
pub type Lpuart4 = crate::Periph<lpuart0::RegisterBlock, 0x400a_3000>;
impl core::fmt::Debug for Lpuart4 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lpuart4").finish()
    }
}
#[doc = "LPUART"]
pub use self::lpuart0 as lpuart4;
#[doc = "USBFS"]
pub type Usb0 = crate::Periph<usb0::RegisterBlock, 0x400a_4000>;
impl core::fmt::Debug for Usb0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Usb0").finish()
    }
}
#[doc = "USBFS"]
pub mod usb0;
#[doc = "Quadrature_Decoder"]
pub type Eqdc0 = crate::Periph<eqdc0::RegisterBlock, 0x400a_7000>;
impl core::fmt::Debug for Eqdc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Eqdc0").finish()
    }
}
#[doc = "Quadrature_Decoder"]
pub mod eqdc0;
#[doc = "Quadrature_Decoder"]
pub type Eqdc1 = crate::Periph<eqdc0::RegisterBlock, 0x400a_8000>;
impl core::fmt::Debug for Eqdc1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Eqdc1").finish()
    }
}
#[doc = "Quadrature_Decoder"]
pub use self::eqdc0 as eqdc1;
#[doc = "PWM"]
pub type Flexpwm0 = crate::Periph<flexpwm0::RegisterBlock, 0x400a_9000>;
impl core::fmt::Debug for Flexpwm0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Flexpwm0").finish()
    }
}
#[doc = "PWM"]
pub mod flexpwm0;
#[doc = "PWM"]
pub type Flexpwm1 = crate::Periph<flexpwm0::RegisterBlock, 0x400a_a000>;
impl core::fmt::Debug for Flexpwm1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Flexpwm1").finish()
    }
}
#[doc = "PWM"]
pub use self::flexpwm0 as flexpwm1;
#[doc = "LPTMR"]
pub type Lptmr0 = crate::Periph<lptmr0::RegisterBlock, 0x400a_b000>;
impl core::fmt::Debug for Lptmr0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Lptmr0").finish()
    }
}
#[doc = "LPTMR"]
pub mod lptmr0;
#[doc = "OSTIMER"]
pub type Ostimer0 = crate::Periph<ostimer0::RegisterBlock, 0x400a_d000>;
impl core::fmt::Debug for Ostimer0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Ostimer0").finish()
    }
}
#[doc = "OSTIMER"]
pub mod ostimer0;
#[doc = "WAKE_TIMER"]
pub type Waketimer0 = crate::Periph<waketimer0::RegisterBlock, 0x400a_e000>;
impl core::fmt::Debug for Waketimer0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Waketimer0").finish()
    }
}
#[doc = "WAKE_TIMER"]
pub mod waketimer0;
#[doc = "ADC"]
pub type Adc0 = crate::Periph<adc0::RegisterBlock, 0x400a_f000>;
impl core::fmt::Debug for Adc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Adc0").finish()
    }
}
#[doc = "ADC"]
pub mod adc0;
#[doc = "ADC"]
pub type Adc1 = crate::Periph<adc0::RegisterBlock, 0x400b_0000>;
impl core::fmt::Debug for Adc1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Adc1").finish()
    }
}
#[doc = "ADC"]
pub use self::adc0 as adc1;
#[doc = "LPCMP"]
pub type Cmp0 = crate::Periph<cmp0::RegisterBlock, 0x400b_1000>;
impl core::fmt::Debug for Cmp0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Cmp0").finish()
    }
}
#[doc = "LPCMP"]
pub mod cmp0;
#[doc = "LPCMP"]
pub type Cmp1 = crate::Periph<cmp0::RegisterBlock, 0x400b_2000>;
impl core::fmt::Debug for Cmp1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Cmp1").finish()
    }
}
#[doc = "LPCMP"]
pub use self::cmp0 as cmp1;
#[doc = "12-bit DAC"]
pub type Dac0 = crate::Periph<dac0::RegisterBlock, 0x400b_4000>;
impl core::fmt::Debug for Dac0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Dac0").finish()
    }
}
#[doc = "12-bit DAC"]
pub mod dac0;
#[doc = "OPAMP"]
pub type Opamp0 = crate::Periph<opamp0::RegisterBlock, 0x400b_7000>;
impl core::fmt::Debug for Opamp0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Opamp0").finish()
    }
}
#[doc = "OPAMP"]
pub mod opamp0;
#[doc = "PORT"]
pub type Port0 = crate::Periph<port0::RegisterBlock, 0x400b_c000>;
impl core::fmt::Debug for Port0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Port0").finish()
    }
}
#[doc = "PORT"]
pub mod port0;
#[doc = "PORT"]
pub type Port1 = crate::Periph<port0::RegisterBlock, 0x400b_d000>;
impl core::fmt::Debug for Port1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Port1").finish()
    }
}
#[doc = "PORT"]
pub use self::port0 as port1;
#[doc = "PORT"]
pub type Port2 = crate::Periph<port0::RegisterBlock, 0x400b_e000>;
impl core::fmt::Debug for Port2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Port2").finish()
    }
}
#[doc = "PORT"]
pub use self::port0 as port2;
#[doc = "PORT"]
pub type Port3 = crate::Periph<port0::RegisterBlock, 0x400b_f000>;
impl core::fmt::Debug for Port3 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Port3").finish()
    }
}
#[doc = "PORT"]
pub use self::port0 as port3;
#[doc = "PORT"]
pub type Port4 = crate::Periph<port0::RegisterBlock, 0x400c_0000>;
impl core::fmt::Debug for Port4 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Port4").finish()
    }
}
#[doc = "PORT"]
pub use self::port0 as port4;
#[doc = "CAN"]
pub type Can0 = crate::Periph<can0::RegisterBlock, 0x400c_c000>;
impl core::fmt::Debug for Can0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Can0").finish()
    }
}
#[doc = "CAN"]
pub mod can0;
#[doc = "CAN"]
pub type Can1 = crate::Periph<can0::RegisterBlock, 0x400d_0000>;
impl core::fmt::Debug for Can1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Can1").finish()
    }
}
#[doc = "CAN"]
pub use self::can0 as can1;
#[doc = "TDET"]
pub type Tdet0 = crate::Periph<tdet0::RegisterBlock, 0x400e_9000>;
impl core::fmt::Debug for Tdet0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Tdet0").finish()
    }
}
#[doc = "TDET"]
pub mod tdet0;
#[doc = "no description available"]
pub type Pkc0 = crate::Periph<pkc0::RegisterBlock, 0x400e_a000>;
impl core::fmt::Debug for Pkc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Pkc0").finish()
    }
}
#[doc = "no description available"]
pub mod pkc0;
#[doc = "no description available"]
pub type Sgi0 = crate::Periph<sgi0::RegisterBlock, 0x400e_b000>;
impl core::fmt::Debug for Sgi0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Sgi0").finish()
    }
}
#[doc = "no description available"]
pub mod sgi0;
#[doc = "pd_main.trng0"]
pub type Trng0 = crate::Periph<trng0::RegisterBlock, 0x400e_c000>;
impl core::fmt::Debug for Trng0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Trng0").finish()
    }
}
#[doc = "pd_main.trng0"]
pub mod trng0;
#[doc = "no description available"]
pub type Udf0 = crate::Periph<udf0::RegisterBlock, 0x400e_d000>;
impl core::fmt::Debug for Udf0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Udf0").finish()
    }
}
#[doc = "no description available"]
pub mod udf0;
#[doc = "RTC"]
pub type Rtc0 = crate::Periph<rtc0::RegisterBlock, 0x400e_e000>;
impl core::fmt::Debug for Rtc0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Rtc0").finish()
    }
}
#[doc = "RTC"]
pub mod rtc0;
#[doc = "ADC"]
pub type Adc2 = crate::Periph<adc0::RegisterBlock, 0x400f_0000>;
impl core::fmt::Debug for Adc2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Adc2").finish()
    }
}
#[doc = "ADC"]
pub use self::adc0 as adc2;
#[doc = "ADC"]
pub type Adc3 = crate::Periph<adc0::RegisterBlock, 0x400f_1000>;
impl core::fmt::Debug for Adc3 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Adc3").finish()
    }
}
#[doc = "ADC"]
pub use self::adc0 as adc3;
#[doc = "CDOG"]
pub type Cdog0 = crate::Periph<cdog0::RegisterBlock, 0x4010_0000>;
impl core::fmt::Debug for Cdog0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Cdog0").finish()
    }
}
#[doc = "CDOG"]
pub mod cdog0;
#[doc = "CDOG"]
pub type Cdog1 = crate::Periph<cdog0::RegisterBlock, 0x4010_7000>;
impl core::fmt::Debug for Cdog1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Cdog1").finish()
    }
}
#[doc = "CDOG"]
pub use self::cdog0 as cdog1;
#[doc = "DBGMB"]
pub type Dbgmailbox = crate::Periph<dbgmailbox::RegisterBlock, 0x4010_1000>;
impl core::fmt::Debug for Dbgmailbox {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Dbgmailbox").finish()
    }
}
#[doc = "DBGMB"]
pub mod dbgmailbox;
#[doc = "GPIO"]
pub type Gpio0 = crate::Periph<gpio0::RegisterBlock, 0x4010_2000>;
impl core::fmt::Debug for Gpio0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Gpio0").finish()
    }
}
#[doc = "GPIO"]
pub mod gpio0;
#[doc = "GPIO"]
pub type Gpio1 = crate::Periph<gpio0::RegisterBlock, 0x4010_3000>;
impl core::fmt::Debug for Gpio1 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Gpio1").finish()
    }
}
#[doc = "GPIO"]
pub use self::gpio0 as gpio1;
#[doc = "GPIO"]
pub type Gpio2 = crate::Periph<gpio0::RegisterBlock, 0x4010_4000>;
impl core::fmt::Debug for Gpio2 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Gpio2").finish()
    }
}
#[doc = "GPIO"]
pub use self::gpio0 as gpio2;
#[doc = "GPIO"]
pub type Gpio3 = crate::Periph<gpio0::RegisterBlock, 0x4010_5000>;
impl core::fmt::Debug for Gpio3 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Gpio3").finish()
    }
}
#[doc = "GPIO"]
pub use self::gpio0 as gpio3;
#[doc = "GPIO"]
pub type Gpio4 = crate::Periph<gpio0::RegisterBlock, 0x4010_6000>;
impl core::fmt::Debug for Gpio4 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Gpio4").finish()
    }
}
#[doc = "GPIO"]
pub use self::gpio0 as gpio4;
#[doc = "MAUWRAP"]
pub type Mau0 = crate::Periph<mau0::RegisterBlock, 0x4010_8000>;
impl core::fmt::Debug for Mau0 {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Mau0").finish()
    }
}
#[doc = "MAUWRAP"]
pub mod mau0;
#[doc = "System Control not in System Control Block"]
pub type ScnScb = crate::Periph<scn_scb::RegisterBlock, 0xe000_e000>;
impl core::fmt::Debug for ScnScb {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("ScnScb").finish()
    }
}
#[doc = "System Control not in System Control Block"]
pub mod scn_scb;
#[doc = "Security Attribution Unit"]
pub type Sau = crate::Periph<sau::RegisterBlock, 0xe000_edd0>;
impl core::fmt::Debug for Sau {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("Sau").finish()
    }
}
#[doc = "Security Attribution Unit"]
pub mod sau;
#[no_mangle]
static mut DEVICE_PERIPHERALS: bool = false;
#[doc = r" All the peripherals."]
#[allow(non_snake_case)]
pub struct Peripherals {
    #[doc = "INPUTMUX0"]
    pub inputmux0: Inputmux0,
    #[doc = "I3C0"]
    pub i3c0: I3c0,
    #[doc = "CTIMER0"]
    pub ctimer0: Ctimer0,
    #[doc = "CTIMER1"]
    pub ctimer1: Ctimer1,
    #[doc = "CTIMER2"]
    pub ctimer2: Ctimer2,
    #[doc = "CTIMER3"]
    pub ctimer3: Ctimer3,
    #[doc = "CTIMER4"]
    pub ctimer4: Ctimer4,
    #[doc = "FREQME0"]
    pub freqme0: Freqme0,
    #[doc = "UTICK0"]
    pub utick0: Utick0,
    #[doc = "WWDT0"]
    pub wwdt0: Wwdt0,
    #[doc = "SMARTDMA0"]
    pub smartdma0: Smartdma0,
    #[doc = "DMA0"]
    pub dma0: Dma0,
    #[doc = "EDMA_0_TCD0"]
    pub edma_0_tcd0: Edma0Tcd0,
    #[doc = "AOI0"]
    pub aoi0: Aoi0,
    #[doc = "AOI1"]
    pub aoi1: Aoi1,
    #[doc = "CRC0"]
    pub crc0: Crc0,
    #[doc = "CMC"]
    pub cmc: Cmc,
    #[doc = "EIM0"]
    pub eim0: Eim0,
    #[doc = "ERM0"]
    pub erm0: Erm0,
    #[doc = "MBC0"]
    pub mbc0: Mbc0,
    #[doc = "SCG0"]
    pub scg0: Scg0,
    #[doc = "SPC0"]
    pub spc0: Spc0,
    #[doc = "MRCC0"]
    pub mrcc0: Mrcc0,
    #[doc = "SYSCON"]
    pub syscon: Syscon,
    #[doc = "GLIKEY0"]
    pub glikey0: Glikey0,
    #[doc = "WUU0"]
    pub wuu0: Wuu0,
    #[doc = "VBAT0"]
    pub vbat0: Vbat0,
    #[doc = "FMC0"]
    pub fmc0: Fmc0,
    #[doc = "FMU0"]
    pub fmu0: Fmu0,
    #[doc = "FLEXIO0"]
    pub flexio0: Flexio0,
    #[doc = "LPI2C0"]
    pub lpi2c0: Lpi2c0,
    #[doc = "LPI2C1"]
    pub lpi2c1: Lpi2c1,
    #[doc = "LPI2C2"]
    pub lpi2c2: Lpi2c2,
    #[doc = "LPI2C3"]
    pub lpi2c3: Lpi2c3,
    #[doc = "LPUART5"]
    pub lpuart5: Lpuart5,
    #[doc = "LPSPI0"]
    pub lpspi0: Lpspi0,
    #[doc = "LPSPI1"]
    pub lpspi1: Lpspi1,
    #[doc = "LPUART0"]
    pub lpuart0: Lpuart0,
    #[doc = "LPUART1"]
    pub lpuart1: Lpuart1,
    #[doc = "LPUART2"]
    pub lpuart2: Lpuart2,
    #[doc = "LPUART3"]
    pub lpuart3: Lpuart3,
    #[doc = "LPUART4"]
    pub lpuart4: Lpuart4,
    #[doc = "USB0"]
    pub usb0: Usb0,
    #[doc = "EQDC0"]
    pub eqdc0: Eqdc0,
    #[doc = "EQDC1"]
    pub eqdc1: Eqdc1,
    #[doc = "FLEXPWM0"]
    pub flexpwm0: Flexpwm0,
    #[doc = "FLEXPWM1"]
    pub flexpwm1: Flexpwm1,
    #[doc = "LPTMR0"]
    pub lptmr0: Lptmr0,
    #[doc = "OSTIMER0"]
    pub ostimer0: Ostimer0,
    #[doc = "WAKETIMER0"]
    pub waketimer0: Waketimer0,
    #[doc = "ADC0"]
    pub adc0: Adc0,
    #[doc = "ADC1"]
    pub adc1: Adc1,
    #[doc = "CMP0"]
    pub cmp0: Cmp0,
    #[doc = "CMP1"]
    pub cmp1: Cmp1,
    #[doc = "DAC0"]
    pub dac0: Dac0,
    #[doc = "OPAMP0"]
    pub opamp0: Opamp0,
    #[doc = "PORT0"]
    pub port0: Port0,
    #[doc = "PORT1"]
    pub port1: Port1,
    #[doc = "PORT2"]
    pub port2: Port2,
    #[doc = "PORT3"]
    pub port3: Port3,
    #[doc = "PORT4"]
    pub port4: Port4,
    #[doc = "CAN0"]
    pub can0: Can0,
    #[doc = "CAN1"]
    pub can1: Can1,
    #[doc = "TDET0"]
    pub tdet0: Tdet0,
    #[doc = "PKC0"]
    pub pkc0: Pkc0,
    #[doc = "SGI0"]
    pub sgi0: Sgi0,
    #[doc = "TRNG0"]
    pub trng0: Trng0,
    #[doc = "UDF0"]
    pub udf0: Udf0,
    #[doc = "RTC0"]
    pub rtc0: Rtc0,
    #[doc = "ADC2"]
    pub adc2: Adc2,
    #[doc = "ADC3"]
    pub adc3: Adc3,
    #[doc = "CDOG0"]
    pub cdog0: Cdog0,
    #[doc = "CDOG1"]
    pub cdog1: Cdog1,
    #[doc = "DBGMAILBOX"]
    pub dbgmailbox: Dbgmailbox,
    #[doc = "GPIO0"]
    pub gpio0: Gpio0,
    #[doc = "GPIO1"]
    pub gpio1: Gpio1,
    #[doc = "GPIO2"]
    pub gpio2: Gpio2,
    #[doc = "GPIO3"]
    pub gpio3: Gpio3,
    #[doc = "GPIO4"]
    pub gpio4: Gpio4,
    #[doc = "MAU0"]
    pub mau0: Mau0,
    #[doc = "SCnSCB"]
    pub scn_scb: ScnScb,
    #[doc = "SAU"]
    pub sau: Sau,
}
impl Peripherals {
    #[doc = r" Returns all the peripherals *once*."]
    #[cfg(feature = "critical-section")]
    #[inline]
    pub fn take() -> Option<Self> {
        critical_section::with(|_| {
            if unsafe { DEVICE_PERIPHERALS } {
                return None;
            }
            Some(unsafe { Peripherals::steal() })
        })
    }
    #[doc = r" Unchecked version of `Peripherals::take`."]
    #[doc = r""]
    #[doc = r" # Safety"]
    #[doc = r""]
    #[doc = r" Each of the returned peripherals must be used at most once."]
    #[inline]
    pub unsafe fn steal() -> Self {
        DEVICE_PERIPHERALS = true;
        Peripherals {
            inputmux0: Inputmux0::steal(),
            i3c0: I3c0::steal(),
            ctimer0: Ctimer0::steal(),
            ctimer1: Ctimer1::steal(),
            ctimer2: Ctimer2::steal(),
            ctimer3: Ctimer3::steal(),
            ctimer4: Ctimer4::steal(),
            freqme0: Freqme0::steal(),
            utick0: Utick0::steal(),
            wwdt0: Wwdt0::steal(),
            smartdma0: Smartdma0::steal(),
            dma0: Dma0::steal(),
            edma_0_tcd0: Edma0Tcd0::steal(),
            aoi0: Aoi0::steal(),
            aoi1: Aoi1::steal(),
            crc0: Crc0::steal(),
            cmc: Cmc::steal(),
            eim0: Eim0::steal(),
            erm0: Erm0::steal(),
            mbc0: Mbc0::steal(),
            scg0: Scg0::steal(),
            spc0: Spc0::steal(),
            mrcc0: Mrcc0::steal(),
            syscon: Syscon::steal(),
            glikey0: Glikey0::steal(),
            wuu0: Wuu0::steal(),
            vbat0: Vbat0::steal(),
            fmc0: Fmc0::steal(),
            fmu0: Fmu0::steal(),
            flexio0: Flexio0::steal(),
            lpi2c0: Lpi2c0::steal(),
            lpi2c1: Lpi2c1::steal(),
            lpi2c2: Lpi2c2::steal(),
            lpi2c3: Lpi2c3::steal(),
            lpuart5: Lpuart5::steal(),
            lpspi0: Lpspi0::steal(),
            lpspi1: Lpspi1::steal(),
            lpuart0: Lpuart0::steal(),
            lpuart1: Lpuart1::steal(),
            lpuart2: Lpuart2::steal(),
            lpuart3: Lpuart3::steal(),
            lpuart4: Lpuart4::steal(),
            usb0: Usb0::steal(),
            eqdc0: Eqdc0::steal(),
            eqdc1: Eqdc1::steal(),
            flexpwm0: Flexpwm0::steal(),
            flexpwm1: Flexpwm1::steal(),
            lptmr0: Lptmr0::steal(),
            ostimer0: Ostimer0::steal(),
            waketimer0: Waketimer0::steal(),
            adc0: Adc0::steal(),
            adc1: Adc1::steal(),
            cmp0: Cmp0::steal(),
            cmp1: Cmp1::steal(),
            dac0: Dac0::steal(),
            opamp0: Opamp0::steal(),
            port0: Port0::steal(),
            port1: Port1::steal(),
            port2: Port2::steal(),
            port3: Port3::steal(),
            port4: Port4::steal(),
            can0: Can0::steal(),
            can1: Can1::steal(),
            tdet0: Tdet0::steal(),
            pkc0: Pkc0::steal(),
            sgi0: Sgi0::steal(),
            trng0: Trng0::steal(),
            udf0: Udf0::steal(),
            rtc0: Rtc0::steal(),
            adc2: Adc2::steal(),
            adc3: Adc3::steal(),
            cdog0: Cdog0::steal(),
            cdog1: Cdog1::steal(),
            dbgmailbox: Dbgmailbox::steal(),
            gpio0: Gpio0::steal(),
            gpio1: Gpio1::steal(),
            gpio2: Gpio2::steal(),
            gpio3: Gpio3::steal(),
            gpio4: Gpio4::steal(),
            mau0: Mau0::steal(),
            scn_scb: ScnScb::steal(),
            sau: Sau::steal(),
        }
    }
}
