/*******************************************************************************
* Copyright 2019 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*     http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/

#include "gpu/intel/lrn/ref.hpp"

namespace dnnl {
namespace impl {
namespace gpu {
namespace intel {
namespace lrn {

status_t ref_fwd_t::execute_forward(const exec_ctx_t &ctx) const {

    auto &src = CTX_IN_STORAGE(DNNL_ARG_SRC);
    auto &dst = CTX_OUT_STORAGE(DNNL_ARG_DST);
    auto &ws = CTX_OUT_STORAGE(DNNL_ARG_WORKSPACE);

    compute::kernel_arg_list_t arg_list;
    arg_list.set(0, src);
    if (pd()->desc()->prop_kind == prop_kind::forward_training) {
        arg_list.set(1, ws);
        arg_list.set(2, dst);
    } else {
        arg_list.set(1, dst);
    }

    auto nd_range = pd()->dispatch.nd_range();

    status_t status = parallel_for(ctx, nd_range, kernel_, arg_list);
    return status;
}

status_t ref_bwd_t::execute_backward(const exec_ctx_t &ctx) const {
    auto &src = CTX_IN_STORAGE(DNNL_ARG_SRC);
    auto &diff_dst = CTX_IN_STORAGE(DNNL_ARG_DIFF_DST);
    auto &ws = CTX_IN_STORAGE(DNNL_ARG_WORKSPACE);
    auto &diff_src = CTX_OUT_STORAGE(DNNL_ARG_DIFF_SRC);

    compute::kernel_arg_list_t arg_list;
    arg_list.set(0, src);
    arg_list.set(1, diff_dst);
    arg_list.set(2, ws);
    arg_list.set(3, diff_src);

    auto nd_range = pd()->dispatch.nd_range();

    status_t status = parallel_for(ctx, nd_range, kernel_, arg_list);
    return status;
}

} // namespace lrn
} // namespace intel
} // namespace gpu
} // namespace impl
} // namespace dnnl
