name: STM32U0 Series
manufacturer:
  id: 0x20
  cc: 0x0
generated_from_pack: true
pack_file_release: 1.0.0
variants:
- name: STM32U031C6
  package_variants:
  - STM32U031C6Ux
  - STM32U031C6Tx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8008000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U031C8
  package_variants:
  - STM32U031C8Ux
  - STM32U031C8Tx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U031F4
  package_variants:
  - STM32U031F4Px
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8004000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U031F6
  package_variants:
  - STM32U031F6Px
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8008000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U031F8
  package_variants:
  - STM32U031F8Px
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U031G6YxT
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: Flash
    range:
      start: 0x8000000
      end: 0x8008000
    cores:
    - main
    access:
      boot: true
  - !Ram
    name: SRAM1
    range:
      start: 0x20000000
      end: 0x20002000
    cores:
    - main
  - !Generic
    name: SRAM2
    range:
      start: 0x20002000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U031G8YxT
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: Flash
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      boot: true
  - !Ram
    name: SRAM1
    range:
      start: 0x20000000
      end: 0x20002000
    cores:
    - main
  - !Generic
    name: SRAM2
    range:
      start: 0x20002000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U031K4
  package_variants:
  - STM32U031K4Ux
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8004000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U031K6
  package_variants:
  - STM32U031K6Ux
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8008000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U031K8
  package_variants:
  - STM32U031K8Px
  - STM32U031K8Ux
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U031R6
  package_variants:
  - STM32U031R6Ix
  - STM32U031R6Tx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8008000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U031R8
  package_variants:
  - STM32U031R8Ix
  - STM32U031R8Tx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U073C8
  package_variants:
  - STM32U073C8Tx
  - STM32U073C8Ux
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U073CB
  package_variants:
  - STM32U073CBTx
  - STM32U073CBUx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8020000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073CC
  package_variants:
  - STM32U073CCTx
  - STM32U073CCUx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073H8YxT
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: Flash
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      boot: true
  - !Ram
    name: SRAM1
    range:
      start: 0x20000000
      end: 0x20008000
    cores:
    - main
  - !Generic
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U073HBYxT
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: Flash
    range:
      start: 0x8000000
      end: 0x8020000
    cores:
    - main
    access:
      boot: true
  - !Ram
    name: SRAM1
    range:
      start: 0x20000000
      end: 0x20008000
    cores:
    - main
  - !Generic
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073HCYxT
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: Flash
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      boot: true
  - !Ram
    name: SRAM1
    range:
      start: 0x20000000
      end: 0x20008000
    cores:
    - main
  - !Generic
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073K8
  package_variants:
  - STM32U073K8Ux
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U073KB
  package_variants:
  - STM32U073KBUx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8020000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073KC
  package_variants:
  - STM32U073KCUx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073M8
  package_variants:
  - STM32U073M8Tx
  - STM32U073M8Ix
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U073MB
  package_variants:
  - STM32U073MBTx
  - STM32U073MBIx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8020000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073MC
  package_variants:
  - STM32U073MCTx
  - STM32U073MCIx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073R8
  package_variants:
  - STM32U073R8Tx
  - STM32U073R8Ix
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8010000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_64k
- name: STM32U073RB
  package_variants:
  - STM32U073RBTx
  - STM32U073RBIx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8020000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U073RC
  package_variants:
  - STM32U073RCTx
  - STM32U073RCIx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U083CC
  package_variants:
  - STM32U083CCUx
  - STM32U083CCTx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U083HCYxT
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: Flash
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      boot: true
  - !Ram
    name: SRAM1
    range:
      start: 0x20000000
      end: 0x20008000
    cores:
    - main
  - !Generic
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U083KC
  package_variants:
  - STM32U083KCUx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U083MC
  package_variants:
  - STM32U083MCIx
  - STM32U083MCTx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
- name: STM32U083RC
  package_variants:
  - STM32U083RCTx
  - STM32U083RCIx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: BANK_1
    range:
      start: 0x8000000
      end: 0x8040000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Nvm
    name: OTP
    range:
      start: 0x1fff6800
      end: 0x1fff6c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Ram
    name: SRAM
    range:
      start: 0x20000000
      end: 0x2000a000
    cores:
    - main
  flash_algorithms:
  - stm32u0xx_256k
flash_algorithms:
- name: stm32u0xx_256k
  description: STM32U0xx_256
  default: true
  instructions: ELUDRnK2jEiMTCBhIEYAagEkJAQgQAAoDdGJSIlMIGBAECBgBiBgYIdIoGDAEIdMYGB/ICBggUhAacAPwAcAKATQg0h9TKBggkigYAAgEL0BRnpIQGkBItIHEEN3SlBhACBwRwNGASBwR3K2AL9zSABpASEJBAhAACj40W9IQGkEIQhDbUlIYQhGQGkBIQkECENqSUhhAL9oSABpASEJBAhAACj40WVIAGljSQhAACgE0AhGYUkIYQEgcEdfSEBpBCGIQ11JSGEAIPbnAUZytllIWksYYRhGQGn/I9sAmENWS1hhASDABggaAgoYRkBpAiMTQxhDUUtYYRhGQGkBIxsEGENNS1hhAL9MSABpASMbBBhAACj40UhIAGlGSxhAACgE0BhGRUsYYQEgcEdDSEBpAiOYQ0FLWGEBIMAGAGhAHAAoBtEYRgBoASMbBBhDOksYYAAg6edwtYiwA0ZytsgdwQjJAAC/NEgAaQElLQQoQAAo+NE4SDBNKGEoRkBpASUoQy1NaGE/4AgpD9MQaBhgUGhYYAgzCDIIOQC/J0gAaQElLQQoQAAo+NEh4AAkBeAQeKUAbkZwUVIcZByMQvfTACQF4P8gZRitAG5GcFFkHAggQBqgQvXYAL8XSABpASUtBChAACj40QCYGGBYYAAhEkgAacAHwA8AKAXQDkgOTShhASAIsHC9ACm90QtIQGlACEAACU1oYQEgwAYAaEAcACgG0ChGAGgBJS0EqEMCTShgACDm5/rDAAAAIAJAqqoAAAAwAED/DwAAACwAQCMBZ0Wrie/N/wEAAAAAAAA=
  load_address: 0x20000020
  pc_init: 0x1
  pc_uninit: 0x51
  pc_program_page: 0x159
  pc_erase_sector: 0xcd
  pc_erase_all: 0x6b
  data_section_offset: 0x25c
  flash_properties:
    address_range:
      start: 0x8000000
      end: 0x8040000
    page_size: 0x400
    erased_byte_value: 0xff
    program_page_timeout: 400
    erase_sector_timeout: 400
    sectors:
    - size: 0x800
      address: 0x0
- name: stm32u0xx_64k
  description: STM32U0xx_64
  default: true
  instructions: gLWEsAOQApEBkgDwn/kVSRVICGAVSABowAMAKBLU/+cTSRRICGAUSAhgFEkGIAhgE0kUSAhgFEkUSAhgFEl/IAhg/+cTSABowA8AKAbQ/+cRSRJICGASSAhg/+cAIASwgL3ARhAgAkD6wwAAICACQAAwAECqqgAAVVUAAAQwAEAIMABA/w8AAAQsAED/AQAAACwAQBQgAkAIIAJAIwFnRauJ782BsACQBEkIaAEi0gcQQwhgACABsHBHwEYUIAJAg7ACkAGRaEYCcAEgA7BwR4C1grAA8Dr5/+cYSABowAMAKAHV/+f45xVJCGgEIhBDCGAIaAEiEgQQQwhg/+cPSABowAMAKAHV/+f45wtIAGgMSQhCBtD/5whJCkgIYAEgAZAH4AZJCGgEIpBDCGAAIAGQ/+cBmAKwgL3ARhAgAkAUIAJA+sMAAIC1hLACkADw/fgjSSNICGAjSQho/yLSAJBDCGACmB8i0gaAGAAKAZABmApoEEMCIhBDCGAIaAEiEgQQQwhg/+cVSABowAMAKAHV/+f45xJIAGgSSQhCBtD/5w9JD0gIYAEgA5AV4A5JCGgCIpBDCGABIMAGAGhAHAAoB9H/5wlJCGgBIhIEEEMIYP/nACADkP/nA5gEsIC9ECACQPrDAAAUIAJAACACQIC1jrAMkAuRCpIA8Kf4C5jAHQchiEMLkP/nS0gAaMADACgB1f/n+OdHSUhICGBISQhoASIQQwhg/+cLmAAoatD/5wuYCCga0//nCpgAaAyZCGAKmEBoDJlIYAyYCDAMkAqYCDAKkAuYCDgLkP/nNkgAaMADACgB1f/n+Oc+4AAgAZD/5wGYC5mIQg7S/+cKmAB4AZmKAAKpiFAKmEAcCpD/5wGYQBwBkOznACABkP/nAZgLmgghiRqIQgzS/+cBmAuZQBiCAAKp/yCIUP/nAZhAHAGQ7Of/5xtIAGjAAwAoAdX/5/jnApgMmQhggCECqEBYDJlIYAAgC5D/5xJIAGjABwAoBtD/5w9JE0gIYAEgDZAV4JHnDkoRaAEggUMRYMAGAGhAHAAoB9D/5wlJCGgBIhIEkEMIYP/nACANkP/nDZgOsIC9wEYQIAJA/wEAABQgAkAAIAJA+sMAAO/zEIDAB8APcrZwRwAAAAA=
  load_address: 0x20000020
  pc_init: 0x1
  pc_uninit: 0xa5
  pc_program_page: 0x1f1
  pc_erase_sector: 0x149
  pc_erase_all: 0xd1
  data_section_offset: 0x358
  flash_properties:
    address_range:
      start: 0x8000000
      end: 0x8010000
    page_size: 0x400
    erased_byte_value: 0xff
    program_page_timeout: 400
    erase_sector_timeout: 400
    sectors:
    - size: 0x800
      address: 0x0
