name: STM32WB0 Series
manufacturer:
  id: 0x20
  cc: 0x0
generated_from_pack: true
pack_file_release: 1.0.2
variants:
- name: STM32WB05KZ
  package_variants:
  - STM32WB05KZVx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x10070000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20003000
      end: 0x20006000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
- name: STM32WB05TZ
  package_variants:
  - STM32WB05TZFx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x10070000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20003000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20003000
      end: 0x20006000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
- name: STM32WB06CC
  package_variants:
  - STM32WB06CCFx
  - STM32WB06CCVx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x10080000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20004000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20004000
      end: 0x20008000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
- name: STM32WB06KC
  package_variants:
  - STM32WB06KCVx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x10080000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20004000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20004000
      end: 0x20008000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
- name: STM32WB07CC
  package_variants:
  - STM32WB07CCFx
  - STM32WB07CCVx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x10080000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20004000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20004000
      end: 0x20008000
    cores:
    - main
  - !Ram
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000c000
    cores:
    - main
  - !Ram
    name: SRAM3
    range:
      start: 0x2000c000
      end: 0x20010000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
- name: STM32WB07KC
  package_variants:
  - STM32WB07KCVx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x10080000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20004000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20004000
      end: 0x20008000
    cores:
    - main
  - !Ram
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000c000
    cores:
    - main
  - !Ram
    name: SRAM3
    range:
      start: 0x2000c000
      end: 0x20010000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
- name: STM32WB09KE
  package_variants:
  - STM32WB09KEVx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x100c0000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20004000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20004000
      end: 0x20008000
    cores:
    - main
  - !Ram
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000c000
    cores:
    - main
  - !Ram
    name: SRAM3
    range:
      start: 0x2000c000
      end: 0x20010000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
- name: STM32WB09TE
  package_variants:
  - STM32WB09TEFx
  cores:
  - name: main
    type: armv6m
    core_access_options: !Arm
      ap: !v1 0
  memory_map:
  - !Nvm
    name: OTP
    range:
      start: 0x10001800
      end: 0x10001c00
    cores:
    - main
    access:
      write: false
      execute: false
  - !Nvm
    name: BANK_1
    range:
      start: 0x10040000
      end: 0x100c0000
    cores:
    - main
    access:
      write: false
      boot: true
  - !Ram
    name: SRAM0
    range:
      start: 0x20000000
      end: 0x20004000
    cores:
    - main
  - !Ram
    name: SRAM1
    range:
      start: 0x20004000
      end: 0x20008000
    cores:
    - main
  - !Ram
    name: SRAM2
    range:
      start: 0x20008000
      end: 0x2000c000
    cores:
    - main
  - !Ram
    name: SRAM3
    range:
      start: 0x2000c000
      end: 0x20010000
    cores:
    - main
  flash_algorithms:
  - stm32wb0x_512k
flash_algorithms:
- name: stm32wb0x_512k
  description: STM32WB0x Flash
  default: true
  instructions: LkgAIcFgSR6BYAAgcEcAIHBHCLUAIEEeAJAoSIFgIiEBYIFoAJHJB/vQgGgAkAAHgA8A0AEgCL0ItQAhSh4AkR5JimAeSoAYgAiIYREgCGCIaACQwAf70IhoAJAAB4APANABIAi9+LUBI0AD2wfAGAAjwAsAkwsHA9ALBxsPyRoQMQApGNANSwAn/0NAMwtMzCanYKBhFWgdYFVoXWCVaJ1g1WjdYCZgEDKlaACV7Qf70AAdEDns0QAg+L0AEABAAAD87wAAAAA=
  load_address: 0x20000008
  pc_init: 0x1
  pc_uninit: 0xf
  pc_program_page: 0x67
  pc_erase_sector: 0x39
  pc_erase_all: 0x13
  data_section_offset: 0xc4
  flash_properties:
    address_range:
      start: 0x10040000
      end: 0x100c0000
    page_size: 0x400
    erased_byte_value: 0xff
    program_page_timeout: 400
    erase_sector_timeout: 400
    sectors:
    - size: 0x800
      address: 0x0
