//! GPIO and funcsel configuration for {{ ir.board.name }}.
//!
//! Generated by rlvgl-creator BSP generator.
//! Pin routing uses IO_BANK0 GPIO_CTRL FUNCSEL fields.

#![allow(unused)]

use super::pac;

/// Initialize all board-assigned GPIO pins via funcsel.
pub unsafe fn init_pins() {
{%- for route in pin_routes %}
{%- if route.route.kind == "Funcsel" %}
    // GPIO{{ route.gpio }}: {{ route.route.func_name }} (funcsel={{ route.route.sel }})
    //   direction={{ route.direction }}{% if route.label %}, label={{ route.label }}{% endif %}

{%- elif route.route.kind == "Sio" %}
    // GPIO{{ route.gpio }}: SIO (funcsel=5) — {{ route.signal }}
    //   direction={{ route.direction }}{% if route.label %}, label={{ route.label }}{% endif %}

{%- endif %}
{%- endfor %}

    // TODO: Write FUNCSEL values into IO_BANK0 GPIOx_CTRL registers.
    // TODO: Configure pad pull-up/pull-down in PADS_BANK0 GPIOx registers.
    // TODO: Set SIO output-enable for output pins.
}
