//! Peripheral initialization for {{ ir.board.name }}.
//!
//! Generated by rlvgl-creator BSP generator.
//! Peripherals are released from reset via the RESETS register before use.

#![allow(unused)]

use super::pac;

/// Release peripherals from reset and initialize them.
pub unsafe fn init_peripherals() {
{%- for name in peripherals_used %}
{%- set periph = ir.chip.peripherals[name] %}
    // {{ name }} ({{ periph.class }}): base={{ periph.base }}, resets_bit={{ periph.resets_bit }}
    // TODO: Clear bit {{ ir.chip.resets[periph.resets_bit] }} in RESETS.RESET,
    //       poll RESETS.RESET_DONE for completion, then configure peripheral.
{%- endfor %}
}
{%- for name in peripherals_used %}
{%- set periph = ir.chip.peripherals[name] %}

/// Initialize {{ name }} ({{ periph.class }}).
#[allow(dead_code)]
unsafe fn init_{{ name }}() {
{%- if periph.class == "uart" %}
    // TODO: Set baud rate divisor, enable TX/RX, configure FIFO.
{%- elif periph.class == "i2c" %}
    // TODO: Set SCL frequency, enable I2C master mode.
{%- elif periph.class == "spi" %}
    // TODO: Set clock divider, frame format, enable SPI.
{%- elif periph.class == "pio" %}
    // TODO: Load PIO program, configure state machines.
{%- else %}
    // TODO: Configure {{ periph.class }} peripheral.
{%- endif %}
}
{%- endfor %}
