# ! [ doc = "Peripheral access API for STM32F3X8 microcontrollers (generated using svd2rust v0.17.0)\n\nYou can find an overview of the API [here].\n\n[here]: https://docs.rs/svd2rust/0.17.0/svd2rust/#peripheral-api" ]
# ! [ deny ( const_err ) ]
# ! [ deny ( dead_code ) ]
# ! [ deny ( improper_ctypes ) ]
# ! [ deny ( legacy_directory_ownership ) ]
# ! [ deny ( missing_docs ) ]
# ! [ deny ( no_mangle_generic_items ) ]
# ! [ deny ( non_shorthand_field_patterns ) ]
# ! [ deny ( overflowing_literals ) ]
# ! [ deny ( path_statements ) ]
# ! [ deny ( patterns_in_fns_without_body ) ]
# ! [ deny ( plugin_as_library ) ]
# ! [ deny ( private_in_public ) ]
# ! [ deny ( safe_extern_statics ) ]
# ! [ deny ( unconditional_recursion ) ]
# ! [ deny ( unions_with_drop_fields ) ]
# ! [ deny ( unused_allocation ) ]
# ! [ deny ( unused_comparisons ) ]
# ! [ deny ( unused_parens ) ]
# ! [ deny ( while_true ) ]
# ! [ allow ( non_camel_case_types ) ]
# ! [ allow ( non_snake_case ) ]
# ! [ no_std ]
extern crate cortex_m ; # [ cfg ( feature = "rt" ) ]
extern crate cortex_m_rt ; extern crate bare_metal ; extern crate vcell ; use core :: ops :: Deref ; use core :: marker :: PhantomData ; # [ doc = r"Number available in the NVIC for configuring priority" ]
pub const NVIC_PRIO_BITS : u8 = 4 ; # [ cfg ( feature = "rt" ) ]
extern "C" { fn WWDG_IRQ ( ) ; fn PVD_IRQ ( ) ; fn TAMP_STAMP ( ) ; fn RTC_WKUP ( ) ; fn FLASH_IRQ ( ) ; fn RCC_IRQ ( ) ; fn EXTI0 ( ) ; fn EXTI1 ( ) ; fn EXTI2_TSC ( ) ; fn EXTI3 ( ) ; fn EXTI4 ( ) ; fn DMA1_CH1_IRQ ( ) ; fn DMA1_CH2_IRQ ( ) ; fn DMA1_CH3_IRQ ( ) ; fn DMA1_CH4_IRQ ( ) ; fn DMA1_CH5_IRQ ( ) ; fn DMA1_CH6_IRQ ( ) ; fn DMA1_CH7_IRQ ( ) ; fn ADC1_2 ( ) ; fn CAN_TX_IRQ ( ) ; fn CAN_RXD_IRQ ( ) ; fn CAN_RXI_IRQ ( ) ; fn CAN_SCE_IRQ ( ) ; fn EXTI9_5 ( ) ; fn TIM15_IRQ ( ) ; fn TIM16_IRQ ( ) ; fn TIM17_IRQ ( ) ; fn TIM18_DAC3_IRQ ( ) ; fn TIM2_IRQ ( ) ; fn TIM3_IRQ ( ) ; fn TIM4_IRQ ( ) ; fn I2C1_EV_IRQ ( ) ; fn I2C1_ER_IRQ ( ) ; fn I2C2_EV_IRQ ( ) ; fn I2C2_ER_IRQ ( ) ; fn SPI1_IRQ ( ) ; fn SPI2_IRQ ( ) ; fn USART1_IRQ ( ) ; fn USART2_IRQ ( ) ; fn USART3_IRQ ( ) ; fn EXTI15_10_IRQ ( ) ; fn RTC_ALARM_IT_IRQ ( ) ; fn TIM12_IRQ ( ) ; fn TIM13_IRQ ( ) ; fn TIM14_IRQ ( ) ; fn TIM8_CC ( ) ; fn ADC3 ( ) ; fn FMC ( ) ; fn TIM5_IRQ ( ) ; fn SPI3_IRQ ( ) ; fn UART4_EXTI34 ( ) ; fn UART5_EXTI35 ( ) ; fn TIM6_DAC1 ( ) ; fn TIM7_IRQ ( ) ; fn DMA2_CHANNEL1 ( ) ; fn DMA2_CHANNEL2 ( ) ; fn DMA2_CHANNEL3 ( ) ; fn DMA2_CHANNEL4 ( ) ; fn DMA2_CHANNEL5 ( ) ; fn ADC4 ( ) ; fn ADC_SD2_IRQ ( ) ; fn ADC_SD3_IRQ ( ) ; fn COMP1_2_3 ( ) ; fn COMP4_5_6 ( ) ; fn COMP7 ( ) ; fn I2C3_EV ( ) ; fn I2C3_ER ( ) ; fn USB_HP_IRQ ( ) ; fn USB_LP_IRQ ( ) ; fn USB_WAKEUP_IRQ ( ) ; fn TIM20_BRK ( ) ; fn TIM19_IRQ ( ) ; fn TIM20_TRG_COM ( ) ; fn TIM20_CC ( ) ; fn FPU ( ) ; } # [ doc ( hidden ) ]
pub union Vector { _handler : unsafe extern "C" fn ( ) , _reserved : u32 , } # [ cfg ( feature = "rt" ) ]
# [ doc ( hidden ) ]
# [ link_section = ".vector_table.interrupts" ]
# [ no_mangle ]
pub static __INTERRUPTS : [ Vector ; 82 ]
= [ Vector { _handler : WWDG_IRQ } , Vector { _handler : PVD_IRQ } , Vector { _handler : TAMP_STAMP } , Vector { _handler : RTC_WKUP } , Vector { _handler : FLASH_IRQ } , Vector { _handler : RCC_IRQ } , Vector { _handler : EXTI0 } , Vector { _handler : EXTI1 } , Vector { _handler : EXTI2_TSC } , Vector { _handler : EXTI3 } , Vector { _handler : EXTI4 } , Vector { _handler : DMA1_CH1_IRQ } , Vector { _handler : DMA1_CH2_IRQ } , Vector { _handler : DMA1_CH3_IRQ } , Vector { _handler : DMA1_CH4_IRQ } , Vector { _handler : DMA1_CH5_IRQ } , Vector { _handler : DMA1_CH6_IRQ } , Vector { _handler : DMA1_CH7_IRQ } , Vector { _handler : ADC1_2 } , Vector { _handler : CAN_TX_IRQ } , Vector { _handler : CAN_RXD_IRQ } , Vector { _handler : CAN_RXI_IRQ } , Vector { _handler : CAN_SCE_IRQ } , Vector { _handler : EXTI9_5 } , Vector { _handler : TIM15_IRQ } , Vector { _handler : TIM16_IRQ } , Vector { _handler : TIM17_IRQ } , Vector { _handler : TIM18_DAC3_IRQ } , Vector { _handler : TIM2_IRQ } , Vector { _handler : TIM3_IRQ } , Vector { _handler : TIM4_IRQ } , Vector { _handler : I2C1_EV_IRQ } , Vector { _handler : I2C1_ER_IRQ } , Vector { _handler : I2C2_EV_IRQ } , Vector { _handler : I2C2_ER_IRQ } , Vector { _handler : SPI1_IRQ } , Vector { _handler : SPI2_IRQ } , Vector { _handler : USART1_IRQ } , Vector { _handler : USART2_IRQ } , Vector { _handler : USART3_IRQ } , Vector { _handler : EXTI15_10_IRQ } , Vector { _handler : RTC_ALARM_IT_IRQ } , Vector { _reserved : 0 } , Vector { _handler : TIM12_IRQ } , Vector { _handler : TIM13_IRQ } , Vector { _handler : TIM14_IRQ } , Vector { _handler : TIM8_CC } , Vector { _handler : ADC3 } , Vector { _handler : FMC } , Vector { _reserved : 0 } , Vector { _handler : TIM5_IRQ } , Vector { _handler : SPI3_IRQ } , Vector { _handler : UART4_EXTI34 } , Vector { _handler : UART5_EXTI35 } , Vector { _handler : TIM6_DAC1 } , Vector { _handler : TIM7_IRQ } , Vector { _handler : DMA2_CHANNEL1 } , Vector { _handler : DMA2_CHANNEL2 } , Vector { _handler : DMA2_CHANNEL3 } , Vector { _handler : DMA2_CHANNEL4 } , Vector { _handler : DMA2_CHANNEL5 } , Vector { _handler : ADC4 } , Vector { _handler : ADC_SD2_IRQ } , Vector { _handler : ADC_SD3_IRQ } , Vector { _handler : COMP1_2_3 } , Vector { _handler : COMP4_5_6 } , Vector { _handler : COMP7 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _handler : I2C3_EV } , Vector { _handler : I2C3_ER } , Vector { _handler : USB_HP_IRQ } , Vector { _handler : USB_LP_IRQ } , Vector { _handler : USB_WAKEUP_IRQ } , Vector { _handler : TIM20_BRK } , Vector { _handler : TIM19_IRQ } , Vector { _handler : TIM20_TRG_COM } , Vector { _handler : TIM20_CC } , Vector { _handler : FPU } , ]
; # [ doc = r"Enumeration of all the interrupts" ]
# [ derive ( Copy , Clone , Debug ) ]
# [ repr ( u8 ) ]
pub enum Interrupt { # [ doc = "0 - Window Watchdog interrupt" ]
WWDG_IRQ = 0 , # [ doc = "1 - Power voltage detector through EXTI line detection interrupt" ]
PVD_IRQ = 1 , # [ doc = "2 - Tamper and TimeStamp interrupts" ]
TAMP_STAMP = 2 , # [ doc = "3 - RTC Wakeup interrupt through the EXTI line" ]
RTC_WKUP = 3 , # [ doc = "4 - Flash global interrupt" ]
FLASH_IRQ = 4 , # [ doc = "5 - RCC global interrupt" ]
RCC_IRQ = 5 , # [ doc = "6 - EXTI Line0 interrupt" ]
EXTI0 = 6 , # [ doc = "7 - EXTI Line3 interrupt" ]
EXTI1 = 7 , # [ doc = "8 - EXTI Line2 and Touch sensing interrupts" ]
EXTI2_TSC = 8 , # [ doc = "9 - EXTI Line3 interrupt" ]
EXTI3 = 9 , # [ doc = "10 - EXTI Line4 interrupt" ]
EXTI4 = 10 , # [ doc = "11 - DMA1 channel 1 interrupt" ]
DMA1_CH1_IRQ = 11 , # [ doc = "12 - DMA1 channel 2 interrupt" ]
DMA1_CH2_IRQ = 12 , # [ doc = "13 - DMA1 channel 3 interrupt" ]
DMA1_CH3_IRQ = 13 , # [ doc = "14 - DMA1 channel 4 interrupt" ]
DMA1_CH4_IRQ = 14 , # [ doc = "15 - DMA1 channel 5 interrupt" ]
DMA1_CH5_IRQ = 15 , # [ doc = "16 - DMA1 channel 6 interrupt" ]
DMA1_CH6_IRQ = 16 , # [ doc = "17 - DMA1 channel 7 interrupt" ]
DMA1_CH7_IRQ = 17 , # [ doc = "18 - ADC1 and ADC2 global interrupt" ]
ADC1_2 = 18 , # [ doc = "19 - USB high priority/CAN_TX interrupt" ]
CAN_TX_IRQ = 19 , # [ doc = "20 - USB low priority/CAN_RXD interrupt" ]
CAN_RXD_IRQ = 20 , # [ doc = "21 - CAN_RXI interrupt" ]
CAN_RXI_IRQ = 21 , # [ doc = "22 - CAN_SCE interrupt" ]
CAN_SCE_IRQ = 22 , # [ doc = "23 - EXTI Line5 to Line9 interrupts" ]
EXTI9_5 = 23 , # [ doc = "24 - Timer 15 global interrupt" ]
TIM15_IRQ = 24 , # [ doc = "25 - Timer 16 global interrupt" ]
TIM16_IRQ = 25 , # [ doc = "26 - Timer 17 global interrupt" ]
TIM17_IRQ = 26 , # [ doc = "27 - Timer 18 global interrupt/DAC3 underrun interrupt" ]
TIM18_DAC3_IRQ = 27 , # [ doc = "28 - Timer 2 global interrupt" ]
TIM2_IRQ = 28 , # [ doc = "29 - Timer 3 global interrupt" ]
TIM3_IRQ = 29 , # [ doc = "30 - Timer 4 global interrupt" ]
TIM4_IRQ = 30 , # [ doc = "31 - I2C1_EV global interrupt/EXTI Line\\[3:2\\]
interrupts" ]
I2C1_EV_IRQ = 31 , # [ doc = "32 - I2C1_ER" ]
I2C1_ER_IRQ = 32 , # [ doc = "33 - I2C2_EV global interrupt/EXTI Line\\[4:2\\]
interrupts" ]
I2C2_EV_IRQ = 33 , # [ doc = "34 - I2C2_ER" ]
I2C2_ER_IRQ = 34 , # [ doc = "35 - SPI1 global interrupt" ]
SPI1_IRQ = 35 , # [ doc = "36 - SPI2 global interrupt" ]
SPI2_IRQ = 36 , # [ doc = "37 - USART1 global interrupt/EXTI25 (USART1 wakeup event)" ]
USART1_IRQ = 37 , # [ doc = "38 - USART2 global interrupt/EXTI26 (USART1 wakeup event)" ]
USART2_IRQ = 38 , # [ doc = "39 - USART3 global interrupt/EXTI28 (USART1 wakeup event)" ]
USART3_IRQ = 39 , # [ doc = "40 - EXTI Line\\[15:10\\]
interrupts" ]
EXTI15_10_IRQ = 40 , # [ doc = "41 - RTC alarm interrupt" ]
RTC_ALARM_IT_IRQ = 41 , # [ doc = "43 - Timer 12 global interrupt" ]
TIM12_IRQ = 43 , # [ doc = "44 - Timer 13 global interrupt" ]
TIM13_IRQ = 44 , # [ doc = "45 - Timer 14 global interrupt" ]
TIM14_IRQ = 45 , # [ doc = "46 - TIM8 capture compare interrupt" ]
TIM8_CC = 46 , # [ doc = "47 - ADC3 global interrupt" ]
ADC3 = 47 , # [ doc = "48 - FSMC global interrupt" ]
FMC = 48 , # [ doc = "50 - Timer 5 global interrupt" ]
TIM5_IRQ = 50 , # [ doc = "51 - SPI3 global interrupt" ]
SPI3_IRQ = 51 , # [ doc = "52 - UART4 global and EXTI Line 34 interrupts" ]
UART4_EXTI34 = 52 , # [ doc = "53 - UART5 global and EXTI Line 35 interrupts" ]
UART5_EXTI35 = 53 , # [ doc = "54 - TIM6 global, DAC1 Cahnnel1 and Cahnnel2 underrun error Interrupts" ]
TIM6_DAC1 = 54 , # [ doc = "55 - Timer 7 global interrupt" ]
TIM7_IRQ = 55 , # [ doc = "56 - DMA2 channel1 global interrupt" ]
DMA2_CHANNEL1 = 56 , # [ doc = "57 - DMA2 channel2 global interrupt" ]
DMA2_CHANNEL2 = 57 , # [ doc = "58 - DMA2 channel3 global interrupt" ]
DMA2_CHANNEL3 = 58 , # [ doc = "59 - DMA2 channel4 global interrupt" ]
DMA2_CHANNEL4 = 59 , # [ doc = "60 - DMA2 channel5 global interrupt" ]
DMA2_CHANNEL5 = 60 , # [ doc = "61 - ADC4 global interrupt" ]
ADC4 = 61 , # [ doc = "62 - ADC sigma delta 2 (SDADC2) global interrupt" ]
ADC_SD2_IRQ = 62 , # [ doc = "63 - ADC sigma delta 3 (SDADC3) global interrupt" ]
ADC_SD3_IRQ = 63 , # [ doc = "64 - COMP1_2_3 interrupt combined with EXTI lines 21, 22, 29" ]
COMP1_2_3 = 64 , # [ doc = "65 - COMP4_5_6 interrupt combined with EXTI lines 30, 31, 32" ]
COMP4_5_6 = 65 , # [ doc = "66 - COMP7 interrupt combined with EXTI line 33" ]
COMP7 = 66 , # [ doc = "72 - I2C3 Event interrupt" ]
I2C3_EV = 72 , # [ doc = "73 - I2C3 Error interrupt" ]
I2C3_ER = 73 , # [ doc = "74 - USB high priority interrupt" ]
USB_HP_IRQ = 74 , # [ doc = "75 - USB low priority interrupt" ]
USB_LP_IRQ = 75 , # [ doc = "76 - USB wakeup interrupt" ]
USB_WAKEUP_IRQ = 76 , # [ doc = "77 - TIM20 Break interrupt" ]
TIM20_BRK = 77 , # [ doc = "78 - Timer 19 global interrupt" ]
TIM19_IRQ = 78 , # [ doc = "79 - TIM20 Trigger and Commutation interrupt" ]
TIM20_TRG_COM = 79 , # [ doc = "80 - TIM20 Capture Compare interrupt" ]
TIM20_CC = 80 , # [ doc = "81 - Floating point unit interrupt" ]
FPU = 81 , } unsafe impl bare_metal :: Nr for Interrupt { # [ inline ( always ) ]
fn nr ( & self ) -> u8 { * self as u8 } } pub use cortex_m :: peripheral :: Peripherals as CorePeripherals ; # [ cfg ( feature = "rt" ) ]
pub use cortex_m_rt :: interrupt ; # [ cfg ( feature = "rt" ) ]
pub use self :: Interrupt as interrupt ; pub use cortex_m :: peripheral :: { CBP , CPUID , DCB , DWT , FPB , ITM , MPU , NVIC , SCB , SYST , TPIU , } ; # [ doc = "General-purpose I/Os" ]
pub struct GPIOA { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOA { } impl GPIOA { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpioa :: RegisterBlock { 0x4800_0000 as * const _ } } impl Deref for GPIOA { type Target = gpioa :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOA :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub mod gpioa { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - GPIO port mode register" ]
pub moder : MODER , # [ doc = "0x04 - GPIO port output type register" ]
pub otyper : OTYPER , # [ doc = "0x08 - GPIO port output speed register" ]
pub ospeedr : OSPEEDR , # [ doc = "0x0c - GPIO port pull-up/pull-down register" ]
pub pupdr : PUPDR , # [ doc = "0x10 - GPIO port input data register" ]
pub idr : IDR , # [ doc = "0x14 - GPIO port output data register" ]
pub odr : ODR , # [ doc = "0x18 - GPIO port bit set/reset register" ]
pub bsrr : BSRR , # [ doc = "0x1c - GPIO port configuration lock register" ]
pub lckr : LCKR , # [ doc = "0x20 - GPIO alternate function low register" ]
pub afrl : AFRL , # [ doc = "0x24 - GPIO alternate function high register" ]
pub afrh : AFRH , # [ doc = "0x28 - Port bit reset register" ]
pub brr : BRR , } # [ doc = "GPIO port mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [moder](moder) module" ]
pub type MODER = crate :: Reg < u32 , _MODER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _MODER ; # [ doc = "`read()` method returns [moder::R](moder::R) reader structure" ]
impl crate :: Readable for MODER { } # [ doc = "`write(|w| ..)` method takes [moder::W](moder::W) writer structure" ]
impl crate :: Writable for MODER { } # [ doc = "GPIO port mode register" ]
pub mod moder { # [ doc = "Reader of register MODER" ]
pub type R = crate :: R < u32 , super :: MODER > ; # [ doc = "Writer for register MODER" ]
pub type W = crate :: W < u32 , super :: MODER > ; # [ doc = "Register MODER `reset()`'s with value 0xa800_0000" ]
impl crate :: ResetValue for super :: MODER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xa800_0000 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 2" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MODER15_A { # [ doc = "0: Input mode (reset state)" ]
INPUT = 0 , # [ doc = "1: General purpose output mode" ]
OUTPUT = 1 , # [ doc = "2: Alternate function mode" ]
ALTERNATE = 2 , # [ doc = "3: Analog mode" ]
ANALOG = 3 } impl From < MODER15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MODER15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MODER15`" ]
pub type MODER15_R = crate :: R < u8 , MODER15_A > ; impl MODER15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MODER15_A { match self . bits { 0 => MODER15_A :: INPUT , 1 => MODER15_A :: OUTPUT , 2 => MODER15_A :: ALTERNATE , 3 => MODER15_A :: ANALOG , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `INPUT`" ]
# [ inline ( always ) ]
pub fn is_input ( & self ) -> bool { * self == MODER15_A :: INPUT } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == MODER15_A :: OUTPUT } # [ doc = "Checks if the value of the field is `ALTERNATE`" ]
# [ inline ( always ) ]
pub fn is_alternate ( & self ) -> bool { * self == MODER15_A :: ALTERNATE } # [ doc = "Checks if the value of the field is `ANALOG`" ]
# [ inline ( always ) ]
pub fn is_analog ( & self ) -> bool { * self == MODER15_A :: ANALOG } } # [ doc = "Write proxy for field `MODER15`" ]
pub struct MODER15_W < 'a > { w : & 'a mut W , } impl < 'a > MODER15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER14_A = MODER15_A ; # [ doc = "Reader of field `MODER14`" ]
pub type MODER14_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER14`" ]
pub struct MODER14_W < 'a > { w : & 'a mut W , } impl < 'a > MODER14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER13_A = MODER15_A ; # [ doc = "Reader of field `MODER13`" ]
pub type MODER13_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER13`" ]
pub struct MODER13_W < 'a > { w : & 'a mut W , } impl < 'a > MODER13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER12_A = MODER15_A ; # [ doc = "Reader of field `MODER12`" ]
pub type MODER12_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER12`" ]
pub struct MODER12_W < 'a > { w : & 'a mut W , } impl < 'a > MODER12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER11_A = MODER15_A ; # [ doc = "Reader of field `MODER11`" ]
pub type MODER11_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER11`" ]
pub struct MODER11_W < 'a > { w : & 'a mut W , } impl < 'a > MODER11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER10_A = MODER15_A ; # [ doc = "Reader of field `MODER10`" ]
pub type MODER10_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER10`" ]
pub struct MODER10_W < 'a > { w : & 'a mut W , } impl < 'a > MODER10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER9_A = MODER15_A ; # [ doc = "Reader of field `MODER9`" ]
pub type MODER9_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER9`" ]
pub struct MODER9_W < 'a > { w : & 'a mut W , } impl < 'a > MODER9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER8_A = MODER15_A ; # [ doc = "Reader of field `MODER8`" ]
pub type MODER8_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER8`" ]
pub struct MODER8_W < 'a > { w : & 'a mut W , } impl < 'a > MODER8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER7_A = MODER15_A ; # [ doc = "Reader of field `MODER7`" ]
pub type MODER7_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER7`" ]
pub struct MODER7_W < 'a > { w : & 'a mut W , } impl < 'a > MODER7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER6_A = MODER15_A ; # [ doc = "Reader of field `MODER6`" ]
pub type MODER6_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER6`" ]
pub struct MODER6_W < 'a > { w : & 'a mut W , } impl < 'a > MODER6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER5_A = MODER15_A ; # [ doc = "Reader of field `MODER5`" ]
pub type MODER5_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER5`" ]
pub struct MODER5_W < 'a > { w : & 'a mut W , } impl < 'a > MODER5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER4_A = MODER15_A ; # [ doc = "Reader of field `MODER4`" ]
pub type MODER4_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER4`" ]
pub struct MODER4_W < 'a > { w : & 'a mut W , } impl < 'a > MODER4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER3_A = MODER15_A ; # [ doc = "Reader of field `MODER3`" ]
pub type MODER3_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER3`" ]
pub struct MODER3_W < 'a > { w : & 'a mut W , } impl < 'a > MODER3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER2_A = MODER15_A ; # [ doc = "Reader of field `MODER2`" ]
pub type MODER2_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER2`" ]
pub struct MODER2_W < 'a > { w : & 'a mut W , } impl < 'a > MODER2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER1_A = MODER15_A ; # [ doc = "Reader of field `MODER1`" ]
pub type MODER1_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER1`" ]
pub struct MODER1_W < 'a > { w : & 'a mut W , } impl < 'a > MODER1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER0_A = MODER15_A ; # [ doc = "Reader of field `MODER0`" ]
pub type MODER0_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER0`" ]
pub struct MODER0_W < 'a > { w : & 'a mut W , } impl < 'a > MODER0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder15 ( & self ) -> MODER15_R { MODER15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder14 ( & self ) -> MODER14_R { MODER14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder13 ( & self ) -> MODER13_R { MODER13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder12 ( & self ) -> MODER12_R { MODER12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder11 ( & self ) -> MODER11_R { MODER11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder10 ( & self ) -> MODER10_R { MODER10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder9 ( & self ) -> MODER9_R { MODER9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder8 ( & self ) -> MODER8_R { MODER8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder7 ( & self ) -> MODER7_R { MODER7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder6 ( & self ) -> MODER6_R { MODER6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder5 ( & self ) -> MODER5_R { MODER5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder4 ( & self ) -> MODER4_R { MODER4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder3 ( & self ) -> MODER3_R { MODER3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder2 ( & self ) -> MODER2_R { MODER2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder1 ( & self ) -> MODER1_R { MODER1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder0 ( & self ) -> MODER0_R { MODER0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder15 ( & mut self ) -> MODER15_W { MODER15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder14 ( & mut self ) -> MODER14_W { MODER14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder13 ( & mut self ) -> MODER13_W { MODER13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder12 ( & mut self ) -> MODER12_W { MODER12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder11 ( & mut self ) -> MODER11_W { MODER11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder10 ( & mut self ) -> MODER10_W { MODER10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder9 ( & mut self ) -> MODER9_W { MODER9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder8 ( & mut self ) -> MODER8_W { MODER8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder7 ( & mut self ) -> MODER7_W { MODER7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder6 ( & mut self ) -> MODER6_W { MODER6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder5 ( & mut self ) -> MODER5_W { MODER5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder4 ( & mut self ) -> MODER4_W { MODER4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder3 ( & mut self ) -> MODER3_W { MODER3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder2 ( & mut self ) -> MODER2_W { MODER2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder1 ( & mut self ) -> MODER1_W { MODER1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder0 ( & mut self ) -> MODER0_W { MODER0_W { w : self } } } } # [ doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [otyper](otyper) module" ]
pub type OTYPER = crate :: Reg < u32 , _OTYPER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OTYPER ; # [ doc = "`read()` method returns [otyper::R](otyper::R) reader structure" ]
impl crate :: Readable for OTYPER { } # [ doc = "`write(|w| ..)` method takes [otyper::W](otyper::W) writer structure" ]
impl crate :: Writable for OTYPER { } # [ doc = "GPIO port output type register" ]
pub mod otyper { # [ doc = "Reader of register OTYPER" ]
pub type R = crate :: R < u32 , super :: OTYPER > ; # [ doc = "Writer for register OTYPER" ]
pub type W = crate :: W < u32 , super :: OTYPER > ; # [ doc = "Register OTYPER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OTYPER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OT15_A { # [ doc = "0: Output push-pull (reset state)" ]
PUSHPULL = 0 , # [ doc = "1: Output open-drain" ]
OPENDRAIN = 1 } impl From < OT15_A > for bool { # [ inline ( always ) ]
fn from ( variant : OT15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OT15`" ]
pub type OT15_R = crate :: R < bool , OT15_A > ; impl OT15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OT15_A { match self . bits { false => OT15_A :: PUSHPULL , true => OT15_A :: OPENDRAIN } } # [ doc = "Checks if the value of the field is `PUSHPULL`" ]
# [ inline ( always ) ]
pub fn is_push_pull ( & self ) -> bool { * self == OT15_A :: PUSHPULL } # [ doc = "Checks if the value of the field is `OPENDRAIN`" ]
# [ inline ( always ) ]
pub fn is_open_drain ( & self ) -> bool { * self == OT15_A :: OPENDRAIN } } # [ doc = "Write proxy for field `OT15`" ]
pub struct OT15_W < 'a > { w : & 'a mut W , } impl < 'a > OT15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT14_A = OT15_A ; # [ doc = "Reader of field `OT14`" ]
pub type OT14_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT14`" ]
pub struct OT14_W < 'a > { w : & 'a mut W , } impl < 'a > OT14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT13_A = OT15_A ; # [ doc = "Reader of field `OT13`" ]
pub type OT13_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT13`" ]
pub struct OT13_W < 'a > { w : & 'a mut W , } impl < 'a > OT13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT12_A = OT15_A ; # [ doc = "Reader of field `OT12`" ]
pub type OT12_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT12`" ]
pub struct OT12_W < 'a > { w : & 'a mut W , } impl < 'a > OT12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT11_A = OT15_A ; # [ doc = "Reader of field `OT11`" ]
pub type OT11_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT11`" ]
pub struct OT11_W < 'a > { w : & 'a mut W , } impl < 'a > OT11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT10_A = OT15_A ; # [ doc = "Reader of field `OT10`" ]
pub type OT10_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT10`" ]
pub struct OT10_W < 'a > { w : & 'a mut W , } impl < 'a > OT10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT9_A = OT15_A ; # [ doc = "Reader of field `OT9`" ]
pub type OT9_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT9`" ]
pub struct OT9_W < 'a > { w : & 'a mut W , } impl < 'a > OT9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT8_A = OT15_A ; # [ doc = "Reader of field `OT8`" ]
pub type OT8_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT8`" ]
pub struct OT8_W < 'a > { w : & 'a mut W , } impl < 'a > OT8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT7_A = OT15_A ; # [ doc = "Reader of field `OT7`" ]
pub type OT7_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT7`" ]
pub struct OT7_W < 'a > { w : & 'a mut W , } impl < 'a > OT7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT6_A = OT15_A ; # [ doc = "Reader of field `OT6`" ]
pub type OT6_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT6`" ]
pub struct OT6_W < 'a > { w : & 'a mut W , } impl < 'a > OT6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT5_A = OT15_A ; # [ doc = "Reader of field `OT5`" ]
pub type OT5_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT5`" ]
pub struct OT5_W < 'a > { w : & 'a mut W , } impl < 'a > OT5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT4_A = OT15_A ; # [ doc = "Reader of field `OT4`" ]
pub type OT4_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT4`" ]
pub struct OT4_W < 'a > { w : & 'a mut W , } impl < 'a > OT4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT3_A = OT15_A ; # [ doc = "Reader of field `OT3`" ]
pub type OT3_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT3`" ]
pub struct OT3_W < 'a > { w : & 'a mut W , } impl < 'a > OT3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT2_A = OT15_A ; # [ doc = "Reader of field `OT2`" ]
pub type OT2_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT2`" ]
pub struct OT2_W < 'a > { w : & 'a mut W , } impl < 'a > OT2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT1_A = OT15_A ; # [ doc = "Reader of field `OT1`" ]
pub type OT1_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT1`" ]
pub struct OT1_W < 'a > { w : & 'a mut W , } impl < 'a > OT1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT0_A = OT15_A ; # [ doc = "Reader of field `OT0`" ]
pub type OT0_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT0`" ]
pub struct OT0_W < 'a > { w : & 'a mut W , } impl < 'a > OT0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot15 ( & self ) -> OT15_R { OT15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot14 ( & self ) -> OT14_R { OT14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot13 ( & self ) -> OT13_R { OT13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot12 ( & self ) -> OT12_R { OT12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot11 ( & self ) -> OT11_R { OT11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot10 ( & self ) -> OT10_R { OT10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot9 ( & self ) -> OT9_R { OT9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot8 ( & self ) -> OT8_R { OT8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot7 ( & self ) -> OT7_R { OT7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot6 ( & self ) -> OT6_R { OT6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot5 ( & self ) -> OT5_R { OT5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot4 ( & self ) -> OT4_R { OT4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot3 ( & self ) -> OT3_R { OT3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot2 ( & self ) -> OT2_R { OT2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot1 ( & self ) -> OT1_R { OT1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot0 ( & self ) -> OT0_R { OT0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot15 ( & mut self ) -> OT15_W { OT15_W { w : self } } # [ doc = "Bit 14 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot14 ( & mut self ) -> OT14_W { OT14_W { w : self } } # [ doc = "Bit 13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot13 ( & mut self ) -> OT13_W { OT13_W { w : self } } # [ doc = "Bit 12 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot12 ( & mut self ) -> OT12_W { OT12_W { w : self } } # [ doc = "Bit 11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot11 ( & mut self ) -> OT11_W { OT11_W { w : self } } # [ doc = "Bit 10 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot10 ( & mut self ) -> OT10_W { OT10_W { w : self } } # [ doc = "Bit 9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot9 ( & mut self ) -> OT9_W { OT9_W { w : self } } # [ doc = "Bit 8 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot8 ( & mut self ) -> OT8_W { OT8_W { w : self } } # [ doc = "Bit 7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot7 ( & mut self ) -> OT7_W { OT7_W { w : self } } # [ doc = "Bit 6 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot6 ( & mut self ) -> OT6_W { OT6_W { w : self } } # [ doc = "Bit 5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot5 ( & mut self ) -> OT5_W { OT5_W { w : self } } # [ doc = "Bit 4 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot4 ( & mut self ) -> OT4_W { OT4_W { w : self } } # [ doc = "Bit 3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot3 ( & mut self ) -> OT3_W { OT3_W { w : self } } # [ doc = "Bit 2 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot2 ( & mut self ) -> OT2_W { OT2_W { w : self } } # [ doc = "Bit 1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot1 ( & mut self ) -> OT1_W { OT1_W { w : self } } # [ doc = "Bit 0 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot0 ( & mut self ) -> OT0_W { OT0_W { w : self } } } } # [ doc = "GPIO port output speed register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospeedr](ospeedr) module" ]
pub type OSPEEDR = crate :: Reg < u32 , _OSPEEDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OSPEEDR ; # [ doc = "`read()` method returns [ospeedr::R](ospeedr::R) reader structure" ]
impl crate :: Readable for OSPEEDR { } # [ doc = "`write(|w| ..)` method takes [ospeedr::W](ospeedr::W) writer structure" ]
impl crate :: Writable for OSPEEDR { } # [ doc = "GPIO port output speed register" ]
pub mod ospeedr { # [ doc = "Reader of register OSPEEDR" ]
pub type R = crate :: R < u32 , super :: OSPEEDR > ; # [ doc = "Writer for register OSPEEDR" ]
pub type W = crate :: W < u32 , super :: OSPEEDR > ; # [ doc = "Register OSPEEDR `reset()`'s with value 0x0c00_0000" ]
impl crate :: ResetValue for super :: OSPEEDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0c00_0000 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OSPEEDR15_A { # [ doc = "0: Low speed" ]
LOWSPEED = 0 , # [ doc = "1: Medium speed" ]
MEDIUMSPEED = 1 , # [ doc = "2: High speed" ]
HIGHSPEED = 2 , # [ doc = "3: Very high speed" ]
VERYHIGHSPEED = 3 } impl From < OSPEEDR15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OSPEEDR15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OSPEEDR15`" ]
pub type OSPEEDR15_R = crate :: R < u8 , OSPEEDR15_A > ; impl OSPEEDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OSPEEDR15_A { match self . bits { 0 => OSPEEDR15_A :: LOWSPEED , 1 => OSPEEDR15_A :: MEDIUMSPEED , 2 => OSPEEDR15_A :: HIGHSPEED , 3 => OSPEEDR15_A :: VERYHIGHSPEED , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `LOWSPEED`" ]
# [ inline ( always ) ]
pub fn is_low_speed ( & self ) -> bool { * self == OSPEEDR15_A :: LOWSPEED } # [ doc = "Checks if the value of the field is `MEDIUMSPEED`" ]
# [ inline ( always ) ]
pub fn is_medium_speed ( & self ) -> bool { * self == OSPEEDR15_A :: MEDIUMSPEED } # [ doc = "Checks if the value of the field is `HIGHSPEED`" ]
# [ inline ( always ) ]
pub fn is_high_speed ( & self ) -> bool { * self == OSPEEDR15_A :: HIGHSPEED } # [ doc = "Checks if the value of the field is `VERYHIGHSPEED`" ]
# [ inline ( always ) ]
pub fn is_very_high_speed ( & self ) -> bool { * self == OSPEEDR15_A :: VERYHIGHSPEED } } # [ doc = "Write proxy for field `OSPEEDR15`" ]
pub struct OSPEEDR15_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR14_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR14`" ]
pub type OSPEEDR14_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR14`" ]
pub struct OSPEEDR14_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR13_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR13`" ]
pub type OSPEEDR13_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR13`" ]
pub struct OSPEEDR13_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR12_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR12`" ]
pub type OSPEEDR12_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR12`" ]
pub struct OSPEEDR12_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR11_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR11`" ]
pub type OSPEEDR11_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR11`" ]
pub struct OSPEEDR11_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR10_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR10`" ]
pub type OSPEEDR10_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR10`" ]
pub struct OSPEEDR10_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR9_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR9`" ]
pub type OSPEEDR9_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR9`" ]
pub struct OSPEEDR9_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR8_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR8`" ]
pub type OSPEEDR8_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR8`" ]
pub struct OSPEEDR8_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR7_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR7`" ]
pub type OSPEEDR7_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR7`" ]
pub struct OSPEEDR7_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR6_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR6`" ]
pub type OSPEEDR6_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR6`" ]
pub struct OSPEEDR6_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR5_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR5`" ]
pub type OSPEEDR5_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR5`" ]
pub struct OSPEEDR5_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR4_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR4`" ]
pub type OSPEEDR4_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR4`" ]
pub struct OSPEEDR4_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR3_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR3`" ]
pub type OSPEEDR3_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR3`" ]
pub struct OSPEEDR3_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR2_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR2`" ]
pub type OSPEEDR2_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR2`" ]
pub struct OSPEEDR2_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR1_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR1`" ]
pub type OSPEEDR1_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR1`" ]
pub struct OSPEEDR1_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR0_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR0`" ]
pub type OSPEEDR0_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR0`" ]
pub struct OSPEEDR0_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr15 ( & self ) -> OSPEEDR15_R { OSPEEDR15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr14 ( & self ) -> OSPEEDR14_R { OSPEEDR14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr13 ( & self ) -> OSPEEDR13_R { OSPEEDR13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr12 ( & self ) -> OSPEEDR12_R { OSPEEDR12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr11 ( & self ) -> OSPEEDR11_R { OSPEEDR11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr10 ( & self ) -> OSPEEDR10_R { OSPEEDR10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr9 ( & self ) -> OSPEEDR9_R { OSPEEDR9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr8 ( & self ) -> OSPEEDR8_R { OSPEEDR8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr7 ( & self ) -> OSPEEDR7_R { OSPEEDR7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr6 ( & self ) -> OSPEEDR6_R { OSPEEDR6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr5 ( & self ) -> OSPEEDR5_R { OSPEEDR5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr4 ( & self ) -> OSPEEDR4_R { OSPEEDR4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr3 ( & self ) -> OSPEEDR3_R { OSPEEDR3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr2 ( & self ) -> OSPEEDR2_R { OSPEEDR2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr1 ( & self ) -> OSPEEDR1_R { OSPEEDR1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr0 ( & self ) -> OSPEEDR0_R { OSPEEDR0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr15 ( & mut self ) -> OSPEEDR15_W { OSPEEDR15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr14 ( & mut self ) -> OSPEEDR14_W { OSPEEDR14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr13 ( & mut self ) -> OSPEEDR13_W { OSPEEDR13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr12 ( & mut self ) -> OSPEEDR12_W { OSPEEDR12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr11 ( & mut self ) -> OSPEEDR11_W { OSPEEDR11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr10 ( & mut self ) -> OSPEEDR10_W { OSPEEDR10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr9 ( & mut self ) -> OSPEEDR9_W { OSPEEDR9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr8 ( & mut self ) -> OSPEEDR8_W { OSPEEDR8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr7 ( & mut self ) -> OSPEEDR7_W { OSPEEDR7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr6 ( & mut self ) -> OSPEEDR6_W { OSPEEDR6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr5 ( & mut self ) -> OSPEEDR5_W { OSPEEDR5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr4 ( & mut self ) -> OSPEEDR4_W { OSPEEDR4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr3 ( & mut self ) -> OSPEEDR3_W { OSPEEDR3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr2 ( & mut self ) -> OSPEEDR2_W { OSPEEDR2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr1 ( & mut self ) -> OSPEEDR1_W { OSPEEDR1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr0 ( & mut self ) -> OSPEEDR0_W { OSPEEDR0_W { w : self } } } } # [ doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pupdr](pupdr) module" ]
pub type PUPDR = crate :: Reg < u32 , _PUPDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PUPDR ; # [ doc = "`read()` method returns [pupdr::R](pupdr::R) reader structure" ]
impl crate :: Readable for PUPDR { } # [ doc = "`write(|w| ..)` method takes [pupdr::W](pupdr::W) writer structure" ]
impl crate :: Writable for PUPDR { } # [ doc = "GPIO port pull-up/pull-down register" ]
pub mod pupdr { # [ doc = "Reader of register PUPDR" ]
pub type R = crate :: R < u32 , super :: PUPDR > ; # [ doc = "Writer for register PUPDR" ]
pub type W = crate :: W < u32 , super :: PUPDR > ; # [ doc = "Register PUPDR `reset()`'s with value 0x6400_0000" ]
impl crate :: ResetValue for super :: PUPDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x6400_0000 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PUPDR15_A { # [ doc = "0: No pull-up, pull-down" ]
FLOATING = 0 , # [ doc = "1: Pull-up" ]
PULLUP = 1 , # [ doc = "2: Pull-down" ]
PULLDOWN = 2 } impl From < PUPDR15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PUPDR15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PUPDR15`" ]
pub type PUPDR15_R = crate :: R < u8 , PUPDR15_A > ; impl PUPDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , PUPDR15_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( PUPDR15_A :: FLOATING ) , 1 => Val ( PUPDR15_A :: PULLUP ) , 2 => Val ( PUPDR15_A :: PULLDOWN ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `FLOATING`" ]
# [ inline ( always ) ]
pub fn is_floating ( & self ) -> bool { * self == PUPDR15_A :: FLOATING } # [ doc = "Checks if the value of the field is `PULLUP`" ]
# [ inline ( always ) ]
pub fn is_pull_up ( & self ) -> bool { * self == PUPDR15_A :: PULLUP } # [ doc = "Checks if the value of the field is `PULLDOWN`" ]
# [ inline ( always ) ]
pub fn is_pull_down ( & self ) -> bool { * self == PUPDR15_A :: PULLDOWN } } # [ doc = "Write proxy for field `PUPDR15`" ]
pub struct PUPDR15_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR15_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR14_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR14`" ]
pub type PUPDR14_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR14`" ]
pub struct PUPDR14_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR14_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR13_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR13`" ]
pub type PUPDR13_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR13`" ]
pub struct PUPDR13_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR13_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR12_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR12`" ]
pub type PUPDR12_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR12`" ]
pub struct PUPDR12_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR12_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR11_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR11`" ]
pub type PUPDR11_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR11`" ]
pub struct PUPDR11_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR11_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR10_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR10`" ]
pub type PUPDR10_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR10`" ]
pub struct PUPDR10_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR10_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR9_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR9`" ]
pub type PUPDR9_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR9`" ]
pub struct PUPDR9_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR9_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR8_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR8`" ]
pub type PUPDR8_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR8`" ]
pub struct PUPDR8_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR8_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR7_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR7`" ]
pub type PUPDR7_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR7`" ]
pub struct PUPDR7_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR7_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR6_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR6`" ]
pub type PUPDR6_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR6`" ]
pub struct PUPDR6_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR6_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR5_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR5`" ]
pub type PUPDR5_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR5`" ]
pub struct PUPDR5_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR5_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR4_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR4`" ]
pub type PUPDR4_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR4`" ]
pub struct PUPDR4_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR4_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR3_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR3`" ]
pub type PUPDR3_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR3`" ]
pub struct PUPDR3_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR3_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR2_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR2`" ]
pub type PUPDR2_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR2`" ]
pub struct PUPDR2_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR2_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR1_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR1`" ]
pub type PUPDR1_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR1`" ]
pub struct PUPDR1_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR1_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR0_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR0`" ]
pub type PUPDR0_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR0`" ]
pub struct PUPDR0_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR0_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr15 ( & self ) -> PUPDR15_R { PUPDR15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr14 ( & self ) -> PUPDR14_R { PUPDR14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr13 ( & self ) -> PUPDR13_R { PUPDR13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr12 ( & self ) -> PUPDR12_R { PUPDR12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr11 ( & self ) -> PUPDR11_R { PUPDR11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr10 ( & self ) -> PUPDR10_R { PUPDR10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr9 ( & self ) -> PUPDR9_R { PUPDR9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr8 ( & self ) -> PUPDR8_R { PUPDR8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr7 ( & self ) -> PUPDR7_R { PUPDR7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr6 ( & self ) -> PUPDR6_R { PUPDR6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr5 ( & self ) -> PUPDR5_R { PUPDR5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr4 ( & self ) -> PUPDR4_R { PUPDR4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr3 ( & self ) -> PUPDR3_R { PUPDR3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr2 ( & self ) -> PUPDR2_R { PUPDR2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr1 ( & self ) -> PUPDR1_R { PUPDR1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr0 ( & self ) -> PUPDR0_R { PUPDR0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr15 ( & mut self ) -> PUPDR15_W { PUPDR15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr14 ( & mut self ) -> PUPDR14_W { PUPDR14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr13 ( & mut self ) -> PUPDR13_W { PUPDR13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr12 ( & mut self ) -> PUPDR12_W { PUPDR12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr11 ( & mut self ) -> PUPDR11_W { PUPDR11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr10 ( & mut self ) -> PUPDR10_W { PUPDR10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr9 ( & mut self ) -> PUPDR9_W { PUPDR9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr8 ( & mut self ) -> PUPDR8_W { PUPDR8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr7 ( & mut self ) -> PUPDR7_W { PUPDR7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr6 ( & mut self ) -> PUPDR6_W { PUPDR6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr5 ( & mut self ) -> PUPDR5_W { PUPDR5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr4 ( & mut self ) -> PUPDR4_W { PUPDR4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr3 ( & mut self ) -> PUPDR3_W { PUPDR3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr2 ( & mut self ) -> PUPDR2_W { PUPDR2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr1 ( & mut self ) -> PUPDR1_W { PUPDR1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr0 ( & mut self ) -> PUPDR0_W { PUPDR0_W { w : self } } } } # [ doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](idr) module" ]
pub type IDR = crate :: Reg < u32 , _IDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IDR ; # [ doc = "`read()` method returns [idr::R](idr::R) reader structure" ]
impl crate :: Readable for IDR { } # [ doc = "GPIO port input data register" ]
pub mod idr { # [ doc = "Reader of register IDR" ]
pub type R = crate :: R < u32 , super :: IDR > ; # [ doc = "Port input data (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IDR15_A { # [ doc = "1: Input is logic high" ]
HIGH = 1 , # [ doc = "0: Input is logic low" ]
LOW = 0 } impl From < IDR15_A > for bool { # [ inline ( always ) ]
fn from ( variant : IDR15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IDR15`" ]
pub type IDR15_R = crate :: R < bool , IDR15_A > ; impl IDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IDR15_A { match self . bits { true => IDR15_A :: HIGH , false => IDR15_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == IDR15_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == IDR15_A :: LOW } } # [ doc = "Port input data (y = 0..15)" ]
pub type IDR14_A = IDR15_A ; # [ doc = "Reader of field `IDR14`" ]
pub type IDR14_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR13_A = IDR15_A ; # [ doc = "Reader of field `IDR13`" ]
pub type IDR13_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR12_A = IDR15_A ; # [ doc = "Reader of field `IDR12`" ]
pub type IDR12_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR11_A = IDR15_A ; # [ doc = "Reader of field `IDR11`" ]
pub type IDR11_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR10_A = IDR15_A ; # [ doc = "Reader of field `IDR10`" ]
pub type IDR10_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR9_A = IDR15_A ; # [ doc = "Reader of field `IDR9`" ]
pub type IDR9_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR8_A = IDR15_A ; # [ doc = "Reader of field `IDR8`" ]
pub type IDR8_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR7_A = IDR15_A ; # [ doc = "Reader of field `IDR7`" ]
pub type IDR7_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR6_A = IDR15_A ; # [ doc = "Reader of field `IDR6`" ]
pub type IDR6_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR5_A = IDR15_A ; # [ doc = "Reader of field `IDR5`" ]
pub type IDR5_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR4_A = IDR15_A ; # [ doc = "Reader of field `IDR4`" ]
pub type IDR4_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR3_A = IDR15_A ; # [ doc = "Reader of field `IDR3`" ]
pub type IDR3_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR2_A = IDR15_A ; # [ doc = "Reader of field `IDR2`" ]
pub type IDR2_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR1_A = IDR15_A ; # [ doc = "Reader of field `IDR1`" ]
pub type IDR1_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR0_A = IDR15_A ; # [ doc = "Reader of field `IDR0`" ]
pub type IDR0_R = crate :: R < bool , IDR15_A > ; impl R { # [ doc = "Bit 15 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr15 ( & self ) -> IDR15_R { IDR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr14 ( & self ) -> IDR14_R { IDR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr13 ( & self ) -> IDR13_R { IDR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr12 ( & self ) -> IDR12_R { IDR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr11 ( & self ) -> IDR11_R { IDR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr10 ( & self ) -> IDR10_R { IDR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr9 ( & self ) -> IDR9_R { IDR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr8 ( & self ) -> IDR8_R { IDR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr7 ( & self ) -> IDR7_R { IDR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr6 ( & self ) -> IDR6_R { IDR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr5 ( & self ) -> IDR5_R { IDR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr4 ( & self ) -> IDR4_R { IDR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr3 ( & self ) -> IDR3_R { IDR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr2 ( & self ) -> IDR2_R { IDR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr1 ( & self ) -> IDR1_R { IDR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr0 ( & self ) -> IDR0_R { IDR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } } # [ doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [odr](odr) module" ]
pub type ODR = crate :: Reg < u32 , _ODR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ODR ; # [ doc = "`read()` method returns [odr::R](odr::R) reader structure" ]
impl crate :: Readable for ODR { } # [ doc = "`write(|w| ..)` method takes [odr::W](odr::W) writer structure" ]
impl crate :: Writable for ODR { } # [ doc = "GPIO port output data register" ]
pub mod odr { # [ doc = "Reader of register ODR" ]
pub type R = crate :: R < u32 , super :: ODR > ; # [ doc = "Writer for register ODR" ]
pub type W = crate :: W < u32 , super :: ODR > ; # [ doc = "Register ODR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ODR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port output data (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ODR15_A { # [ doc = "1: Set output to logic high" ]
HIGH = 1 , # [ doc = "0: Set output to logic low" ]
LOW = 0 } impl From < ODR15_A > for bool { # [ inline ( always ) ]
fn from ( variant : ODR15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ODR15`" ]
pub type ODR15_R = crate :: R < bool , ODR15_A > ; impl ODR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ODR15_A { match self . bits { true => ODR15_A :: HIGH , false => ODR15_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == ODR15_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == ODR15_A :: LOW } } # [ doc = "Write proxy for field `ODR15`" ]
pub struct ODR15_W < 'a > { w : & 'a mut W , } impl < 'a > ODR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR14_A = ODR15_A ; # [ doc = "Reader of field `ODR14`" ]
pub type ODR14_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR14`" ]
pub struct ODR14_W < 'a > { w : & 'a mut W , } impl < 'a > ODR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR13_A = ODR15_A ; # [ doc = "Reader of field `ODR13`" ]
pub type ODR13_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR13`" ]
pub struct ODR13_W < 'a > { w : & 'a mut W , } impl < 'a > ODR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR12_A = ODR15_A ; # [ doc = "Reader of field `ODR12`" ]
pub type ODR12_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR12`" ]
pub struct ODR12_W < 'a > { w : & 'a mut W , } impl < 'a > ODR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR11_A = ODR15_A ; # [ doc = "Reader of field `ODR11`" ]
pub type ODR11_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR11`" ]
pub struct ODR11_W < 'a > { w : & 'a mut W , } impl < 'a > ODR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR10_A = ODR15_A ; # [ doc = "Reader of field `ODR10`" ]
pub type ODR10_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR10`" ]
pub struct ODR10_W < 'a > { w : & 'a mut W , } impl < 'a > ODR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR9_A = ODR15_A ; # [ doc = "Reader of field `ODR9`" ]
pub type ODR9_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR9`" ]
pub struct ODR9_W < 'a > { w : & 'a mut W , } impl < 'a > ODR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR8_A = ODR15_A ; # [ doc = "Reader of field `ODR8`" ]
pub type ODR8_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR8`" ]
pub struct ODR8_W < 'a > { w : & 'a mut W , } impl < 'a > ODR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR7_A = ODR15_A ; # [ doc = "Reader of field `ODR7`" ]
pub type ODR7_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR7`" ]
pub struct ODR7_W < 'a > { w : & 'a mut W , } impl < 'a > ODR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR6_A = ODR15_A ; # [ doc = "Reader of field `ODR6`" ]
pub type ODR6_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR6`" ]
pub struct ODR6_W < 'a > { w : & 'a mut W , } impl < 'a > ODR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR5_A = ODR15_A ; # [ doc = "Reader of field `ODR5`" ]
pub type ODR5_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR5`" ]
pub struct ODR5_W < 'a > { w : & 'a mut W , } impl < 'a > ODR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR4_A = ODR15_A ; # [ doc = "Reader of field `ODR4`" ]
pub type ODR4_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR4`" ]
pub struct ODR4_W < 'a > { w : & 'a mut W , } impl < 'a > ODR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR3_A = ODR15_A ; # [ doc = "Reader of field `ODR3`" ]
pub type ODR3_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR3`" ]
pub struct ODR3_W < 'a > { w : & 'a mut W , } impl < 'a > ODR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR2_A = ODR15_A ; # [ doc = "Reader of field `ODR2`" ]
pub type ODR2_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR2`" ]
pub struct ODR2_W < 'a > { w : & 'a mut W , } impl < 'a > ODR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR1_A = ODR15_A ; # [ doc = "Reader of field `ODR1`" ]
pub type ODR1_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR1`" ]
pub struct ODR1_W < 'a > { w : & 'a mut W , } impl < 'a > ODR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR0_A = ODR15_A ; # [ doc = "Reader of field `ODR0`" ]
pub type ODR0_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR0`" ]
pub struct ODR0_W < 'a > { w : & 'a mut W , } impl < 'a > ODR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 15 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr15 ( & self ) -> ODR15_R { ODR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr14 ( & self ) -> ODR14_R { ODR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr13 ( & self ) -> ODR13_R { ODR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr12 ( & self ) -> ODR12_R { ODR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr11 ( & self ) -> ODR11_R { ODR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr10 ( & self ) -> ODR10_R { ODR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr9 ( & self ) -> ODR9_R { ODR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr8 ( & self ) -> ODR8_R { ODR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr7 ( & self ) -> ODR7_R { ODR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr6 ( & self ) -> ODR6_R { ODR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr5 ( & self ) -> ODR5_R { ODR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr4 ( & self ) -> ODR4_R { ODR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr3 ( & self ) -> ODR3_R { ODR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr2 ( & self ) -> ODR2_R { ODR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr1 ( & self ) -> ODR1_R { ODR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr0 ( & self ) -> ODR0_R { ODR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr15 ( & mut self ) -> ODR15_W { ODR15_W { w : self } } # [ doc = "Bit 14 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr14 ( & mut self ) -> ODR14_W { ODR14_W { w : self } } # [ doc = "Bit 13 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr13 ( & mut self ) -> ODR13_W { ODR13_W { w : self } } # [ doc = "Bit 12 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr12 ( & mut self ) -> ODR12_W { ODR12_W { w : self } } # [ doc = "Bit 11 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr11 ( & mut self ) -> ODR11_W { ODR11_W { w : self } } # [ doc = "Bit 10 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr10 ( & mut self ) -> ODR10_W { ODR10_W { w : self } } # [ doc = "Bit 9 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr9 ( & mut self ) -> ODR9_W { ODR9_W { w : self } } # [ doc = "Bit 8 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr8 ( & mut self ) -> ODR8_W { ODR8_W { w : self } } # [ doc = "Bit 7 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr7 ( & mut self ) -> ODR7_W { ODR7_W { w : self } } # [ doc = "Bit 6 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr6 ( & mut self ) -> ODR6_W { ODR6_W { w : self } } # [ doc = "Bit 5 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr5 ( & mut self ) -> ODR5_W { ODR5_W { w : self } } # [ doc = "Bit 4 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr4 ( & mut self ) -> ODR4_W { ODR4_W { w : self } } # [ doc = "Bit 3 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr3 ( & mut self ) -> ODR3_W { ODR3_W { w : self } } # [ doc = "Bit 2 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr2 ( & mut self ) -> ODR2_W { ODR2_W { w : self } } # [ doc = "Bit 1 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr1 ( & mut self ) -> ODR1_W { ODR1_W { w : self } } # [ doc = "Bit 0 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr0 ( & mut self ) -> ODR0_W { ODR0_W { w : self } } } } # [ doc = "GPIO port bit set/reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bsrr](bsrr) module" ]
pub type BSRR = crate :: Reg < u32 , _BSRR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BSRR ; # [ doc = "`write(|w| ..)` method takes [bsrr::W](bsrr::W) writer structure" ]
impl crate :: Writable for BSRR { } # [ doc = "GPIO port bit set/reset register" ]
pub mod bsrr { # [ doc = "Writer for register BSRR" ]
pub type W = crate :: W < u32 , super :: BSRR > ; # [ doc = "Register BSRR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BSRR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x reset bit y (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR15_AW { # [ doc = "1: Resets the corresponding ODRx bit" ]
RESET = 1 } impl From < BR15_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR15_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR15`" ]
pub struct BR15_W < 'a > { w : & 'a mut W , } impl < 'a > BR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR14_AW = BR15_AW ; # [ doc = "Write proxy for field `BR14`" ]
pub struct BR14_W < 'a > { w : & 'a mut W , } impl < 'a > BR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR13_AW = BR15_AW ; # [ doc = "Write proxy for field `BR13`" ]
pub struct BR13_W < 'a > { w : & 'a mut W , } impl < 'a > BR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR12_AW = BR15_AW ; # [ doc = "Write proxy for field `BR12`" ]
pub struct BR12_W < 'a > { w : & 'a mut W , } impl < 'a > BR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR11_AW = BR15_AW ; # [ doc = "Write proxy for field `BR11`" ]
pub struct BR11_W < 'a > { w : & 'a mut W , } impl < 'a > BR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR10_AW = BR15_AW ; # [ doc = "Write proxy for field `BR10`" ]
pub struct BR10_W < 'a > { w : & 'a mut W , } impl < 'a > BR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR9_AW = BR15_AW ; # [ doc = "Write proxy for field `BR9`" ]
pub struct BR9_W < 'a > { w : & 'a mut W , } impl < 'a > BR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR8_AW = BR15_AW ; # [ doc = "Write proxy for field `BR8`" ]
pub struct BR8_W < 'a > { w : & 'a mut W , } impl < 'a > BR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR7_AW = BR15_AW ; # [ doc = "Write proxy for field `BR7`" ]
pub struct BR7_W < 'a > { w : & 'a mut W , } impl < 'a > BR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR6_AW = BR15_AW ; # [ doc = "Write proxy for field `BR6`" ]
pub struct BR6_W < 'a > { w : & 'a mut W , } impl < 'a > BR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR5_AW = BR15_AW ; # [ doc = "Write proxy for field `BR5`" ]
pub struct BR5_W < 'a > { w : & 'a mut W , } impl < 'a > BR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR4_AW = BR15_AW ; # [ doc = "Write proxy for field `BR4`" ]
pub struct BR4_W < 'a > { w : & 'a mut W , } impl < 'a > BR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR3_AW = BR15_AW ; # [ doc = "Write proxy for field `BR3`" ]
pub struct BR3_W < 'a > { w : & 'a mut W , } impl < 'a > BR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR2_AW = BR15_AW ; # [ doc = "Write proxy for field `BR2`" ]
pub struct BR2_W < 'a > { w : & 'a mut W , } impl < 'a > BR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR1_AW = BR15_AW ; # [ doc = "Write proxy for field `BR1`" ]
pub struct BR1_W < 'a > { w : & 'a mut W , } impl < 'a > BR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BR0_AW = BR15_AW ; # [ doc = "Write proxy for field `BR0`" ]
pub struct BR0_W < 'a > { w : & 'a mut W , } impl < 'a > BR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BS15_AW { # [ doc = "1: Sets the corresponding ODRx bit" ]
SET = 1 } impl From < BS15_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BS15_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BS15`" ]
pub struct BS15_W < 'a > { w : & 'a mut W , } impl < 'a > BS15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS14_AW = BS15_AW ; # [ doc = "Write proxy for field `BS14`" ]
pub struct BS14_W < 'a > { w : & 'a mut W , } impl < 'a > BS14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS13_AW = BS15_AW ; # [ doc = "Write proxy for field `BS13`" ]
pub struct BS13_W < 'a > { w : & 'a mut W , } impl < 'a > BS13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS12_AW = BS15_AW ; # [ doc = "Write proxy for field `BS12`" ]
pub struct BS12_W < 'a > { w : & 'a mut W , } impl < 'a > BS12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS11_AW = BS15_AW ; # [ doc = "Write proxy for field `BS11`" ]
pub struct BS11_W < 'a > { w : & 'a mut W , } impl < 'a > BS11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS10_AW = BS15_AW ; # [ doc = "Write proxy for field `BS10`" ]
pub struct BS10_W < 'a > { w : & 'a mut W , } impl < 'a > BS10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS9_AW = BS15_AW ; # [ doc = "Write proxy for field `BS9`" ]
pub struct BS9_W < 'a > { w : & 'a mut W , } impl < 'a > BS9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS8_AW = BS15_AW ; # [ doc = "Write proxy for field `BS8`" ]
pub struct BS8_W < 'a > { w : & 'a mut W , } impl < 'a > BS8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS7_AW = BS15_AW ; # [ doc = "Write proxy for field `BS7`" ]
pub struct BS7_W < 'a > { w : & 'a mut W , } impl < 'a > BS7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS6_AW = BS15_AW ; # [ doc = "Write proxy for field `BS6`" ]
pub struct BS6_W < 'a > { w : & 'a mut W , } impl < 'a > BS6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS5_AW = BS15_AW ; # [ doc = "Write proxy for field `BS5`" ]
pub struct BS5_W < 'a > { w : & 'a mut W , } impl < 'a > BS5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS4_AW = BS15_AW ; # [ doc = "Write proxy for field `BS4`" ]
pub struct BS4_W < 'a > { w : & 'a mut W , } impl < 'a > BS4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS3_AW = BS15_AW ; # [ doc = "Write proxy for field `BS3`" ]
pub struct BS3_W < 'a > { w : & 'a mut W , } impl < 'a > BS3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS2_AW = BS15_AW ; # [ doc = "Write proxy for field `BS2`" ]
pub struct BS2_W < 'a > { w : & 'a mut W , } impl < 'a > BS2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS1_AW = BS15_AW ; # [ doc = "Write proxy for field `BS1`" ]
pub struct BS1_W < 'a > { w : & 'a mut W , } impl < 'a > BS1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS0_AW = BS15_AW ; # [ doc = "Write proxy for field `BS0`" ]
pub struct BS0_W < 'a > { w : & 'a mut W , } impl < 'a > BS0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 31 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br15 ( & mut self ) -> BR15_W { BR15_W { w : self } } # [ doc = "Bit 30 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br14 ( & mut self ) -> BR14_W { BR14_W { w : self } } # [ doc = "Bit 29 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br13 ( & mut self ) -> BR13_W { BR13_W { w : self } } # [ doc = "Bit 28 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br12 ( & mut self ) -> BR12_W { BR12_W { w : self } } # [ doc = "Bit 27 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br11 ( & mut self ) -> BR11_W { BR11_W { w : self } } # [ doc = "Bit 26 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br10 ( & mut self ) -> BR10_W { BR10_W { w : self } } # [ doc = "Bit 25 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br9 ( & mut self ) -> BR9_W { BR9_W { w : self } } # [ doc = "Bit 24 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br8 ( & mut self ) -> BR8_W { BR8_W { w : self } } # [ doc = "Bit 23 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br7 ( & mut self ) -> BR7_W { BR7_W { w : self } } # [ doc = "Bit 22 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br6 ( & mut self ) -> BR6_W { BR6_W { w : self } } # [ doc = "Bit 21 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br5 ( & mut self ) -> BR5_W { BR5_W { w : self } } # [ doc = "Bit 20 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br4 ( & mut self ) -> BR4_W { BR4_W { w : self } } # [ doc = "Bit 19 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br3 ( & mut self ) -> BR3_W { BR3_W { w : self } } # [ doc = "Bit 18 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br2 ( & mut self ) -> BR2_W { BR2_W { w : self } } # [ doc = "Bit 17 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br1 ( & mut self ) -> BR1_W { BR1_W { w : self } } # [ doc = "Bit 16 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn br0 ( & mut self ) -> BR0_W { BR0_W { w : self } } # [ doc = "Bit 15 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs15 ( & mut self ) -> BS15_W { BS15_W { w : self } } # [ doc = "Bit 14 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs14 ( & mut self ) -> BS14_W { BS14_W { w : self } } # [ doc = "Bit 13 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs13 ( & mut self ) -> BS13_W { BS13_W { w : self } } # [ doc = "Bit 12 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs12 ( & mut self ) -> BS12_W { BS12_W { w : self } } # [ doc = "Bit 11 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs11 ( & mut self ) -> BS11_W { BS11_W { w : self } } # [ doc = "Bit 10 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs10 ( & mut self ) -> BS10_W { BS10_W { w : self } } # [ doc = "Bit 9 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs9 ( & mut self ) -> BS9_W { BS9_W { w : self } } # [ doc = "Bit 8 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs8 ( & mut self ) -> BS8_W { BS8_W { w : self } } # [ doc = "Bit 7 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs7 ( & mut self ) -> BS7_W { BS7_W { w : self } } # [ doc = "Bit 6 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs6 ( & mut self ) -> BS6_W { BS6_W { w : self } } # [ doc = "Bit 5 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs5 ( & mut self ) -> BS5_W { BS5_W { w : self } } # [ doc = "Bit 4 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs4 ( & mut self ) -> BS4_W { BS4_W { w : self } } # [ doc = "Bit 3 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs3 ( & mut self ) -> BS3_W { BS3_W { w : self } } # [ doc = "Bit 2 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs2 ( & mut self ) -> BS2_W { BS2_W { w : self } } # [ doc = "Bit 1 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs1 ( & mut self ) -> BS1_W { BS1_W { w : self } } # [ doc = "Bit 0 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs0 ( & mut self ) -> BS0_W { BS0_W { w : self } } } } # [ doc = "GPIO port configuration lock register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lckr](lckr) module" ]
pub type LCKR = crate :: Reg < u32 , _LCKR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _LCKR ; # [ doc = "`read()` method returns [lckr::R](lckr::R) reader structure" ]
impl crate :: Readable for LCKR { } # [ doc = "`write(|w| ..)` method takes [lckr::W](lckr::W) writer structure" ]
impl crate :: Writable for LCKR { } # [ doc = "GPIO port configuration lock register" ]
pub mod lckr { # [ doc = "Reader of register LCKR" ]
pub type R = crate :: R < u32 , super :: LCKR > ; # [ doc = "Writer for register LCKR" ]
pub type W = crate :: W < u32 , super :: LCKR > ; # [ doc = "Register LCKR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: LCKR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Lok Key\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCKK_A { # [ doc = "0: Port configuration lock key not active" ]
NOTACTIVE = 0 , # [ doc = "1: Port configuration lock key active" ]
ACTIVE = 1 } impl From < LCKK_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCKK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCKK`" ]
pub type LCKK_R = crate :: R < bool , LCKK_A > ; impl LCKK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCKK_A { match self . bits { false => LCKK_A :: NOTACTIVE , true => LCKK_A :: ACTIVE } } # [ doc = "Checks if the value of the field is `NOTACTIVE`" ]
# [ inline ( always ) ]
pub fn is_not_active ( & self ) -> bool { * self == LCKK_A :: NOTACTIVE } # [ doc = "Checks if the value of the field is `ACTIVE`" ]
# [ inline ( always ) ]
pub fn is_active ( & self ) -> bool { * self == LCKK_A :: ACTIVE } } # [ doc = "Write proxy for field `LCKK`" ]
pub struct LCKK_W < 'a > { w : & 'a mut W , } impl < 'a > LCKK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCKK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration lock key not active" ]
# [ inline ( always ) ]
pub fn not_active ( self ) -> & 'a mut W { self . variant ( LCKK_A :: NOTACTIVE ) } # [ doc = "Port configuration lock key active" ]
# [ inline ( always ) ]
pub fn active ( self ) -> & 'a mut W { self . variant ( LCKK_A :: ACTIVE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCK15_A { # [ doc = "0: Port configuration not locked" ]
UNLOCKED = 0 , # [ doc = "1: Port configuration locked" ]
LOCKED = 1 } impl From < LCK15_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCK15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCK15`" ]
pub type LCK15_R = crate :: R < bool , LCK15_A > ; impl LCK15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCK15_A { match self . bits { false => LCK15_A :: UNLOCKED , true => LCK15_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LCK15_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LCK15_A :: LOCKED } } # [ doc = "Write proxy for field `LCK15`" ]
pub struct LCK15_W < 'a > { w : & 'a mut W , } impl < 'a > LCK15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK14_A = LCK15_A ; # [ doc = "Reader of field `LCK14`" ]
pub type LCK14_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK14`" ]
pub struct LCK14_W < 'a > { w : & 'a mut W , } impl < 'a > LCK14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK13_A = LCK15_A ; # [ doc = "Reader of field `LCK13`" ]
pub type LCK13_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK13`" ]
pub struct LCK13_W < 'a > { w : & 'a mut W , } impl < 'a > LCK13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK12_A = LCK15_A ; # [ doc = "Reader of field `LCK12`" ]
pub type LCK12_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK12`" ]
pub struct LCK12_W < 'a > { w : & 'a mut W , } impl < 'a > LCK12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK11_A = LCK15_A ; # [ doc = "Reader of field `LCK11`" ]
pub type LCK11_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK11`" ]
pub struct LCK11_W < 'a > { w : & 'a mut W , } impl < 'a > LCK11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK10_A = LCK15_A ; # [ doc = "Reader of field `LCK10`" ]
pub type LCK10_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK10`" ]
pub struct LCK10_W < 'a > { w : & 'a mut W , } impl < 'a > LCK10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCK9_A { # [ doc = "0: Port configuration not locked" ]
UNLOCKED = 0 , # [ doc = "1: Port configuration locked" ]
LOCKED = 1 } impl From < LCK9_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCK9_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCK9`" ]
pub type LCK9_R = crate :: R < bool , LCK9_A > ; impl LCK9_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCK9_A { match self . bits { false => LCK9_A :: UNLOCKED , true => LCK9_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LCK9_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LCK9_A :: LOCKED } } # [ doc = "Write proxy for field `LCK9`" ]
pub struct LCK9_W < 'a > { w : & 'a mut W , } impl < 'a > LCK9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK8_A = LCK9_A ; # [ doc = "Reader of field `LCK8`" ]
pub type LCK8_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK8`" ]
pub struct LCK8_W < 'a > { w : & 'a mut W , } impl < 'a > LCK8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK7_A = LCK9_A ; # [ doc = "Reader of field `LCK7`" ]
pub type LCK7_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK7`" ]
pub struct LCK7_W < 'a > { w : & 'a mut W , } impl < 'a > LCK7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK6_A = LCK9_A ; # [ doc = "Reader of field `LCK6`" ]
pub type LCK6_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK6`" ]
pub struct LCK6_W < 'a > { w : & 'a mut W , } impl < 'a > LCK6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK5_A = LCK9_A ; # [ doc = "Reader of field `LCK5`" ]
pub type LCK5_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK5`" ]
pub struct LCK5_W < 'a > { w : & 'a mut W , } impl < 'a > LCK5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK4_A = LCK9_A ; # [ doc = "Reader of field `LCK4`" ]
pub type LCK4_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK4`" ]
pub struct LCK4_W < 'a > { w : & 'a mut W , } impl < 'a > LCK4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK3_A = LCK9_A ; # [ doc = "Reader of field `LCK3`" ]
pub type LCK3_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK3`" ]
pub struct LCK3_W < 'a > { w : & 'a mut W , } impl < 'a > LCK3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK2_A = LCK9_A ; # [ doc = "Reader of field `LCK2`" ]
pub type LCK2_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK2`" ]
pub struct LCK2_W < 'a > { w : & 'a mut W , } impl < 'a > LCK2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK1_A = LCK9_A ; # [ doc = "Reader of field `LCK1`" ]
pub type LCK1_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK1`" ]
pub struct LCK1_W < 'a > { w : & 'a mut W , } impl < 'a > LCK1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK0_A = LCK9_A ; # [ doc = "Reader of field `LCK0`" ]
pub type LCK0_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK0`" ]
pub struct LCK0_W < 'a > { w : & 'a mut W , } impl < 'a > LCK0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 16 - Lok Key" ]
# [ inline ( always ) ]
pub fn lckk ( & self ) -> LCKK_R { LCKK_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck15 ( & self ) -> LCK15_R { LCK15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck14 ( & self ) -> LCK14_R { LCK14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck13 ( & self ) -> LCK13_R { LCK13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck12 ( & self ) -> LCK12_R { LCK12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck11 ( & self ) -> LCK11_R { LCK11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck10 ( & self ) -> LCK10_R { LCK10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck9 ( & self ) -> LCK9_R { LCK9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck8 ( & self ) -> LCK8_R { LCK8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck7 ( & self ) -> LCK7_R { LCK7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck6 ( & self ) -> LCK6_R { LCK6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck5 ( & self ) -> LCK5_R { LCK5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck4 ( & self ) -> LCK4_R { LCK4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck3 ( & self ) -> LCK3_R { LCK3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck2 ( & self ) -> LCK2_R { LCK2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck1 ( & self ) -> LCK1_R { LCK1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck0 ( & self ) -> LCK0_R { LCK0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 16 - Lok Key" ]
# [ inline ( always ) ]
pub fn lckk ( & mut self ) -> LCKK_W { LCKK_W { w : self } } # [ doc = "Bit 15 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck15 ( & mut self ) -> LCK15_W { LCK15_W { w : self } } # [ doc = "Bit 14 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck14 ( & mut self ) -> LCK14_W { LCK14_W { w : self } } # [ doc = "Bit 13 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck13 ( & mut self ) -> LCK13_W { LCK13_W { w : self } } # [ doc = "Bit 12 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck12 ( & mut self ) -> LCK12_W { LCK12_W { w : self } } # [ doc = "Bit 11 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck11 ( & mut self ) -> LCK11_W { LCK11_W { w : self } } # [ doc = "Bit 10 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck10 ( & mut self ) -> LCK10_W { LCK10_W { w : self } } # [ doc = "Bit 9 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck9 ( & mut self ) -> LCK9_W { LCK9_W { w : self } } # [ doc = "Bit 8 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck8 ( & mut self ) -> LCK8_W { LCK8_W { w : self } } # [ doc = "Bit 7 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck7 ( & mut self ) -> LCK7_W { LCK7_W { w : self } } # [ doc = "Bit 6 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck6 ( & mut self ) -> LCK6_W { LCK6_W { w : self } } # [ doc = "Bit 5 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck5 ( & mut self ) -> LCK5_W { LCK5_W { w : self } } # [ doc = "Bit 4 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck4 ( & mut self ) -> LCK4_W { LCK4_W { w : self } } # [ doc = "Bit 3 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck3 ( & mut self ) -> LCK3_W { LCK3_W { w : self } } # [ doc = "Bit 2 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck2 ( & mut self ) -> LCK2_W { LCK2_W { w : self } } # [ doc = "Bit 1 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck1 ( & mut self ) -> LCK1_W { LCK1_W { w : self } } # [ doc = "Bit 0 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck0 ( & mut self ) -> LCK0_W { LCK0_W { w : self } } } } # [ doc = "GPIO alternate function low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afrl](afrl) module" ]
pub type AFRL = crate :: Reg < u32 , _AFRL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AFRL ; # [ doc = "`read()` method returns [afrl::R](afrl::R) reader structure" ]
impl crate :: Readable for AFRL { } # [ doc = "`write(|w| ..)` method takes [afrl::W](afrl::W) writer structure" ]
impl crate :: Writable for AFRL { } # [ doc = "GPIO alternate function low register" ]
pub mod afrl { # [ doc = "Reader of register AFRL" ]
pub type R = crate :: R < u32 , super :: AFRL > ; # [ doc = "Writer for register AFRL" ]
pub type W = crate :: W < u32 , super :: AFRL > ; # [ doc = "Register AFRL `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AFRL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum AFRL7_A { # [ doc = "0: AF0" ]
AF0 = 0 , # [ doc = "1: AF1" ]
AF1 = 1 , # [ doc = "2: AF2" ]
AF2 = 2 , # [ doc = "3: AF3" ]
AF3 = 3 , # [ doc = "4: AF4" ]
AF4 = 4 , # [ doc = "5: AF5" ]
AF5 = 5 , # [ doc = "6: AF6" ]
AF6 = 6 , # [ doc = "7: AF7" ]
AF7 = 7 , # [ doc = "8: AF8" ]
AF8 = 8 , # [ doc = "9: AF9" ]
AF9 = 9 , # [ doc = "10: AF10" ]
AF10 = 10 , # [ doc = "11: AF11" ]
AF11 = 11 , # [ doc = "12: AF12" ]
AF12 = 12 , # [ doc = "13: AF13" ]
AF13 = 13 , # [ doc = "14: AF14" ]
AF14 = 14 , # [ doc = "15: AF15" ]
AF15 = 15 } impl From < AFRL7_A > for u8 { # [ inline ( always ) ]
fn from ( variant : AFRL7_A ) -> Self { variant as _ } } # [ doc = "Reader of field `AFRL7`" ]
pub type AFRL7_R = crate :: R < u8 , AFRL7_A > ; impl AFRL7_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AFRL7_A { match self . bits { 0 => AFRL7_A :: AF0 , 1 => AFRL7_A :: AF1 , 2 => AFRL7_A :: AF2 , 3 => AFRL7_A :: AF3 , 4 => AFRL7_A :: AF4 , 5 => AFRL7_A :: AF5 , 6 => AFRL7_A :: AF6 , 7 => AFRL7_A :: AF7 , 8 => AFRL7_A :: AF8 , 9 => AFRL7_A :: AF9 , 10 => AFRL7_A :: AF10 , 11 => AFRL7_A :: AF11 , 12 => AFRL7_A :: AF12 , 13 => AFRL7_A :: AF13 , 14 => AFRL7_A :: AF14 , 15 => AFRL7_A :: AF15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `AF0`" ]
# [ inline ( always ) ]
pub fn is_af0 ( & self ) -> bool { * self == AFRL7_A :: AF0 } # [ doc = "Checks if the value of the field is `AF1`" ]
# [ inline ( always ) ]
pub fn is_af1 ( & self ) -> bool { * self == AFRL7_A :: AF1 } # [ doc = "Checks if the value of the field is `AF2`" ]
# [ inline ( always ) ]
pub fn is_af2 ( & self ) -> bool { * self == AFRL7_A :: AF2 } # [ doc = "Checks if the value of the field is `AF3`" ]
# [ inline ( always ) ]
pub fn is_af3 ( & self ) -> bool { * self == AFRL7_A :: AF3 } # [ doc = "Checks if the value of the field is `AF4`" ]
# [ inline ( always ) ]
pub fn is_af4 ( & self ) -> bool { * self == AFRL7_A :: AF4 } # [ doc = "Checks if the value of the field is `AF5`" ]
# [ inline ( always ) ]
pub fn is_af5 ( & self ) -> bool { * self == AFRL7_A :: AF5 } # [ doc = "Checks if the value of the field is `AF6`" ]
# [ inline ( always ) ]
pub fn is_af6 ( & self ) -> bool { * self == AFRL7_A :: AF6 } # [ doc = "Checks if the value of the field is `AF7`" ]
# [ inline ( always ) ]
pub fn is_af7 ( & self ) -> bool { * self == AFRL7_A :: AF7 } # [ doc = "Checks if the value of the field is `AF8`" ]
# [ inline ( always ) ]
pub fn is_af8 ( & self ) -> bool { * self == AFRL7_A :: AF8 } # [ doc = "Checks if the value of the field is `AF9`" ]
# [ inline ( always ) ]
pub fn is_af9 ( & self ) -> bool { * self == AFRL7_A :: AF9 } # [ doc = "Checks if the value of the field is `AF10`" ]
# [ inline ( always ) ]
pub fn is_af10 ( & self ) -> bool { * self == AFRL7_A :: AF10 } # [ doc = "Checks if the value of the field is `AF11`" ]
# [ inline ( always ) ]
pub fn is_af11 ( & self ) -> bool { * self == AFRL7_A :: AF11 } # [ doc = "Checks if the value of the field is `AF12`" ]
# [ inline ( always ) ]
pub fn is_af12 ( & self ) -> bool { * self == AFRL7_A :: AF12 } # [ doc = "Checks if the value of the field is `AF13`" ]
# [ inline ( always ) ]
pub fn is_af13 ( & self ) -> bool { * self == AFRL7_A :: AF13 } # [ doc = "Checks if the value of the field is `AF14`" ]
# [ inline ( always ) ]
pub fn is_af14 ( & self ) -> bool { * self == AFRL7_A :: AF14 } # [ doc = "Checks if the value of the field is `AF15`" ]
# [ inline ( always ) ]
pub fn is_af15 ( & self ) -> bool { * self == AFRL7_A :: AF15 } } # [ doc = "Write proxy for field `AFRL7`" ]
pub struct AFRL7_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL6_A = AFRL7_A ; # [ doc = "Reader of field `AFRL6`" ]
pub type AFRL6_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL6`" ]
pub struct AFRL6_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL5_A = AFRL7_A ; # [ doc = "Reader of field `AFRL5`" ]
pub type AFRL5_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL5`" ]
pub struct AFRL5_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL4_A = AFRL7_A ; # [ doc = "Reader of field `AFRL4`" ]
pub type AFRL4_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL4`" ]
pub struct AFRL4_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL3_A = AFRL7_A ; # [ doc = "Reader of field `AFRL3`" ]
pub type AFRL3_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL3`" ]
pub struct AFRL3_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL2_A = AFRL7_A ; # [ doc = "Reader of field `AFRL2`" ]
pub type AFRL2_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL2`" ]
pub struct AFRL2_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL1_A = AFRL7_A ; # [ doc = "Reader of field `AFRL1`" ]
pub type AFRL1_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL1`" ]
pub struct AFRL1_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL0_A = AFRL7_A ; # [ doc = "Reader of field `AFRL0`" ]
pub type AFRL0_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL0`" ]
pub struct AFRL0_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl7 ( & self ) -> AFRL7_R { AFRL7_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl6 ( & self ) -> AFRL6_R { AFRL6_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl5 ( & self ) -> AFRL5_R { AFRL5_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl4 ( & self ) -> AFRL4_R { AFRL4_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl3 ( & self ) -> AFRL3_R { AFRL3_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl2 ( & self ) -> AFRL2_R { AFRL2_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl1 ( & self ) -> AFRL1_R { AFRL1_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl0 ( & self ) -> AFRL0_R { AFRL0_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl7 ( & mut self ) -> AFRL7_W { AFRL7_W { w : self } } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl6 ( & mut self ) -> AFRL6_W { AFRL6_W { w : self } } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl5 ( & mut self ) -> AFRL5_W { AFRL5_W { w : self } } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl4 ( & mut self ) -> AFRL4_W { AFRL4_W { w : self } } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl3 ( & mut self ) -> AFRL3_W { AFRL3_W { w : self } } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl2 ( & mut self ) -> AFRL2_W { AFRL2_W { w : self } } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl1 ( & mut self ) -> AFRL1_W { AFRL1_W { w : self } } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl0 ( & mut self ) -> AFRL0_W { AFRL0_W { w : self } } } } # [ doc = "GPIO alternate function high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afrh](afrh) module" ]
pub type AFRH = crate :: Reg < u32 , _AFRH > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AFRH ; # [ doc = "`read()` method returns [afrh::R](afrh::R) reader structure" ]
impl crate :: Readable for AFRH { } # [ doc = "`write(|w| ..)` method takes [afrh::W](afrh::W) writer structure" ]
impl crate :: Writable for AFRH { } # [ doc = "GPIO alternate function high register" ]
pub mod afrh { # [ doc = "Reader of register AFRH" ]
pub type R = crate :: R < u32 , super :: AFRH > ; # [ doc = "Writer for register AFRH" ]
pub type W = crate :: W < u32 , super :: AFRH > ; # [ doc = "Register AFRH `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AFRH { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum AFRH15_A { # [ doc = "0: AF0" ]
AF0 = 0 , # [ doc = "1: AF1" ]
AF1 = 1 , # [ doc = "2: AF2" ]
AF2 = 2 , # [ doc = "3: AF3" ]
AF3 = 3 , # [ doc = "4: AF4" ]
AF4 = 4 , # [ doc = "5: AF5" ]
AF5 = 5 , # [ doc = "6: AF6" ]
AF6 = 6 , # [ doc = "7: AF7" ]
AF7 = 7 , # [ doc = "8: AF8" ]
AF8 = 8 , # [ doc = "9: AF9" ]
AF9 = 9 , # [ doc = "10: AF10" ]
AF10 = 10 , # [ doc = "11: AF11" ]
AF11 = 11 , # [ doc = "12: AF12" ]
AF12 = 12 , # [ doc = "13: AF13" ]
AF13 = 13 , # [ doc = "14: AF14" ]
AF14 = 14 , # [ doc = "15: AF15" ]
AF15 = 15 } impl From < AFRH15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : AFRH15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `AFRH15`" ]
pub type AFRH15_R = crate :: R < u8 , AFRH15_A > ; impl AFRH15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AFRH15_A { match self . bits { 0 => AFRH15_A :: AF0 , 1 => AFRH15_A :: AF1 , 2 => AFRH15_A :: AF2 , 3 => AFRH15_A :: AF3 , 4 => AFRH15_A :: AF4 , 5 => AFRH15_A :: AF5 , 6 => AFRH15_A :: AF6 , 7 => AFRH15_A :: AF7 , 8 => AFRH15_A :: AF8 , 9 => AFRH15_A :: AF9 , 10 => AFRH15_A :: AF10 , 11 => AFRH15_A :: AF11 , 12 => AFRH15_A :: AF12 , 13 => AFRH15_A :: AF13 , 14 => AFRH15_A :: AF14 , 15 => AFRH15_A :: AF15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `AF0`" ]
# [ inline ( always ) ]
pub fn is_af0 ( & self ) -> bool { * self == AFRH15_A :: AF0 } # [ doc = "Checks if the value of the field is `AF1`" ]
# [ inline ( always ) ]
pub fn is_af1 ( & self ) -> bool { * self == AFRH15_A :: AF1 } # [ doc = "Checks if the value of the field is `AF2`" ]
# [ inline ( always ) ]
pub fn is_af2 ( & self ) -> bool { * self == AFRH15_A :: AF2 } # [ doc = "Checks if the value of the field is `AF3`" ]
# [ inline ( always ) ]
pub fn is_af3 ( & self ) -> bool { * self == AFRH15_A :: AF3 } # [ doc = "Checks if the value of the field is `AF4`" ]
# [ inline ( always ) ]
pub fn is_af4 ( & self ) -> bool { * self == AFRH15_A :: AF4 } # [ doc = "Checks if the value of the field is `AF5`" ]
# [ inline ( always ) ]
pub fn is_af5 ( & self ) -> bool { * self == AFRH15_A :: AF5 } # [ doc = "Checks if the value of the field is `AF6`" ]
# [ inline ( always ) ]
pub fn is_af6 ( & self ) -> bool { * self == AFRH15_A :: AF6 } # [ doc = "Checks if the value of the field is `AF7`" ]
# [ inline ( always ) ]
pub fn is_af7 ( & self ) -> bool { * self == AFRH15_A :: AF7 } # [ doc = "Checks if the value of the field is `AF8`" ]
# [ inline ( always ) ]
pub fn is_af8 ( & self ) -> bool { * self == AFRH15_A :: AF8 } # [ doc = "Checks if the value of the field is `AF9`" ]
# [ inline ( always ) ]
pub fn is_af9 ( & self ) -> bool { * self == AFRH15_A :: AF9 } # [ doc = "Checks if the value of the field is `AF10`" ]
# [ inline ( always ) ]
pub fn is_af10 ( & self ) -> bool { * self == AFRH15_A :: AF10 } # [ doc = "Checks if the value of the field is `AF11`" ]
# [ inline ( always ) ]
pub fn is_af11 ( & self ) -> bool { * self == AFRH15_A :: AF11 } # [ doc = "Checks if the value of the field is `AF12`" ]
# [ inline ( always ) ]
pub fn is_af12 ( & self ) -> bool { * self == AFRH15_A :: AF12 } # [ doc = "Checks if the value of the field is `AF13`" ]
# [ inline ( always ) ]
pub fn is_af13 ( & self ) -> bool { * self == AFRH15_A :: AF13 } # [ doc = "Checks if the value of the field is `AF14`" ]
# [ inline ( always ) ]
pub fn is_af14 ( & self ) -> bool { * self == AFRH15_A :: AF14 } # [ doc = "Checks if the value of the field is `AF15`" ]
# [ inline ( always ) ]
pub fn is_af15 ( & self ) -> bool { * self == AFRH15_A :: AF15 } } # [ doc = "Write proxy for field `AFRH15`" ]
pub struct AFRH15_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH14_A = AFRH15_A ; # [ doc = "Reader of field `AFRH14`" ]
pub type AFRH14_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH14`" ]
pub struct AFRH14_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH13_A = AFRH15_A ; # [ doc = "Reader of field `AFRH13`" ]
pub type AFRH13_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH13`" ]
pub struct AFRH13_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH12_A = AFRH15_A ; # [ doc = "Reader of field `AFRH12`" ]
pub type AFRH12_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH12`" ]
pub struct AFRH12_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH11_A = AFRH15_A ; # [ doc = "Reader of field `AFRH11`" ]
pub type AFRH11_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH11`" ]
pub struct AFRH11_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH10_A = AFRH15_A ; # [ doc = "Reader of field `AFRH10`" ]
pub type AFRH10_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH10`" ]
pub struct AFRH10_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH9_A = AFRH15_A ; # [ doc = "Reader of field `AFRH9`" ]
pub type AFRH9_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH9`" ]
pub struct AFRH9_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH8_A = AFRH15_A ; # [ doc = "Reader of field `AFRH8`" ]
pub type AFRH8_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH8`" ]
pub struct AFRH8_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh15 ( & self ) -> AFRH15_R { AFRH15_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh14 ( & self ) -> AFRH14_R { AFRH14_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh13 ( & self ) -> AFRH13_R { AFRH13_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh12 ( & self ) -> AFRH12_R { AFRH12_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh11 ( & self ) -> AFRH11_R { AFRH11_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh10 ( & self ) -> AFRH10_R { AFRH10_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh9 ( & self ) -> AFRH9_R { AFRH9_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh8 ( & self ) -> AFRH8_R { AFRH8_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh15 ( & mut self ) -> AFRH15_W { AFRH15_W { w : self } } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh14 ( & mut self ) -> AFRH14_W { AFRH14_W { w : self } } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh13 ( & mut self ) -> AFRH13_W { AFRH13_W { w : self } } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh12 ( & mut self ) -> AFRH12_W { AFRH12_W { w : self } } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh11 ( & mut self ) -> AFRH11_W { AFRH11_W { w : self } } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh10 ( & mut self ) -> AFRH10_W { AFRH10_W { w : self } } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh9 ( & mut self ) -> AFRH9_W { AFRH9_W { w : self } } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh8 ( & mut self ) -> AFRH8_W { AFRH8_W { w : self } } } } # [ doc = "Port bit reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [brr](brr) module" ]
pub type BRR = crate :: Reg < u32 , _BRR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BRR ; # [ doc = "`write(|w| ..)` method takes [brr::W](brr::W) writer structure" ]
impl crate :: Writable for BRR { } # [ doc = "Port bit reset register" ]
pub mod brr { # [ doc = "Writer for register BRR" ]
pub type W = crate :: W < u32 , super :: BRR > ; # [ doc = "Register BRR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BRR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x Reset bit y\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR0_AW { # [ doc = "0: No action on the corresponding ODx bit" ]
NOACTION = 0 , # [ doc = "1: Reset the ODx bit" ]
RESET = 1 } impl From < BR0_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR0_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR0`" ]
pub struct BR0_W < 'a > { w : & 'a mut W , } impl < 'a > BR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR1_AW = BR0_AW ; # [ doc = "Write proxy for field `BR1`" ]
pub struct BR1_W < 'a > { w : & 'a mut W , } impl < 'a > BR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR2_AW = BR0_AW ; # [ doc = "Write proxy for field `BR2`" ]
pub struct BR2_W < 'a > { w : & 'a mut W , } impl < 'a > BR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR3_AW = BR0_AW ; # [ doc = "Write proxy for field `BR3`" ]
pub struct BR3_W < 'a > { w : & 'a mut W , } impl < 'a > BR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR4_AW = BR0_AW ; # [ doc = "Write proxy for field `BR4`" ]
pub struct BR4_W < 'a > { w : & 'a mut W , } impl < 'a > BR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR5_AW = BR0_AW ; # [ doc = "Write proxy for field `BR5`" ]
pub struct BR5_W < 'a > { w : & 'a mut W , } impl < 'a > BR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR6_AW = BR0_AW ; # [ doc = "Write proxy for field `BR6`" ]
pub struct BR6_W < 'a > { w : & 'a mut W , } impl < 'a > BR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR7_AW = BR0_AW ; # [ doc = "Write proxy for field `BR7`" ]
pub struct BR7_W < 'a > { w : & 'a mut W , } impl < 'a > BR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR8_AW = BR0_AW ; # [ doc = "Write proxy for field `BR8`" ]
pub struct BR8_W < 'a > { w : & 'a mut W , } impl < 'a > BR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR9_AW = BR0_AW ; # [ doc = "Write proxy for field `BR9`" ]
pub struct BR9_W < 'a > { w : & 'a mut W , } impl < 'a > BR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x Reset bit y\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR10_AW { # [ doc = "0: No action on the corresponding ODx bit" ]
NOACTION = 0 , # [ doc = "1: Reset the ODx bit" ]
RESET = 1 } impl From < BR10_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR10_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR10`" ]
pub struct BR10_W < 'a > { w : & 'a mut W , } impl < 'a > BR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR11_AW = BR10_AW ; # [ doc = "Write proxy for field `BR11`" ]
pub struct BR11_W < 'a > { w : & 'a mut W , } impl < 'a > BR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR12_AW = BR10_AW ; # [ doc = "Write proxy for field `BR12`" ]
pub struct BR12_W < 'a > { w : & 'a mut W , } impl < 'a > BR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR13_AW = BR10_AW ; # [ doc = "Write proxy for field `BR13`" ]
pub struct BR13_W < 'a > { w : & 'a mut W , } impl < 'a > BR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR14_AW = BR10_AW ; # [ doc = "Write proxy for field `BR14`" ]
pub struct BR14_W < 'a > { w : & 'a mut W , } impl < 'a > BR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR15_AW = BR10_AW ; # [ doc = "Write proxy for field `BR15`" ]
pub struct BR15_W < 'a > { w : & 'a mut W , } impl < 'a > BR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl W { # [ doc = "Bit 0 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br0 ( & mut self ) -> BR0_W { BR0_W { w : self } } # [ doc = "Bit 1 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br1 ( & mut self ) -> BR1_W { BR1_W { w : self } } # [ doc = "Bit 2 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br2 ( & mut self ) -> BR2_W { BR2_W { w : self } } # [ doc = "Bit 3 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br3 ( & mut self ) -> BR3_W { BR3_W { w : self } } # [ doc = "Bit 4 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br4 ( & mut self ) -> BR4_W { BR4_W { w : self } } # [ doc = "Bit 5 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br5 ( & mut self ) -> BR5_W { BR5_W { w : self } } # [ doc = "Bit 6 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br6 ( & mut self ) -> BR6_W { BR6_W { w : self } } # [ doc = "Bit 7 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br7 ( & mut self ) -> BR7_W { BR7_W { w : self } } # [ doc = "Bit 8 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br8 ( & mut self ) -> BR8_W { BR8_W { w : self } } # [ doc = "Bit 9 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br9 ( & mut self ) -> BR9_W { BR9_W { w : self } } # [ doc = "Bit 10 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br10 ( & mut self ) -> BR10_W { BR10_W { w : self } } # [ doc = "Bit 11 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br11 ( & mut self ) -> BR11_W { BR11_W { w : self } } # [ doc = "Bit 12 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br12 ( & mut self ) -> BR12_W { BR12_W { w : self } } # [ doc = "Bit 13 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br13 ( & mut self ) -> BR13_W { BR13_W { w : self } } # [ doc = "Bit 14 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br14 ( & mut self ) -> BR14_W { BR14_W { w : self } } # [ doc = "Bit 15 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br15 ( & mut self ) -> BR15_W { BR15_W { w : self } } } } } # [ doc = "General-purpose I/Os" ]
pub struct GPIOH { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOH { } impl GPIOH { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpioc :: RegisterBlock { 0x4800_1c00 as * const _ } } impl Deref for GPIOH { type Target = gpioc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOH :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub struct GPIOB { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOB { } impl GPIOB { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpiob :: RegisterBlock { 0x4800_0400 as * const _ } } impl Deref for GPIOB { type Target = gpiob :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOB :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub mod gpiob { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - GPIO port mode register" ]
pub moder : MODER , # [ doc = "0x04 - GPIO port output type register" ]
pub otyper : OTYPER , # [ doc = "0x08 - GPIO port output speed register" ]
pub ospeedr : OSPEEDR , # [ doc = "0x0c - GPIO port pull-up/pull-down register" ]
pub pupdr : PUPDR , # [ doc = "0x10 - GPIO port input data register" ]
pub idr : IDR , # [ doc = "0x14 - GPIO port output data register" ]
pub odr : ODR , # [ doc = "0x18 - GPIO port bit set/reset register" ]
pub bsrr : BSRR , # [ doc = "0x1c - GPIO port configuration lock register" ]
pub lckr : LCKR , # [ doc = "0x20 - GPIO alternate function low register" ]
pub afrl : AFRL , # [ doc = "0x24 - GPIO alternate function high register" ]
pub afrh : AFRH , # [ doc = "0x28 - Port bit reset register" ]
pub brr : BRR , } # [ doc = "GPIO port mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [moder](moder) module" ]
pub type MODER = crate :: Reg < u32 , _MODER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _MODER ; # [ doc = "`read()` method returns [moder::R](moder::R) reader structure" ]
impl crate :: Readable for MODER { } # [ doc = "`write(|w| ..)` method takes [moder::W](moder::W) writer structure" ]
impl crate :: Writable for MODER { } # [ doc = "GPIO port mode register" ]
pub mod moder { # [ doc = "Reader of register MODER" ]
pub type R = crate :: R < u32 , super :: MODER > ; # [ doc = "Writer for register MODER" ]
pub type W = crate :: W < u32 , super :: MODER > ; # [ doc = "Register MODER `reset()`'s with value 0x0280" ]
impl crate :: ResetValue for super :: MODER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0280 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MODER15_A { # [ doc = "0: Input mode (reset state)" ]
INPUT = 0 , # [ doc = "1: General purpose output mode" ]
OUTPUT = 1 , # [ doc = "2: Alternate function mode" ]
ALTERNATE = 2 , # [ doc = "3: Analog mode" ]
ANALOG = 3 } impl From < MODER15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MODER15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MODER15`" ]
pub type MODER15_R = crate :: R < u8 , MODER15_A > ; impl MODER15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MODER15_A { match self . bits { 0 => MODER15_A :: INPUT , 1 => MODER15_A :: OUTPUT , 2 => MODER15_A :: ALTERNATE , 3 => MODER15_A :: ANALOG , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `INPUT`" ]
# [ inline ( always ) ]
pub fn is_input ( & self ) -> bool { * self == MODER15_A :: INPUT } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == MODER15_A :: OUTPUT } # [ doc = "Checks if the value of the field is `ALTERNATE`" ]
# [ inline ( always ) ]
pub fn is_alternate ( & self ) -> bool { * self == MODER15_A :: ALTERNATE } # [ doc = "Checks if the value of the field is `ANALOG`" ]
# [ inline ( always ) ]
pub fn is_analog ( & self ) -> bool { * self == MODER15_A :: ANALOG } } # [ doc = "Write proxy for field `MODER15`" ]
pub struct MODER15_W < 'a > { w : & 'a mut W , } impl < 'a > MODER15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER14_A = MODER15_A ; # [ doc = "Reader of field `MODER14`" ]
pub type MODER14_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER14`" ]
pub struct MODER14_W < 'a > { w : & 'a mut W , } impl < 'a > MODER14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER13_A = MODER15_A ; # [ doc = "Reader of field `MODER13`" ]
pub type MODER13_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER13`" ]
pub struct MODER13_W < 'a > { w : & 'a mut W , } impl < 'a > MODER13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER12_A = MODER15_A ; # [ doc = "Reader of field `MODER12`" ]
pub type MODER12_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER12`" ]
pub struct MODER12_W < 'a > { w : & 'a mut W , } impl < 'a > MODER12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER11_A = MODER15_A ; # [ doc = "Reader of field `MODER11`" ]
pub type MODER11_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER11`" ]
pub struct MODER11_W < 'a > { w : & 'a mut W , } impl < 'a > MODER11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER10_A = MODER15_A ; # [ doc = "Reader of field `MODER10`" ]
pub type MODER10_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER10`" ]
pub struct MODER10_W < 'a > { w : & 'a mut W , } impl < 'a > MODER10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER9_A = MODER15_A ; # [ doc = "Reader of field `MODER9`" ]
pub type MODER9_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER9`" ]
pub struct MODER9_W < 'a > { w : & 'a mut W , } impl < 'a > MODER9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER8_A = MODER15_A ; # [ doc = "Reader of field `MODER8`" ]
pub type MODER8_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER8`" ]
pub struct MODER8_W < 'a > { w : & 'a mut W , } impl < 'a > MODER8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER7_A = MODER15_A ; # [ doc = "Reader of field `MODER7`" ]
pub type MODER7_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER7`" ]
pub struct MODER7_W < 'a > { w : & 'a mut W , } impl < 'a > MODER7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER6_A = MODER15_A ; # [ doc = "Reader of field `MODER6`" ]
pub type MODER6_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER6`" ]
pub struct MODER6_W < 'a > { w : & 'a mut W , } impl < 'a > MODER6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER5_A = MODER15_A ; # [ doc = "Reader of field `MODER5`" ]
pub type MODER5_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER5`" ]
pub struct MODER5_W < 'a > { w : & 'a mut W , } impl < 'a > MODER5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER4_A = MODER15_A ; # [ doc = "Reader of field `MODER4`" ]
pub type MODER4_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER4`" ]
pub struct MODER4_W < 'a > { w : & 'a mut W , } impl < 'a > MODER4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER3_A = MODER15_A ; # [ doc = "Reader of field `MODER3`" ]
pub type MODER3_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER3`" ]
pub struct MODER3_W < 'a > { w : & 'a mut W , } impl < 'a > MODER3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER2_A = MODER15_A ; # [ doc = "Reader of field `MODER2`" ]
pub type MODER2_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER2`" ]
pub struct MODER2_W < 'a > { w : & 'a mut W , } impl < 'a > MODER2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER1_A = MODER15_A ; # [ doc = "Reader of field `MODER1`" ]
pub type MODER1_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER1`" ]
pub struct MODER1_W < 'a > { w : & 'a mut W , } impl < 'a > MODER1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER0_A = MODER15_A ; # [ doc = "Reader of field `MODER0`" ]
pub type MODER0_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER0`" ]
pub struct MODER0_W < 'a > { w : & 'a mut W , } impl < 'a > MODER0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder15 ( & self ) -> MODER15_R { MODER15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder14 ( & self ) -> MODER14_R { MODER14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder13 ( & self ) -> MODER13_R { MODER13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder12 ( & self ) -> MODER12_R { MODER12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder11 ( & self ) -> MODER11_R { MODER11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder10 ( & self ) -> MODER10_R { MODER10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder9 ( & self ) -> MODER9_R { MODER9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder8 ( & self ) -> MODER8_R { MODER8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder7 ( & self ) -> MODER7_R { MODER7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder6 ( & self ) -> MODER6_R { MODER6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder5 ( & self ) -> MODER5_R { MODER5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder4 ( & self ) -> MODER4_R { MODER4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder3 ( & self ) -> MODER3_R { MODER3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder2 ( & self ) -> MODER2_R { MODER2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder1 ( & self ) -> MODER1_R { MODER1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder0 ( & self ) -> MODER0_R { MODER0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder15 ( & mut self ) -> MODER15_W { MODER15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder14 ( & mut self ) -> MODER14_W { MODER14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder13 ( & mut self ) -> MODER13_W { MODER13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder12 ( & mut self ) -> MODER12_W { MODER12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder11 ( & mut self ) -> MODER11_W { MODER11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder10 ( & mut self ) -> MODER10_W { MODER10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder9 ( & mut self ) -> MODER9_W { MODER9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder8 ( & mut self ) -> MODER8_W { MODER8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder7 ( & mut self ) -> MODER7_W { MODER7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder6 ( & mut self ) -> MODER6_W { MODER6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder5 ( & mut self ) -> MODER5_W { MODER5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder4 ( & mut self ) -> MODER4_W { MODER4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder3 ( & mut self ) -> MODER3_W { MODER3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder2 ( & mut self ) -> MODER2_W { MODER2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder1 ( & mut self ) -> MODER1_W { MODER1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder0 ( & mut self ) -> MODER0_W { MODER0_W { w : self } } } } # [ doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [otyper](otyper) module" ]
pub type OTYPER = crate :: Reg < u32 , _OTYPER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OTYPER ; # [ doc = "`read()` method returns [otyper::R](otyper::R) reader structure" ]
impl crate :: Readable for OTYPER { } # [ doc = "`write(|w| ..)` method takes [otyper::W](otyper::W) writer structure" ]
impl crate :: Writable for OTYPER { } # [ doc = "GPIO port output type register" ]
pub mod otyper { # [ doc = "Reader of register OTYPER" ]
pub type R = crate :: R < u32 , super :: OTYPER > ; # [ doc = "Writer for register OTYPER" ]
pub type W = crate :: W < u32 , super :: OTYPER > ; # [ doc = "Register OTYPER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OTYPER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x configuration bit 15\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OT15_A { # [ doc = "0: Output push-pull (reset state)" ]
PUSHPULL = 0 , # [ doc = "1: Output open-drain" ]
OPENDRAIN = 1 } impl From < OT15_A > for bool { # [ inline ( always ) ]
fn from ( variant : OT15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OT15`" ]
pub type OT15_R = crate :: R < bool , OT15_A > ; impl OT15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OT15_A { match self . bits { false => OT15_A :: PUSHPULL , true => OT15_A :: OPENDRAIN } } # [ doc = "Checks if the value of the field is `PUSHPULL`" ]
# [ inline ( always ) ]
pub fn is_push_pull ( & self ) -> bool { * self == OT15_A :: PUSHPULL } # [ doc = "Checks if the value of the field is `OPENDRAIN`" ]
# [ inline ( always ) ]
pub fn is_open_drain ( & self ) -> bool { * self == OT15_A :: OPENDRAIN } } # [ doc = "Write proxy for field `OT15`" ]
pub struct OT15_W < 'a > { w : & 'a mut W , } impl < 'a > OT15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x configuration bit 14" ]
pub type OT14_A = OT15_A ; # [ doc = "Reader of field `OT14`" ]
pub type OT14_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT14`" ]
pub struct OT14_W < 'a > { w : & 'a mut W , } impl < 'a > OT14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bit 13" ]
pub type OT13_A = OT15_A ; # [ doc = "Reader of field `OT13`" ]
pub type OT13_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT13`" ]
pub struct OT13_W < 'a > { w : & 'a mut W , } impl < 'a > OT13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x configuration bit 12" ]
pub type OT12_A = OT15_A ; # [ doc = "Reader of field `OT12`" ]
pub type OT12_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT12`" ]
pub struct OT12_W < 'a > { w : & 'a mut W , } impl < 'a > OT12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bit 11" ]
pub type OT11_A = OT15_A ; # [ doc = "Reader of field `OT11`" ]
pub type OT11_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT11`" ]
pub struct OT11_W < 'a > { w : & 'a mut W , } impl < 'a > OT11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x configuration bit 10" ]
pub type OT10_A = OT15_A ; # [ doc = "Reader of field `OT10`" ]
pub type OT10_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT10`" ]
pub struct OT10_W < 'a > { w : & 'a mut W , } impl < 'a > OT10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bit 9" ]
pub type OT9_A = OT15_A ; # [ doc = "Reader of field `OT9`" ]
pub type OT9_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT9`" ]
pub struct OT9_W < 'a > { w : & 'a mut W , } impl < 'a > OT9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x configuration bit 8" ]
pub type OT8_A = OT15_A ; # [ doc = "Reader of field `OT8`" ]
pub type OT8_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT8`" ]
pub struct OT8_W < 'a > { w : & 'a mut W , } impl < 'a > OT8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bit 7" ]
pub type OT7_A = OT15_A ; # [ doc = "Reader of field `OT7`" ]
pub type OT7_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT7`" ]
pub struct OT7_W < 'a > { w : & 'a mut W , } impl < 'a > OT7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x configuration bit 6" ]
pub type OT6_A = OT15_A ; # [ doc = "Reader of field `OT6`" ]
pub type OT6_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT6`" ]
pub struct OT6_W < 'a > { w : & 'a mut W , } impl < 'a > OT6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bit 5" ]
pub type OT5_A = OT15_A ; # [ doc = "Reader of field `OT5`" ]
pub type OT5_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT5`" ]
pub struct OT5_W < 'a > { w : & 'a mut W , } impl < 'a > OT5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x configuration bit 4" ]
pub type OT4_A = OT15_A ; # [ doc = "Reader of field `OT4`" ]
pub type OT4_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT4`" ]
pub struct OT4_W < 'a > { w : & 'a mut W , } impl < 'a > OT4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bit 3" ]
pub type OT3_A = OT15_A ; # [ doc = "Reader of field `OT3`" ]
pub type OT3_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT3`" ]
pub struct OT3_W < 'a > { w : & 'a mut W , } impl < 'a > OT3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x configuration bit 2" ]
pub type OT2_A = OT15_A ; # [ doc = "Reader of field `OT2`" ]
pub type OT2_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT2`" ]
pub struct OT2_W < 'a > { w : & 'a mut W , } impl < 'a > OT2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bit 1" ]
pub type OT1_A = OT15_A ; # [ doc = "Reader of field `OT1`" ]
pub type OT1_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT1`" ]
pub struct OT1_W < 'a > { w : & 'a mut W , } impl < 'a > OT1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x configuration bit 0" ]
pub type OT0_A = OT15_A ; # [ doc = "Reader of field `OT0`" ]
pub type OT0_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT0`" ]
pub struct OT0_W < 'a > { w : & 'a mut W , } impl < 'a > OT0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 15 - Port x configuration bit 15" ]
# [ inline ( always ) ]
pub fn ot15 ( & self ) -> OT15_R { OT15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port x configuration bit 14" ]
# [ inline ( always ) ]
pub fn ot14 ( & self ) -> OT14_R { OT14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port x configuration bit 13" ]
# [ inline ( always ) ]
pub fn ot13 ( & self ) -> OT13_R { OT13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port x configuration bit 12" ]
# [ inline ( always ) ]
pub fn ot12 ( & self ) -> OT12_R { OT12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port x configuration bit 11" ]
# [ inline ( always ) ]
pub fn ot11 ( & self ) -> OT11_R { OT11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port x configuration bit 10" ]
# [ inline ( always ) ]
pub fn ot10 ( & self ) -> OT10_R { OT10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port x configuration bit 9" ]
# [ inline ( always ) ]
pub fn ot9 ( & self ) -> OT9_R { OT9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port x configuration bit 8" ]
# [ inline ( always ) ]
pub fn ot8 ( & self ) -> OT8_R { OT8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port x configuration bit 7" ]
# [ inline ( always ) ]
pub fn ot7 ( & self ) -> OT7_R { OT7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port x configuration bit 6" ]
# [ inline ( always ) ]
pub fn ot6 ( & self ) -> OT6_R { OT6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port x configuration bit 5" ]
# [ inline ( always ) ]
pub fn ot5 ( & self ) -> OT5_R { OT5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port x configuration bit 4" ]
# [ inline ( always ) ]
pub fn ot4 ( & self ) -> OT4_R { OT4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port x configuration bit 3" ]
# [ inline ( always ) ]
pub fn ot3 ( & self ) -> OT3_R { OT3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port x configuration bit 2" ]
# [ inline ( always ) ]
pub fn ot2 ( & self ) -> OT2_R { OT2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port x configuration bit 1" ]
# [ inline ( always ) ]
pub fn ot1 ( & self ) -> OT1_R { OT1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port x configuration bit 0" ]
# [ inline ( always ) ]
pub fn ot0 ( & self ) -> OT0_R { OT0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Port x configuration bit 15" ]
# [ inline ( always ) ]
pub fn ot15 ( & mut self ) -> OT15_W { OT15_W { w : self } } # [ doc = "Bit 14 - Port x configuration bit 14" ]
# [ inline ( always ) ]
pub fn ot14 ( & mut self ) -> OT14_W { OT14_W { w : self } } # [ doc = "Bit 13 - Port x configuration bit 13" ]
# [ inline ( always ) ]
pub fn ot13 ( & mut self ) -> OT13_W { OT13_W { w : self } } # [ doc = "Bit 12 - Port x configuration bit 12" ]
# [ inline ( always ) ]
pub fn ot12 ( & mut self ) -> OT12_W { OT12_W { w : self } } # [ doc = "Bit 11 - Port x configuration bit 11" ]
# [ inline ( always ) ]
pub fn ot11 ( & mut self ) -> OT11_W { OT11_W { w : self } } # [ doc = "Bit 10 - Port x configuration bit 10" ]
# [ inline ( always ) ]
pub fn ot10 ( & mut self ) -> OT10_W { OT10_W { w : self } } # [ doc = "Bit 9 - Port x configuration bit 9" ]
# [ inline ( always ) ]
pub fn ot9 ( & mut self ) -> OT9_W { OT9_W { w : self } } # [ doc = "Bit 8 - Port x configuration bit 8" ]
# [ inline ( always ) ]
pub fn ot8 ( & mut self ) -> OT8_W { OT8_W { w : self } } # [ doc = "Bit 7 - Port x configuration bit 7" ]
# [ inline ( always ) ]
pub fn ot7 ( & mut self ) -> OT7_W { OT7_W { w : self } } # [ doc = "Bit 6 - Port x configuration bit 6" ]
# [ inline ( always ) ]
pub fn ot6 ( & mut self ) -> OT6_W { OT6_W { w : self } } # [ doc = "Bit 5 - Port x configuration bit 5" ]
# [ inline ( always ) ]
pub fn ot5 ( & mut self ) -> OT5_W { OT5_W { w : self } } # [ doc = "Bit 4 - Port x configuration bit 4" ]
# [ inline ( always ) ]
pub fn ot4 ( & mut self ) -> OT4_W { OT4_W { w : self } } # [ doc = "Bit 3 - Port x configuration bit 3" ]
# [ inline ( always ) ]
pub fn ot3 ( & mut self ) -> OT3_W { OT3_W { w : self } } # [ doc = "Bit 2 - Port x configuration bit 2" ]
# [ inline ( always ) ]
pub fn ot2 ( & mut self ) -> OT2_W { OT2_W { w : self } } # [ doc = "Bit 1 - Port x configuration bit 1" ]
# [ inline ( always ) ]
pub fn ot1 ( & mut self ) -> OT1_W { OT1_W { w : self } } # [ doc = "Bit 0 - Port x configuration bit 0" ]
# [ inline ( always ) ]
pub fn ot0 ( & mut self ) -> OT0_W { OT0_W { w : self } } } } # [ doc = "GPIO port output speed register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospeedr](ospeedr) module" ]
pub type OSPEEDR = crate :: Reg < u32 , _OSPEEDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OSPEEDR ; # [ doc = "`read()` method returns [ospeedr::R](ospeedr::R) reader structure" ]
impl crate :: Readable for OSPEEDR { } # [ doc = "`write(|w| ..)` method takes [ospeedr::W](ospeedr::W) writer structure" ]
impl crate :: Writable for OSPEEDR { } # [ doc = "GPIO port output speed register" ]
pub mod ospeedr { # [ doc = "Reader of register OSPEEDR" ]
pub type R = crate :: R < u32 , super :: OSPEEDR > ; # [ doc = "Writer for register OSPEEDR" ]
pub type W = crate :: W < u32 , super :: OSPEEDR > ; # [ doc = "Register OSPEEDR `reset()`'s with value 0xc0" ]
impl crate :: ResetValue for super :: OSPEEDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xc0 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OSPEEDR15_A { # [ doc = "0: Low speed" ]
LOWSPEED = 0 , # [ doc = "1: Medium speed" ]
MEDIUMSPEED = 1 , # [ doc = "2: High speed" ]
HIGHSPEED = 2 , # [ doc = "3: Very high speed" ]
VERYHIGHSPEED = 3 } impl From < OSPEEDR15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OSPEEDR15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OSPEEDR15`" ]
pub type OSPEEDR15_R = crate :: R < u8 , OSPEEDR15_A > ; impl OSPEEDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OSPEEDR15_A { match self . bits { 0 => OSPEEDR15_A :: LOWSPEED , 1 => OSPEEDR15_A :: MEDIUMSPEED , 2 => OSPEEDR15_A :: HIGHSPEED , 3 => OSPEEDR15_A :: VERYHIGHSPEED , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `LOWSPEED`" ]
# [ inline ( always ) ]
pub fn is_low_speed ( & self ) -> bool { * self == OSPEEDR15_A :: LOWSPEED } # [ doc = "Checks if the value of the field is `MEDIUMSPEED`" ]
# [ inline ( always ) ]
pub fn is_medium_speed ( & self ) -> bool { * self == OSPEEDR15_A :: MEDIUMSPEED } # [ doc = "Checks if the value of the field is `HIGHSPEED`" ]
# [ inline ( always ) ]
pub fn is_high_speed ( & self ) -> bool { * self == OSPEEDR15_A :: HIGHSPEED } # [ doc = "Checks if the value of the field is `VERYHIGHSPEED`" ]
# [ inline ( always ) ]
pub fn is_very_high_speed ( & self ) -> bool { * self == OSPEEDR15_A :: VERYHIGHSPEED } } # [ doc = "Write proxy for field `OSPEEDR15`" ]
pub struct OSPEEDR15_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR14_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR14`" ]
pub type OSPEEDR14_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR14`" ]
pub struct OSPEEDR14_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR13_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR13`" ]
pub type OSPEEDR13_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR13`" ]
pub struct OSPEEDR13_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR12_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR12`" ]
pub type OSPEEDR12_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR12`" ]
pub struct OSPEEDR12_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR11_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR11`" ]
pub type OSPEEDR11_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR11`" ]
pub struct OSPEEDR11_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR10_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR10`" ]
pub type OSPEEDR10_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR10`" ]
pub struct OSPEEDR10_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR9_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR9`" ]
pub type OSPEEDR9_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR9`" ]
pub struct OSPEEDR9_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR8_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR8`" ]
pub type OSPEEDR8_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR8`" ]
pub struct OSPEEDR8_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR7_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR7`" ]
pub type OSPEEDR7_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR7`" ]
pub struct OSPEEDR7_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR6_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR6`" ]
pub type OSPEEDR6_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR6`" ]
pub struct OSPEEDR6_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR5_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR5`" ]
pub type OSPEEDR5_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR5`" ]
pub struct OSPEEDR5_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR4_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR4`" ]
pub type OSPEEDR4_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR4`" ]
pub struct OSPEEDR4_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR3_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR3`" ]
pub type OSPEEDR3_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR3`" ]
pub struct OSPEEDR3_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR2_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR2`" ]
pub type OSPEEDR2_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR2`" ]
pub struct OSPEEDR2_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR1_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR1`" ]
pub type OSPEEDR1_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR1`" ]
pub struct OSPEEDR1_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR0_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR0`" ]
pub type OSPEEDR0_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR0`" ]
pub struct OSPEEDR0_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr15 ( & self ) -> OSPEEDR15_R { OSPEEDR15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr14 ( & self ) -> OSPEEDR14_R { OSPEEDR14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr13 ( & self ) -> OSPEEDR13_R { OSPEEDR13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr12 ( & self ) -> OSPEEDR12_R { OSPEEDR12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr11 ( & self ) -> OSPEEDR11_R { OSPEEDR11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr10 ( & self ) -> OSPEEDR10_R { OSPEEDR10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr9 ( & self ) -> OSPEEDR9_R { OSPEEDR9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr8 ( & self ) -> OSPEEDR8_R { OSPEEDR8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr7 ( & self ) -> OSPEEDR7_R { OSPEEDR7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr6 ( & self ) -> OSPEEDR6_R { OSPEEDR6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr5 ( & self ) -> OSPEEDR5_R { OSPEEDR5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr4 ( & self ) -> OSPEEDR4_R { OSPEEDR4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr3 ( & self ) -> OSPEEDR3_R { OSPEEDR3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr2 ( & self ) -> OSPEEDR2_R { OSPEEDR2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr1 ( & self ) -> OSPEEDR1_R { OSPEEDR1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr0 ( & self ) -> OSPEEDR0_R { OSPEEDR0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr15 ( & mut self ) -> OSPEEDR15_W { OSPEEDR15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr14 ( & mut self ) -> OSPEEDR14_W { OSPEEDR14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr13 ( & mut self ) -> OSPEEDR13_W { OSPEEDR13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr12 ( & mut self ) -> OSPEEDR12_W { OSPEEDR12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr11 ( & mut self ) -> OSPEEDR11_W { OSPEEDR11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr10 ( & mut self ) -> OSPEEDR10_W { OSPEEDR10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr9 ( & mut self ) -> OSPEEDR9_W { OSPEEDR9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr8 ( & mut self ) -> OSPEEDR8_W { OSPEEDR8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr7 ( & mut self ) -> OSPEEDR7_W { OSPEEDR7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr6 ( & mut self ) -> OSPEEDR6_W { OSPEEDR6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr5 ( & mut self ) -> OSPEEDR5_W { OSPEEDR5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr4 ( & mut self ) -> OSPEEDR4_W { OSPEEDR4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr3 ( & mut self ) -> OSPEEDR3_W { OSPEEDR3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr2 ( & mut self ) -> OSPEEDR2_W { OSPEEDR2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr1 ( & mut self ) -> OSPEEDR1_W { OSPEEDR1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr0 ( & mut self ) -> OSPEEDR0_W { OSPEEDR0_W { w : self } } } } # [ doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pupdr](pupdr) module" ]
pub type PUPDR = crate :: Reg < u32 , _PUPDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PUPDR ; # [ doc = "`read()` method returns [pupdr::R](pupdr::R) reader structure" ]
impl crate :: Readable for PUPDR { } # [ doc = "`write(|w| ..)` method takes [pupdr::W](pupdr::W) writer structure" ]
impl crate :: Writable for PUPDR { } # [ doc = "GPIO port pull-up/pull-down register" ]
pub mod pupdr { # [ doc = "Reader of register PUPDR" ]
pub type R = crate :: R < u32 , super :: PUPDR > ; # [ doc = "Writer for register PUPDR" ]
pub type W = crate :: W < u32 , super :: PUPDR > ; # [ doc = "Register PUPDR `reset()`'s with value 0x0100" ]
impl crate :: ResetValue for super :: PUPDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0100 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PUPDR15_A { # [ doc = "0: No pull-up, pull-down" ]
FLOATING = 0 , # [ doc = "1: Pull-up" ]
PULLUP = 1 , # [ doc = "2: Pull-down" ]
PULLDOWN = 2 } impl From < PUPDR15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PUPDR15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PUPDR15`" ]
pub type PUPDR15_R = crate :: R < u8 , PUPDR15_A > ; impl PUPDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , PUPDR15_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( PUPDR15_A :: FLOATING ) , 1 => Val ( PUPDR15_A :: PULLUP ) , 2 => Val ( PUPDR15_A :: PULLDOWN ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `FLOATING`" ]
# [ inline ( always ) ]
pub fn is_floating ( & self ) -> bool { * self == PUPDR15_A :: FLOATING } # [ doc = "Checks if the value of the field is `PULLUP`" ]
# [ inline ( always ) ]
pub fn is_pull_up ( & self ) -> bool { * self == PUPDR15_A :: PULLUP } # [ doc = "Checks if the value of the field is `PULLDOWN`" ]
# [ inline ( always ) ]
pub fn is_pull_down ( & self ) -> bool { * self == PUPDR15_A :: PULLDOWN } } # [ doc = "Write proxy for field `PUPDR15`" ]
pub struct PUPDR15_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR15_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR14_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR14`" ]
pub type PUPDR14_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR14`" ]
pub struct PUPDR14_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR14_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR13_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR13`" ]
pub type PUPDR13_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR13`" ]
pub struct PUPDR13_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR13_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR12_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR12`" ]
pub type PUPDR12_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR12`" ]
pub struct PUPDR12_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR12_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR11_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR11`" ]
pub type PUPDR11_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR11`" ]
pub struct PUPDR11_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR11_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR10_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR10`" ]
pub type PUPDR10_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR10`" ]
pub struct PUPDR10_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR10_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR9_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR9`" ]
pub type PUPDR9_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR9`" ]
pub struct PUPDR9_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR9_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR8_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR8`" ]
pub type PUPDR8_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR8`" ]
pub struct PUPDR8_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR8_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR7_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR7`" ]
pub type PUPDR7_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR7`" ]
pub struct PUPDR7_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR7_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR6_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR6`" ]
pub type PUPDR6_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR6`" ]
pub struct PUPDR6_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR6_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR5_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR5`" ]
pub type PUPDR5_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR5`" ]
pub struct PUPDR5_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR5_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR4_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR4`" ]
pub type PUPDR4_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR4`" ]
pub struct PUPDR4_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR4_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR3_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR3`" ]
pub type PUPDR3_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR3`" ]
pub struct PUPDR3_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR3_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR2_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR2`" ]
pub type PUPDR2_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR2`" ]
pub struct PUPDR2_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR2_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR1_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR1`" ]
pub type PUPDR1_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR1`" ]
pub struct PUPDR1_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR1_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR0_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR0`" ]
pub type PUPDR0_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR0`" ]
pub struct PUPDR0_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR0_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr15 ( & self ) -> PUPDR15_R { PUPDR15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr14 ( & self ) -> PUPDR14_R { PUPDR14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr13 ( & self ) -> PUPDR13_R { PUPDR13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr12 ( & self ) -> PUPDR12_R { PUPDR12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr11 ( & self ) -> PUPDR11_R { PUPDR11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr10 ( & self ) -> PUPDR10_R { PUPDR10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr9 ( & self ) -> PUPDR9_R { PUPDR9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr8 ( & self ) -> PUPDR8_R { PUPDR8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr7 ( & self ) -> PUPDR7_R { PUPDR7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr6 ( & self ) -> PUPDR6_R { PUPDR6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr5 ( & self ) -> PUPDR5_R { PUPDR5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr4 ( & self ) -> PUPDR4_R { PUPDR4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr3 ( & self ) -> PUPDR3_R { PUPDR3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr2 ( & self ) -> PUPDR2_R { PUPDR2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr1 ( & self ) -> PUPDR1_R { PUPDR1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr0 ( & self ) -> PUPDR0_R { PUPDR0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr15 ( & mut self ) -> PUPDR15_W { PUPDR15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr14 ( & mut self ) -> PUPDR14_W { PUPDR14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr13 ( & mut self ) -> PUPDR13_W { PUPDR13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr12 ( & mut self ) -> PUPDR12_W { PUPDR12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr11 ( & mut self ) -> PUPDR11_W { PUPDR11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr10 ( & mut self ) -> PUPDR10_W { PUPDR10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr9 ( & mut self ) -> PUPDR9_W { PUPDR9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr8 ( & mut self ) -> PUPDR8_W { PUPDR8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr7 ( & mut self ) -> PUPDR7_W { PUPDR7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr6 ( & mut self ) -> PUPDR6_W { PUPDR6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr5 ( & mut self ) -> PUPDR5_W { PUPDR5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr4 ( & mut self ) -> PUPDR4_W { PUPDR4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr3 ( & mut self ) -> PUPDR3_W { PUPDR3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr2 ( & mut self ) -> PUPDR2_W { PUPDR2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr1 ( & mut self ) -> PUPDR1_W { PUPDR1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr0 ( & mut self ) -> PUPDR0_W { PUPDR0_W { w : self } } } } # [ doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](idr) module" ]
pub type IDR = crate :: Reg < u32 , _IDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IDR ; # [ doc = "`read()` method returns [idr::R](idr::R) reader structure" ]
impl crate :: Readable for IDR { } # [ doc = "GPIO port input data register" ]
pub mod idr { # [ doc = "Reader of register IDR" ]
pub type R = crate :: R < u32 , super :: IDR > ; # [ doc = "Port input data (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IDR15_A { # [ doc = "1: Input is logic high" ]
HIGH = 1 , # [ doc = "0: Input is logic low" ]
LOW = 0 } impl From < IDR15_A > for bool { # [ inline ( always ) ]
fn from ( variant : IDR15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IDR15`" ]
pub type IDR15_R = crate :: R < bool , IDR15_A > ; impl IDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IDR15_A { match self . bits { true => IDR15_A :: HIGH , false => IDR15_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == IDR15_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == IDR15_A :: LOW } } # [ doc = "Port input data (y = 0..15)" ]
pub type IDR14_A = IDR15_A ; # [ doc = "Reader of field `IDR14`" ]
pub type IDR14_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR13_A = IDR15_A ; # [ doc = "Reader of field `IDR13`" ]
pub type IDR13_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR12_A = IDR15_A ; # [ doc = "Reader of field `IDR12`" ]
pub type IDR12_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR11_A = IDR15_A ; # [ doc = "Reader of field `IDR11`" ]
pub type IDR11_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR10_A = IDR15_A ; # [ doc = "Reader of field `IDR10`" ]
pub type IDR10_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR9_A = IDR15_A ; # [ doc = "Reader of field `IDR9`" ]
pub type IDR9_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR8_A = IDR15_A ; # [ doc = "Reader of field `IDR8`" ]
pub type IDR8_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR7_A = IDR15_A ; # [ doc = "Reader of field `IDR7`" ]
pub type IDR7_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR6_A = IDR15_A ; # [ doc = "Reader of field `IDR6`" ]
pub type IDR6_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR5_A = IDR15_A ; # [ doc = "Reader of field `IDR5`" ]
pub type IDR5_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR4_A = IDR15_A ; # [ doc = "Reader of field `IDR4`" ]
pub type IDR4_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR3_A = IDR15_A ; # [ doc = "Reader of field `IDR3`" ]
pub type IDR3_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR2_A = IDR15_A ; # [ doc = "Reader of field `IDR2`" ]
pub type IDR2_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR1_A = IDR15_A ; # [ doc = "Reader of field `IDR1`" ]
pub type IDR1_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR0_A = IDR15_A ; # [ doc = "Reader of field `IDR0`" ]
pub type IDR0_R = crate :: R < bool , IDR15_A > ; impl R { # [ doc = "Bit 15 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr15 ( & self ) -> IDR15_R { IDR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr14 ( & self ) -> IDR14_R { IDR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr13 ( & self ) -> IDR13_R { IDR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr12 ( & self ) -> IDR12_R { IDR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr11 ( & self ) -> IDR11_R { IDR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr10 ( & self ) -> IDR10_R { IDR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr9 ( & self ) -> IDR9_R { IDR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr8 ( & self ) -> IDR8_R { IDR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr7 ( & self ) -> IDR7_R { IDR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr6 ( & self ) -> IDR6_R { IDR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr5 ( & self ) -> IDR5_R { IDR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr4 ( & self ) -> IDR4_R { IDR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr3 ( & self ) -> IDR3_R { IDR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr2 ( & self ) -> IDR2_R { IDR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr1 ( & self ) -> IDR1_R { IDR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr0 ( & self ) -> IDR0_R { IDR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } } # [ doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [odr](odr) module" ]
pub type ODR = crate :: Reg < u32 , _ODR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ODR ; # [ doc = "`read()` method returns [odr::R](odr::R) reader structure" ]
impl crate :: Readable for ODR { } # [ doc = "`write(|w| ..)` method takes [odr::W](odr::W) writer structure" ]
impl crate :: Writable for ODR { } # [ doc = "GPIO port output data register" ]
pub mod odr { # [ doc = "Reader of register ODR" ]
pub type R = crate :: R < u32 , super :: ODR > ; # [ doc = "Writer for register ODR" ]
pub type W = crate :: W < u32 , super :: ODR > ; # [ doc = "Register ODR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ODR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port output data (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ODR15_A { # [ doc = "1: Set output to logic high" ]
HIGH = 1 , # [ doc = "0: Set output to logic low" ]
LOW = 0 } impl From < ODR15_A > for bool { # [ inline ( always ) ]
fn from ( variant : ODR15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ODR15`" ]
pub type ODR15_R = crate :: R < bool , ODR15_A > ; impl ODR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ODR15_A { match self . bits { true => ODR15_A :: HIGH , false => ODR15_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == ODR15_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == ODR15_A :: LOW } } # [ doc = "Write proxy for field `ODR15`" ]
pub struct ODR15_W < 'a > { w : & 'a mut W , } impl < 'a > ODR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR14_A = ODR15_A ; # [ doc = "Reader of field `ODR14`" ]
pub type ODR14_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR14`" ]
pub struct ODR14_W < 'a > { w : & 'a mut W , } impl < 'a > ODR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR13_A = ODR15_A ; # [ doc = "Reader of field `ODR13`" ]
pub type ODR13_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR13`" ]
pub struct ODR13_W < 'a > { w : & 'a mut W , } impl < 'a > ODR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR12_A = ODR15_A ; # [ doc = "Reader of field `ODR12`" ]
pub type ODR12_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR12`" ]
pub struct ODR12_W < 'a > { w : & 'a mut W , } impl < 'a > ODR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR11_A = ODR15_A ; # [ doc = "Reader of field `ODR11`" ]
pub type ODR11_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR11`" ]
pub struct ODR11_W < 'a > { w : & 'a mut W , } impl < 'a > ODR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR10_A = ODR15_A ; # [ doc = "Reader of field `ODR10`" ]
pub type ODR10_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR10`" ]
pub struct ODR10_W < 'a > { w : & 'a mut W , } impl < 'a > ODR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR9_A = ODR15_A ; # [ doc = "Reader of field `ODR9`" ]
pub type ODR9_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR9`" ]
pub struct ODR9_W < 'a > { w : & 'a mut W , } impl < 'a > ODR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR8_A = ODR15_A ; # [ doc = "Reader of field `ODR8`" ]
pub type ODR8_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR8`" ]
pub struct ODR8_W < 'a > { w : & 'a mut W , } impl < 'a > ODR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR7_A = ODR15_A ; # [ doc = "Reader of field `ODR7`" ]
pub type ODR7_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR7`" ]
pub struct ODR7_W < 'a > { w : & 'a mut W , } impl < 'a > ODR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR6_A = ODR15_A ; # [ doc = "Reader of field `ODR6`" ]
pub type ODR6_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR6`" ]
pub struct ODR6_W < 'a > { w : & 'a mut W , } impl < 'a > ODR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR5_A = ODR15_A ; # [ doc = "Reader of field `ODR5`" ]
pub type ODR5_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR5`" ]
pub struct ODR5_W < 'a > { w : & 'a mut W , } impl < 'a > ODR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR4_A = ODR15_A ; # [ doc = "Reader of field `ODR4`" ]
pub type ODR4_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR4`" ]
pub struct ODR4_W < 'a > { w : & 'a mut W , } impl < 'a > ODR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR3_A = ODR15_A ; # [ doc = "Reader of field `ODR3`" ]
pub type ODR3_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR3`" ]
pub struct ODR3_W < 'a > { w : & 'a mut W , } impl < 'a > ODR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR2_A = ODR15_A ; # [ doc = "Reader of field `ODR2`" ]
pub type ODR2_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR2`" ]
pub struct ODR2_W < 'a > { w : & 'a mut W , } impl < 'a > ODR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR1_A = ODR15_A ; # [ doc = "Reader of field `ODR1`" ]
pub type ODR1_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR1`" ]
pub struct ODR1_W < 'a > { w : & 'a mut W , } impl < 'a > ODR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR0_A = ODR15_A ; # [ doc = "Reader of field `ODR0`" ]
pub type ODR0_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR0`" ]
pub struct ODR0_W < 'a > { w : & 'a mut W , } impl < 'a > ODR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 15 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr15 ( & self ) -> ODR15_R { ODR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr14 ( & self ) -> ODR14_R { ODR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr13 ( & self ) -> ODR13_R { ODR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr12 ( & self ) -> ODR12_R { ODR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr11 ( & self ) -> ODR11_R { ODR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr10 ( & self ) -> ODR10_R { ODR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr9 ( & self ) -> ODR9_R { ODR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr8 ( & self ) -> ODR8_R { ODR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr7 ( & self ) -> ODR7_R { ODR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr6 ( & self ) -> ODR6_R { ODR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr5 ( & self ) -> ODR5_R { ODR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr4 ( & self ) -> ODR4_R { ODR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr3 ( & self ) -> ODR3_R { ODR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr2 ( & self ) -> ODR2_R { ODR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr1 ( & self ) -> ODR1_R { ODR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr0 ( & self ) -> ODR0_R { ODR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr15 ( & mut self ) -> ODR15_W { ODR15_W { w : self } } # [ doc = "Bit 14 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr14 ( & mut self ) -> ODR14_W { ODR14_W { w : self } } # [ doc = "Bit 13 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr13 ( & mut self ) -> ODR13_W { ODR13_W { w : self } } # [ doc = "Bit 12 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr12 ( & mut self ) -> ODR12_W { ODR12_W { w : self } } # [ doc = "Bit 11 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr11 ( & mut self ) -> ODR11_W { ODR11_W { w : self } } # [ doc = "Bit 10 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr10 ( & mut self ) -> ODR10_W { ODR10_W { w : self } } # [ doc = "Bit 9 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr9 ( & mut self ) -> ODR9_W { ODR9_W { w : self } } # [ doc = "Bit 8 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr8 ( & mut self ) -> ODR8_W { ODR8_W { w : self } } # [ doc = "Bit 7 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr7 ( & mut self ) -> ODR7_W { ODR7_W { w : self } } # [ doc = "Bit 6 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr6 ( & mut self ) -> ODR6_W { ODR6_W { w : self } } # [ doc = "Bit 5 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr5 ( & mut self ) -> ODR5_W { ODR5_W { w : self } } # [ doc = "Bit 4 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr4 ( & mut self ) -> ODR4_W { ODR4_W { w : self } } # [ doc = "Bit 3 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr3 ( & mut self ) -> ODR3_W { ODR3_W { w : self } } # [ doc = "Bit 2 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr2 ( & mut self ) -> ODR2_W { ODR2_W { w : self } } # [ doc = "Bit 1 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr1 ( & mut self ) -> ODR1_W { ODR1_W { w : self } } # [ doc = "Bit 0 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr0 ( & mut self ) -> ODR0_W { ODR0_W { w : self } } } } # [ doc = "GPIO port bit set/reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bsrr](bsrr) module" ]
pub type BSRR = crate :: Reg < u32 , _BSRR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BSRR ; # [ doc = "`write(|w| ..)` method takes [bsrr::W](bsrr::W) writer structure" ]
impl crate :: Writable for BSRR { } # [ doc = "GPIO port bit set/reset register" ]
pub mod bsrr { # [ doc = "Writer for register BSRR" ]
pub type W = crate :: W < u32 , super :: BSRR > ; # [ doc = "Register BSRR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BSRR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x reset bit y (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR15_AW { # [ doc = "1: Resets the corresponding ODRx bit" ]
RESET = 1 } impl From < BR15_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR15_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR15`" ]
pub struct BR15_W < 'a > { w : & 'a mut W , } impl < 'a > BR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR14_AW = BR15_AW ; # [ doc = "Write proxy for field `BR14`" ]
pub struct BR14_W < 'a > { w : & 'a mut W , } impl < 'a > BR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR13_AW = BR15_AW ; # [ doc = "Write proxy for field `BR13`" ]
pub struct BR13_W < 'a > { w : & 'a mut W , } impl < 'a > BR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR12_AW = BR15_AW ; # [ doc = "Write proxy for field `BR12`" ]
pub struct BR12_W < 'a > { w : & 'a mut W , } impl < 'a > BR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR11_AW = BR15_AW ; # [ doc = "Write proxy for field `BR11`" ]
pub struct BR11_W < 'a > { w : & 'a mut W , } impl < 'a > BR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR10_AW = BR15_AW ; # [ doc = "Write proxy for field `BR10`" ]
pub struct BR10_W < 'a > { w : & 'a mut W , } impl < 'a > BR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR9_AW = BR15_AW ; # [ doc = "Write proxy for field `BR9`" ]
pub struct BR9_W < 'a > { w : & 'a mut W , } impl < 'a > BR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR8_AW = BR15_AW ; # [ doc = "Write proxy for field `BR8`" ]
pub struct BR8_W < 'a > { w : & 'a mut W , } impl < 'a > BR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR7_AW = BR15_AW ; # [ doc = "Write proxy for field `BR7`" ]
pub struct BR7_W < 'a > { w : & 'a mut W , } impl < 'a > BR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR6_AW = BR15_AW ; # [ doc = "Write proxy for field `BR6`" ]
pub struct BR6_W < 'a > { w : & 'a mut W , } impl < 'a > BR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR5_AW = BR15_AW ; # [ doc = "Write proxy for field `BR5`" ]
pub struct BR5_W < 'a > { w : & 'a mut W , } impl < 'a > BR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR4_AW = BR15_AW ; # [ doc = "Write proxy for field `BR4`" ]
pub struct BR4_W < 'a > { w : & 'a mut W , } impl < 'a > BR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR3_AW = BR15_AW ; # [ doc = "Write proxy for field `BR3`" ]
pub struct BR3_W < 'a > { w : & 'a mut W , } impl < 'a > BR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR2_AW = BR15_AW ; # [ doc = "Write proxy for field `BR2`" ]
pub struct BR2_W < 'a > { w : & 'a mut W , } impl < 'a > BR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR1_AW = BR15_AW ; # [ doc = "Write proxy for field `BR1`" ]
pub struct BR1_W < 'a > { w : & 'a mut W , } impl < 'a > BR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BR0_AW = BR15_AW ; # [ doc = "Write proxy for field `BR0`" ]
pub struct BR0_W < 'a > { w : & 'a mut W , } impl < 'a > BR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BS15_AW { # [ doc = "1: Sets the corresponding ODRx bit" ]
SET = 1 } impl From < BS15_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BS15_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BS15`" ]
pub struct BS15_W < 'a > { w : & 'a mut W , } impl < 'a > BS15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS14_AW = BS15_AW ; # [ doc = "Write proxy for field `BS14`" ]
pub struct BS14_W < 'a > { w : & 'a mut W , } impl < 'a > BS14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS13_AW = BS15_AW ; # [ doc = "Write proxy for field `BS13`" ]
pub struct BS13_W < 'a > { w : & 'a mut W , } impl < 'a > BS13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS12_AW = BS15_AW ; # [ doc = "Write proxy for field `BS12`" ]
pub struct BS12_W < 'a > { w : & 'a mut W , } impl < 'a > BS12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS11_AW = BS15_AW ; # [ doc = "Write proxy for field `BS11`" ]
pub struct BS11_W < 'a > { w : & 'a mut W , } impl < 'a > BS11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS10_AW = BS15_AW ; # [ doc = "Write proxy for field `BS10`" ]
pub struct BS10_W < 'a > { w : & 'a mut W , } impl < 'a > BS10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS9_AW = BS15_AW ; # [ doc = "Write proxy for field `BS9`" ]
pub struct BS9_W < 'a > { w : & 'a mut W , } impl < 'a > BS9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS8_AW = BS15_AW ; # [ doc = "Write proxy for field `BS8`" ]
pub struct BS8_W < 'a > { w : & 'a mut W , } impl < 'a > BS8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS7_AW = BS15_AW ; # [ doc = "Write proxy for field `BS7`" ]
pub struct BS7_W < 'a > { w : & 'a mut W , } impl < 'a > BS7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS6_AW = BS15_AW ; # [ doc = "Write proxy for field `BS6`" ]
pub struct BS6_W < 'a > { w : & 'a mut W , } impl < 'a > BS6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS5_AW = BS15_AW ; # [ doc = "Write proxy for field `BS5`" ]
pub struct BS5_W < 'a > { w : & 'a mut W , } impl < 'a > BS5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS4_AW = BS15_AW ; # [ doc = "Write proxy for field `BS4`" ]
pub struct BS4_W < 'a > { w : & 'a mut W , } impl < 'a > BS4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS3_AW = BS15_AW ; # [ doc = "Write proxy for field `BS3`" ]
pub struct BS3_W < 'a > { w : & 'a mut W , } impl < 'a > BS3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS2_AW = BS15_AW ; # [ doc = "Write proxy for field `BS2`" ]
pub struct BS2_W < 'a > { w : & 'a mut W , } impl < 'a > BS2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS1_AW = BS15_AW ; # [ doc = "Write proxy for field `BS1`" ]
pub struct BS1_W < 'a > { w : & 'a mut W , } impl < 'a > BS1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS0_AW = BS15_AW ; # [ doc = "Write proxy for field `BS0`" ]
pub struct BS0_W < 'a > { w : & 'a mut W , } impl < 'a > BS0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 31 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br15 ( & mut self ) -> BR15_W { BR15_W { w : self } } # [ doc = "Bit 30 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br14 ( & mut self ) -> BR14_W { BR14_W { w : self } } # [ doc = "Bit 29 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br13 ( & mut self ) -> BR13_W { BR13_W { w : self } } # [ doc = "Bit 28 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br12 ( & mut self ) -> BR12_W { BR12_W { w : self } } # [ doc = "Bit 27 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br11 ( & mut self ) -> BR11_W { BR11_W { w : self } } # [ doc = "Bit 26 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br10 ( & mut self ) -> BR10_W { BR10_W { w : self } } # [ doc = "Bit 25 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br9 ( & mut self ) -> BR9_W { BR9_W { w : self } } # [ doc = "Bit 24 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br8 ( & mut self ) -> BR8_W { BR8_W { w : self } } # [ doc = "Bit 23 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br7 ( & mut self ) -> BR7_W { BR7_W { w : self } } # [ doc = "Bit 22 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br6 ( & mut self ) -> BR6_W { BR6_W { w : self } } # [ doc = "Bit 21 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br5 ( & mut self ) -> BR5_W { BR5_W { w : self } } # [ doc = "Bit 20 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br4 ( & mut self ) -> BR4_W { BR4_W { w : self } } # [ doc = "Bit 19 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br3 ( & mut self ) -> BR3_W { BR3_W { w : self } } # [ doc = "Bit 18 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br2 ( & mut self ) -> BR2_W { BR2_W { w : self } } # [ doc = "Bit 17 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br1 ( & mut self ) -> BR1_W { BR1_W { w : self } } # [ doc = "Bit 16 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn br0 ( & mut self ) -> BR0_W { BR0_W { w : self } } # [ doc = "Bit 15 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs15 ( & mut self ) -> BS15_W { BS15_W { w : self } } # [ doc = "Bit 14 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs14 ( & mut self ) -> BS14_W { BS14_W { w : self } } # [ doc = "Bit 13 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs13 ( & mut self ) -> BS13_W { BS13_W { w : self } } # [ doc = "Bit 12 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs12 ( & mut self ) -> BS12_W { BS12_W { w : self } } # [ doc = "Bit 11 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs11 ( & mut self ) -> BS11_W { BS11_W { w : self } } # [ doc = "Bit 10 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs10 ( & mut self ) -> BS10_W { BS10_W { w : self } } # [ doc = "Bit 9 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs9 ( & mut self ) -> BS9_W { BS9_W { w : self } } # [ doc = "Bit 8 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs8 ( & mut self ) -> BS8_W { BS8_W { w : self } } # [ doc = "Bit 7 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs7 ( & mut self ) -> BS7_W { BS7_W { w : self } } # [ doc = "Bit 6 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs6 ( & mut self ) -> BS6_W { BS6_W { w : self } } # [ doc = "Bit 5 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs5 ( & mut self ) -> BS5_W { BS5_W { w : self } } # [ doc = "Bit 4 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs4 ( & mut self ) -> BS4_W { BS4_W { w : self } } # [ doc = "Bit 3 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs3 ( & mut self ) -> BS3_W { BS3_W { w : self } } # [ doc = "Bit 2 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs2 ( & mut self ) -> BS2_W { BS2_W { w : self } } # [ doc = "Bit 1 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs1 ( & mut self ) -> BS1_W { BS1_W { w : self } } # [ doc = "Bit 0 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs0 ( & mut self ) -> BS0_W { BS0_W { w : self } } } } # [ doc = "GPIO port configuration lock register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lckr](lckr) module" ]
pub type LCKR = crate :: Reg < u32 , _LCKR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _LCKR ; # [ doc = "`read()` method returns [lckr::R](lckr::R) reader structure" ]
impl crate :: Readable for LCKR { } # [ doc = "`write(|w| ..)` method takes [lckr::W](lckr::W) writer structure" ]
impl crate :: Writable for LCKR { } # [ doc = "GPIO port configuration lock register" ]
pub mod lckr { # [ doc = "Reader of register LCKR" ]
pub type R = crate :: R < u32 , super :: LCKR > ; # [ doc = "Writer for register LCKR" ]
pub type W = crate :: W < u32 , super :: LCKR > ; # [ doc = "Register LCKR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: LCKR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Lok Key\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCKK_A { # [ doc = "0: Port configuration lock key not active" ]
NOTACTIVE = 0 , # [ doc = "1: Port configuration lock key active" ]
ACTIVE = 1 } impl From < LCKK_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCKK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCKK`" ]
pub type LCKK_R = crate :: R < bool , LCKK_A > ; impl LCKK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCKK_A { match self . bits { false => LCKK_A :: NOTACTIVE , true => LCKK_A :: ACTIVE } } # [ doc = "Checks if the value of the field is `NOTACTIVE`" ]
# [ inline ( always ) ]
pub fn is_not_active ( & self ) -> bool { * self == LCKK_A :: NOTACTIVE } # [ doc = "Checks if the value of the field is `ACTIVE`" ]
# [ inline ( always ) ]
pub fn is_active ( & self ) -> bool { * self == LCKK_A :: ACTIVE } } # [ doc = "Write proxy for field `LCKK`" ]
pub struct LCKK_W < 'a > { w : & 'a mut W , } impl < 'a > LCKK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCKK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration lock key not active" ]
# [ inline ( always ) ]
pub fn not_active ( self ) -> & 'a mut W { self . variant ( LCKK_A :: NOTACTIVE ) } # [ doc = "Port configuration lock key active" ]
# [ inline ( always ) ]
pub fn active ( self ) -> & 'a mut W { self . variant ( LCKK_A :: ACTIVE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCK15_A { # [ doc = "0: Port configuration not locked" ]
UNLOCKED = 0 , # [ doc = "1: Port configuration locked" ]
LOCKED = 1 } impl From < LCK15_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCK15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCK15`" ]
pub type LCK15_R = crate :: R < bool , LCK15_A > ; impl LCK15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCK15_A { match self . bits { false => LCK15_A :: UNLOCKED , true => LCK15_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LCK15_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LCK15_A :: LOCKED } } # [ doc = "Write proxy for field `LCK15`" ]
pub struct LCK15_W < 'a > { w : & 'a mut W , } impl < 'a > LCK15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK14_A = LCK15_A ; # [ doc = "Reader of field `LCK14`" ]
pub type LCK14_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK14`" ]
pub struct LCK14_W < 'a > { w : & 'a mut W , } impl < 'a > LCK14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK13_A = LCK15_A ; # [ doc = "Reader of field `LCK13`" ]
pub type LCK13_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK13`" ]
pub struct LCK13_W < 'a > { w : & 'a mut W , } impl < 'a > LCK13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK12_A = LCK15_A ; # [ doc = "Reader of field `LCK12`" ]
pub type LCK12_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK12`" ]
pub struct LCK12_W < 'a > { w : & 'a mut W , } impl < 'a > LCK12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK11_A = LCK15_A ; # [ doc = "Reader of field `LCK11`" ]
pub type LCK11_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK11`" ]
pub struct LCK11_W < 'a > { w : & 'a mut W , } impl < 'a > LCK11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK10_A = LCK15_A ; # [ doc = "Reader of field `LCK10`" ]
pub type LCK10_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK10`" ]
pub struct LCK10_W < 'a > { w : & 'a mut W , } impl < 'a > LCK10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCK9_A { # [ doc = "0: Port configuration not locked" ]
UNLOCKED = 0 , # [ doc = "1: Port configuration locked" ]
LOCKED = 1 } impl From < LCK9_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCK9_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCK9`" ]
pub type LCK9_R = crate :: R < bool , LCK9_A > ; impl LCK9_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCK9_A { match self . bits { false => LCK9_A :: UNLOCKED , true => LCK9_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LCK9_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LCK9_A :: LOCKED } } # [ doc = "Write proxy for field `LCK9`" ]
pub struct LCK9_W < 'a > { w : & 'a mut W , } impl < 'a > LCK9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK8_A = LCK9_A ; # [ doc = "Reader of field `LCK8`" ]
pub type LCK8_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK8`" ]
pub struct LCK8_W < 'a > { w : & 'a mut W , } impl < 'a > LCK8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK7_A = LCK9_A ; # [ doc = "Reader of field `LCK7`" ]
pub type LCK7_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK7`" ]
pub struct LCK7_W < 'a > { w : & 'a mut W , } impl < 'a > LCK7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK6_A = LCK9_A ; # [ doc = "Reader of field `LCK6`" ]
pub type LCK6_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK6`" ]
pub struct LCK6_W < 'a > { w : & 'a mut W , } impl < 'a > LCK6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK5_A = LCK9_A ; # [ doc = "Reader of field `LCK5`" ]
pub type LCK5_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK5`" ]
pub struct LCK5_W < 'a > { w : & 'a mut W , } impl < 'a > LCK5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK4_A = LCK9_A ; # [ doc = "Reader of field `LCK4`" ]
pub type LCK4_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK4`" ]
pub struct LCK4_W < 'a > { w : & 'a mut W , } impl < 'a > LCK4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK3_A = LCK9_A ; # [ doc = "Reader of field `LCK3`" ]
pub type LCK3_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK3`" ]
pub struct LCK3_W < 'a > { w : & 'a mut W , } impl < 'a > LCK3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK2_A = LCK9_A ; # [ doc = "Reader of field `LCK2`" ]
pub type LCK2_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK2`" ]
pub struct LCK2_W < 'a > { w : & 'a mut W , } impl < 'a > LCK2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK1_A = LCK9_A ; # [ doc = "Reader of field `LCK1`" ]
pub type LCK1_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK1`" ]
pub struct LCK1_W < 'a > { w : & 'a mut W , } impl < 'a > LCK1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK0_A = LCK9_A ; # [ doc = "Reader of field `LCK0`" ]
pub type LCK0_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK0`" ]
pub struct LCK0_W < 'a > { w : & 'a mut W , } impl < 'a > LCK0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 16 - Lok Key" ]
# [ inline ( always ) ]
pub fn lckk ( & self ) -> LCKK_R { LCKK_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck15 ( & self ) -> LCK15_R { LCK15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck14 ( & self ) -> LCK14_R { LCK14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck13 ( & self ) -> LCK13_R { LCK13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck12 ( & self ) -> LCK12_R { LCK12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck11 ( & self ) -> LCK11_R { LCK11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck10 ( & self ) -> LCK10_R { LCK10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck9 ( & self ) -> LCK9_R { LCK9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck8 ( & self ) -> LCK8_R { LCK8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck7 ( & self ) -> LCK7_R { LCK7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck6 ( & self ) -> LCK6_R { LCK6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck5 ( & self ) -> LCK5_R { LCK5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck4 ( & self ) -> LCK4_R { LCK4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck3 ( & self ) -> LCK3_R { LCK3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck2 ( & self ) -> LCK2_R { LCK2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck1 ( & self ) -> LCK1_R { LCK1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck0 ( & self ) -> LCK0_R { LCK0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 16 - Lok Key" ]
# [ inline ( always ) ]
pub fn lckk ( & mut self ) -> LCKK_W { LCKK_W { w : self } } # [ doc = "Bit 15 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck15 ( & mut self ) -> LCK15_W { LCK15_W { w : self } } # [ doc = "Bit 14 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck14 ( & mut self ) -> LCK14_W { LCK14_W { w : self } } # [ doc = "Bit 13 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck13 ( & mut self ) -> LCK13_W { LCK13_W { w : self } } # [ doc = "Bit 12 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck12 ( & mut self ) -> LCK12_W { LCK12_W { w : self } } # [ doc = "Bit 11 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck11 ( & mut self ) -> LCK11_W { LCK11_W { w : self } } # [ doc = "Bit 10 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck10 ( & mut self ) -> LCK10_W { LCK10_W { w : self } } # [ doc = "Bit 9 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck9 ( & mut self ) -> LCK9_W { LCK9_W { w : self } } # [ doc = "Bit 8 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck8 ( & mut self ) -> LCK8_W { LCK8_W { w : self } } # [ doc = "Bit 7 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck7 ( & mut self ) -> LCK7_W { LCK7_W { w : self } } # [ doc = "Bit 6 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck6 ( & mut self ) -> LCK6_W { LCK6_W { w : self } } # [ doc = "Bit 5 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck5 ( & mut self ) -> LCK5_W { LCK5_W { w : self } } # [ doc = "Bit 4 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck4 ( & mut self ) -> LCK4_W { LCK4_W { w : self } } # [ doc = "Bit 3 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck3 ( & mut self ) -> LCK3_W { LCK3_W { w : self } } # [ doc = "Bit 2 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck2 ( & mut self ) -> LCK2_W { LCK2_W { w : self } } # [ doc = "Bit 1 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck1 ( & mut self ) -> LCK1_W { LCK1_W { w : self } } # [ doc = "Bit 0 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck0 ( & mut self ) -> LCK0_W { LCK0_W { w : self } } } } # [ doc = "GPIO alternate function low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afrl](afrl) module" ]
pub type AFRL = crate :: Reg < u32 , _AFRL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AFRL ; # [ doc = "`read()` method returns [afrl::R](afrl::R) reader structure" ]
impl crate :: Readable for AFRL { } # [ doc = "`write(|w| ..)` method takes [afrl::W](afrl::W) writer structure" ]
impl crate :: Writable for AFRL { } # [ doc = "GPIO alternate function low register" ]
pub mod afrl { # [ doc = "Reader of register AFRL" ]
pub type R = crate :: R < u32 , super :: AFRL > ; # [ doc = "Writer for register AFRL" ]
pub type W = crate :: W < u32 , super :: AFRL > ; # [ doc = "Register AFRL `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AFRL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum AFRL7_A { # [ doc = "0: AF0" ]
AF0 = 0 , # [ doc = "1: AF1" ]
AF1 = 1 , # [ doc = "2: AF2" ]
AF2 = 2 , # [ doc = "3: AF3" ]
AF3 = 3 , # [ doc = "4: AF4" ]
AF4 = 4 , # [ doc = "5: AF5" ]
AF5 = 5 , # [ doc = "6: AF6" ]
AF6 = 6 , # [ doc = "7: AF7" ]
AF7 = 7 , # [ doc = "8: AF8" ]
AF8 = 8 , # [ doc = "9: AF9" ]
AF9 = 9 , # [ doc = "10: AF10" ]
AF10 = 10 , # [ doc = "11: AF11" ]
AF11 = 11 , # [ doc = "12: AF12" ]
AF12 = 12 , # [ doc = "13: AF13" ]
AF13 = 13 , # [ doc = "14: AF14" ]
AF14 = 14 , # [ doc = "15: AF15" ]
AF15 = 15 } impl From < AFRL7_A > for u8 { # [ inline ( always ) ]
fn from ( variant : AFRL7_A ) -> Self { variant as _ } } # [ doc = "Reader of field `AFRL7`" ]
pub type AFRL7_R = crate :: R < u8 , AFRL7_A > ; impl AFRL7_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AFRL7_A { match self . bits { 0 => AFRL7_A :: AF0 , 1 => AFRL7_A :: AF1 , 2 => AFRL7_A :: AF2 , 3 => AFRL7_A :: AF3 , 4 => AFRL7_A :: AF4 , 5 => AFRL7_A :: AF5 , 6 => AFRL7_A :: AF6 , 7 => AFRL7_A :: AF7 , 8 => AFRL7_A :: AF8 , 9 => AFRL7_A :: AF9 , 10 => AFRL7_A :: AF10 , 11 => AFRL7_A :: AF11 , 12 => AFRL7_A :: AF12 , 13 => AFRL7_A :: AF13 , 14 => AFRL7_A :: AF14 , 15 => AFRL7_A :: AF15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `AF0`" ]
# [ inline ( always ) ]
pub fn is_af0 ( & self ) -> bool { * self == AFRL7_A :: AF0 } # [ doc = "Checks if the value of the field is `AF1`" ]
# [ inline ( always ) ]
pub fn is_af1 ( & self ) -> bool { * self == AFRL7_A :: AF1 } # [ doc = "Checks if the value of the field is `AF2`" ]
# [ inline ( always ) ]
pub fn is_af2 ( & self ) -> bool { * self == AFRL7_A :: AF2 } # [ doc = "Checks if the value of the field is `AF3`" ]
# [ inline ( always ) ]
pub fn is_af3 ( & self ) -> bool { * self == AFRL7_A :: AF3 } # [ doc = "Checks if the value of the field is `AF4`" ]
# [ inline ( always ) ]
pub fn is_af4 ( & self ) -> bool { * self == AFRL7_A :: AF4 } # [ doc = "Checks if the value of the field is `AF5`" ]
# [ inline ( always ) ]
pub fn is_af5 ( & self ) -> bool { * self == AFRL7_A :: AF5 } # [ doc = "Checks if the value of the field is `AF6`" ]
# [ inline ( always ) ]
pub fn is_af6 ( & self ) -> bool { * self == AFRL7_A :: AF6 } # [ doc = "Checks if the value of the field is `AF7`" ]
# [ inline ( always ) ]
pub fn is_af7 ( & self ) -> bool { * self == AFRL7_A :: AF7 } # [ doc = "Checks if the value of the field is `AF8`" ]
# [ inline ( always ) ]
pub fn is_af8 ( & self ) -> bool { * self == AFRL7_A :: AF8 } # [ doc = "Checks if the value of the field is `AF9`" ]
# [ inline ( always ) ]
pub fn is_af9 ( & self ) -> bool { * self == AFRL7_A :: AF9 } # [ doc = "Checks if the value of the field is `AF10`" ]
# [ inline ( always ) ]
pub fn is_af10 ( & self ) -> bool { * self == AFRL7_A :: AF10 } # [ doc = "Checks if the value of the field is `AF11`" ]
# [ inline ( always ) ]
pub fn is_af11 ( & self ) -> bool { * self == AFRL7_A :: AF11 } # [ doc = "Checks if the value of the field is `AF12`" ]
# [ inline ( always ) ]
pub fn is_af12 ( & self ) -> bool { * self == AFRL7_A :: AF12 } # [ doc = "Checks if the value of the field is `AF13`" ]
# [ inline ( always ) ]
pub fn is_af13 ( & self ) -> bool { * self == AFRL7_A :: AF13 } # [ doc = "Checks if the value of the field is `AF14`" ]
# [ inline ( always ) ]
pub fn is_af14 ( & self ) -> bool { * self == AFRL7_A :: AF14 } # [ doc = "Checks if the value of the field is `AF15`" ]
# [ inline ( always ) ]
pub fn is_af15 ( & self ) -> bool { * self == AFRL7_A :: AF15 } } # [ doc = "Write proxy for field `AFRL7`" ]
pub struct AFRL7_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL6_A = AFRL7_A ; # [ doc = "Reader of field `AFRL6`" ]
pub type AFRL6_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL6`" ]
pub struct AFRL6_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL5_A = AFRL7_A ; # [ doc = "Reader of field `AFRL5`" ]
pub type AFRL5_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL5`" ]
pub struct AFRL5_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL4_A = AFRL7_A ; # [ doc = "Reader of field `AFRL4`" ]
pub type AFRL4_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL4`" ]
pub struct AFRL4_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL3_A = AFRL7_A ; # [ doc = "Reader of field `AFRL3`" ]
pub type AFRL3_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL3`" ]
pub struct AFRL3_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL2_A = AFRL7_A ; # [ doc = "Reader of field `AFRL2`" ]
pub type AFRL2_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL2`" ]
pub struct AFRL2_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL1_A = AFRL7_A ; # [ doc = "Reader of field `AFRL1`" ]
pub type AFRL1_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL1`" ]
pub struct AFRL1_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL0_A = AFRL7_A ; # [ doc = "Reader of field `AFRL0`" ]
pub type AFRL0_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL0`" ]
pub struct AFRL0_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl7 ( & self ) -> AFRL7_R { AFRL7_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl6 ( & self ) -> AFRL6_R { AFRL6_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl5 ( & self ) -> AFRL5_R { AFRL5_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl4 ( & self ) -> AFRL4_R { AFRL4_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl3 ( & self ) -> AFRL3_R { AFRL3_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl2 ( & self ) -> AFRL2_R { AFRL2_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl1 ( & self ) -> AFRL1_R { AFRL1_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl0 ( & self ) -> AFRL0_R { AFRL0_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl7 ( & mut self ) -> AFRL7_W { AFRL7_W { w : self } } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl6 ( & mut self ) -> AFRL6_W { AFRL6_W { w : self } } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl5 ( & mut self ) -> AFRL5_W { AFRL5_W { w : self } } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl4 ( & mut self ) -> AFRL4_W { AFRL4_W { w : self } } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl3 ( & mut self ) -> AFRL3_W { AFRL3_W { w : self } } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl2 ( & mut self ) -> AFRL2_W { AFRL2_W { w : self } } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl1 ( & mut self ) -> AFRL1_W { AFRL1_W { w : self } } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl0 ( & mut self ) -> AFRL0_W { AFRL0_W { w : self } } } } # [ doc = "GPIO alternate function high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afrh](afrh) module" ]
pub type AFRH = crate :: Reg < u32 , _AFRH > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AFRH ; # [ doc = "`read()` method returns [afrh::R](afrh::R) reader structure" ]
impl crate :: Readable for AFRH { } # [ doc = "`write(|w| ..)` method takes [afrh::W](afrh::W) writer structure" ]
impl crate :: Writable for AFRH { } # [ doc = "GPIO alternate function high register" ]
pub mod afrh { # [ doc = "Reader of register AFRH" ]
pub type R = crate :: R < u32 , super :: AFRH > ; # [ doc = "Writer for register AFRH" ]
pub type W = crate :: W < u32 , super :: AFRH > ; # [ doc = "Register AFRH `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AFRH { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum AFRH15_A { # [ doc = "0: AF0" ]
AF0 = 0 , # [ doc = "1: AF1" ]
AF1 = 1 , # [ doc = "2: AF2" ]
AF2 = 2 , # [ doc = "3: AF3" ]
AF3 = 3 , # [ doc = "4: AF4" ]
AF4 = 4 , # [ doc = "5: AF5" ]
AF5 = 5 , # [ doc = "6: AF6" ]
AF6 = 6 , # [ doc = "7: AF7" ]
AF7 = 7 , # [ doc = "8: AF8" ]
AF8 = 8 , # [ doc = "9: AF9" ]
AF9 = 9 , # [ doc = "10: AF10" ]
AF10 = 10 , # [ doc = "11: AF11" ]
AF11 = 11 , # [ doc = "12: AF12" ]
AF12 = 12 , # [ doc = "13: AF13" ]
AF13 = 13 , # [ doc = "14: AF14" ]
AF14 = 14 , # [ doc = "15: AF15" ]
AF15 = 15 } impl From < AFRH15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : AFRH15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `AFRH15`" ]
pub type AFRH15_R = crate :: R < u8 , AFRH15_A > ; impl AFRH15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AFRH15_A { match self . bits { 0 => AFRH15_A :: AF0 , 1 => AFRH15_A :: AF1 , 2 => AFRH15_A :: AF2 , 3 => AFRH15_A :: AF3 , 4 => AFRH15_A :: AF4 , 5 => AFRH15_A :: AF5 , 6 => AFRH15_A :: AF6 , 7 => AFRH15_A :: AF7 , 8 => AFRH15_A :: AF8 , 9 => AFRH15_A :: AF9 , 10 => AFRH15_A :: AF10 , 11 => AFRH15_A :: AF11 , 12 => AFRH15_A :: AF12 , 13 => AFRH15_A :: AF13 , 14 => AFRH15_A :: AF14 , 15 => AFRH15_A :: AF15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `AF0`" ]
# [ inline ( always ) ]
pub fn is_af0 ( & self ) -> bool { * self == AFRH15_A :: AF0 } # [ doc = "Checks if the value of the field is `AF1`" ]
# [ inline ( always ) ]
pub fn is_af1 ( & self ) -> bool { * self == AFRH15_A :: AF1 } # [ doc = "Checks if the value of the field is `AF2`" ]
# [ inline ( always ) ]
pub fn is_af2 ( & self ) -> bool { * self == AFRH15_A :: AF2 } # [ doc = "Checks if the value of the field is `AF3`" ]
# [ inline ( always ) ]
pub fn is_af3 ( & self ) -> bool { * self == AFRH15_A :: AF3 } # [ doc = "Checks if the value of the field is `AF4`" ]
# [ inline ( always ) ]
pub fn is_af4 ( & self ) -> bool { * self == AFRH15_A :: AF4 } # [ doc = "Checks if the value of the field is `AF5`" ]
# [ inline ( always ) ]
pub fn is_af5 ( & self ) -> bool { * self == AFRH15_A :: AF5 } # [ doc = "Checks if the value of the field is `AF6`" ]
# [ inline ( always ) ]
pub fn is_af6 ( & self ) -> bool { * self == AFRH15_A :: AF6 } # [ doc = "Checks if the value of the field is `AF7`" ]
# [ inline ( always ) ]
pub fn is_af7 ( & self ) -> bool { * self == AFRH15_A :: AF7 } # [ doc = "Checks if the value of the field is `AF8`" ]
# [ inline ( always ) ]
pub fn is_af8 ( & self ) -> bool { * self == AFRH15_A :: AF8 } # [ doc = "Checks if the value of the field is `AF9`" ]
# [ inline ( always ) ]
pub fn is_af9 ( & self ) -> bool { * self == AFRH15_A :: AF9 } # [ doc = "Checks if the value of the field is `AF10`" ]
# [ inline ( always ) ]
pub fn is_af10 ( & self ) -> bool { * self == AFRH15_A :: AF10 } # [ doc = "Checks if the value of the field is `AF11`" ]
# [ inline ( always ) ]
pub fn is_af11 ( & self ) -> bool { * self == AFRH15_A :: AF11 } # [ doc = "Checks if the value of the field is `AF12`" ]
# [ inline ( always ) ]
pub fn is_af12 ( & self ) -> bool { * self == AFRH15_A :: AF12 } # [ doc = "Checks if the value of the field is `AF13`" ]
# [ inline ( always ) ]
pub fn is_af13 ( & self ) -> bool { * self == AFRH15_A :: AF13 } # [ doc = "Checks if the value of the field is `AF14`" ]
# [ inline ( always ) ]
pub fn is_af14 ( & self ) -> bool { * self == AFRH15_A :: AF14 } # [ doc = "Checks if the value of the field is `AF15`" ]
# [ inline ( always ) ]
pub fn is_af15 ( & self ) -> bool { * self == AFRH15_A :: AF15 } } # [ doc = "Write proxy for field `AFRH15`" ]
pub struct AFRH15_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH14_A = AFRH15_A ; # [ doc = "Reader of field `AFRH14`" ]
pub type AFRH14_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH14`" ]
pub struct AFRH14_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH13_A = AFRH15_A ; # [ doc = "Reader of field `AFRH13`" ]
pub type AFRH13_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH13`" ]
pub struct AFRH13_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH12_A = AFRH15_A ; # [ doc = "Reader of field `AFRH12`" ]
pub type AFRH12_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH12`" ]
pub struct AFRH12_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH11_A = AFRH15_A ; # [ doc = "Reader of field `AFRH11`" ]
pub type AFRH11_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH11`" ]
pub struct AFRH11_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH10_A = AFRH15_A ; # [ doc = "Reader of field `AFRH10`" ]
pub type AFRH10_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH10`" ]
pub struct AFRH10_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH9_A = AFRH15_A ; # [ doc = "Reader of field `AFRH9`" ]
pub type AFRH9_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH9`" ]
pub struct AFRH9_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH8_A = AFRH15_A ; # [ doc = "Reader of field `AFRH8`" ]
pub type AFRH8_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH8`" ]
pub struct AFRH8_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh15 ( & self ) -> AFRH15_R { AFRH15_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh14 ( & self ) -> AFRH14_R { AFRH14_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh13 ( & self ) -> AFRH13_R { AFRH13_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh12 ( & self ) -> AFRH12_R { AFRH12_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh11 ( & self ) -> AFRH11_R { AFRH11_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh10 ( & self ) -> AFRH10_R { AFRH10_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh9 ( & self ) -> AFRH9_R { AFRH9_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh8 ( & self ) -> AFRH8_R { AFRH8_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh15 ( & mut self ) -> AFRH15_W { AFRH15_W { w : self } } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh14 ( & mut self ) -> AFRH14_W { AFRH14_W { w : self } } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh13 ( & mut self ) -> AFRH13_W { AFRH13_W { w : self } } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh12 ( & mut self ) -> AFRH12_W { AFRH12_W { w : self } } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh11 ( & mut self ) -> AFRH11_W { AFRH11_W { w : self } } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh10 ( & mut self ) -> AFRH10_W { AFRH10_W { w : self } } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh9 ( & mut self ) -> AFRH9_W { AFRH9_W { w : self } } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh8 ( & mut self ) -> AFRH8_W { AFRH8_W { w : self } } } } # [ doc = "Port bit reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [brr](brr) module" ]
pub type BRR = crate :: Reg < u32 , _BRR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BRR ; # [ doc = "`write(|w| ..)` method takes [brr::W](brr::W) writer structure" ]
impl crate :: Writable for BRR { } # [ doc = "Port bit reset register" ]
pub mod brr { # [ doc = "Writer for register BRR" ]
pub type W = crate :: W < u32 , super :: BRR > ; # [ doc = "Register BRR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BRR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x Reset bit y\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR0_AW { # [ doc = "0: No action on the corresponding ODx bit" ]
NOACTION = 0 , # [ doc = "1: Reset the ODx bit" ]
RESET = 1 } impl From < BR0_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR0_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR0`" ]
pub struct BR0_W < 'a > { w : & 'a mut W , } impl < 'a > BR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR1_AW = BR0_AW ; # [ doc = "Write proxy for field `BR1`" ]
pub struct BR1_W < 'a > { w : & 'a mut W , } impl < 'a > BR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR2_AW = BR0_AW ; # [ doc = "Write proxy for field `BR2`" ]
pub struct BR2_W < 'a > { w : & 'a mut W , } impl < 'a > BR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR3_AW = BR0_AW ; # [ doc = "Write proxy for field `BR3`" ]
pub struct BR3_W < 'a > { w : & 'a mut W , } impl < 'a > BR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR4_AW = BR0_AW ; # [ doc = "Write proxy for field `BR4`" ]
pub struct BR4_W < 'a > { w : & 'a mut W , } impl < 'a > BR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR5_AW = BR0_AW ; # [ doc = "Write proxy for field `BR5`" ]
pub struct BR5_W < 'a > { w : & 'a mut W , } impl < 'a > BR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR6_AW = BR0_AW ; # [ doc = "Write proxy for field `BR6`" ]
pub struct BR6_W < 'a > { w : & 'a mut W , } impl < 'a > BR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR7_AW = BR0_AW ; # [ doc = "Write proxy for field `BR7`" ]
pub struct BR7_W < 'a > { w : & 'a mut W , } impl < 'a > BR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR8_AW = BR0_AW ; # [ doc = "Write proxy for field `BR8`" ]
pub struct BR8_W < 'a > { w : & 'a mut W , } impl < 'a > BR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR9_AW = BR0_AW ; # [ doc = "Write proxy for field `BR9`" ]
pub struct BR9_W < 'a > { w : & 'a mut W , } impl < 'a > BR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x Reset bit y\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR10_AW { # [ doc = "0: No action on the corresponding ODx bit" ]
NOACTION = 0 , # [ doc = "1: Reset the ODx bit" ]
RESET = 1 } impl From < BR10_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR10_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR10`" ]
pub struct BR10_W < 'a > { w : & 'a mut W , } impl < 'a > BR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR11_AW = BR10_AW ; # [ doc = "Write proxy for field `BR11`" ]
pub struct BR11_W < 'a > { w : & 'a mut W , } impl < 'a > BR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR12_AW = BR10_AW ; # [ doc = "Write proxy for field `BR12`" ]
pub struct BR12_W < 'a > { w : & 'a mut W , } impl < 'a > BR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR13_AW = BR10_AW ; # [ doc = "Write proxy for field `BR13`" ]
pub struct BR13_W < 'a > { w : & 'a mut W , } impl < 'a > BR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR14_AW = BR10_AW ; # [ doc = "Write proxy for field `BR14`" ]
pub struct BR14_W < 'a > { w : & 'a mut W , } impl < 'a > BR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR15_AW = BR10_AW ; # [ doc = "Write proxy for field `BR15`" ]
pub struct BR15_W < 'a > { w : & 'a mut W , } impl < 'a > BR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl W { # [ doc = "Bit 0 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br0 ( & mut self ) -> BR0_W { BR0_W { w : self } } # [ doc = "Bit 1 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br1 ( & mut self ) -> BR1_W { BR1_W { w : self } } # [ doc = "Bit 2 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br2 ( & mut self ) -> BR2_W { BR2_W { w : self } } # [ doc = "Bit 3 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br3 ( & mut self ) -> BR3_W { BR3_W { w : self } } # [ doc = "Bit 4 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br4 ( & mut self ) -> BR4_W { BR4_W { w : self } } # [ doc = "Bit 5 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br5 ( & mut self ) -> BR5_W { BR5_W { w : self } } # [ doc = "Bit 6 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br6 ( & mut self ) -> BR6_W { BR6_W { w : self } } # [ doc = "Bit 7 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br7 ( & mut self ) -> BR7_W { BR7_W { w : self } } # [ doc = "Bit 8 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br8 ( & mut self ) -> BR8_W { BR8_W { w : self } } # [ doc = "Bit 9 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br9 ( & mut self ) -> BR9_W { BR9_W { w : self } } # [ doc = "Bit 10 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br10 ( & mut self ) -> BR10_W { BR10_W { w : self } } # [ doc = "Bit 11 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br11 ( & mut self ) -> BR11_W { BR11_W { w : self } } # [ doc = "Bit 12 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br12 ( & mut self ) -> BR12_W { BR12_W { w : self } } # [ doc = "Bit 13 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br13 ( & mut self ) -> BR13_W { BR13_W { w : self } } # [ doc = "Bit 14 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br14 ( & mut self ) -> BR14_W { BR14_W { w : self } } # [ doc = "Bit 15 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br15 ( & mut self ) -> BR15_W { BR15_W { w : self } } } } } # [ doc = "General-purpose I/Os" ]
pub struct GPIOD { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOD { } impl GPIOD { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpioc :: RegisterBlock { 0x4800_0c00 as * const _ } } impl Deref for GPIOD { type Target = gpioc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOD :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub struct GPIOE { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOE { } impl GPIOE { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpioc :: RegisterBlock { 0x4800_1000 as * const _ } } impl Deref for GPIOE { type Target = gpioc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOE :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub struct GPIOF { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOF { } impl GPIOF { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpioc :: RegisterBlock { 0x4800_1400 as * const _ } } impl Deref for GPIOF { type Target = gpioc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOF :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub struct GPIOG { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOG { } impl GPIOG { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpioc :: RegisterBlock { 0x4800_1800 as * const _ } } impl Deref for GPIOG { type Target = gpioc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOG :: ptr ( ) } } } # [ doc = "Touch sensing controller" ]
pub struct TSC { _marker : PhantomData < * const ( ) > } unsafe impl Send for TSC { } impl TSC { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tsc :: RegisterBlock { 0x4002_4000 as * const _ } } impl Deref for TSC { type Target = tsc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TSC :: ptr ( ) } } } # [ doc = "Touch sensing controller" ]
pub mod tsc { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register" ]
pub cr : CR , # [ doc = "0x04 - interrupt enable register" ]
pub ier : IER , # [ doc = "0x08 - interrupt clear register" ]
pub icr : ICR , # [ doc = "0x0c - interrupt status register" ]
pub isr : ISR , # [ doc = "0x10 - I/O hysteresis control register" ]
pub iohcr : IOHCR , _reserved5 : [ u8 ; 4usize ]
, # [ doc = "0x18 - I/O analog switch control register" ]
pub ioascr : IOASCR , _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x20 - I/O sampling control register" ]
pub ioscr : IOSCR , _reserved7 : [ u8 ; 4usize ]
, # [ doc = "0x28 - I/O channel control register" ]
pub ioccr : IOCCR , _reserved8 : [ u8 ; 4usize ]
, # [ doc = "0x30 - I/O group control status register" ]
pub iogcsr : IOGCSR , # [ doc = "0x34 - I/O group x counter register" ]
pub iog1cr : IOGCR , # [ doc = "0x38 - I/O group x counter register" ]
pub iog2cr : IOGCR , # [ doc = "0x3c - I/O group x counter register" ]
pub iog3cr : IOGCR , # [ doc = "0x40 - I/O group x counter register" ]
pub iog4cr : IOGCR , # [ doc = "0x44 - I/O group x counter register" ]
pub iog5cr : IOGCR , # [ doc = "0x48 - I/O group x counter register" ]
pub iog6cr : IOGCR , # [ doc = "0x4c - I/O group x counter register" ]
pub iog7cr : IOGCR , # [ doc = "0x50 - I/O group x counter register" ]
pub iog8cr : IOGCR , } # [ doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CTPH`" ]
pub type CTPH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CTPH`" ]
pub struct CTPH_W < 'a > { w : & 'a mut W , } impl < 'a > CTPH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } # [ doc = "Reader of field `CTPL`" ]
pub type CTPL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CTPL`" ]
pub struct CTPL_W < 'a > { w : & 'a mut W , } impl < 'a > CTPL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `SSD`" ]
pub type SSD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SSD`" ]
pub struct SSD_W < 'a > { w : & 'a mut W , } impl < 'a > SSD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x7f << 17 ) ) | ( ( ( value as u32 ) & 0x7f ) << 17 ) ; self . w } } # [ doc = "Reader of field `SSE`" ]
pub type SSE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SSE`" ]
pub struct SSE_W < 'a > { w : & 'a mut W , } impl < 'a > SSE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `SSPSC`" ]
pub type SSPSC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SSPSC`" ]
pub struct SSPSC_W < 'a > { w : & 'a mut W , } impl < 'a > SSPSC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `PGPSC`" ]
pub type PGPSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PGPSC`" ]
pub struct PGPSC_W < 'a > { w : & 'a mut W , } impl < 'a > PGPSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Reader of field `MCV`" ]
pub type MCV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MCV`" ]
pub struct MCV_W < 'a > { w : & 'a mut W , } impl < 'a > MCV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 5 ) ) | ( ( ( value as u32 ) & 0x07 ) << 5 ) ; self . w } } # [ doc = "Reader of field `IODEF`" ]
pub type IODEF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IODEF`" ]
pub struct IODEF_W < 'a > { w : & 'a mut W , } impl < 'a > IODEF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `SYNCPOL`" ]
pub type SYNCPOL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SYNCPOL`" ]
pub struct SYNCPOL_W < 'a > { w : & 'a mut W , } impl < 'a > SYNCPOL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `AM`" ]
pub type AM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `AM`" ]
pub struct AM_W < 'a > { w : & 'a mut W , } impl < 'a > AM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `START`" ]
pub type START_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `START`" ]
pub struct START_W < 'a > { w : & 'a mut W , } impl < 'a > START_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `TSCE`" ]
pub type TSCE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TSCE`" ]
pub struct TSCE_W < 'a > { w : & 'a mut W , } impl < 'a > TSCE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 28:31 - Charge transfer pulse high" ]
# [ inline ( always ) ]
pub fn ctph ( & self ) -> CTPH_R { CTPH_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } # [ doc = "Bits 24:27 - Charge transfer pulse low" ]
# [ inline ( always ) ]
pub fn ctpl ( & self ) -> CTPL_R { CTPL_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 17:23 - Spread spectrum deviation" ]
# [ inline ( always ) ]
pub fn ssd ( & self ) -> SSD_R { SSD_R :: new ( ( ( self . bits >> 17 ) & 0x7f ) as u8 ) } # [ doc = "Bit 16 - Spread spectrum enable" ]
# [ inline ( always ) ]
pub fn sse ( & self ) -> SSE_R { SSE_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Spread spectrum prescaler" ]
# [ inline ( always ) ]
pub fn sspsc ( & self ) -> SSPSC_R { SSPSC_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - pulse generator prescaler" ]
# [ inline ( always ) ]
pub fn pgpsc ( & self ) -> PGPSC_R { PGPSC_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bits 5:7 - Max count value" ]
# [ inline ( always ) ]
pub fn mcv ( & self ) -> MCV_R { MCV_R :: new ( ( ( self . bits >> 5 ) & 0x07 ) as u8 ) } # [ doc = "Bit 4 - I/O Default mode" ]
# [ inline ( always ) ]
pub fn iodef ( & self ) -> IODEF_R { IODEF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Synchronization pin polarity" ]
# [ inline ( always ) ]
pub fn syncpol ( & self ) -> SYNCPOL_R { SYNCPOL_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Acquisition mode" ]
# [ inline ( always ) ]
pub fn am ( & self ) -> AM_R { AM_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Start a new acquisition" ]
# [ inline ( always ) ]
pub fn start ( & self ) -> START_R { START_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Touch sensing controller enable" ]
# [ inline ( always ) ]
pub fn tsce ( & self ) -> TSCE_R { TSCE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 28:31 - Charge transfer pulse high" ]
# [ inline ( always ) ]
pub fn ctph ( & mut self ) -> CTPH_W { CTPH_W { w : self } } # [ doc = "Bits 24:27 - Charge transfer pulse low" ]
# [ inline ( always ) ]
pub fn ctpl ( & mut self ) -> CTPL_W { CTPL_W { w : self } } # [ doc = "Bits 17:23 - Spread spectrum deviation" ]
# [ inline ( always ) ]
pub fn ssd ( & mut self ) -> SSD_W { SSD_W { w : self } } # [ doc = "Bit 16 - Spread spectrum enable" ]
# [ inline ( always ) ]
pub fn sse ( & mut self ) -> SSE_W { SSE_W { w : self } } # [ doc = "Bit 15 - Spread spectrum prescaler" ]
# [ inline ( always ) ]
pub fn sspsc ( & mut self ) -> SSPSC_W { SSPSC_W { w : self } } # [ doc = "Bits 12:14 - pulse generator prescaler" ]
# [ inline ( always ) ]
pub fn pgpsc ( & mut self ) -> PGPSC_W { PGPSC_W { w : self } } # [ doc = "Bits 5:7 - Max count value" ]
# [ inline ( always ) ]
pub fn mcv ( & mut self ) -> MCV_W { MCV_W { w : self } } # [ doc = "Bit 4 - I/O Default mode" ]
# [ inline ( always ) ]
pub fn iodef ( & mut self ) -> IODEF_W { IODEF_W { w : self } } # [ doc = "Bit 3 - Synchronization pin polarity" ]
# [ inline ( always ) ]
pub fn syncpol ( & mut self ) -> SYNCPOL_W { SYNCPOL_W { w : self } } # [ doc = "Bit 2 - Acquisition mode" ]
# [ inline ( always ) ]
pub fn am ( & mut self ) -> AM_W { AM_W { w : self } } # [ doc = "Bit 1 - Start a new acquisition" ]
# [ inline ( always ) ]
pub fn start ( & mut self ) -> START_W { START_W { w : self } } # [ doc = "Bit 0 - Touch sensing controller enable" ]
# [ inline ( always ) ]
pub fn tsce ( & mut self ) -> TSCE_W { TSCE_W { w : self } } } } # [ doc = "interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](ier) module" ]
pub type IER = crate :: Reg < u32 , _IER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IER ; # [ doc = "`read()` method returns [ier::R](ier::R) reader structure" ]
impl crate :: Readable for IER { } # [ doc = "`write(|w| ..)` method takes [ier::W](ier::W) writer structure" ]
impl crate :: Writable for IER { } # [ doc = "interrupt enable register" ]
pub mod ier { # [ doc = "Reader of register IER" ]
pub type R = crate :: R < u32 , super :: IER > ; # [ doc = "Writer for register IER" ]
pub type W = crate :: W < u32 , super :: IER > ; # [ doc = "Register IER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MCEIE`" ]
pub type MCEIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MCEIE`" ]
pub struct MCEIE_W < 'a > { w : & 'a mut W , } impl < 'a > MCEIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `EOAIE`" ]
pub type EOAIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EOAIE`" ]
pub struct EOAIE_W < 'a > { w : & 'a mut W , } impl < 'a > EOAIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 1 - Max count error interrupt enable" ]
# [ inline ( always ) ]
pub fn mceie ( & self ) -> MCEIE_R { MCEIE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - End of acquisition interrupt enable" ]
# [ inline ( always ) ]
pub fn eoaie ( & self ) -> EOAIE_R { EOAIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 1 - Max count error interrupt enable" ]
# [ inline ( always ) ]
pub fn mceie ( & mut self ) -> MCEIE_W { MCEIE_W { w : self } } # [ doc = "Bit 0 - End of acquisition interrupt enable" ]
# [ inline ( always ) ]
pub fn eoaie ( & mut self ) -> EOAIE_W { EOAIE_W { w : self } } } } # [ doc = "interrupt clear register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](icr) module" ]
pub type ICR = crate :: Reg < u32 , _ICR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ICR ; # [ doc = "`read()` method returns [icr::R](icr::R) reader structure" ]
impl crate :: Readable for ICR { } # [ doc = "`write(|w| ..)` method takes [icr::W](icr::W) writer structure" ]
impl crate :: Writable for ICR { } # [ doc = "interrupt clear register" ]
pub mod icr { # [ doc = "Reader of register ICR" ]
pub type R = crate :: R < u32 , super :: ICR > ; # [ doc = "Writer for register ICR" ]
pub type W = crate :: W < u32 , super :: ICR > ; # [ doc = "Register ICR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ICR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MCEIC`" ]
pub type MCEIC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MCEIC`" ]
pub struct MCEIC_W < 'a > { w : & 'a mut W , } impl < 'a > MCEIC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `EOAIC`" ]
pub type EOAIC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EOAIC`" ]
pub struct EOAIC_W < 'a > { w : & 'a mut W , } impl < 'a > EOAIC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 1 - Max count error interrupt clear" ]
# [ inline ( always ) ]
pub fn mceic ( & self ) -> MCEIC_R { MCEIC_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - End of acquisition interrupt clear" ]
# [ inline ( always ) ]
pub fn eoaic ( & self ) -> EOAIC_R { EOAIC_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 1 - Max count error interrupt clear" ]
# [ inline ( always ) ]
pub fn mceic ( & mut self ) -> MCEIC_W { MCEIC_W { w : self } } # [ doc = "Bit 0 - End of acquisition interrupt clear" ]
# [ inline ( always ) ]
pub fn eoaic ( & mut self ) -> EOAIC_W { EOAIC_W { w : self } } } } # [ doc = "interrupt status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module" ]
pub type ISR = crate :: Reg < u32 , _ISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISR ; # [ doc = "`read()` method returns [isr::R](isr::R) reader structure" ]
impl crate :: Readable for ISR { } # [ doc = "`write(|w| ..)` method takes [isr::W](isr::W) writer structure" ]
impl crate :: Writable for ISR { } # [ doc = "interrupt status register" ]
pub mod isr { # [ doc = "Reader of register ISR" ]
pub type R = crate :: R < u32 , super :: ISR > ; # [ doc = "Writer for register ISR" ]
pub type W = crate :: W < u32 , super :: ISR > ; # [ doc = "Register ISR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ISR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MCEF`" ]
pub type MCEF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MCEF`" ]
pub struct MCEF_W < 'a > { w : & 'a mut W , } impl < 'a > MCEF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `EOAF`" ]
pub type EOAF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EOAF`" ]
pub struct EOAF_W < 'a > { w : & 'a mut W , } impl < 'a > EOAF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 1 - Max count error flag" ]
# [ inline ( always ) ]
pub fn mcef ( & self ) -> MCEF_R { MCEF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - End of acquisition flag" ]
# [ inline ( always ) ]
pub fn eoaf ( & self ) -> EOAF_R { EOAF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 1 - Max count error flag" ]
# [ inline ( always ) ]
pub fn mcef ( & mut self ) -> MCEF_W { MCEF_W { w : self } } # [ doc = "Bit 0 - End of acquisition flag" ]
# [ inline ( always ) ]
pub fn eoaf ( & mut self ) -> EOAF_W { EOAF_W { w : self } } } } # [ doc = "I/O hysteresis control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iohcr](iohcr) module" ]
pub type IOHCR = crate :: Reg < u32 , _IOHCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IOHCR ; # [ doc = "`read()` method returns [iohcr::R](iohcr::R) reader structure" ]
impl crate :: Readable for IOHCR { } # [ doc = "`write(|w| ..)` method takes [iohcr::W](iohcr::W) writer structure" ]
impl crate :: Writable for IOHCR { } # [ doc = "I/O hysteresis control register" ]
pub mod iohcr { # [ doc = "Reader of register IOHCR" ]
pub type R = crate :: R < u32 , super :: IOHCR > ; # [ doc = "Writer for register IOHCR" ]
pub type W = crate :: W < u32 , super :: IOHCR > ; # [ doc = "Register IOHCR `reset()`'s with value 0xffff_ffff" ]
impl crate :: ResetValue for super :: IOHCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff_ffff } } # [ doc = "Reader of field `G1_IO1`" ]
pub type G1_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO1`" ]
pub struct G1_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `G1_IO2`" ]
pub type G1_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO2`" ]
pub struct G1_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `G1_IO3`" ]
pub type G1_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO3`" ]
pub struct G1_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `G1_IO4`" ]
pub type G1_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO4`" ]
pub struct G1_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `G2_IO1`" ]
pub type G2_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO1`" ]
pub struct G2_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `G2_IO2`" ]
pub type G2_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO2`" ]
pub struct G2_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `G2_IO3`" ]
pub type G2_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO3`" ]
pub struct G2_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `G2_IO4`" ]
pub type G2_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO4`" ]
pub struct G2_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `G3_IO1`" ]
pub type G3_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO1`" ]
pub struct G3_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `G3_IO2`" ]
pub type G3_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO2`" ]
pub struct G3_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `G3_IO3`" ]
pub type G3_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO3`" ]
pub struct G3_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `G3_IO4`" ]
pub type G3_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO4`" ]
pub struct G3_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `G4_IO1`" ]
pub type G4_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO1`" ]
pub struct G4_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `G4_IO2`" ]
pub type G4_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO2`" ]
pub struct G4_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `G4_IO3`" ]
pub type G4_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO3`" ]
pub struct G4_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `G4_IO4`" ]
pub type G4_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO4`" ]
pub struct G4_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `G5_IO1`" ]
pub type G5_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO1`" ]
pub struct G5_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `G5_IO2`" ]
pub type G5_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO2`" ]
pub struct G5_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `G5_IO3`" ]
pub type G5_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO3`" ]
pub struct G5_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `G5_IO4`" ]
pub type G5_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO4`" ]
pub struct G5_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `G6_IO1`" ]
pub type G6_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO1`" ]
pub struct G6_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `G6_IO2`" ]
pub type G6_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO2`" ]
pub struct G6_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `G6_IO3`" ]
pub type G6_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO3`" ]
pub struct G6_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `G6_IO4`" ]
pub type G6_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO4`" ]
pub struct G6_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `G7_IO1`" ]
pub type G7_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO1`" ]
pub struct G7_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `G7_IO2`" ]
pub type G7_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO2`" ]
pub struct G7_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `G7_IO3`" ]
pub type G7_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO3`" ]
pub struct G7_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `G7_IO4`" ]
pub type G7_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO4`" ]
pub struct G7_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Reader of field `G8_IO1`" ]
pub type G8_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO1`" ]
pub struct G8_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `G8_IO2`" ]
pub type G8_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO2`" ]
pub struct G8_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `G8_IO3`" ]
pub type G8_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO3`" ]
pub struct G8_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `G8_IO4`" ]
pub type G8_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO4`" ]
pub struct G8_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - G1_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & self ) -> G1_IO1_R { G1_IO1_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - G1_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & self ) -> G1_IO2_R { G1_IO2_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - G1_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & self ) -> G1_IO3_R { G1_IO3_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - G1_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & self ) -> G1_IO4_R { G1_IO4_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - G2_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & self ) -> G2_IO1_R { G2_IO1_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - G2_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & self ) -> G2_IO2_R { G2_IO2_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - G2_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & self ) -> G2_IO3_R { G2_IO3_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - G2_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & self ) -> G2_IO4_R { G2_IO4_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - G3_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & self ) -> G3_IO1_R { G3_IO1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - G3_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & self ) -> G3_IO2_R { G3_IO2_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - G3_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & self ) -> G3_IO3_R { G3_IO3_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - G3_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & self ) -> G3_IO4_R { G3_IO4_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - G4_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & self ) -> G4_IO1_R { G4_IO1_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - G4_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & self ) -> G4_IO2_R { G4_IO2_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - G4_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & self ) -> G4_IO3_R { G4_IO3_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - G4_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & self ) -> G4_IO4_R { G4_IO4_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - G5_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & self ) -> G5_IO1_R { G5_IO1_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - G5_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & self ) -> G5_IO2_R { G5_IO2_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - G5_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & self ) -> G5_IO3_R { G5_IO3_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - G5_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & self ) -> G5_IO4_R { G5_IO4_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - G6_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & self ) -> G6_IO1_R { G6_IO1_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - G6_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & self ) -> G6_IO2_R { G6_IO2_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - G6_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & self ) -> G6_IO3_R { G6_IO3_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - G6_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & self ) -> G6_IO4_R { G6_IO4_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - G7_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & self ) -> G7_IO1_R { G7_IO1_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - G7_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & self ) -> G7_IO2_R { G7_IO2_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - G7_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & self ) -> G7_IO3_R { G7_IO3_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - G7_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & self ) -> G7_IO4_R { G7_IO4_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - G8_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & self ) -> G8_IO1_R { G8_IO1_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - G8_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & self ) -> G8_IO2_R { G8_IO2_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - G8_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & self ) -> G8_IO3_R { G8_IO3_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - G8_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & self ) -> G8_IO4_R { G8_IO4_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - G1_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & mut self ) -> G1_IO1_W { G1_IO1_W { w : self } } # [ doc = "Bit 1 - G1_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & mut self ) -> G1_IO2_W { G1_IO2_W { w : self } } # [ doc = "Bit 2 - G1_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & mut self ) -> G1_IO3_W { G1_IO3_W { w : self } } # [ doc = "Bit 3 - G1_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & mut self ) -> G1_IO4_W { G1_IO4_W { w : self } } # [ doc = "Bit 4 - G2_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & mut self ) -> G2_IO1_W { G2_IO1_W { w : self } } # [ doc = "Bit 5 - G2_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & mut self ) -> G2_IO2_W { G2_IO2_W { w : self } } # [ doc = "Bit 6 - G2_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & mut self ) -> G2_IO3_W { G2_IO3_W { w : self } } # [ doc = "Bit 7 - G2_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & mut self ) -> G2_IO4_W { G2_IO4_W { w : self } } # [ doc = "Bit 8 - G3_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & mut self ) -> G3_IO1_W { G3_IO1_W { w : self } } # [ doc = "Bit 9 - G3_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & mut self ) -> G3_IO2_W { G3_IO2_W { w : self } } # [ doc = "Bit 10 - G3_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & mut self ) -> G3_IO3_W { G3_IO3_W { w : self } } # [ doc = "Bit 11 - G3_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & mut self ) -> G3_IO4_W { G3_IO4_W { w : self } } # [ doc = "Bit 12 - G4_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & mut self ) -> G4_IO1_W { G4_IO1_W { w : self } } # [ doc = "Bit 13 - G4_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & mut self ) -> G4_IO2_W { G4_IO2_W { w : self } } # [ doc = "Bit 14 - G4_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & mut self ) -> G4_IO3_W { G4_IO3_W { w : self } } # [ doc = "Bit 15 - G4_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & mut self ) -> G4_IO4_W { G4_IO4_W { w : self } } # [ doc = "Bit 16 - G5_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & mut self ) -> G5_IO1_W { G5_IO1_W { w : self } } # [ doc = "Bit 17 - G5_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & mut self ) -> G5_IO2_W { G5_IO2_W { w : self } } # [ doc = "Bit 18 - G5_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & mut self ) -> G5_IO3_W { G5_IO3_W { w : self } } # [ doc = "Bit 19 - G5_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & mut self ) -> G5_IO4_W { G5_IO4_W { w : self } } # [ doc = "Bit 20 - G6_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & mut self ) -> G6_IO1_W { G6_IO1_W { w : self } } # [ doc = "Bit 21 - G6_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & mut self ) -> G6_IO2_W { G6_IO2_W { w : self } } # [ doc = "Bit 22 - G6_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & mut self ) -> G6_IO3_W { G6_IO3_W { w : self } } # [ doc = "Bit 23 - G6_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & mut self ) -> G6_IO4_W { G6_IO4_W { w : self } } # [ doc = "Bit 24 - G7_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & mut self ) -> G7_IO1_W { G7_IO1_W { w : self } } # [ doc = "Bit 25 - G7_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & mut self ) -> G7_IO2_W { G7_IO2_W { w : self } } # [ doc = "Bit 26 - G7_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & mut self ) -> G7_IO3_W { G7_IO3_W { w : self } } # [ doc = "Bit 27 - G7_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & mut self ) -> G7_IO4_W { G7_IO4_W { w : self } } # [ doc = "Bit 28 - G8_IO1 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & mut self ) -> G8_IO1_W { G8_IO1_W { w : self } } # [ doc = "Bit 29 - G8_IO2 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & mut self ) -> G8_IO2_W { G8_IO2_W { w : self } } # [ doc = "Bit 30 - G8_IO3 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & mut self ) -> G8_IO3_W { G8_IO3_W { w : self } } # [ doc = "Bit 31 - G8_IO4 Schmitt trigger hysteresis mode" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & mut self ) -> G8_IO4_W { G8_IO4_W { w : self } } } } # [ doc = "I/O analog switch control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioascr](ioascr) module" ]
pub type IOASCR = crate :: Reg < u32 , _IOASCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IOASCR ; # [ doc = "`read()` method returns [ioascr::R](ioascr::R) reader structure" ]
impl crate :: Readable for IOASCR { } # [ doc = "`write(|w| ..)` method takes [ioascr::W](ioascr::W) writer structure" ]
impl crate :: Writable for IOASCR { } # [ doc = "I/O analog switch control register" ]
pub mod ioascr { # [ doc = "Reader of register IOASCR" ]
pub type R = crate :: R < u32 , super :: IOASCR > ; # [ doc = "Writer for register IOASCR" ]
pub type W = crate :: W < u32 , super :: IOASCR > ; # [ doc = "Register IOASCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IOASCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `G1_IO1`" ]
pub type G1_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO1`" ]
pub struct G1_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `G1_IO2`" ]
pub type G1_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO2`" ]
pub struct G1_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `G1_IO3`" ]
pub type G1_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO3`" ]
pub struct G1_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `G1_IO4`" ]
pub type G1_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO4`" ]
pub struct G1_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `G2_IO1`" ]
pub type G2_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO1`" ]
pub struct G2_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `G2_IO2`" ]
pub type G2_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO2`" ]
pub struct G2_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `G2_IO3`" ]
pub type G2_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO3`" ]
pub struct G2_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `G2_IO4`" ]
pub type G2_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO4`" ]
pub struct G2_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `G3_IO1`" ]
pub type G3_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO1`" ]
pub struct G3_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `G3_IO2`" ]
pub type G3_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO2`" ]
pub struct G3_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `G3_IO3`" ]
pub type G3_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO3`" ]
pub struct G3_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `G3_IO4`" ]
pub type G3_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO4`" ]
pub struct G3_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `G4_IO1`" ]
pub type G4_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO1`" ]
pub struct G4_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `G4_IO2`" ]
pub type G4_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO2`" ]
pub struct G4_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `G4_IO3`" ]
pub type G4_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO3`" ]
pub struct G4_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `G4_IO4`" ]
pub type G4_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO4`" ]
pub struct G4_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `G5_IO1`" ]
pub type G5_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO1`" ]
pub struct G5_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `G5_IO2`" ]
pub type G5_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO2`" ]
pub struct G5_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `G5_IO3`" ]
pub type G5_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO3`" ]
pub struct G5_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `G5_IO4`" ]
pub type G5_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO4`" ]
pub struct G5_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `G6_IO1`" ]
pub type G6_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO1`" ]
pub struct G6_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `G6_IO2`" ]
pub type G6_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO2`" ]
pub struct G6_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `G6_IO3`" ]
pub type G6_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO3`" ]
pub struct G6_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `G6_IO4`" ]
pub type G6_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO4`" ]
pub struct G6_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `G7_IO1`" ]
pub type G7_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO1`" ]
pub struct G7_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `G7_IO2`" ]
pub type G7_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO2`" ]
pub struct G7_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `G7_IO3`" ]
pub type G7_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO3`" ]
pub struct G7_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `G7_IO4`" ]
pub type G7_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO4`" ]
pub struct G7_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Reader of field `G8_IO1`" ]
pub type G8_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO1`" ]
pub struct G8_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `G8_IO2`" ]
pub type G8_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO2`" ]
pub struct G8_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `G8_IO3`" ]
pub type G8_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO3`" ]
pub struct G8_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `G8_IO4`" ]
pub type G8_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO4`" ]
pub struct G8_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - G1_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & self ) -> G1_IO1_R { G1_IO1_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - G1_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & self ) -> G1_IO2_R { G1_IO2_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - G1_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & self ) -> G1_IO3_R { G1_IO3_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - G1_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & self ) -> G1_IO4_R { G1_IO4_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - G2_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & self ) -> G2_IO1_R { G2_IO1_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - G2_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & self ) -> G2_IO2_R { G2_IO2_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - G2_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & self ) -> G2_IO3_R { G2_IO3_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - G2_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & self ) -> G2_IO4_R { G2_IO4_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - G3_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & self ) -> G3_IO1_R { G3_IO1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - G3_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & self ) -> G3_IO2_R { G3_IO2_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - G3_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & self ) -> G3_IO3_R { G3_IO3_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - G3_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & self ) -> G3_IO4_R { G3_IO4_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - G4_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & self ) -> G4_IO1_R { G4_IO1_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - G4_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & self ) -> G4_IO2_R { G4_IO2_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - G4_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & self ) -> G4_IO3_R { G4_IO3_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - G4_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & self ) -> G4_IO4_R { G4_IO4_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - G5_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & self ) -> G5_IO1_R { G5_IO1_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - G5_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & self ) -> G5_IO2_R { G5_IO2_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - G5_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & self ) -> G5_IO3_R { G5_IO3_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - G5_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & self ) -> G5_IO4_R { G5_IO4_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - G6_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & self ) -> G6_IO1_R { G6_IO1_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - G6_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & self ) -> G6_IO2_R { G6_IO2_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - G6_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & self ) -> G6_IO3_R { G6_IO3_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - G6_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & self ) -> G6_IO4_R { G6_IO4_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - G7_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & self ) -> G7_IO1_R { G7_IO1_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - G7_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & self ) -> G7_IO2_R { G7_IO2_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - G7_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & self ) -> G7_IO3_R { G7_IO3_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - G7_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & self ) -> G7_IO4_R { G7_IO4_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - G8_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & self ) -> G8_IO1_R { G8_IO1_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - G8_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & self ) -> G8_IO2_R { G8_IO2_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - G8_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & self ) -> G8_IO3_R { G8_IO3_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - G8_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & self ) -> G8_IO4_R { G8_IO4_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - G1_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & mut self ) -> G1_IO1_W { G1_IO1_W { w : self } } # [ doc = "Bit 1 - G1_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & mut self ) -> G1_IO2_W { G1_IO2_W { w : self } } # [ doc = "Bit 2 - G1_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & mut self ) -> G1_IO3_W { G1_IO3_W { w : self } } # [ doc = "Bit 3 - G1_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & mut self ) -> G1_IO4_W { G1_IO4_W { w : self } } # [ doc = "Bit 4 - G2_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & mut self ) -> G2_IO1_W { G2_IO1_W { w : self } } # [ doc = "Bit 5 - G2_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & mut self ) -> G2_IO2_W { G2_IO2_W { w : self } } # [ doc = "Bit 6 - G2_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & mut self ) -> G2_IO3_W { G2_IO3_W { w : self } } # [ doc = "Bit 7 - G2_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & mut self ) -> G2_IO4_W { G2_IO4_W { w : self } } # [ doc = "Bit 8 - G3_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & mut self ) -> G3_IO1_W { G3_IO1_W { w : self } } # [ doc = "Bit 9 - G3_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & mut self ) -> G3_IO2_W { G3_IO2_W { w : self } } # [ doc = "Bit 10 - G3_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & mut self ) -> G3_IO3_W { G3_IO3_W { w : self } } # [ doc = "Bit 11 - G3_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & mut self ) -> G3_IO4_W { G3_IO4_W { w : self } } # [ doc = "Bit 12 - G4_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & mut self ) -> G4_IO1_W { G4_IO1_W { w : self } } # [ doc = "Bit 13 - G4_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & mut self ) -> G4_IO2_W { G4_IO2_W { w : self } } # [ doc = "Bit 14 - G4_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & mut self ) -> G4_IO3_W { G4_IO3_W { w : self } } # [ doc = "Bit 15 - G4_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & mut self ) -> G4_IO4_W { G4_IO4_W { w : self } } # [ doc = "Bit 16 - G5_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & mut self ) -> G5_IO1_W { G5_IO1_W { w : self } } # [ doc = "Bit 17 - G5_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & mut self ) -> G5_IO2_W { G5_IO2_W { w : self } } # [ doc = "Bit 18 - G5_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & mut self ) -> G5_IO3_W { G5_IO3_W { w : self } } # [ doc = "Bit 19 - G5_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & mut self ) -> G5_IO4_W { G5_IO4_W { w : self } } # [ doc = "Bit 20 - G6_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & mut self ) -> G6_IO1_W { G6_IO1_W { w : self } } # [ doc = "Bit 21 - G6_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & mut self ) -> G6_IO2_W { G6_IO2_W { w : self } } # [ doc = "Bit 22 - G6_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & mut self ) -> G6_IO3_W { G6_IO3_W { w : self } } # [ doc = "Bit 23 - G6_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & mut self ) -> G6_IO4_W { G6_IO4_W { w : self } } # [ doc = "Bit 24 - G7_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & mut self ) -> G7_IO1_W { G7_IO1_W { w : self } } # [ doc = "Bit 25 - G7_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & mut self ) -> G7_IO2_W { G7_IO2_W { w : self } } # [ doc = "Bit 26 - G7_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & mut self ) -> G7_IO3_W { G7_IO3_W { w : self } } # [ doc = "Bit 27 - G7_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & mut self ) -> G7_IO4_W { G7_IO4_W { w : self } } # [ doc = "Bit 28 - G8_IO1 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & mut self ) -> G8_IO1_W { G8_IO1_W { w : self } } # [ doc = "Bit 29 - G8_IO2 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & mut self ) -> G8_IO2_W { G8_IO2_W { w : self } } # [ doc = "Bit 30 - G8_IO3 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & mut self ) -> G8_IO3_W { G8_IO3_W { w : self } } # [ doc = "Bit 31 - G8_IO4 analog switch enable" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & mut self ) -> G8_IO4_W { G8_IO4_W { w : self } } } } # [ doc = "I/O sampling control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioscr](ioscr) module" ]
pub type IOSCR = crate :: Reg < u32 , _IOSCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IOSCR ; # [ doc = "`read()` method returns [ioscr::R](ioscr::R) reader structure" ]
impl crate :: Readable for IOSCR { } # [ doc = "`write(|w| ..)` method takes [ioscr::W](ioscr::W) writer structure" ]
impl crate :: Writable for IOSCR { } # [ doc = "I/O sampling control register" ]
pub mod ioscr { # [ doc = "Reader of register IOSCR" ]
pub type R = crate :: R < u32 , super :: IOSCR > ; # [ doc = "Writer for register IOSCR" ]
pub type W = crate :: W < u32 , super :: IOSCR > ; # [ doc = "Register IOSCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IOSCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `G1_IO1`" ]
pub type G1_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO1`" ]
pub struct G1_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `G1_IO2`" ]
pub type G1_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO2`" ]
pub struct G1_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `G1_IO3`" ]
pub type G1_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO3`" ]
pub struct G1_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `G1_IO4`" ]
pub type G1_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO4`" ]
pub struct G1_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `G2_IO1`" ]
pub type G2_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO1`" ]
pub struct G2_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `G2_IO2`" ]
pub type G2_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO2`" ]
pub struct G2_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `G2_IO3`" ]
pub type G2_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO3`" ]
pub struct G2_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `G2_IO4`" ]
pub type G2_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO4`" ]
pub struct G2_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `G3_IO1`" ]
pub type G3_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO1`" ]
pub struct G3_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `G3_IO2`" ]
pub type G3_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO2`" ]
pub struct G3_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `G3_IO3`" ]
pub type G3_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO3`" ]
pub struct G3_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `G3_IO4`" ]
pub type G3_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO4`" ]
pub struct G3_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `G4_IO1`" ]
pub type G4_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO1`" ]
pub struct G4_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `G4_IO2`" ]
pub type G4_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO2`" ]
pub struct G4_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `G4_IO3`" ]
pub type G4_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO3`" ]
pub struct G4_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `G4_IO4`" ]
pub type G4_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO4`" ]
pub struct G4_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `G5_IO1`" ]
pub type G5_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO1`" ]
pub struct G5_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `G5_IO2`" ]
pub type G5_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO2`" ]
pub struct G5_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `G5_IO3`" ]
pub type G5_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO3`" ]
pub struct G5_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `G5_IO4`" ]
pub type G5_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO4`" ]
pub struct G5_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `G6_IO1`" ]
pub type G6_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO1`" ]
pub struct G6_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `G6_IO2`" ]
pub type G6_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO2`" ]
pub struct G6_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `G6_IO3`" ]
pub type G6_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO3`" ]
pub struct G6_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `G6_IO4`" ]
pub type G6_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO4`" ]
pub struct G6_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `G7_IO1`" ]
pub type G7_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO1`" ]
pub struct G7_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `G7_IO2`" ]
pub type G7_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO2`" ]
pub struct G7_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `G7_IO3`" ]
pub type G7_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO3`" ]
pub struct G7_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `G7_IO4`" ]
pub type G7_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO4`" ]
pub struct G7_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Reader of field `G8_IO1`" ]
pub type G8_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO1`" ]
pub struct G8_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `G8_IO2`" ]
pub type G8_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO2`" ]
pub struct G8_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `G8_IO3`" ]
pub type G8_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO3`" ]
pub struct G8_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `G8_IO4`" ]
pub type G8_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO4`" ]
pub struct G8_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - G1_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & self ) -> G1_IO1_R { G1_IO1_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - G1_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & self ) -> G1_IO2_R { G1_IO2_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - G1_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & self ) -> G1_IO3_R { G1_IO3_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - G1_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & self ) -> G1_IO4_R { G1_IO4_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - G2_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & self ) -> G2_IO1_R { G2_IO1_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - G2_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & self ) -> G2_IO2_R { G2_IO2_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - G2_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & self ) -> G2_IO3_R { G2_IO3_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - G2_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & self ) -> G2_IO4_R { G2_IO4_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - G3_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & self ) -> G3_IO1_R { G3_IO1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - G3_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & self ) -> G3_IO2_R { G3_IO2_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - G3_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & self ) -> G3_IO3_R { G3_IO3_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - G3_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & self ) -> G3_IO4_R { G3_IO4_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - G4_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & self ) -> G4_IO1_R { G4_IO1_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - G4_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & self ) -> G4_IO2_R { G4_IO2_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - G4_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & self ) -> G4_IO3_R { G4_IO3_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - G4_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & self ) -> G4_IO4_R { G4_IO4_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - G5_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & self ) -> G5_IO1_R { G5_IO1_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - G5_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & self ) -> G5_IO2_R { G5_IO2_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - G5_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & self ) -> G5_IO3_R { G5_IO3_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - G5_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & self ) -> G5_IO4_R { G5_IO4_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - G6_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & self ) -> G6_IO1_R { G6_IO1_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - G6_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & self ) -> G6_IO2_R { G6_IO2_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - G6_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & self ) -> G6_IO3_R { G6_IO3_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - G6_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & self ) -> G6_IO4_R { G6_IO4_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - G7_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & self ) -> G7_IO1_R { G7_IO1_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - G7_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & self ) -> G7_IO2_R { G7_IO2_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - G7_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & self ) -> G7_IO3_R { G7_IO3_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - G7_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & self ) -> G7_IO4_R { G7_IO4_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - G8_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & self ) -> G8_IO1_R { G8_IO1_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - G8_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & self ) -> G8_IO2_R { G8_IO2_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - G8_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & self ) -> G8_IO3_R { G8_IO3_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - G8_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & self ) -> G8_IO4_R { G8_IO4_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - G1_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & mut self ) -> G1_IO1_W { G1_IO1_W { w : self } } # [ doc = "Bit 1 - G1_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & mut self ) -> G1_IO2_W { G1_IO2_W { w : self } } # [ doc = "Bit 2 - G1_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & mut self ) -> G1_IO3_W { G1_IO3_W { w : self } } # [ doc = "Bit 3 - G1_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & mut self ) -> G1_IO4_W { G1_IO4_W { w : self } } # [ doc = "Bit 4 - G2_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & mut self ) -> G2_IO1_W { G2_IO1_W { w : self } } # [ doc = "Bit 5 - G2_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & mut self ) -> G2_IO2_W { G2_IO2_W { w : self } } # [ doc = "Bit 6 - G2_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & mut self ) -> G2_IO3_W { G2_IO3_W { w : self } } # [ doc = "Bit 7 - G2_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & mut self ) -> G2_IO4_W { G2_IO4_W { w : self } } # [ doc = "Bit 8 - G3_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & mut self ) -> G3_IO1_W { G3_IO1_W { w : self } } # [ doc = "Bit 9 - G3_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & mut self ) -> G3_IO2_W { G3_IO2_W { w : self } } # [ doc = "Bit 10 - G3_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & mut self ) -> G3_IO3_W { G3_IO3_W { w : self } } # [ doc = "Bit 11 - G3_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & mut self ) -> G3_IO4_W { G3_IO4_W { w : self } } # [ doc = "Bit 12 - G4_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & mut self ) -> G4_IO1_W { G4_IO1_W { w : self } } # [ doc = "Bit 13 - G4_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & mut self ) -> G4_IO2_W { G4_IO2_W { w : self } } # [ doc = "Bit 14 - G4_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & mut self ) -> G4_IO3_W { G4_IO3_W { w : self } } # [ doc = "Bit 15 - G4_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & mut self ) -> G4_IO4_W { G4_IO4_W { w : self } } # [ doc = "Bit 16 - G5_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & mut self ) -> G5_IO1_W { G5_IO1_W { w : self } } # [ doc = "Bit 17 - G5_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & mut self ) -> G5_IO2_W { G5_IO2_W { w : self } } # [ doc = "Bit 18 - G5_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & mut self ) -> G5_IO3_W { G5_IO3_W { w : self } } # [ doc = "Bit 19 - G5_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & mut self ) -> G5_IO4_W { G5_IO4_W { w : self } } # [ doc = "Bit 20 - G6_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & mut self ) -> G6_IO1_W { G6_IO1_W { w : self } } # [ doc = "Bit 21 - G6_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & mut self ) -> G6_IO2_W { G6_IO2_W { w : self } } # [ doc = "Bit 22 - G6_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & mut self ) -> G6_IO3_W { G6_IO3_W { w : self } } # [ doc = "Bit 23 - G6_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & mut self ) -> G6_IO4_W { G6_IO4_W { w : self } } # [ doc = "Bit 24 - G7_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & mut self ) -> G7_IO1_W { G7_IO1_W { w : self } } # [ doc = "Bit 25 - G7_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & mut self ) -> G7_IO2_W { G7_IO2_W { w : self } } # [ doc = "Bit 26 - G7_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & mut self ) -> G7_IO3_W { G7_IO3_W { w : self } } # [ doc = "Bit 27 - G7_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & mut self ) -> G7_IO4_W { G7_IO4_W { w : self } } # [ doc = "Bit 28 - G8_IO1 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & mut self ) -> G8_IO1_W { G8_IO1_W { w : self } } # [ doc = "Bit 29 - G8_IO2 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & mut self ) -> G8_IO2_W { G8_IO2_W { w : self } } # [ doc = "Bit 30 - G8_IO3 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & mut self ) -> G8_IO3_W { G8_IO3_W { w : self } } # [ doc = "Bit 31 - G8_IO4 sampling mode" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & mut self ) -> G8_IO4_W { G8_IO4_W { w : self } } } } # [ doc = "I/O channel control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioccr](ioccr) module" ]
pub type IOCCR = crate :: Reg < u32 , _IOCCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IOCCR ; # [ doc = "`read()` method returns [ioccr::R](ioccr::R) reader structure" ]
impl crate :: Readable for IOCCR { } # [ doc = "`write(|w| ..)` method takes [ioccr::W](ioccr::W) writer structure" ]
impl crate :: Writable for IOCCR { } # [ doc = "I/O channel control register" ]
pub mod ioccr { # [ doc = "Reader of register IOCCR" ]
pub type R = crate :: R < u32 , super :: IOCCR > ; # [ doc = "Writer for register IOCCR" ]
pub type W = crate :: W < u32 , super :: IOCCR > ; # [ doc = "Register IOCCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IOCCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `G1_IO1`" ]
pub type G1_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO1`" ]
pub struct G1_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `G1_IO2`" ]
pub type G1_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO2`" ]
pub struct G1_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `G1_IO3`" ]
pub type G1_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO3`" ]
pub struct G1_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `G1_IO4`" ]
pub type G1_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1_IO4`" ]
pub struct G1_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G1_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `G2_IO1`" ]
pub type G2_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO1`" ]
pub struct G2_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `G2_IO2`" ]
pub type G2_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO2`" ]
pub struct G2_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `G2_IO3`" ]
pub type G2_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO3`" ]
pub struct G2_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `G2_IO4`" ]
pub type G2_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2_IO4`" ]
pub struct G2_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G2_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `G3_IO1`" ]
pub type G3_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO1`" ]
pub struct G3_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `G3_IO2`" ]
pub type G3_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO2`" ]
pub struct G3_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `G3_IO3`" ]
pub type G3_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO3`" ]
pub struct G3_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `G3_IO4`" ]
pub type G3_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3_IO4`" ]
pub struct G3_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G3_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `G4_IO1`" ]
pub type G4_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO1`" ]
pub struct G4_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `G4_IO2`" ]
pub type G4_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO2`" ]
pub struct G4_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `G4_IO3`" ]
pub type G4_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO3`" ]
pub struct G4_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `G4_IO4`" ]
pub type G4_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4_IO4`" ]
pub struct G4_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G4_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `G5_IO1`" ]
pub type G5_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO1`" ]
pub struct G5_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `G5_IO2`" ]
pub type G5_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO2`" ]
pub struct G5_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `G5_IO3`" ]
pub type G5_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO3`" ]
pub struct G5_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `G5_IO4`" ]
pub type G5_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5_IO4`" ]
pub struct G5_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G5_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `G6_IO1`" ]
pub type G6_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO1`" ]
pub struct G6_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `G6_IO2`" ]
pub type G6_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO2`" ]
pub struct G6_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `G6_IO3`" ]
pub type G6_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO3`" ]
pub struct G6_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `G6_IO4`" ]
pub type G6_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6_IO4`" ]
pub struct G6_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G6_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `G7_IO1`" ]
pub type G7_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO1`" ]
pub struct G7_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `G7_IO2`" ]
pub type G7_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO2`" ]
pub struct G7_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `G7_IO3`" ]
pub type G7_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO3`" ]
pub struct G7_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `G7_IO4`" ]
pub type G7_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7_IO4`" ]
pub struct G7_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G7_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Reader of field `G8_IO1`" ]
pub type G8_IO1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO1`" ]
pub struct G8_IO1_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `G8_IO2`" ]
pub type G8_IO2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO2`" ]
pub struct G8_IO2_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `G8_IO3`" ]
pub type G8_IO3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO3`" ]
pub struct G8_IO3_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `G8_IO4`" ]
pub type G8_IO4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8_IO4`" ]
pub struct G8_IO4_W < 'a > { w : & 'a mut W , } impl < 'a > G8_IO4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - G1_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & self ) -> G1_IO1_R { G1_IO1_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - G1_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & self ) -> G1_IO2_R { G1_IO2_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - G1_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & self ) -> G1_IO3_R { G1_IO3_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - G1_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & self ) -> G1_IO4_R { G1_IO4_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - G2_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & self ) -> G2_IO1_R { G2_IO1_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - G2_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & self ) -> G2_IO2_R { G2_IO2_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - G2_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & self ) -> G2_IO3_R { G2_IO3_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - G2_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & self ) -> G2_IO4_R { G2_IO4_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - G3_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & self ) -> G3_IO1_R { G3_IO1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - G3_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & self ) -> G3_IO2_R { G3_IO2_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - G3_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & self ) -> G3_IO3_R { G3_IO3_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - G3_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & self ) -> G3_IO4_R { G3_IO4_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - G4_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & self ) -> G4_IO1_R { G4_IO1_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - G4_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & self ) -> G4_IO2_R { G4_IO2_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - G4_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & self ) -> G4_IO3_R { G4_IO3_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - G4_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & self ) -> G4_IO4_R { G4_IO4_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - G5_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & self ) -> G5_IO1_R { G5_IO1_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - G5_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & self ) -> G5_IO2_R { G5_IO2_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - G5_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & self ) -> G5_IO3_R { G5_IO3_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - G5_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & self ) -> G5_IO4_R { G5_IO4_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - G6_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & self ) -> G6_IO1_R { G6_IO1_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - G6_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & self ) -> G6_IO2_R { G6_IO2_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - G6_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & self ) -> G6_IO3_R { G6_IO3_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - G6_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & self ) -> G6_IO4_R { G6_IO4_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - G7_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & self ) -> G7_IO1_R { G7_IO1_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - G7_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & self ) -> G7_IO2_R { G7_IO2_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - G7_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & self ) -> G7_IO3_R { G7_IO3_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - G7_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & self ) -> G7_IO4_R { G7_IO4_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - G8_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & self ) -> G8_IO1_R { G8_IO1_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - G8_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & self ) -> G8_IO2_R { G8_IO2_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - G8_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & self ) -> G8_IO3_R { G8_IO3_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - G8_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & self ) -> G8_IO4_R { G8_IO4_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - G1_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io1 ( & mut self ) -> G1_IO1_W { G1_IO1_W { w : self } } # [ doc = "Bit 1 - G1_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io2 ( & mut self ) -> G1_IO2_W { G1_IO2_W { w : self } } # [ doc = "Bit 2 - G1_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io3 ( & mut self ) -> G1_IO3_W { G1_IO3_W { w : self } } # [ doc = "Bit 3 - G1_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g1_io4 ( & mut self ) -> G1_IO4_W { G1_IO4_W { w : self } } # [ doc = "Bit 4 - G2_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io1 ( & mut self ) -> G2_IO1_W { G2_IO1_W { w : self } } # [ doc = "Bit 5 - G2_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io2 ( & mut self ) -> G2_IO2_W { G2_IO2_W { w : self } } # [ doc = "Bit 6 - G2_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io3 ( & mut self ) -> G2_IO3_W { G2_IO3_W { w : self } } # [ doc = "Bit 7 - G2_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g2_io4 ( & mut self ) -> G2_IO4_W { G2_IO4_W { w : self } } # [ doc = "Bit 8 - G3_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io1 ( & mut self ) -> G3_IO1_W { G3_IO1_W { w : self } } # [ doc = "Bit 9 - G3_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io2 ( & mut self ) -> G3_IO2_W { G3_IO2_W { w : self } } # [ doc = "Bit 10 - G3_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io3 ( & mut self ) -> G3_IO3_W { G3_IO3_W { w : self } } # [ doc = "Bit 11 - G3_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g3_io4 ( & mut self ) -> G3_IO4_W { G3_IO4_W { w : self } } # [ doc = "Bit 12 - G4_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io1 ( & mut self ) -> G4_IO1_W { G4_IO1_W { w : self } } # [ doc = "Bit 13 - G4_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io2 ( & mut self ) -> G4_IO2_W { G4_IO2_W { w : self } } # [ doc = "Bit 14 - G4_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io3 ( & mut self ) -> G4_IO3_W { G4_IO3_W { w : self } } # [ doc = "Bit 15 - G4_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g4_io4 ( & mut self ) -> G4_IO4_W { G4_IO4_W { w : self } } # [ doc = "Bit 16 - G5_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io1 ( & mut self ) -> G5_IO1_W { G5_IO1_W { w : self } } # [ doc = "Bit 17 - G5_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io2 ( & mut self ) -> G5_IO2_W { G5_IO2_W { w : self } } # [ doc = "Bit 18 - G5_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io3 ( & mut self ) -> G5_IO3_W { G5_IO3_W { w : self } } # [ doc = "Bit 19 - G5_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g5_io4 ( & mut self ) -> G5_IO4_W { G5_IO4_W { w : self } } # [ doc = "Bit 20 - G6_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io1 ( & mut self ) -> G6_IO1_W { G6_IO1_W { w : self } } # [ doc = "Bit 21 - G6_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io2 ( & mut self ) -> G6_IO2_W { G6_IO2_W { w : self } } # [ doc = "Bit 22 - G6_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io3 ( & mut self ) -> G6_IO3_W { G6_IO3_W { w : self } } # [ doc = "Bit 23 - G6_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g6_io4 ( & mut self ) -> G6_IO4_W { G6_IO4_W { w : self } } # [ doc = "Bit 24 - G7_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io1 ( & mut self ) -> G7_IO1_W { G7_IO1_W { w : self } } # [ doc = "Bit 25 - G7_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io2 ( & mut self ) -> G7_IO2_W { G7_IO2_W { w : self } } # [ doc = "Bit 26 - G7_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io3 ( & mut self ) -> G7_IO3_W { G7_IO3_W { w : self } } # [ doc = "Bit 27 - G7_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g7_io4 ( & mut self ) -> G7_IO4_W { G7_IO4_W { w : self } } # [ doc = "Bit 28 - G8_IO1 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io1 ( & mut self ) -> G8_IO1_W { G8_IO1_W { w : self } } # [ doc = "Bit 29 - G8_IO2 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io2 ( & mut self ) -> G8_IO2_W { G8_IO2_W { w : self } } # [ doc = "Bit 30 - G8_IO3 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io3 ( & mut self ) -> G8_IO3_W { G8_IO3_W { w : self } } # [ doc = "Bit 31 - G8_IO4 channel mode" ]
# [ inline ( always ) ]
pub fn g8_io4 ( & mut self ) -> G8_IO4_W { G8_IO4_W { w : self } } } } # [ doc = "I/O group control status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iogcsr](iogcsr) module" ]
pub type IOGCSR = crate :: Reg < u32 , _IOGCSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IOGCSR ; # [ doc = "`read()` method returns [iogcsr::R](iogcsr::R) reader structure" ]
impl crate :: Readable for IOGCSR { } # [ doc = "`write(|w| ..)` method takes [iogcsr::W](iogcsr::W) writer structure" ]
impl crate :: Writable for IOGCSR { } # [ doc = "I/O group control status register" ]
pub mod iogcsr { # [ doc = "Reader of register IOGCSR" ]
pub type R = crate :: R < u32 , super :: IOGCSR > ; # [ doc = "Writer for register IOGCSR" ]
pub type W = crate :: W < u32 , super :: IOGCSR > ; # [ doc = "Register IOGCSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IOGCSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `G8S`" ]
pub type G8S_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8S`" ]
pub struct G8S_W < 'a > { w : & 'a mut W , } impl < 'a > G8S_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `G7S`" ]
pub type G7S_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7S`" ]
pub struct G7S_W < 'a > { w : & 'a mut W , } impl < 'a > G7S_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `G6S`" ]
pub type G6S_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `G5S`" ]
pub type G5S_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `G4S`" ]
pub type G4S_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `G3S`" ]
pub type G3S_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `G2S`" ]
pub type G2S_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `G1S`" ]
pub type G1S_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `G8E`" ]
pub type G8E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G8E`" ]
pub struct G8E_W < 'a > { w : & 'a mut W , } impl < 'a > G8E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `G7E`" ]
pub type G7E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G7E`" ]
pub struct G7E_W < 'a > { w : & 'a mut W , } impl < 'a > G7E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `G6E`" ]
pub type G6E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G6E`" ]
pub struct G6E_W < 'a > { w : & 'a mut W , } impl < 'a > G6E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `G5E`" ]
pub type G5E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G5E`" ]
pub struct G5E_W < 'a > { w : & 'a mut W , } impl < 'a > G5E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `G4E`" ]
pub type G4E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G4E`" ]
pub struct G4E_W < 'a > { w : & 'a mut W , } impl < 'a > G4E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `G3E`" ]
pub type G3E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G3E`" ]
pub struct G3E_W < 'a > { w : & 'a mut W , } impl < 'a > G3E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `G2E`" ]
pub type G2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G2E`" ]
pub struct G2E_W < 'a > { w : & 'a mut W , } impl < 'a > G2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `G1E`" ]
pub type G1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `G1E`" ]
pub struct G1E_W < 'a > { w : & 'a mut W , } impl < 'a > G1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 23 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g8s ( & self ) -> G8S_R { G8S_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g7s ( & self ) -> G7S_R { G7S_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g6s ( & self ) -> G6S_R { G6S_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g5s ( & self ) -> G5S_R { G5S_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g4s ( & self ) -> G4S_R { G4S_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g3s ( & self ) -> G3S_R { G3S_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g2s ( & self ) -> G2S_R { G2S_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g1s ( & self ) -> G1S_R { G1S_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g8e ( & self ) -> G8E_R { G8E_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g7e ( & self ) -> G7E_R { G7E_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g6e ( & self ) -> G6E_R { G6E_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g5e ( & self ) -> G5E_R { G5E_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g4e ( & self ) -> G4E_R { G4E_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g3e ( & self ) -> G3E_R { G3E_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g2e ( & self ) -> G2E_R { G2E_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g1e ( & self ) -> G1E_R { G1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 23 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g8s ( & mut self ) -> G8S_W { G8S_W { w : self } } # [ doc = "Bit 22 - Analog I/O group x status" ]
# [ inline ( always ) ]
pub fn g7s ( & mut self ) -> G7S_W { G7S_W { w : self } } # [ doc = "Bit 7 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g8e ( & mut self ) -> G8E_W { G8E_W { w : self } } # [ doc = "Bit 6 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g7e ( & mut self ) -> G7E_W { G7E_W { w : self } } # [ doc = "Bit 5 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g6e ( & mut self ) -> G6E_W { G6E_W { w : self } } # [ doc = "Bit 4 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g5e ( & mut self ) -> G5E_W { G5E_W { w : self } } # [ doc = "Bit 3 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g4e ( & mut self ) -> G4E_W { G4E_W { w : self } } # [ doc = "Bit 2 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g3e ( & mut self ) -> G3E_W { G3E_W { w : self } } # [ doc = "Bit 1 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g2e ( & mut self ) -> G2E_W { G2E_W { w : self } } # [ doc = "Bit 0 - Analog I/O group x enable" ]
# [ inline ( always ) ]
pub fn g1e ( & mut self ) -> G1E_W { G1E_W { w : self } } } } # [ doc = "I/O group x counter register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iogcr](iogcr) module" ]
pub type IOGCR = crate :: Reg < u32 , _IOGCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IOGCR ; # [ doc = "`read()` method returns [iogcr::R](iogcr::R) reader structure" ]
impl crate :: Readable for IOGCR { } # [ doc = "I/O group x counter register" ]
pub mod iogcr { # [ doc = "Reader of register IOG%sCR" ]
pub type R = crate :: R < u32 , super :: IOGCR > ; # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:13 - Counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0x3fff ) as u16 ) } } } } # [ doc = "cyclic redundancy check calculation unit" ]
pub struct CRC { _marker : PhantomData < * const ( ) > } unsafe impl Send for CRC { } impl CRC { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const crc :: RegisterBlock { 0x4002_3000 as * const _ } } impl Deref for CRC { type Target = crc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * CRC :: ptr ( ) } } } # [ doc = "cyclic redundancy check calculation unit" ]
pub mod crc { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { _reserved_0_dr : [ u8 ; 4usize ]
, # [ doc = "0x04 - Independent data register" ]
pub idr : IDR , # [ doc = "0x08 - Control register" ]
pub cr : CR , _reserved3 : [ u8 ; 4usize ]
, # [ doc = "0x10 - Initial CRC value" ]
pub init : INIT , # [ doc = "0x14 - CRC polynomial" ]
pub pol : POL , } impl RegisterBlock { # [ doc = "0x00 - Data register - half-word sized" ]
# [ inline ( always ) ]
pub fn dr16 ( & self ) -> & DR16 { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 0usize ) as * const DR16 ) } } # [ doc = "0x00 - Data register - half-word sized" ]
# [ inline ( always ) ]
pub fn dr16_mut ( & self ) -> & mut DR16 { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 0usize ) as * mut DR16 ) } } # [ doc = "0x00 - Data register - byte sized" ]
# [ inline ( always ) ]
pub fn dr8 ( & self ) -> & DR8 { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 0usize ) as * const DR8 ) } } # [ doc = "0x00 - Data register - byte sized" ]
# [ inline ( always ) ]
pub fn dr8_mut ( & self ) -> & mut DR8 { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 0usize ) as * mut DR8 ) } } # [ doc = "0x00 - Data register" ]
# [ inline ( always ) ]
pub fn dr ( & self ) -> & DR { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 0usize ) as * const DR ) } } # [ doc = "0x00 - Data register" ]
# [ inline ( always ) ]
pub fn dr_mut ( & self ) -> & mut DR { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 0usize ) as * mut DR ) } } } # [ doc = "Data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr](dr) module" ]
pub type DR = crate :: Reg < u32 , _DR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DR ; # [ doc = "`read()` method returns [dr::R](dr::R) reader structure" ]
impl crate :: Readable for DR { } # [ doc = "`write(|w| ..)` method takes [dr::W](dr::W) writer structure" ]
impl crate :: Writable for DR { } # [ doc = "Data register" ]
pub mod dr { # [ doc = "Reader of register DR" ]
pub type R = crate :: R < u32 , super :: DR > ; # [ doc = "Writer for register DR" ]
pub type W = crate :: W < u32 , super :: DR > ; # [ doc = "Register DR `reset()`'s with value 0xffff_ffff" ]
impl crate :: ResetValue for super :: DR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff_ffff } } # [ doc = "Reader of field `DR`" ]
pub type DR_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `DR`" ]
pub struct DR_W < 'a > { w : & 'a mut W , } impl < 'a > DR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Data register bits" ]
# [ inline ( always ) ]
pub fn dr ( & self ) -> DR_R { DR_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Data register bits" ]
# [ inline ( always ) ]
pub fn dr ( & mut self ) -> DR_W { DR_W { w : self } } } } # [ doc = "Independent data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](idr) module" ]
pub type IDR = crate :: Reg < u32 , _IDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IDR ; # [ doc = "`read()` method returns [idr::R](idr::R) reader structure" ]
impl crate :: Readable for IDR { } # [ doc = "`write(|w| ..)` method takes [idr::W](idr::W) writer structure" ]
impl crate :: Writable for IDR { } # [ doc = "Independent data register" ]
pub mod idr { # [ doc = "Reader of register IDR" ]
pub type R = crate :: R < u32 , super :: IDR > ; # [ doc = "Writer for register IDR" ]
pub type W = crate :: W < u32 , super :: IDR > ; # [ doc = "Register IDR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IDR`" ]
pub type IDR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IDR`" ]
pub struct IDR_W < 'a > { w : & 'a mut W , } impl < 'a > IDR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - General-purpose 8-bit data register bits" ]
# [ inline ( always ) ]
pub fn idr ( & self ) -> IDR_R { IDR_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - General-purpose 8-bit data register bits" ]
# [ inline ( always ) ]
pub fn idr ( & mut self ) -> IDR_W { IDR_W { w : self } } } } # [ doc = "Control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "Control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "reset bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RESET_A { # [ doc = "1: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF" ]
RESET = 1 } impl From < RESET_A > for bool { # [ inline ( always ) ]
fn from ( variant : RESET_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RESET`" ]
pub type RESET_R = crate :: R < bool , RESET_A > ; impl RESET_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RESET_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RESET_A :: RESET ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == RESET_A :: RESET } } # [ doc = "Write proxy for field `RESET`" ]
pub struct RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RESET_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RESET_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( RESET_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reverse input data\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum REV_IN_A { # [ doc = "0: Bit order not affected" ]
NORMAL = 0 , # [ doc = "1: Bit reversal done by byte" ]
BYTE = 1 , # [ doc = "2: Bit reversal done by half-word" ]
HALFWORD = 2 , # [ doc = "3: Bit reversal done by word" ]
WORD = 3 } impl From < REV_IN_A > for u8 { # [ inline ( always ) ]
fn from ( variant : REV_IN_A ) -> Self { variant as _ } } # [ doc = "Reader of field `REV_IN`" ]
pub type REV_IN_R = crate :: R < u8 , REV_IN_A > ; impl REV_IN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> REV_IN_A { match self . bits { 0 => REV_IN_A :: NORMAL , 1 => REV_IN_A :: BYTE , 2 => REV_IN_A :: HALFWORD , 3 => REV_IN_A :: WORD , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == REV_IN_A :: NORMAL } # [ doc = "Checks if the value of the field is `BYTE`" ]
# [ inline ( always ) ]
pub fn is_byte ( & self ) -> bool { * self == REV_IN_A :: BYTE } # [ doc = "Checks if the value of the field is `HALFWORD`" ]
# [ inline ( always ) ]
pub fn is_half_word ( & self ) -> bool { * self == REV_IN_A :: HALFWORD } # [ doc = "Checks if the value of the field is `WORD`" ]
# [ inline ( always ) ]
pub fn is_word ( & self ) -> bool { * self == REV_IN_A :: WORD } } # [ doc = "Write proxy for field `REV_IN`" ]
pub struct REV_IN_W < 'a > { w : & 'a mut W , } impl < 'a > REV_IN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : REV_IN_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bit order not affected" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( REV_IN_A :: NORMAL ) } # [ doc = "Bit reversal done by byte" ]
# [ inline ( always ) ]
pub fn byte ( self ) -> & 'a mut W { self . variant ( REV_IN_A :: BYTE ) } # [ doc = "Bit reversal done by half-word" ]
# [ inline ( always ) ]
pub fn half_word ( self ) -> & 'a mut W { self . variant ( REV_IN_A :: HALFWORD ) } # [ doc = "Bit reversal done by word" ]
# [ inline ( always ) ]
pub fn word ( self ) -> & 'a mut W { self . variant ( REV_IN_A :: WORD ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Reverse output data\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum REV_OUT_A { # [ doc = "0: Bit order not affected" ]
NORMAL = 0 , # [ doc = "1: Bit reversed output" ]
REVERSED = 1 } impl From < REV_OUT_A > for bool { # [ inline ( always ) ]
fn from ( variant : REV_OUT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `REV_OUT`" ]
pub type REV_OUT_R = crate :: R < bool , REV_OUT_A > ; impl REV_OUT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> REV_OUT_A { match self . bits { false => REV_OUT_A :: NORMAL , true => REV_OUT_A :: REVERSED } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == REV_OUT_A :: NORMAL } # [ doc = "Checks if the value of the field is `REVERSED`" ]
# [ inline ( always ) ]
pub fn is_reversed ( & self ) -> bool { * self == REV_OUT_A :: REVERSED } } # [ doc = "Write proxy for field `REV_OUT`" ]
pub struct REV_OUT_W < 'a > { w : & 'a mut W , } impl < 'a > REV_OUT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : REV_OUT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Bit order not affected" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( REV_OUT_A :: NORMAL ) } # [ doc = "Bit reversed output" ]
# [ inline ( always ) ]
pub fn reversed ( self ) -> & 'a mut W { self . variant ( REV_OUT_A :: REVERSED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Polynomial size\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum POLYSIZE_A { # [ doc = "0: 32-bit polynomial" ]
POLYSIZE32 = 0 , # [ doc = "1: 16-bit polynomial" ]
POLYSIZE16 = 1 , # [ doc = "2: 8-bit polynomial" ]
POLYSIZE8 = 2 , # [ doc = "3: 7-bit polynomial" ]
POLYSIZE7 = 3 } impl From < POLYSIZE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : POLYSIZE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `POLYSIZE`" ]
pub type POLYSIZE_R = crate :: R < u8 , POLYSIZE_A > ; impl POLYSIZE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> POLYSIZE_A { match self . bits { 0 => POLYSIZE_A :: POLYSIZE32 , 1 => POLYSIZE_A :: POLYSIZE16 , 2 => POLYSIZE_A :: POLYSIZE8 , 3 => POLYSIZE_A :: POLYSIZE7 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `POLYSIZE32`" ]
# [ inline ( always ) ]
pub fn is_polysize32 ( & self ) -> bool { * self == POLYSIZE_A :: POLYSIZE32 } # [ doc = "Checks if the value of the field is `POLYSIZE16`" ]
# [ inline ( always ) ]
pub fn is_polysize16 ( & self ) -> bool { * self == POLYSIZE_A :: POLYSIZE16 } # [ doc = "Checks if the value of the field is `POLYSIZE8`" ]
# [ inline ( always ) ]
pub fn is_polysize8 ( & self ) -> bool { * self == POLYSIZE_A :: POLYSIZE8 } # [ doc = "Checks if the value of the field is `POLYSIZE7`" ]
# [ inline ( always ) ]
pub fn is_polysize7 ( & self ) -> bool { * self == POLYSIZE_A :: POLYSIZE7 } } # [ doc = "Write proxy for field `POLYSIZE`" ]
pub struct POLYSIZE_W < 'a > { w : & 'a mut W , } impl < 'a > POLYSIZE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : POLYSIZE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "32-bit polynomial" ]
# [ inline ( always ) ]
pub fn polysize32 ( self ) -> & 'a mut W { self . variant ( POLYSIZE_A :: POLYSIZE32 ) } # [ doc = "16-bit polynomial" ]
# [ inline ( always ) ]
pub fn polysize16 ( self ) -> & 'a mut W { self . variant ( POLYSIZE_A :: POLYSIZE16 ) } # [ doc = "8-bit polynomial" ]
# [ inline ( always ) ]
pub fn polysize8 ( self ) -> & 'a mut W { self . variant ( POLYSIZE_A :: POLYSIZE8 ) } # [ doc = "7-bit polynomial" ]
# [ inline ( always ) ]
pub fn polysize7 ( self ) -> & 'a mut W { self . variant ( POLYSIZE_A :: POLYSIZE7 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 3 ) ) | ( ( ( value as u32 ) & 0x03 ) << 3 ) ; self . w } } impl R { # [ doc = "Bit 0 - reset bit" ]
# [ inline ( always ) ]
pub fn reset ( & self ) -> RESET_R { RESET_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bits 5:6 - Reverse input data" ]
# [ inline ( always ) ]
pub fn rev_in ( & self ) -> REV_IN_R { REV_IN_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Reverse output data" ]
# [ inline ( always ) ]
pub fn rev_out ( & self ) -> REV_OUT_R { REV_OUT_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 3:4 - Polynomial size" ]
# [ inline ( always ) ]
pub fn polysize ( & self ) -> POLYSIZE_R { POLYSIZE_R :: new ( ( ( self . bits >> 3 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 0 - reset bit" ]
# [ inline ( always ) ]
pub fn reset ( & mut self ) -> RESET_W { RESET_W { w : self } } # [ doc = "Bits 5:6 - Reverse input data" ]
# [ inline ( always ) ]
pub fn rev_in ( & mut self ) -> REV_IN_W { REV_IN_W { w : self } } # [ doc = "Bit 7 - Reverse output data" ]
# [ inline ( always ) ]
pub fn rev_out ( & mut self ) -> REV_OUT_W { REV_OUT_W { w : self } } # [ doc = "Bits 3:4 - Polynomial size" ]
# [ inline ( always ) ]
pub fn polysize ( & mut self ) -> POLYSIZE_W { POLYSIZE_W { w : self } } } } # [ doc = "Initial CRC value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [init](init) module" ]
pub type INIT = crate :: Reg < u32 , _INIT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _INIT ; # [ doc = "`read()` method returns [init::R](init::R) reader structure" ]
impl crate :: Readable for INIT { } # [ doc = "`write(|w| ..)` method takes [init::W](init::W) writer structure" ]
impl crate :: Writable for INIT { } # [ doc = "Initial CRC value" ]
pub mod init { # [ doc = "Reader of register INIT" ]
pub type R = crate :: R < u32 , super :: INIT > ; # [ doc = "Writer for register INIT" ]
pub type W = crate :: W < u32 , super :: INIT > ; # [ doc = "Register INIT `reset()`'s with value 0xffff_ffff" ]
impl crate :: ResetValue for super :: INIT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff_ffff } } # [ doc = "Reader of field `INIT`" ]
pub type INIT_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `INIT`" ]
pub struct INIT_W < 'a > { w : & 'a mut W , } impl < 'a > INIT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Programmable initial CRC value" ]
# [ inline ( always ) ]
pub fn init ( & self ) -> INIT_R { INIT_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Programmable initial CRC value" ]
# [ inline ( always ) ]
pub fn init ( & mut self ) -> INIT_W { INIT_W { w : self } } } } # [ doc = "CRC polynomial\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pol](pol) module" ]
pub type POL = crate :: Reg < u32 , _POL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _POL ; # [ doc = "`read()` method returns [pol::R](pol::R) reader structure" ]
impl crate :: Readable for POL { } # [ doc = "`write(|w| ..)` method takes [pol::W](pol::W) writer structure" ]
impl crate :: Writable for POL { } # [ doc = "CRC polynomial" ]
pub mod pol { # [ doc = "Reader of register POL" ]
pub type R = crate :: R < u32 , super :: POL > ; # [ doc = "Writer for register POL" ]
pub type W = crate :: W < u32 , super :: POL > ; # [ doc = "Register POL `reset()`'s with value 0x04c1_1db7" ]
impl crate :: ResetValue for super :: POL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x04c1_1db7 } } # [ doc = "Reader of field `POL`" ]
pub type POL_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `POL`" ]
pub struct POL_W < 'a > { w : & 'a mut W , } impl < 'a > POL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Programmable polynomial" ]
# [ inline ( always ) ]
pub fn pol ( & self ) -> POL_R { POL_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Programmable polynomial" ]
# [ inline ( always ) ]
pub fn pol ( & mut self ) -> POL_W { POL_W { w : self } } } } # [ doc = "Data register - byte sized\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr8](dr8) module" ]
pub type DR8 = crate :: Reg < u8 , _DR8 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DR8 ; # [ doc = "`read()` method returns [dr8::R](dr8::R) reader structure" ]
impl crate :: Readable for DR8 { } # [ doc = "`write(|w| ..)` method takes [dr8::W](dr8::W) writer structure" ]
impl crate :: Writable for DR8 { } # [ doc = "Data register - byte sized" ]
pub mod dr8 { # [ doc = "Reader of register DR8" ]
pub type R = crate :: R < u8 , super :: DR8 > ; # [ doc = "Writer for register DR8" ]
pub type W = crate :: W < u8 , super :: DR8 > ; # [ doc = "Register DR8 `reset()`'s with value 0xff" ]
impl crate :: ResetValue for super :: DR8 { type Type = u8 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xff } } # [ doc = "Reader of field `DR8`" ]
pub type DR8_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DR8`" ]
pub struct DR8_W < 'a > { w : & 'a mut W , } impl < 'a > DR8_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u8 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - Data register bits" ]
# [ inline ( always ) ]
pub fn dr8 ( & self ) -> DR8_R { DR8_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - Data register bits" ]
# [ inline ( always ) ]
pub fn dr8 ( & mut self ) -> DR8_W { DR8_W { w : self } } } } # [ doc = "Data register - half-word sized\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr16](dr16) module" ]
pub type DR16 = crate :: Reg < u16 , _DR16 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DR16 ; # [ doc = "`read()` method returns [dr16::R](dr16::R) reader structure" ]
impl crate :: Readable for DR16 { } # [ doc = "`write(|w| ..)` method takes [dr16::W](dr16::W) writer structure" ]
impl crate :: Writable for DR16 { } # [ doc = "Data register - half-word sized" ]
pub mod dr16 { # [ doc = "Reader of register DR16" ]
pub type R = crate :: R < u16 , super :: DR16 > ; # [ doc = "Writer for register DR16" ]
pub type W = crate :: W < u16 , super :: DR16 > ; # [ doc = "Register DR16 `reset()`'s with value 0xffff" ]
impl crate :: ResetValue for super :: DR16 { type Type = u16 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff } } # [ doc = "Reader of field `DR16`" ]
pub type DR16_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DR16`" ]
pub struct DR16_W < 'a > { w : & 'a mut W , } impl < 'a > DR16_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u16 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Data register bits" ]
# [ inline ( always ) ]
pub fn dr16 ( & self ) -> DR16_R { DR16_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Data register bits" ]
# [ inline ( always ) ]
pub fn dr16 ( & mut self ) -> DR16_W { DR16_W { w : self } } } } } # [ doc = "Flash" ]
pub struct FLASH { _marker : PhantomData < * const ( ) > } unsafe impl Send for FLASH { } impl FLASH { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const flash :: RegisterBlock { 0x4002_2000 as * const _ } } impl Deref for FLASH { type Target = flash :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * FLASH :: ptr ( ) } } } # [ doc = "Flash" ]
pub mod flash { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Flash access control register" ]
pub acr : ACR , # [ doc = "0x04 - Flash key register" ]
pub keyr : KEYR , # [ doc = "0x08 - Flash option key register" ]
pub optkeyr : OPTKEYR , # [ doc = "0x0c - Flash status register" ]
pub sr : SR , # [ doc = "0x10 - Flash control register" ]
pub cr : CR , # [ doc = "0x14 - Flash address register" ]
pub ar : AR , _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x1c - Option byte register" ]
pub obr : OBR , # [ doc = "0x20 - Write protection register" ]
pub wrpr : WRPR , } # [ doc = "Flash access control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acr](acr) module" ]
pub type ACR = crate :: Reg < u32 , _ACR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ACR ; # [ doc = "`read()` method returns [acr::R](acr::R) reader structure" ]
impl crate :: Readable for ACR { } # [ doc = "`write(|w| ..)` method takes [acr::W](acr::W) writer structure" ]
impl crate :: Writable for ACR { } # [ doc = "Flash access control register" ]
pub mod acr { # [ doc = "Reader of register ACR" ]
pub type R = crate :: R < u32 , super :: ACR > ; # [ doc = "Writer for register ACR" ]
pub type W = crate :: W < u32 , super :: ACR > ; # [ doc = "Register ACR `reset()`'s with value 0x30" ]
impl crate :: ResetValue for super :: ACR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x30 } } # [ doc = "LATENCY\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum LATENCY_A { # [ doc = "0: 0 wait states, if 0 < HCLK <= 24 MHz" ]
WS0 = 0 , # [ doc = "1: 1 wait state, if 24 < HCLK <= 48 MHz" ]
WS1 = 1 , # [ doc = "2: 2 wait states, if 48 < HCLK <= 72 MHz" ]
WS2 = 2 } impl From < LATENCY_A > for u8 { # [ inline ( always ) ]
fn from ( variant : LATENCY_A ) -> Self { variant as _ } } # [ doc = "Reader of field `LATENCY`" ]
pub type LATENCY_R = crate :: R < u8 , LATENCY_A > ; impl LATENCY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , LATENCY_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( LATENCY_A :: WS0 ) , 1 => Val ( LATENCY_A :: WS1 ) , 2 => Val ( LATENCY_A :: WS2 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `WS0`" ]
# [ inline ( always ) ]
pub fn is_ws0 ( & self ) -> bool { * self == LATENCY_A :: WS0 } # [ doc = "Checks if the value of the field is `WS1`" ]
# [ inline ( always ) ]
pub fn is_ws1 ( & self ) -> bool { * self == LATENCY_A :: WS1 } # [ doc = "Checks if the value of the field is `WS2`" ]
# [ inline ( always ) ]
pub fn is_ws2 ( & self ) -> bool { * self == LATENCY_A :: WS2 } } # [ doc = "Write proxy for field `LATENCY`" ]
pub struct LATENCY_W < 'a > { w : & 'a mut W , } impl < 'a > LATENCY_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LATENCY_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "0 wait states, if 0 < HCLK <= 24 MHz" ]
# [ inline ( always ) ]
pub fn ws0 ( self ) -> & 'a mut W { self . variant ( LATENCY_A :: WS0 ) } # [ doc = "1 wait state, if 24 < HCLK <= 48 MHz" ]
# [ inline ( always ) ]
pub fn ws1 ( self ) -> & 'a mut W { self . variant ( LATENCY_A :: WS1 ) } # [ doc = "2 wait states, if 48 < HCLK <= 72 MHz" ]
# [ inline ( always ) ]
pub fn ws2 ( self ) -> & 'a mut W { self . variant ( LATENCY_A :: WS2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } # [ doc = "PRFTBE\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PRFTBE_A { # [ doc = "0: Prefetch is disabled" ]
DISABLED = 0 , # [ doc = "1: Prefetch is enabled" ]
ENABLED = 1 } impl From < PRFTBE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PRFTBE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PRFTBE`" ]
pub type PRFTBE_R = crate :: R < bool , PRFTBE_A > ; impl PRFTBE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PRFTBE_A { match self . bits { false => PRFTBE_A :: DISABLED , true => PRFTBE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PRFTBE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PRFTBE_A :: ENABLED } } # [ doc = "Write proxy for field `PRFTBE`" ]
pub struct PRFTBE_W < 'a > { w : & 'a mut W , } impl < 'a > PRFTBE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PRFTBE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Prefetch is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PRFTBE_A :: DISABLED ) } # [ doc = "Prefetch is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PRFTBE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "PRFTBS\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PRFTBS_A { # [ doc = "0: Prefetch buffer is disabled" ]
DISABLED = 0 , # [ doc = "1: Prefetch buffer is enabled" ]
ENABLED = 1 } impl From < PRFTBS_A > for bool { # [ inline ( always ) ]
fn from ( variant : PRFTBS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PRFTBS`" ]
pub type PRFTBS_R = crate :: R < bool , PRFTBS_A > ; impl PRFTBS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PRFTBS_A { match self . bits { false => PRFTBS_A :: DISABLED , true => PRFTBS_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PRFTBS_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PRFTBS_A :: ENABLED } } # [ doc = "Flash half cycle access enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HLFCYA_A { # [ doc = "0: Half cycle is disabled" ]
DISABLED = 0 , # [ doc = "1: Half cycle is enabled" ]
ENABLED = 1 } impl From < HLFCYA_A > for bool { # [ inline ( always ) ]
fn from ( variant : HLFCYA_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HLFCYA`" ]
pub type HLFCYA_R = crate :: R < bool , HLFCYA_A > ; impl HLFCYA_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HLFCYA_A { match self . bits { false => HLFCYA_A :: DISABLED , true => HLFCYA_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == HLFCYA_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == HLFCYA_A :: ENABLED } } # [ doc = "Write proxy for field `HLFCYA`" ]
pub struct HLFCYA_W < 'a > { w : & 'a mut W , } impl < 'a > HLFCYA_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HLFCYA_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Half cycle is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( HLFCYA_A :: DISABLED ) } # [ doc = "Half cycle is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( HLFCYA_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } impl R { # [ doc = "Bits 0:2 - LATENCY" ]
# [ inline ( always ) ]
pub fn latency ( & self ) -> LATENCY_R { LATENCY_R :: new ( ( self . bits & 0x07 ) as u8 ) } # [ doc = "Bit 4 - PRFTBE" ]
# [ inline ( always ) ]
pub fn prftbe ( & self ) -> PRFTBE_R { PRFTBE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - PRFTBS" ]
# [ inline ( always ) ]
pub fn prftbs ( & self ) -> PRFTBS_R { PRFTBS_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Flash half cycle access enable" ]
# [ inline ( always ) ]
pub fn hlfcya ( & self ) -> HLFCYA_R { HLFCYA_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:2 - LATENCY" ]
# [ inline ( always ) ]
pub fn latency ( & mut self ) -> LATENCY_W { LATENCY_W { w : self } } # [ doc = "Bit 4 - PRFTBE" ]
# [ inline ( always ) ]
pub fn prftbe ( & mut self ) -> PRFTBE_W { PRFTBE_W { w : self } } # [ doc = "Bit 3 - Flash half cycle access enable" ]
# [ inline ( always ) ]
pub fn hlfcya ( & mut self ) -> HLFCYA_W { HLFCYA_W { w : self } } } } # [ doc = "Flash key register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [keyr](keyr) module" ]
pub type KEYR = crate :: Reg < u32 , _KEYR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _KEYR ; # [ doc = "`write(|w| ..)` method takes [keyr::W](keyr::W) writer structure" ]
impl crate :: Writable for KEYR { } # [ doc = "Flash key register" ]
pub mod keyr { # [ doc = "Writer for register KEYR" ]
pub type W = crate :: W < u32 , super :: KEYR > ; # [ doc = "Register KEYR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: KEYR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `FKEYR`" ]
pub struct FKEYR_W < 'a > { w : & 'a mut W , } impl < 'a > FKEYR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl W { # [ doc = "Bits 0:31 - Flash Key" ]
# [ inline ( always ) ]
pub fn fkeyr ( & mut self ) -> FKEYR_W { FKEYR_W { w : self } } } } # [ doc = "Flash option key register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [optkeyr](optkeyr) module" ]
pub type OPTKEYR = crate :: Reg < u32 , _OPTKEYR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OPTKEYR ; # [ doc = "`write(|w| ..)` method takes [optkeyr::W](optkeyr::W) writer structure" ]
impl crate :: Writable for OPTKEYR { } # [ doc = "Flash option key register" ]
pub mod optkeyr { # [ doc = "Writer for register OPTKEYR" ]
pub type W = crate :: W < u32 , super :: OPTKEYR > ; # [ doc = "Register OPTKEYR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OPTKEYR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `OPTKEYR`" ]
pub struct OPTKEYR_W < 'a > { w : & 'a mut W , } impl < 'a > OPTKEYR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl W { # [ doc = "Bits 0:31 - Option byte key" ]
# [ inline ( always ) ]
pub fn optkeyr ( & mut self ) -> OPTKEYR_W { OPTKEYR_W { w : self } } } } # [ doc = "Flash status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "Flash status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "End of operation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOP_A { # [ doc = "0: No EOP event occurred" ]
NOEVENT = 0 , # [ doc = "1: An EOP event occurred" ]
EVENT = 1 } impl From < EOP_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOP`" ]
pub type EOP_R = crate :: R < bool , EOP_A > ; impl EOP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOP_A { match self . bits { false => EOP_A :: NOEVENT , true => EOP_A :: EVENT } } # [ doc = "Checks if the value of the field is `NOEVENT`" ]
# [ inline ( always ) ]
pub fn is_no_event ( & self ) -> bool { * self == EOP_A :: NOEVENT } # [ doc = "Checks if the value of the field is `EVENT`" ]
# [ inline ( always ) ]
pub fn is_event ( & self ) -> bool { * self == EOP_A :: EVENT } } # [ doc = "End of operation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOP_AW { # [ doc = "1: Reset EOP event" ]
RESET = 1 } impl From < EOP_AW > for bool { # [ inline ( always ) ]
fn from ( variant : EOP_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `EOP`" ]
pub struct EOP_W < 'a > { w : & 'a mut W , } impl < 'a > EOP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOP_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset EOP event" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( EOP_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Write protection error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WRPRTERR_A { # [ doc = "0: No write protection error occurred" ]
NOERROR = 0 , # [ doc = "1: A write protection error occurred" ]
ERROR = 1 } impl From < WRPRTERR_A > for bool { # [ inline ( always ) ]
fn from ( variant : WRPRTERR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WRPRTERR`" ]
pub type WRPRTERR_R = crate :: R < bool , WRPRTERR_A > ; impl WRPRTERR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WRPRTERR_A { match self . bits { false => WRPRTERR_A :: NOERROR , true => WRPRTERR_A :: ERROR } } # [ doc = "Checks if the value of the field is `NOERROR`" ]
# [ inline ( always ) ]
pub fn is_no_error ( & self ) -> bool { * self == WRPRTERR_A :: NOERROR } # [ doc = "Checks if the value of the field is `ERROR`" ]
# [ inline ( always ) ]
pub fn is_error ( & self ) -> bool { * self == WRPRTERR_A :: ERROR } } # [ doc = "Write protection error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WRPRTERR_AW { # [ doc = "1: Reset write protection error" ]
RESET = 1 } impl From < WRPRTERR_AW > for bool { # [ inline ( always ) ]
fn from ( variant : WRPRTERR_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `WRPRTERR`" ]
pub struct WRPRTERR_W < 'a > { w : & 'a mut W , } impl < 'a > WRPRTERR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WRPRTERR_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset write protection error" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( WRPRTERR_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Programming error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PGERR_A { # [ doc = "0: No programming error occurred" ]
NOERROR = 0 , # [ doc = "1: A programming error occurred" ]
ERROR = 1 } impl From < PGERR_A > for bool { # [ inline ( always ) ]
fn from ( variant : PGERR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PGERR`" ]
pub type PGERR_R = crate :: R < bool , PGERR_A > ; impl PGERR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PGERR_A { match self . bits { false => PGERR_A :: NOERROR , true => PGERR_A :: ERROR } } # [ doc = "Checks if the value of the field is `NOERROR`" ]
# [ inline ( always ) ]
pub fn is_no_error ( & self ) -> bool { * self == PGERR_A :: NOERROR } # [ doc = "Checks if the value of the field is `ERROR`" ]
# [ inline ( always ) ]
pub fn is_error ( & self ) -> bool { * self == PGERR_A :: ERROR } } # [ doc = "Programming error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PGERR_AW { # [ doc = "1: Reset programming error" ]
RESET = 1 } impl From < PGERR_AW > for bool { # [ inline ( always ) ]
fn from ( variant : PGERR_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `PGERR`" ]
pub struct PGERR_W < 'a > { w : & 'a mut W , } impl < 'a > PGERR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PGERR_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset programming error" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( PGERR_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Busy\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BSY_A { # [ doc = "0: No write/erase operation is in progress" ]
INACTIVE = 0 , # [ doc = "1: No write/erase operation is in progress" ]
ACTIVE = 1 } impl From < BSY_A > for bool { # [ inline ( always ) ]
fn from ( variant : BSY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BSY`" ]
pub type BSY_R = crate :: R < bool , BSY_A > ; impl BSY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BSY_A { match self . bits { false => BSY_A :: INACTIVE , true => BSY_A :: ACTIVE } } # [ doc = "Checks if the value of the field is `INACTIVE`" ]
# [ inline ( always ) ]
pub fn is_inactive ( & self ) -> bool { * self == BSY_A :: INACTIVE } # [ doc = "Checks if the value of the field is `ACTIVE`" ]
# [ inline ( always ) ]
pub fn is_active ( & self ) -> bool { * self == BSY_A :: ACTIVE } } impl R { # [ doc = "Bit 5 - End of operation" ]
# [ inline ( always ) ]
pub fn eop ( & self ) -> EOP_R { EOP_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Write protection error" ]
# [ inline ( always ) ]
pub fn wrprterr ( & self ) -> WRPRTERR_R { WRPRTERR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Programming error" ]
# [ inline ( always ) ]
pub fn pgerr ( & self ) -> PGERR_R { PGERR_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Busy" ]
# [ inline ( always ) ]
pub fn bsy ( & self ) -> BSY_R { BSY_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 5 - End of operation" ]
# [ inline ( always ) ]
pub fn eop ( & mut self ) -> EOP_W { EOP_W { w : self } } # [ doc = "Bit 4 - Write protection error" ]
# [ inline ( always ) ]
pub fn wrprterr ( & mut self ) -> WRPRTERR_W { WRPRTERR_W { w : self } } # [ doc = "Bit 2 - Programming error" ]
# [ inline ( always ) ]
pub fn pgerr ( & mut self ) -> PGERR_W { PGERR_W { w : self } } } } # [ doc = "Flash control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "Flash control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0x80" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x80 } } # [ doc = "Force option byte loading\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OBL_LAUNCH_A { # [ doc = "0: Force option byte loading inactive" ]
INACTIVE = 0 , # [ doc = "1: Force option byte loading active" ]
ACTIVE = 1 } impl From < OBL_LAUNCH_A > for bool { # [ inline ( always ) ]
fn from ( variant : OBL_LAUNCH_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OBL_LAUNCH`" ]
pub type OBL_LAUNCH_R = crate :: R < bool , OBL_LAUNCH_A > ; impl OBL_LAUNCH_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OBL_LAUNCH_A { match self . bits { false => OBL_LAUNCH_A :: INACTIVE , true => OBL_LAUNCH_A :: ACTIVE } } # [ doc = "Checks if the value of the field is `INACTIVE`" ]
# [ inline ( always ) ]
pub fn is_inactive ( & self ) -> bool { * self == OBL_LAUNCH_A :: INACTIVE } # [ doc = "Checks if the value of the field is `ACTIVE`" ]
# [ inline ( always ) ]
pub fn is_active ( & self ) -> bool { * self == OBL_LAUNCH_A :: ACTIVE } } # [ doc = "Write proxy for field `OBL_LAUNCH`" ]
pub struct OBL_LAUNCH_W < 'a > { w : & 'a mut W , } impl < 'a > OBL_LAUNCH_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OBL_LAUNCH_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Force option byte loading inactive" ]
# [ inline ( always ) ]
pub fn inactive ( self ) -> & 'a mut W { self . variant ( OBL_LAUNCH_A :: INACTIVE ) } # [ doc = "Force option byte loading active" ]
# [ inline ( always ) ]
pub fn active ( self ) -> & 'a mut W { self . variant ( OBL_LAUNCH_A :: ACTIVE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "End of operation interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOPIE_A { # [ doc = "0: End of operation interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: End of operation interrupt enabled" ]
ENABLED = 1 } impl From < EOPIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOPIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOPIE`" ]
pub type EOPIE_R = crate :: R < bool , EOPIE_A > ; impl EOPIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOPIE_A { match self . bits { false => EOPIE_A :: DISABLED , true => EOPIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EOPIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EOPIE_A :: ENABLED } } # [ doc = "Write proxy for field `EOPIE`" ]
pub struct EOPIE_W < 'a > { w : & 'a mut W , } impl < 'a > EOPIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOPIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "End of operation interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EOPIE_A :: DISABLED ) } # [ doc = "End of operation interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EOPIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Error interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ERRIE_A { # [ doc = "0: Error interrupt generation disabled" ]
DISABLED = 0 , # [ doc = "1: Error interrupt generation enabled" ]
ENABLED = 1 } impl From < ERRIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ERRIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ERRIE`" ]
pub type ERRIE_R = crate :: R < bool , ERRIE_A > ; impl ERRIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ERRIE_A { match self . bits { false => ERRIE_A :: DISABLED , true => ERRIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ERRIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ERRIE_A :: ENABLED } } # [ doc = "Write proxy for field `ERRIE`" ]
pub struct ERRIE_W < 'a > { w : & 'a mut W , } impl < 'a > ERRIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ERRIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Error interrupt generation disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: DISABLED ) } # [ doc = "Error interrupt generation enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Option bytes write enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPTWRE_A { # [ doc = "0: Option byte write enabled" ]
DISABLED = 0 , # [ doc = "1: Option byte write disabled" ]
ENABLED = 1 } impl From < OPTWRE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPTWRE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPTWRE`" ]
pub type OPTWRE_R = crate :: R < bool , OPTWRE_A > ; impl OPTWRE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPTWRE_A { match self . bits { false => OPTWRE_A :: DISABLED , true => OPTWRE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPTWRE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPTWRE_A :: ENABLED } } # [ doc = "Write proxy for field `OPTWRE`" ]
pub struct OPTWRE_W < 'a > { w : & 'a mut W , } impl < 'a > OPTWRE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPTWRE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Option byte write enabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPTWRE_A :: DISABLED ) } # [ doc = "Option byte write disabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPTWRE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Lock\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LOCK_A { # [ doc = "0: FLASH_CR register is unlocked" ]
UNLOCKED = 0 , # [ doc = "1: FLASH_CR register is locked" ]
LOCKED = 1 } impl From < LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < bool , LOCK_A > ; impl LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LOCK_A { match self . bits { false => LOCK_A :: UNLOCKED , true => LOCK_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LOCK_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LOCK_A :: LOCKED } } # [ doc = "Lock\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LOCK_AW { # [ doc = "1: Lock the FLASH_CR register" ]
LOCK = 1 } impl From < LOCK_AW > for bool { # [ inline ( always ) ]
fn from ( variant : LOCK_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LOCK_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Lock the FLASH_CR register" ]
# [ inline ( always ) ]
pub fn lock ( self ) -> & 'a mut W { self . variant ( LOCK_AW :: LOCK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Start\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum STRT_A { # [ doc = "1: Trigger an erase operation" ]
START = 1 } impl From < STRT_A > for bool { # [ inline ( always ) ]
fn from ( variant : STRT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `STRT`" ]
pub type STRT_R = crate :: R < bool , STRT_A > ; impl STRT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , STRT_A > { use crate :: Variant :: * ; match self . bits { true => Val ( STRT_A :: START ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `START`" ]
# [ inline ( always ) ]
pub fn is_start ( & self ) -> bool { * self == STRT_A :: START } } # [ doc = "Write proxy for field `STRT`" ]
pub struct STRT_W < 'a > { w : & 'a mut W , } impl < 'a > STRT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STRT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger an erase operation" ]
# [ inline ( always ) ]
pub fn start ( self ) -> & 'a mut W { self . variant ( STRT_A :: START ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Option byte erase\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPTER_A { # [ doc = "1: Erase option byte activated" ]
OPTIONBYTEERASE = 1 } impl From < OPTER_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPTER_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPTER`" ]
pub type OPTER_R = crate :: R < bool , OPTER_A > ; impl OPTER_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , OPTER_A > { use crate :: Variant :: * ; match self . bits { true => Val ( OPTER_A :: OPTIONBYTEERASE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OPTIONBYTEERASE`" ]
# [ inline ( always ) ]
pub fn is_option_byte_erase ( & self ) -> bool { * self == OPTER_A :: OPTIONBYTEERASE } } # [ doc = "Write proxy for field `OPTER`" ]
pub struct OPTER_W < 'a > { w : & 'a mut W , } impl < 'a > OPTER_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPTER_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Erase option byte activated" ]
# [ inline ( always ) ]
pub fn option_byte_erase ( self ) -> & 'a mut W { self . variant ( OPTER_A :: OPTIONBYTEERASE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Option byte programming\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPTPG_A { # [ doc = "1: Program option byte activated" ]
OPTIONBYTEPROGRAMMING = 1 } impl From < OPTPG_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPTPG_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPTPG`" ]
pub type OPTPG_R = crate :: R < bool , OPTPG_A > ; impl OPTPG_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , OPTPG_A > { use crate :: Variant :: * ; match self . bits { true => Val ( OPTPG_A :: OPTIONBYTEPROGRAMMING ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OPTIONBYTEPROGRAMMING`" ]
# [ inline ( always ) ]
pub fn is_option_byte_programming ( & self ) -> bool { * self == OPTPG_A :: OPTIONBYTEPROGRAMMING } } # [ doc = "Write proxy for field `OPTPG`" ]
pub struct OPTPG_W < 'a > { w : & 'a mut W , } impl < 'a > OPTPG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPTPG_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Program option byte activated" ]
# [ inline ( always ) ]
pub fn option_byte_programming ( self ) -> & 'a mut W { self . variant ( OPTPG_A :: OPTIONBYTEPROGRAMMING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Mass erase\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MER_A { # [ doc = "1: Erase activated for all user sectors" ]
MASSERASE = 1 } impl From < MER_A > for bool { # [ inline ( always ) ]
fn from ( variant : MER_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MER`" ]
pub type MER_R = crate :: R < bool , MER_A > ; impl MER_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , MER_A > { use crate :: Variant :: * ; match self . bits { true => Val ( MER_A :: MASSERASE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MASSERASE`" ]
# [ inline ( always ) ]
pub fn is_mass_erase ( & self ) -> bool { * self == MER_A :: MASSERASE } } # [ doc = "Write proxy for field `MER`" ]
pub struct MER_W < 'a > { w : & 'a mut W , } impl < 'a > MER_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MER_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Erase activated for all user sectors" ]
# [ inline ( always ) ]
pub fn mass_erase ( self ) -> & 'a mut W { self . variant ( MER_A :: MASSERASE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Page erase\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PER_A { # [ doc = "1: Erase activated for selected page" ]
PAGEERASE = 1 } impl From < PER_A > for bool { # [ inline ( always ) ]
fn from ( variant : PER_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PER`" ]
pub type PER_R = crate :: R < bool , PER_A > ; impl PER_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , PER_A > { use crate :: Variant :: * ; match self . bits { true => Val ( PER_A :: PAGEERASE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PAGEERASE`" ]
# [ inline ( always ) ]
pub fn is_page_erase ( & self ) -> bool { * self == PER_A :: PAGEERASE } } # [ doc = "Write proxy for field `PER`" ]
pub struct PER_W < 'a > { w : & 'a mut W , } impl < 'a > PER_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PER_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Erase activated for selected page" ]
# [ inline ( always ) ]
pub fn page_erase ( self ) -> & 'a mut W { self . variant ( PER_A :: PAGEERASE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Programming\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PG_A { # [ doc = "1: Flash programming activated" ]
PROGRAM = 1 } impl From < PG_A > for bool { # [ inline ( always ) ]
fn from ( variant : PG_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PG`" ]
pub type PG_R = crate :: R < bool , PG_A > ; impl PG_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , PG_A > { use crate :: Variant :: * ; match self . bits { true => Val ( PG_A :: PROGRAM ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PROGRAM`" ]
# [ inline ( always ) ]
pub fn is_program ( & self ) -> bool { * self == PG_A :: PROGRAM } } # [ doc = "Write proxy for field `PG`" ]
pub struct PG_W < 'a > { w : & 'a mut W , } impl < 'a > PG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PG_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Flash programming activated" ]
# [ inline ( always ) ]
pub fn program ( self ) -> & 'a mut W { self . variant ( PG_A :: PROGRAM ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 13 - Force option byte loading" ]
# [ inline ( always ) ]
pub fn obl_launch ( & self ) -> OBL_LAUNCH_R { OBL_LAUNCH_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - End of operation interrupt enable" ]
# [ inline ( always ) ]
pub fn eopie ( & self ) -> EOPIE_R { EOPIE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Error interrupt enable" ]
# [ inline ( always ) ]
pub fn errie ( & self ) -> ERRIE_R { ERRIE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Option bytes write enable" ]
# [ inline ( always ) ]
pub fn optwre ( & self ) -> OPTWRE_R { OPTWRE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Lock" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Start" ]
# [ inline ( always ) ]
pub fn strt ( & self ) -> STRT_R { STRT_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Option byte erase" ]
# [ inline ( always ) ]
pub fn opter ( & self ) -> OPTER_R { OPTER_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Option byte programming" ]
# [ inline ( always ) ]
pub fn optpg ( & self ) -> OPTPG_R { OPTPG_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Mass erase" ]
# [ inline ( always ) ]
pub fn mer ( & self ) -> MER_R { MER_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Page erase" ]
# [ inline ( always ) ]
pub fn per ( & self ) -> PER_R { PER_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Programming" ]
# [ inline ( always ) ]
pub fn pg ( & self ) -> PG_R { PG_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 13 - Force option byte loading" ]
# [ inline ( always ) ]
pub fn obl_launch ( & mut self ) -> OBL_LAUNCH_W { OBL_LAUNCH_W { w : self } } # [ doc = "Bit 12 - End of operation interrupt enable" ]
# [ inline ( always ) ]
pub fn eopie ( & mut self ) -> EOPIE_W { EOPIE_W { w : self } } # [ doc = "Bit 10 - Error interrupt enable" ]
# [ inline ( always ) ]
pub fn errie ( & mut self ) -> ERRIE_W { ERRIE_W { w : self } } # [ doc = "Bit 9 - Option bytes write enable" ]
# [ inline ( always ) ]
pub fn optwre ( & mut self ) -> OPTWRE_W { OPTWRE_W { w : self } } # [ doc = "Bit 7 - Lock" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } # [ doc = "Bit 6 - Start" ]
# [ inline ( always ) ]
pub fn strt ( & mut self ) -> STRT_W { STRT_W { w : self } } # [ doc = "Bit 5 - Option byte erase" ]
# [ inline ( always ) ]
pub fn opter ( & mut self ) -> OPTER_W { OPTER_W { w : self } } # [ doc = "Bit 4 - Option byte programming" ]
# [ inline ( always ) ]
pub fn optpg ( & mut self ) -> OPTPG_W { OPTPG_W { w : self } } # [ doc = "Bit 2 - Mass erase" ]
# [ inline ( always ) ]
pub fn mer ( & mut self ) -> MER_W { MER_W { w : self } } # [ doc = "Bit 1 - Page erase" ]
# [ inline ( always ) ]
pub fn per ( & mut self ) -> PER_W { PER_W { w : self } } # [ doc = "Bit 0 - Programming" ]
# [ inline ( always ) ]
pub fn pg ( & mut self ) -> PG_W { PG_W { w : self } } } } # [ doc = "Flash address register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ar](ar) module" ]
pub type AR = crate :: Reg < u32 , _AR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AR ; # [ doc = "`write(|w| ..)` method takes [ar::W](ar::W) writer structure" ]
impl crate :: Writable for AR { } # [ doc = "Flash address register" ]
pub mod ar { # [ doc = "Writer for register AR" ]
pub type W = crate :: W < u32 , super :: AR > ; # [ doc = "Register AR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `FAR`" ]
pub struct FAR_W < 'a > { w : & 'a mut W , } impl < 'a > FAR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl W { # [ doc = "Bits 0:31 - Flash address" ]
# [ inline ( always ) ]
pub fn far ( & mut self ) -> FAR_W { FAR_W { w : self } } } } # [ doc = "Option byte register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [obr](obr) module" ]
pub type OBR = crate :: Reg < u32 , _OBR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OBR ; # [ doc = "`read()` method returns [obr::R](obr::R) reader structure" ]
impl crate :: Readable for OBR { } # [ doc = "Option byte register" ]
pub mod obr { # [ doc = "Reader of register OBR" ]
pub type R = crate :: R < u32 , super :: OBR > ; # [ doc = "Option byte error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPTERR_A { # [ doc = "1: The loaded option byte and its complement do not match" ]
OPTIONBYTEERROR = 1 } impl From < OPTERR_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPTERR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPTERR`" ]
pub type OPTERR_R = crate :: R < bool , OPTERR_A > ; impl OPTERR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , OPTERR_A > { use crate :: Variant :: * ; match self . bits { true => Val ( OPTERR_A :: OPTIONBYTEERROR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OPTIONBYTEERROR`" ]
# [ inline ( always ) ]
pub fn is_option_byte_error ( & self ) -> bool { * self == OPTERR_A :: OPTIONBYTEERROR } } # [ doc = "WDG_SW\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WDG_SW_A { # [ doc = "0: Hardware watchdog" ]
HARDWARE = 0 , # [ doc = "1: Software watchdog" ]
SOFTWARE = 1 } impl From < WDG_SW_A > for bool { # [ inline ( always ) ]
fn from ( variant : WDG_SW_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WDG_SW`" ]
pub type WDG_SW_R = crate :: R < bool , WDG_SW_A > ; impl WDG_SW_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WDG_SW_A { match self . bits { false => WDG_SW_A :: HARDWARE , true => WDG_SW_A :: SOFTWARE } } # [ doc = "Checks if the value of the field is `HARDWARE`" ]
# [ inline ( always ) ]
pub fn is_hardware ( & self ) -> bool { * self == WDG_SW_A :: HARDWARE } # [ doc = "Checks if the value of the field is `SOFTWARE`" ]
# [ inline ( always ) ]
pub fn is_software ( & self ) -> bool { * self == WDG_SW_A :: SOFTWARE } } # [ doc = "nRST_STOP\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NRST_STOP_A { # [ doc = "0: Reset generated when entering Stop mode" ]
RESET = 0 , # [ doc = "1: No reset generated" ]
NORESET = 1 } impl From < NRST_STOP_A > for bool { # [ inline ( always ) ]
fn from ( variant : NRST_STOP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `nRST_STOP`" ]
pub type NRST_STOP_R = crate :: R < bool , NRST_STOP_A > ; impl NRST_STOP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NRST_STOP_A { match self . bits { false => NRST_STOP_A :: RESET , true => NRST_STOP_A :: NORESET } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == NRST_STOP_A :: RESET } # [ doc = "Checks if the value of the field is `NORESET`" ]
# [ inline ( always ) ]
pub fn is_no_reset ( & self ) -> bool { * self == NRST_STOP_A :: NORESET } } # [ doc = "nRST_STDBY\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NRST_STDBY_A { # [ doc = "0: Reset generated when entering Standby mode" ]
RESET = 0 , # [ doc = "1: No reset generated" ]
NORESET = 1 } impl From < NRST_STDBY_A > for bool { # [ inline ( always ) ]
fn from ( variant : NRST_STDBY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `nRST_STDBY`" ]
pub type NRST_STDBY_R = crate :: R < bool , NRST_STDBY_A > ; impl NRST_STDBY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NRST_STDBY_A { match self . bits { false => NRST_STDBY_A :: RESET , true => NRST_STDBY_A :: NORESET } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == NRST_STDBY_A :: RESET } # [ doc = "Checks if the value of the field is `NORESET`" ]
# [ inline ( always ) ]
pub fn is_no_reset ( & self ) -> bool { * self == NRST_STDBY_A :: NORESET } } # [ doc = "BOOT1\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NBOOT1_A { # [ doc = "0: Together with BOOT0, select the device boot mode" ]
DISABLED = 0 , # [ doc = "1: Together with BOOT0, select the device boot mode" ]
ENABLED = 1 } impl From < NBOOT1_A > for bool { # [ inline ( always ) ]
fn from ( variant : NBOOT1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `nBOOT1`" ]
pub type NBOOT1_R = crate :: R < bool , NBOOT1_A > ; impl NBOOT1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NBOOT1_A { match self . bits { false => NBOOT1_A :: DISABLED , true => NBOOT1_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == NBOOT1_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == NBOOT1_A :: ENABLED } } # [ doc = "VDDA_MONITOR\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum VDDA_MONITOR_A { # [ doc = "0: VDDA power supply supervisor disabled" ]
DISABLED = 0 , # [ doc = "1: VDDA power supply supervisor enabled" ]
ENABLED = 1 } impl From < VDDA_MONITOR_A > for bool { # [ inline ( always ) ]
fn from ( variant : VDDA_MONITOR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `VDDA_MONITOR`" ]
pub type VDDA_MONITOR_R = crate :: R < bool , VDDA_MONITOR_A > ; impl VDDA_MONITOR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> VDDA_MONITOR_A { match self . bits { false => VDDA_MONITOR_A :: DISABLED , true => VDDA_MONITOR_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == VDDA_MONITOR_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == VDDA_MONITOR_A :: ENABLED } } # [ doc = "Reader of field `SRAM_PARITY_CHECK`" ]
pub type SRAM_PARITY_CHECK_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `SDADC12_VDD_MONITOR`" ]
pub type SDADC12_VDD_MONITOR_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `Data0`" ]
pub type DATA0_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `Data1`" ]
pub type DATA1_R = crate :: R < u8 , u8 > ; # [ doc = "Read protection Level status\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum RDPRT_A { # [ doc = "0: Level 0" ]
LEVEL0 = 0 , # [ doc = "1: Level 1" ]
LEVEL1 = 1 , # [ doc = "3: Level 2" ]
LEVEL2 = 3 } impl From < RDPRT_A > for u8 { # [ inline ( always ) ]
fn from ( variant : RDPRT_A ) -> Self { variant as _ } } # [ doc = "Reader of field `RDPRT`" ]
pub type RDPRT_R = crate :: R < u8 , RDPRT_A > ; impl RDPRT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , RDPRT_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( RDPRT_A :: LEVEL0 ) , 1 => Val ( RDPRT_A :: LEVEL1 ) , 3 => Val ( RDPRT_A :: LEVEL2 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `LEVEL0`" ]
# [ inline ( always ) ]
pub fn is_level0 ( & self ) -> bool { * self == RDPRT_A :: LEVEL0 } # [ doc = "Checks if the value of the field is `LEVEL1`" ]
# [ inline ( always ) ]
pub fn is_level1 ( & self ) -> bool { * self == RDPRT_A :: LEVEL1 } # [ doc = "Checks if the value of the field is `LEVEL2`" ]
# [ inline ( always ) ]
pub fn is_level2 ( & self ) -> bool { * self == RDPRT_A :: LEVEL2 } } impl R { # [ doc = "Bit 0 - Option byte error" ]
# [ inline ( always ) ]
pub fn opterr ( & self ) -> OPTERR_R { OPTERR_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 8 - WDG_SW" ]
# [ inline ( always ) ]
pub fn wdg_sw ( & self ) -> WDG_SW_R { WDG_SW_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - nRST_STOP" ]
# [ inline ( always ) ]
pub fn n_rst_stop ( & self ) -> NRST_STOP_R { NRST_STOP_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - nRST_STDBY" ]
# [ inline ( always ) ]
pub fn n_rst_stdby ( & self ) -> NRST_STDBY_R { NRST_STDBY_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - BOOT1" ]
# [ inline ( always ) ]
pub fn n_boot1 ( & self ) -> NBOOT1_R { NBOOT1_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - VDDA_MONITOR" ]
# [ inline ( always ) ]
pub fn vdda_monitor ( & self ) -> VDDA_MONITOR_R { VDDA_MONITOR_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - SRAM_PARITY_CHECK" ]
# [ inline ( always ) ]
pub fn sram_parity_check ( & self ) -> SRAM_PARITY_CHECK_R { SRAM_PARITY_CHECK_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - SDADC12_VDD_MONITOR" ]
# [ inline ( always ) ]
pub fn sdadc12_vdd_monitor ( & self ) -> SDADC12_VDD_MONITOR_R { SDADC12_VDD_MONITOR_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:23 - Data0" ]
# [ inline ( always ) ]
pub fn data0 ( & self ) -> DATA0_R { DATA0_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 24:31 - Data1" ]
# [ inline ( always ) ]
pub fn data1 ( & self ) -> DATA1_R { DATA1_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 1:2 - Read protection Level status" ]
# [ inline ( always ) ]
pub fn rdprt ( & self ) -> RDPRT_R { RDPRT_R :: new ( ( ( self . bits >> 1 ) & 0x03 ) as u8 ) } } } # [ doc = "Write protection register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wrpr](wrpr) module" ]
pub type WRPR = crate :: Reg < u32 , _WRPR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _WRPR ; # [ doc = "`read()` method returns [wrpr::R](wrpr::R) reader structure" ]
impl crate :: Readable for WRPR { } # [ doc = "Write protection register" ]
pub mod wrpr { # [ doc = "Reader of register WRPR" ]
pub type R = crate :: R < u32 , super :: WRPR > ; # [ doc = "Reader of field `WRP`" ]
pub type WRP_R = crate :: R < u32 , u32 > ; impl R { # [ doc = "Bits 0:31 - Write protect" ]
# [ inline ( always ) ]
pub fn wrp ( & self ) -> WRP_R { WRP_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } } } # [ doc = "Reset and clock control" ]
pub struct RCC { _marker : PhantomData < * const ( ) > } unsafe impl Send for RCC { } impl RCC { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const rcc :: RegisterBlock { 0x4002_1000 as * const _ } } impl Deref for RCC { type Target = rcc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * RCC :: ptr ( ) } } } # [ doc = "Reset and clock control" ]
pub mod rcc { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Clock control register" ]
pub cr : CR , # [ doc = "0x04 - Clock configuration register (RCC_CFGR)" ]
pub cfgr : CFGR , # [ doc = "0x08 - Clock interrupt register (RCC_CIR)" ]
pub cir : CIR , # [ doc = "0x0c - APB2 peripheral reset register (RCC_APB2RSTR)" ]
pub apb2rstr : APB2RSTR , # [ doc = "0x10 - APB1 peripheral reset register (RCC_APB1RSTR)" ]
pub apb1rstr : APB1RSTR , # [ doc = "0x14 - AHB Peripheral Clock enable register (RCC_AHBENR)" ]
pub ahbenr : AHBENR , # [ doc = "0x18 - APB2 peripheral clock enable register (RCC_APB2ENR)" ]
pub apb2enr : APB2ENR , # [ doc = "0x1c - APB1 peripheral clock enable register (RCC_APB1ENR)" ]
pub apb1enr : APB1ENR , # [ doc = "0x20 - Backup domain control register (RCC_BDCR)" ]
pub bdcr : BDCR , # [ doc = "0x24 - Control/status register (RCC_CSR)" ]
pub csr : CSR , # [ doc = "0x28 - AHB peripheral reset register" ]
pub ahbrstr : AHBRSTR , # [ doc = "0x2c - Clock configuration register 2" ]
pub cfgr2 : CFGR2 , # [ doc = "0x30 - Clock configuration register 3" ]
pub cfgr3 : CFGR3 , } # [ doc = "Clock control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "Clock control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0x83" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x83 } } # [ doc = "Internal High Speed clock enable\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HSION_A { # [ doc = "0: Clock Off" ]
OFF = 0 , # [ doc = "1: Clock On" ]
ON = 1 } impl From < HSION_A > for bool { # [ inline ( always ) ]
fn from ( variant : HSION_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HSION`" ]
pub type HSION_R = crate :: R < bool , HSION_A > ; impl HSION_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HSION_A { match self . bits { false => HSION_A :: OFF , true => HSION_A :: ON } } # [ doc = "Checks if the value of the field is `OFF`" ]
# [ inline ( always ) ]
pub fn is_off ( & self ) -> bool { * self == HSION_A :: OFF } # [ doc = "Checks if the value of the field is `ON`" ]
# [ inline ( always ) ]
pub fn is_on ( & self ) -> bool { * self == HSION_A :: ON } } # [ doc = "Write proxy for field `HSION`" ]
pub struct HSION_W < 'a > { w : & 'a mut W , } impl < 'a > HSION_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HSION_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clock Off" ]
# [ inline ( always ) ]
pub fn off ( self ) -> & 'a mut W { self . variant ( HSION_A :: OFF ) } # [ doc = "Clock On" ]
# [ inline ( always ) ]
pub fn on ( self ) -> & 'a mut W { self . variant ( HSION_A :: ON ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Internal High Speed clock ready flag\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HSIRDY_A { # [ doc = "0: Clock not ready" ]
NOTREADY = 0 , # [ doc = "1: Clock ready" ]
READY = 1 } impl From < HSIRDY_A > for bool { # [ inline ( always ) ]
fn from ( variant : HSIRDY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HSIRDY`" ]
pub type HSIRDY_R = crate :: R < bool , HSIRDY_A > ; impl HSIRDY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HSIRDY_A { match self . bits { false => HSIRDY_A :: NOTREADY , true => HSIRDY_A :: READY } } # [ doc = "Checks if the value of the field is `NOTREADY`" ]
# [ inline ( always ) ]
pub fn is_not_ready ( & self ) -> bool { * self == HSIRDY_A :: NOTREADY } # [ doc = "Checks if the value of the field is `READY`" ]
# [ inline ( always ) ]
pub fn is_ready ( & self ) -> bool { * self == HSIRDY_A :: READY } } # [ doc = "Reader of field `HSITRIM`" ]
pub type HSITRIM_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HSITRIM`" ]
pub struct HSITRIM_W < 'a > { w : & 'a mut W , } impl < 'a > HSITRIM_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 3 ) ) | ( ( ( value as u32 ) & 0x1f ) << 3 ) ; self . w } } # [ doc = "Reader of field `HSICAL`" ]
pub type HSICAL_R = crate :: R < u8 , u8 > ; # [ doc = "External High Speed clock enable" ]
pub type HSEON_A = HSION_A ; # [ doc = "Reader of field `HSEON`" ]
pub type HSEON_R = crate :: R < bool , HSION_A > ; # [ doc = "Write proxy for field `HSEON`" ]
pub struct HSEON_W < 'a > { w : & 'a mut W , } impl < 'a > HSEON_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HSEON_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clock Off" ]
# [ inline ( always ) ]
pub fn off ( self ) -> & 'a mut W { self . variant ( HSION_A :: OFF ) } # [ doc = "Clock On" ]
# [ inline ( always ) ]
pub fn on ( self ) -> & 'a mut W { self . variant ( HSION_A :: ON ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "External High Speed clock ready flag" ]
pub type HSERDY_A = HSIRDY_A ; # [ doc = "Reader of field `HSERDY`" ]
pub type HSERDY_R = crate :: R < bool , HSIRDY_A > ; # [ doc = "External High Speed clock Bypass\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HSEBYP_A { # [ doc = "0: HSE crystal oscillator not bypassed" ]
NOTBYPASSED = 0 , # [ doc = "1: HSE crystal oscillator bypassed with external clock" ]
BYPASSED = 1 } impl From < HSEBYP_A > for bool { # [ inline ( always ) ]
fn from ( variant : HSEBYP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HSEBYP`" ]
pub type HSEBYP_R = crate :: R < bool , HSEBYP_A > ; impl HSEBYP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HSEBYP_A { match self . bits { false => HSEBYP_A :: NOTBYPASSED , true => HSEBYP_A :: BYPASSED } } # [ doc = "Checks if the value of the field is `NOTBYPASSED`" ]
# [ inline ( always ) ]
pub fn is_not_bypassed ( & self ) -> bool { * self == HSEBYP_A :: NOTBYPASSED } # [ doc = "Checks if the value of the field is `BYPASSED`" ]
# [ inline ( always ) ]
pub fn is_bypassed ( & self ) -> bool { * self == HSEBYP_A :: BYPASSED } } # [ doc = "Write proxy for field `HSEBYP`" ]
pub struct HSEBYP_W < 'a > { w : & 'a mut W , } impl < 'a > HSEBYP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HSEBYP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "HSE crystal oscillator not bypassed" ]
# [ inline ( always ) ]
pub fn not_bypassed ( self ) -> & 'a mut W { self . variant ( HSEBYP_A :: NOTBYPASSED ) } # [ doc = "HSE crystal oscillator bypassed with external clock" ]
# [ inline ( always ) ]
pub fn bypassed ( self ) -> & 'a mut W { self . variant ( HSEBYP_A :: BYPASSED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Clock Security System enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CSSON_A { # [ doc = "0: Clock security system disabled (clock detector OFF)" ]
OFF = 0 , # [ doc = "1: Clock security system enable (clock detector ON if the HSE is ready, OFF if not)" ]
ON = 1 } impl From < CSSON_A > for bool { # [ inline ( always ) ]
fn from ( variant : CSSON_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CSSON`" ]
pub type CSSON_R = crate :: R < bool , CSSON_A > ; impl CSSON_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CSSON_A { match self . bits { false => CSSON_A :: OFF , true => CSSON_A :: ON } } # [ doc = "Checks if the value of the field is `OFF`" ]
# [ inline ( always ) ]
pub fn is_off ( & self ) -> bool { * self == CSSON_A :: OFF } # [ doc = "Checks if the value of the field is `ON`" ]
# [ inline ( always ) ]
pub fn is_on ( & self ) -> bool { * self == CSSON_A :: ON } } # [ doc = "Write proxy for field `CSSON`" ]
pub struct CSSON_W < 'a > { w : & 'a mut W , } impl < 'a > CSSON_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CSSON_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clock security system disabled (clock detector OFF)" ]
# [ inline ( always ) ]
pub fn off ( self ) -> & 'a mut W { self . variant ( CSSON_A :: OFF ) } # [ doc = "Clock security system enable (clock detector ON if the HSE is ready, OFF if not)" ]
# [ inline ( always ) ]
pub fn on ( self ) -> & 'a mut W { self . variant ( CSSON_A :: ON ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "PLL enable" ]
pub type PLLON_A = HSION_A ; # [ doc = "Reader of field `PLLON`" ]
pub type PLLON_R = crate :: R < bool , HSION_A > ; # [ doc = "Write proxy for field `PLLON`" ]
pub struct PLLON_W < 'a > { w : & 'a mut W , } impl < 'a > PLLON_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PLLON_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clock Off" ]
# [ inline ( always ) ]
pub fn off ( self ) -> & 'a mut W { self . variant ( HSION_A :: OFF ) } # [ doc = "Clock On" ]
# [ inline ( always ) ]
pub fn on ( self ) -> & 'a mut W { self . variant ( HSION_A :: ON ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "PLL clock ready flag" ]
pub type PLLRDY_A = HSIRDY_A ; # [ doc = "Reader of field `PLLRDY`" ]
pub type PLLRDY_R = crate :: R < bool , HSIRDY_A > ; impl R { # [ doc = "Bit 0 - Internal High Speed clock enable" ]
# [ inline ( always ) ]
pub fn hsion ( & self ) -> HSION_R { HSION_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Internal High Speed clock ready flag" ]
# [ inline ( always ) ]
pub fn hsirdy ( & self ) -> HSIRDY_R { HSIRDY_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bits 3:7 - Internal High Speed clock trimming" ]
# [ inline ( always ) ]
pub fn hsitrim ( & self ) -> HSITRIM_R { HSITRIM_R :: new ( ( ( self . bits >> 3 ) & 0x1f ) as u8 ) } # [ doc = "Bits 8:15 - Internal High Speed clock Calibration" ]
# [ inline ( always ) ]
pub fn hsical ( & self ) -> HSICAL_R { HSICAL_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bit 16 - External High Speed clock enable" ]
# [ inline ( always ) ]
pub fn hseon ( & self ) -> HSEON_R { HSEON_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - External High Speed clock ready flag" ]
# [ inline ( always ) ]
pub fn hserdy ( & self ) -> HSERDY_R { HSERDY_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - External High Speed clock Bypass" ]
# [ inline ( always ) ]
pub fn hsebyp ( & self ) -> HSEBYP_R { HSEBYP_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Clock Security System enable" ]
# [ inline ( always ) ]
pub fn csson ( & self ) -> CSSON_R { CSSON_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - PLL enable" ]
# [ inline ( always ) ]
pub fn pllon ( & self ) -> PLLON_R { PLLON_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - PLL clock ready flag" ]
# [ inline ( always ) ]
pub fn pllrdy ( & self ) -> PLLRDY_R { PLLRDY_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Internal High Speed clock enable" ]
# [ inline ( always ) ]
pub fn hsion ( & mut self ) -> HSION_W { HSION_W { w : self } } # [ doc = "Bits 3:7 - Internal High Speed clock trimming" ]
# [ inline ( always ) ]
pub fn hsitrim ( & mut self ) -> HSITRIM_W { HSITRIM_W { w : self } } # [ doc = "Bit 16 - External High Speed clock enable" ]
# [ inline ( always ) ]
pub fn hseon ( & mut self ) -> HSEON_W { HSEON_W { w : self } } # [ doc = "Bit 18 - External High Speed clock Bypass" ]
# [ inline ( always ) ]
pub fn hsebyp ( & mut self ) -> HSEBYP_W { HSEBYP_W { w : self } } # [ doc = "Bit 19 - Clock Security System enable" ]
# [ inline ( always ) ]
pub fn csson ( & mut self ) -> CSSON_W { CSSON_W { w : self } } # [ doc = "Bit 24 - PLL enable" ]
# [ inline ( always ) ]
pub fn pllon ( & mut self ) -> PLLON_W { PLLON_W { w : self } } } } # [ doc = "Clock configuration register (RCC_CFGR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr](cfgr) module" ]
pub type CFGR = crate :: Reg < u32 , _CFGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR ; # [ doc = "`read()` method returns [cfgr::R](cfgr::R) reader structure" ]
impl crate :: Readable for CFGR { } # [ doc = "`write(|w| ..)` method takes [cfgr::W](cfgr::W) writer structure" ]
impl crate :: Writable for CFGR { } # [ doc = "Clock configuration register (RCC_CFGR)" ]
pub mod cfgr { # [ doc = "Reader of register CFGR" ]
pub type R = crate :: R < u32 , super :: CFGR > ; # [ doc = "Writer for register CFGR" ]
pub type W = crate :: W < u32 , super :: CFGR > ; # [ doc = "Register CFGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "System clock Switch\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SW_A { # [ doc = "0: HSI selected as system clock" ]
HSI = 0 , # [ doc = "1: HSE selected as system clock" ]
HSE = 1 , # [ doc = "2: PLL selected as system clock" ]
PLL = 2 } impl From < SW_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SW_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SW`" ]
pub type SW_R = crate :: R < u8 , SW_A > ; impl SW_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , SW_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( SW_A :: HSI ) , 1 => Val ( SW_A :: HSE ) , 2 => Val ( SW_A :: PLL ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `HSI`" ]
# [ inline ( always ) ]
pub fn is_hsi ( & self ) -> bool { * self == SW_A :: HSI } # [ doc = "Checks if the value of the field is `HSE`" ]
# [ inline ( always ) ]
pub fn is_hse ( & self ) -> bool { * self == SW_A :: HSE } # [ doc = "Checks if the value of the field is `PLL`" ]
# [ inline ( always ) ]
pub fn is_pll ( & self ) -> bool { * self == SW_A :: PLL } } # [ doc = "Write proxy for field `SW`" ]
pub struct SW_W < 'a > { w : & 'a mut W , } impl < 'a > SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SW_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "HSI selected as system clock" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( SW_A :: HSI ) } # [ doc = "HSE selected as system clock" ]
# [ inline ( always ) ]
pub fn hse ( self ) -> & 'a mut W { self . variant ( SW_A :: HSE ) } # [ doc = "PLL selected as system clock" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( SW_A :: PLL ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } # [ doc = "System Clock Switch Status\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SWS_A { # [ doc = "0: HSE oscillator used as system clock" ]
HSI = 0 , # [ doc = "1: HSI oscillator used as system clock" ]
HSE = 1 , # [ doc = "2: PLL used as system clock" ]
PLL = 2 } impl From < SWS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SWS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SWS`" ]
pub type SWS_R = crate :: R < u8 , SWS_A > ; impl SWS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , SWS_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( SWS_A :: HSI ) , 1 => Val ( SWS_A :: HSE ) , 2 => Val ( SWS_A :: PLL ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `HSI`" ]
# [ inline ( always ) ]
pub fn is_hsi ( & self ) -> bool { * self == SWS_A :: HSI } # [ doc = "Checks if the value of the field is `HSE`" ]
# [ inline ( always ) ]
pub fn is_hse ( & self ) -> bool { * self == SWS_A :: HSE } # [ doc = "Checks if the value of the field is `PLL`" ]
# [ inline ( always ) ]
pub fn is_pll ( & self ) -> bool { * self == SWS_A :: PLL } } # [ doc = "AHB prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum HPRE_A { # [ doc = "0: SYSCLK not divided" ]
DIV1 = 0 , # [ doc = "8: SYSCLK divided by 2" ]
DIV2 = 8 , # [ doc = "9: SYSCLK divided by 4" ]
DIV4 = 9 , # [ doc = "10: SYSCLK divided by 8" ]
DIV8 = 10 , # [ doc = "11: SYSCLK divided by 16" ]
DIV16 = 11 , # [ doc = "12: SYSCLK divided by 64" ]
DIV64 = 12 , # [ doc = "13: SYSCLK divided by 128" ]
DIV128 = 13 , # [ doc = "14: SYSCLK divided by 256" ]
DIV256 = 14 , # [ doc = "15: SYSCLK divided by 512" ]
DIV512 = 15 } impl From < HPRE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : HPRE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `HPRE`" ]
pub type HPRE_R = crate :: R < u8 , HPRE_A > ; impl HPRE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , HPRE_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( HPRE_A :: DIV1 ) , 8 => Val ( HPRE_A :: DIV2 ) , 9 => Val ( HPRE_A :: DIV4 ) , 10 => Val ( HPRE_A :: DIV8 ) , 11 => Val ( HPRE_A :: DIV16 ) , 12 => Val ( HPRE_A :: DIV64 ) , 13 => Val ( HPRE_A :: DIV128 ) , 14 => Val ( HPRE_A :: DIV256 ) , 15 => Val ( HPRE_A :: DIV512 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == HPRE_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == HPRE_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == HPRE_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == HPRE_A :: DIV8 } # [ doc = "Checks if the value of the field is `DIV16`" ]
# [ inline ( always ) ]
pub fn is_div16 ( & self ) -> bool { * self == HPRE_A :: DIV16 } # [ doc = "Checks if the value of the field is `DIV64`" ]
# [ inline ( always ) ]
pub fn is_div64 ( & self ) -> bool { * self == HPRE_A :: DIV64 } # [ doc = "Checks if the value of the field is `DIV128`" ]
# [ inline ( always ) ]
pub fn is_div128 ( & self ) -> bool { * self == HPRE_A :: DIV128 } # [ doc = "Checks if the value of the field is `DIV256`" ]
# [ inline ( always ) ]
pub fn is_div256 ( & self ) -> bool { * self == HPRE_A :: DIV256 } # [ doc = "Checks if the value of the field is `DIV512`" ]
# [ inline ( always ) ]
pub fn is_div512 ( & self ) -> bool { * self == HPRE_A :: DIV512 } } # [ doc = "Write proxy for field `HPRE`" ]
pub struct HPRE_W < 'a > { w : & 'a mut W , } impl < 'a > HPRE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HPRE_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "SYSCLK not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV1 ) } # [ doc = "SYSCLK divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV2 ) } # [ doc = "SYSCLK divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV4 ) } # [ doc = "SYSCLK divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV8 ) } # [ doc = "SYSCLK divided by 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV16 ) } # [ doc = "SYSCLK divided by 64" ]
# [ inline ( always ) ]
pub fn div64 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV64 ) } # [ doc = "SYSCLK divided by 128" ]
# [ inline ( always ) ]
pub fn div128 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV128 ) } # [ doc = "SYSCLK divided by 256" ]
# [ inline ( always ) ]
pub fn div256 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV256 ) } # [ doc = "SYSCLK divided by 512" ]
# [ inline ( always ) ]
pub fn div512 ( self ) -> & 'a mut W { self . variant ( HPRE_A :: DIV512 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "APB Low speed prescaler (APB1)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PPRE1_A { # [ doc = "0: HCLK not divided" ]
DIV1 = 0 , # [ doc = "4: HCLK divided by 2" ]
DIV2 = 4 , # [ doc = "5: HCLK divided by 4" ]
DIV4 = 5 , # [ doc = "6: HCLK divided by 8" ]
DIV8 = 6 , # [ doc = "7: HCLK divided by 16" ]
DIV16 = 7 } impl From < PPRE1_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PPRE1_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PPRE1`" ]
pub type PPRE1_R = crate :: R < u8 , PPRE1_A > ; impl PPRE1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , PPRE1_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( PPRE1_A :: DIV1 ) , 4 => Val ( PPRE1_A :: DIV2 ) , 5 => Val ( PPRE1_A :: DIV4 ) , 6 => Val ( PPRE1_A :: DIV8 ) , 7 => Val ( PPRE1_A :: DIV16 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == PPRE1_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == PPRE1_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == PPRE1_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == PPRE1_A :: DIV8 } # [ doc = "Checks if the value of the field is `DIV16`" ]
# [ inline ( always ) ]
pub fn is_div16 ( & self ) -> bool { * self == PPRE1_A :: DIV16 } } # [ doc = "Write proxy for field `PPRE1`" ]
pub struct PPRE1_W < 'a > { w : & 'a mut W , } impl < 'a > PPRE1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PPRE1_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "HCLK not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV1 ) } # [ doc = "HCLK divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV2 ) } # [ doc = "HCLK divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV4 ) } # [ doc = "HCLK divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV8 ) } # [ doc = "HCLK divided by 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV16 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 8 ) ) | ( ( ( value as u32 ) & 0x07 ) << 8 ) ; self . w } } # [ doc = "APB high speed prescaler (APB2)" ]
pub type PPRE2_A = PPRE1_A ; # [ doc = "Reader of field `PPRE2`" ]
pub type PPRE2_R = crate :: R < u8 , PPRE1_A > ; # [ doc = "Write proxy for field `PPRE2`" ]
pub struct PPRE2_W < 'a > { w : & 'a mut W , } impl < 'a > PPRE2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PPRE2_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "HCLK not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV1 ) } # [ doc = "HCLK divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV2 ) } # [ doc = "HCLK divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV4 ) } # [ doc = "HCLK divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV8 ) } # [ doc = "HCLK divided by 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( PPRE1_A :: DIV16 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 11 ) ) | ( ( ( value as u32 ) & 0x07 ) << 11 ) ; self . w } } # [ doc = "PLL entry clock source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PLLSRC_A { # [ doc = "0: HSI divided by 2 selected as PLL input clock" ]
HSI_DIV2 = 0 , # [ doc = "1: HSI divided by PREDIV selected as PLL input clock" ]
HSI_DIV_PREDIV = 1 , # [ doc = "2: HSE divided by PREDIV selected as PLL input clock" ]
HSE_DIV_PREDIV = 2 } impl From < PLLSRC_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PLLSRC_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PLLSRC`" ]
pub type PLLSRC_R = crate :: R < u8 , PLLSRC_A > ; impl PLLSRC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , PLLSRC_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( PLLSRC_A :: HSI_DIV2 ) , 1 => Val ( PLLSRC_A :: HSI_DIV_PREDIV ) , 2 => Val ( PLLSRC_A :: HSE_DIV_PREDIV ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `HSI_DIV2`" ]
# [ inline ( always ) ]
pub fn is_hsi_div2 ( & self ) -> bool { * self == PLLSRC_A :: HSI_DIV2 } # [ doc = "Checks if the value of the field is `HSI_DIV_PREDIV`" ]
# [ inline ( always ) ]
pub fn is_hsi_div_prediv ( & self ) -> bool { * self == PLLSRC_A :: HSI_DIV_PREDIV } # [ doc = "Checks if the value of the field is `HSE_DIV_PREDIV`" ]
# [ inline ( always ) ]
pub fn is_hse_div_prediv ( & self ) -> bool { * self == PLLSRC_A :: HSE_DIV_PREDIV } } # [ doc = "Write proxy for field `PLLSRC`" ]
pub struct PLLSRC_W < 'a > { w : & 'a mut W , } impl < 'a > PLLSRC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PLLSRC_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "HSI divided by 2 selected as PLL input clock" ]
# [ inline ( always ) ]
pub fn hsi_div2 ( self ) -> & 'a mut W { self . variant ( PLLSRC_A :: HSI_DIV2 ) } # [ doc = "HSI divided by PREDIV selected as PLL input clock" ]
# [ inline ( always ) ]
pub fn hsi_div_prediv ( self ) -> & 'a mut W { self . variant ( PLLSRC_A :: HSI_DIV_PREDIV ) } # [ doc = "HSE divided by PREDIV selected as PLL input clock" ]
# [ inline ( always ) ]
pub fn hse_div_prediv ( self ) -> & 'a mut W { self . variant ( PLLSRC_A :: HSE_DIV_PREDIV ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 15 ) ) | ( ( ( value as u32 ) & 0x03 ) << 15 ) ; self . w } } # [ doc = "HSE divider for PLL entry\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PLLXTPRE_A { # [ doc = "0: HSE clock not divided" ]
DIV1 = 0 , # [ doc = "1: HSE clock divided by 2" ]
DIV2 = 1 } impl From < PLLXTPRE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PLLXTPRE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PLLXTPRE`" ]
pub type PLLXTPRE_R = crate :: R < bool , PLLXTPRE_A > ; impl PLLXTPRE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PLLXTPRE_A { match self . bits { false => PLLXTPRE_A :: DIV1 , true => PLLXTPRE_A :: DIV2 } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == PLLXTPRE_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == PLLXTPRE_A :: DIV2 } } # [ doc = "Write proxy for field `PLLXTPRE`" ]
pub struct PLLXTPRE_W < 'a > { w : & 'a mut W , } impl < 'a > PLLXTPRE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PLLXTPRE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "HSE clock not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( PLLXTPRE_A :: DIV1 ) } # [ doc = "HSE clock divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( PLLXTPRE_A :: DIV2 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "PLL Multiplication Factor\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PLLMUL_A { # [ doc = "0: PLL input clock x2" ]
MUL2 = 0 , # [ doc = "1: PLL input clock x3" ]
MUL3 = 1 , # [ doc = "2: PLL input clock x4" ]
MUL4 = 2 , # [ doc = "3: PLL input clock x5" ]
MUL5 = 3 , # [ doc = "4: PLL input clock x6" ]
MUL6 = 4 , # [ doc = "5: PLL input clock x7" ]
MUL7 = 5 , # [ doc = "6: PLL input clock x8" ]
MUL8 = 6 , # [ doc = "7: PLL input clock x9" ]
MUL9 = 7 , # [ doc = "8: PLL input clock x10" ]
MUL10 = 8 , # [ doc = "9: PLL input clock x11" ]
MUL11 = 9 , # [ doc = "10: PLL input clock x12" ]
MUL12 = 10 , # [ doc = "11: PLL input clock x13" ]
MUL13 = 11 , # [ doc = "12: PLL input clock x14" ]
MUL14 = 12 , # [ doc = "13: PLL input clock x15" ]
MUL15 = 13 , # [ doc = "14: PLL input clock x16" ]
MUL16 = 14 , # [ doc = "15: PLL input clock x16" ]
MUL16X = 15 } impl From < PLLMUL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PLLMUL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PLLMUL`" ]
pub type PLLMUL_R = crate :: R < u8 , PLLMUL_A > ; impl PLLMUL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PLLMUL_A { match self . bits { 0 => PLLMUL_A :: MUL2 , 1 => PLLMUL_A :: MUL3 , 2 => PLLMUL_A :: MUL4 , 3 => PLLMUL_A :: MUL5 , 4 => PLLMUL_A :: MUL6 , 5 => PLLMUL_A :: MUL7 , 6 => PLLMUL_A :: MUL8 , 7 => PLLMUL_A :: MUL9 , 8 => PLLMUL_A :: MUL10 , 9 => PLLMUL_A :: MUL11 , 10 => PLLMUL_A :: MUL12 , 11 => PLLMUL_A :: MUL13 , 12 => PLLMUL_A :: MUL14 , 13 => PLLMUL_A :: MUL15 , 14 => PLLMUL_A :: MUL16 , 15 => PLLMUL_A :: MUL16X , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `MUL2`" ]
# [ inline ( always ) ]
pub fn is_mul2 ( & self ) -> bool { * self == PLLMUL_A :: MUL2 } # [ doc = "Checks if the value of the field is `MUL3`" ]
# [ inline ( always ) ]
pub fn is_mul3 ( & self ) -> bool { * self == PLLMUL_A :: MUL3 } # [ doc = "Checks if the value of the field is `MUL4`" ]
# [ inline ( always ) ]
pub fn is_mul4 ( & self ) -> bool { * self == PLLMUL_A :: MUL4 } # [ doc = "Checks if the value of the field is `MUL5`" ]
# [ inline ( always ) ]
pub fn is_mul5 ( & self ) -> bool { * self == PLLMUL_A :: MUL5 } # [ doc = "Checks if the value of the field is `MUL6`" ]
# [ inline ( always ) ]
pub fn is_mul6 ( & self ) -> bool { * self == PLLMUL_A :: MUL6 } # [ doc = "Checks if the value of the field is `MUL7`" ]
# [ inline ( always ) ]
pub fn is_mul7 ( & self ) -> bool { * self == PLLMUL_A :: MUL7 } # [ doc = "Checks if the value of the field is `MUL8`" ]
# [ inline ( always ) ]
pub fn is_mul8 ( & self ) -> bool { * self == PLLMUL_A :: MUL8 } # [ doc = "Checks if the value of the field is `MUL9`" ]
# [ inline ( always ) ]
pub fn is_mul9 ( & self ) -> bool { * self == PLLMUL_A :: MUL9 } # [ doc = "Checks if the value of the field is `MUL10`" ]
# [ inline ( always ) ]
pub fn is_mul10 ( & self ) -> bool { * self == PLLMUL_A :: MUL10 } # [ doc = "Checks if the value of the field is `MUL11`" ]
# [ inline ( always ) ]
pub fn is_mul11 ( & self ) -> bool { * self == PLLMUL_A :: MUL11 } # [ doc = "Checks if the value of the field is `MUL12`" ]
# [ inline ( always ) ]
pub fn is_mul12 ( & self ) -> bool { * self == PLLMUL_A :: MUL12 } # [ doc = "Checks if the value of the field is `MUL13`" ]
# [ inline ( always ) ]
pub fn is_mul13 ( & self ) -> bool { * self == PLLMUL_A :: MUL13 } # [ doc = "Checks if the value of the field is `MUL14`" ]
# [ inline ( always ) ]
pub fn is_mul14 ( & self ) -> bool { * self == PLLMUL_A :: MUL14 } # [ doc = "Checks if the value of the field is `MUL15`" ]
# [ inline ( always ) ]
pub fn is_mul15 ( & self ) -> bool { * self == PLLMUL_A :: MUL15 } # [ doc = "Checks if the value of the field is `MUL16`" ]
# [ inline ( always ) ]
pub fn is_mul16 ( & self ) -> bool { * self == PLLMUL_A :: MUL16 } # [ doc = "Checks if the value of the field is `MUL16X`" ]
# [ inline ( always ) ]
pub fn is_mul16x ( & self ) -> bool { * self == PLLMUL_A :: MUL16X } } # [ doc = "Write proxy for field `PLLMUL`" ]
pub struct PLLMUL_W < 'a > { w : & 'a mut W , } impl < 'a > PLLMUL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PLLMUL_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PLL input clock x2" ]
# [ inline ( always ) ]
pub fn mul2 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL2 ) } # [ doc = "PLL input clock x3" ]
# [ inline ( always ) ]
pub fn mul3 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL3 ) } # [ doc = "PLL input clock x4" ]
# [ inline ( always ) ]
pub fn mul4 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL4 ) } # [ doc = "PLL input clock x5" ]
# [ inline ( always ) ]
pub fn mul5 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL5 ) } # [ doc = "PLL input clock x6" ]
# [ inline ( always ) ]
pub fn mul6 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL6 ) } # [ doc = "PLL input clock x7" ]
# [ inline ( always ) ]
pub fn mul7 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL7 ) } # [ doc = "PLL input clock x8" ]
# [ inline ( always ) ]
pub fn mul8 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL8 ) } # [ doc = "PLL input clock x9" ]
# [ inline ( always ) ]
pub fn mul9 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL9 ) } # [ doc = "PLL input clock x10" ]
# [ inline ( always ) ]
pub fn mul10 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL10 ) } # [ doc = "PLL input clock x11" ]
# [ inline ( always ) ]
pub fn mul11 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL11 ) } # [ doc = "PLL input clock x12" ]
# [ inline ( always ) ]
pub fn mul12 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL12 ) } # [ doc = "PLL input clock x13" ]
# [ inline ( always ) ]
pub fn mul13 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL13 ) } # [ doc = "PLL input clock x14" ]
# [ inline ( always ) ]
pub fn mul14 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL14 ) } # [ doc = "PLL input clock x15" ]
# [ inline ( always ) ]
pub fn mul15 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL15 ) } # [ doc = "PLL input clock x16" ]
# [ inline ( always ) ]
pub fn mul16 ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL16 ) } # [ doc = "PLL input clock x16" ]
# [ inline ( always ) ]
pub fn mul16x ( self ) -> & 'a mut W { self . variant ( PLLMUL_A :: MUL16X ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 18 ) ) | ( ( ( value as u32 ) & 0x0f ) << 18 ) ; self . w } } # [ doc = "USB prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum USBPRE_A { # [ doc = "0: PLL clock is divided by 1.5" ]
DIV1_5 = 0 , # [ doc = "1: PLL clock is not divided" ]
DIV1 = 1 } impl From < USBPRE_A > for bool { # [ inline ( always ) ]
fn from ( variant : USBPRE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `USBPRE`" ]
pub type USBPRE_R = crate :: R < bool , USBPRE_A > ; impl USBPRE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> USBPRE_A { match self . bits { false => USBPRE_A :: DIV1_5 , true => USBPRE_A :: DIV1 } } # [ doc = "Checks if the value of the field is `DIV1_5`" ]
# [ inline ( always ) ]
pub fn is_div1_5 ( & self ) -> bool { * self == USBPRE_A :: DIV1_5 } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == USBPRE_A :: DIV1 } } # [ doc = "Write proxy for field `USBPRE`" ]
pub struct USBPRE_W < 'a > { w : & 'a mut W , } impl < 'a > USBPRE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USBPRE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PLL clock is divided by 1.5" ]
# [ inline ( always ) ]
pub fn div1_5 ( self ) -> & 'a mut W { self . variant ( USBPRE_A :: DIV1_5 ) } # [ doc = "PLL clock is not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( USBPRE_A :: DIV1 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Microcontroller clock output\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MCO_A { # [ doc = "0: MCO output disabled, no clock on MCO" ]
NOMCO = 0 , # [ doc = "2: Internal low speed (LSI) oscillator clock selected" ]
LSI = 2 , # [ doc = "3: External low speed (LSE) oscillator clock selected" ]
LSE = 3 , # [ doc = "4: System clock selected" ]
SYSCLK = 4 , # [ doc = "5: Internal RC 8 MHz (HSI) oscillator clock selected" ]
HSI = 5 , # [ doc = "6: External 4-32 MHz (HSE) oscillator clock selected" ]
HSE = 6 , # [ doc = "7: PLL clock selected (divided by 1 or 2, depending en PLLNODIV)" ]
PLL = 7 } impl From < MCO_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MCO_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MCO`" ]
pub type MCO_R = crate :: R < u8 , MCO_A > ; impl MCO_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , MCO_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( MCO_A :: NOMCO ) , 2 => Val ( MCO_A :: LSI ) , 3 => Val ( MCO_A :: LSE ) , 4 => Val ( MCO_A :: SYSCLK ) , 5 => Val ( MCO_A :: HSI ) , 6 => Val ( MCO_A :: HSE ) , 7 => Val ( MCO_A :: PLL ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOMCO`" ]
# [ inline ( always ) ]
pub fn is_no_mco ( & self ) -> bool { * self == MCO_A :: NOMCO } # [ doc = "Checks if the value of the field is `LSI`" ]
# [ inline ( always ) ]
pub fn is_lsi ( & self ) -> bool { * self == MCO_A :: LSI } # [ doc = "Checks if the value of the field is `LSE`" ]
# [ inline ( always ) ]
pub fn is_lse ( & self ) -> bool { * self == MCO_A :: LSE } # [ doc = "Checks if the value of the field is `SYSCLK`" ]
# [ inline ( always ) ]
pub fn is_sysclk ( & self ) -> bool { * self == MCO_A :: SYSCLK } # [ doc = "Checks if the value of the field is `HSI`" ]
# [ inline ( always ) ]
pub fn is_hsi ( & self ) -> bool { * self == MCO_A :: HSI } # [ doc = "Checks if the value of the field is `HSE`" ]
# [ inline ( always ) ]
pub fn is_hse ( & self ) -> bool { * self == MCO_A :: HSE } # [ doc = "Checks if the value of the field is `PLL`" ]
# [ inline ( always ) ]
pub fn is_pll ( & self ) -> bool { * self == MCO_A :: PLL } } # [ doc = "Write proxy for field `MCO`" ]
pub struct MCO_W < 'a > { w : & 'a mut W , } impl < 'a > MCO_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MCO_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "MCO output disabled, no clock on MCO" ]
# [ inline ( always ) ]
pub fn no_mco ( self ) -> & 'a mut W { self . variant ( MCO_A :: NOMCO ) } # [ doc = "Internal low speed (LSI) oscillator clock selected" ]
# [ inline ( always ) ]
pub fn lsi ( self ) -> & 'a mut W { self . variant ( MCO_A :: LSI ) } # [ doc = "External low speed (LSE) oscillator clock selected" ]
# [ inline ( always ) ]
pub fn lse ( self ) -> & 'a mut W { self . variant ( MCO_A :: LSE ) } # [ doc = "System clock selected" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( MCO_A :: SYSCLK ) } # [ doc = "Internal RC 8 MHz (HSI) oscillator clock selected" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( MCO_A :: HSI ) } # [ doc = "External 4-32 MHz (HSE) oscillator clock selected" ]
# [ inline ( always ) ]
pub fn hse ( self ) -> & 'a mut W { self . variant ( MCO_A :: HSE ) } # [ doc = "PLL clock selected (divided by 1 or 2, depending en PLLNODIV)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( MCO_A :: PLL ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 24 ) ) | ( ( ( value as u32 ) & 0x07 ) << 24 ) ; self . w } } # [ doc = "I2S external clock source selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2SSRC_A { # [ doc = "0: System clock used as I2S clock source" ]
SYSCLK = 0 , # [ doc = "1: External clock mapped on the I2S_CKIN pin used as I2S clock source" ]
CKIN = 1 } impl From < I2SSRC_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2SSRC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2SSRC`" ]
pub type I2SSRC_R = crate :: R < bool , I2SSRC_A > ; impl I2SSRC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2SSRC_A { match self . bits { false => I2SSRC_A :: SYSCLK , true => I2SSRC_A :: CKIN } } # [ doc = "Checks if the value of the field is `SYSCLK`" ]
# [ inline ( always ) ]
pub fn is_sysclk ( & self ) -> bool { * self == I2SSRC_A :: SYSCLK } # [ doc = "Checks if the value of the field is `CKIN`" ]
# [ inline ( always ) ]
pub fn is_ckin ( & self ) -> bool { * self == I2SSRC_A :: CKIN } } # [ doc = "Write proxy for field `I2SSRC`" ]
pub struct I2SSRC_W < 'a > { w : & 'a mut W , } impl < 'a > I2SSRC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2SSRC_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "System clock used as I2S clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( I2SSRC_A :: SYSCLK ) } # [ doc = "External clock mapped on the I2S_CKIN pin used as I2S clock source" ]
# [ inline ( always ) ]
pub fn ckin ( self ) -> & 'a mut W { self . variant ( I2SSRC_A :: CKIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Microcontroller Clock Output Prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MCOPRE_A { # [ doc = "0: MCO is divided by 1" ]
DIV1 = 0 , # [ doc = "1: MCO is divided by 2" ]
DIV2 = 1 , # [ doc = "2: MCO is divided by 4" ]
DIV4 = 2 , # [ doc = "3: MCO is divided by 8" ]
DIV8 = 3 , # [ doc = "4: MCO is divided by 16" ]
DIV16 = 4 , # [ doc = "5: MCO is divided by 32" ]
DIV32 = 5 , # [ doc = "6: MCO is divided by 64" ]
DIV64 = 6 , # [ doc = "7: MCO is divided by 128" ]
DIV128 = 7 } impl From < MCOPRE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MCOPRE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MCOPRE`" ]
pub type MCOPRE_R = crate :: R < u8 , MCOPRE_A > ; impl MCOPRE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MCOPRE_A { match self . bits { 0 => MCOPRE_A :: DIV1 , 1 => MCOPRE_A :: DIV2 , 2 => MCOPRE_A :: DIV4 , 3 => MCOPRE_A :: DIV8 , 4 => MCOPRE_A :: DIV16 , 5 => MCOPRE_A :: DIV32 , 6 => MCOPRE_A :: DIV64 , 7 => MCOPRE_A :: DIV128 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == MCOPRE_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == MCOPRE_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == MCOPRE_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == MCOPRE_A :: DIV8 } # [ doc = "Checks if the value of the field is `DIV16`" ]
# [ inline ( always ) ]
pub fn is_div16 ( & self ) -> bool { * self == MCOPRE_A :: DIV16 } # [ doc = "Checks if the value of the field is `DIV32`" ]
# [ inline ( always ) ]
pub fn is_div32 ( & self ) -> bool { * self == MCOPRE_A :: DIV32 } # [ doc = "Checks if the value of the field is `DIV64`" ]
# [ inline ( always ) ]
pub fn is_div64 ( & self ) -> bool { * self == MCOPRE_A :: DIV64 } # [ doc = "Checks if the value of the field is `DIV128`" ]
# [ inline ( always ) ]
pub fn is_div128 ( & self ) -> bool { * self == MCOPRE_A :: DIV128 } } # [ doc = "Write proxy for field `MCOPRE`" ]
pub struct MCOPRE_W < 'a > { w : & 'a mut W , } impl < 'a > MCOPRE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MCOPRE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "MCO is divided by 1" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV1 ) } # [ doc = "MCO is divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV2 ) } # [ doc = "MCO is divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV4 ) } # [ doc = "MCO is divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV8 ) } # [ doc = "MCO is divided by 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV16 ) } # [ doc = "MCO is divided by 32" ]
# [ inline ( always ) ]
pub fn div32 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV32 ) } # [ doc = "MCO is divided by 64" ]
# [ inline ( always ) ]
pub fn div64 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV64 ) } # [ doc = "MCO is divided by 128" ]
# [ inline ( always ) ]
pub fn div128 ( self ) -> & 'a mut W { self . variant ( MCOPRE_A :: DIV128 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 28 ) ) | ( ( ( value as u32 ) & 0x07 ) << 28 ) ; self . w } } # [ doc = "Do not divide PLL to MCO\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PLLNODIV_A { # [ doc = "0: PLL is divided by 2 for MCO" ]
DIV2 = 0 , # [ doc = "1: PLL is not divided for MCO" ]
DIV1 = 1 } impl From < PLLNODIV_A > for bool { # [ inline ( always ) ]
fn from ( variant : PLLNODIV_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PLLNODIV`" ]
pub type PLLNODIV_R = crate :: R < bool , PLLNODIV_A > ; impl PLLNODIV_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PLLNODIV_A { match self . bits { false => PLLNODIV_A :: DIV2 , true => PLLNODIV_A :: DIV1 } } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == PLLNODIV_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == PLLNODIV_A :: DIV1 } } # [ doc = "Write proxy for field `PLLNODIV`" ]
pub struct PLLNODIV_W < 'a > { w : & 'a mut W , } impl < 'a > PLLNODIV_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PLLNODIV_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PLL is divided by 2 for MCO" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( PLLNODIV_A :: DIV2 ) } # [ doc = "PLL is not divided for MCO" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( PLLNODIV_A :: DIV1 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bits 0:1 - System clock Switch" ]
# [ inline ( always ) ]
pub fn sw ( & self ) -> SW_R { SW_R :: new ( ( self . bits & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - System Clock Switch Status" ]
# [ inline ( always ) ]
pub fn sws ( & self ) -> SWS_R { SWS_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - AHB prescaler" ]
# [ inline ( always ) ]
pub fn hpre ( & self ) -> HPRE_R { HPRE_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:10 - APB Low speed prescaler (APB1)" ]
# [ inline ( always ) ]
pub fn ppre1 ( & self ) -> PPRE1_R { PPRE1_R :: new ( ( ( self . bits >> 8 ) & 0x07 ) as u8 ) } # [ doc = "Bits 11:13 - APB high speed prescaler (APB2)" ]
# [ inline ( always ) ]
pub fn ppre2 ( & self ) -> PPRE2_R { PPRE2_R :: new ( ( ( self . bits >> 11 ) & 0x07 ) as u8 ) } # [ doc = "Bits 15:16 - PLL entry clock source" ]
# [ inline ( always ) ]
pub fn pllsrc ( & self ) -> PLLSRC_R { PLLSRC_R :: new ( ( ( self . bits >> 15 ) & 0x03 ) as u8 ) } # [ doc = "Bit 17 - HSE divider for PLL entry" ]
# [ inline ( always ) ]
pub fn pllxtpre ( & self ) -> PLLXTPRE_R { PLLXTPRE_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bits 18:21 - PLL Multiplication Factor" ]
# [ inline ( always ) ]
pub fn pllmul ( & self ) -> PLLMUL_R { PLLMUL_R :: new ( ( ( self . bits >> 18 ) & 0x0f ) as u8 ) } # [ doc = "Bit 22 - USB prescaler" ]
# [ inline ( always ) ]
pub fn usbpre ( & self ) -> USBPRE_R { USBPRE_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bits 24:26 - Microcontroller clock output" ]
# [ inline ( always ) ]
pub fn mco ( & self ) -> MCO_R { MCO_R :: new ( ( ( self . bits >> 24 ) & 0x07 ) as u8 ) } # [ doc = "Bit 23 - I2S external clock source selection" ]
# [ inline ( always ) ]
pub fn i2ssrc ( & self ) -> I2SSRC_R { I2SSRC_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bits 28:30 - Microcontroller Clock Output Prescaler" ]
# [ inline ( always ) ]
pub fn mcopre ( & self ) -> MCOPRE_R { MCOPRE_R :: new ( ( ( self . bits >> 28 ) & 0x07 ) as u8 ) } # [ doc = "Bit 31 - Do not divide PLL to MCO" ]
# [ inline ( always ) ]
pub fn pllnodiv ( & self ) -> PLLNODIV_R { PLLNODIV_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:1 - System clock Switch" ]
# [ inline ( always ) ]
pub fn sw ( & mut self ) -> SW_W { SW_W { w : self } } # [ doc = "Bits 4:7 - AHB prescaler" ]
# [ inline ( always ) ]
pub fn hpre ( & mut self ) -> HPRE_W { HPRE_W { w : self } } # [ doc = "Bits 8:10 - APB Low speed prescaler (APB1)" ]
# [ inline ( always ) ]
pub fn ppre1 ( & mut self ) -> PPRE1_W { PPRE1_W { w : self } } # [ doc = "Bits 11:13 - APB high speed prescaler (APB2)" ]
# [ inline ( always ) ]
pub fn ppre2 ( & mut self ) -> PPRE2_W { PPRE2_W { w : self } } # [ doc = "Bits 15:16 - PLL entry clock source" ]
# [ inline ( always ) ]
pub fn pllsrc ( & mut self ) -> PLLSRC_W { PLLSRC_W { w : self } } # [ doc = "Bit 17 - HSE divider for PLL entry" ]
# [ inline ( always ) ]
pub fn pllxtpre ( & mut self ) -> PLLXTPRE_W { PLLXTPRE_W { w : self } } # [ doc = "Bits 18:21 - PLL Multiplication Factor" ]
# [ inline ( always ) ]
pub fn pllmul ( & mut self ) -> PLLMUL_W { PLLMUL_W { w : self } } # [ doc = "Bit 22 - USB prescaler" ]
# [ inline ( always ) ]
pub fn usbpre ( & mut self ) -> USBPRE_W { USBPRE_W { w : self } } # [ doc = "Bits 24:26 - Microcontroller clock output" ]
# [ inline ( always ) ]
pub fn mco ( & mut self ) -> MCO_W { MCO_W { w : self } } # [ doc = "Bit 23 - I2S external clock source selection" ]
# [ inline ( always ) ]
pub fn i2ssrc ( & mut self ) -> I2SSRC_W { I2SSRC_W { w : self } } # [ doc = "Bits 28:30 - Microcontroller Clock Output Prescaler" ]
# [ inline ( always ) ]
pub fn mcopre ( & mut self ) -> MCOPRE_W { MCOPRE_W { w : self } } # [ doc = "Bit 31 - Do not divide PLL to MCO" ]
# [ inline ( always ) ]
pub fn pllnodiv ( & mut self ) -> PLLNODIV_W { PLLNODIV_W { w : self } } } } # [ doc = "Clock interrupt register (RCC_CIR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cir](cir) module" ]
pub type CIR = crate :: Reg < u32 , _CIR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CIR ; # [ doc = "`read()` method returns [cir::R](cir::R) reader structure" ]
impl crate :: Readable for CIR { } # [ doc = "`write(|w| ..)` method takes [cir::W](cir::W) writer structure" ]
impl crate :: Writable for CIR { } # [ doc = "Clock interrupt register (RCC_CIR)" ]
pub mod cir { # [ doc = "Reader of register CIR" ]
pub type R = crate :: R < u32 , super :: CIR > ; # [ doc = "Writer for register CIR" ]
pub type W = crate :: W < u32 , super :: CIR > ; # [ doc = "Register CIR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CIR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "LSI Ready Interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSIRDYF_A { # [ doc = "0: No clock ready interrupt" ]
NOTINTERRUPTED = 0 , # [ doc = "1: Clock ready interrupt" ]
INTERRUPTED = 1 } impl From < LSIRDYF_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSIRDYF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSIRDYF`" ]
pub type LSIRDYF_R = crate :: R < bool , LSIRDYF_A > ; impl LSIRDYF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSIRDYF_A { match self . bits { false => LSIRDYF_A :: NOTINTERRUPTED , true => LSIRDYF_A :: INTERRUPTED } } # [ doc = "Checks if the value of the field is `NOTINTERRUPTED`" ]
# [ inline ( always ) ]
pub fn is_not_interrupted ( & self ) -> bool { * self == LSIRDYF_A :: NOTINTERRUPTED } # [ doc = "Checks if the value of the field is `INTERRUPTED`" ]
# [ inline ( always ) ]
pub fn is_interrupted ( & self ) -> bool { * self == LSIRDYF_A :: INTERRUPTED } } # [ doc = "LSE Ready Interrupt flag" ]
pub type LSERDYF_A = LSIRDYF_A ; # [ doc = "Reader of field `LSERDYF`" ]
pub type LSERDYF_R = crate :: R < bool , LSIRDYF_A > ; # [ doc = "HSI Ready Interrupt flag" ]
pub type HSIRDYF_A = LSIRDYF_A ; # [ doc = "Reader of field `HSIRDYF`" ]
pub type HSIRDYF_R = crate :: R < bool , LSIRDYF_A > ; # [ doc = "HSE Ready Interrupt flag" ]
pub type HSERDYF_A = LSIRDYF_A ; # [ doc = "Reader of field `HSERDYF`" ]
pub type HSERDYF_R = crate :: R < bool , LSIRDYF_A > ; # [ doc = "PLL Ready Interrupt flag" ]
pub type PLLRDYF_A = LSIRDYF_A ; # [ doc = "Reader of field `PLLRDYF`" ]
pub type PLLRDYF_R = crate :: R < bool , LSIRDYF_A > ; # [ doc = "Clock Security System Interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CSSF_A { # [ doc = "0: No clock security interrupt caused by HSE clock failure" ]
NOTINTERRUPTED = 0 , # [ doc = "1: Clock security interrupt caused by HSE clock failure" ]
INTERRUPTED = 1 } impl From < CSSF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CSSF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CSSF`" ]
pub type CSSF_R = crate :: R < bool , CSSF_A > ; impl CSSF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CSSF_A { match self . bits { false => CSSF_A :: NOTINTERRUPTED , true => CSSF_A :: INTERRUPTED } } # [ doc = "Checks if the value of the field is `NOTINTERRUPTED`" ]
# [ inline ( always ) ]
pub fn is_not_interrupted ( & self ) -> bool { * self == CSSF_A :: NOTINTERRUPTED } # [ doc = "Checks if the value of the field is `INTERRUPTED`" ]
# [ inline ( always ) ]
pub fn is_interrupted ( & self ) -> bool { * self == CSSF_A :: INTERRUPTED } } # [ doc = "LSI Ready Interrupt Enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSIRDYIE_A { # [ doc = "0: Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Interrupt enabled" ]
ENABLED = 1 } impl From < LSIRDYIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSIRDYIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSIRDYIE`" ]
pub type LSIRDYIE_R = crate :: R < bool , LSIRDYIE_A > ; impl LSIRDYIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSIRDYIE_A { match self . bits { false => LSIRDYIE_A :: DISABLED , true => LSIRDYIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == LSIRDYIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == LSIRDYIE_A :: ENABLED } } # [ doc = "Write proxy for field `LSIRDYIE`" ]
pub struct LSIRDYIE_W < 'a > { w : & 'a mut W , } impl < 'a > LSIRDYIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSIRDYIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: DISABLED ) } # [ doc = "Interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "LSE Ready Interrupt Enable" ]
pub type LSERDYIE_A = LSIRDYIE_A ; # [ doc = "Reader of field `LSERDYIE`" ]
pub type LSERDYIE_R = crate :: R < bool , LSIRDYIE_A > ; # [ doc = "Write proxy for field `LSERDYIE`" ]
pub struct LSERDYIE_W < 'a > { w : & 'a mut W , } impl < 'a > LSERDYIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSERDYIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: DISABLED ) } # [ doc = "Interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "HSI Ready Interrupt Enable" ]
pub type HSIRDYIE_A = LSIRDYIE_A ; # [ doc = "Reader of field `HSIRDYIE`" ]
pub type HSIRDYIE_R = crate :: R < bool , LSIRDYIE_A > ; # [ doc = "Write proxy for field `HSIRDYIE`" ]
pub struct HSIRDYIE_W < 'a > { w : & 'a mut W , } impl < 'a > HSIRDYIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HSIRDYIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: DISABLED ) } # [ doc = "Interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "HSE Ready Interrupt Enable" ]
pub type HSERDYIE_A = LSIRDYIE_A ; # [ doc = "Reader of field `HSERDYIE`" ]
pub type HSERDYIE_R = crate :: R < bool , LSIRDYIE_A > ; # [ doc = "Write proxy for field `HSERDYIE`" ]
pub struct HSERDYIE_W < 'a > { w : & 'a mut W , } impl < 'a > HSERDYIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HSERDYIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: DISABLED ) } # [ doc = "Interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "PLL Ready Interrupt Enable" ]
pub type PLLRDYIE_A = LSIRDYIE_A ; # [ doc = "Reader of field `PLLRDYIE`" ]
pub type PLLRDYIE_R = crate :: R < bool , LSIRDYIE_A > ; # [ doc = "Write proxy for field `PLLRDYIE`" ]
pub struct PLLRDYIE_W < 'a > { w : & 'a mut W , } impl < 'a > PLLRDYIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PLLRDYIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: DISABLED ) } # [ doc = "Interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LSIRDYIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "LSI Ready Interrupt Clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSIRDYC_AW { # [ doc = "1: Clear interrupt flag" ]
CLEAR = 1 } impl From < LSIRDYC_AW > for bool { # [ inline ( always ) ]
fn from ( variant : LSIRDYC_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `LSIRDYC`" ]
pub struct LSIRDYC_W < 'a > { w : & 'a mut W , } impl < 'a > LSIRDYC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSIRDYC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear interrupt flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( LSIRDYC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "LSE Ready Interrupt Clear" ]
pub type LSERDYC_AW = LSIRDYC_AW ; # [ doc = "Write proxy for field `LSERDYC`" ]
pub struct LSERDYC_W < 'a > { w : & 'a mut W , } impl < 'a > LSERDYC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSERDYC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear interrupt flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( LSIRDYC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "HSI Ready Interrupt Clear" ]
pub type HSIRDYC_AW = LSIRDYC_AW ; # [ doc = "Write proxy for field `HSIRDYC`" ]
pub struct HSIRDYC_W < 'a > { w : & 'a mut W , } impl < 'a > HSIRDYC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HSIRDYC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear interrupt flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( LSIRDYC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "HSE Ready Interrupt Clear" ]
pub type HSERDYC_AW = LSIRDYC_AW ; # [ doc = "Write proxy for field `HSERDYC`" ]
pub struct HSERDYC_W < 'a > { w : & 'a mut W , } impl < 'a > HSERDYC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HSERDYC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear interrupt flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( LSIRDYC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "PLL Ready Interrupt Clear" ]
pub type PLLRDYC_AW = LSIRDYC_AW ; # [ doc = "Write proxy for field `PLLRDYC`" ]
pub struct PLLRDYC_W < 'a > { w : & 'a mut W , } impl < 'a > PLLRDYC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PLLRDYC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear interrupt flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( LSIRDYC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Clock security system interrupt clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CSSC_AW { # [ doc = "1: Clear CSSF flag" ]
CLEAR = 1 } impl From < CSSC_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CSSC_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CSSC`" ]
pub struct CSSC_W < 'a > { w : & 'a mut W , } impl < 'a > CSSC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CSSC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear CSSF flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CSSC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } impl R { # [ doc = "Bit 0 - LSI Ready Interrupt flag" ]
# [ inline ( always ) ]
pub fn lsirdyf ( & self ) -> LSIRDYF_R { LSIRDYF_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - LSE Ready Interrupt flag" ]
# [ inline ( always ) ]
pub fn lserdyf ( & self ) -> LSERDYF_R { LSERDYF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - HSI Ready Interrupt flag" ]
# [ inline ( always ) ]
pub fn hsirdyf ( & self ) -> HSIRDYF_R { HSIRDYF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - HSE Ready Interrupt flag" ]
# [ inline ( always ) ]
pub fn hserdyf ( & self ) -> HSERDYF_R { HSERDYF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - PLL Ready Interrupt flag" ]
# [ inline ( always ) ]
pub fn pllrdyf ( & self ) -> PLLRDYF_R { PLLRDYF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Clock Security System Interrupt flag" ]
# [ inline ( always ) ]
pub fn cssf ( & self ) -> CSSF_R { CSSF_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - LSI Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn lsirdyie ( & self ) -> LSIRDYIE_R { LSIRDYIE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - LSE Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn lserdyie ( & self ) -> LSERDYIE_R { LSERDYIE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - HSI Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn hsirdyie ( & self ) -> HSIRDYIE_R { HSIRDYIE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - HSE Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn hserdyie ( & self ) -> HSERDYIE_R { HSERDYIE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - PLL Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn pllrdyie ( & self ) -> PLLRDYIE_R { PLLRDYIE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 8 - LSI Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn lsirdyie ( & mut self ) -> LSIRDYIE_W { LSIRDYIE_W { w : self } } # [ doc = "Bit 9 - LSE Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn lserdyie ( & mut self ) -> LSERDYIE_W { LSERDYIE_W { w : self } } # [ doc = "Bit 10 - HSI Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn hsirdyie ( & mut self ) -> HSIRDYIE_W { HSIRDYIE_W { w : self } } # [ doc = "Bit 11 - HSE Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn hserdyie ( & mut self ) -> HSERDYIE_W { HSERDYIE_W { w : self } } # [ doc = "Bit 12 - PLL Ready Interrupt Enable" ]
# [ inline ( always ) ]
pub fn pllrdyie ( & mut self ) -> PLLRDYIE_W { PLLRDYIE_W { w : self } } # [ doc = "Bit 16 - LSI Ready Interrupt Clear" ]
# [ inline ( always ) ]
pub fn lsirdyc ( & mut self ) -> LSIRDYC_W { LSIRDYC_W { w : self } } # [ doc = "Bit 17 - LSE Ready Interrupt Clear" ]
# [ inline ( always ) ]
pub fn lserdyc ( & mut self ) -> LSERDYC_W { LSERDYC_W { w : self } } # [ doc = "Bit 18 - HSI Ready Interrupt Clear" ]
# [ inline ( always ) ]
pub fn hsirdyc ( & mut self ) -> HSIRDYC_W { HSIRDYC_W { w : self } } # [ doc = "Bit 19 - HSE Ready Interrupt Clear" ]
# [ inline ( always ) ]
pub fn hserdyc ( & mut self ) -> HSERDYC_W { HSERDYC_W { w : self } } # [ doc = "Bit 20 - PLL Ready Interrupt Clear" ]
# [ inline ( always ) ]
pub fn pllrdyc ( & mut self ) -> PLLRDYC_W { PLLRDYC_W { w : self } } # [ doc = "Bit 23 - Clock security system interrupt clear" ]
# [ inline ( always ) ]
pub fn cssc ( & mut self ) -> CSSC_W { CSSC_W { w : self } } } } # [ doc = "APB2 peripheral reset register (RCC_APB2RSTR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2rstr](apb2rstr) module" ]
pub type APB2RSTR = crate :: Reg < u32 , _APB2RSTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _APB2RSTR ; # [ doc = "`read()` method returns [apb2rstr::R](apb2rstr::R) reader structure" ]
impl crate :: Readable for APB2RSTR { } # [ doc = "`write(|w| ..)` method takes [apb2rstr::W](apb2rstr::W) writer structure" ]
impl crate :: Writable for APB2RSTR { } # [ doc = "APB2 peripheral reset register (RCC_APB2RSTR)" ]
pub mod apb2rstr { # [ doc = "Reader of register APB2RSTR" ]
pub type R = crate :: R < u32 , super :: APB2RSTR > ; # [ doc = "Writer for register APB2RSTR" ]
pub type W = crate :: W < u32 , super :: APB2RSTR > ; # [ doc = "Register APB2RSTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: APB2RSTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "SYSCFG and COMP reset\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SYSCFGRST_A { # [ doc = "1: Reset the selected module" ]
RESET = 1 } impl From < SYSCFGRST_A > for bool { # [ inline ( always ) ]
fn from ( variant : SYSCFGRST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SYSCFGRST`" ]
pub type SYSCFGRST_R = crate :: R < bool , SYSCFGRST_A > ; impl SYSCFGRST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , SYSCFGRST_A > { use crate :: Variant :: * ; match self . bits { true => Val ( SYSCFGRST_A :: RESET ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == SYSCFGRST_A :: RESET } } # [ doc = "Write proxy for field `SYSCFGRST`" ]
pub struct SYSCFGRST_W < 'a > { w : & 'a mut W , } impl < 'a > SYSCFGRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SYSCFGRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "SPI 1 reset" ]
pub type SPI1RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `SPI1RST`" ]
pub type SPI1RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `SPI1RST`" ]
pub struct SPI1RST_W < 'a > { w : & 'a mut W , } impl < 'a > SPI1RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI1RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "USART1 reset" ]
pub type USART1RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `USART1RST`" ]
pub type USART1RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `USART1RST`" ]
pub struct USART1RST_W < 'a > { w : & 'a mut W , } impl < 'a > USART1RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART1RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "TIM15 timer reset" ]
pub type TIM15RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `TIM15RST`" ]
pub type TIM15RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `TIM15RST`" ]
pub struct TIM15RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM15RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM15RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "TIM16 timer reset" ]
pub type TIM16RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `TIM16RST`" ]
pub type TIM16RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `TIM16RST`" ]
pub struct TIM16RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM16RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM16RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "TIM17 timer reset" ]
pub type TIM17RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `TIM17RST`" ]
pub type TIM17RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `TIM17RST`" ]
pub struct TIM17RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM17RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM17RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "TIM1 timer reset" ]
pub type TIM1RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `TIM1RST`" ]
pub type TIM1RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `TIM1RST`" ]
pub struct TIM1RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM1RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM1RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "TIM8 timer reset" ]
pub type TIM8RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `TIM8RST`" ]
pub type TIM8RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `TIM8RST`" ]
pub struct TIM8RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM8RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM8RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "SPI4 reset" ]
pub type SPI4RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `SPI4RST`" ]
pub type SPI4RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `SPI4RST`" ]
pub struct SPI4RST_W < 'a > { w : & 'a mut W , } impl < 'a > SPI4RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI4RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "TIM20 timer reset" ]
pub type TIM20RST_A = SYSCFGRST_A ; # [ doc = "Reader of field `TIM20RST`" ]
pub type TIM20RST_R = crate :: R < bool , SYSCFGRST_A > ; # [ doc = "Write proxy for field `TIM20RST`" ]
pub struct TIM20RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM20RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM20RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( SYSCFGRST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } impl R { # [ doc = "Bit 0 - SYSCFG and COMP reset" ]
# [ inline ( always ) ]
pub fn syscfgrst ( & self ) -> SYSCFGRST_R { SYSCFGRST_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 12 - SPI 1 reset" ]
# [ inline ( always ) ]
pub fn spi1rst ( & self ) -> SPI1RST_R { SPI1RST_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - USART1 reset" ]
# [ inline ( always ) ]
pub fn usart1rst ( & self ) -> USART1RST_R { USART1RST_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - TIM15 timer reset" ]
# [ inline ( always ) ]
pub fn tim15rst ( & self ) -> TIM15RST_R { TIM15RST_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - TIM16 timer reset" ]
# [ inline ( always ) ]
pub fn tim16rst ( & self ) -> TIM16RST_R { TIM16RST_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - TIM17 timer reset" ]
# [ inline ( always ) ]
pub fn tim17rst ( & self ) -> TIM17RST_R { TIM17RST_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - TIM1 timer reset" ]
# [ inline ( always ) ]
pub fn tim1rst ( & self ) -> TIM1RST_R { TIM1RST_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - TIM8 timer reset" ]
# [ inline ( always ) ]
pub fn tim8rst ( & self ) -> TIM8RST_R { TIM8RST_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - SPI4 reset" ]
# [ inline ( always ) ]
pub fn spi4rst ( & self ) -> SPI4RST_R { SPI4RST_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - TIM20 timer reset" ]
# [ inline ( always ) ]
pub fn tim20rst ( & self ) -> TIM20RST_R { TIM20RST_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - SYSCFG and COMP reset" ]
# [ inline ( always ) ]
pub fn syscfgrst ( & mut self ) -> SYSCFGRST_W { SYSCFGRST_W { w : self } } # [ doc = "Bit 12 - SPI 1 reset" ]
# [ inline ( always ) ]
pub fn spi1rst ( & mut self ) -> SPI1RST_W { SPI1RST_W { w : self } } # [ doc = "Bit 14 - USART1 reset" ]
# [ inline ( always ) ]
pub fn usart1rst ( & mut self ) -> USART1RST_W { USART1RST_W { w : self } } # [ doc = "Bit 16 - TIM15 timer reset" ]
# [ inline ( always ) ]
pub fn tim15rst ( & mut self ) -> TIM15RST_W { TIM15RST_W { w : self } } # [ doc = "Bit 17 - TIM16 timer reset" ]
# [ inline ( always ) ]
pub fn tim16rst ( & mut self ) -> TIM16RST_W { TIM16RST_W { w : self } } # [ doc = "Bit 18 - TIM17 timer reset" ]
# [ inline ( always ) ]
pub fn tim17rst ( & mut self ) -> TIM17RST_W { TIM17RST_W { w : self } } # [ doc = "Bit 11 - TIM1 timer reset" ]
# [ inline ( always ) ]
pub fn tim1rst ( & mut self ) -> TIM1RST_W { TIM1RST_W { w : self } } # [ doc = "Bit 13 - TIM8 timer reset" ]
# [ inline ( always ) ]
pub fn tim8rst ( & mut self ) -> TIM8RST_W { TIM8RST_W { w : self } } # [ doc = "Bit 15 - SPI4 reset" ]
# [ inline ( always ) ]
pub fn spi4rst ( & mut self ) -> SPI4RST_W { SPI4RST_W { w : self } } # [ doc = "Bit 20 - TIM20 timer reset" ]
# [ inline ( always ) ]
pub fn tim20rst ( & mut self ) -> TIM20RST_W { TIM20RST_W { w : self } } } } # [ doc = "APB1 peripheral reset register (RCC_APB1RSTR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1rstr](apb1rstr) module" ]
pub type APB1RSTR = crate :: Reg < u32 , _APB1RSTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _APB1RSTR ; # [ doc = "`read()` method returns [apb1rstr::R](apb1rstr::R) reader structure" ]
impl crate :: Readable for APB1RSTR { } # [ doc = "`write(|w| ..)` method takes [apb1rstr::W](apb1rstr::W) writer structure" ]
impl crate :: Writable for APB1RSTR { } # [ doc = "APB1 peripheral reset register (RCC_APB1RSTR)" ]
pub mod apb1rstr { # [ doc = "Reader of register APB1RSTR" ]
pub type R = crate :: R < u32 , super :: APB1RSTR > ; # [ doc = "Writer for register APB1RSTR" ]
pub type W = crate :: W < u32 , super :: APB1RSTR > ; # [ doc = "Register APB1RSTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: APB1RSTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Timer 2 reset\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM2RST_A { # [ doc = "1: Reset the selected module" ]
RESET = 1 } impl From < TIM2RST_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM2RST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM2RST`" ]
pub type TIM2RST_R = crate :: R < bool , TIM2RST_A > ; impl TIM2RST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , TIM2RST_A > { use crate :: Variant :: * ; match self . bits { true => Val ( TIM2RST_A :: RESET ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == TIM2RST_A :: RESET } } # [ doc = "Write proxy for field `TIM2RST`" ]
pub struct TIM2RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM2RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM2RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Timer 3 reset" ]
pub type TIM3RST_A = TIM2RST_A ; # [ doc = "Reader of field `TIM3RST`" ]
pub type TIM3RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `TIM3RST`" ]
pub struct TIM3RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM3RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM3RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Timer 14 reset" ]
pub type TIM4RST_A = TIM2RST_A ; # [ doc = "Reader of field `TIM4RST`" ]
pub type TIM4RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `TIM4RST`" ]
pub struct TIM4RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM4RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM4RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Timer 6 reset" ]
pub type TIM6RST_A = TIM2RST_A ; # [ doc = "Reader of field `TIM6RST`" ]
pub type TIM6RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `TIM6RST`" ]
pub struct TIM6RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM6RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM6RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Timer 7 reset" ]
pub type TIM7RST_A = TIM2RST_A ; # [ doc = "Reader of field `TIM7RST`" ]
pub type TIM7RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `TIM7RST`" ]
pub struct TIM7RST_W < 'a > { w : & 'a mut W , } impl < 'a > TIM7RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM7RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Window watchdog reset" ]
pub type WWDGRST_A = TIM2RST_A ; # [ doc = "Reader of field `WWDGRST`" ]
pub type WWDGRST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `WWDGRST`" ]
pub struct WWDGRST_W < 'a > { w : & 'a mut W , } impl < 'a > WWDGRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WWDGRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "SPI2 reset" ]
pub type SPI2RST_A = TIM2RST_A ; # [ doc = "Reader of field `SPI2RST`" ]
pub type SPI2RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `SPI2RST`" ]
pub struct SPI2RST_W < 'a > { w : & 'a mut W , } impl < 'a > SPI2RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI2RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "SPI3 reset" ]
pub type SPI3RST_A = TIM2RST_A ; # [ doc = "Reader of field `SPI3RST`" ]
pub type SPI3RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `SPI3RST`" ]
pub struct SPI3RST_W < 'a > { w : & 'a mut W , } impl < 'a > SPI3RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI3RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "USART 2 reset" ]
pub type USART2RST_A = TIM2RST_A ; # [ doc = "Reader of field `USART2RST`" ]
pub type USART2RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `USART2RST`" ]
pub struct USART2RST_W < 'a > { w : & 'a mut W , } impl < 'a > USART2RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART2RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "USART3 reset" ]
pub type USART3RST_A = TIM2RST_A ; # [ doc = "Reader of field `USART3RST`" ]
pub type USART3RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `USART3RST`" ]
pub struct USART3RST_W < 'a > { w : & 'a mut W , } impl < 'a > USART3RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART3RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "I2C1 reset" ]
pub type I2C1RST_A = TIM2RST_A ; # [ doc = "Reader of field `I2C1RST`" ]
pub type I2C1RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `I2C1RST`" ]
pub struct I2C1RST_W < 'a > { w : & 'a mut W , } impl < 'a > I2C1RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C1RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "I2C2 reset" ]
pub type I2C2RST_A = TIM2RST_A ; # [ doc = "Reader of field `I2C2RST`" ]
pub type I2C2RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `I2C2RST`" ]
pub struct I2C2RST_W < 'a > { w : & 'a mut W , } impl < 'a > I2C2RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C2RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "USB reset" ]
pub type USBRST_A = TIM2RST_A ; # [ doc = "Reader of field `USBRST`" ]
pub type USBRST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `USBRST`" ]
pub struct USBRST_W < 'a > { w : & 'a mut W , } impl < 'a > USBRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USBRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "CAN reset" ]
pub type CANRST_A = TIM2RST_A ; # [ doc = "Reader of field `CANRST`" ]
pub type CANRST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `CANRST`" ]
pub struct CANRST_W < 'a > { w : & 'a mut W , } impl < 'a > CANRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CANRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "DAC3 reset" ]
pub type DAC2RST_A = TIM2RST_A ; # [ doc = "Reader of field `DAC2RST`" ]
pub type DAC2RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `DAC2RST`" ]
pub struct DAC2RST_W < 'a > { w : & 'a mut W , } impl < 'a > DAC2RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DAC2RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Power interface reset" ]
pub type PWRRST_A = TIM2RST_A ; # [ doc = "Reader of field `PWRRST`" ]
pub type PWRRST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `PWRRST`" ]
pub struct PWRRST_W < 'a > { w : & 'a mut W , } impl < 'a > PWRRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PWRRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "DAC interface reset" ]
pub type DAC1RST_A = TIM2RST_A ; # [ doc = "Reader of field `DAC1RST`" ]
pub type DAC1RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `DAC1RST`" ]
pub struct DAC1RST_W < 'a > { w : & 'a mut W , } impl < 'a > DAC1RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DAC1RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "UART4 reset" ]
pub type UART4RST_A = TIM2RST_A ; # [ doc = "Reader of field `UART4RST`" ]
pub type UART4RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `UART4RST`" ]
pub struct UART4RST_W < 'a > { w : & 'a mut W , } impl < 'a > UART4RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UART4RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "UART5 reset" ]
pub type UART5RST_A = TIM2RST_A ; # [ doc = "Reader of field `UART5RST`" ]
pub type UART5RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `UART5RST`" ]
pub struct UART5RST_W < 'a > { w : & 'a mut W , } impl < 'a > UART5RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UART5RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "I2C3 reset" ]
pub type I2C3RST_A = TIM2RST_A ; # [ doc = "Reader of field `I2C3RST`" ]
pub type I2C3RST_R = crate :: R < bool , TIM2RST_A > ; # [ doc = "Write proxy for field `I2C3RST`" ]
pub struct I2C3RST_W < 'a > { w : & 'a mut W , } impl < 'a > I2C3RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C3RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( TIM2RST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } impl R { # [ doc = "Bit 0 - Timer 2 reset" ]
# [ inline ( always ) ]
pub fn tim2rst ( & self ) -> TIM2RST_R { TIM2RST_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Timer 3 reset" ]
# [ inline ( always ) ]
pub fn tim3rst ( & self ) -> TIM3RST_R { TIM3RST_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Timer 14 reset" ]
# [ inline ( always ) ]
pub fn tim4rst ( & self ) -> TIM4RST_R { TIM4RST_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Timer 6 reset" ]
# [ inline ( always ) ]
pub fn tim6rst ( & self ) -> TIM6RST_R { TIM6RST_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Timer 7 reset" ]
# [ inline ( always ) ]
pub fn tim7rst ( & self ) -> TIM7RST_R { TIM7RST_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Window watchdog reset" ]
# [ inline ( always ) ]
pub fn wwdgrst ( & self ) -> WWDGRST_R { WWDGRST_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - SPI2 reset" ]
# [ inline ( always ) ]
pub fn spi2rst ( & self ) -> SPI2RST_R { SPI2RST_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - SPI3 reset" ]
# [ inline ( always ) ]
pub fn spi3rst ( & self ) -> SPI3RST_R { SPI3RST_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - USART 2 reset" ]
# [ inline ( always ) ]
pub fn usart2rst ( & self ) -> USART2RST_R { USART2RST_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - USART3 reset" ]
# [ inline ( always ) ]
pub fn usart3rst ( & self ) -> USART3RST_R { USART3RST_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - I2C1 reset" ]
# [ inline ( always ) ]
pub fn i2c1rst ( & self ) -> I2C1RST_R { I2C1RST_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - I2C2 reset" ]
# [ inline ( always ) ]
pub fn i2c2rst ( & self ) -> I2C2RST_R { I2C2RST_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - USB reset" ]
# [ inline ( always ) ]
pub fn usbrst ( & self ) -> USBRST_R { USBRST_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - CAN reset" ]
# [ inline ( always ) ]
pub fn canrst ( & self ) -> CANRST_R { CANRST_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - DAC3 reset" ]
# [ inline ( always ) ]
pub fn dac2rst ( & self ) -> DAC2RST_R { DAC2RST_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Power interface reset" ]
# [ inline ( always ) ]
pub fn pwrrst ( & self ) -> PWRRST_R { PWRRST_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - DAC interface reset" ]
# [ inline ( always ) ]
pub fn dac1rst ( & self ) -> DAC1RST_R { DAC1RST_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - UART4 reset" ]
# [ inline ( always ) ]
pub fn uart4rst ( & self ) -> UART4RST_R { UART4RST_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - UART5 reset" ]
# [ inline ( always ) ]
pub fn uart5rst ( & self ) -> UART5RST_R { UART5RST_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - I2C3 reset" ]
# [ inline ( always ) ]
pub fn i2c3rst ( & self ) -> I2C3RST_R { I2C3RST_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Timer 2 reset" ]
# [ inline ( always ) ]
pub fn tim2rst ( & mut self ) -> TIM2RST_W { TIM2RST_W { w : self } } # [ doc = "Bit 1 - Timer 3 reset" ]
# [ inline ( always ) ]
pub fn tim3rst ( & mut self ) -> TIM3RST_W { TIM3RST_W { w : self } } # [ doc = "Bit 2 - Timer 14 reset" ]
# [ inline ( always ) ]
pub fn tim4rst ( & mut self ) -> TIM4RST_W { TIM4RST_W { w : self } } # [ doc = "Bit 4 - Timer 6 reset" ]
# [ inline ( always ) ]
pub fn tim6rst ( & mut self ) -> TIM6RST_W { TIM6RST_W { w : self } } # [ doc = "Bit 5 - Timer 7 reset" ]
# [ inline ( always ) ]
pub fn tim7rst ( & mut self ) -> TIM7RST_W { TIM7RST_W { w : self } } # [ doc = "Bit 11 - Window watchdog reset" ]
# [ inline ( always ) ]
pub fn wwdgrst ( & mut self ) -> WWDGRST_W { WWDGRST_W { w : self } } # [ doc = "Bit 14 - SPI2 reset" ]
# [ inline ( always ) ]
pub fn spi2rst ( & mut self ) -> SPI2RST_W { SPI2RST_W { w : self } } # [ doc = "Bit 15 - SPI3 reset" ]
# [ inline ( always ) ]
pub fn spi3rst ( & mut self ) -> SPI3RST_W { SPI3RST_W { w : self } } # [ doc = "Bit 17 - USART 2 reset" ]
# [ inline ( always ) ]
pub fn usart2rst ( & mut self ) -> USART2RST_W { USART2RST_W { w : self } } # [ doc = "Bit 18 - USART3 reset" ]
# [ inline ( always ) ]
pub fn usart3rst ( & mut self ) -> USART3RST_W { USART3RST_W { w : self } } # [ doc = "Bit 21 - I2C1 reset" ]
# [ inline ( always ) ]
pub fn i2c1rst ( & mut self ) -> I2C1RST_W { I2C1RST_W { w : self } } # [ doc = "Bit 22 - I2C2 reset" ]
# [ inline ( always ) ]
pub fn i2c2rst ( & mut self ) -> I2C2RST_W { I2C2RST_W { w : self } } # [ doc = "Bit 23 - USB reset" ]
# [ inline ( always ) ]
pub fn usbrst ( & mut self ) -> USBRST_W { USBRST_W { w : self } } # [ doc = "Bit 25 - CAN reset" ]
# [ inline ( always ) ]
pub fn canrst ( & mut self ) -> CANRST_W { CANRST_W { w : self } } # [ doc = "Bit 26 - DAC3 reset" ]
# [ inline ( always ) ]
pub fn dac2rst ( & mut self ) -> DAC2RST_W { DAC2RST_W { w : self } } # [ doc = "Bit 28 - Power interface reset" ]
# [ inline ( always ) ]
pub fn pwrrst ( & mut self ) -> PWRRST_W { PWRRST_W { w : self } } # [ doc = "Bit 29 - DAC interface reset" ]
# [ inline ( always ) ]
pub fn dac1rst ( & mut self ) -> DAC1RST_W { DAC1RST_W { w : self } } # [ doc = "Bit 19 - UART4 reset" ]
# [ inline ( always ) ]
pub fn uart4rst ( & mut self ) -> UART4RST_W { UART4RST_W { w : self } } # [ doc = "Bit 20 - UART5 reset" ]
# [ inline ( always ) ]
pub fn uart5rst ( & mut self ) -> UART5RST_W { UART5RST_W { w : self } } # [ doc = "Bit 30 - I2C3 reset" ]
# [ inline ( always ) ]
pub fn i2c3rst ( & mut self ) -> I2C3RST_W { I2C3RST_W { w : self } } } } # [ doc = "AHB Peripheral Clock enable register (RCC_AHBENR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahbenr](ahbenr) module" ]
pub type AHBENR = crate :: Reg < u32 , _AHBENR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AHBENR ; # [ doc = "`read()` method returns [ahbenr::R](ahbenr::R) reader structure" ]
impl crate :: Readable for AHBENR { } # [ doc = "`write(|w| ..)` method takes [ahbenr::W](ahbenr::W) writer structure" ]
impl crate :: Writable for AHBENR { } # [ doc = "AHB Peripheral Clock enable register (RCC_AHBENR)" ]
pub mod ahbenr { # [ doc = "Reader of register AHBENR" ]
pub type R = crate :: R < u32 , super :: AHBENR > ; # [ doc = "Writer for register AHBENR" ]
pub type W = crate :: W < u32 , super :: AHBENR > ; # [ doc = "Register AHBENR `reset()`'s with value 0x14" ]
impl crate :: ResetValue for super :: AHBENR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x14 } } # [ doc = "DMA1 clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DMA1EN_A { # [ doc = "0: The selected clock is disabled" ]
DISABLED = 0 , # [ doc = "1: The selected clock is enabled" ]
ENABLED = 1 } impl From < DMA1EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : DMA1EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DMA1EN`" ]
pub type DMA1EN_R = crate :: R < bool , DMA1EN_A > ; impl DMA1EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DMA1EN_A { match self . bits { false => DMA1EN_A :: DISABLED , true => DMA1EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == DMA1EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == DMA1EN_A :: ENABLED } } # [ doc = "Write proxy for field `DMA1EN`" ]
pub struct DMA1EN_W < 'a > { w : & 'a mut W , } impl < 'a > DMA1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DMA1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "DMA2 clock enable" ]
pub type DMA2EN_A = DMA1EN_A ; # [ doc = "Reader of field `DMA2EN`" ]
pub type DMA2EN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `DMA2EN`" ]
pub struct DMA2EN_W < 'a > { w : & 'a mut W , } impl < 'a > DMA2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DMA2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "SRAM interface clock enable" ]
pub type SRAMEN_A = DMA1EN_A ; # [ doc = "Reader of field `SRAMEN`" ]
pub type SRAMEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `SRAMEN`" ]
pub struct SRAMEN_W < 'a > { w : & 'a mut W , } impl < 'a > SRAMEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SRAMEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "FLITF clock enable" ]
pub type FLITFEN_A = DMA1EN_A ; # [ doc = "Reader of field `FLITFEN`" ]
pub type FLITFEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `FLITFEN`" ]
pub struct FLITFEN_W < 'a > { w : & 'a mut W , } impl < 'a > FLITFEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FLITFEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "CRC clock enable" ]
pub type CRCEN_A = DMA1EN_A ; # [ doc = "Reader of field `CRCEN`" ]
pub type CRCEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `CRCEN`" ]
pub struct CRCEN_W < 'a > { w : & 'a mut W , } impl < 'a > CRCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CRCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "I/O port A clock enable" ]
pub type IOPAEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPAEN`" ]
pub type IOPAEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPAEN`" ]
pub struct IOPAEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPAEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPAEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "I/O port B clock enable" ]
pub type IOPBEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPBEN`" ]
pub type IOPBEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPBEN`" ]
pub struct IOPBEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPBEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPBEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "I/O port C clock enable" ]
pub type IOPCEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPCEN`" ]
pub type IOPCEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPCEN`" ]
pub struct IOPCEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "I/O port D clock enable" ]
pub type IOPDEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPDEN`" ]
pub type IOPDEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPDEN`" ]
pub struct IOPDEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPDEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPDEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "I/O port E clock enable" ]
pub type IOPEEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPEEN`" ]
pub type IOPEEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPEEN`" ]
pub struct IOPEEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPEEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPEEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "I/O port F clock enable" ]
pub type IOPFEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPFEN`" ]
pub type IOPFEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPFEN`" ]
pub struct IOPFEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPFEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPFEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Touch sensing controller clock enable" ]
pub type TSCEN_A = DMA1EN_A ; # [ doc = "Reader of field `TSCEN`" ]
pub type TSCEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `TSCEN`" ]
pub struct TSCEN_W < 'a > { w : & 'a mut W , } impl < 'a > TSCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "I/O port H clock enable" ]
pub type IOPHEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPHEN`" ]
pub type IOPHEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPHEN`" ]
pub struct IOPHEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPHEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPHEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "I/O port G clock enable" ]
pub type IOPGEN_A = DMA1EN_A ; # [ doc = "Reader of field `IOPGEN`" ]
pub type IOPGEN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `IOPGEN`" ]
pub struct IOPGEN_W < 'a > { w : & 'a mut W , } impl < 'a > IOPGEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPGEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "ADC1 and ADC2 enable" ]
pub type ADC12EN_A = DMA1EN_A ; # [ doc = "Reader of field `ADC12EN`" ]
pub type ADC12EN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `ADC12EN`" ]
pub struct ADC12EN_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "ADC3 and ADC4 enable" ]
pub type ADC34EN_A = DMA1EN_A ; # [ doc = "Reader of field `ADC34EN`" ]
pub type ADC34EN_R = crate :: R < bool , DMA1EN_A > ; # [ doc = "Write proxy for field `ADC34EN`" ]
pub struct ADC34EN_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } impl R { # [ doc = "Bit 0 - DMA1 clock enable" ]
# [ inline ( always ) ]
pub fn dma1en ( & self ) -> DMA1EN_R { DMA1EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - DMA2 clock enable" ]
# [ inline ( always ) ]
pub fn dma2en ( & self ) -> DMA2EN_R { DMA2EN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - SRAM interface clock enable" ]
# [ inline ( always ) ]
pub fn sramen ( & self ) -> SRAMEN_R { SRAMEN_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - FLITF clock enable" ]
# [ inline ( always ) ]
pub fn flitfen ( & self ) -> FLITFEN_R { FLITFEN_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - CRC clock enable" ]
# [ inline ( always ) ]
pub fn crcen ( & self ) -> CRCEN_R { CRCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - I/O port A clock enable" ]
# [ inline ( always ) ]
pub fn iopaen ( & self ) -> IOPAEN_R { IOPAEN_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - I/O port B clock enable" ]
# [ inline ( always ) ]
pub fn iopben ( & self ) -> IOPBEN_R { IOPBEN_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - I/O port C clock enable" ]
# [ inline ( always ) ]
pub fn iopcen ( & self ) -> IOPCEN_R { IOPCEN_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - I/O port D clock enable" ]
# [ inline ( always ) ]
pub fn iopden ( & self ) -> IOPDEN_R { IOPDEN_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - I/O port E clock enable" ]
# [ inline ( always ) ]
pub fn iopeen ( & self ) -> IOPEEN_R { IOPEEN_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - I/O port F clock enable" ]
# [ inline ( always ) ]
pub fn iopfen ( & self ) -> IOPFEN_R { IOPFEN_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Touch sensing controller clock enable" ]
# [ inline ( always ) ]
pub fn tscen ( & self ) -> TSCEN_R { TSCEN_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - I/O port H clock enable" ]
# [ inline ( always ) ]
pub fn iophen ( & self ) -> IOPHEN_R { IOPHEN_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - I/O port G clock enable" ]
# [ inline ( always ) ]
pub fn iopgen ( & self ) -> IOPGEN_R { IOPGEN_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - ADC1 and ADC2 enable" ]
# [ inline ( always ) ]
pub fn adc12en ( & self ) -> ADC12EN_R { ADC12EN_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - ADC3 and ADC4 enable" ]
# [ inline ( always ) ]
pub fn adc34en ( & self ) -> ADC34EN_R { ADC34EN_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - DMA1 clock enable" ]
# [ inline ( always ) ]
pub fn dma1en ( & mut self ) -> DMA1EN_W { DMA1EN_W { w : self } } # [ doc = "Bit 1 - DMA2 clock enable" ]
# [ inline ( always ) ]
pub fn dma2en ( & mut self ) -> DMA2EN_W { DMA2EN_W { w : self } } # [ doc = "Bit 2 - SRAM interface clock enable" ]
# [ inline ( always ) ]
pub fn sramen ( & mut self ) -> SRAMEN_W { SRAMEN_W { w : self } } # [ doc = "Bit 4 - FLITF clock enable" ]
# [ inline ( always ) ]
pub fn flitfen ( & mut self ) -> FLITFEN_W { FLITFEN_W { w : self } } # [ doc = "Bit 6 - CRC clock enable" ]
# [ inline ( always ) ]
pub fn crcen ( & mut self ) -> CRCEN_W { CRCEN_W { w : self } } # [ doc = "Bit 17 - I/O port A clock enable" ]
# [ inline ( always ) ]
pub fn iopaen ( & mut self ) -> IOPAEN_W { IOPAEN_W { w : self } } # [ doc = "Bit 18 - I/O port B clock enable" ]
# [ inline ( always ) ]
pub fn iopben ( & mut self ) -> IOPBEN_W { IOPBEN_W { w : self } } # [ doc = "Bit 19 - I/O port C clock enable" ]
# [ inline ( always ) ]
pub fn iopcen ( & mut self ) -> IOPCEN_W { IOPCEN_W { w : self } } # [ doc = "Bit 20 - I/O port D clock enable" ]
# [ inline ( always ) ]
pub fn iopden ( & mut self ) -> IOPDEN_W { IOPDEN_W { w : self } } # [ doc = "Bit 21 - I/O port E clock enable" ]
# [ inline ( always ) ]
pub fn iopeen ( & mut self ) -> IOPEEN_W { IOPEEN_W { w : self } } # [ doc = "Bit 22 - I/O port F clock enable" ]
# [ inline ( always ) ]
pub fn iopfen ( & mut self ) -> IOPFEN_W { IOPFEN_W { w : self } } # [ doc = "Bit 24 - Touch sensing controller clock enable" ]
# [ inline ( always ) ]
pub fn tscen ( & mut self ) -> TSCEN_W { TSCEN_W { w : self } } # [ doc = "Bit 16 - I/O port H clock enable" ]
# [ inline ( always ) ]
pub fn iophen ( & mut self ) -> IOPHEN_W { IOPHEN_W { w : self } } # [ doc = "Bit 23 - I/O port G clock enable" ]
# [ inline ( always ) ]
pub fn iopgen ( & mut self ) -> IOPGEN_W { IOPGEN_W { w : self } } # [ doc = "Bit 28 - ADC1 and ADC2 enable" ]
# [ inline ( always ) ]
pub fn adc12en ( & mut self ) -> ADC12EN_W { ADC12EN_W { w : self } } # [ doc = "Bit 29 - ADC3 and ADC4 enable" ]
# [ inline ( always ) ]
pub fn adc34en ( & mut self ) -> ADC34EN_W { ADC34EN_W { w : self } } } } # [ doc = "APB2 peripheral clock enable register (RCC_APB2ENR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2enr](apb2enr) module" ]
pub type APB2ENR = crate :: Reg < u32 , _APB2ENR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _APB2ENR ; # [ doc = "`read()` method returns [apb2enr::R](apb2enr::R) reader structure" ]
impl crate :: Readable for APB2ENR { } # [ doc = "`write(|w| ..)` method takes [apb2enr::W](apb2enr::W) writer structure" ]
impl crate :: Writable for APB2ENR { } # [ doc = "APB2 peripheral clock enable register (RCC_APB2ENR)" ]
pub mod apb2enr { # [ doc = "Reader of register APB2ENR" ]
pub type R = crate :: R < u32 , super :: APB2ENR > ; # [ doc = "Writer for register APB2ENR" ]
pub type W = crate :: W < u32 , super :: APB2ENR > ; # [ doc = "Register APB2ENR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: APB2ENR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "SYSCFG clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SYSCFGEN_A { # [ doc = "0: The selected clock is disabled" ]
DISABLED = 0 , # [ doc = "1: The selected clock is enabled" ]
ENABLED = 1 } impl From < SYSCFGEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : SYSCFGEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SYSCFGEN`" ]
pub type SYSCFGEN_R = crate :: R < bool , SYSCFGEN_A > ; impl SYSCFGEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SYSCFGEN_A { match self . bits { false => SYSCFGEN_A :: DISABLED , true => SYSCFGEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SYSCFGEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SYSCFGEN_A :: ENABLED } } # [ doc = "Write proxy for field `SYSCFGEN`" ]
pub struct SYSCFGEN_W < 'a > { w : & 'a mut W , } impl < 'a > SYSCFGEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SYSCFGEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "TIM1 Timer clock enable" ]
pub type TIM1EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `TIM1EN`" ]
pub type TIM1EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `TIM1EN`" ]
pub struct TIM1EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "SPI 1 clock enable" ]
pub type SPI1EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `SPI1EN`" ]
pub type SPI1EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `SPI1EN`" ]
pub struct SPI1EN_W < 'a > { w : & 'a mut W , } impl < 'a > SPI1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "USART1 clock enable" ]
pub type USART1EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `USART1EN`" ]
pub type USART1EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `USART1EN`" ]
pub struct USART1EN_W < 'a > { w : & 'a mut W , } impl < 'a > USART1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "TIM15 timer clock enable" ]
pub type TIM15EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `TIM15EN`" ]
pub type TIM15EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `TIM15EN`" ]
pub struct TIM15EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM15EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM15EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "TIM16 timer clock enable" ]
pub type TIM16EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `TIM16EN`" ]
pub type TIM16EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `TIM16EN`" ]
pub struct TIM16EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM16EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM16EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "TIM17 timer clock enable" ]
pub type TIM17EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `TIM17EN`" ]
pub type TIM17EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `TIM17EN`" ]
pub struct TIM17EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM17EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM17EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "TIM8 timer clock enable" ]
pub type TIM8EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `TIM8EN`" ]
pub type TIM8EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `TIM8EN`" ]
pub struct TIM8EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM8EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM8EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "SPI4 clock enable" ]
pub type SPI4EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `SPI4EN`" ]
pub type SPI4EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `SPI4EN`" ]
pub struct SPI4EN_W < 'a > { w : & 'a mut W , } impl < 'a > SPI4EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI4EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "TIM20 timer clock enable" ]
pub type TIM20EN_A = SYSCFGEN_A ; # [ doc = "Reader of field `TIM20EN`" ]
pub type TIM20EN_R = crate :: R < bool , SYSCFGEN_A > ; # [ doc = "Write proxy for field `TIM20EN`" ]
pub struct TIM20EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM20EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM20EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SYSCFGEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } impl R { # [ doc = "Bit 0 - SYSCFG clock enable" ]
# [ inline ( always ) ]
pub fn syscfgen ( & self ) -> SYSCFGEN_R { SYSCFGEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 11 - TIM1 Timer clock enable" ]
# [ inline ( always ) ]
pub fn tim1en ( & self ) -> TIM1EN_R { TIM1EN_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - SPI 1 clock enable" ]
# [ inline ( always ) ]
pub fn spi1en ( & self ) -> SPI1EN_R { SPI1EN_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - USART1 clock enable" ]
# [ inline ( always ) ]
pub fn usart1en ( & self ) -> USART1EN_R { USART1EN_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - TIM15 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim15en ( & self ) -> TIM15EN_R { TIM15EN_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - TIM16 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim16en ( & self ) -> TIM16EN_R { TIM16EN_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - TIM17 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim17en ( & self ) -> TIM17EN_R { TIM17EN_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - TIM8 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim8en ( & self ) -> TIM8EN_R { TIM8EN_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - SPI4 clock enable" ]
# [ inline ( always ) ]
pub fn spi4en ( & self ) -> SPI4EN_R { SPI4EN_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - TIM20 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim20en ( & self ) -> TIM20EN_R { TIM20EN_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - SYSCFG clock enable" ]
# [ inline ( always ) ]
pub fn syscfgen ( & mut self ) -> SYSCFGEN_W { SYSCFGEN_W { w : self } } # [ doc = "Bit 11 - TIM1 Timer clock enable" ]
# [ inline ( always ) ]
pub fn tim1en ( & mut self ) -> TIM1EN_W { TIM1EN_W { w : self } } # [ doc = "Bit 12 - SPI 1 clock enable" ]
# [ inline ( always ) ]
pub fn spi1en ( & mut self ) -> SPI1EN_W { SPI1EN_W { w : self } } # [ doc = "Bit 14 - USART1 clock enable" ]
# [ inline ( always ) ]
pub fn usart1en ( & mut self ) -> USART1EN_W { USART1EN_W { w : self } } # [ doc = "Bit 16 - TIM15 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim15en ( & mut self ) -> TIM15EN_W { TIM15EN_W { w : self } } # [ doc = "Bit 17 - TIM16 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim16en ( & mut self ) -> TIM16EN_W { TIM16EN_W { w : self } } # [ doc = "Bit 18 - TIM17 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim17en ( & mut self ) -> TIM17EN_W { TIM17EN_W { w : self } } # [ doc = "Bit 13 - TIM8 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim8en ( & mut self ) -> TIM8EN_W { TIM8EN_W { w : self } } # [ doc = "Bit 15 - SPI4 clock enable" ]
# [ inline ( always ) ]
pub fn spi4en ( & mut self ) -> SPI4EN_W { SPI4EN_W { w : self } } # [ doc = "Bit 20 - TIM20 timer clock enable" ]
# [ inline ( always ) ]
pub fn tim20en ( & mut self ) -> TIM20EN_W { TIM20EN_W { w : self } } } } # [ doc = "APB1 peripheral clock enable register (RCC_APB1ENR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1enr](apb1enr) module" ]
pub type APB1ENR = crate :: Reg < u32 , _APB1ENR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _APB1ENR ; # [ doc = "`read()` method returns [apb1enr::R](apb1enr::R) reader structure" ]
impl crate :: Readable for APB1ENR { } # [ doc = "`write(|w| ..)` method takes [apb1enr::W](apb1enr::W) writer structure" ]
impl crate :: Writable for APB1ENR { } # [ doc = "APB1 peripheral clock enable register (RCC_APB1ENR)" ]
pub mod apb1enr { # [ doc = "Reader of register APB1ENR" ]
pub type R = crate :: R < u32 , super :: APB1ENR > ; # [ doc = "Writer for register APB1ENR" ]
pub type W = crate :: W < u32 , super :: APB1ENR > ; # [ doc = "Register APB1ENR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: APB1ENR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Timer 2 clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM2EN_A { # [ doc = "0: The selected clock is disabled" ]
DISABLED = 0 , # [ doc = "1: The selected clock is enabled" ]
ENABLED = 1 } impl From < TIM2EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM2EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM2EN`" ]
pub type TIM2EN_R = crate :: R < bool , TIM2EN_A > ; impl TIM2EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIM2EN_A { match self . bits { false => TIM2EN_A :: DISABLED , true => TIM2EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TIM2EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TIM2EN_A :: ENABLED } } # [ doc = "Write proxy for field `TIM2EN`" ]
pub struct TIM2EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Timer 3 clock enable" ]
pub type TIM3EN_A = TIM2EN_A ; # [ doc = "Reader of field `TIM3EN`" ]
pub type TIM3EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `TIM3EN`" ]
pub struct TIM3EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM3EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM3EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Timer 4 clock enable" ]
pub type TIM4EN_A = TIM2EN_A ; # [ doc = "Reader of field `TIM4EN`" ]
pub type TIM4EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `TIM4EN`" ]
pub struct TIM4EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM4EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM4EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Timer 6 clock enable" ]
pub type TIM6EN_A = TIM2EN_A ; # [ doc = "Reader of field `TIM6EN`" ]
pub type TIM6EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `TIM6EN`" ]
pub struct TIM6EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM6EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM6EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Timer 7 clock enable" ]
pub type TIM7EN_A = TIM2EN_A ; # [ doc = "Reader of field `TIM7EN`" ]
pub type TIM7EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `TIM7EN`" ]
pub struct TIM7EN_W < 'a > { w : & 'a mut W , } impl < 'a > TIM7EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM7EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Window watchdog clock enable" ]
pub type WWDGEN_A = TIM2EN_A ; # [ doc = "Reader of field `WWDGEN`" ]
pub type WWDGEN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `WWDGEN`" ]
pub struct WWDGEN_W < 'a > { w : & 'a mut W , } impl < 'a > WWDGEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WWDGEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "SPI 2 clock enable" ]
pub type SPI2EN_A = TIM2EN_A ; # [ doc = "Reader of field `SPI2EN`" ]
pub type SPI2EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `SPI2EN`" ]
pub struct SPI2EN_W < 'a > { w : & 'a mut W , } impl < 'a > SPI2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "SPI 3 clock enable" ]
pub type SPI3EN_A = TIM2EN_A ; # [ doc = "Reader of field `SPI3EN`" ]
pub type SPI3EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `SPI3EN`" ]
pub struct SPI3EN_W < 'a > { w : & 'a mut W , } impl < 'a > SPI3EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI3EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "USART 2 clock enable" ]
pub type USART2EN_A = TIM2EN_A ; # [ doc = "Reader of field `USART2EN`" ]
pub type USART2EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `USART2EN`" ]
pub struct USART2EN_W < 'a > { w : & 'a mut W , } impl < 'a > USART2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "USART 3 clock enable" ]
pub type USART3EN_A = TIM2EN_A ; # [ doc = "Reader of field `USART3EN`" ]
pub type USART3EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `USART3EN`" ]
pub struct USART3EN_W < 'a > { w : & 'a mut W , } impl < 'a > USART3EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART3EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "I2C 1 clock enable" ]
pub type I2C1EN_A = TIM2EN_A ; # [ doc = "Reader of field `I2C1EN`" ]
pub type I2C1EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `I2C1EN`" ]
pub struct I2C1EN_W < 'a > { w : & 'a mut W , } impl < 'a > I2C1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "I2C 2 clock enable" ]
pub type I2C2EN_A = TIM2EN_A ; # [ doc = "Reader of field `I2C2EN`" ]
pub type I2C2EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `I2C2EN`" ]
pub struct I2C2EN_W < 'a > { w : & 'a mut W , } impl < 'a > I2C2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "USB clock enable" ]
pub type USBEN_A = TIM2EN_A ; # [ doc = "Reader of field `USBEN`" ]
pub type USBEN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `USBEN`" ]
pub struct USBEN_W < 'a > { w : & 'a mut W , } impl < 'a > USBEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USBEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "CAN clock enable" ]
pub type CANEN_A = TIM2EN_A ; # [ doc = "Reader of field `CANEN`" ]
pub type CANEN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `CANEN`" ]
pub struct CANEN_W < 'a > { w : & 'a mut W , } impl < 'a > CANEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CANEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "DAC3 interface clock enable" ]
pub type DAC2EN_A = TIM2EN_A ; # [ doc = "Reader of field `DAC2EN`" ]
pub type DAC2EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `DAC2EN`" ]
pub struct DAC2EN_W < 'a > { w : & 'a mut W , } impl < 'a > DAC2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DAC2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Power interface clock enable" ]
pub type PWREN_A = TIM2EN_A ; # [ doc = "Reader of field `PWREN`" ]
pub type PWREN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `PWREN`" ]
pub struct PWREN_W < 'a > { w : & 'a mut W , } impl < 'a > PWREN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PWREN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "DAC interface clock enable" ]
pub type DAC1EN_A = TIM2EN_A ; # [ doc = "Reader of field `DAC1EN`" ]
pub type DAC1EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `DAC1EN`" ]
pub struct DAC1EN_W < 'a > { w : & 'a mut W , } impl < 'a > DAC1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DAC1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "UART4 clock enable" ]
pub type UART4EN_A = TIM2EN_A ; # [ doc = "Reader of field `UART4EN`" ]
pub type UART4EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `UART4EN`" ]
pub struct UART4EN_W < 'a > { w : & 'a mut W , } impl < 'a > UART4EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UART4EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "UART5 clock enable" ]
pub type UART5EN_A = TIM2EN_A ; # [ doc = "Reader of field `UART5EN`" ]
pub type UART5EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `UART5EN`" ]
pub struct UART5EN_W < 'a > { w : & 'a mut W , } impl < 'a > UART5EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UART5EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "I2C3 clock enable" ]
pub type I2C3EN_A = TIM2EN_A ; # [ doc = "Reader of field `I2C3EN`" ]
pub type I2C3EN_R = crate :: R < bool , TIM2EN_A > ; # [ doc = "Write proxy for field `I2C3EN`" ]
pub struct I2C3EN_W < 'a > { w : & 'a mut W , } impl < 'a > I2C3EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C3EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The selected clock is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: DISABLED ) } # [ doc = "The selected clock is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIM2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } impl R { # [ doc = "Bit 0 - Timer 2 clock enable" ]
# [ inline ( always ) ]
pub fn tim2en ( & self ) -> TIM2EN_R { TIM2EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Timer 3 clock enable" ]
# [ inline ( always ) ]
pub fn tim3en ( & self ) -> TIM3EN_R { TIM3EN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Timer 4 clock enable" ]
# [ inline ( always ) ]
pub fn tim4en ( & self ) -> TIM4EN_R { TIM4EN_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Timer 6 clock enable" ]
# [ inline ( always ) ]
pub fn tim6en ( & self ) -> TIM6EN_R { TIM6EN_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Timer 7 clock enable" ]
# [ inline ( always ) ]
pub fn tim7en ( & self ) -> TIM7EN_R { TIM7EN_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Window watchdog clock enable" ]
# [ inline ( always ) ]
pub fn wwdgen ( & self ) -> WWDGEN_R { WWDGEN_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - SPI 2 clock enable" ]
# [ inline ( always ) ]
pub fn spi2en ( & self ) -> SPI2EN_R { SPI2EN_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - SPI 3 clock enable" ]
# [ inline ( always ) ]
pub fn spi3en ( & self ) -> SPI3EN_R { SPI3EN_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - USART 2 clock enable" ]
# [ inline ( always ) ]
pub fn usart2en ( & self ) -> USART2EN_R { USART2EN_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - USART 3 clock enable" ]
# [ inline ( always ) ]
pub fn usart3en ( & self ) -> USART3EN_R { USART3EN_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - I2C 1 clock enable" ]
# [ inline ( always ) ]
pub fn i2c1en ( & self ) -> I2C1EN_R { I2C1EN_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - I2C 2 clock enable" ]
# [ inline ( always ) ]
pub fn i2c2en ( & self ) -> I2C2EN_R { I2C2EN_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - USB clock enable" ]
# [ inline ( always ) ]
pub fn usben ( & self ) -> USBEN_R { USBEN_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - CAN clock enable" ]
# [ inline ( always ) ]
pub fn canen ( & self ) -> CANEN_R { CANEN_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - DAC3 interface clock enable" ]
# [ inline ( always ) ]
pub fn dac2en ( & self ) -> DAC2EN_R { DAC2EN_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Power interface clock enable" ]
# [ inline ( always ) ]
pub fn pwren ( & self ) -> PWREN_R { PWREN_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - DAC interface clock enable" ]
# [ inline ( always ) ]
pub fn dac1en ( & self ) -> DAC1EN_R { DAC1EN_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - UART4 clock enable" ]
# [ inline ( always ) ]
pub fn uart4en ( & self ) -> UART4EN_R { UART4EN_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - UART5 clock enable" ]
# [ inline ( always ) ]
pub fn uart5en ( & self ) -> UART5EN_R { UART5EN_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - I2C3 clock enable" ]
# [ inline ( always ) ]
pub fn i2c3en ( & self ) -> I2C3EN_R { I2C3EN_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Timer 2 clock enable" ]
# [ inline ( always ) ]
pub fn tim2en ( & mut self ) -> TIM2EN_W { TIM2EN_W { w : self } } # [ doc = "Bit 1 - Timer 3 clock enable" ]
# [ inline ( always ) ]
pub fn tim3en ( & mut self ) -> TIM3EN_W { TIM3EN_W { w : self } } # [ doc = "Bit 2 - Timer 4 clock enable" ]
# [ inline ( always ) ]
pub fn tim4en ( & mut self ) -> TIM4EN_W { TIM4EN_W { w : self } } # [ doc = "Bit 4 - Timer 6 clock enable" ]
# [ inline ( always ) ]
pub fn tim6en ( & mut self ) -> TIM6EN_W { TIM6EN_W { w : self } } # [ doc = "Bit 5 - Timer 7 clock enable" ]
# [ inline ( always ) ]
pub fn tim7en ( & mut self ) -> TIM7EN_W { TIM7EN_W { w : self } } # [ doc = "Bit 11 - Window watchdog clock enable" ]
# [ inline ( always ) ]
pub fn wwdgen ( & mut self ) -> WWDGEN_W { WWDGEN_W { w : self } } # [ doc = "Bit 14 - SPI 2 clock enable" ]
# [ inline ( always ) ]
pub fn spi2en ( & mut self ) -> SPI2EN_W { SPI2EN_W { w : self } } # [ doc = "Bit 15 - SPI 3 clock enable" ]
# [ inline ( always ) ]
pub fn spi3en ( & mut self ) -> SPI3EN_W { SPI3EN_W { w : self } } # [ doc = "Bit 17 - USART 2 clock enable" ]
# [ inline ( always ) ]
pub fn usart2en ( & mut self ) -> USART2EN_W { USART2EN_W { w : self } } # [ doc = "Bit 18 - USART 3 clock enable" ]
# [ inline ( always ) ]
pub fn usart3en ( & mut self ) -> USART3EN_W { USART3EN_W { w : self } } # [ doc = "Bit 21 - I2C 1 clock enable" ]
# [ inline ( always ) ]
pub fn i2c1en ( & mut self ) -> I2C1EN_W { I2C1EN_W { w : self } } # [ doc = "Bit 22 - I2C 2 clock enable" ]
# [ inline ( always ) ]
pub fn i2c2en ( & mut self ) -> I2C2EN_W { I2C2EN_W { w : self } } # [ doc = "Bit 23 - USB clock enable" ]
# [ inline ( always ) ]
pub fn usben ( & mut self ) -> USBEN_W { USBEN_W { w : self } } # [ doc = "Bit 25 - CAN clock enable" ]
# [ inline ( always ) ]
pub fn canen ( & mut self ) -> CANEN_W { CANEN_W { w : self } } # [ doc = "Bit 26 - DAC3 interface clock enable" ]
# [ inline ( always ) ]
pub fn dac2en ( & mut self ) -> DAC2EN_W { DAC2EN_W { w : self } } # [ doc = "Bit 28 - Power interface clock enable" ]
# [ inline ( always ) ]
pub fn pwren ( & mut self ) -> PWREN_W { PWREN_W { w : self } } # [ doc = "Bit 29 - DAC interface clock enable" ]
# [ inline ( always ) ]
pub fn dac1en ( & mut self ) -> DAC1EN_W { DAC1EN_W { w : self } } # [ doc = "Bit 19 - UART4 clock enable" ]
# [ inline ( always ) ]
pub fn uart4en ( & mut self ) -> UART4EN_W { UART4EN_W { w : self } } # [ doc = "Bit 20 - UART5 clock enable" ]
# [ inline ( always ) ]
pub fn uart5en ( & mut self ) -> UART5EN_W { UART5EN_W { w : self } } # [ doc = "Bit 30 - I2C3 clock enable" ]
# [ inline ( always ) ]
pub fn i2c3en ( & mut self ) -> I2C3EN_W { I2C3EN_W { w : self } } } } # [ doc = "Backup domain control register (RCC_BDCR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdcr](bdcr) module" ]
pub type BDCR = crate :: Reg < u32 , _BDCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BDCR ; # [ doc = "`read()` method returns [bdcr::R](bdcr::R) reader structure" ]
impl crate :: Readable for BDCR { } # [ doc = "`write(|w| ..)` method takes [bdcr::W](bdcr::W) writer structure" ]
impl crate :: Writable for BDCR { } # [ doc = "Backup domain control register (RCC_BDCR)" ]
pub mod bdcr { # [ doc = "Reader of register BDCR" ]
pub type R = crate :: R < u32 , super :: BDCR > ; # [ doc = "Writer for register BDCR" ]
pub type W = crate :: W < u32 , super :: BDCR > ; # [ doc = "Register BDCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BDCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "External Low Speed oscillator enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSEON_A { # [ doc = "0: LSE oscillator Off" ]
OFF = 0 , # [ doc = "1: LSE oscillator On" ]
ON = 1 } impl From < LSEON_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSEON_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSEON`" ]
pub type LSEON_R = crate :: R < bool , LSEON_A > ; impl LSEON_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSEON_A { match self . bits { false => LSEON_A :: OFF , true => LSEON_A :: ON } } # [ doc = "Checks if the value of the field is `OFF`" ]
# [ inline ( always ) ]
pub fn is_off ( & self ) -> bool { * self == LSEON_A :: OFF } # [ doc = "Checks if the value of the field is `ON`" ]
# [ inline ( always ) ]
pub fn is_on ( & self ) -> bool { * self == LSEON_A :: ON } } # [ doc = "Write proxy for field `LSEON`" ]
pub struct LSEON_W < 'a > { w : & 'a mut W , } impl < 'a > LSEON_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSEON_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "LSE oscillator Off" ]
# [ inline ( always ) ]
pub fn off ( self ) -> & 'a mut W { self . variant ( LSEON_A :: OFF ) } # [ doc = "LSE oscillator On" ]
# [ inline ( always ) ]
pub fn on ( self ) -> & 'a mut W { self . variant ( LSEON_A :: ON ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "External Low Speed oscillator ready\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSERDY_A { # [ doc = "0: LSE oscillator not ready" ]
NOTREADY = 0 , # [ doc = "1: LSE oscillator ready" ]
READY = 1 } impl From < LSERDY_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSERDY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSERDY`" ]
pub type LSERDY_R = crate :: R < bool , LSERDY_A > ; impl LSERDY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSERDY_A { match self . bits { false => LSERDY_A :: NOTREADY , true => LSERDY_A :: READY } } # [ doc = "Checks if the value of the field is `NOTREADY`" ]
# [ inline ( always ) ]
pub fn is_not_ready ( & self ) -> bool { * self == LSERDY_A :: NOTREADY } # [ doc = "Checks if the value of the field is `READY`" ]
# [ inline ( always ) ]
pub fn is_ready ( & self ) -> bool { * self == LSERDY_A :: READY } } # [ doc = "External Low Speed oscillator bypass\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSEBYP_A { # [ doc = "0: LSE crystal oscillator not bypassed" ]
NOTBYPASSED = 0 , # [ doc = "1: LSE crystal oscillator bypassed with external clock" ]
BYPASSED = 1 } impl From < LSEBYP_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSEBYP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSEBYP`" ]
pub type LSEBYP_R = crate :: R < bool , LSEBYP_A > ; impl LSEBYP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSEBYP_A { match self . bits { false => LSEBYP_A :: NOTBYPASSED , true => LSEBYP_A :: BYPASSED } } # [ doc = "Checks if the value of the field is `NOTBYPASSED`" ]
# [ inline ( always ) ]
pub fn is_not_bypassed ( & self ) -> bool { * self == LSEBYP_A :: NOTBYPASSED } # [ doc = "Checks if the value of the field is `BYPASSED`" ]
# [ inline ( always ) ]
pub fn is_bypassed ( & self ) -> bool { * self == LSEBYP_A :: BYPASSED } } # [ doc = "Write proxy for field `LSEBYP`" ]
pub struct LSEBYP_W < 'a > { w : & 'a mut W , } impl < 'a > LSEBYP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSEBYP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "LSE crystal oscillator not bypassed" ]
# [ inline ( always ) ]
pub fn not_bypassed ( self ) -> & 'a mut W { self . variant ( LSEBYP_A :: NOTBYPASSED ) } # [ doc = "LSE crystal oscillator bypassed with external clock" ]
# [ inline ( always ) ]
pub fn bypassed ( self ) -> & 'a mut W { self . variant ( LSEBYP_A :: BYPASSED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "LSE oscillator drive capability\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum LSEDRV_A { # [ doc = "0: Low drive capacity" ]
LOW = 0 , # [ doc = "1: Medium-high drive capacity" ]
MEDIUMHIGH = 1 , # [ doc = "2: Medium-low drive capacity" ]
MEDIUMLOW = 2 , # [ doc = "3: High drive capacity" ]
HIGH = 3 } impl From < LSEDRV_A > for u8 { # [ inline ( always ) ]
fn from ( variant : LSEDRV_A ) -> Self { variant as _ } } # [ doc = "Reader of field `LSEDRV`" ]
pub type LSEDRV_R = crate :: R < u8 , LSEDRV_A > ; impl LSEDRV_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSEDRV_A { match self . bits { 0 => LSEDRV_A :: LOW , 1 => LSEDRV_A :: MEDIUMHIGH , 2 => LSEDRV_A :: MEDIUMLOW , 3 => LSEDRV_A :: HIGH , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == LSEDRV_A :: LOW } # [ doc = "Checks if the value of the field is `MEDIUMHIGH`" ]
# [ inline ( always ) ]
pub fn is_medium_high ( & self ) -> bool { * self == LSEDRV_A :: MEDIUMHIGH } # [ doc = "Checks if the value of the field is `MEDIUMLOW`" ]
# [ inline ( always ) ]
pub fn is_medium_low ( & self ) -> bool { * self == LSEDRV_A :: MEDIUMLOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == LSEDRV_A :: HIGH } } # [ doc = "Write proxy for field `LSEDRV`" ]
pub struct LSEDRV_W < 'a > { w : & 'a mut W , } impl < 'a > LSEDRV_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSEDRV_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low drive capacity" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( LSEDRV_A :: LOW ) } # [ doc = "Medium-high drive capacity" ]
# [ inline ( always ) ]
pub fn medium_high ( self ) -> & 'a mut W { self . variant ( LSEDRV_A :: MEDIUMHIGH ) } # [ doc = "Medium-low drive capacity" ]
# [ inline ( always ) ]
pub fn medium_low ( self ) -> & 'a mut W { self . variant ( LSEDRV_A :: MEDIUMLOW ) } # [ doc = "High drive capacity" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( LSEDRV_A :: HIGH ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 3 ) ) | ( ( ( value as u32 ) & 0x03 ) << 3 ) ; self . w } } # [ doc = "RTC clock source selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum RTCSEL_A { # [ doc = "0: No clock" ]
NOCLOCK = 0 , # [ doc = "1: LSE oscillator clock used as RTC clock" ]
LSE = 1 , # [ doc = "2: LSI oscillator clock used as RTC clock" ]
LSI = 2 , # [ doc = "3: HSE oscillator clock divided by a prescaler used as RTC clock" ]
HSE = 3 } impl From < RTCSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : RTCSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `RTCSEL`" ]
pub type RTCSEL_R = crate :: R < u8 , RTCSEL_A > ; impl RTCSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RTCSEL_A { match self . bits { 0 => RTCSEL_A :: NOCLOCK , 1 => RTCSEL_A :: LSE , 2 => RTCSEL_A :: LSI , 3 => RTCSEL_A :: HSE , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOCLOCK`" ]
# [ inline ( always ) ]
pub fn is_no_clock ( & self ) -> bool { * self == RTCSEL_A :: NOCLOCK } # [ doc = "Checks if the value of the field is `LSE`" ]
# [ inline ( always ) ]
pub fn is_lse ( & self ) -> bool { * self == RTCSEL_A :: LSE } # [ doc = "Checks if the value of the field is `LSI`" ]
# [ inline ( always ) ]
pub fn is_lsi ( & self ) -> bool { * self == RTCSEL_A :: LSI } # [ doc = "Checks if the value of the field is `HSE`" ]
# [ inline ( always ) ]
pub fn is_hse ( & self ) -> bool { * self == RTCSEL_A :: HSE } } # [ doc = "Write proxy for field `RTCSEL`" ]
pub struct RTCSEL_W < 'a > { w : & 'a mut W , } impl < 'a > RTCSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RTCSEL_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No clock" ]
# [ inline ( always ) ]
pub fn no_clock ( self ) -> & 'a mut W { self . variant ( RTCSEL_A :: NOCLOCK ) } # [ doc = "LSE oscillator clock used as RTC clock" ]
# [ inline ( always ) ]
pub fn lse ( self ) -> & 'a mut W { self . variant ( RTCSEL_A :: LSE ) } # [ doc = "LSI oscillator clock used as RTC clock" ]
# [ inline ( always ) ]
pub fn lsi ( self ) -> & 'a mut W { self . variant ( RTCSEL_A :: LSI ) } # [ doc = "HSE oscillator clock divided by a prescaler used as RTC clock" ]
# [ inline ( always ) ]
pub fn hse ( self ) -> & 'a mut W { self . variant ( RTCSEL_A :: HSE ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "RTC clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RTCEN_A { # [ doc = "0: RTC clock disabled" ]
DISABLED = 0 , # [ doc = "1: RTC clock enabled" ]
ENABLED = 1 } impl From < RTCEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : RTCEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RTCEN`" ]
pub type RTCEN_R = crate :: R < bool , RTCEN_A > ; impl RTCEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RTCEN_A { match self . bits { false => RTCEN_A :: DISABLED , true => RTCEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RTCEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RTCEN_A :: ENABLED } } # [ doc = "Write proxy for field `RTCEN`" ]
pub struct RTCEN_W < 'a > { w : & 'a mut W , } impl < 'a > RTCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RTCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RTC clock disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RTCEN_A :: DISABLED ) } # [ doc = "RTC clock enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RTCEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Backup domain software reset\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BDRST_A { # [ doc = "0: Reset not activated" ]
DISABLED = 0 , # [ doc = "1: Reset the entire RTC domain" ]
ENABLED = 1 } impl From < BDRST_A > for bool { # [ inline ( always ) ]
fn from ( variant : BDRST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BDRST`" ]
pub type BDRST_R = crate :: R < bool , BDRST_A > ; impl BDRST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BDRST_A { match self . bits { false => BDRST_A :: DISABLED , true => BDRST_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == BDRST_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == BDRST_A :: ENABLED } } # [ doc = "Write proxy for field `BDRST`" ]
pub struct BDRST_W < 'a > { w : & 'a mut W , } impl < 'a > BDRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BDRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset not activated" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( BDRST_A :: DISABLED ) } # [ doc = "Reset the entire RTC domain" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( BDRST_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } impl R { # [ doc = "Bit 0 - External Low Speed oscillator enable" ]
# [ inline ( always ) ]
pub fn lseon ( & self ) -> LSEON_R { LSEON_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - External Low Speed oscillator ready" ]
# [ inline ( always ) ]
pub fn lserdy ( & self ) -> LSERDY_R { LSERDY_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - External Low Speed oscillator bypass" ]
# [ inline ( always ) ]
pub fn lsebyp ( & self ) -> LSEBYP_R { LSEBYP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 3:4 - LSE oscillator drive capability" ]
# [ inline ( always ) ]
pub fn lsedrv ( & self ) -> LSEDRV_R { LSEDRV_R :: new ( ( ( self . bits >> 3 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - RTC clock source selection" ]
# [ inline ( always ) ]
pub fn rtcsel ( & self ) -> RTCSEL_R { RTCSEL_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 15 - RTC clock enable" ]
# [ inline ( always ) ]
pub fn rtcen ( & self ) -> RTCEN_R { RTCEN_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Backup domain software reset" ]
# [ inline ( always ) ]
pub fn bdrst ( & self ) -> BDRST_R { BDRST_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - External Low Speed oscillator enable" ]
# [ inline ( always ) ]
pub fn lseon ( & mut self ) -> LSEON_W { LSEON_W { w : self } } # [ doc = "Bit 2 - External Low Speed oscillator bypass" ]
# [ inline ( always ) ]
pub fn lsebyp ( & mut self ) -> LSEBYP_W { LSEBYP_W { w : self } } # [ doc = "Bits 3:4 - LSE oscillator drive capability" ]
# [ inline ( always ) ]
pub fn lsedrv ( & mut self ) -> LSEDRV_W { LSEDRV_W { w : self } } # [ doc = "Bits 8:9 - RTC clock source selection" ]
# [ inline ( always ) ]
pub fn rtcsel ( & mut self ) -> RTCSEL_W { RTCSEL_W { w : self } } # [ doc = "Bit 15 - RTC clock enable" ]
# [ inline ( always ) ]
pub fn rtcen ( & mut self ) -> RTCEN_W { RTCEN_W { w : self } } # [ doc = "Bit 16 - Backup domain software reset" ]
# [ inline ( always ) ]
pub fn bdrst ( & mut self ) -> BDRST_W { BDRST_W { w : self } } } } # [ doc = "Control/status register (RCC_CSR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csr](csr) module" ]
pub type CSR = crate :: Reg < u32 , _CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CSR ; # [ doc = "`read()` method returns [csr::R](csr::R) reader structure" ]
impl crate :: Readable for CSR { } # [ doc = "`write(|w| ..)` method takes [csr::W](csr::W) writer structure" ]
impl crate :: Writable for CSR { } # [ doc = "Control/status register (RCC_CSR)" ]
pub mod csr { # [ doc = "Reader of register CSR" ]
pub type R = crate :: R < u32 , super :: CSR > ; # [ doc = "Writer for register CSR" ]
pub type W = crate :: W < u32 , super :: CSR > ; # [ doc = "Register CSR `reset()`'s with value 0x0c00_0000" ]
impl crate :: ResetValue for super :: CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0c00_0000 } } # [ doc = "Internal low speed oscillator enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSION_A { # [ doc = "0: LSI oscillator Off" ]
OFF = 0 , # [ doc = "1: LSI oscillator On" ]
ON = 1 } impl From < LSION_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSION_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSION`" ]
pub type LSION_R = crate :: R < bool , LSION_A > ; impl LSION_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSION_A { match self . bits { false => LSION_A :: OFF , true => LSION_A :: ON } } # [ doc = "Checks if the value of the field is `OFF`" ]
# [ inline ( always ) ]
pub fn is_off ( & self ) -> bool { * self == LSION_A :: OFF } # [ doc = "Checks if the value of the field is `ON`" ]
# [ inline ( always ) ]
pub fn is_on ( & self ) -> bool { * self == LSION_A :: ON } } # [ doc = "Write proxy for field `LSION`" ]
pub struct LSION_W < 'a > { w : & 'a mut W , } impl < 'a > LSION_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSION_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "LSI oscillator Off" ]
# [ inline ( always ) ]
pub fn off ( self ) -> & 'a mut W { self . variant ( LSION_A :: OFF ) } # [ doc = "LSI oscillator On" ]
# [ inline ( always ) ]
pub fn on ( self ) -> & 'a mut W { self . variant ( LSION_A :: ON ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Internal low speed oscillator ready\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSIRDY_A { # [ doc = "0: LSI oscillator not ready" ]
NOTREADY = 0 , # [ doc = "1: LSI oscillator ready" ]
READY = 1 } impl From < LSIRDY_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSIRDY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSIRDY`" ]
pub type LSIRDY_R = crate :: R < bool , LSIRDY_A > ; impl LSIRDY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSIRDY_A { match self . bits { false => LSIRDY_A :: NOTREADY , true => LSIRDY_A :: READY } } # [ doc = "Checks if the value of the field is `NOTREADY`" ]
# [ inline ( always ) ]
pub fn is_not_ready ( & self ) -> bool { * self == LSIRDY_A :: NOTREADY } # [ doc = "Checks if the value of the field is `READY`" ]
# [ inline ( always ) ]
pub fn is_ready ( & self ) -> bool { * self == LSIRDY_A :: READY } } # [ doc = "Remove reset flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RMVF_A { # [ doc = "1: Clears the reset flag" ]
CLEAR = 1 } impl From < RMVF_A > for bool { # [ inline ( always ) ]
fn from ( variant : RMVF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RMVF`" ]
pub type RMVF_R = crate :: R < bool , RMVF_A > ; impl RMVF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RMVF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RMVF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == RMVF_A :: CLEAR } } # [ doc = "Write proxy for field `RMVF`" ]
pub struct RMVF_W < 'a > { w : & 'a mut W , } impl < 'a > RMVF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RMVF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the reset flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( RMVF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Option byte loader reset flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OBLRSTF_A { # [ doc = "0: No reset has occured" ]
NORESET = 0 , # [ doc = "1: A reset has occured" ]
RESET = 1 } impl From < OBLRSTF_A > for bool { # [ inline ( always ) ]
fn from ( variant : OBLRSTF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OBLRSTF`" ]
pub type OBLRSTF_R = crate :: R < bool , OBLRSTF_A > ; impl OBLRSTF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OBLRSTF_A { match self . bits { false => OBLRSTF_A :: NORESET , true => OBLRSTF_A :: RESET } } # [ doc = "Checks if the value of the field is `NORESET`" ]
# [ inline ( always ) ]
pub fn is_no_reset ( & self ) -> bool { * self == OBLRSTF_A :: NORESET } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == OBLRSTF_A :: RESET } } # [ doc = "Write proxy for field `OBLRSTF`" ]
pub struct OBLRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > OBLRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OBLRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "PIN reset flag" ]
pub type PINRSTF_A = OBLRSTF_A ; # [ doc = "Reader of field `PINRSTF`" ]
pub type PINRSTF_R = crate :: R < bool , OBLRSTF_A > ; # [ doc = "Write proxy for field `PINRSTF`" ]
pub struct PINRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > PINRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PINRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "POR/PDR reset flag" ]
pub type PORRSTF_A = OBLRSTF_A ; # [ doc = "Reader of field `PORRSTF`" ]
pub type PORRSTF_R = crate :: R < bool , OBLRSTF_A > ; # [ doc = "Write proxy for field `PORRSTF`" ]
pub struct PORRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > PORRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PORRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Software reset flag" ]
pub type SFTRSTF_A = OBLRSTF_A ; # [ doc = "Reader of field `SFTRSTF`" ]
pub type SFTRSTF_R = crate :: R < bool , OBLRSTF_A > ; # [ doc = "Write proxy for field `SFTRSTF`" ]
pub struct SFTRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > SFTRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SFTRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Independent watchdog reset flag" ]
pub type IWDGRSTF_A = OBLRSTF_A ; # [ doc = "Reader of field `IWDGRSTF`" ]
pub type IWDGRSTF_R = crate :: R < bool , OBLRSTF_A > ; # [ doc = "Write proxy for field `IWDGRSTF`" ]
pub struct IWDGRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > IWDGRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IWDGRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Window watchdog reset flag" ]
pub type WWDGRSTF_A = OBLRSTF_A ; # [ doc = "Reader of field `WWDGRSTF`" ]
pub type WWDGRSTF_R = crate :: R < bool , OBLRSTF_A > ; # [ doc = "Write proxy for field `WWDGRSTF`" ]
pub struct WWDGRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > WWDGRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WWDGRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Low-power reset flag" ]
pub type LPWRRSTF_A = OBLRSTF_A ; # [ doc = "Reader of field `LPWRRSTF`" ]
pub type LPWRRSTF_R = crate :: R < bool , OBLRSTF_A > ; # [ doc = "Write proxy for field `LPWRRSTF`" ]
pub struct LPWRRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > LPWRRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LPWRRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reset flag of the 1.8 V domain" ]
pub type V18PWRRSTF_A = OBLRSTF_A ; # [ doc = "Reader of field `V18PWRRSTF`" ]
pub type V18PWRRSTF_R = crate :: R < bool , OBLRSTF_A > ; # [ doc = "Write proxy for field `V18PWRRSTF`" ]
pub struct V18PWRRSTF_W < 'a > { w : & 'a mut W , } impl < 'a > V18PWRRSTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : V18PWRRSTF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No reset has occured" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: NORESET ) } # [ doc = "A reset has occured" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( OBLRSTF_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } impl R { # [ doc = "Bit 0 - Internal low speed oscillator enable" ]
# [ inline ( always ) ]
pub fn lsion ( & self ) -> LSION_R { LSION_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Internal low speed oscillator ready" ]
# [ inline ( always ) ]
pub fn lsirdy ( & self ) -> LSIRDY_R { LSIRDY_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Remove reset flag" ]
# [ inline ( always ) ]
pub fn rmvf ( & self ) -> RMVF_R { RMVF_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Option byte loader reset flag" ]
# [ inline ( always ) ]
pub fn oblrstf ( & self ) -> OBLRSTF_R { OBLRSTF_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - PIN reset flag" ]
# [ inline ( always ) ]
pub fn pinrstf ( & self ) -> PINRSTF_R { PINRSTF_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - POR/PDR reset flag" ]
# [ inline ( always ) ]
pub fn porrstf ( & self ) -> PORRSTF_R { PORRSTF_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Software reset flag" ]
# [ inline ( always ) ]
pub fn sftrstf ( & self ) -> SFTRSTF_R { SFTRSTF_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - Independent watchdog reset flag" ]
# [ inline ( always ) ]
pub fn iwdgrstf ( & self ) -> IWDGRSTF_R { IWDGRSTF_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Window watchdog reset flag" ]
# [ inline ( always ) ]
pub fn wwdgrstf ( & self ) -> WWDGRSTF_R { WWDGRSTF_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Low-power reset flag" ]
# [ inline ( always ) ]
pub fn lpwrrstf ( & self ) -> LPWRRSTF_R { LPWRRSTF_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Reset flag of the 1.8 V domain" ]
# [ inline ( always ) ]
pub fn v18pwrrstf ( & self ) -> V18PWRRSTF_R { V18PWRRSTF_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Internal low speed oscillator enable" ]
# [ inline ( always ) ]
pub fn lsion ( & mut self ) -> LSION_W { LSION_W { w : self } } # [ doc = "Bit 24 - Remove reset flag" ]
# [ inline ( always ) ]
pub fn rmvf ( & mut self ) -> RMVF_W { RMVF_W { w : self } } # [ doc = "Bit 25 - Option byte loader reset flag" ]
# [ inline ( always ) ]
pub fn oblrstf ( & mut self ) -> OBLRSTF_W { OBLRSTF_W { w : self } } # [ doc = "Bit 26 - PIN reset flag" ]
# [ inline ( always ) ]
pub fn pinrstf ( & mut self ) -> PINRSTF_W { PINRSTF_W { w : self } } # [ doc = "Bit 27 - POR/PDR reset flag" ]
# [ inline ( always ) ]
pub fn porrstf ( & mut self ) -> PORRSTF_W { PORRSTF_W { w : self } } # [ doc = "Bit 28 - Software reset flag" ]
# [ inline ( always ) ]
pub fn sftrstf ( & mut self ) -> SFTRSTF_W { SFTRSTF_W { w : self } } # [ doc = "Bit 29 - Independent watchdog reset flag" ]
# [ inline ( always ) ]
pub fn iwdgrstf ( & mut self ) -> IWDGRSTF_W { IWDGRSTF_W { w : self } } # [ doc = "Bit 30 - Window watchdog reset flag" ]
# [ inline ( always ) ]
pub fn wwdgrstf ( & mut self ) -> WWDGRSTF_W { WWDGRSTF_W { w : self } } # [ doc = "Bit 31 - Low-power reset flag" ]
# [ inline ( always ) ]
pub fn lpwrrstf ( & mut self ) -> LPWRRSTF_W { LPWRRSTF_W { w : self } } # [ doc = "Bit 23 - Reset flag of the 1.8 V domain" ]
# [ inline ( always ) ]
pub fn v18pwrrstf ( & mut self ) -> V18PWRRSTF_W { V18PWRRSTF_W { w : self } } } } # [ doc = "AHB peripheral reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahbrstr](ahbrstr) module" ]
pub type AHBRSTR = crate :: Reg < u32 , _AHBRSTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AHBRSTR ; # [ doc = "`read()` method returns [ahbrstr::R](ahbrstr::R) reader structure" ]
impl crate :: Readable for AHBRSTR { } # [ doc = "`write(|w| ..)` method takes [ahbrstr::W](ahbrstr::W) writer structure" ]
impl crate :: Writable for AHBRSTR { } # [ doc = "AHB peripheral reset register" ]
pub mod ahbrstr { # [ doc = "Reader of register AHBRSTR" ]
pub type R = crate :: R < u32 , super :: AHBRSTR > ; # [ doc = "Writer for register AHBRSTR" ]
pub type W = crate :: W < u32 , super :: AHBRSTR > ; # [ doc = "Register AHBRSTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AHBRSTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "I/O port A reset\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IOPARST_A { # [ doc = "1: Reset the selected module" ]
RESET = 1 } impl From < IOPARST_A > for bool { # [ inline ( always ) ]
fn from ( variant : IOPARST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IOPARST`" ]
pub type IOPARST_R = crate :: R < bool , IOPARST_A > ; impl IOPARST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , IOPARST_A > { use crate :: Variant :: * ; match self . bits { true => Val ( IOPARST_A :: RESET ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == IOPARST_A :: RESET } } # [ doc = "Write proxy for field `IOPARST`" ]
pub struct IOPARST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPARST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPARST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "I/O port B reset" ]
pub type IOPBRST_A = IOPARST_A ; # [ doc = "Reader of field `IOPBRST`" ]
pub type IOPBRST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `IOPBRST`" ]
pub struct IOPBRST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPBRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPBRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "I/O port C reset" ]
pub type IOPCRST_A = IOPARST_A ; # [ doc = "Reader of field `IOPCRST`" ]
pub type IOPCRST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `IOPCRST`" ]
pub struct IOPCRST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPCRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPCRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "I/O port D reset" ]
pub type IOPDRST_A = IOPARST_A ; # [ doc = "Reader of field `IOPDRST`" ]
pub type IOPDRST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `IOPDRST`" ]
pub struct IOPDRST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPDRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPDRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "I/O port E reset" ]
pub type IOPERST_A = IOPARST_A ; # [ doc = "Reader of field `IOPERST`" ]
pub type IOPERST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `IOPERST`" ]
pub struct IOPERST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPERST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPERST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "I/O port F reset" ]
pub type IOPFRST_A = IOPARST_A ; # [ doc = "Reader of field `IOPFRST`" ]
pub type IOPFRST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `IOPFRST`" ]
pub struct IOPFRST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPFRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPFRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Touch sensing controller reset" ]
pub type TSCRST_A = IOPARST_A ; # [ doc = "Reader of field `TSCRST`" ]
pub type TSCRST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `TSCRST`" ]
pub struct TSCRST_W < 'a > { w : & 'a mut W , } impl < 'a > TSCRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSCRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "I/O port H reset" ]
pub type IOPHRST_A = IOPARST_A ; # [ doc = "Reader of field `IOPHRST`" ]
pub type IOPHRST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `IOPHRST`" ]
pub struct IOPHRST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPHRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPHRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "I/O port G reset" ]
pub type IOPGRST_A = IOPARST_A ; # [ doc = "Reader of field `IOPGRST`" ]
pub type IOPGRST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `IOPGRST`" ]
pub struct IOPGRST_W < 'a > { w : & 'a mut W , } impl < 'a > IOPGRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IOPGRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "ADC1 and ADC2 reset" ]
pub type ADC12RST_A = IOPARST_A ; # [ doc = "Reader of field `ADC12RST`" ]
pub type ADC12RST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `ADC12RST`" ]
pub struct ADC12RST_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "ADC3 and ADC4 reset" ]
pub type ADC34RST_A = IOPARST_A ; # [ doc = "Reader of field `ADC34RST`" ]
pub type ADC34RST_R = crate :: R < bool , IOPARST_A > ; # [ doc = "Write proxy for field `ADC34RST`" ]
pub struct ADC34RST_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34RST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34RST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Reset the selected module" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( IOPARST_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } impl R { # [ doc = "Bit 17 - I/O port A reset" ]
# [ inline ( always ) ]
pub fn ioparst ( & self ) -> IOPARST_R { IOPARST_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - I/O port B reset" ]
# [ inline ( always ) ]
pub fn iopbrst ( & self ) -> IOPBRST_R { IOPBRST_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - I/O port C reset" ]
# [ inline ( always ) ]
pub fn iopcrst ( & self ) -> IOPCRST_R { IOPCRST_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - I/O port D reset" ]
# [ inline ( always ) ]
pub fn iopdrst ( & self ) -> IOPDRST_R { IOPDRST_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - I/O port E reset" ]
# [ inline ( always ) ]
pub fn ioperst ( & self ) -> IOPERST_R { IOPERST_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - I/O port F reset" ]
# [ inline ( always ) ]
pub fn iopfrst ( & self ) -> IOPFRST_R { IOPFRST_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Touch sensing controller reset" ]
# [ inline ( always ) ]
pub fn tscrst ( & self ) -> TSCRST_R { TSCRST_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - I/O port H reset" ]
# [ inline ( always ) ]
pub fn iophrst ( & self ) -> IOPHRST_R { IOPHRST_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - I/O port G reset" ]
# [ inline ( always ) ]
pub fn iopgrst ( & self ) -> IOPGRST_R { IOPGRST_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - ADC1 and ADC2 reset" ]
# [ inline ( always ) ]
pub fn adc12rst ( & self ) -> ADC12RST_R { ADC12RST_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - ADC3 and ADC4 reset" ]
# [ inline ( always ) ]
pub fn adc34rst ( & self ) -> ADC34RST_R { ADC34RST_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 17 - I/O port A reset" ]
# [ inline ( always ) ]
pub fn ioparst ( & mut self ) -> IOPARST_W { IOPARST_W { w : self } } # [ doc = "Bit 18 - I/O port B reset" ]
# [ inline ( always ) ]
pub fn iopbrst ( & mut self ) -> IOPBRST_W { IOPBRST_W { w : self } } # [ doc = "Bit 19 - I/O port C reset" ]
# [ inline ( always ) ]
pub fn iopcrst ( & mut self ) -> IOPCRST_W { IOPCRST_W { w : self } } # [ doc = "Bit 20 - I/O port D reset" ]
# [ inline ( always ) ]
pub fn iopdrst ( & mut self ) -> IOPDRST_W { IOPDRST_W { w : self } } # [ doc = "Bit 21 - I/O port E reset" ]
# [ inline ( always ) ]
pub fn ioperst ( & mut self ) -> IOPERST_W { IOPERST_W { w : self } } # [ doc = "Bit 22 - I/O port F reset" ]
# [ inline ( always ) ]
pub fn iopfrst ( & mut self ) -> IOPFRST_W { IOPFRST_W { w : self } } # [ doc = "Bit 24 - Touch sensing controller reset" ]
# [ inline ( always ) ]
pub fn tscrst ( & mut self ) -> TSCRST_W { TSCRST_W { w : self } } # [ doc = "Bit 16 - I/O port H reset" ]
# [ inline ( always ) ]
pub fn iophrst ( & mut self ) -> IOPHRST_W { IOPHRST_W { w : self } } # [ doc = "Bit 23 - I/O port G reset" ]
# [ inline ( always ) ]
pub fn iopgrst ( & mut self ) -> IOPGRST_W { IOPGRST_W { w : self } } # [ doc = "Bit 28 - ADC1 and ADC2 reset" ]
# [ inline ( always ) ]
pub fn adc12rst ( & mut self ) -> ADC12RST_W { ADC12RST_W { w : self } } # [ doc = "Bit 29 - ADC3 and ADC4 reset" ]
# [ inline ( always ) ]
pub fn adc34rst ( & mut self ) -> ADC34RST_W { ADC34RST_W { w : self } } } } # [ doc = "Clock configuration register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr2](cfgr2) module" ]
pub type CFGR2 = crate :: Reg < u32 , _CFGR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR2 ; # [ doc = "`read()` method returns [cfgr2::R](cfgr2::R) reader structure" ]
impl crate :: Readable for CFGR2 { } # [ doc = "`write(|w| ..)` method takes [cfgr2::W](cfgr2::W) writer structure" ]
impl crate :: Writable for CFGR2 { } # [ doc = "Clock configuration register 2" ]
pub mod cfgr2 { # [ doc = "Reader of register CFGR2" ]
pub type R = crate :: R < u32 , super :: CFGR2 > ; # [ doc = "Writer for register CFGR2" ]
pub type W = crate :: W < u32 , super :: CFGR2 > ; # [ doc = "Register CFGR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "PREDIV division factor\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PREDIV_A { # [ doc = "0: PREDIV input clock not divided" ]
DIV1 = 0 , # [ doc = "1: PREDIV input clock divided by 2" ]
DIV2 = 1 , # [ doc = "2: PREDIV input clock divided by 3" ]
DIV3 = 2 , # [ doc = "3: PREDIV input clock divided by 4" ]
DIV4 = 3 , # [ doc = "4: PREDIV input clock divided by 5" ]
DIV5 = 4 , # [ doc = "5: PREDIV input clock divided by 6" ]
DIV6 = 5 , # [ doc = "6: PREDIV input clock divided by 7" ]
DIV7 = 6 , # [ doc = "7: PREDIV input clock divided by 8" ]
DIV8 = 7 , # [ doc = "8: PREDIV input clock divided by 9" ]
DIV9 = 8 , # [ doc = "9: PREDIV input clock divided by 10" ]
DIV10 = 9 , # [ doc = "10: PREDIV input clock divided by 11" ]
DIV11 = 10 , # [ doc = "11: PREDIV input clock divided by 12" ]
DIV12 = 11 , # [ doc = "12: PREDIV input clock divided by 13" ]
DIV13 = 12 , # [ doc = "13: PREDIV input clock divided by 14" ]
DIV14 = 13 , # [ doc = "14: PREDIV input clock divided by 15" ]
DIV15 = 14 , # [ doc = "15: PREDIV input clock divided by 16" ]
DIV16 = 15 } impl From < PREDIV_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PREDIV_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PREDIV`" ]
pub type PREDIV_R = crate :: R < u8 , PREDIV_A > ; impl PREDIV_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PREDIV_A { match self . bits { 0 => PREDIV_A :: DIV1 , 1 => PREDIV_A :: DIV2 , 2 => PREDIV_A :: DIV3 , 3 => PREDIV_A :: DIV4 , 4 => PREDIV_A :: DIV5 , 5 => PREDIV_A :: DIV6 , 6 => PREDIV_A :: DIV7 , 7 => PREDIV_A :: DIV8 , 8 => PREDIV_A :: DIV9 , 9 => PREDIV_A :: DIV10 , 10 => PREDIV_A :: DIV11 , 11 => PREDIV_A :: DIV12 , 12 => PREDIV_A :: DIV13 , 13 => PREDIV_A :: DIV14 , 14 => PREDIV_A :: DIV15 , 15 => PREDIV_A :: DIV16 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == PREDIV_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == PREDIV_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV3`" ]
# [ inline ( always ) ]
pub fn is_div3 ( & self ) -> bool { * self == PREDIV_A :: DIV3 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == PREDIV_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV5`" ]
# [ inline ( always ) ]
pub fn is_div5 ( & self ) -> bool { * self == PREDIV_A :: DIV5 } # [ doc = "Checks if the value of the field is `DIV6`" ]
# [ inline ( always ) ]
pub fn is_div6 ( & self ) -> bool { * self == PREDIV_A :: DIV6 } # [ doc = "Checks if the value of the field is `DIV7`" ]
# [ inline ( always ) ]
pub fn is_div7 ( & self ) -> bool { * self == PREDIV_A :: DIV7 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == PREDIV_A :: DIV8 } # [ doc = "Checks if the value of the field is `DIV9`" ]
# [ inline ( always ) ]
pub fn is_div9 ( & self ) -> bool { * self == PREDIV_A :: DIV9 } # [ doc = "Checks if the value of the field is `DIV10`" ]
# [ inline ( always ) ]
pub fn is_div10 ( & self ) -> bool { * self == PREDIV_A :: DIV10 } # [ doc = "Checks if the value of the field is `DIV11`" ]
# [ inline ( always ) ]
pub fn is_div11 ( & self ) -> bool { * self == PREDIV_A :: DIV11 } # [ doc = "Checks if the value of the field is `DIV12`" ]
# [ inline ( always ) ]
pub fn is_div12 ( & self ) -> bool { * self == PREDIV_A :: DIV12 } # [ doc = "Checks if the value of the field is `DIV13`" ]
# [ inline ( always ) ]
pub fn is_div13 ( & self ) -> bool { * self == PREDIV_A :: DIV13 } # [ doc = "Checks if the value of the field is `DIV14`" ]
# [ inline ( always ) ]
pub fn is_div14 ( & self ) -> bool { * self == PREDIV_A :: DIV14 } # [ doc = "Checks if the value of the field is `DIV15`" ]
# [ inline ( always ) ]
pub fn is_div15 ( & self ) -> bool { * self == PREDIV_A :: DIV15 } # [ doc = "Checks if the value of the field is `DIV16`" ]
# [ inline ( always ) ]
pub fn is_div16 ( & self ) -> bool { * self == PREDIV_A :: DIV16 } } # [ doc = "Write proxy for field `PREDIV`" ]
pub struct PREDIV_W < 'a > { w : & 'a mut W , } impl < 'a > PREDIV_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PREDIV_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PREDIV input clock not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV1 ) } # [ doc = "PREDIV input clock divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV2 ) } # [ doc = "PREDIV input clock divided by 3" ]
# [ inline ( always ) ]
pub fn div3 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV3 ) } # [ doc = "PREDIV input clock divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV4 ) } # [ doc = "PREDIV input clock divided by 5" ]
# [ inline ( always ) ]
pub fn div5 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV5 ) } # [ doc = "PREDIV input clock divided by 6" ]
# [ inline ( always ) ]
pub fn div6 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV6 ) } # [ doc = "PREDIV input clock divided by 7" ]
# [ inline ( always ) ]
pub fn div7 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV7 ) } # [ doc = "PREDIV input clock divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV8 ) } # [ doc = "PREDIV input clock divided by 9" ]
# [ inline ( always ) ]
pub fn div9 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV9 ) } # [ doc = "PREDIV input clock divided by 10" ]
# [ inline ( always ) ]
pub fn div10 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV10 ) } # [ doc = "PREDIV input clock divided by 11" ]
# [ inline ( always ) ]
pub fn div11 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV11 ) } # [ doc = "PREDIV input clock divided by 12" ]
# [ inline ( always ) ]
pub fn div12 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV12 ) } # [ doc = "PREDIV input clock divided by 13" ]
# [ inline ( always ) ]
pub fn div13 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV13 ) } # [ doc = "PREDIV input clock divided by 14" ]
# [ inline ( always ) ]
pub fn div14 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV14 ) } # [ doc = "PREDIV input clock divided by 15" ]
# [ inline ( always ) ]
pub fn div15 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV15 ) } # [ doc = "PREDIV input clock divided by 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( PREDIV_A :: DIV16 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "ADC1 and ADC2 reset\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ADC12PRES_A { # [ doc = "0: No clock" ]
NOCLOCK = 0 , # [ doc = "16: PLL clock not divided" ]
DIV1 = 16 , # [ doc = "17: PLL clock divided by 2" ]
DIV2 = 17 , # [ doc = "18: PLL clock divided by 4" ]
DIV4 = 18 , # [ doc = "19: PLL clock divided by 6" ]
DIV6 = 19 , # [ doc = "20: PLL clock divided by 8" ]
DIV8 = 20 , # [ doc = "21: PLL clock divided by 10" ]
DIV10 = 21 , # [ doc = "22: PLL clock divided by 12" ]
DIV12 = 22 , # [ doc = "23: PLL clock divided by 16" ]
DIV16 = 23 , # [ doc = "24: PLL clock divided by 32" ]
DIV32 = 24 , # [ doc = "25: PLL clock divided by 64" ]
DIV64 = 25 , # [ doc = "26: PLL clock divided by 128" ]
DIV128 = 26 , # [ doc = "27: PLL clock divided by 256" ]
DIV256 = 27 } impl From < ADC12PRES_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ADC12PRES_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ADC12PRES`" ]
pub type ADC12PRES_R = crate :: R < u8 , ADC12PRES_A > ; impl ADC12PRES_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , ADC12PRES_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( ADC12PRES_A :: NOCLOCK ) , 16 => Val ( ADC12PRES_A :: DIV1 ) , 17 => Val ( ADC12PRES_A :: DIV2 ) , 18 => Val ( ADC12PRES_A :: DIV4 ) , 19 => Val ( ADC12PRES_A :: DIV6 ) , 20 => Val ( ADC12PRES_A :: DIV8 ) , 21 => Val ( ADC12PRES_A :: DIV10 ) , 22 => Val ( ADC12PRES_A :: DIV12 ) , 23 => Val ( ADC12PRES_A :: DIV16 ) , 24 => Val ( ADC12PRES_A :: DIV32 ) , 25 => Val ( ADC12PRES_A :: DIV64 ) , 26 => Val ( ADC12PRES_A :: DIV128 ) , 27 => Val ( ADC12PRES_A :: DIV256 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOCLOCK`" ]
# [ inline ( always ) ]
pub fn is_no_clock ( & self ) -> bool { * self == ADC12PRES_A :: NOCLOCK } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == ADC12PRES_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == ADC12PRES_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == ADC12PRES_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV6`" ]
# [ inline ( always ) ]
pub fn is_div6 ( & self ) -> bool { * self == ADC12PRES_A :: DIV6 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == ADC12PRES_A :: DIV8 } # [ doc = "Checks if the value of the field is `DIV10`" ]
# [ inline ( always ) ]
pub fn is_div10 ( & self ) -> bool { * self == ADC12PRES_A :: DIV10 } # [ doc = "Checks if the value of the field is `DIV12`" ]
# [ inline ( always ) ]
pub fn is_div12 ( & self ) -> bool { * self == ADC12PRES_A :: DIV12 } # [ doc = "Checks if the value of the field is `DIV16`" ]
# [ inline ( always ) ]
pub fn is_div16 ( & self ) -> bool { * self == ADC12PRES_A :: DIV16 } # [ doc = "Checks if the value of the field is `DIV32`" ]
# [ inline ( always ) ]
pub fn is_div32 ( & self ) -> bool { * self == ADC12PRES_A :: DIV32 } # [ doc = "Checks if the value of the field is `DIV64`" ]
# [ inline ( always ) ]
pub fn is_div64 ( & self ) -> bool { * self == ADC12PRES_A :: DIV64 } # [ doc = "Checks if the value of the field is `DIV128`" ]
# [ inline ( always ) ]
pub fn is_div128 ( & self ) -> bool { * self == ADC12PRES_A :: DIV128 } # [ doc = "Checks if the value of the field is `DIV256`" ]
# [ inline ( always ) ]
pub fn is_div256 ( & self ) -> bool { * self == ADC12PRES_A :: DIV256 } } # [ doc = "Write proxy for field `ADC12PRES`" ]
pub struct ADC12PRES_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12PRES_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12PRES_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No clock" ]
# [ inline ( always ) ]
pub fn no_clock ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: NOCLOCK ) } # [ doc = "PLL clock not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV1 ) } # [ doc = "PLL clock divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV2 ) } # [ doc = "PLL clock divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV4 ) } # [ doc = "PLL clock divided by 6" ]
# [ inline ( always ) ]
pub fn div6 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV6 ) } # [ doc = "PLL clock divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV8 ) } # [ doc = "PLL clock divided by 10" ]
# [ inline ( always ) ]
pub fn div10 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV10 ) } # [ doc = "PLL clock divided by 12" ]
# [ inline ( always ) ]
pub fn div12 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV12 ) } # [ doc = "PLL clock divided by 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV16 ) } # [ doc = "PLL clock divided by 32" ]
# [ inline ( always ) ]
pub fn div32 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV32 ) } # [ doc = "PLL clock divided by 64" ]
# [ inline ( always ) ]
pub fn div64 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV64 ) } # [ doc = "PLL clock divided by 128" ]
# [ inline ( always ) ]
pub fn div128 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV128 ) } # [ doc = "PLL clock divided by 256" ]
# [ inline ( always ) ]
pub fn div256 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV256 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 4 ) ) | ( ( ( value as u32 ) & 0x1f ) << 4 ) ; self . w } } # [ doc = "ADC3 and ADC4 reset" ]
pub type ADC34PRES_A = ADC12PRES_A ; # [ doc = "Reader of field `ADC34PRES`" ]
pub type ADC34PRES_R = crate :: R < u8 , ADC12PRES_A > ; # [ doc = "Write proxy for field `ADC34PRES`" ]
pub struct ADC34PRES_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34PRES_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34PRES_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No clock" ]
# [ inline ( always ) ]
pub fn no_clock ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: NOCLOCK ) } # [ doc = "PLL clock not divided" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV1 ) } # [ doc = "PLL clock divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV2 ) } # [ doc = "PLL clock divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV4 ) } # [ doc = "PLL clock divided by 6" ]
# [ inline ( always ) ]
pub fn div6 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV6 ) } # [ doc = "PLL clock divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV8 ) } # [ doc = "PLL clock divided by 10" ]
# [ inline ( always ) ]
pub fn div10 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV10 ) } # [ doc = "PLL clock divided by 12" ]
# [ inline ( always ) ]
pub fn div12 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV12 ) } # [ doc = "PLL clock divided by 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV16 ) } # [ doc = "PLL clock divided by 32" ]
# [ inline ( always ) ]
pub fn div32 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV32 ) } # [ doc = "PLL clock divided by 64" ]
# [ inline ( always ) ]
pub fn div64 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV64 ) } # [ doc = "PLL clock divided by 128" ]
# [ inline ( always ) ]
pub fn div128 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV128 ) } # [ doc = "PLL clock divided by 256" ]
# [ inline ( always ) ]
pub fn div256 ( self ) -> & 'a mut W { self . variant ( ADC12PRES_A :: DIV256 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 9 ) ) | ( ( ( value as u32 ) & 0x1f ) << 9 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - PREDIV division factor" ]
# [ inline ( always ) ]
pub fn prediv ( & self ) -> PREDIV_R { PREDIV_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:8 - ADC1 and ADC2 reset" ]
# [ inline ( always ) ]
pub fn adc12pres ( & self ) -> ADC12PRES_R { ADC12PRES_R :: new ( ( ( self . bits >> 4 ) & 0x1f ) as u8 ) } # [ doc = "Bits 9:13 - ADC3 and ADC4 reset" ]
# [ inline ( always ) ]
pub fn adc34pres ( & self ) -> ADC34PRES_R { ADC34PRES_R :: new ( ( ( self . bits >> 9 ) & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 0:3 - PREDIV division factor" ]
# [ inline ( always ) ]
pub fn prediv ( & mut self ) -> PREDIV_W { PREDIV_W { w : self } } # [ doc = "Bits 4:8 - ADC1 and ADC2 reset" ]
# [ inline ( always ) ]
pub fn adc12pres ( & mut self ) -> ADC12PRES_W { ADC12PRES_W { w : self } } # [ doc = "Bits 9:13 - ADC3 and ADC4 reset" ]
# [ inline ( always ) ]
pub fn adc34pres ( & mut self ) -> ADC34PRES_W { ADC34PRES_W { w : self } } } } # [ doc = "Clock configuration register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr3](cfgr3) module" ]
pub type CFGR3 = crate :: Reg < u32 , _CFGR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR3 ; # [ doc = "`read()` method returns [cfgr3::R](cfgr3::R) reader structure" ]
impl crate :: Readable for CFGR3 { } # [ doc = "`write(|w| ..)` method takes [cfgr3::W](cfgr3::W) writer structure" ]
impl crate :: Writable for CFGR3 { } # [ doc = "Clock configuration register 3" ]
pub mod cfgr3 { # [ doc = "Reader of register CFGR3" ]
pub type R = crate :: R < u32 , super :: CFGR3 > ; # [ doc = "Writer for register CFGR3" ]
pub type W = crate :: W < u32 , super :: CFGR3 > ; # [ doc = "Register CFGR3 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "USART1 clock source selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum USART1SW_A { # [ doc = "0: PCLK selected as USART clock source" ]
PCLK = 0 , # [ doc = "1: SYSCLK selected as USART clock source" ]
SYSCLK = 1 , # [ doc = "2: LSE selected as USART clock source" ]
LSE = 2 , # [ doc = "3: HSI selected as USART clock source" ]
HSI = 3 } impl From < USART1SW_A > for u8 { # [ inline ( always ) ]
fn from ( variant : USART1SW_A ) -> Self { variant as _ } } # [ doc = "Reader of field `USART1SW`" ]
pub type USART1SW_R = crate :: R < u8 , USART1SW_A > ; impl USART1SW_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> USART1SW_A { match self . bits { 0 => USART1SW_A :: PCLK , 1 => USART1SW_A :: SYSCLK , 2 => USART1SW_A :: LSE , 3 => USART1SW_A :: HSI , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `PCLK`" ]
# [ inline ( always ) ]
pub fn is_pclk ( & self ) -> bool { * self == USART1SW_A :: PCLK } # [ doc = "Checks if the value of the field is `SYSCLK`" ]
# [ inline ( always ) ]
pub fn is_sysclk ( & self ) -> bool { * self == USART1SW_A :: SYSCLK } # [ doc = "Checks if the value of the field is `LSE`" ]
# [ inline ( always ) ]
pub fn is_lse ( & self ) -> bool { * self == USART1SW_A :: LSE } # [ doc = "Checks if the value of the field is `HSI`" ]
# [ inline ( always ) ]
pub fn is_hsi ( & self ) -> bool { * self == USART1SW_A :: HSI } } # [ doc = "Write proxy for field `USART1SW`" ]
pub struct USART1SW_W < 'a > { w : & 'a mut W , } impl < 'a > USART1SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART1SW_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn pclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: PCLK ) } # [ doc = "SYSCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: SYSCLK ) } # [ doc = "LSE selected as USART clock source" ]
# [ inline ( always ) ]
pub fn lse ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: LSE ) } # [ doc = "HSI selected as USART clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: HSI ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } # [ doc = "I2C1 clock source selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C1SW_A { # [ doc = "0: HSI clock selected as I2C clock source" ]
HSI = 0 , # [ doc = "1: SYSCLK clock selected as I2C clock source" ]
SYSCLK = 1 } impl From < I2C1SW_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C1SW_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C1SW`" ]
pub type I2C1SW_R = crate :: R < bool , I2C1SW_A > ; impl I2C1SW_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C1SW_A { match self . bits { false => I2C1SW_A :: HSI , true => I2C1SW_A :: SYSCLK } } # [ doc = "Checks if the value of the field is `HSI`" ]
# [ inline ( always ) ]
pub fn is_hsi ( & self ) -> bool { * self == I2C1SW_A :: HSI } # [ doc = "Checks if the value of the field is `SYSCLK`" ]
# [ inline ( always ) ]
pub fn is_sysclk ( & self ) -> bool { * self == I2C1SW_A :: SYSCLK } } # [ doc = "Write proxy for field `I2C1SW`" ]
pub struct I2C1SW_W < 'a > { w : & 'a mut W , } impl < 'a > I2C1SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C1SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "HSI clock selected as I2C clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( I2C1SW_A :: HSI ) } # [ doc = "SYSCLK clock selected as I2C clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( I2C1SW_A :: SYSCLK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "I2C2 clock source selection" ]
pub type I2C2SW_A = I2C1SW_A ; # [ doc = "Reader of field `I2C2SW`" ]
pub type I2C2SW_R = crate :: R < bool , I2C1SW_A > ; # [ doc = "Write proxy for field `I2C2SW`" ]
pub struct I2C2SW_W < 'a > { w : & 'a mut W , } impl < 'a > I2C2SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C2SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "HSI clock selected as I2C clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( I2C1SW_A :: HSI ) } # [ doc = "SYSCLK clock selected as I2C clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( I2C1SW_A :: SYSCLK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "USART2 clock source selection" ]
pub type USART2SW_A = USART1SW_A ; # [ doc = "Reader of field `USART2SW`" ]
pub type USART2SW_R = crate :: R < u8 , USART1SW_A > ; # [ doc = "Write proxy for field `USART2SW`" ]
pub struct USART2SW_W < 'a > { w : & 'a mut W , } impl < 'a > USART2SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART2SW_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn pclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: PCLK ) } # [ doc = "SYSCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: SYSCLK ) } # [ doc = "LSE selected as USART clock source" ]
# [ inline ( always ) ]
pub fn lse ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: LSE ) } # [ doc = "HSI selected as USART clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: HSI ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "USART3 clock source selection" ]
pub type USART3SW_A = USART1SW_A ; # [ doc = "Reader of field `USART3SW`" ]
pub type USART3SW_R = crate :: R < u8 , USART1SW_A > ; # [ doc = "Write proxy for field `USART3SW`" ]
pub struct USART3SW_W < 'a > { w : & 'a mut W , } impl < 'a > USART3SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USART3SW_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn pclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: PCLK ) } # [ doc = "SYSCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: SYSCLK ) } # [ doc = "LSE selected as USART clock source" ]
# [ inline ( always ) ]
pub fn lse ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: LSE ) } # [ doc = "HSI selected as USART clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: HSI ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Timer1 clock source selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM1SW_A { # [ doc = "0: PCLK2 clock (doubled frequency when prescaled)" ]
PCLK2 = 0 , # [ doc = "1: PLL vco output (running up to 144 MHz)" ]
PLL = 1 } impl From < TIM1SW_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM1SW_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM1SW`" ]
pub type TIM1SW_R = crate :: R < bool , TIM1SW_A > ; impl TIM1SW_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIM1SW_A { match self . bits { false => TIM1SW_A :: PCLK2 , true => TIM1SW_A :: PLL } } # [ doc = "Checks if the value of the field is `PCLK2`" ]
# [ inline ( always ) ]
pub fn is_pclk2 ( & self ) -> bool { * self == TIM1SW_A :: PCLK2 } # [ doc = "Checks if the value of the field is `PLL`" ]
# [ inline ( always ) ]
pub fn is_pll ( & self ) -> bool { * self == TIM1SW_A :: PLL } } # [ doc = "Write proxy for field `TIM1SW`" ]
pub struct TIM1SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM1SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM1SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Timer8 clock source selection" ]
pub type TIM8SW_A = TIM1SW_A ; # [ doc = "Reader of field `TIM8SW`" ]
pub type TIM8SW_R = crate :: R < bool , TIM1SW_A > ; # [ doc = "Write proxy for field `TIM8SW`" ]
pub struct TIM8SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM8SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM8SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "UART4 clock source selection" ]
pub type UART4SW_A = USART1SW_A ; # [ doc = "Reader of field `UART4SW`" ]
pub type UART4SW_R = crate :: R < u8 , USART1SW_A > ; # [ doc = "Write proxy for field `UART4SW`" ]
pub struct UART4SW_W < 'a > { w : & 'a mut W , } impl < 'a > UART4SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UART4SW_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn pclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: PCLK ) } # [ doc = "SYSCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: SYSCLK ) } # [ doc = "LSE selected as USART clock source" ]
# [ inline ( always ) ]
pub fn lse ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: LSE ) } # [ doc = "HSI selected as USART clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: HSI ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "UART5 clock source selection" ]
pub type UART5SW_A = USART1SW_A ; # [ doc = "Reader of field `UART5SW`" ]
pub type UART5SW_R = crate :: R < u8 , USART1SW_A > ; # [ doc = "Write proxy for field `UART5SW`" ]
pub struct UART5SW_W < 'a > { w : & 'a mut W , } impl < 'a > UART5SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UART5SW_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn pclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: PCLK ) } # [ doc = "SYSCLK selected as USART clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: SYSCLK ) } # [ doc = "LSE selected as USART clock source" ]
# [ inline ( always ) ]
pub fn lse ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: LSE ) } # [ doc = "HSI selected as USART clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( USART1SW_A :: HSI ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "I2C3 clock source selection" ]
pub type I2C3SW_A = I2C1SW_A ; # [ doc = "Reader of field `I2C3SW`" ]
pub type I2C3SW_R = crate :: R < bool , I2C1SW_A > ; # [ doc = "Write proxy for field `I2C3SW`" ]
pub struct I2C3SW_W < 'a > { w : & 'a mut W , } impl < 'a > I2C3SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C3SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "HSI clock selected as I2C clock source" ]
# [ inline ( always ) ]
pub fn hsi ( self ) -> & 'a mut W { self . variant ( I2C1SW_A :: HSI ) } # [ doc = "SYSCLK clock selected as I2C clock source" ]
# [ inline ( always ) ]
pub fn sysclk ( self ) -> & 'a mut W { self . variant ( I2C1SW_A :: SYSCLK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Timer20 clock source selection" ]
pub type TIM20SW_A = TIM1SW_A ; # [ doc = "Reader of field `TIM20SW`" ]
pub type TIM20SW_R = crate :: R < bool , TIM1SW_A > ; # [ doc = "Write proxy for field `TIM20SW`" ]
pub struct TIM20SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM20SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM20SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Timer15 clock source selection" ]
pub type TIM15SW_A = TIM1SW_A ; # [ doc = "Reader of field `TIM15SW`" ]
pub type TIM15SW_R = crate :: R < bool , TIM1SW_A > ; # [ doc = "Write proxy for field `TIM15SW`" ]
pub struct TIM15SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM15SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM15SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Timer16 clock source selection" ]
pub type TIM16SW_A = TIM1SW_A ; # [ doc = "Reader of field `TIM16SW`" ]
pub type TIM16SW_R = crate :: R < bool , TIM1SW_A > ; # [ doc = "Write proxy for field `TIM16SW`" ]
pub struct TIM16SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM16SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM16SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Timer17 clock source selection" ]
pub type TIM17SW_A = TIM1SW_A ; # [ doc = "Reader of field `TIM17SW`" ]
pub type TIM17SW_R = crate :: R < bool , TIM1SW_A > ; # [ doc = "Write proxy for field `TIM17SW`" ]
pub struct TIM17SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM17SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM17SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Timer2 clock source selection" ]
pub type TIM2SW_A = TIM1SW_A ; # [ doc = "Reader of field `TIM2SW`" ]
pub type TIM2SW_R = crate :: R < bool , TIM1SW_A > ; # [ doc = "Write proxy for field `TIM2SW`" ]
pub struct TIM2SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM2SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM2SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Timer34 clock source selection" ]
pub type TIM34SW_A = TIM1SW_A ; # [ doc = "Reader of field `TIM34SW`" ]
pub type TIM34SW_R = crate :: R < bool , TIM1SW_A > ; # [ doc = "Write proxy for field `TIM34SW`" ]
pub struct TIM34SW_W < 'a > { w : & 'a mut W , } impl < 'a > TIM34SW_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM34SW_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCLK2 clock (doubled frequency when prescaled)" ]
# [ inline ( always ) ]
pub fn pclk2 ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PCLK2 ) } # [ doc = "PLL vco output (running up to 144 MHz)" ]
# [ inline ( always ) ]
pub fn pll ( self ) -> & 'a mut W { self . variant ( TIM1SW_A :: PLL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } impl R { # [ doc = "Bits 0:1 - USART1 clock source selection" ]
# [ inline ( always ) ]
pub fn usart1sw ( & self ) -> USART1SW_R { USART1SW_R :: new ( ( self . bits & 0x03 ) as u8 ) } # [ doc = "Bit 4 - I2C1 clock source selection" ]
# [ inline ( always ) ]
pub fn i2c1sw ( & self ) -> I2C1SW_R { I2C1SW_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - I2C2 clock source selection" ]
# [ inline ( always ) ]
pub fn i2c2sw ( & self ) -> I2C2SW_R { I2C2SW_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - USART2 clock source selection" ]
# [ inline ( always ) ]
pub fn usart2sw ( & self ) -> USART2SW_R { USART2SW_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - USART3 clock source selection" ]
# [ inline ( always ) ]
pub fn usart3sw ( & self ) -> USART3SW_R { USART3SW_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bit 8 - Timer1 clock source selection" ]
# [ inline ( always ) ]
pub fn tim1sw ( & self ) -> TIM1SW_R { TIM1SW_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Timer8 clock source selection" ]
# [ inline ( always ) ]
pub fn tim8sw ( & self ) -> TIM8SW_R { TIM8SW_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bits 20:21 - UART4 clock source selection" ]
# [ inline ( always ) ]
pub fn uart4sw ( & self ) -> UART4SW_R { UART4SW_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - UART5 clock source selection" ]
# [ inline ( always ) ]
pub fn uart5sw ( & self ) -> UART5SW_R { UART5SW_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - I2C3 clock source selection" ]
# [ inline ( always ) ]
pub fn i2c3sw ( & self ) -> I2C3SW_R { I2C3SW_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Timer20 clock source selection" ]
# [ inline ( always ) ]
pub fn tim20sw ( & self ) -> TIM20SW_R { TIM20SW_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Timer15 clock source selection" ]
# [ inline ( always ) ]
pub fn tim15sw ( & self ) -> TIM15SW_R { TIM15SW_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Timer16 clock source selection" ]
# [ inline ( always ) ]
pub fn tim16sw ( & self ) -> TIM16SW_R { TIM16SW_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Timer17 clock source selection" ]
# [ inline ( always ) ]
pub fn tim17sw ( & self ) -> TIM17SW_R { TIM17SW_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Timer2 clock source selection" ]
# [ inline ( always ) ]
pub fn tim2sw ( & self ) -> TIM2SW_R { TIM2SW_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Timer34 clock source selection" ]
# [ inline ( always ) ]
pub fn tim34sw ( & self ) -> TIM34SW_R { TIM34SW_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:1 - USART1 clock source selection" ]
# [ inline ( always ) ]
pub fn usart1sw ( & mut self ) -> USART1SW_W { USART1SW_W { w : self } } # [ doc = "Bit 4 - I2C1 clock source selection" ]
# [ inline ( always ) ]
pub fn i2c1sw ( & mut self ) -> I2C1SW_W { I2C1SW_W { w : self } } # [ doc = "Bit 5 - I2C2 clock source selection" ]
# [ inline ( always ) ]
pub fn i2c2sw ( & mut self ) -> I2C2SW_W { I2C2SW_W { w : self } } # [ doc = "Bits 16:17 - USART2 clock source selection" ]
# [ inline ( always ) ]
pub fn usart2sw ( & mut self ) -> USART2SW_W { USART2SW_W { w : self } } # [ doc = "Bits 18:19 - USART3 clock source selection" ]
# [ inline ( always ) ]
pub fn usart3sw ( & mut self ) -> USART3SW_W { USART3SW_W { w : self } } # [ doc = "Bit 8 - Timer1 clock source selection" ]
# [ inline ( always ) ]
pub fn tim1sw ( & mut self ) -> TIM1SW_W { TIM1SW_W { w : self } } # [ doc = "Bit 9 - Timer8 clock source selection" ]
# [ inline ( always ) ]
pub fn tim8sw ( & mut self ) -> TIM8SW_W { TIM8SW_W { w : self } } # [ doc = "Bits 20:21 - UART4 clock source selection" ]
# [ inline ( always ) ]
pub fn uart4sw ( & mut self ) -> UART4SW_W { UART4SW_W { w : self } } # [ doc = "Bits 22:23 - UART5 clock source selection" ]
# [ inline ( always ) ]
pub fn uart5sw ( & mut self ) -> UART5SW_W { UART5SW_W { w : self } } # [ doc = "Bit 6 - I2C3 clock source selection" ]
# [ inline ( always ) ]
pub fn i2c3sw ( & mut self ) -> I2C3SW_W { I2C3SW_W { w : self } } # [ doc = "Bit 15 - Timer20 clock source selection" ]
# [ inline ( always ) ]
pub fn tim20sw ( & mut self ) -> TIM20SW_W { TIM20SW_W { w : self } } # [ doc = "Bit 10 - Timer15 clock source selection" ]
# [ inline ( always ) ]
pub fn tim15sw ( & mut self ) -> TIM15SW_W { TIM15SW_W { w : self } } # [ doc = "Bit 11 - Timer16 clock source selection" ]
# [ inline ( always ) ]
pub fn tim16sw ( & mut self ) -> TIM16SW_W { TIM16SW_W { w : self } } # [ doc = "Bit 13 - Timer17 clock source selection" ]
# [ inline ( always ) ]
pub fn tim17sw ( & mut self ) -> TIM17SW_W { TIM17SW_W { w : self } } # [ doc = "Bit 24 - Timer2 clock source selection" ]
# [ inline ( always ) ]
pub fn tim2sw ( & mut self ) -> TIM2SW_W { TIM2SW_W { w : self } } # [ doc = "Bit 25 - Timer34 clock source selection" ]
# [ inline ( always ) ]
pub fn tim34sw ( & mut self ) -> TIM34SW_W { TIM34SW_W { w : self } } } } } # [ doc = "DMA controller 1" ]
pub struct DMA1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for DMA1 { } impl DMA1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const dma1 :: RegisterBlock { 0x4002_0000 as * const _ } } impl Deref for DMA1 { type Target = dma1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * DMA1 :: ptr ( ) } } } # [ doc = "DMA controller 1" ]
pub mod dma1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - DMA interrupt status register (DMA_ISR)" ]
pub isr : ISR , # [ doc = "0x04 - DMA interrupt flag clear register (DMA_IFCR)" ]
pub ifcr : IFCR , # [ doc = "0x08 - Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub ch1 : CH , _reserved3 : [ u8 ; 4usize ]
, # [ doc = "0x1c - Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub ch2 : CH , _reserved4 : [ u8 ; 4usize ]
, # [ doc = "0x30 - Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub ch3 : CH , _reserved5 : [ u8 ; 4usize ]
, # [ doc = "0x44 - Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub ch4 : CH , _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x58 - Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub ch5 : CH , _reserved7 : [ u8 ; 4usize ]
, # [ doc = "0x6c - Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub ch6 : CH , _reserved8 : [ u8 ; 4usize ]
, # [ doc = "0x80 - Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub ch7 : CH , } # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct CH { # [ doc = "0x00 - DMA channel configuration register (DMA_CCR)" ]
pub cr : self :: ch :: CR , # [ doc = "0x04 - DMA channel 1 number of data register" ]
pub ndtr : self :: ch :: NDTR , # [ doc = "0x08 - DMA channel 1 peripheral address register" ]
pub par : self :: ch :: PAR , # [ doc = "0x0c - DMA channel 1 memory address register" ]
pub mar : self :: ch :: MAR , } # [ doc = r"Register block" ]
# [ doc = "Channel cluster: CCR?, CNDTR?, CPAR?, and CMAR? registers" ]
pub mod ch { # [ doc = "DMA channel configuration register (DMA_CCR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "DMA channel configuration register (DMA_CCR)" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Channel enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EN_A { # [ doc = "0: Channel disabled" ]
DISABLED = 0 , # [ doc = "1: Channel enabled" ]
ENABLED = 1 } impl From < EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EN`" ]
pub type EN_R = crate :: R < bool , EN_A > ; impl EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EN_A { match self . bits { false => EN_A :: DISABLED , true => EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EN_A :: ENABLED } } # [ doc = "Write proxy for field `EN`" ]
pub struct EN_W < 'a > { w : & 'a mut W , } impl < 'a > EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Channel disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EN_A :: DISABLED ) } # [ doc = "Channel enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Transfer complete interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TCIE_A { # [ doc = "0: Transfer Complete interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Transfer Complete interrupt enabled" ]
ENABLED = 1 } impl From < TCIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TCIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TCIE`" ]
pub type TCIE_R = crate :: R < bool , TCIE_A > ; impl TCIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TCIE_A { match self . bits { false => TCIE_A :: DISABLED , true => TCIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TCIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TCIE_A :: ENABLED } } # [ doc = "Write proxy for field `TCIE`" ]
pub struct TCIE_W < 'a > { w : & 'a mut W , } impl < 'a > TCIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TCIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Transfer Complete interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TCIE_A :: DISABLED ) } # [ doc = "Transfer Complete interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TCIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Half Transfer interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HTIE_A { # [ doc = "0: Half Transfer interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Half Transfer interrupt enabled" ]
ENABLED = 1 } impl From < HTIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : HTIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HTIE`" ]
pub type HTIE_R = crate :: R < bool , HTIE_A > ; impl HTIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HTIE_A { match self . bits { false => HTIE_A :: DISABLED , true => HTIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == HTIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == HTIE_A :: ENABLED } } # [ doc = "Write proxy for field `HTIE`" ]
pub struct HTIE_W < 'a > { w : & 'a mut W , } impl < 'a > HTIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HTIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Half Transfer interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( HTIE_A :: DISABLED ) } # [ doc = "Half Transfer interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( HTIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Transfer error interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TEIE_A { # [ doc = "0: Transfer Error interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Transfer Error interrupt enabled" ]
ENABLED = 1 } impl From < TEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TEIE`" ]
pub type TEIE_R = crate :: R < bool , TEIE_A > ; impl TEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TEIE_A { match self . bits { false => TEIE_A :: DISABLED , true => TEIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TEIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TEIE_A :: ENABLED } } # [ doc = "Write proxy for field `TEIE`" ]
pub struct TEIE_W < 'a > { w : & 'a mut W , } impl < 'a > TEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Transfer Error interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TEIE_A :: DISABLED ) } # [ doc = "Transfer Error interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TEIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Data transfer direction\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIR_A { # [ doc = "0: Read from peripheral" ]
FROMPERIPHERAL = 0 , # [ doc = "1: Read from memory" ]
FROMMEMORY = 1 } impl From < DIR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIR`" ]
pub type DIR_R = crate :: R < bool , DIR_A > ; impl DIR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIR_A { match self . bits { false => DIR_A :: FROMPERIPHERAL , true => DIR_A :: FROMMEMORY } } # [ doc = "Checks if the value of the field is `FROMPERIPHERAL`" ]
# [ inline ( always ) ]
pub fn is_from_peripheral ( & self ) -> bool { * self == DIR_A :: FROMPERIPHERAL } # [ doc = "Checks if the value of the field is `FROMMEMORY`" ]
# [ inline ( always ) ]
pub fn is_from_memory ( & self ) -> bool { * self == DIR_A :: FROMMEMORY } } # [ doc = "Write proxy for field `DIR`" ]
pub struct DIR_W < 'a > { w : & 'a mut W , } impl < 'a > DIR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Read from peripheral" ]
# [ inline ( always ) ]
pub fn from_peripheral ( self ) -> & 'a mut W { self . variant ( DIR_A :: FROMPERIPHERAL ) } # [ doc = "Read from memory" ]
# [ inline ( always ) ]
pub fn from_memory ( self ) -> & 'a mut W { self . variant ( DIR_A :: FROMMEMORY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Circular mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CIRC_A { # [ doc = "0: Circular buffer disabled" ]
DISABLED = 0 , # [ doc = "1: Circular buffer enabled" ]
ENABLED = 1 } impl From < CIRC_A > for bool { # [ inline ( always ) ]
fn from ( variant : CIRC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CIRC`" ]
pub type CIRC_R = crate :: R < bool , CIRC_A > ; impl CIRC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CIRC_A { match self . bits { false => CIRC_A :: DISABLED , true => CIRC_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CIRC_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CIRC_A :: ENABLED } } # [ doc = "Write proxy for field `CIRC`" ]
pub struct CIRC_W < 'a > { w : & 'a mut W , } impl < 'a > CIRC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CIRC_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Circular buffer disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CIRC_A :: DISABLED ) } # [ doc = "Circular buffer enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CIRC_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Peripheral increment mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PINC_A { # [ doc = "0: Increment mode disabled" ]
DISABLED = 0 , # [ doc = "1: Increment mode enabled" ]
ENABLED = 1 } impl From < PINC_A > for bool { # [ inline ( always ) ]
fn from ( variant : PINC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PINC`" ]
pub type PINC_R = crate :: R < bool , PINC_A > ; impl PINC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PINC_A { match self . bits { false => PINC_A :: DISABLED , true => PINC_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PINC_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PINC_A :: ENABLED } } # [ doc = "Write proxy for field `PINC`" ]
pub struct PINC_W < 'a > { w : & 'a mut W , } impl < 'a > PINC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PINC_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Increment mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PINC_A :: DISABLED ) } # [ doc = "Increment mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PINC_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Memory increment mode" ]
pub type MINC_A = PINC_A ; # [ doc = "Reader of field `MINC`" ]
pub type MINC_R = crate :: R < bool , PINC_A > ; # [ doc = "Write proxy for field `MINC`" ]
pub struct MINC_W < 'a > { w : & 'a mut W , } impl < 'a > MINC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MINC_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Increment mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PINC_A :: DISABLED ) } # [ doc = "Increment mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PINC_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Peripheral size\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PSIZE_A { # [ doc = "0: 8-bit size" ]
BITS8 = 0 , # [ doc = "1: 16-bit size" ]
BITS16 = 1 , # [ doc = "2: 32-bit size" ]
BITS32 = 2 } impl From < PSIZE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PSIZE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PSIZE`" ]
pub type PSIZE_R = crate :: R < u8 , PSIZE_A > ; impl PSIZE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , PSIZE_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( PSIZE_A :: BITS8 ) , 1 => Val ( PSIZE_A :: BITS16 ) , 2 => Val ( PSIZE_A :: BITS32 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `BITS8`" ]
# [ inline ( always ) ]
pub fn is_bits8 ( & self ) -> bool { * self == PSIZE_A :: BITS8 } # [ doc = "Checks if the value of the field is `BITS16`" ]
# [ inline ( always ) ]
pub fn is_bits16 ( & self ) -> bool { * self == PSIZE_A :: BITS16 } # [ doc = "Checks if the value of the field is `BITS32`" ]
# [ inline ( always ) ]
pub fn is_bits32 ( & self ) -> bool { * self == PSIZE_A :: BITS32 } } # [ doc = "Write proxy for field `PSIZE`" ]
pub struct PSIZE_W < 'a > { w : & 'a mut W , } impl < 'a > PSIZE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PSIZE_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "8-bit size" ]
# [ inline ( always ) ]
pub fn bits8 ( self ) -> & 'a mut W { self . variant ( PSIZE_A :: BITS8 ) } # [ doc = "16-bit size" ]
# [ inline ( always ) ]
pub fn bits16 ( self ) -> & 'a mut W { self . variant ( PSIZE_A :: BITS16 ) } # [ doc = "32-bit size" ]
# [ inline ( always ) ]
pub fn bits32 ( self ) -> & 'a mut W { self . variant ( PSIZE_A :: BITS32 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Memory size" ]
pub type MSIZE_A = PSIZE_A ; # [ doc = "Reader of field `MSIZE`" ]
pub type MSIZE_R = crate :: R < u8 , PSIZE_A > ; # [ doc = "Write proxy for field `MSIZE`" ]
pub struct MSIZE_W < 'a > { w : & 'a mut W , } impl < 'a > MSIZE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSIZE_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "8-bit size" ]
# [ inline ( always ) ]
pub fn bits8 ( self ) -> & 'a mut W { self . variant ( PSIZE_A :: BITS8 ) } # [ doc = "16-bit size" ]
# [ inline ( always ) ]
pub fn bits16 ( self ) -> & 'a mut W { self . variant ( PSIZE_A :: BITS16 ) } # [ doc = "32-bit size" ]
# [ inline ( always ) ]
pub fn bits32 ( self ) -> & 'a mut W { self . variant ( PSIZE_A :: BITS32 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Channel Priority level\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PL_A { # [ doc = "0: Low priority" ]
LOW = 0 , # [ doc = "1: Medium priority" ]
MEDIUM = 1 , # [ doc = "2: High priority" ]
HIGH = 2 , # [ doc = "3: Very high priority" ]
VERYHIGH = 3 } impl From < PL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PL`" ]
pub type PL_R = crate :: R < u8 , PL_A > ; impl PL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PL_A { match self . bits { 0 => PL_A :: LOW , 1 => PL_A :: MEDIUM , 2 => PL_A :: HIGH , 3 => PL_A :: VERYHIGH , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == PL_A :: LOW } # [ doc = "Checks if the value of the field is `MEDIUM`" ]
# [ inline ( always ) ]
pub fn is_medium ( & self ) -> bool { * self == PL_A :: MEDIUM } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == PL_A :: HIGH } # [ doc = "Checks if the value of the field is `VERYHIGH`" ]
# [ inline ( always ) ]
pub fn is_very_high ( & self ) -> bool { * self == PL_A :: VERYHIGH } } # [ doc = "Write proxy for field `PL`" ]
pub struct PL_W < 'a > { w : & 'a mut W , } impl < 'a > PL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PL_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low priority" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( PL_A :: LOW ) } # [ doc = "Medium priority" ]
# [ inline ( always ) ]
pub fn medium ( self ) -> & 'a mut W { self . variant ( PL_A :: MEDIUM ) } # [ doc = "High priority" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( PL_A :: HIGH ) } # [ doc = "Very high priority" ]
# [ inline ( always ) ]
pub fn very_high ( self ) -> & 'a mut W { self . variant ( PL_A :: VERYHIGH ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Memory to memory mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MEM2MEM_A { # [ doc = "0: Memory to memory mode disabled" ]
DISABLED = 0 , # [ doc = "1: Memory to memory mode enabled" ]
ENABLED = 1 } impl From < MEM2MEM_A > for bool { # [ inline ( always ) ]
fn from ( variant : MEM2MEM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MEM2MEM`" ]
pub type MEM2MEM_R = crate :: R < bool , MEM2MEM_A > ; impl MEM2MEM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MEM2MEM_A { match self . bits { false => MEM2MEM_A :: DISABLED , true => MEM2MEM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == MEM2MEM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == MEM2MEM_A :: ENABLED } } # [ doc = "Write proxy for field `MEM2MEM`" ]
pub struct MEM2MEM_W < 'a > { w : & 'a mut W , } impl < 'a > MEM2MEM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MEM2MEM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Memory to memory mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( MEM2MEM_A :: DISABLED ) } # [ doc = "Memory to memory mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( MEM2MEM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } impl R { # [ doc = "Bit 0 - Channel enable" ]
# [ inline ( always ) ]
pub fn en ( & self ) -> EN_R { EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Transfer complete interrupt enable" ]
# [ inline ( always ) ]
pub fn tcie ( & self ) -> TCIE_R { TCIE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Half Transfer interrupt enable" ]
# [ inline ( always ) ]
pub fn htie ( & self ) -> HTIE_R { HTIE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Transfer error interrupt enable" ]
# [ inline ( always ) ]
pub fn teie ( & self ) -> TEIE_R { TEIE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Data transfer direction" ]
# [ inline ( always ) ]
pub fn dir ( & self ) -> DIR_R { DIR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Circular mode" ]
# [ inline ( always ) ]
pub fn circ ( & self ) -> CIRC_R { CIRC_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Peripheral increment mode" ]
# [ inline ( always ) ]
pub fn pinc ( & self ) -> PINC_R { PINC_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Memory increment mode" ]
# [ inline ( always ) ]
pub fn minc ( & self ) -> MINC_R { MINC_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Peripheral size" ]
# [ inline ( always ) ]
pub fn psize ( & self ) -> PSIZE_R { PSIZE_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Memory size" ]
# [ inline ( always ) ]
pub fn msize ( & self ) -> MSIZE_R { MSIZE_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Channel Priority level" ]
# [ inline ( always ) ]
pub fn pl ( & self ) -> PL_R { PL_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Memory to memory mode" ]
# [ inline ( always ) ]
pub fn mem2mem ( & self ) -> MEM2MEM_R { MEM2MEM_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Channel enable" ]
# [ inline ( always ) ]
pub fn en ( & mut self ) -> EN_W { EN_W { w : self } } # [ doc = "Bit 1 - Transfer complete interrupt enable" ]
# [ inline ( always ) ]
pub fn tcie ( & mut self ) -> TCIE_W { TCIE_W { w : self } } # [ doc = "Bit 2 - Half Transfer interrupt enable" ]
# [ inline ( always ) ]
pub fn htie ( & mut self ) -> HTIE_W { HTIE_W { w : self } } # [ doc = "Bit 3 - Transfer error interrupt enable" ]
# [ inline ( always ) ]
pub fn teie ( & mut self ) -> TEIE_W { TEIE_W { w : self } } # [ doc = "Bit 4 - Data transfer direction" ]
# [ inline ( always ) ]
pub fn dir ( & mut self ) -> DIR_W { DIR_W { w : self } } # [ doc = "Bit 5 - Circular mode" ]
# [ inline ( always ) ]
pub fn circ ( & mut self ) -> CIRC_W { CIRC_W { w : self } } # [ doc = "Bit 6 - Peripheral increment mode" ]
# [ inline ( always ) ]
pub fn pinc ( & mut self ) -> PINC_W { PINC_W { w : self } } # [ doc = "Bit 7 - Memory increment mode" ]
# [ inline ( always ) ]
pub fn minc ( & mut self ) -> MINC_W { MINC_W { w : self } } # [ doc = "Bits 8:9 - Peripheral size" ]
# [ inline ( always ) ]
pub fn psize ( & mut self ) -> PSIZE_W { PSIZE_W { w : self } } # [ doc = "Bits 10:11 - Memory size" ]
# [ inline ( always ) ]
pub fn msize ( & mut self ) -> MSIZE_W { MSIZE_W { w : self } } # [ doc = "Bits 12:13 - Channel Priority level" ]
# [ inline ( always ) ]
pub fn pl ( & mut self ) -> PL_W { PL_W { w : self } } # [ doc = "Bit 14 - Memory to memory mode" ]
# [ inline ( always ) ]
pub fn mem2mem ( & mut self ) -> MEM2MEM_W { MEM2MEM_W { w : self } } } } # [ doc = "DMA channel 1 number of data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ndtr](ndtr) module" ]
pub type NDTR = crate :: Reg < u32 , _NDTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _NDTR ; # [ doc = "`read()` method returns [ndtr::R](ndtr::R) reader structure" ]
impl crate :: Readable for NDTR { } # [ doc = "`write(|w| ..)` method takes [ndtr::W](ndtr::W) writer structure" ]
impl crate :: Writable for NDTR { } # [ doc = "DMA channel 1 number of data register" ]
pub mod ndtr { # [ doc = "Reader of register NDTR" ]
pub type R = crate :: R < u32 , super :: NDTR > ; # [ doc = "Writer for register NDTR" ]
pub type W = crate :: W < u32 , super :: NDTR > ; # [ doc = "Register NDTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: NDTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `NDT`" ]
pub type NDT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `NDT`" ]
pub struct NDT_W < 'a > { w : & 'a mut W , } impl < 'a > NDT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Number of data to transfer" ]
# [ inline ( always ) ]
pub fn ndt ( & self ) -> NDT_R { NDT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Number of data to transfer" ]
# [ inline ( always ) ]
pub fn ndt ( & mut self ) -> NDT_W { NDT_W { w : self } } } } # [ doc = "DMA channel 1 peripheral address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [par](par) module" ]
pub type PAR = crate :: Reg < u32 , _PAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PAR ; # [ doc = "`read()` method returns [par::R](par::R) reader structure" ]
impl crate :: Readable for PAR { } # [ doc = "`write(|w| ..)` method takes [par::W](par::W) writer structure" ]
impl crate :: Writable for PAR { } # [ doc = "DMA channel 1 peripheral address register" ]
pub mod par { # [ doc = "Reader of register PAR" ]
pub type R = crate :: R < u32 , super :: PAR > ; # [ doc = "Writer for register PAR" ]
pub type W = crate :: W < u32 , super :: PAR > ; # [ doc = "Register PAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PA`" ]
pub type PA_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `PA`" ]
pub struct PA_W < 'a > { w : & 'a mut W , } impl < 'a > PA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Peripheral address" ]
# [ inline ( always ) ]
pub fn pa ( & self ) -> PA_R { PA_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Peripheral address" ]
# [ inline ( always ) ]
pub fn pa ( & mut self ) -> PA_W { PA_W { w : self } } } } # [ doc = "DMA channel 1 memory address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mar](mar) module" ]
pub type MAR = crate :: Reg < u32 , _MAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _MAR ; # [ doc = "`read()` method returns [mar::R](mar::R) reader structure" ]
impl crate :: Readable for MAR { } # [ doc = "`write(|w| ..)` method takes [mar::W](mar::W) writer structure" ]
impl crate :: Writable for MAR { } # [ doc = "DMA channel 1 memory address register" ]
pub mod mar { # [ doc = "Reader of register MAR" ]
pub type R = crate :: R < u32 , super :: MAR > ; # [ doc = "Writer for register MAR" ]
pub type W = crate :: W < u32 , super :: MAR > ; # [ doc = "Register MAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: MAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MA`" ]
pub type MA_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `MA`" ]
pub struct MA_W < 'a > { w : & 'a mut W , } impl < 'a > MA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Memory address" ]
# [ inline ( always ) ]
pub fn ma ( & self ) -> MA_R { MA_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Memory address" ]
# [ inline ( always ) ]
pub fn ma ( & mut self ) -> MA_W { MA_W { w : self } } } } } # [ doc = "DMA interrupt status register (DMA_ISR)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module" ]
pub type ISR = crate :: Reg < u32 , _ISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISR ; # [ doc = "`read()` method returns [isr::R](isr::R) reader structure" ]
impl crate :: Readable for ISR { } # [ doc = "DMA interrupt status register (DMA_ISR)" ]
pub mod isr { # [ doc = "Reader of register ISR" ]
pub type R = crate :: R < u32 , super :: ISR > ; # [ doc = "Channel 1 Global interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum GIF1_A { # [ doc = "0: No transfer error, half event, complete event" ]
NOEVENT = 0 , # [ doc = "1: A transfer error, half event or complete event has occured" ]
EVENT = 1 } impl From < GIF1_A > for bool { # [ inline ( always ) ]
fn from ( variant : GIF1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `GIF1`" ]
pub type GIF1_R = crate :: R < bool , GIF1_A > ; impl GIF1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> GIF1_A { match self . bits { false => GIF1_A :: NOEVENT , true => GIF1_A :: EVENT } } # [ doc = "Checks if the value of the field is `NOEVENT`" ]
# [ inline ( always ) ]
pub fn is_no_event ( & self ) -> bool { * self == GIF1_A :: NOEVENT } # [ doc = "Checks if the value of the field is `EVENT`" ]
# [ inline ( always ) ]
pub fn is_event ( & self ) -> bool { * self == GIF1_A :: EVENT } } # [ doc = "Channel 1 Transfer Complete flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TCIF1_A { # [ doc = "0: No transfer complete event" ]
NOTCOMPLETE = 0 , # [ doc = "1: A transfer complete event has occured" ]
COMPLETE = 1 } impl From < TCIF1_A > for bool { # [ inline ( always ) ]
fn from ( variant : TCIF1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TCIF1`" ]
pub type TCIF1_R = crate :: R < bool , TCIF1_A > ; impl TCIF1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TCIF1_A { match self . bits { false => TCIF1_A :: NOTCOMPLETE , true => TCIF1_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == TCIF1_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == TCIF1_A :: COMPLETE } } # [ doc = "Channel 1 Half Transfer Complete flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HTIF1_A { # [ doc = "0: No half transfer event" ]
NOTHALF = 0 , # [ doc = "1: A half transfer event has occured" ]
HALF = 1 } impl From < HTIF1_A > for bool { # [ inline ( always ) ]
fn from ( variant : HTIF1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HTIF1`" ]
pub type HTIF1_R = crate :: R < bool , HTIF1_A > ; impl HTIF1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HTIF1_A { match self . bits { false => HTIF1_A :: NOTHALF , true => HTIF1_A :: HALF } } # [ doc = "Checks if the value of the field is `NOTHALF`" ]
# [ inline ( always ) ]
pub fn is_not_half ( & self ) -> bool { * self == HTIF1_A :: NOTHALF } # [ doc = "Checks if the value of the field is `HALF`" ]
# [ inline ( always ) ]
pub fn is_half ( & self ) -> bool { * self == HTIF1_A :: HALF } } # [ doc = "Channel 1 Transfer Error flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TEIF1_A { # [ doc = "0: No transfer error" ]
NOERROR = 0 , # [ doc = "1: A transfer error has occured" ]
ERROR = 1 } impl From < TEIF1_A > for bool { # [ inline ( always ) ]
fn from ( variant : TEIF1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TEIF1`" ]
pub type TEIF1_R = crate :: R < bool , TEIF1_A > ; impl TEIF1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TEIF1_A { match self . bits { false => TEIF1_A :: NOERROR , true => TEIF1_A :: ERROR } } # [ doc = "Checks if the value of the field is `NOERROR`" ]
# [ inline ( always ) ]
pub fn is_no_error ( & self ) -> bool { * self == TEIF1_A :: NOERROR } # [ doc = "Checks if the value of the field is `ERROR`" ]
# [ inline ( always ) ]
pub fn is_error ( & self ) -> bool { * self == TEIF1_A :: ERROR } } # [ doc = "Channel 2 Global interrupt flag" ]
pub type GIF2_A = GIF1_A ; # [ doc = "Reader of field `GIF2`" ]
pub type GIF2_R = crate :: R < bool , GIF1_A > ; # [ doc = "Channel 2 Transfer Complete flag" ]
pub type TCIF2_A = TCIF1_A ; # [ doc = "Reader of field `TCIF2`" ]
pub type TCIF2_R = crate :: R < bool , TCIF1_A > ; # [ doc = "Channel 2 Half Transfer Complete flag" ]
pub type HTIF2_A = HTIF1_A ; # [ doc = "Reader of field `HTIF2`" ]
pub type HTIF2_R = crate :: R < bool , HTIF1_A > ; # [ doc = "Channel 2 Transfer Error flag" ]
pub type TEIF2_A = TEIF1_A ; # [ doc = "Reader of field `TEIF2`" ]
pub type TEIF2_R = crate :: R < bool , TEIF1_A > ; # [ doc = "Channel 3 Global interrupt flag" ]
pub type GIF3_A = GIF1_A ; # [ doc = "Reader of field `GIF3`" ]
pub type GIF3_R = crate :: R < bool , GIF1_A > ; # [ doc = "Channel 3 Transfer Complete flag" ]
pub type TCIF3_A = TCIF1_A ; # [ doc = "Reader of field `TCIF3`" ]
pub type TCIF3_R = crate :: R < bool , TCIF1_A > ; # [ doc = "Channel 3 Half Transfer Complete flag" ]
pub type HTIF3_A = HTIF1_A ; # [ doc = "Reader of field `HTIF3`" ]
pub type HTIF3_R = crate :: R < bool , HTIF1_A > ; # [ doc = "Channel 3 Transfer Error flag" ]
pub type TEIF3_A = TEIF1_A ; # [ doc = "Reader of field `TEIF3`" ]
pub type TEIF3_R = crate :: R < bool , TEIF1_A > ; # [ doc = "Channel 4 Global interrupt flag" ]
pub type GIF4_A = GIF1_A ; # [ doc = "Reader of field `GIF4`" ]
pub type GIF4_R = crate :: R < bool , GIF1_A > ; # [ doc = "Channel 4 Transfer Complete flag" ]
pub type TCIF4_A = TCIF1_A ; # [ doc = "Reader of field `TCIF4`" ]
pub type TCIF4_R = crate :: R < bool , TCIF1_A > ; # [ doc = "Channel 4 Half Transfer Complete flag" ]
pub type HTIF4_A = HTIF1_A ; # [ doc = "Reader of field `HTIF4`" ]
pub type HTIF4_R = crate :: R < bool , HTIF1_A > ; # [ doc = "Channel 4 Transfer Error flag" ]
pub type TEIF4_A = TEIF1_A ; # [ doc = "Reader of field `TEIF4`" ]
pub type TEIF4_R = crate :: R < bool , TEIF1_A > ; # [ doc = "Channel 5 Global interrupt flag" ]
pub type GIF5_A = GIF1_A ; # [ doc = "Reader of field `GIF5`" ]
pub type GIF5_R = crate :: R < bool , GIF1_A > ; # [ doc = "Channel 5 Transfer Complete flag" ]
pub type TCIF5_A = TCIF1_A ; # [ doc = "Reader of field `TCIF5`" ]
pub type TCIF5_R = crate :: R < bool , TCIF1_A > ; # [ doc = "Channel 5 Half Transfer Complete flag" ]
pub type HTIF5_A = HTIF1_A ; # [ doc = "Reader of field `HTIF5`" ]
pub type HTIF5_R = crate :: R < bool , HTIF1_A > ; # [ doc = "Channel 5 Transfer Error flag" ]
pub type TEIF5_A = TEIF1_A ; # [ doc = "Reader of field `TEIF5`" ]
pub type TEIF5_R = crate :: R < bool , TEIF1_A > ; # [ doc = "Channel 6 Global interrupt flag" ]
pub type GIF6_A = GIF1_A ; # [ doc = "Reader of field `GIF6`" ]
pub type GIF6_R = crate :: R < bool , GIF1_A > ; # [ doc = "Channel 6 Transfer Complete flag" ]
pub type TCIF6_A = TCIF1_A ; # [ doc = "Reader of field `TCIF6`" ]
pub type TCIF6_R = crate :: R < bool , TCIF1_A > ; # [ doc = "Channel 6 Half Transfer Complete flag" ]
pub type HTIF6_A = HTIF1_A ; # [ doc = "Reader of field `HTIF6`" ]
pub type HTIF6_R = crate :: R < bool , HTIF1_A > ; # [ doc = "Channel 6 Transfer Error flag" ]
pub type TEIF6_A = TEIF1_A ; # [ doc = "Reader of field `TEIF6`" ]
pub type TEIF6_R = crate :: R < bool , TEIF1_A > ; # [ doc = "Channel 7 Global interrupt flag" ]
pub type GIF7_A = GIF1_A ; # [ doc = "Reader of field `GIF7`" ]
pub type GIF7_R = crate :: R < bool , GIF1_A > ; # [ doc = "Channel 7 Transfer Complete flag" ]
pub type TCIF7_A = TCIF1_A ; # [ doc = "Reader of field `TCIF7`" ]
pub type TCIF7_R = crate :: R < bool , TCIF1_A > ; # [ doc = "Channel 7 Half Transfer Complete flag" ]
pub type HTIF7_A = HTIF1_A ; # [ doc = "Reader of field `HTIF7`" ]
pub type HTIF7_R = crate :: R < bool , HTIF1_A > ; # [ doc = "Channel 7 Transfer Error flag" ]
pub type TEIF7_A = TEIF1_A ; # [ doc = "Reader of field `TEIF7`" ]
pub type TEIF7_R = crate :: R < bool , TEIF1_A > ; impl R { # [ doc = "Bit 0 - Channel 1 Global interrupt flag" ]
# [ inline ( always ) ]
pub fn gif1 ( & self ) -> GIF1_R { GIF1_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Channel 1 Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn tcif1 ( & self ) -> TCIF1_R { TCIF1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Channel 1 Half Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn htif1 ( & self ) -> HTIF1_R { HTIF1_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Channel 1 Transfer Error flag" ]
# [ inline ( always ) ]
pub fn teif1 ( & self ) -> TEIF1_R { TEIF1_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Channel 2 Global interrupt flag" ]
# [ inline ( always ) ]
pub fn gif2 ( & self ) -> GIF2_R { GIF2_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Channel 2 Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn tcif2 ( & self ) -> TCIF2_R { TCIF2_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Channel 2 Half Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn htif2 ( & self ) -> HTIF2_R { HTIF2_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Channel 2 Transfer Error flag" ]
# [ inline ( always ) ]
pub fn teif2 ( & self ) -> TEIF2_R { TEIF2_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Channel 3 Global interrupt flag" ]
# [ inline ( always ) ]
pub fn gif3 ( & self ) -> GIF3_R { GIF3_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Channel 3 Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn tcif3 ( & self ) -> TCIF3_R { TCIF3_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Channel 3 Half Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn htif3 ( & self ) -> HTIF3_R { HTIF3_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Channel 3 Transfer Error flag" ]
# [ inline ( always ) ]
pub fn teif3 ( & self ) -> TEIF3_R { TEIF3_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Channel 4 Global interrupt flag" ]
# [ inline ( always ) ]
pub fn gif4 ( & self ) -> GIF4_R { GIF4_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Channel 4 Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn tcif4 ( & self ) -> TCIF4_R { TCIF4_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Channel 4 Half Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn htif4 ( & self ) -> HTIF4_R { HTIF4_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Channel 4 Transfer Error flag" ]
# [ inline ( always ) ]
pub fn teif4 ( & self ) -> TEIF4_R { TEIF4_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Channel 5 Global interrupt flag" ]
# [ inline ( always ) ]
pub fn gif5 ( & self ) -> GIF5_R { GIF5_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Channel 5 Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn tcif5 ( & self ) -> TCIF5_R { TCIF5_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Channel 5 Half Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn htif5 ( & self ) -> HTIF5_R { HTIF5_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Channel 5 Transfer Error flag" ]
# [ inline ( always ) ]
pub fn teif5 ( & self ) -> TEIF5_R { TEIF5_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Channel 6 Global interrupt flag" ]
# [ inline ( always ) ]
pub fn gif6 ( & self ) -> GIF6_R { GIF6_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Channel 6 Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn tcif6 ( & self ) -> TCIF6_R { TCIF6_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Channel 6 Half Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn htif6 ( & self ) -> HTIF6_R { HTIF6_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Channel 6 Transfer Error flag" ]
# [ inline ( always ) ]
pub fn teif6 ( & self ) -> TEIF6_R { TEIF6_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Channel 7 Global interrupt flag" ]
# [ inline ( always ) ]
pub fn gif7 ( & self ) -> GIF7_R { GIF7_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Channel 7 Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn tcif7 ( & self ) -> TCIF7_R { TCIF7_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Channel 7 Half Transfer Complete flag" ]
# [ inline ( always ) ]
pub fn htif7 ( & self ) -> HTIF7_R { HTIF7_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Channel 7 Transfer Error flag" ]
# [ inline ( always ) ]
pub fn teif7 ( & self ) -> TEIF7_R { TEIF7_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } } } # [ doc = "DMA interrupt flag clear register (DMA_IFCR)\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifcr](ifcr) module" ]
pub type IFCR = crate :: Reg < u32 , _IFCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IFCR ; # [ doc = "`write(|w| ..)` method takes [ifcr::W](ifcr::W) writer structure" ]
impl crate :: Writable for IFCR { } # [ doc = "DMA interrupt flag clear register (DMA_IFCR)" ]
pub mod ifcr { # [ doc = "Writer for register IFCR" ]
pub type W = crate :: W < u32 , super :: IFCR > ; # [ doc = "Register IFCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IFCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Channel 1 Global interrupt clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CGIF1_AW { # [ doc = "1: Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
CLEAR = 1 } impl From < CGIF1_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CGIF1_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CGIF1`" ]
pub struct CGIF1_W < 'a > { w : & 'a mut W , } impl < 'a > CGIF1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CGIF1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CGIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Channel 1 Transfer Complete clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CTCIF1_AW { # [ doc = "1: Clears the TCIF flag in the ISR register" ]
CLEAR = 1 } impl From < CTCIF1_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CTCIF1_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CTCIF1`" ]
pub struct CTCIF1_W < 'a > { w : & 'a mut W , } impl < 'a > CTCIF1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTCIF1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TCIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTCIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Channel 1 Half Transfer clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CHTIF1_AW { # [ doc = "1: Clears the HTIF flag in the ISR register" ]
CLEAR = 1 } impl From < CHTIF1_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CHTIF1_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CHTIF1`" ]
pub struct CHTIF1_W < 'a > { w : & 'a mut W , } impl < 'a > CHTIF1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHTIF1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the HTIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CHTIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Channel 1 Transfer Error clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CTEIF1_AW { # [ doc = "1: Clears the TEIF flag in the ISR register" ]
CLEAR = 1 } impl From < CTEIF1_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CTEIF1_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CTEIF1`" ]
pub struct CTEIF1_W < 'a > { w : & 'a mut W , } impl < 'a > CTEIF1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTEIF1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TEIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTEIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Channel 2 Global interrupt clear" ]
pub type CGIF2_AW = CGIF1_AW ; # [ doc = "Write proxy for field `CGIF2`" ]
pub struct CGIF2_W < 'a > { w : & 'a mut W , } impl < 'a > CGIF2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CGIF2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CGIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Channel 2 Transfer Complete clear" ]
pub type CTCIF2_AW = CTCIF1_AW ; # [ doc = "Write proxy for field `CTCIF2`" ]
pub struct CTCIF2_W < 'a > { w : & 'a mut W , } impl < 'a > CTCIF2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTCIF2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TCIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTCIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Channel 2 Half Transfer clear" ]
pub type CHTIF2_AW = CHTIF1_AW ; # [ doc = "Write proxy for field `CHTIF2`" ]
pub struct CHTIF2_W < 'a > { w : & 'a mut W , } impl < 'a > CHTIF2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHTIF2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the HTIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CHTIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Channel 2 Transfer Error clear" ]
pub type CTEIF2_AW = CTEIF1_AW ; # [ doc = "Write proxy for field `CTEIF2`" ]
pub struct CTEIF2_W < 'a > { w : & 'a mut W , } impl < 'a > CTEIF2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTEIF2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TEIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTEIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Channel 3 Global interrupt clear" ]
pub type CGIF3_AW = CGIF1_AW ; # [ doc = "Write proxy for field `CGIF3`" ]
pub struct CGIF3_W < 'a > { w : & 'a mut W , } impl < 'a > CGIF3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CGIF3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CGIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Channel 3 Transfer Complete clear" ]
pub type CTCIF3_AW = CTCIF1_AW ; # [ doc = "Write proxy for field `CTCIF3`" ]
pub struct CTCIF3_W < 'a > { w : & 'a mut W , } impl < 'a > CTCIF3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTCIF3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TCIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTCIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Channel 3 Half Transfer clear" ]
pub type CHTIF3_AW = CHTIF1_AW ; # [ doc = "Write proxy for field `CHTIF3`" ]
pub struct CHTIF3_W < 'a > { w : & 'a mut W , } impl < 'a > CHTIF3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHTIF3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the HTIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CHTIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Channel 3 Transfer Error clear" ]
pub type CTEIF3_AW = CTEIF1_AW ; # [ doc = "Write proxy for field `CTEIF3`" ]
pub struct CTEIF3_W < 'a > { w : & 'a mut W , } impl < 'a > CTEIF3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTEIF3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TEIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTEIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Channel 4 Global interrupt clear" ]
pub type CGIF4_AW = CGIF1_AW ; # [ doc = "Write proxy for field `CGIF4`" ]
pub struct CGIF4_W < 'a > { w : & 'a mut W , } impl < 'a > CGIF4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CGIF4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CGIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Channel 4 Transfer Complete clear" ]
pub type CTCIF4_AW = CTCIF1_AW ; # [ doc = "Write proxy for field `CTCIF4`" ]
pub struct CTCIF4_W < 'a > { w : & 'a mut W , } impl < 'a > CTCIF4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTCIF4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TCIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTCIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Channel 4 Half Transfer clear" ]
pub type CHTIF4_AW = CHTIF1_AW ; # [ doc = "Write proxy for field `CHTIF4`" ]
pub struct CHTIF4_W < 'a > { w : & 'a mut W , } impl < 'a > CHTIF4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHTIF4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the HTIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CHTIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Channel 4 Transfer Error clear" ]
pub type CTEIF4_AW = CTEIF1_AW ; # [ doc = "Write proxy for field `CTEIF4`" ]
pub struct CTEIF4_W < 'a > { w : & 'a mut W , } impl < 'a > CTEIF4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTEIF4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TEIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTEIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Channel 5 Global interrupt clear" ]
pub type CGIF5_AW = CGIF1_AW ; # [ doc = "Write proxy for field `CGIF5`" ]
pub struct CGIF5_W < 'a > { w : & 'a mut W , } impl < 'a > CGIF5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CGIF5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CGIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Channel 5 Transfer Complete clear" ]
pub type CTCIF5_AW = CTCIF1_AW ; # [ doc = "Write proxy for field `CTCIF5`" ]
pub struct CTCIF5_W < 'a > { w : & 'a mut W , } impl < 'a > CTCIF5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTCIF5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TCIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTCIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Channel 5 Half Transfer clear" ]
pub type CHTIF5_AW = CHTIF1_AW ; # [ doc = "Write proxy for field `CHTIF5`" ]
pub struct CHTIF5_W < 'a > { w : & 'a mut W , } impl < 'a > CHTIF5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHTIF5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the HTIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CHTIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Channel 5 Transfer Error clear" ]
pub type CTEIF5_AW = CTEIF1_AW ; # [ doc = "Write proxy for field `CTEIF5`" ]
pub struct CTEIF5_W < 'a > { w : & 'a mut W , } impl < 'a > CTEIF5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTEIF5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TEIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTEIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Channel 6 Global interrupt clear" ]
pub type CGIF6_AW = CGIF1_AW ; # [ doc = "Write proxy for field `CGIF6`" ]
pub struct CGIF6_W < 'a > { w : & 'a mut W , } impl < 'a > CGIF6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CGIF6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CGIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Channel 6 Transfer Complete clear" ]
pub type CTCIF6_AW = CTCIF1_AW ; # [ doc = "Write proxy for field `CTCIF6`" ]
pub struct CTCIF6_W < 'a > { w : & 'a mut W , } impl < 'a > CTCIF6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTCIF6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TCIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTCIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Channel 6 Half Transfer clear" ]
pub type CHTIF6_AW = CHTIF1_AW ; # [ doc = "Write proxy for field `CHTIF6`" ]
pub struct CHTIF6_W < 'a > { w : & 'a mut W , } impl < 'a > CHTIF6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHTIF6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the HTIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CHTIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Channel 6 Transfer Error clear" ]
pub type CTEIF6_AW = CTEIF1_AW ; # [ doc = "Write proxy for field `CTEIF6`" ]
pub struct CTEIF6_W < 'a > { w : & 'a mut W , } impl < 'a > CTEIF6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTEIF6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TEIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTEIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Channel 7 Global interrupt clear" ]
pub type CGIF7_AW = CGIF1_AW ; # [ doc = "Write proxy for field `CGIF7`" ]
pub struct CGIF7_W < 'a > { w : & 'a mut W , } impl < 'a > CGIF7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CGIF7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the GIF, TEIF, HTIF, TCIF flags in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CGIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Channel 7 Transfer Complete clear" ]
pub type CTCIF7_AW = CTCIF1_AW ; # [ doc = "Write proxy for field `CTCIF7`" ]
pub struct CTCIF7_W < 'a > { w : & 'a mut W , } impl < 'a > CTCIF7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTCIF7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TCIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTCIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Channel 7 Half Transfer clear" ]
pub type CHTIF7_AW = CHTIF1_AW ; # [ doc = "Write proxy for field `CHTIF7`" ]
pub struct CHTIF7_W < 'a > { w : & 'a mut W , } impl < 'a > CHTIF7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHTIF7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the HTIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CHTIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Channel 7 Transfer Error clear" ]
pub type CTEIF7_AW = CTEIF1_AW ; # [ doc = "Write proxy for field `CTEIF7`" ]
pub struct CTEIF7_W < 'a > { w : & 'a mut W , } impl < 'a > CTEIF7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTEIF7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TEIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTEIF1_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } impl W { # [ doc = "Bit 0 - Channel 1 Global interrupt clear" ]
# [ inline ( always ) ]
pub fn cgif1 ( & mut self ) -> CGIF1_W { CGIF1_W { w : self } } # [ doc = "Bit 1 - Channel 1 Transfer Complete clear" ]
# [ inline ( always ) ]
pub fn ctcif1 ( & mut self ) -> CTCIF1_W { CTCIF1_W { w : self } } # [ doc = "Bit 2 - Channel 1 Half Transfer clear" ]
# [ inline ( always ) ]
pub fn chtif1 ( & mut self ) -> CHTIF1_W { CHTIF1_W { w : self } } # [ doc = "Bit 3 - Channel 1 Transfer Error clear" ]
# [ inline ( always ) ]
pub fn cteif1 ( & mut self ) -> CTEIF1_W { CTEIF1_W { w : self } } # [ doc = "Bit 4 - Channel 2 Global interrupt clear" ]
# [ inline ( always ) ]
pub fn cgif2 ( & mut self ) -> CGIF2_W { CGIF2_W { w : self } } # [ doc = "Bit 5 - Channel 2 Transfer Complete clear" ]
# [ inline ( always ) ]
pub fn ctcif2 ( & mut self ) -> CTCIF2_W { CTCIF2_W { w : self } } # [ doc = "Bit 6 - Channel 2 Half Transfer clear" ]
# [ inline ( always ) ]
pub fn chtif2 ( & mut self ) -> CHTIF2_W { CHTIF2_W { w : self } } # [ doc = "Bit 7 - Channel 2 Transfer Error clear" ]
# [ inline ( always ) ]
pub fn cteif2 ( & mut self ) -> CTEIF2_W { CTEIF2_W { w : self } } # [ doc = "Bit 8 - Channel 3 Global interrupt clear" ]
# [ inline ( always ) ]
pub fn cgif3 ( & mut self ) -> CGIF3_W { CGIF3_W { w : self } } # [ doc = "Bit 9 - Channel 3 Transfer Complete clear" ]
# [ inline ( always ) ]
pub fn ctcif3 ( & mut self ) -> CTCIF3_W { CTCIF3_W { w : self } } # [ doc = "Bit 10 - Channel 3 Half Transfer clear" ]
# [ inline ( always ) ]
pub fn chtif3 ( & mut self ) -> CHTIF3_W { CHTIF3_W { w : self } } # [ doc = "Bit 11 - Channel 3 Transfer Error clear" ]
# [ inline ( always ) ]
pub fn cteif3 ( & mut self ) -> CTEIF3_W { CTEIF3_W { w : self } } # [ doc = "Bit 12 - Channel 4 Global interrupt clear" ]
# [ inline ( always ) ]
pub fn cgif4 ( & mut self ) -> CGIF4_W { CGIF4_W { w : self } } # [ doc = "Bit 13 - Channel 4 Transfer Complete clear" ]
# [ inline ( always ) ]
pub fn ctcif4 ( & mut self ) -> CTCIF4_W { CTCIF4_W { w : self } } # [ doc = "Bit 14 - Channel 4 Half Transfer clear" ]
# [ inline ( always ) ]
pub fn chtif4 ( & mut self ) -> CHTIF4_W { CHTIF4_W { w : self } } # [ doc = "Bit 15 - Channel 4 Transfer Error clear" ]
# [ inline ( always ) ]
pub fn cteif4 ( & mut self ) -> CTEIF4_W { CTEIF4_W { w : self } } # [ doc = "Bit 16 - Channel 5 Global interrupt clear" ]
# [ inline ( always ) ]
pub fn cgif5 ( & mut self ) -> CGIF5_W { CGIF5_W { w : self } } # [ doc = "Bit 17 - Channel 5 Transfer Complete clear" ]
# [ inline ( always ) ]
pub fn ctcif5 ( & mut self ) -> CTCIF5_W { CTCIF5_W { w : self } } # [ doc = "Bit 18 - Channel 5 Half Transfer clear" ]
# [ inline ( always ) ]
pub fn chtif5 ( & mut self ) -> CHTIF5_W { CHTIF5_W { w : self } } # [ doc = "Bit 19 - Channel 5 Transfer Error clear" ]
# [ inline ( always ) ]
pub fn cteif5 ( & mut self ) -> CTEIF5_W { CTEIF5_W { w : self } } # [ doc = "Bit 20 - Channel 6 Global interrupt clear" ]
# [ inline ( always ) ]
pub fn cgif6 ( & mut self ) -> CGIF6_W { CGIF6_W { w : self } } # [ doc = "Bit 21 - Channel 6 Transfer Complete clear" ]
# [ inline ( always ) ]
pub fn ctcif6 ( & mut self ) -> CTCIF6_W { CTCIF6_W { w : self } } # [ doc = "Bit 22 - Channel 6 Half Transfer clear" ]
# [ inline ( always ) ]
pub fn chtif6 ( & mut self ) -> CHTIF6_W { CHTIF6_W { w : self } } # [ doc = "Bit 23 - Channel 6 Transfer Error clear" ]
# [ inline ( always ) ]
pub fn cteif6 ( & mut self ) -> CTEIF6_W { CTEIF6_W { w : self } } # [ doc = "Bit 24 - Channel 7 Global interrupt clear" ]
# [ inline ( always ) ]
pub fn cgif7 ( & mut self ) -> CGIF7_W { CGIF7_W { w : self } } # [ doc = "Bit 25 - Channel 7 Transfer Complete clear" ]
# [ inline ( always ) ]
pub fn ctcif7 ( & mut self ) -> CTCIF7_W { CTCIF7_W { w : self } } # [ doc = "Bit 26 - Channel 7 Half Transfer clear" ]
# [ inline ( always ) ]
pub fn chtif7 ( & mut self ) -> CHTIF7_W { CHTIF7_W { w : self } } # [ doc = "Bit 27 - Channel 7 Transfer Error clear" ]
# [ inline ( always ) ]
pub fn cteif7 ( & mut self ) -> CTEIF7_W { CTEIF7_W { w : self } } } } } # [ doc = "DMA controller 1" ]
pub struct DMA2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for DMA2 { } impl DMA2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const dma1 :: RegisterBlock { 0x4002_0400 as * const _ } } impl Deref for DMA2 { type Target = dma1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * DMA2 :: ptr ( ) } } } # [ doc = "General purpose timer" ]
pub struct TIM2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM2 { } impl TIM2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim2 :: RegisterBlock { 0x4000_0000 as * const _ } } impl Deref for TIM2 { type Target = tim2 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM2 :: ptr ( ) } } } # [ doc = "General purpose timer" ]
pub mod tim2 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - slave mode control register" ]
pub smcr : SMCR , # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_6_ccmr1 : [ u8 ; 4usize ]
, _reserved_7_ccmr2 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , _reserved12 : [ u8 ; 4usize ]
, # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR , # [ doc = "0x38 - capture/compare register 1" ]
pub ccr2 : CCR , # [ doc = "0x3c - capture/compare register 1" ]
pub ccr3 : CCR , # [ doc = "0x40 - capture/compare register 1" ]
pub ccr4 : CCR , _reserved16 : [ u8 ; 4usize ]
, # [ doc = "0x48 - DMA control register" ]
pub dcr : DCR , # [ doc = "0x4c - DMA address for full transfer" ]
pub dmar : DMAR , # [ doc = "0x50 - option register" ]
pub or : OR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input ( & self ) -> & CCMR2_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input_mut ( & self ) -> & mut CCMR2_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output ( & self ) -> & CCMR2_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output_mut ( & self ) -> & mut CCMR2_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Center-aligned mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CMS_A { # [ doc = "0: The counter counts up or down depending on the direction bit" ]
EDGEALIGNED = 0 , # [ doc = "1: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
CENTERALIGNED1 = 1 , # [ doc = "2: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
CENTERALIGNED2 = 2 , # [ doc = "3: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
CENTERALIGNED3 = 3 } impl From < CMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CMS`" ]
pub type CMS_R = crate :: R < u8 , CMS_A > ; impl CMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CMS_A { match self . bits { 0 => CMS_A :: EDGEALIGNED , 1 => CMS_A :: CENTERALIGNED1 , 2 => CMS_A :: CENTERALIGNED2 , 3 => CMS_A :: CENTERALIGNED3 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `EDGEALIGNED`" ]
# [ inline ( always ) ]
pub fn is_edge_aligned ( & self ) -> bool { * self == CMS_A :: EDGEALIGNED } # [ doc = "Checks if the value of the field is `CENTERALIGNED1`" ]
# [ inline ( always ) ]
pub fn is_center_aligned1 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED1 } # [ doc = "Checks if the value of the field is `CENTERALIGNED2`" ]
# [ inline ( always ) ]
pub fn is_center_aligned2 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED2 } # [ doc = "Checks if the value of the field is `CENTERALIGNED3`" ]
# [ inline ( always ) ]
pub fn is_center_aligned3 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED3 } } # [ doc = "Write proxy for field `CMS`" ]
pub struct CMS_W < 'a > { w : & 'a mut W , } impl < 'a > CMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The counter counts up or down depending on the direction bit" ]
# [ inline ( always ) ]
pub fn edge_aligned ( self ) -> & 'a mut W { self . variant ( CMS_A :: EDGEALIGNED ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
# [ inline ( always ) ]
pub fn center_aligned1 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED1 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
# [ inline ( always ) ]
pub fn center_aligned2 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED2 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
# [ inline ( always ) ]
pub fn center_aligned3 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED3 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Direction\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIR_A { # [ doc = "0: Counter used as upcounter" ]
UP = 0 , # [ doc = "1: Counter used as downcounter" ]
DOWN = 1 } impl From < DIR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIR`" ]
pub type DIR_R = crate :: R < bool , DIR_A > ; impl DIR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIR_A { match self . bits { false => DIR_A :: UP , true => DIR_A :: DOWN } } # [ doc = "Checks if the value of the field is `UP`" ]
# [ inline ( always ) ]
pub fn is_up ( & self ) -> bool { * self == DIR_A :: UP } # [ doc = "Checks if the value of the field is `DOWN`" ]
# [ inline ( always ) ]
pub fn is_down ( & self ) -> bool { * self == DIR_A :: DOWN } } # [ doc = "Write proxy for field `DIR`" ]
pub struct DIR_W < 'a > { w : & 'a mut W , } impl < 'a > DIR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter used as upcounter" ]
# [ inline ( always ) ]
pub fn up ( self ) -> & 'a mut W { self . variant ( DIR_A :: UP ) } # [ doc = "Counter used as downcounter" ]
# [ inline ( always ) ]
pub fn down ( self ) -> & 'a mut W { self . variant ( DIR_A :: DOWN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "One-pulse mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPM_A { # [ doc = "0: Counter is not stopped at update event" ]
DISABLED = 0 , # [ doc = "1: Counter stops counting at the next update event (clearing the CEN bit)" ]
ENABLED = 1 } impl From < OPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , OPM_A > ; impl OPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPM_A { match self . bits { false => OPM_A :: DISABLED , true => OPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPM_A :: ENABLED } } # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter is not stopped at update event" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: DISABLED ) } # [ doc = "Counter stops counting at the next update event (clearing the CEN bit)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & self ) -> CMS_R { CMS_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & self ) -> DIR_R { DIR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & mut self ) -> CMS_W { CMS_W { w : self } } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & mut self ) -> DIR_W { DIR_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "TI1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TI1S_A { # [ doc = "0: The TIMx_CH1 pin is connected to TI1 input" ]
NORMAL = 0 , # [ doc = "1: The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
XOR = 1 } impl From < TI1S_A > for bool { # [ inline ( always ) ]
fn from ( variant : TI1S_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TI1S`" ]
pub type TI1S_R = crate :: R < bool , TI1S_A > ; impl TI1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TI1S_A { match self . bits { false => TI1S_A :: NORMAL , true => TI1S_A :: XOR } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == TI1S_A :: NORMAL } # [ doc = "Checks if the value of the field is `XOR`" ]
# [ inline ( always ) ]
pub fn is_xor ( & self ) -> bool { * self == TI1S_A :: XOR } } # [ doc = "Write proxy for field `TI1S`" ]
pub struct TI1S_W < 'a > { w : & 'a mut W , } impl < 'a > TI1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TI1S_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIMx_CH1 pin is connected to TI1 input" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( TI1S_A :: NORMAL ) } # [ doc = "The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
# [ inline ( always ) ]
pub fn xor ( self ) -> & 'a mut W { self . variant ( TI1S_A :: XOR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Master mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MMS_A { # [ doc = "0: The UG bit from the TIMx_EGR register is used as trigger output" ]
RESET = 0 , # [ doc = "1: The counter enable signal, CNT_EN, is used as trigger output" ]
ENABLE = 1 , # [ doc = "2: The update event is selected as trigger output" ]
UPDATE = 2 , # [ doc = "3: The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
COMPAREPULSE = 3 , # [ doc = "4: OC1REF signal is used as trigger output" ]
COMPAREOC1 = 4 , # [ doc = "5: OC2REF signal is used as trigger output" ]
COMPAREOC2 = 5 , # [ doc = "6: OC3REF signal is used as trigger output" ]
COMPAREOC3 = 6 , # [ doc = "7: OC4REF signal is used as trigger output" ]
COMPAREOC4 = 7 } impl From < MMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MMS`" ]
pub type MMS_R = crate :: R < u8 , MMS_A > ; impl MMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MMS_A { match self . bits { 0 => MMS_A :: RESET , 1 => MMS_A :: ENABLE , 2 => MMS_A :: UPDATE , 3 => MMS_A :: COMPAREPULSE , 4 => MMS_A :: COMPAREOC1 , 5 => MMS_A :: COMPAREOC2 , 6 => MMS_A :: COMPAREOC3 , 7 => MMS_A :: COMPAREOC4 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == MMS_A :: RESET } # [ doc = "Checks if the value of the field is `ENABLE`" ]
# [ inline ( always ) ]
pub fn is_enable ( & self ) -> bool { * self == MMS_A :: ENABLE } # [ doc = "Checks if the value of the field is `UPDATE`" ]
# [ inline ( always ) ]
pub fn is_update ( & self ) -> bool { * self == MMS_A :: UPDATE } # [ doc = "Checks if the value of the field is `COMPAREPULSE`" ]
# [ inline ( always ) ]
pub fn is_compare_pulse ( & self ) -> bool { * self == MMS_A :: COMPAREPULSE } # [ doc = "Checks if the value of the field is `COMPAREOC1`" ]
# [ inline ( always ) ]
pub fn is_compare_oc1 ( & self ) -> bool { * self == MMS_A :: COMPAREOC1 } # [ doc = "Checks if the value of the field is `COMPAREOC2`" ]
# [ inline ( always ) ]
pub fn is_compare_oc2 ( & self ) -> bool { * self == MMS_A :: COMPAREOC2 } # [ doc = "Checks if the value of the field is `COMPAREOC3`" ]
# [ inline ( always ) ]
pub fn is_compare_oc3 ( & self ) -> bool { * self == MMS_A :: COMPAREOC3 } # [ doc = "Checks if the value of the field is `COMPAREOC4`" ]
# [ inline ( always ) ]
pub fn is_compare_oc4 ( & self ) -> bool { * self == MMS_A :: COMPAREOC4 } } # [ doc = "Write proxy for field `MMS`" ]
pub struct MMS_W < 'a > { w : & 'a mut W , } impl < 'a > MMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The UG bit from the TIMx_EGR register is used as trigger output" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( MMS_A :: RESET ) } # [ doc = "The counter enable signal, CNT_EN, is used as trigger output" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( MMS_A :: ENABLE ) } # [ doc = "The update event is selected as trigger output" ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( MMS_A :: UPDATE ) } # [ doc = "The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
# [ inline ( always ) ]
pub fn compare_pulse ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREPULSE ) } # [ doc = "OC1REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc1 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC1 ) } # [ doc = "OC2REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc2 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC2 ) } # [ doc = "OC3REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc3 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC3 ) } # [ doc = "OC4REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc4 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Capture/compare DMA selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CCDS_A { # [ doc = "0: CCx DMA request sent when CCx event occurs" ]
ONCOMPARE = 0 , # [ doc = "1: CCx DMA request sent when update event occurs" ]
ONUPDATE = 1 } impl From < CCDS_A > for bool { # [ inline ( always ) ]
fn from ( variant : CCDS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CCDS`" ]
pub type CCDS_R = crate :: R < bool , CCDS_A > ; impl CCDS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CCDS_A { match self . bits { false => CCDS_A :: ONCOMPARE , true => CCDS_A :: ONUPDATE } } # [ doc = "Checks if the value of the field is `ONCOMPARE`" ]
# [ inline ( always ) ]
pub fn is_on_compare ( & self ) -> bool { * self == CCDS_A :: ONCOMPARE } # [ doc = "Checks if the value of the field is `ONUPDATE`" ]
# [ inline ( always ) ]
pub fn is_on_update ( & self ) -> bool { * self == CCDS_A :: ONUPDATE } } # [ doc = "Write proxy for field `CCDS`" ]
pub struct CCDS_W < 'a > { w : & 'a mut W , } impl < 'a > CCDS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CCDS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request sent when CCx event occurs" ]
# [ inline ( always ) ]
pub fn on_compare ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONCOMPARE ) } # [ doc = "CCx DMA request sent when update event occurs" ]
# [ inline ( always ) ]
pub fn on_update ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONUPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } impl R { # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & self ) -> TI1S_R { TI1S_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & self ) -> MMS_R { MMS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & self ) -> CCDS_R { CCDS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & mut self ) -> TI1S_W { TI1S_W { w : self } } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & mut self ) -> MMS_W { MMS_W { w : self } } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & mut self ) -> CCDS_W { CCDS_W { w : self } } } } # [ doc = "slave mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcr](smcr) module" ]
pub type SMCR = crate :: Reg < u32 , _SMCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMCR ; # [ doc = "`read()` method returns [smcr::R](smcr::R) reader structure" ]
impl crate :: Readable for SMCR { } # [ doc = "`write(|w| ..)` method takes [smcr::W](smcr::W) writer structure" ]
impl crate :: Writable for SMCR { } # [ doc = "slave mode control register" ]
pub mod smcr { # [ doc = "Reader of register SMCR" ]
pub type R = crate :: R < u32 , super :: SMCR > ; # [ doc = "Writer for register SMCR" ]
pub type W = crate :: W < u32 , super :: SMCR > ; # [ doc = "Register SMCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "External trigger polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ETP_A { # [ doc = "0: ETR is noninverted, active at high level or rising edge" ]
NOTINVERTED = 0 , # [ doc = "1: ETR is inverted, active at low level or falling edge" ]
INVERTED = 1 } impl From < ETP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ETP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ETP`" ]
pub type ETP_R = crate :: R < bool , ETP_A > ; impl ETP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETP_A { match self . bits { false => ETP_A :: NOTINVERTED , true => ETP_A :: INVERTED } } # [ doc = "Checks if the value of the field is `NOTINVERTED`" ]
# [ inline ( always ) ]
pub fn is_not_inverted ( & self ) -> bool { * self == ETP_A :: NOTINVERTED } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == ETP_A :: INVERTED } } # [ doc = "Write proxy for field `ETP`" ]
pub struct ETP_W < 'a > { w : & 'a mut W , } impl < 'a > ETP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ETR is noninverted, active at high level or rising edge" ]
# [ inline ( always ) ]
pub fn not_inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: NOTINVERTED ) } # [ doc = "ETR is inverted, active at low level or falling edge" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "External clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ECE_A { # [ doc = "0: External clock mode 2 disabled" ]
DISABLED = 0 , # [ doc = "1: External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
ENABLED = 1 } impl From < ECE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ECE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ECE`" ]
pub type ECE_R = crate :: R < bool , ECE_A > ; impl ECE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ECE_A { match self . bits { false => ECE_A :: DISABLED , true => ECE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ECE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ECE_A :: ENABLED } } # [ doc = "Write proxy for field `ECE`" ]
pub struct ECE_W < 'a > { w : & 'a mut W , } impl < 'a > ECE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ECE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "External clock mode 2 disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: DISABLED ) } # [ doc = "External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "External trigger prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETPS_A { # [ doc = "0: Prescaler OFF" ]
DIV1 = 0 , # [ doc = "1: ETRP frequency divided by 2" ]
DIV2 = 1 , # [ doc = "2: ETRP frequency divided by 4" ]
DIV4 = 2 , # [ doc = "3: ETRP frequency divided by 8" ]
DIV8 = 3 } impl From < ETPS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETPS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETPS`" ]
pub type ETPS_R = crate :: R < u8 , ETPS_A > ; impl ETPS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETPS_A { match self . bits { 0 => ETPS_A :: DIV1 , 1 => ETPS_A :: DIV2 , 2 => ETPS_A :: DIV4 , 3 => ETPS_A :: DIV8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == ETPS_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == ETPS_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == ETPS_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == ETPS_A :: DIV8 } } # [ doc = "Write proxy for field `ETPS`" ]
pub struct ETPS_W < 'a > { w : & 'a mut W , } impl < 'a > ETPS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETPS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Prescaler OFF" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV1 ) } # [ doc = "ETRP frequency divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV2 ) } # [ doc = "ETRP frequency divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV4 ) } # [ doc = "ETRP frequency divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "External trigger filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETF_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < ETF_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETF_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETF`" ]
pub type ETF_R = crate :: R < u8 , ETF_A > ; impl ETF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETF_A { match self . bits { 0 => ETF_A :: NOFILTER , 1 => ETF_A :: FCK_INT_N2 , 2 => ETF_A :: FCK_INT_N4 , 3 => ETF_A :: FCK_INT_N8 , 4 => ETF_A :: FDTS_DIV2_N6 , 5 => ETF_A :: FDTS_DIV2_N8 , 6 => ETF_A :: FDTS_DIV4_N6 , 7 => ETF_A :: FDTS_DIV4_N8 , 8 => ETF_A :: FDTS_DIV8_N6 , 9 => ETF_A :: FDTS_DIV8_N8 , 10 => ETF_A :: FDTS_DIV16_N5 , 11 => ETF_A :: FDTS_DIV16_N6 , 12 => ETF_A :: FDTS_DIV16_N8 , 13 => ETF_A :: FDTS_DIV32_N5 , 14 => ETF_A :: FDTS_DIV32_N6 , 15 => ETF_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == ETF_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `ETF`" ]
pub struct ETF_W < 'a > { w : & 'a mut W , } impl < 'a > ETF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETF_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( ETF_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Master/Slave mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSM_A { # [ doc = "0: No action" ]
NOSYNC = 0 , # [ doc = "1: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
SYNC = 1 } impl From < MSM_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSM`" ]
pub type MSM_R = crate :: R < bool , MSM_A > ; impl MSM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSM_A { match self . bits { false => MSM_A :: NOSYNC , true => MSM_A :: SYNC } } # [ doc = "Checks if the value of the field is `NOSYNC`" ]
# [ inline ( always ) ]
pub fn is_no_sync ( & self ) -> bool { * self == MSM_A :: NOSYNC } # [ doc = "Checks if the value of the field is `SYNC`" ]
# [ inline ( always ) ]
pub fn is_sync ( & self ) -> bool { * self == MSM_A :: SYNC } } # [ doc = "Write proxy for field `MSM`" ]
pub struct MSM_W < 'a > { w : & 'a mut W , } impl < 'a > MSM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action" ]
# [ inline ( always ) ]
pub fn no_sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: NOSYNC ) } # [ doc = "The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
# [ inline ( always ) ]
pub fn sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: SYNC ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Trigger selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum TS_A { # [ doc = "0: Internal Trigger 0 (ITR0)" ]
ITR0 = 0 , # [ doc = "1: Internal Trigger 1 (ITR1)" ]
ITR1 = 1 , # [ doc = "2: Internal Trigger 2 (ITR2)" ]
ITR2 = 2 , # [ doc = "4: TI1 Edge Detector (TI1F_ED)" ]
TI1F_ED = 4 , # [ doc = "5: Filtered Timer Input 1 (TI1FP1)" ]
TI1FP1 = 5 , # [ doc = "6: Filtered Timer Input 2 (TI2FP2)" ]
TI2FP2 = 6 , # [ doc = "7: External Trigger input (ETRF)" ]
ETRF = 7 } impl From < TS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : TS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `TS`" ]
pub type TS_R = crate :: R < u8 , TS_A > ; impl TS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , TS_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( TS_A :: ITR0 ) , 1 => Val ( TS_A :: ITR1 ) , 2 => Val ( TS_A :: ITR2 ) , 4 => Val ( TS_A :: TI1F_ED ) , 5 => Val ( TS_A :: TI1FP1 ) , 6 => Val ( TS_A :: TI2FP2 ) , 7 => Val ( TS_A :: ETRF ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ITR0`" ]
# [ inline ( always ) ]
pub fn is_itr0 ( & self ) -> bool { * self == TS_A :: ITR0 } # [ doc = "Checks if the value of the field is `ITR1`" ]
# [ inline ( always ) ]
pub fn is_itr1 ( & self ) -> bool { * self == TS_A :: ITR1 } # [ doc = "Checks if the value of the field is `ITR2`" ]
# [ inline ( always ) ]
pub fn is_itr2 ( & self ) -> bool { * self == TS_A :: ITR2 } # [ doc = "Checks if the value of the field is `TI1F_ED`" ]
# [ inline ( always ) ]
pub fn is_ti1f_ed ( & self ) -> bool { * self == TS_A :: TI1F_ED } # [ doc = "Checks if the value of the field is `TI1FP1`" ]
# [ inline ( always ) ]
pub fn is_ti1fp1 ( & self ) -> bool { * self == TS_A :: TI1FP1 } # [ doc = "Checks if the value of the field is `TI2FP2`" ]
# [ inline ( always ) ]
pub fn is_ti2fp2 ( & self ) -> bool { * self == TS_A :: TI2FP2 } # [ doc = "Checks if the value of the field is `ETRF`" ]
# [ inline ( always ) ]
pub fn is_etrf ( & self ) -> bool { * self == TS_A :: ETRF } } # [ doc = "Write proxy for field `TS`" ]
pub struct TS_W < 'a > { w : & 'a mut W , } impl < 'a > TS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TS_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Internal Trigger 0 (ITR0)" ]
# [ inline ( always ) ]
pub fn itr0 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR0 ) } # [ doc = "Internal Trigger 1 (ITR1)" ]
# [ inline ( always ) ]
pub fn itr1 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR1 ) } # [ doc = "Internal Trigger 2 (ITR2)" ]
# [ inline ( always ) ]
pub fn itr2 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR2 ) } # [ doc = "TI1 Edge Detector (TI1F_ED)" ]
# [ inline ( always ) ]
pub fn ti1f_ed ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1F_ED ) } # [ doc = "Filtered Timer Input 1 (TI1FP1)" ]
# [ inline ( always ) ]
pub fn ti1fp1 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1FP1 ) } # [ doc = "Filtered Timer Input 2 (TI2FP2)" ]
# [ inline ( always ) ]
pub fn ti2fp2 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI2FP2 ) } # [ doc = "External Trigger input (ETRF)" ]
# [ inline ( always ) ]
pub fn etrf ( self ) -> & 'a mut W { self . variant ( TS_A :: ETRF ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Slave mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SMS_A { # [ doc = "0: Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
DISABLED = 0 , # [ doc = "1: Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
ENCODER_MODE_1 = 1 , # [ doc = "2: Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
ENCODER_MODE_2 = 2 , # [ doc = "3: Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
ENCODER_MODE_3 = 3 , # [ doc = "4: Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
RESET_MODE = 4 , # [ doc = "5: Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
GATED_MODE = 5 , # [ doc = "6: Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
TRIGGER_MODE = 6 , # [ doc = "7: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
EXT_CLOCK_MODE = 7 } impl From < SMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SMS`" ]
pub type SMS_R = crate :: R < u8 , SMS_A > ; impl SMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMS_A { match self . bits { 0 => SMS_A :: DISABLED , 1 => SMS_A :: ENCODER_MODE_1 , 2 => SMS_A :: ENCODER_MODE_2 , 3 => SMS_A :: ENCODER_MODE_3 , 4 => SMS_A :: RESET_MODE , 5 => SMS_A :: GATED_MODE , 6 => SMS_A :: TRIGGER_MODE , 7 => SMS_A :: EXT_CLOCK_MODE , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SMS_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENCODER_MODE_1`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_1 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_1 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_2`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_2 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_2 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_3`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_3 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_3 } # [ doc = "Checks if the value of the field is `RESET_MODE`" ]
# [ inline ( always ) ]
pub fn is_reset_mode ( & self ) -> bool { * self == SMS_A :: RESET_MODE } # [ doc = "Checks if the value of the field is `GATED_MODE`" ]
# [ inline ( always ) ]
pub fn is_gated_mode ( & self ) -> bool { * self == SMS_A :: GATED_MODE } # [ doc = "Checks if the value of the field is `TRIGGER_MODE`" ]
# [ inline ( always ) ]
pub fn is_trigger_mode ( & self ) -> bool { * self == SMS_A :: TRIGGER_MODE } # [ doc = "Checks if the value of the field is `EXT_CLOCK_MODE`" ]
# [ inline ( always ) ]
pub fn is_ext_clock_mode ( & self ) -> bool { * self == SMS_A :: EXT_CLOCK_MODE } } # [ doc = "Write proxy for field `SMS`" ]
pub struct SMS_W < 'a > { w : & 'a mut W , } impl < 'a > SMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SMS_A :: DISABLED ) } # [ doc = "Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_1 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_1 ) } # [ doc = "Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_2 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_2 ) } # [ doc = "Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
# [ inline ( always ) ]
pub fn encoder_mode_3 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_3 ) } # [ doc = "Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn reset_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: RESET_MODE ) } # [ doc = "Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
# [ inline ( always ) ]
pub fn gated_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: GATED_MODE ) } # [ doc = "Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
# [ inline ( always ) ]
pub fn trigger_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: TRIGGER_MODE ) } # [ doc = "External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
# [ inline ( always ) ]
pub fn ext_clock_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: EXT_CLOCK_MODE ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } impl R { # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & self ) -> ETP_R { ETP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & self ) -> ECE_R { ECE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & self ) -> ETPS_R { ETPS_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & self ) -> ETF_R { ETF_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & self ) -> MSM_R { MSM_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & self ) -> TS_R { TS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & self ) -> SMS_R { SMS_R :: new ( ( self . bits & 0x07 ) as u8 ) } } impl W { # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & mut self ) -> ETP_W { ETP_W { w : self } } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & mut self ) -> ECE_W { ECE_W { w : self } } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & mut self ) -> ETPS_W { ETPS_W { w : self } } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & mut self ) -> ETF_W { ETF_W { w : self } } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & mut self ) -> MSM_W { MSM_W { w : self } } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & mut self ) -> TS_W { TS_W { w : self } } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & mut self ) -> SMS_W { SMS_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Trigger DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TDE_A { # [ doc = "0: Trigger DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger DMA request enabled" ]
ENABLED = 1 } impl From < TDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TDE`" ]
pub type TDE_R = crate :: R < bool , TDE_A > ; impl TDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TDE_A { match self . bits { false => TDE_A :: DISABLED , true => TDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TDE_A :: ENABLED } } # [ doc = "Write proxy for field `TDE`" ]
pub struct TDE_W < 'a > { w : & 'a mut W , } impl < 'a > TDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: DISABLED ) } # [ doc = "Trigger DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Capture/Compare 4 DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4DE_A { # [ doc = "0: CCx DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: CCx DMA request enabled" ]
ENABLED = 1 } impl From < CC4DE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4DE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4DE`" ]
pub type CC4DE_R = crate :: R < bool , CC4DE_A > ; impl CC4DE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4DE_A { match self . bits { false => CC4DE_A :: DISABLED , true => CC4DE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4DE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4DE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4DE`" ]
pub struct CC4DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Capture/Compare 3 DMA request enable" ]
pub type CC3DE_A = CC4DE_A ; # [ doc = "Reader of field `CC3DE`" ]
pub type CC3DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC3DE`" ]
pub struct CC3DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/Compare 2 DMA request enable" ]
pub type CC2DE_A = CC4DE_A ; # [ doc = "Reader of field `CC2DE`" ]
pub type CC2DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC2DE`" ]
pub struct CC2DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 1 DMA request enable" ]
pub type CC1DE_A = CC4DE_A ; # [ doc = "Reader of field `CC1DE`" ]
pub type CC1DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC1DE`" ]
pub struct CC1DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Update DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDE_A { # [ doc = "0: Update DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Update DMA request enabled" ]
ENABLED = 1 } impl From < UDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDE`" ]
pub type UDE_R = crate :: R < bool , UDE_A > ; impl UDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDE_A { match self . bits { false => UDE_A :: DISABLED , true => UDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDE_A :: ENABLED } } # [ doc = "Write proxy for field `UDE`" ]
pub struct UDE_W < 'a > { w : & 'a mut W , } impl < 'a > UDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: DISABLED ) } # [ doc = "Update DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Trigger interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIE_A { # [ doc = "0: Trigger interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger interrupt enabled" ]
ENABLED = 1 } impl From < TIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIE`" ]
pub type TIE_R = crate :: R < bool , TIE_A > ; impl TIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIE_A { match self . bits { false => TIE_A :: DISABLED , true => TIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TIE_A :: ENABLED } } # [ doc = "Write proxy for field `TIE`" ]
pub struct TIE_W < 'a > { w : & 'a mut W , } impl < 'a > TIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: DISABLED ) } # [ doc = "Trigger interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IE_A { # [ doc = "0: CCx interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: CCx interrupt enabled" ]
ENABLED = 1 } impl From < CC4IE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4IE`" ]
pub type CC4IE_R = crate :: R < bool , CC4IE_A > ; impl CC4IE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4IE_A { match self . bits { false => CC4IE_A :: DISABLED , true => CC4IE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4IE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4IE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4IE`" ]
pub struct CC4IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt enable" ]
pub type CC3IE_A = CC4IE_A ; # [ doc = "Reader of field `CC3IE`" ]
pub type CC3IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC3IE`" ]
pub struct CC3IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt enable" ]
pub type CC2IE_A = CC4IE_A ; # [ doc = "Reader of field `CC2IE`" ]
pub type CC2IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC2IE`" ]
pub struct CC2IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 interrupt enable" ]
pub type CC1IE_A = CC4IE_A ; # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & self ) -> TDE_R { TDE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & self ) -> CC4DE_R { CC4DE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & self ) -> CC3DE_R { CC3DE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & self ) -> CC2DE_R { CC2DE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & self ) -> CC1DE_R { CC1DE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & self ) -> UDE_R { UDE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & self ) -> TIE_R { TIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & self ) -> CC4IE_R { CC4IE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & self ) -> CC3IE_R { CC3IE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & self ) -> CC2IE_R { CC2IE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & mut self ) -> TDE_W { TDE_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & mut self ) -> CC4DE_W { CC4DE_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & mut self ) -> CC3DE_W { CC3DE_W { w : self } } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & mut self ) -> CC2DE_W { CC2DE_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & mut self ) -> CC1DE_W { CC1DE_W { w : self } } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & mut self ) -> UDE_W { UDE_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & mut self ) -> TIE_W { TIE_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & mut self ) -> CC4IE_W { CC4IE_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & mut self ) -> CC3IE_W { CC3IE_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & mut self ) -> CC2IE_W { CC2IE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Capture/Compare 4 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4OF_A { # [ doc = "1: The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set" ]
OVERCAPTURE = 1 } impl From < CC4OF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4OF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4OF`" ]
pub type CC4OF_R = crate :: R < bool , CC4OF_A > ; impl CC4OF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC4OF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC4OF_A :: OVERCAPTURE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OVERCAPTURE`" ]
# [ inline ( always ) ]
pub fn is_overcapture ( & self ) -> bool { * self == CC4OF_A :: OVERCAPTURE } } # [ doc = "Capture/Compare 4 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4OF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC4OF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4OF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4OF`" ]
pub struct CC4OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_A = CC4OF_A ; # [ doc = "Reader of field `CC3OF`" ]
pub type CC3OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC3OF`" ]
pub struct CC3OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_A = CC4OF_A ; # [ doc = "Reader of field `CC2OF`" ]
pub type CC2OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC2OF`" ]
pub struct CC2OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 1 overcapture flag" ]
pub type CC1OF_A = CC4OF_A ; # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/Compare 1 overcapture flag" ]
pub type CC1OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_A { # [ doc = "0: No trigger event occurred" ]
NOTRIGGER = 0 , # [ doc = "1: Trigger interrupt pending" ]
TRIGGER = 1 } impl From < TIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIF`" ]
pub type TIF_R = crate :: R < bool , TIF_A > ; impl TIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIF_A { match self . bits { false => TIF_A :: NOTRIGGER , true => TIF_A :: TRIGGER } } # [ doc = "Checks if the value of the field is `NOTRIGGER`" ]
# [ inline ( always ) ]
pub fn is_no_trigger ( & self ) -> bool { * self == TIF_A :: NOTRIGGER } # [ doc = "Checks if the value of the field is `TRIGGER`" ]
# [ inline ( always ) ]
pub fn is_trigger ( & self ) -> bool { * self == TIF_A :: TRIGGER } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < TIF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TIF`" ]
pub struct TIF_W < 'a > { w : & 'a mut W , } impl < 'a > TIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TIF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IF_A { # [ doc = "1: If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register." ]
MATCH = 1 } impl From < CC4IF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4IF`" ]
pub type CC4IF_R = crate :: R < bool , CC4IF_A > ; impl CC4IF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC4IF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC4IF_A :: MATCH ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == CC4IF_A :: MATCH } } # [ doc = "Capture/Compare 4 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC4IF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4IF`" ]
pub struct CC4IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_A = CC4IF_A ; # [ doc = "Reader of field `CC3IF`" ]
pub type CC3IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC3IF`" ]
pub struct CC3IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_A = CC4IF_A ; # [ doc = "Reader of field `CC2IF`" ]
pub type CC2IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC2IF`" ]
pub struct CC2IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 1 interrupt flag" ]
pub type CC1IF_A = CC4IF_A ; # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/compare 1 interrupt flag" ]
pub type CC1IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & self ) -> CC4OF_R { CC4OF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & self ) -> CC3OF_R { CC3OF_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & self ) -> CC2OF_R { CC2OF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & self ) -> TIF_R { TIF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & self ) -> CC4IF_R { CC4IF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & self ) -> CC3IF_R { CC3IF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & self ) -> CC2IF_R { CC2IF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & mut self ) -> CC4OF_W { CC4OF_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & mut self ) -> CC3OF_W { CC3OF_W { w : self } } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & mut self ) -> CC2OF_W { CC2OF_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & mut self ) -> TIF_W { TIF_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & mut self ) -> CC4IF_W { CC4IF_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & mut self ) -> CC3IF_W { CC3IF_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & mut self ) -> CC2IF_W { CC2IF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Trigger generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TG_AW { # [ doc = "1: The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
TRIGGER = 1 } impl From < TG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TG`" ]
pub struct TG_W < 'a > { w : & 'a mut W , } impl < 'a > TG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( TG_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/compare 4 generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4G_AW { # [ doc = "1: If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
TRIGGER = 1 } impl From < CC4G_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4G_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4G`" ]
pub struct CC4G_W < 'a > { w : & 'a mut W , } impl < 'a > CC4G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/compare 3 generation" ]
pub type CC3G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC3G`" ]
pub struct CC3G_W < 'a > { w : & 'a mut W , } impl < 'a > CC3G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/compare 2 generation" ]
pub type CC2G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC2G`" ]
pub struct CC2G_W < 'a > { w : & 'a mut W , } impl < 'a > CC2G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 1 generation" ]
pub type CC1G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 6 - Trigger generation" ]
# [ inline ( always ) ]
pub fn tg ( & mut self ) -> TG_W { TG_W { w : self } } # [ doc = "Bit 4 - Capture/compare 4 generation" ]
# [ inline ( always ) ]
pub fn cc4g ( & mut self ) -> CC4G_W { CC4G_W { w : self } } # [ doc = "Bit 3 - Capture/compare 3 generation" ]
# [ inline ( always ) ]
pub fn cc3g ( & mut self ) -> CC3G_W { CC3G_W { w : self } } # [ doc = "Bit 2 - Capture/compare 2 generation" ]
# [ inline ( always ) ]
pub fn cc2g ( & mut self ) -> CC2G_W { CC2G_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "capture/compare mode register 1 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register 1 (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC2CE`" ]
pub type OC2CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2CE`" ]
pub struct OC2CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output compare 2 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC2M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC2M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC2M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC2M`" ]
pub type OC2M_R = crate :: R < u8 , OC2M_A > ; impl OC2M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2M_A { match self . bits { 0 => OC2M_A :: FROZEN , 1 => OC2M_A :: ACTIVEONMATCH , 2 => OC2M_A :: INACTIVEONMATCH , 3 => OC2M_A :: TOGGLE , 4 => OC2M_A :: FORCEINACTIVE , 5 => OC2M_A :: FORCEACTIVE , 6 => OC2M_A :: PWMMODE1 , 7 => OC2M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC2M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC2M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC2M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC2M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC2M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC2M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC2M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC2M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC2M`" ]
pub struct OC2M_W < 'a > { w : & 'a mut W , } impl < 'a > OC2M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output compare 2 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC2PE_A { # [ doc = "0: Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC2PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC2PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC2PE`" ]
pub type OC2PE_R = crate :: R < bool , OC2PE_A > ; impl OC2PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2PE_A { match self . bits { false => OC2PE_A :: DISABLED , true => OC2PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC2PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC2PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC2PE`" ]
pub struct OC2PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: DISABLED ) } # [ doc = "Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC2FE`" ]
pub type OC2FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2FE`" ]
pub struct OC2FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "0: CC2 channel is configured as output" ]
OUTPUT = 0 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC2S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC2S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC2S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC1CE`" ]
pub type OC1CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1CE`" ]
pub struct OC1CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output compare 1 mode" ]
pub type OC1M_A = OC2M_A ; # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , OC2M_A > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output compare 1 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC1PE_A { # [ doc = "0: Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC1PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC1PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , OC1PE_A > ; impl OC1PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC1PE_A { match self . bits { false => OC1PE_A :: DISABLED , true => OC1PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC1PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC1PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: DISABLED ) } # [ doc = "Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "0: CC1 channel is configured as output" ]
OUTPUT = 0 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC1S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC1S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC1S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & self ) -> OC2CE_R { OC2CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & self ) -> OC2M_R { OC2M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & self ) -> OC2PE_R { OC2PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & self ) -> OC2FE_R { OC2FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & self ) -> OC1CE_R { OC1CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 15 - Output compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & mut self ) -> OC2CE_W { OC2CE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & mut self ) -> OC2M_W { OC2M_W { w : self } } # [ doc = "Bit 11 - Output compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & mut self ) -> OC2PE_W { OC2PE_W { w : self } } # [ doc = "Bit 10 - Output compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & mut self ) -> OC2FE_W { OC2FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bit 7 - Output compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & mut self ) -> OC1CE_W { OC1CE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } # [ doc = "Bit 3 - Output compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register 1 (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC2F`" ]
pub type IC2F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2F`" ]
pub struct IC2F_W < 'a > { w : & 'a mut W , } impl < 'a > IC2F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC2PSC`" ]
pub type IC2PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2PSC`" ]
pub struct IC2PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC2PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "1: CC2 channel is configured as input, IC2 is mapped on TI2" ]
TI2 = 1 , # [ doc = "2: CC2 channel is configured as input, IC2 is mapped on TI1" ]
TI1 = 2 , # [ doc = "3: CC2 channel is configured as input, IC2 is mapped on TRC" ]
TRC = 3 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC2S_A :: TI2 ) , 2 => Val ( CC2S_A :: TI1 ) , 3 => Val ( CC2S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC2S_A :: TI2 } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC2S_A :: TI1 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC2S_A :: TRC } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI2 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI1 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Input capture 1 filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum IC1F_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < IC1F_A > for u8 { # [ inline ( always ) ]
fn from ( variant : IC1F_A ) -> Self { variant as _ } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , IC1F_A > ; impl IC1F_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IC1F_A { match self . bits { 0 => IC1F_A :: NOFILTER , 1 => IC1F_A :: FCK_INT_N2 , 2 => IC1F_A :: FCK_INT_N4 , 3 => IC1F_A :: FCK_INT_N8 , 4 => IC1F_A :: FDTS_DIV2_N6 , 5 => IC1F_A :: FDTS_DIV2_N8 , 6 => IC1F_A :: FDTS_DIV4_N6 , 7 => IC1F_A :: FDTS_DIV4_N8 , 8 => IC1F_A :: FDTS_DIV8_N6 , 9 => IC1F_A :: FDTS_DIV8_N8 , 10 => IC1F_A :: FDTS_DIV16_N5 , 11 => IC1F_A :: FDTS_DIV16_N6 , 12 => IC1F_A :: FDTS_DIV16_N8 , 13 => IC1F_A :: FDTS_DIV32_N5 , 14 => IC1F_A :: FDTS_DIV32_N6 , 15 => IC1F_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == IC1F_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IC1F_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( IC1F_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "1: CC1 channel is configured as input, IC1 is mapped on TI1" ]
TI1 = 1 , # [ doc = "2: CC1 channel is configured as input, IC1 is mapped on TI2" ]
TI2 = 2 , # [ doc = "3: CC1 channel is configured as input, IC1 is mapped on TRC" ]
TRC = 3 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC1S_A :: TI1 ) , 2 => Val ( CC1S_A :: TI2 ) , 3 => Val ( CC1S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC1S_A :: TI1 } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC1S_A :: TI2 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC1S_A :: TRC } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI1 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI2 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & self ) -> IC2F_R { IC2F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & self ) -> IC2PSC_R { IC2PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & mut self ) -> IC2F_W { IC2F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & mut self ) -> IC2PSC_W { IC2PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 2 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_output](ccmr2_output) module" ]
pub type CCMR2_OUTPUT = crate :: Reg < u32 , _CCMR2_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_OUTPUT ; # [ doc = "`read()` method returns [ccmr2_output::R](ccmr2_output::R) reader structure" ]
impl crate :: Readable for CCMR2_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_output::W](ccmr2_output::W) writer structure" ]
impl crate :: Writable for CCMR2_OUTPUT { } # [ doc = "capture/compare mode register 2 (output mode)" ]
pub mod ccmr2_output { # [ doc = "Reader of register CCMR2_Output" ]
pub type R = crate :: R < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Writer for register CCMR2_Output" ]
pub type W = crate :: W < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Register CCMR2_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC4CE`" ]
pub type OC4CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4CE`" ]
pub struct OC4CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output compare 4 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC4M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC4M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC4M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC4M`" ]
pub type OC4M_R = crate :: R < u8 , OC4M_A > ; impl OC4M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4M_A { match self . bits { 0 => OC4M_A :: FROZEN , 1 => OC4M_A :: ACTIVEONMATCH , 2 => OC4M_A :: INACTIVEONMATCH , 3 => OC4M_A :: TOGGLE , 4 => OC4M_A :: FORCEINACTIVE , 5 => OC4M_A :: FORCEACTIVE , 6 => OC4M_A :: PWMMODE1 , 7 => OC4M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC4M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC4M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC4M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC4M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC4M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC4M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC4M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC4M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC4M`" ]
pub struct OC4M_W < 'a > { w : & 'a mut W , } impl < 'a > OC4M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output compare 4 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC4PE_A { # [ doc = "0: Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC4PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC4PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC4PE`" ]
pub type OC4PE_R = crate :: R < bool , OC4PE_A > ; impl OC4PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4PE_A { match self . bits { false => OC4PE_A :: DISABLED , true => OC4PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC4PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC4PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC4PE`" ]
pub struct OC4PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: DISABLED ) } # [ doc = "Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC4FE`" ]
pub type OC4FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4FE`" ]
pub struct OC4FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "0: CC4 channel is configured as output" ]
OUTPUT = 0 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC4S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC4S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC4S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC3CE`" ]
pub type OC3CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3CE`" ]
pub struct OC3CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output compare 3 mode" ]
pub type OC3M_A = OC4M_A ; # [ doc = "Reader of field `OC3M`" ]
pub type OC3M_R = crate :: R < u8 , OC4M_A > ; # [ doc = "Write proxy for field `OC3M`" ]
pub struct OC3M_W < 'a > { w : & 'a mut W , } impl < 'a > OC3M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output compare 3 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC3PE_A { # [ doc = "0: Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC3PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC3PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC3PE`" ]
pub type OC3PE_R = crate :: R < bool , OC3PE_A > ; impl OC3PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC3PE_A { match self . bits { false => OC3PE_A :: DISABLED , true => OC3PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC3PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC3PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC3PE`" ]
pub struct OC3PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: DISABLED ) } # [ doc = "Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC3FE`" ]
pub type OC3FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3FE`" ]
pub struct OC3FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "0: CC3 channel is configured as output" ]
OUTPUT = 0 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC3S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC3S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC3S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & self ) -> OC4CE_R { OC4CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & self ) -> OC4M_R { OC4M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & self ) -> OC4PE_R { OC4PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & self ) -> OC4FE_R { OC4FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & self ) -> OC3CE_R { OC3CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & self ) -> OC3M_R { OC3M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & self ) -> OC3PE_R { OC3PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & self ) -> OC3FE_R { OC3FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & mut self ) -> OC4CE_W { OC4CE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & mut self ) -> OC4M_W { OC4M_W { w : self } } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & mut self ) -> OC4PE_W { OC4PE_W { w : self } } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & mut self ) -> OC4FE_W { OC4FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & mut self ) -> OC3CE_W { OC3CE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & mut self ) -> OC3M_W { OC3M_W { w : self } } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & mut self ) -> OC3PE_W { OC3PE_W { w : self } } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & mut self ) -> OC3FE_W { OC3FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } } } # [ doc = "capture/compare mode register 2 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_input](ccmr2_input) module" ]
pub type CCMR2_INPUT = crate :: Reg < u32 , _CCMR2_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_INPUT ; # [ doc = "`read()` method returns [ccmr2_input::R](ccmr2_input::R) reader structure" ]
impl crate :: Readable for CCMR2_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_input::W](ccmr2_input::W) writer structure" ]
impl crate :: Writable for CCMR2_INPUT { } # [ doc = "capture/compare mode register 2 (input mode)" ]
pub mod ccmr2_input { # [ doc = "Reader of register CCMR2_Input" ]
pub type R = crate :: R < u32 , super :: CCMR2_INPUT > ; # [ doc = "Writer for register CCMR2_Input" ]
pub type W = crate :: W < u32 , super :: CCMR2_INPUT > ; # [ doc = "Register CCMR2_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC4F`" ]
pub type IC4F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4F`" ]
pub struct IC4F_W < 'a > { w : & 'a mut W , } impl < 'a > IC4F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC4PSC`" ]
pub type IC4PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4PSC`" ]
pub struct IC4PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC4PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "1: CC4 channel is configured as input, IC4 is mapped on TI4" ]
TI4 = 1 , # [ doc = "2: CC4 channel is configured as input, IC4 is mapped on TI3" ]
TI3 = 2 , # [ doc = "3: CC4 channel is configured as input, IC4 is mapped on TRC" ]
TRC = 3 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC4S_A :: TI4 ) , 2 => Val ( CC4S_A :: TI3 ) , 3 => Val ( CC4S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC4S_A :: TI4 } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC4S_A :: TI3 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC4S_A :: TRC } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI4 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI3 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `IC3F`" ]
pub type IC3F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3F`" ]
pub struct IC3F_W < 'a > { w : & 'a mut W , } impl < 'a > IC3F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC3PSC`" ]
pub type IC3PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3PSC`" ]
pub struct IC3PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC3PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "1: CC3 channel is configured as input, IC3 is mapped on TI3" ]
TI3 = 1 , # [ doc = "2: CC3 channel is configured as input, IC3 is mapped on TI4" ]
TI4 = 2 , # [ doc = "3: CC3 channel is configured as input, IC3 is mapped on TRC" ]
TRC = 3 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC3S_A :: TI3 ) , 2 => Val ( CC3S_A :: TI4 ) , 3 => Val ( CC3S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC3S_A :: TI3 } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC3S_A :: TI4 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC3S_A :: TRC } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI3 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI4 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & self ) -> IC4F_R { IC4F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & self ) -> IC4PSC_R { IC4PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & self ) -> IC3F_R { IC3F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & self ) -> IC3PSC_R { IC3PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & mut self ) -> IC4F_W { IC4F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & mut self ) -> IC4PSC_W { IC4PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & mut self ) -> IC3F_W { IC3F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & mut self ) -> IC3PSC_W { IC3PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC2E`" ]
pub type CC2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2E`" ]
pub struct CC2E_W < 'a > { w : & 'a mut W , } impl < 'a > CC2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CC2P`" ]
pub type CC2P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2P`" ]
pub struct CC2P_W < 'a > { w : & 'a mut W , } impl < 'a > CC2P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2NP`" ]
pub type CC2NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2NP`" ]
pub struct CC2NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC2NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `CC3E`" ]
pub type CC3E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3E`" ]
pub struct CC3E_W < 'a > { w : & 'a mut W , } impl < 'a > CC3E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `CC3P`" ]
pub type CC3P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3P`" ]
pub struct CC3P_W < 'a > { w : & 'a mut W , } impl < 'a > CC3P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CC3NP`" ]
pub type CC3NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3NP`" ]
pub struct CC3NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC3NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `CC4E`" ]
pub type CC4E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4E`" ]
pub struct CC4E_W < 'a > { w : & 'a mut W , } impl < 'a > CC4E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `CC4P`" ]
pub type CC4P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4P`" ]
pub struct CC4P_W < 'a > { w : & 'a mut W , } impl < 'a > CC4P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `CC4NP`" ]
pub type CC4NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4NP`" ]
pub struct CC4NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC4NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & self ) -> CC2E_R { CC2E_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & self ) -> CC2P_R { CC2P_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & self ) -> CC2NP_R { CC2NP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & self ) -> CC3E_R { CC3E_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & self ) -> CC3P_R { CC3P_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & self ) -> CC3NP_R { CC3NP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & self ) -> CC4E_R { CC4E_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & self ) -> CC4P_R { CC4P_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & self ) -> CC4NP_R { CC4NP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & mut self ) -> CC2E_W { CC2E_W { w : self } } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & mut self ) -> CC2P_W { CC2P_W { w : self } } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & mut self ) -> CC2NP_W { CC2NP_W { w : self } } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & mut self ) -> CC3E_W { CC3E_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & mut self ) -> CC3P_W { CC3P_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & mut self ) -> CC3NP_W { CC3NP_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & mut self ) -> CC4E_W { CC4E_W { w : self } } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & mut self ) -> CC4P_W { CC4P_W { w : self } } # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & mut self ) -> CC4NP_W { CC4NP_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Low counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Low counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Low Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Low Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module" ]
pub type CCR = crate :: Reg < u32 , _CCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR ; # [ doc = "`read()` method returns [ccr::R](ccr::R) reader structure" ]
impl crate :: Readable for CCR { } # [ doc = "`write(|w| ..)` method takes [ccr::W](ccr::W) writer structure" ]
impl crate :: Writable for CCR { } # [ doc = "capture/compare register 1" ]
pub mod ccr { # [ doc = "Reader of register CCR%s" ]
pub type R = crate :: R < u32 , super :: CCR > ; # [ doc = "Writer for register CCR%s" ]
pub type W = crate :: W < u32 , super :: CCR > ; # [ doc = "Register CCR%s `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Low Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Low Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } } } # [ doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module" ]
pub type DCR = crate :: Reg < u32 , _DCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DCR ; # [ doc = "`read()` method returns [dcr::R](dcr::R) reader structure" ]
impl crate :: Readable for DCR { } # [ doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure" ]
impl crate :: Writable for DCR { } # [ doc = "DMA control register" ]
pub mod dcr { # [ doc = "Reader of register DCR" ]
pub type R = crate :: R < u32 , super :: DCR > ; # [ doc = "Writer for register DCR" ]
pub type W = crate :: W < u32 , super :: DCR > ; # [ doc = "Register DCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBL`" ]
pub type DBL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBL`" ]
pub struct DBL_W < 'a > { w : & 'a mut W , } impl < 'a > DBL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 8 ) ) | ( ( ( value as u32 ) & 0x1f ) << 8 ) ; self . w } } # [ doc = "Reader of field `DBA`" ]
pub type DBA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBA`" ]
pub struct DBA_W < 'a > { w : & 'a mut W , } impl < 'a > DBA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & self ) -> DBL_R { DBL_R :: new ( ( ( self . bits >> 8 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & self ) -> DBA_R { DBA_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & mut self ) -> DBL_W { DBL_W { w : self } } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & mut self ) -> DBA_W { DBA_W { w : self } } } } # [ doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module" ]
pub type DMAR = crate :: Reg < u32 , _DMAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DMAR ; # [ doc = "`read()` method returns [dmar::R](dmar::R) reader structure" ]
impl crate :: Readable for DMAR { } # [ doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure" ]
impl crate :: Writable for DMAR { } # [ doc = "DMA address for full transfer" ]
pub mod dmar { # [ doc = "Reader of register DMAR" ]
pub type R = crate :: R < u32 , super :: DMAR > ; # [ doc = "Writer for register DMAR" ]
pub type W = crate :: W < u32 , super :: DMAR > ; # [ doc = "Register DMAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DMAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAB`" ]
pub type DMAB_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DMAB`" ]
pub struct DMAB_W < 'a > { w : & 'a mut W , } impl < 'a > DMAB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & self ) -> DMAB_R { DMAB_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & mut self ) -> DMAB_W { DMAB_W { w : self } } } } # [ doc = "option register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [or](or) module" ]
pub type OR = crate :: Reg < u32 , _OR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OR ; # [ doc = "`read()` method returns [or::R](or::R) reader structure" ]
impl crate :: Readable for OR { } # [ doc = "`write(|w| ..)` method takes [or::W](or::W) writer structure" ]
impl crate :: Writable for OR { } # [ doc = "option register" ]
pub mod or { # [ doc = "Reader of register OR" ]
pub type R = crate :: R < u32 , super :: OR > ; # [ doc = "Writer for register OR" ]
pub type W = crate :: W < u32 , super :: OR > ; # [ doc = "Register OR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ITR1_RMP`" ]
pub type ITR1_RMP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ITR1_RMP`" ]
pub struct ITR1_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ITR1_RMP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } impl R { # [ doc = "Bits 10:11 - Internal trigger 1 remap" ]
# [ inline ( always ) ]
pub fn itr1_rmp ( & self ) -> ITR1_RMP_R { ITR1_RMP_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 10:11 - Internal trigger 1 remap" ]
# [ inline ( always ) ]
pub fn itr1_rmp ( & mut self ) -> ITR1_RMP_W { ITR1_RMP_W { w : self } } } } } # [ doc = "General purpose timer" ]
pub struct TIM5 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM5 { } impl TIM5 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim5 :: RegisterBlock { 0x4000_0c00 as * const _ } } impl Deref for TIM5 { type Target = tim5 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM5 :: ptr ( ) } } } # [ doc = "General purpose timer" ]
pub mod tim5 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - slave mode control register" ]
pub smcr : SMCR , # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_6_ccmr1 : [ u8 ; 4usize ]
, _reserved_7_ccmr2 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , _reserved12 : [ u8 ; 4usize ]
, # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR , # [ doc = "0x38 - capture/compare register 1" ]
pub ccr2 : CCR , # [ doc = "0x3c - capture/compare register 1" ]
pub ccr3 : CCR , # [ doc = "0x40 - capture/compare register 1" ]
pub ccr4 : CCR , _reserved16 : [ u8 ; 4usize ]
, # [ doc = "0x48 - DMA control register" ]
pub dcr : DCR , # [ doc = "0x4c - DMA address for full transfer" ]
pub dmar : DMAR , # [ doc = "0x50 - option register" ]
pub or : OR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input ( & self ) -> & CCMR2_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input_mut ( & self ) -> & mut CCMR2_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output ( & self ) -> & CCMR2_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output_mut ( & self ) -> & mut CCMR2_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Center-aligned mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CMS_A { # [ doc = "0: The counter counts up or down depending on the direction bit" ]
EDGEALIGNED = 0 , # [ doc = "1: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
CENTERALIGNED1 = 1 , # [ doc = "2: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
CENTERALIGNED2 = 2 , # [ doc = "3: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
CENTERALIGNED3 = 3 } impl From < CMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CMS`" ]
pub type CMS_R = crate :: R < u8 , CMS_A > ; impl CMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CMS_A { match self . bits { 0 => CMS_A :: EDGEALIGNED , 1 => CMS_A :: CENTERALIGNED1 , 2 => CMS_A :: CENTERALIGNED2 , 3 => CMS_A :: CENTERALIGNED3 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `EDGEALIGNED`" ]
# [ inline ( always ) ]
pub fn is_edge_aligned ( & self ) -> bool { * self == CMS_A :: EDGEALIGNED } # [ doc = "Checks if the value of the field is `CENTERALIGNED1`" ]
# [ inline ( always ) ]
pub fn is_center_aligned1 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED1 } # [ doc = "Checks if the value of the field is `CENTERALIGNED2`" ]
# [ inline ( always ) ]
pub fn is_center_aligned2 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED2 } # [ doc = "Checks if the value of the field is `CENTERALIGNED3`" ]
# [ inline ( always ) ]
pub fn is_center_aligned3 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED3 } } # [ doc = "Write proxy for field `CMS`" ]
pub struct CMS_W < 'a > { w : & 'a mut W , } impl < 'a > CMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The counter counts up or down depending on the direction bit" ]
# [ inline ( always ) ]
pub fn edge_aligned ( self ) -> & 'a mut W { self . variant ( CMS_A :: EDGEALIGNED ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
# [ inline ( always ) ]
pub fn center_aligned1 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED1 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
# [ inline ( always ) ]
pub fn center_aligned2 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED2 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
# [ inline ( always ) ]
pub fn center_aligned3 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED3 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Direction\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIR_A { # [ doc = "0: Counter used as upcounter" ]
UP = 0 , # [ doc = "1: Counter used as downcounter" ]
DOWN = 1 } impl From < DIR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIR`" ]
pub type DIR_R = crate :: R < bool , DIR_A > ; impl DIR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIR_A { match self . bits { false => DIR_A :: UP , true => DIR_A :: DOWN } } # [ doc = "Checks if the value of the field is `UP`" ]
# [ inline ( always ) ]
pub fn is_up ( & self ) -> bool { * self == DIR_A :: UP } # [ doc = "Checks if the value of the field is `DOWN`" ]
# [ inline ( always ) ]
pub fn is_down ( & self ) -> bool { * self == DIR_A :: DOWN } } # [ doc = "Write proxy for field `DIR`" ]
pub struct DIR_W < 'a > { w : & 'a mut W , } impl < 'a > DIR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter used as upcounter" ]
# [ inline ( always ) ]
pub fn up ( self ) -> & 'a mut W { self . variant ( DIR_A :: UP ) } # [ doc = "Counter used as downcounter" ]
# [ inline ( always ) ]
pub fn down ( self ) -> & 'a mut W { self . variant ( DIR_A :: DOWN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "One-pulse mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPM_A { # [ doc = "0: Counter is not stopped at update event" ]
DISABLED = 0 , # [ doc = "1: Counter stops counting at the next update event (clearing the CEN bit)" ]
ENABLED = 1 } impl From < OPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , OPM_A > ; impl OPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPM_A { match self . bits { false => OPM_A :: DISABLED , true => OPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPM_A :: ENABLED } } # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter is not stopped at update event" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: DISABLED ) } # [ doc = "Counter stops counting at the next update event (clearing the CEN bit)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & self ) -> CMS_R { CMS_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & self ) -> DIR_R { DIR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & mut self ) -> CMS_W { CMS_W { w : self } } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & mut self ) -> DIR_W { DIR_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "TI1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TI1S_A { # [ doc = "0: The TIMx_CH1 pin is connected to TI1 input" ]
NORMAL = 0 , # [ doc = "1: The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
XOR = 1 } impl From < TI1S_A > for bool { # [ inline ( always ) ]
fn from ( variant : TI1S_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TI1S`" ]
pub type TI1S_R = crate :: R < bool , TI1S_A > ; impl TI1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TI1S_A { match self . bits { false => TI1S_A :: NORMAL , true => TI1S_A :: XOR } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == TI1S_A :: NORMAL } # [ doc = "Checks if the value of the field is `XOR`" ]
# [ inline ( always ) ]
pub fn is_xor ( & self ) -> bool { * self == TI1S_A :: XOR } } # [ doc = "Write proxy for field `TI1S`" ]
pub struct TI1S_W < 'a > { w : & 'a mut W , } impl < 'a > TI1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TI1S_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIMx_CH1 pin is connected to TI1 input" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( TI1S_A :: NORMAL ) } # [ doc = "The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
# [ inline ( always ) ]
pub fn xor ( self ) -> & 'a mut W { self . variant ( TI1S_A :: XOR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Master mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MMS_A { # [ doc = "0: The UG bit from the TIMx_EGR register is used as trigger output" ]
RESET = 0 , # [ doc = "1: The counter enable signal, CNT_EN, is used as trigger output" ]
ENABLE = 1 , # [ doc = "2: The update event is selected as trigger output" ]
UPDATE = 2 , # [ doc = "3: The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
COMPAREPULSE = 3 , # [ doc = "4: OC1REF signal is used as trigger output" ]
COMPAREOC1 = 4 , # [ doc = "5: OC2REF signal is used as trigger output" ]
COMPAREOC2 = 5 , # [ doc = "6: OC3REF signal is used as trigger output" ]
COMPAREOC3 = 6 , # [ doc = "7: OC4REF signal is used as trigger output" ]
COMPAREOC4 = 7 } impl From < MMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MMS`" ]
pub type MMS_R = crate :: R < u8 , MMS_A > ; impl MMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MMS_A { match self . bits { 0 => MMS_A :: RESET , 1 => MMS_A :: ENABLE , 2 => MMS_A :: UPDATE , 3 => MMS_A :: COMPAREPULSE , 4 => MMS_A :: COMPAREOC1 , 5 => MMS_A :: COMPAREOC2 , 6 => MMS_A :: COMPAREOC3 , 7 => MMS_A :: COMPAREOC4 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == MMS_A :: RESET } # [ doc = "Checks if the value of the field is `ENABLE`" ]
# [ inline ( always ) ]
pub fn is_enable ( & self ) -> bool { * self == MMS_A :: ENABLE } # [ doc = "Checks if the value of the field is `UPDATE`" ]
# [ inline ( always ) ]
pub fn is_update ( & self ) -> bool { * self == MMS_A :: UPDATE } # [ doc = "Checks if the value of the field is `COMPAREPULSE`" ]
# [ inline ( always ) ]
pub fn is_compare_pulse ( & self ) -> bool { * self == MMS_A :: COMPAREPULSE } # [ doc = "Checks if the value of the field is `COMPAREOC1`" ]
# [ inline ( always ) ]
pub fn is_compare_oc1 ( & self ) -> bool { * self == MMS_A :: COMPAREOC1 } # [ doc = "Checks if the value of the field is `COMPAREOC2`" ]
# [ inline ( always ) ]
pub fn is_compare_oc2 ( & self ) -> bool { * self == MMS_A :: COMPAREOC2 } # [ doc = "Checks if the value of the field is `COMPAREOC3`" ]
# [ inline ( always ) ]
pub fn is_compare_oc3 ( & self ) -> bool { * self == MMS_A :: COMPAREOC3 } # [ doc = "Checks if the value of the field is `COMPAREOC4`" ]
# [ inline ( always ) ]
pub fn is_compare_oc4 ( & self ) -> bool { * self == MMS_A :: COMPAREOC4 } } # [ doc = "Write proxy for field `MMS`" ]
pub struct MMS_W < 'a > { w : & 'a mut W , } impl < 'a > MMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The UG bit from the TIMx_EGR register is used as trigger output" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( MMS_A :: RESET ) } # [ doc = "The counter enable signal, CNT_EN, is used as trigger output" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( MMS_A :: ENABLE ) } # [ doc = "The update event is selected as trigger output" ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( MMS_A :: UPDATE ) } # [ doc = "The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
# [ inline ( always ) ]
pub fn compare_pulse ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREPULSE ) } # [ doc = "OC1REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc1 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC1 ) } # [ doc = "OC2REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc2 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC2 ) } # [ doc = "OC3REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc3 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC3 ) } # [ doc = "OC4REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc4 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Capture/compare DMA selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CCDS_A { # [ doc = "0: CCx DMA request sent when CCx event occurs" ]
ONCOMPARE = 0 , # [ doc = "1: CCx DMA request sent when update event occurs" ]
ONUPDATE = 1 } impl From < CCDS_A > for bool { # [ inline ( always ) ]
fn from ( variant : CCDS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CCDS`" ]
pub type CCDS_R = crate :: R < bool , CCDS_A > ; impl CCDS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CCDS_A { match self . bits { false => CCDS_A :: ONCOMPARE , true => CCDS_A :: ONUPDATE } } # [ doc = "Checks if the value of the field is `ONCOMPARE`" ]
# [ inline ( always ) ]
pub fn is_on_compare ( & self ) -> bool { * self == CCDS_A :: ONCOMPARE } # [ doc = "Checks if the value of the field is `ONUPDATE`" ]
# [ inline ( always ) ]
pub fn is_on_update ( & self ) -> bool { * self == CCDS_A :: ONUPDATE } } # [ doc = "Write proxy for field `CCDS`" ]
pub struct CCDS_W < 'a > { w : & 'a mut W , } impl < 'a > CCDS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CCDS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request sent when CCx event occurs" ]
# [ inline ( always ) ]
pub fn on_compare ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONCOMPARE ) } # [ doc = "CCx DMA request sent when update event occurs" ]
# [ inline ( always ) ]
pub fn on_update ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONUPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } impl R { # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & self ) -> TI1S_R { TI1S_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & self ) -> MMS_R { MMS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & self ) -> CCDS_R { CCDS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & mut self ) -> TI1S_W { TI1S_W { w : self } } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & mut self ) -> MMS_W { MMS_W { w : self } } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & mut self ) -> CCDS_W { CCDS_W { w : self } } } } # [ doc = "slave mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcr](smcr) module" ]
pub type SMCR = crate :: Reg < u32 , _SMCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMCR ; # [ doc = "`read()` method returns [smcr::R](smcr::R) reader structure" ]
impl crate :: Readable for SMCR { } # [ doc = "`write(|w| ..)` method takes [smcr::W](smcr::W) writer structure" ]
impl crate :: Writable for SMCR { } # [ doc = "slave mode control register" ]
pub mod smcr { # [ doc = "Reader of register SMCR" ]
pub type R = crate :: R < u32 , super :: SMCR > ; # [ doc = "Writer for register SMCR" ]
pub type W = crate :: W < u32 , super :: SMCR > ; # [ doc = "Register SMCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "External trigger polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ETP_A { # [ doc = "0: ETR is noninverted, active at high level or rising edge" ]
NOTINVERTED = 0 , # [ doc = "1: ETR is inverted, active at low level or falling edge" ]
INVERTED = 1 } impl From < ETP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ETP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ETP`" ]
pub type ETP_R = crate :: R < bool , ETP_A > ; impl ETP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETP_A { match self . bits { false => ETP_A :: NOTINVERTED , true => ETP_A :: INVERTED } } # [ doc = "Checks if the value of the field is `NOTINVERTED`" ]
# [ inline ( always ) ]
pub fn is_not_inverted ( & self ) -> bool { * self == ETP_A :: NOTINVERTED } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == ETP_A :: INVERTED } } # [ doc = "Write proxy for field `ETP`" ]
pub struct ETP_W < 'a > { w : & 'a mut W , } impl < 'a > ETP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ETR is noninverted, active at high level or rising edge" ]
# [ inline ( always ) ]
pub fn not_inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: NOTINVERTED ) } # [ doc = "ETR is inverted, active at low level or falling edge" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "External clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ECE_A { # [ doc = "0: External clock mode 2 disabled" ]
DISABLED = 0 , # [ doc = "1: External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
ENABLED = 1 } impl From < ECE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ECE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ECE`" ]
pub type ECE_R = crate :: R < bool , ECE_A > ; impl ECE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ECE_A { match self . bits { false => ECE_A :: DISABLED , true => ECE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ECE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ECE_A :: ENABLED } } # [ doc = "Write proxy for field `ECE`" ]
pub struct ECE_W < 'a > { w : & 'a mut W , } impl < 'a > ECE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ECE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "External clock mode 2 disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: DISABLED ) } # [ doc = "External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "External trigger prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETPS_A { # [ doc = "0: Prescaler OFF" ]
DIV1 = 0 , # [ doc = "1: ETRP frequency divided by 2" ]
DIV2 = 1 , # [ doc = "2: ETRP frequency divided by 4" ]
DIV4 = 2 , # [ doc = "3: ETRP frequency divided by 8" ]
DIV8 = 3 } impl From < ETPS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETPS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETPS`" ]
pub type ETPS_R = crate :: R < u8 , ETPS_A > ; impl ETPS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETPS_A { match self . bits { 0 => ETPS_A :: DIV1 , 1 => ETPS_A :: DIV2 , 2 => ETPS_A :: DIV4 , 3 => ETPS_A :: DIV8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == ETPS_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == ETPS_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == ETPS_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == ETPS_A :: DIV8 } } # [ doc = "Write proxy for field `ETPS`" ]
pub struct ETPS_W < 'a > { w : & 'a mut W , } impl < 'a > ETPS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETPS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Prescaler OFF" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV1 ) } # [ doc = "ETRP frequency divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV2 ) } # [ doc = "ETRP frequency divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV4 ) } # [ doc = "ETRP frequency divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "External trigger filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETF_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < ETF_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETF_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETF`" ]
pub type ETF_R = crate :: R < u8 , ETF_A > ; impl ETF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETF_A { match self . bits { 0 => ETF_A :: NOFILTER , 1 => ETF_A :: FCK_INT_N2 , 2 => ETF_A :: FCK_INT_N4 , 3 => ETF_A :: FCK_INT_N8 , 4 => ETF_A :: FDTS_DIV2_N6 , 5 => ETF_A :: FDTS_DIV2_N8 , 6 => ETF_A :: FDTS_DIV4_N6 , 7 => ETF_A :: FDTS_DIV4_N8 , 8 => ETF_A :: FDTS_DIV8_N6 , 9 => ETF_A :: FDTS_DIV8_N8 , 10 => ETF_A :: FDTS_DIV16_N5 , 11 => ETF_A :: FDTS_DIV16_N6 , 12 => ETF_A :: FDTS_DIV16_N8 , 13 => ETF_A :: FDTS_DIV32_N5 , 14 => ETF_A :: FDTS_DIV32_N6 , 15 => ETF_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == ETF_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `ETF`" ]
pub struct ETF_W < 'a > { w : & 'a mut W , } impl < 'a > ETF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETF_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( ETF_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Master/Slave mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSM_A { # [ doc = "0: No action" ]
NOSYNC = 0 , # [ doc = "1: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
SYNC = 1 } impl From < MSM_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSM`" ]
pub type MSM_R = crate :: R < bool , MSM_A > ; impl MSM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSM_A { match self . bits { false => MSM_A :: NOSYNC , true => MSM_A :: SYNC } } # [ doc = "Checks if the value of the field is `NOSYNC`" ]
# [ inline ( always ) ]
pub fn is_no_sync ( & self ) -> bool { * self == MSM_A :: NOSYNC } # [ doc = "Checks if the value of the field is `SYNC`" ]
# [ inline ( always ) ]
pub fn is_sync ( & self ) -> bool { * self == MSM_A :: SYNC } } # [ doc = "Write proxy for field `MSM`" ]
pub struct MSM_W < 'a > { w : & 'a mut W , } impl < 'a > MSM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action" ]
# [ inline ( always ) ]
pub fn no_sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: NOSYNC ) } # [ doc = "The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
# [ inline ( always ) ]
pub fn sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: SYNC ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Trigger selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum TS_A { # [ doc = "0: Internal Trigger 0 (ITR0)" ]
ITR0 = 0 , # [ doc = "1: Internal Trigger 1 (ITR1)" ]
ITR1 = 1 , # [ doc = "2: Internal Trigger 2 (ITR2)" ]
ITR2 = 2 , # [ doc = "4: TI1 Edge Detector (TI1F_ED)" ]
TI1F_ED = 4 , # [ doc = "5: Filtered Timer Input 1 (TI1FP1)" ]
TI1FP1 = 5 , # [ doc = "6: Filtered Timer Input 2 (TI2FP2)" ]
TI2FP2 = 6 , # [ doc = "7: External Trigger input (ETRF)" ]
ETRF = 7 } impl From < TS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : TS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `TS`" ]
pub type TS_R = crate :: R < u8 , TS_A > ; impl TS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , TS_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( TS_A :: ITR0 ) , 1 => Val ( TS_A :: ITR1 ) , 2 => Val ( TS_A :: ITR2 ) , 4 => Val ( TS_A :: TI1F_ED ) , 5 => Val ( TS_A :: TI1FP1 ) , 6 => Val ( TS_A :: TI2FP2 ) , 7 => Val ( TS_A :: ETRF ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ITR0`" ]
# [ inline ( always ) ]
pub fn is_itr0 ( & self ) -> bool { * self == TS_A :: ITR0 } # [ doc = "Checks if the value of the field is `ITR1`" ]
# [ inline ( always ) ]
pub fn is_itr1 ( & self ) -> bool { * self == TS_A :: ITR1 } # [ doc = "Checks if the value of the field is `ITR2`" ]
# [ inline ( always ) ]
pub fn is_itr2 ( & self ) -> bool { * self == TS_A :: ITR2 } # [ doc = "Checks if the value of the field is `TI1F_ED`" ]
# [ inline ( always ) ]
pub fn is_ti1f_ed ( & self ) -> bool { * self == TS_A :: TI1F_ED } # [ doc = "Checks if the value of the field is `TI1FP1`" ]
# [ inline ( always ) ]
pub fn is_ti1fp1 ( & self ) -> bool { * self == TS_A :: TI1FP1 } # [ doc = "Checks if the value of the field is `TI2FP2`" ]
# [ inline ( always ) ]
pub fn is_ti2fp2 ( & self ) -> bool { * self == TS_A :: TI2FP2 } # [ doc = "Checks if the value of the field is `ETRF`" ]
# [ inline ( always ) ]
pub fn is_etrf ( & self ) -> bool { * self == TS_A :: ETRF } } # [ doc = "Write proxy for field `TS`" ]
pub struct TS_W < 'a > { w : & 'a mut W , } impl < 'a > TS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TS_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Internal Trigger 0 (ITR0)" ]
# [ inline ( always ) ]
pub fn itr0 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR0 ) } # [ doc = "Internal Trigger 1 (ITR1)" ]
# [ inline ( always ) ]
pub fn itr1 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR1 ) } # [ doc = "Internal Trigger 2 (ITR2)" ]
# [ inline ( always ) ]
pub fn itr2 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR2 ) } # [ doc = "TI1 Edge Detector (TI1F_ED)" ]
# [ inline ( always ) ]
pub fn ti1f_ed ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1F_ED ) } # [ doc = "Filtered Timer Input 1 (TI1FP1)" ]
# [ inline ( always ) ]
pub fn ti1fp1 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1FP1 ) } # [ doc = "Filtered Timer Input 2 (TI2FP2)" ]
# [ inline ( always ) ]
pub fn ti2fp2 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI2FP2 ) } # [ doc = "External Trigger input (ETRF)" ]
# [ inline ( always ) ]
pub fn etrf ( self ) -> & 'a mut W { self . variant ( TS_A :: ETRF ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Slave mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SMS_A { # [ doc = "0: Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
DISABLED = 0 , # [ doc = "1: Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
ENCODER_MODE_1 = 1 , # [ doc = "2: Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
ENCODER_MODE_2 = 2 , # [ doc = "3: Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
ENCODER_MODE_3 = 3 , # [ doc = "4: Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
RESET_MODE = 4 , # [ doc = "5: Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
GATED_MODE = 5 , # [ doc = "6: Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
TRIGGER_MODE = 6 , # [ doc = "7: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
EXT_CLOCK_MODE = 7 } impl From < SMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SMS`" ]
pub type SMS_R = crate :: R < u8 , SMS_A > ; impl SMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMS_A { match self . bits { 0 => SMS_A :: DISABLED , 1 => SMS_A :: ENCODER_MODE_1 , 2 => SMS_A :: ENCODER_MODE_2 , 3 => SMS_A :: ENCODER_MODE_3 , 4 => SMS_A :: RESET_MODE , 5 => SMS_A :: GATED_MODE , 6 => SMS_A :: TRIGGER_MODE , 7 => SMS_A :: EXT_CLOCK_MODE , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SMS_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENCODER_MODE_1`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_1 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_1 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_2`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_2 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_2 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_3`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_3 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_3 } # [ doc = "Checks if the value of the field is `RESET_MODE`" ]
# [ inline ( always ) ]
pub fn is_reset_mode ( & self ) -> bool { * self == SMS_A :: RESET_MODE } # [ doc = "Checks if the value of the field is `GATED_MODE`" ]
# [ inline ( always ) ]
pub fn is_gated_mode ( & self ) -> bool { * self == SMS_A :: GATED_MODE } # [ doc = "Checks if the value of the field is `TRIGGER_MODE`" ]
# [ inline ( always ) ]
pub fn is_trigger_mode ( & self ) -> bool { * self == SMS_A :: TRIGGER_MODE } # [ doc = "Checks if the value of the field is `EXT_CLOCK_MODE`" ]
# [ inline ( always ) ]
pub fn is_ext_clock_mode ( & self ) -> bool { * self == SMS_A :: EXT_CLOCK_MODE } } # [ doc = "Write proxy for field `SMS`" ]
pub struct SMS_W < 'a > { w : & 'a mut W , } impl < 'a > SMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SMS_A :: DISABLED ) } # [ doc = "Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_1 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_1 ) } # [ doc = "Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_2 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_2 ) } # [ doc = "Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
# [ inline ( always ) ]
pub fn encoder_mode_3 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_3 ) } # [ doc = "Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn reset_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: RESET_MODE ) } # [ doc = "Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
# [ inline ( always ) ]
pub fn gated_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: GATED_MODE ) } # [ doc = "Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
# [ inline ( always ) ]
pub fn trigger_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: TRIGGER_MODE ) } # [ doc = "External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
# [ inline ( always ) ]
pub fn ext_clock_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: EXT_CLOCK_MODE ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } impl R { # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & self ) -> ETP_R { ETP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & self ) -> ECE_R { ECE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & self ) -> ETPS_R { ETPS_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & self ) -> ETF_R { ETF_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & self ) -> MSM_R { MSM_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & self ) -> TS_R { TS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & self ) -> SMS_R { SMS_R :: new ( ( self . bits & 0x07 ) as u8 ) } } impl W { # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & mut self ) -> ETP_W { ETP_W { w : self } } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & mut self ) -> ECE_W { ECE_W { w : self } } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & mut self ) -> ETPS_W { ETPS_W { w : self } } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & mut self ) -> ETF_W { ETF_W { w : self } } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & mut self ) -> MSM_W { MSM_W { w : self } } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & mut self ) -> TS_W { TS_W { w : self } } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & mut self ) -> SMS_W { SMS_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Trigger DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TDE_A { # [ doc = "0: Trigger DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger DMA request enabled" ]
ENABLED = 1 } impl From < TDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TDE`" ]
pub type TDE_R = crate :: R < bool , TDE_A > ; impl TDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TDE_A { match self . bits { false => TDE_A :: DISABLED , true => TDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TDE_A :: ENABLED } } # [ doc = "Write proxy for field `TDE`" ]
pub struct TDE_W < 'a > { w : & 'a mut W , } impl < 'a > TDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: DISABLED ) } # [ doc = "Trigger DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Capture/Compare 4 DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4DE_A { # [ doc = "0: CCx DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: CCx DMA request enabled" ]
ENABLED = 1 } impl From < CC4DE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4DE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4DE`" ]
pub type CC4DE_R = crate :: R < bool , CC4DE_A > ; impl CC4DE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4DE_A { match self . bits { false => CC4DE_A :: DISABLED , true => CC4DE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4DE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4DE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4DE`" ]
pub struct CC4DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Capture/Compare 3 DMA request enable" ]
pub type CC3DE_A = CC4DE_A ; # [ doc = "Reader of field `CC3DE`" ]
pub type CC3DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC3DE`" ]
pub struct CC3DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/Compare 2 DMA request enable" ]
pub type CC2DE_A = CC4DE_A ; # [ doc = "Reader of field `CC2DE`" ]
pub type CC2DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC2DE`" ]
pub struct CC2DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 1 DMA request enable" ]
pub type CC1DE_A = CC4DE_A ; # [ doc = "Reader of field `CC1DE`" ]
pub type CC1DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC1DE`" ]
pub struct CC1DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Update DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDE_A { # [ doc = "0: Update DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Update DMA request enabled" ]
ENABLED = 1 } impl From < UDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDE`" ]
pub type UDE_R = crate :: R < bool , UDE_A > ; impl UDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDE_A { match self . bits { false => UDE_A :: DISABLED , true => UDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDE_A :: ENABLED } } # [ doc = "Write proxy for field `UDE`" ]
pub struct UDE_W < 'a > { w : & 'a mut W , } impl < 'a > UDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: DISABLED ) } # [ doc = "Update DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Trigger interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIE_A { # [ doc = "0: Trigger interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger interrupt enabled" ]
ENABLED = 1 } impl From < TIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIE`" ]
pub type TIE_R = crate :: R < bool , TIE_A > ; impl TIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIE_A { match self . bits { false => TIE_A :: DISABLED , true => TIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TIE_A :: ENABLED } } # [ doc = "Write proxy for field `TIE`" ]
pub struct TIE_W < 'a > { w : & 'a mut W , } impl < 'a > TIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: DISABLED ) } # [ doc = "Trigger interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IE_A { # [ doc = "0: CCx interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: CCx interrupt enabled" ]
ENABLED = 1 } impl From < CC4IE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4IE`" ]
pub type CC4IE_R = crate :: R < bool , CC4IE_A > ; impl CC4IE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4IE_A { match self . bits { false => CC4IE_A :: DISABLED , true => CC4IE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4IE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4IE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4IE`" ]
pub struct CC4IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt enable" ]
pub type CC3IE_A = CC4IE_A ; # [ doc = "Reader of field `CC3IE`" ]
pub type CC3IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC3IE`" ]
pub struct CC3IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt enable" ]
pub type CC2IE_A = CC4IE_A ; # [ doc = "Reader of field `CC2IE`" ]
pub type CC2IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC2IE`" ]
pub struct CC2IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 interrupt enable" ]
pub type CC1IE_A = CC4IE_A ; # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & self ) -> TDE_R { TDE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & self ) -> CC4DE_R { CC4DE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & self ) -> CC3DE_R { CC3DE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & self ) -> CC2DE_R { CC2DE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & self ) -> CC1DE_R { CC1DE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & self ) -> UDE_R { UDE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & self ) -> TIE_R { TIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & self ) -> CC4IE_R { CC4IE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & self ) -> CC3IE_R { CC3IE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & self ) -> CC2IE_R { CC2IE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & mut self ) -> TDE_W { TDE_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & mut self ) -> CC4DE_W { CC4DE_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & mut self ) -> CC3DE_W { CC3DE_W { w : self } } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & mut self ) -> CC2DE_W { CC2DE_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & mut self ) -> CC1DE_W { CC1DE_W { w : self } } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & mut self ) -> UDE_W { UDE_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & mut self ) -> TIE_W { TIE_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & mut self ) -> CC4IE_W { CC4IE_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & mut self ) -> CC3IE_W { CC3IE_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & mut self ) -> CC2IE_W { CC2IE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Capture/Compare 4 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4OF_A { # [ doc = "1: The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set" ]
OVERCAPTURE = 1 } impl From < CC4OF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4OF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4OF`" ]
pub type CC4OF_R = crate :: R < bool , CC4OF_A > ; impl CC4OF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC4OF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC4OF_A :: OVERCAPTURE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OVERCAPTURE`" ]
# [ inline ( always ) ]
pub fn is_overcapture ( & self ) -> bool { * self == CC4OF_A :: OVERCAPTURE } } # [ doc = "Capture/Compare 4 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4OF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC4OF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4OF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4OF`" ]
pub struct CC4OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_A = CC4OF_A ; # [ doc = "Reader of field `CC3OF`" ]
pub type CC3OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC3OF`" ]
pub struct CC3OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_A = CC4OF_A ; # [ doc = "Reader of field `CC2OF`" ]
pub type CC2OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC2OF`" ]
pub struct CC2OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 1 overcapture flag" ]
pub type CC1OF_A = CC4OF_A ; # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/Compare 1 overcapture flag" ]
pub type CC1OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_A { # [ doc = "0: No trigger event occurred" ]
NOTRIGGER = 0 , # [ doc = "1: Trigger interrupt pending" ]
TRIGGER = 1 } impl From < TIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIF`" ]
pub type TIF_R = crate :: R < bool , TIF_A > ; impl TIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIF_A { match self . bits { false => TIF_A :: NOTRIGGER , true => TIF_A :: TRIGGER } } # [ doc = "Checks if the value of the field is `NOTRIGGER`" ]
# [ inline ( always ) ]
pub fn is_no_trigger ( & self ) -> bool { * self == TIF_A :: NOTRIGGER } # [ doc = "Checks if the value of the field is `TRIGGER`" ]
# [ inline ( always ) ]
pub fn is_trigger ( & self ) -> bool { * self == TIF_A :: TRIGGER } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < TIF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TIF`" ]
pub struct TIF_W < 'a > { w : & 'a mut W , } impl < 'a > TIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TIF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IF_A { # [ doc = "1: If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register." ]
MATCH = 1 } impl From < CC4IF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4IF`" ]
pub type CC4IF_R = crate :: R < bool , CC4IF_A > ; impl CC4IF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC4IF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC4IF_A :: MATCH ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == CC4IF_A :: MATCH } } # [ doc = "Capture/Compare 4 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC4IF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4IF`" ]
pub struct CC4IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_A = CC4IF_A ; # [ doc = "Reader of field `CC3IF`" ]
pub type CC3IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC3IF`" ]
pub struct CC3IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_A = CC4IF_A ; # [ doc = "Reader of field `CC2IF`" ]
pub type CC2IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC2IF`" ]
pub struct CC2IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 1 interrupt flag" ]
pub type CC1IF_A = CC4IF_A ; # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/compare 1 interrupt flag" ]
pub type CC1IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & self ) -> CC4OF_R { CC4OF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & self ) -> CC3OF_R { CC3OF_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & self ) -> CC2OF_R { CC2OF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & self ) -> TIF_R { TIF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & self ) -> CC4IF_R { CC4IF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & self ) -> CC3IF_R { CC3IF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & self ) -> CC2IF_R { CC2IF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & mut self ) -> CC4OF_W { CC4OF_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & mut self ) -> CC3OF_W { CC3OF_W { w : self } } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & mut self ) -> CC2OF_W { CC2OF_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & mut self ) -> TIF_W { TIF_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & mut self ) -> CC4IF_W { CC4IF_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & mut self ) -> CC3IF_W { CC3IF_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & mut self ) -> CC2IF_W { CC2IF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Trigger generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TG_AW { # [ doc = "1: The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
TRIGGER = 1 } impl From < TG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TG`" ]
pub struct TG_W < 'a > { w : & 'a mut W , } impl < 'a > TG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( TG_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/compare 4 generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4G_AW { # [ doc = "1: If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
TRIGGER = 1 } impl From < CC4G_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4G_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4G`" ]
pub struct CC4G_W < 'a > { w : & 'a mut W , } impl < 'a > CC4G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/compare 3 generation" ]
pub type CC3G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC3G`" ]
pub struct CC3G_W < 'a > { w : & 'a mut W , } impl < 'a > CC3G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/compare 2 generation" ]
pub type CC2G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC2G`" ]
pub struct CC2G_W < 'a > { w : & 'a mut W , } impl < 'a > CC2G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 1 generation" ]
pub type CC1G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 6 - Trigger generation" ]
# [ inline ( always ) ]
pub fn tg ( & mut self ) -> TG_W { TG_W { w : self } } # [ doc = "Bit 4 - Capture/compare 4 generation" ]
# [ inline ( always ) ]
pub fn cc4g ( & mut self ) -> CC4G_W { CC4G_W { w : self } } # [ doc = "Bit 3 - Capture/compare 3 generation" ]
# [ inline ( always ) ]
pub fn cc3g ( & mut self ) -> CC3G_W { CC3G_W { w : self } } # [ doc = "Bit 2 - Capture/compare 2 generation" ]
# [ inline ( always ) ]
pub fn cc2g ( & mut self ) -> CC2G_W { CC2G_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "capture/compare mode register 1 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register 1 (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC2CE`" ]
pub type OC2CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2CE`" ]
pub struct OC2CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output compare 2 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC2M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC2M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC2M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC2M`" ]
pub type OC2M_R = crate :: R < u8 , OC2M_A > ; impl OC2M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2M_A { match self . bits { 0 => OC2M_A :: FROZEN , 1 => OC2M_A :: ACTIVEONMATCH , 2 => OC2M_A :: INACTIVEONMATCH , 3 => OC2M_A :: TOGGLE , 4 => OC2M_A :: FORCEINACTIVE , 5 => OC2M_A :: FORCEACTIVE , 6 => OC2M_A :: PWMMODE1 , 7 => OC2M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC2M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC2M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC2M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC2M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC2M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC2M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC2M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC2M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC2M`" ]
pub struct OC2M_W < 'a > { w : & 'a mut W , } impl < 'a > OC2M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output compare 2 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC2PE_A { # [ doc = "0: Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC2PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC2PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC2PE`" ]
pub type OC2PE_R = crate :: R < bool , OC2PE_A > ; impl OC2PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2PE_A { match self . bits { false => OC2PE_A :: DISABLED , true => OC2PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC2PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC2PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC2PE`" ]
pub struct OC2PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: DISABLED ) } # [ doc = "Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC2FE`" ]
pub type OC2FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2FE`" ]
pub struct OC2FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "0: CC2 channel is configured as output" ]
OUTPUT = 0 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC2S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC2S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC2S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC1CE`" ]
pub type OC1CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1CE`" ]
pub struct OC1CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output compare 1 mode" ]
pub type OC1M_A = OC2M_A ; # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , OC2M_A > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output compare 1 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC1PE_A { # [ doc = "0: Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC1PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC1PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , OC1PE_A > ; impl OC1PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC1PE_A { match self . bits { false => OC1PE_A :: DISABLED , true => OC1PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC1PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC1PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: DISABLED ) } # [ doc = "Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "0: CC1 channel is configured as output" ]
OUTPUT = 0 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC1S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC1S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC1S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & self ) -> OC2CE_R { OC2CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & self ) -> OC2M_R { OC2M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & self ) -> OC2PE_R { OC2PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & self ) -> OC2FE_R { OC2FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & self ) -> OC1CE_R { OC1CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 15 - Output compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & mut self ) -> OC2CE_W { OC2CE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & mut self ) -> OC2M_W { OC2M_W { w : self } } # [ doc = "Bit 11 - Output compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & mut self ) -> OC2PE_W { OC2PE_W { w : self } } # [ doc = "Bit 10 - Output compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & mut self ) -> OC2FE_W { OC2FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bit 7 - Output compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & mut self ) -> OC1CE_W { OC1CE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } # [ doc = "Bit 3 - Output compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register 1 (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC2F`" ]
pub type IC2F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2F`" ]
pub struct IC2F_W < 'a > { w : & 'a mut W , } impl < 'a > IC2F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC2PSC`" ]
pub type IC2PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2PSC`" ]
pub struct IC2PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC2PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "1: CC2 channel is configured as input, IC2 is mapped on TI2" ]
TI2 = 1 , # [ doc = "2: CC2 channel is configured as input, IC2 is mapped on TI1" ]
TI1 = 2 , # [ doc = "3: CC2 channel is configured as input, IC2 is mapped on TRC" ]
TRC = 3 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC2S_A :: TI2 ) , 2 => Val ( CC2S_A :: TI1 ) , 3 => Val ( CC2S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC2S_A :: TI2 } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC2S_A :: TI1 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC2S_A :: TRC } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI2 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI1 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Input capture 1 filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum IC1F_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < IC1F_A > for u8 { # [ inline ( always ) ]
fn from ( variant : IC1F_A ) -> Self { variant as _ } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , IC1F_A > ; impl IC1F_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IC1F_A { match self . bits { 0 => IC1F_A :: NOFILTER , 1 => IC1F_A :: FCK_INT_N2 , 2 => IC1F_A :: FCK_INT_N4 , 3 => IC1F_A :: FCK_INT_N8 , 4 => IC1F_A :: FDTS_DIV2_N6 , 5 => IC1F_A :: FDTS_DIV2_N8 , 6 => IC1F_A :: FDTS_DIV4_N6 , 7 => IC1F_A :: FDTS_DIV4_N8 , 8 => IC1F_A :: FDTS_DIV8_N6 , 9 => IC1F_A :: FDTS_DIV8_N8 , 10 => IC1F_A :: FDTS_DIV16_N5 , 11 => IC1F_A :: FDTS_DIV16_N6 , 12 => IC1F_A :: FDTS_DIV16_N8 , 13 => IC1F_A :: FDTS_DIV32_N5 , 14 => IC1F_A :: FDTS_DIV32_N6 , 15 => IC1F_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == IC1F_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IC1F_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( IC1F_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "1: CC1 channel is configured as input, IC1 is mapped on TI1" ]
TI1 = 1 , # [ doc = "2: CC1 channel is configured as input, IC1 is mapped on TI2" ]
TI2 = 2 , # [ doc = "3: CC1 channel is configured as input, IC1 is mapped on TRC" ]
TRC = 3 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC1S_A :: TI1 ) , 2 => Val ( CC1S_A :: TI2 ) , 3 => Val ( CC1S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC1S_A :: TI1 } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC1S_A :: TI2 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC1S_A :: TRC } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI1 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI2 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & self ) -> IC2F_R { IC2F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & self ) -> IC2PSC_R { IC2PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & mut self ) -> IC2F_W { IC2F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & mut self ) -> IC2PSC_W { IC2PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 2 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_output](ccmr2_output) module" ]
pub type CCMR2_OUTPUT = crate :: Reg < u32 , _CCMR2_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_OUTPUT ; # [ doc = "`read()` method returns [ccmr2_output::R](ccmr2_output::R) reader structure" ]
impl crate :: Readable for CCMR2_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_output::W](ccmr2_output::W) writer structure" ]
impl crate :: Writable for CCMR2_OUTPUT { } # [ doc = "capture/compare mode register 2 (output mode)" ]
pub mod ccmr2_output { # [ doc = "Reader of register CCMR2_Output" ]
pub type R = crate :: R < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Writer for register CCMR2_Output" ]
pub type W = crate :: W < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Register CCMR2_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC4CE`" ]
pub type OC4CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4CE`" ]
pub struct OC4CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output compare 4 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC4M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC4M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC4M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC4M`" ]
pub type OC4M_R = crate :: R < u8 , OC4M_A > ; impl OC4M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4M_A { match self . bits { 0 => OC4M_A :: FROZEN , 1 => OC4M_A :: ACTIVEONMATCH , 2 => OC4M_A :: INACTIVEONMATCH , 3 => OC4M_A :: TOGGLE , 4 => OC4M_A :: FORCEINACTIVE , 5 => OC4M_A :: FORCEACTIVE , 6 => OC4M_A :: PWMMODE1 , 7 => OC4M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC4M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC4M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC4M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC4M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC4M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC4M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC4M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC4M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC4M`" ]
pub struct OC4M_W < 'a > { w : & 'a mut W , } impl < 'a > OC4M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output compare 4 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC4PE_A { # [ doc = "0: Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC4PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC4PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC4PE`" ]
pub type OC4PE_R = crate :: R < bool , OC4PE_A > ; impl OC4PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4PE_A { match self . bits { false => OC4PE_A :: DISABLED , true => OC4PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC4PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC4PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC4PE`" ]
pub struct OC4PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: DISABLED ) } # [ doc = "Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC4FE`" ]
pub type OC4FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4FE`" ]
pub struct OC4FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "0: CC4 channel is configured as output" ]
OUTPUT = 0 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC4S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC4S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC4S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC3CE`" ]
pub type OC3CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3CE`" ]
pub struct OC3CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output compare 3 mode" ]
pub type OC3M_A = OC4M_A ; # [ doc = "Reader of field `OC3M`" ]
pub type OC3M_R = crate :: R < u8 , OC4M_A > ; # [ doc = "Write proxy for field `OC3M`" ]
pub struct OC3M_W < 'a > { w : & 'a mut W , } impl < 'a > OC3M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output compare 3 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC3PE_A { # [ doc = "0: Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC3PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC3PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC3PE`" ]
pub type OC3PE_R = crate :: R < bool , OC3PE_A > ; impl OC3PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC3PE_A { match self . bits { false => OC3PE_A :: DISABLED , true => OC3PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC3PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC3PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC3PE`" ]
pub struct OC3PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: DISABLED ) } # [ doc = "Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC3FE`" ]
pub type OC3FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3FE`" ]
pub struct OC3FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "0: CC3 channel is configured as output" ]
OUTPUT = 0 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC3S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC3S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC3S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & self ) -> OC4CE_R { OC4CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & self ) -> OC4M_R { OC4M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & self ) -> OC4PE_R { OC4PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & self ) -> OC4FE_R { OC4FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & self ) -> OC3CE_R { OC3CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & self ) -> OC3M_R { OC3M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & self ) -> OC3PE_R { OC3PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & self ) -> OC3FE_R { OC3FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & mut self ) -> OC4CE_W { OC4CE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & mut self ) -> OC4M_W { OC4M_W { w : self } } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & mut self ) -> OC4PE_W { OC4PE_W { w : self } } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & mut self ) -> OC4FE_W { OC4FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & mut self ) -> OC3CE_W { OC3CE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & mut self ) -> OC3M_W { OC3M_W { w : self } } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & mut self ) -> OC3PE_W { OC3PE_W { w : self } } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & mut self ) -> OC3FE_W { OC3FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } } } # [ doc = "capture/compare mode register 2 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_input](ccmr2_input) module" ]
pub type CCMR2_INPUT = crate :: Reg < u32 , _CCMR2_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_INPUT ; # [ doc = "`read()` method returns [ccmr2_input::R](ccmr2_input::R) reader structure" ]
impl crate :: Readable for CCMR2_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_input::W](ccmr2_input::W) writer structure" ]
impl crate :: Writable for CCMR2_INPUT { } # [ doc = "capture/compare mode register 2 (input mode)" ]
pub mod ccmr2_input { # [ doc = "Reader of register CCMR2_Input" ]
pub type R = crate :: R < u32 , super :: CCMR2_INPUT > ; # [ doc = "Writer for register CCMR2_Input" ]
pub type W = crate :: W < u32 , super :: CCMR2_INPUT > ; # [ doc = "Register CCMR2_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC4F`" ]
pub type IC4F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4F`" ]
pub struct IC4F_W < 'a > { w : & 'a mut W , } impl < 'a > IC4F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC4PSC`" ]
pub type IC4PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4PSC`" ]
pub struct IC4PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC4PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "1: CC4 channel is configured as input, IC4 is mapped on TI4" ]
TI4 = 1 , # [ doc = "2: CC4 channel is configured as input, IC4 is mapped on TI3" ]
TI3 = 2 , # [ doc = "3: CC4 channel is configured as input, IC4 is mapped on TRC" ]
TRC = 3 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC4S_A :: TI4 ) , 2 => Val ( CC4S_A :: TI3 ) , 3 => Val ( CC4S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC4S_A :: TI4 } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC4S_A :: TI3 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC4S_A :: TRC } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI4 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI3 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `IC3F`" ]
pub type IC3F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3F`" ]
pub struct IC3F_W < 'a > { w : & 'a mut W , } impl < 'a > IC3F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC3PSC`" ]
pub type IC3PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3PSC`" ]
pub struct IC3PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC3PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "1: CC3 channel is configured as input, IC3 is mapped on TI3" ]
TI3 = 1 , # [ doc = "2: CC3 channel is configured as input, IC3 is mapped on TI4" ]
TI4 = 2 , # [ doc = "3: CC3 channel is configured as input, IC3 is mapped on TRC" ]
TRC = 3 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC3S_A :: TI3 ) , 2 => Val ( CC3S_A :: TI4 ) , 3 => Val ( CC3S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC3S_A :: TI3 } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC3S_A :: TI4 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC3S_A :: TRC } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI3 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI4 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & self ) -> IC4F_R { IC4F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & self ) -> IC4PSC_R { IC4PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & self ) -> IC3F_R { IC3F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & self ) -> IC3PSC_R { IC3PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & mut self ) -> IC4F_W { IC4F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & mut self ) -> IC4PSC_W { IC4PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & mut self ) -> IC3F_W { IC3F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & mut self ) -> IC3PSC_W { IC3PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC2E`" ]
pub type CC2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2E`" ]
pub struct CC2E_W < 'a > { w : & 'a mut W , } impl < 'a > CC2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CC2P`" ]
pub type CC2P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2P`" ]
pub struct CC2P_W < 'a > { w : & 'a mut W , } impl < 'a > CC2P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2NP`" ]
pub type CC2NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2NP`" ]
pub struct CC2NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC2NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `CC3E`" ]
pub type CC3E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3E`" ]
pub struct CC3E_W < 'a > { w : & 'a mut W , } impl < 'a > CC3E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `CC3P`" ]
pub type CC3P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3P`" ]
pub struct CC3P_W < 'a > { w : & 'a mut W , } impl < 'a > CC3P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CC3NP`" ]
pub type CC3NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3NP`" ]
pub struct CC3NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC3NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `CC4E`" ]
pub type CC4E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4E`" ]
pub struct CC4E_W < 'a > { w : & 'a mut W , } impl < 'a > CC4E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `CC4P`" ]
pub type CC4P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4P`" ]
pub struct CC4P_W < 'a > { w : & 'a mut W , } impl < 'a > CC4P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `CC4NP`" ]
pub type CC4NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4NP`" ]
pub struct CC4NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC4NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & self ) -> CC2E_R { CC2E_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & self ) -> CC2P_R { CC2P_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & self ) -> CC2NP_R { CC2NP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & self ) -> CC3E_R { CC3E_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & self ) -> CC3P_R { CC3P_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & self ) -> CC3NP_R { CC3NP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & self ) -> CC4E_R { CC4E_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & self ) -> CC4P_R { CC4P_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & self ) -> CC4NP_R { CC4NP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & mut self ) -> CC2E_W { CC2E_W { w : self } } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & mut self ) -> CC2P_W { CC2P_W { w : self } } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & mut self ) -> CC2NP_W { CC2NP_W { w : self } } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & mut self ) -> CC3E_W { CC3E_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & mut self ) -> CC3P_W { CC3P_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & mut self ) -> CC3NP_W { CC3NP_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & mut self ) -> CC4E_W { CC4E_W { w : self } } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & mut self ) -> CC4P_W { CC4P_W { w : self } } # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & mut self ) -> CC4NP_W { CC4NP_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Low counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Low counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Low Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Low Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module" ]
pub type CCR = crate :: Reg < u32 , _CCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR ; # [ doc = "`read()` method returns [ccr::R](ccr::R) reader structure" ]
impl crate :: Readable for CCR { } # [ doc = "`write(|w| ..)` method takes [ccr::W](ccr::W) writer structure" ]
impl crate :: Writable for CCR { } # [ doc = "capture/compare register 1" ]
pub mod ccr { # [ doc = "Reader of register CCR%s" ]
pub type R = crate :: R < u32 , super :: CCR > ; # [ doc = "Writer for register CCR%s" ]
pub type W = crate :: W < u32 , super :: CCR > ; # [ doc = "Register CCR%s `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - Low Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - Low Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } } } # [ doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module" ]
pub type DCR = crate :: Reg < u32 , _DCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DCR ; # [ doc = "`read()` method returns [dcr::R](dcr::R) reader structure" ]
impl crate :: Readable for DCR { } # [ doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure" ]
impl crate :: Writable for DCR { } # [ doc = "DMA control register" ]
pub mod dcr { # [ doc = "Reader of register DCR" ]
pub type R = crate :: R < u32 , super :: DCR > ; # [ doc = "Writer for register DCR" ]
pub type W = crate :: W < u32 , super :: DCR > ; # [ doc = "Register DCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBL`" ]
pub type DBL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBL`" ]
pub struct DBL_W < 'a > { w : & 'a mut W , } impl < 'a > DBL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 8 ) ) | ( ( ( value as u32 ) & 0x1f ) << 8 ) ; self . w } } # [ doc = "Reader of field `DBA`" ]
pub type DBA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBA`" ]
pub struct DBA_W < 'a > { w : & 'a mut W , } impl < 'a > DBA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & self ) -> DBL_R { DBL_R :: new ( ( ( self . bits >> 8 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & self ) -> DBA_R { DBA_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & mut self ) -> DBL_W { DBL_W { w : self } } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & mut self ) -> DBA_W { DBA_W { w : self } } } } # [ doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module" ]
pub type DMAR = crate :: Reg < u32 , _DMAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DMAR ; # [ doc = "`read()` method returns [dmar::R](dmar::R) reader structure" ]
impl crate :: Readable for DMAR { } # [ doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure" ]
impl crate :: Writable for DMAR { } # [ doc = "DMA address for full transfer" ]
pub mod dmar { # [ doc = "Reader of register DMAR" ]
pub type R = crate :: R < u32 , super :: DMAR > ; # [ doc = "Writer for register DMAR" ]
pub type W = crate :: W < u32 , super :: DMAR > ; # [ doc = "Register DMAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DMAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAB`" ]
pub type DMAB_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DMAB`" ]
pub struct DMAB_W < 'a > { w : & 'a mut W , } impl < 'a > DMAB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & self ) -> DMAB_R { DMAB_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & mut self ) -> DMAB_W { DMAB_W { w : self } } } } # [ doc = "option register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [or](or) module" ]
pub type OR = crate :: Reg < u32 , _OR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OR ; # [ doc = "`read()` method returns [or::R](or::R) reader structure" ]
impl crate :: Readable for OR { } # [ doc = "`write(|w| ..)` method takes [or::W](or::W) writer structure" ]
impl crate :: Writable for OR { } # [ doc = "option register" ]
pub mod or { # [ doc = "Reader of register OR" ]
pub type R = crate :: R < u32 , super :: OR > ; # [ doc = "Writer for register OR" ]
pub type W = crate :: W < u32 , super :: OR > ; # [ doc = "Register OR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IT4_RMP`" ]
pub type IT4_RMP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IT4_RMP`" ]
pub struct IT4_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > IT4_RMP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } impl R { # [ doc = "Bits 6:7 - Timer Input 4 remap" ]
# [ inline ( always ) ]
pub fn it4_rmp ( & self ) -> IT4_RMP_R { IT4_RMP_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 6:7 - Timer Input 4 remap" ]
# [ inline ( always ) ]
pub fn it4_rmp ( & mut self ) -> IT4_RMP_W { IT4_RMP_W { w : self } } } } } # [ doc = "General purpose timer" ]
pub struct TIM3 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM3 { } impl TIM3 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim3 :: RegisterBlock { 0x4000_0400 as * const _ } } impl Deref for TIM3 { type Target = tim3 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM3 :: ptr ( ) } } } # [ doc = "General purpose timer" ]
pub mod tim3 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - slave mode control register" ]
pub smcr : SMCR , # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_6_ccmr1 : [ u8 ; 4usize ]
, _reserved_7_ccmr2 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , _reserved12 : [ u8 ; 4usize ]
, # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR , # [ doc = "0x38 - capture/compare register 1" ]
pub ccr2 : CCR , # [ doc = "0x3c - capture/compare register 1" ]
pub ccr3 : CCR , # [ doc = "0x40 - capture/compare register 1" ]
pub ccr4 : CCR , _reserved16 : [ u8 ; 4usize ]
, # [ doc = "0x48 - DMA control register" ]
pub dcr : DCR , # [ doc = "0x4c - DMA address for full transfer" ]
pub dmar : DMAR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input ( & self ) -> & CCMR2_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input_mut ( & self ) -> & mut CCMR2_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output ( & self ) -> & CCMR2_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output_mut ( & self ) -> & mut CCMR2_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Center-aligned mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CMS_A { # [ doc = "0: The counter counts up or down depending on the direction bit" ]
EDGEALIGNED = 0 , # [ doc = "1: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
CENTERALIGNED1 = 1 , # [ doc = "2: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
CENTERALIGNED2 = 2 , # [ doc = "3: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
CENTERALIGNED3 = 3 } impl From < CMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CMS`" ]
pub type CMS_R = crate :: R < u8 , CMS_A > ; impl CMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CMS_A { match self . bits { 0 => CMS_A :: EDGEALIGNED , 1 => CMS_A :: CENTERALIGNED1 , 2 => CMS_A :: CENTERALIGNED2 , 3 => CMS_A :: CENTERALIGNED3 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `EDGEALIGNED`" ]
# [ inline ( always ) ]
pub fn is_edge_aligned ( & self ) -> bool { * self == CMS_A :: EDGEALIGNED } # [ doc = "Checks if the value of the field is `CENTERALIGNED1`" ]
# [ inline ( always ) ]
pub fn is_center_aligned1 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED1 } # [ doc = "Checks if the value of the field is `CENTERALIGNED2`" ]
# [ inline ( always ) ]
pub fn is_center_aligned2 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED2 } # [ doc = "Checks if the value of the field is `CENTERALIGNED3`" ]
# [ inline ( always ) ]
pub fn is_center_aligned3 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED3 } } # [ doc = "Write proxy for field `CMS`" ]
pub struct CMS_W < 'a > { w : & 'a mut W , } impl < 'a > CMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The counter counts up or down depending on the direction bit" ]
# [ inline ( always ) ]
pub fn edge_aligned ( self ) -> & 'a mut W { self . variant ( CMS_A :: EDGEALIGNED ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
# [ inline ( always ) ]
pub fn center_aligned1 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED1 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
# [ inline ( always ) ]
pub fn center_aligned2 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED2 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
# [ inline ( always ) ]
pub fn center_aligned3 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED3 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Direction\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIR_A { # [ doc = "0: Counter used as upcounter" ]
UP = 0 , # [ doc = "1: Counter used as downcounter" ]
DOWN = 1 } impl From < DIR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIR`" ]
pub type DIR_R = crate :: R < bool , DIR_A > ; impl DIR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIR_A { match self . bits { false => DIR_A :: UP , true => DIR_A :: DOWN } } # [ doc = "Checks if the value of the field is `UP`" ]
# [ inline ( always ) ]
pub fn is_up ( & self ) -> bool { * self == DIR_A :: UP } # [ doc = "Checks if the value of the field is `DOWN`" ]
# [ inline ( always ) ]
pub fn is_down ( & self ) -> bool { * self == DIR_A :: DOWN } } # [ doc = "Write proxy for field `DIR`" ]
pub struct DIR_W < 'a > { w : & 'a mut W , } impl < 'a > DIR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter used as upcounter" ]
# [ inline ( always ) ]
pub fn up ( self ) -> & 'a mut W { self . variant ( DIR_A :: UP ) } # [ doc = "Counter used as downcounter" ]
# [ inline ( always ) ]
pub fn down ( self ) -> & 'a mut W { self . variant ( DIR_A :: DOWN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "One-pulse mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPM_A { # [ doc = "0: Counter is not stopped at update event" ]
DISABLED = 0 , # [ doc = "1: Counter stops counting at the next update event (clearing the CEN bit)" ]
ENABLED = 1 } impl From < OPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , OPM_A > ; impl OPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPM_A { match self . bits { false => OPM_A :: DISABLED , true => OPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPM_A :: ENABLED } } # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter is not stopped at update event" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: DISABLED ) } # [ doc = "Counter stops counting at the next update event (clearing the CEN bit)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & self ) -> CMS_R { CMS_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & self ) -> DIR_R { DIR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & mut self ) -> CMS_W { CMS_W { w : self } } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & mut self ) -> DIR_W { DIR_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "TI1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TI1S_A { # [ doc = "0: The TIMx_CH1 pin is connected to TI1 input" ]
NORMAL = 0 , # [ doc = "1: The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
XOR = 1 } impl From < TI1S_A > for bool { # [ inline ( always ) ]
fn from ( variant : TI1S_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TI1S`" ]
pub type TI1S_R = crate :: R < bool , TI1S_A > ; impl TI1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TI1S_A { match self . bits { false => TI1S_A :: NORMAL , true => TI1S_A :: XOR } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == TI1S_A :: NORMAL } # [ doc = "Checks if the value of the field is `XOR`" ]
# [ inline ( always ) ]
pub fn is_xor ( & self ) -> bool { * self == TI1S_A :: XOR } } # [ doc = "Write proxy for field `TI1S`" ]
pub struct TI1S_W < 'a > { w : & 'a mut W , } impl < 'a > TI1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TI1S_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIMx_CH1 pin is connected to TI1 input" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( TI1S_A :: NORMAL ) } # [ doc = "The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
# [ inline ( always ) ]
pub fn xor ( self ) -> & 'a mut W { self . variant ( TI1S_A :: XOR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Master mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MMS_A { # [ doc = "0: The UG bit from the TIMx_EGR register is used as trigger output" ]
RESET = 0 , # [ doc = "1: The counter enable signal, CNT_EN, is used as trigger output" ]
ENABLE = 1 , # [ doc = "2: The update event is selected as trigger output" ]
UPDATE = 2 , # [ doc = "3: The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
COMPAREPULSE = 3 , # [ doc = "4: OC1REF signal is used as trigger output" ]
COMPAREOC1 = 4 , # [ doc = "5: OC2REF signal is used as trigger output" ]
COMPAREOC2 = 5 , # [ doc = "6: OC3REF signal is used as trigger output" ]
COMPAREOC3 = 6 , # [ doc = "7: OC4REF signal is used as trigger output" ]
COMPAREOC4 = 7 } impl From < MMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MMS`" ]
pub type MMS_R = crate :: R < u8 , MMS_A > ; impl MMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MMS_A { match self . bits { 0 => MMS_A :: RESET , 1 => MMS_A :: ENABLE , 2 => MMS_A :: UPDATE , 3 => MMS_A :: COMPAREPULSE , 4 => MMS_A :: COMPAREOC1 , 5 => MMS_A :: COMPAREOC2 , 6 => MMS_A :: COMPAREOC3 , 7 => MMS_A :: COMPAREOC4 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == MMS_A :: RESET } # [ doc = "Checks if the value of the field is `ENABLE`" ]
# [ inline ( always ) ]
pub fn is_enable ( & self ) -> bool { * self == MMS_A :: ENABLE } # [ doc = "Checks if the value of the field is `UPDATE`" ]
# [ inline ( always ) ]
pub fn is_update ( & self ) -> bool { * self == MMS_A :: UPDATE } # [ doc = "Checks if the value of the field is `COMPAREPULSE`" ]
# [ inline ( always ) ]
pub fn is_compare_pulse ( & self ) -> bool { * self == MMS_A :: COMPAREPULSE } # [ doc = "Checks if the value of the field is `COMPAREOC1`" ]
# [ inline ( always ) ]
pub fn is_compare_oc1 ( & self ) -> bool { * self == MMS_A :: COMPAREOC1 } # [ doc = "Checks if the value of the field is `COMPAREOC2`" ]
# [ inline ( always ) ]
pub fn is_compare_oc2 ( & self ) -> bool { * self == MMS_A :: COMPAREOC2 } # [ doc = "Checks if the value of the field is `COMPAREOC3`" ]
# [ inline ( always ) ]
pub fn is_compare_oc3 ( & self ) -> bool { * self == MMS_A :: COMPAREOC3 } # [ doc = "Checks if the value of the field is `COMPAREOC4`" ]
# [ inline ( always ) ]
pub fn is_compare_oc4 ( & self ) -> bool { * self == MMS_A :: COMPAREOC4 } } # [ doc = "Write proxy for field `MMS`" ]
pub struct MMS_W < 'a > { w : & 'a mut W , } impl < 'a > MMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The UG bit from the TIMx_EGR register is used as trigger output" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( MMS_A :: RESET ) } # [ doc = "The counter enable signal, CNT_EN, is used as trigger output" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( MMS_A :: ENABLE ) } # [ doc = "The update event is selected as trigger output" ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( MMS_A :: UPDATE ) } # [ doc = "The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
# [ inline ( always ) ]
pub fn compare_pulse ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREPULSE ) } # [ doc = "OC1REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc1 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC1 ) } # [ doc = "OC2REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc2 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC2 ) } # [ doc = "OC3REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc3 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC3 ) } # [ doc = "OC4REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc4 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Capture/compare DMA selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CCDS_A { # [ doc = "0: CCx DMA request sent when CCx event occurs" ]
ONCOMPARE = 0 , # [ doc = "1: CCx DMA request sent when update event occurs" ]
ONUPDATE = 1 } impl From < CCDS_A > for bool { # [ inline ( always ) ]
fn from ( variant : CCDS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CCDS`" ]
pub type CCDS_R = crate :: R < bool , CCDS_A > ; impl CCDS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CCDS_A { match self . bits { false => CCDS_A :: ONCOMPARE , true => CCDS_A :: ONUPDATE } } # [ doc = "Checks if the value of the field is `ONCOMPARE`" ]
# [ inline ( always ) ]
pub fn is_on_compare ( & self ) -> bool { * self == CCDS_A :: ONCOMPARE } # [ doc = "Checks if the value of the field is `ONUPDATE`" ]
# [ inline ( always ) ]
pub fn is_on_update ( & self ) -> bool { * self == CCDS_A :: ONUPDATE } } # [ doc = "Write proxy for field `CCDS`" ]
pub struct CCDS_W < 'a > { w : & 'a mut W , } impl < 'a > CCDS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CCDS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request sent when CCx event occurs" ]
# [ inline ( always ) ]
pub fn on_compare ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONCOMPARE ) } # [ doc = "CCx DMA request sent when update event occurs" ]
# [ inline ( always ) ]
pub fn on_update ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONUPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } impl R { # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & self ) -> TI1S_R { TI1S_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & self ) -> MMS_R { MMS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & self ) -> CCDS_R { CCDS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & mut self ) -> TI1S_W { TI1S_W { w : self } } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & mut self ) -> MMS_W { MMS_W { w : self } } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & mut self ) -> CCDS_W { CCDS_W { w : self } } } } # [ doc = "slave mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcr](smcr) module" ]
pub type SMCR = crate :: Reg < u32 , _SMCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMCR ; # [ doc = "`read()` method returns [smcr::R](smcr::R) reader structure" ]
impl crate :: Readable for SMCR { } # [ doc = "`write(|w| ..)` method takes [smcr::W](smcr::W) writer structure" ]
impl crate :: Writable for SMCR { } # [ doc = "slave mode control register" ]
pub mod smcr { # [ doc = "Reader of register SMCR" ]
pub type R = crate :: R < u32 , super :: SMCR > ; # [ doc = "Writer for register SMCR" ]
pub type W = crate :: W < u32 , super :: SMCR > ; # [ doc = "Register SMCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "External trigger polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ETP_A { # [ doc = "0: ETR is noninverted, active at high level or rising edge" ]
NOTINVERTED = 0 , # [ doc = "1: ETR is inverted, active at low level or falling edge" ]
INVERTED = 1 } impl From < ETP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ETP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ETP`" ]
pub type ETP_R = crate :: R < bool , ETP_A > ; impl ETP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETP_A { match self . bits { false => ETP_A :: NOTINVERTED , true => ETP_A :: INVERTED } } # [ doc = "Checks if the value of the field is `NOTINVERTED`" ]
# [ inline ( always ) ]
pub fn is_not_inverted ( & self ) -> bool { * self == ETP_A :: NOTINVERTED } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == ETP_A :: INVERTED } } # [ doc = "Write proxy for field `ETP`" ]
pub struct ETP_W < 'a > { w : & 'a mut W , } impl < 'a > ETP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ETR is noninverted, active at high level or rising edge" ]
# [ inline ( always ) ]
pub fn not_inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: NOTINVERTED ) } # [ doc = "ETR is inverted, active at low level or falling edge" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "External clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ECE_A { # [ doc = "0: External clock mode 2 disabled" ]
DISABLED = 0 , # [ doc = "1: External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
ENABLED = 1 } impl From < ECE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ECE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ECE`" ]
pub type ECE_R = crate :: R < bool , ECE_A > ; impl ECE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ECE_A { match self . bits { false => ECE_A :: DISABLED , true => ECE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ECE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ECE_A :: ENABLED } } # [ doc = "Write proxy for field `ECE`" ]
pub struct ECE_W < 'a > { w : & 'a mut W , } impl < 'a > ECE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ECE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "External clock mode 2 disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: DISABLED ) } # [ doc = "External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "External trigger prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETPS_A { # [ doc = "0: Prescaler OFF" ]
DIV1 = 0 , # [ doc = "1: ETRP frequency divided by 2" ]
DIV2 = 1 , # [ doc = "2: ETRP frequency divided by 4" ]
DIV4 = 2 , # [ doc = "3: ETRP frequency divided by 8" ]
DIV8 = 3 } impl From < ETPS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETPS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETPS`" ]
pub type ETPS_R = crate :: R < u8 , ETPS_A > ; impl ETPS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETPS_A { match self . bits { 0 => ETPS_A :: DIV1 , 1 => ETPS_A :: DIV2 , 2 => ETPS_A :: DIV4 , 3 => ETPS_A :: DIV8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == ETPS_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == ETPS_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == ETPS_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == ETPS_A :: DIV8 } } # [ doc = "Write proxy for field `ETPS`" ]
pub struct ETPS_W < 'a > { w : & 'a mut W , } impl < 'a > ETPS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETPS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Prescaler OFF" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV1 ) } # [ doc = "ETRP frequency divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV2 ) } # [ doc = "ETRP frequency divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV4 ) } # [ doc = "ETRP frequency divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "External trigger filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETF_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < ETF_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETF_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETF`" ]
pub type ETF_R = crate :: R < u8 , ETF_A > ; impl ETF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETF_A { match self . bits { 0 => ETF_A :: NOFILTER , 1 => ETF_A :: FCK_INT_N2 , 2 => ETF_A :: FCK_INT_N4 , 3 => ETF_A :: FCK_INT_N8 , 4 => ETF_A :: FDTS_DIV2_N6 , 5 => ETF_A :: FDTS_DIV2_N8 , 6 => ETF_A :: FDTS_DIV4_N6 , 7 => ETF_A :: FDTS_DIV4_N8 , 8 => ETF_A :: FDTS_DIV8_N6 , 9 => ETF_A :: FDTS_DIV8_N8 , 10 => ETF_A :: FDTS_DIV16_N5 , 11 => ETF_A :: FDTS_DIV16_N6 , 12 => ETF_A :: FDTS_DIV16_N8 , 13 => ETF_A :: FDTS_DIV32_N5 , 14 => ETF_A :: FDTS_DIV32_N6 , 15 => ETF_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == ETF_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `ETF`" ]
pub struct ETF_W < 'a > { w : & 'a mut W , } impl < 'a > ETF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETF_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( ETF_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Master/Slave mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSM_A { # [ doc = "0: No action" ]
NOSYNC = 0 , # [ doc = "1: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
SYNC = 1 } impl From < MSM_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSM`" ]
pub type MSM_R = crate :: R < bool , MSM_A > ; impl MSM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSM_A { match self . bits { false => MSM_A :: NOSYNC , true => MSM_A :: SYNC } } # [ doc = "Checks if the value of the field is `NOSYNC`" ]
# [ inline ( always ) ]
pub fn is_no_sync ( & self ) -> bool { * self == MSM_A :: NOSYNC } # [ doc = "Checks if the value of the field is `SYNC`" ]
# [ inline ( always ) ]
pub fn is_sync ( & self ) -> bool { * self == MSM_A :: SYNC } } # [ doc = "Write proxy for field `MSM`" ]
pub struct MSM_W < 'a > { w : & 'a mut W , } impl < 'a > MSM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action" ]
# [ inline ( always ) ]
pub fn no_sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: NOSYNC ) } # [ doc = "The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
# [ inline ( always ) ]
pub fn sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: SYNC ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Trigger selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum TS_A { # [ doc = "0: Internal Trigger 0 (ITR0)" ]
ITR0 = 0 , # [ doc = "1: Internal Trigger 1 (ITR1)" ]
ITR1 = 1 , # [ doc = "2: Internal Trigger 2 (ITR2)" ]
ITR2 = 2 , # [ doc = "4: TI1 Edge Detector (TI1F_ED)" ]
TI1F_ED = 4 , # [ doc = "5: Filtered Timer Input 1 (TI1FP1)" ]
TI1FP1 = 5 , # [ doc = "6: Filtered Timer Input 2 (TI2FP2)" ]
TI2FP2 = 6 , # [ doc = "7: External Trigger input (ETRF)" ]
ETRF = 7 } impl From < TS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : TS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `TS`" ]
pub type TS_R = crate :: R < u8 , TS_A > ; impl TS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , TS_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( TS_A :: ITR0 ) , 1 => Val ( TS_A :: ITR1 ) , 2 => Val ( TS_A :: ITR2 ) , 4 => Val ( TS_A :: TI1F_ED ) , 5 => Val ( TS_A :: TI1FP1 ) , 6 => Val ( TS_A :: TI2FP2 ) , 7 => Val ( TS_A :: ETRF ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ITR0`" ]
# [ inline ( always ) ]
pub fn is_itr0 ( & self ) -> bool { * self == TS_A :: ITR0 } # [ doc = "Checks if the value of the field is `ITR1`" ]
# [ inline ( always ) ]
pub fn is_itr1 ( & self ) -> bool { * self == TS_A :: ITR1 } # [ doc = "Checks if the value of the field is `ITR2`" ]
# [ inline ( always ) ]
pub fn is_itr2 ( & self ) -> bool { * self == TS_A :: ITR2 } # [ doc = "Checks if the value of the field is `TI1F_ED`" ]
# [ inline ( always ) ]
pub fn is_ti1f_ed ( & self ) -> bool { * self == TS_A :: TI1F_ED } # [ doc = "Checks if the value of the field is `TI1FP1`" ]
# [ inline ( always ) ]
pub fn is_ti1fp1 ( & self ) -> bool { * self == TS_A :: TI1FP1 } # [ doc = "Checks if the value of the field is `TI2FP2`" ]
# [ inline ( always ) ]
pub fn is_ti2fp2 ( & self ) -> bool { * self == TS_A :: TI2FP2 } # [ doc = "Checks if the value of the field is `ETRF`" ]
# [ inline ( always ) ]
pub fn is_etrf ( & self ) -> bool { * self == TS_A :: ETRF } } # [ doc = "Write proxy for field `TS`" ]
pub struct TS_W < 'a > { w : & 'a mut W , } impl < 'a > TS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TS_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Internal Trigger 0 (ITR0)" ]
# [ inline ( always ) ]
pub fn itr0 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR0 ) } # [ doc = "Internal Trigger 1 (ITR1)" ]
# [ inline ( always ) ]
pub fn itr1 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR1 ) } # [ doc = "Internal Trigger 2 (ITR2)" ]
# [ inline ( always ) ]
pub fn itr2 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR2 ) } # [ doc = "TI1 Edge Detector (TI1F_ED)" ]
# [ inline ( always ) ]
pub fn ti1f_ed ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1F_ED ) } # [ doc = "Filtered Timer Input 1 (TI1FP1)" ]
# [ inline ( always ) ]
pub fn ti1fp1 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1FP1 ) } # [ doc = "Filtered Timer Input 2 (TI2FP2)" ]
# [ inline ( always ) ]
pub fn ti2fp2 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI2FP2 ) } # [ doc = "External Trigger input (ETRF)" ]
# [ inline ( always ) ]
pub fn etrf ( self ) -> & 'a mut W { self . variant ( TS_A :: ETRF ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Slave mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SMS_A { # [ doc = "0: Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
DISABLED = 0 , # [ doc = "1: Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
ENCODER_MODE_1 = 1 , # [ doc = "2: Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
ENCODER_MODE_2 = 2 , # [ doc = "3: Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
ENCODER_MODE_3 = 3 , # [ doc = "4: Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
RESET_MODE = 4 , # [ doc = "5: Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
GATED_MODE = 5 , # [ doc = "6: Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
TRIGGER_MODE = 6 , # [ doc = "7: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
EXT_CLOCK_MODE = 7 } impl From < SMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SMS`" ]
pub type SMS_R = crate :: R < u8 , SMS_A > ; impl SMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMS_A { match self . bits { 0 => SMS_A :: DISABLED , 1 => SMS_A :: ENCODER_MODE_1 , 2 => SMS_A :: ENCODER_MODE_2 , 3 => SMS_A :: ENCODER_MODE_3 , 4 => SMS_A :: RESET_MODE , 5 => SMS_A :: GATED_MODE , 6 => SMS_A :: TRIGGER_MODE , 7 => SMS_A :: EXT_CLOCK_MODE , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SMS_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENCODER_MODE_1`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_1 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_1 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_2`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_2 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_2 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_3`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_3 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_3 } # [ doc = "Checks if the value of the field is `RESET_MODE`" ]
# [ inline ( always ) ]
pub fn is_reset_mode ( & self ) -> bool { * self == SMS_A :: RESET_MODE } # [ doc = "Checks if the value of the field is `GATED_MODE`" ]
# [ inline ( always ) ]
pub fn is_gated_mode ( & self ) -> bool { * self == SMS_A :: GATED_MODE } # [ doc = "Checks if the value of the field is `TRIGGER_MODE`" ]
# [ inline ( always ) ]
pub fn is_trigger_mode ( & self ) -> bool { * self == SMS_A :: TRIGGER_MODE } # [ doc = "Checks if the value of the field is `EXT_CLOCK_MODE`" ]
# [ inline ( always ) ]
pub fn is_ext_clock_mode ( & self ) -> bool { * self == SMS_A :: EXT_CLOCK_MODE } } # [ doc = "Write proxy for field `SMS`" ]
pub struct SMS_W < 'a > { w : & 'a mut W , } impl < 'a > SMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SMS_A :: DISABLED ) } # [ doc = "Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_1 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_1 ) } # [ doc = "Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_2 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_2 ) } # [ doc = "Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
# [ inline ( always ) ]
pub fn encoder_mode_3 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_3 ) } # [ doc = "Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn reset_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: RESET_MODE ) } # [ doc = "Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
# [ inline ( always ) ]
pub fn gated_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: GATED_MODE ) } # [ doc = "Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
# [ inline ( always ) ]
pub fn trigger_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: TRIGGER_MODE ) } # [ doc = "External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
# [ inline ( always ) ]
pub fn ext_clock_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: EXT_CLOCK_MODE ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } impl R { # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & self ) -> ETP_R { ETP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & self ) -> ECE_R { ECE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & self ) -> ETPS_R { ETPS_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & self ) -> ETF_R { ETF_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & self ) -> MSM_R { MSM_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & self ) -> TS_R { TS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & self ) -> SMS_R { SMS_R :: new ( ( self . bits & 0x07 ) as u8 ) } } impl W { # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & mut self ) -> ETP_W { ETP_W { w : self } } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & mut self ) -> ECE_W { ECE_W { w : self } } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & mut self ) -> ETPS_W { ETPS_W { w : self } } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & mut self ) -> ETF_W { ETF_W { w : self } } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & mut self ) -> MSM_W { MSM_W { w : self } } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & mut self ) -> TS_W { TS_W { w : self } } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & mut self ) -> SMS_W { SMS_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Trigger DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TDE_A { # [ doc = "0: Trigger DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger DMA request enabled" ]
ENABLED = 1 } impl From < TDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TDE`" ]
pub type TDE_R = crate :: R < bool , TDE_A > ; impl TDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TDE_A { match self . bits { false => TDE_A :: DISABLED , true => TDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TDE_A :: ENABLED } } # [ doc = "Write proxy for field `TDE`" ]
pub struct TDE_W < 'a > { w : & 'a mut W , } impl < 'a > TDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: DISABLED ) } # [ doc = "Trigger DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Capture/Compare 4 DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4DE_A { # [ doc = "0: CCx DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: CCx DMA request enabled" ]
ENABLED = 1 } impl From < CC4DE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4DE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4DE`" ]
pub type CC4DE_R = crate :: R < bool , CC4DE_A > ; impl CC4DE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4DE_A { match self . bits { false => CC4DE_A :: DISABLED , true => CC4DE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4DE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4DE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4DE`" ]
pub struct CC4DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Capture/Compare 3 DMA request enable" ]
pub type CC3DE_A = CC4DE_A ; # [ doc = "Reader of field `CC3DE`" ]
pub type CC3DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC3DE`" ]
pub struct CC3DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/Compare 2 DMA request enable" ]
pub type CC2DE_A = CC4DE_A ; # [ doc = "Reader of field `CC2DE`" ]
pub type CC2DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC2DE`" ]
pub struct CC2DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 1 DMA request enable" ]
pub type CC1DE_A = CC4DE_A ; # [ doc = "Reader of field `CC1DE`" ]
pub type CC1DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC1DE`" ]
pub struct CC1DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Update DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDE_A { # [ doc = "0: Update DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Update DMA request enabled" ]
ENABLED = 1 } impl From < UDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDE`" ]
pub type UDE_R = crate :: R < bool , UDE_A > ; impl UDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDE_A { match self . bits { false => UDE_A :: DISABLED , true => UDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDE_A :: ENABLED } } # [ doc = "Write proxy for field `UDE`" ]
pub struct UDE_W < 'a > { w : & 'a mut W , } impl < 'a > UDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: DISABLED ) } # [ doc = "Update DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Trigger interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIE_A { # [ doc = "0: Trigger interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger interrupt enabled" ]
ENABLED = 1 } impl From < TIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIE`" ]
pub type TIE_R = crate :: R < bool , TIE_A > ; impl TIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIE_A { match self . bits { false => TIE_A :: DISABLED , true => TIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TIE_A :: ENABLED } } # [ doc = "Write proxy for field `TIE`" ]
pub struct TIE_W < 'a > { w : & 'a mut W , } impl < 'a > TIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: DISABLED ) } # [ doc = "Trigger interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IE_A { # [ doc = "0: CCx interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: CCx interrupt enabled" ]
ENABLED = 1 } impl From < CC4IE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4IE`" ]
pub type CC4IE_R = crate :: R < bool , CC4IE_A > ; impl CC4IE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4IE_A { match self . bits { false => CC4IE_A :: DISABLED , true => CC4IE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4IE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4IE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4IE`" ]
pub struct CC4IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt enable" ]
pub type CC3IE_A = CC4IE_A ; # [ doc = "Reader of field `CC3IE`" ]
pub type CC3IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC3IE`" ]
pub struct CC3IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt enable" ]
pub type CC2IE_A = CC4IE_A ; # [ doc = "Reader of field `CC2IE`" ]
pub type CC2IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC2IE`" ]
pub struct CC2IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 interrupt enable" ]
pub type CC1IE_A = CC4IE_A ; # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & self ) -> TDE_R { TDE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & self ) -> CC4DE_R { CC4DE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & self ) -> CC3DE_R { CC3DE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & self ) -> CC2DE_R { CC2DE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & self ) -> CC1DE_R { CC1DE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & self ) -> UDE_R { UDE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & self ) -> TIE_R { TIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & self ) -> CC4IE_R { CC4IE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & self ) -> CC3IE_R { CC3IE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & self ) -> CC2IE_R { CC2IE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & mut self ) -> TDE_W { TDE_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & mut self ) -> CC4DE_W { CC4DE_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & mut self ) -> CC3DE_W { CC3DE_W { w : self } } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & mut self ) -> CC2DE_W { CC2DE_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & mut self ) -> CC1DE_W { CC1DE_W { w : self } } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & mut self ) -> UDE_W { UDE_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & mut self ) -> TIE_W { TIE_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & mut self ) -> CC4IE_W { CC4IE_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & mut self ) -> CC3IE_W { CC3IE_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & mut self ) -> CC2IE_W { CC2IE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Capture/Compare 4 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4OF_A { # [ doc = "1: The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set" ]
OVERCAPTURE = 1 } impl From < CC4OF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4OF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4OF`" ]
pub type CC4OF_R = crate :: R < bool , CC4OF_A > ; impl CC4OF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC4OF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC4OF_A :: OVERCAPTURE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OVERCAPTURE`" ]
# [ inline ( always ) ]
pub fn is_overcapture ( & self ) -> bool { * self == CC4OF_A :: OVERCAPTURE } } # [ doc = "Capture/Compare 4 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4OF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC4OF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4OF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4OF`" ]
pub struct CC4OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_A = CC4OF_A ; # [ doc = "Reader of field `CC3OF`" ]
pub type CC3OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC3OF`" ]
pub struct CC3OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_A = CC4OF_A ; # [ doc = "Reader of field `CC2OF`" ]
pub type CC2OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC2OF`" ]
pub struct CC2OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 1 overcapture flag" ]
pub type CC1OF_A = CC4OF_A ; # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , CC4OF_A > ; # [ doc = "Capture/Compare 1 overcapture flag" ]
pub type CC1OF_AW = CC4OF_AW ; # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_A { # [ doc = "0: No trigger event occurred" ]
NOTRIGGER = 0 , # [ doc = "1: Trigger interrupt pending" ]
TRIGGER = 1 } impl From < TIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIF`" ]
pub type TIF_R = crate :: R < bool , TIF_A > ; impl TIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIF_A { match self . bits { false => TIF_A :: NOTRIGGER , true => TIF_A :: TRIGGER } } # [ doc = "Checks if the value of the field is `NOTRIGGER`" ]
# [ inline ( always ) ]
pub fn is_no_trigger ( & self ) -> bool { * self == TIF_A :: NOTRIGGER } # [ doc = "Checks if the value of the field is `TRIGGER`" ]
# [ inline ( always ) ]
pub fn is_trigger ( & self ) -> bool { * self == TIF_A :: TRIGGER } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < TIF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TIF`" ]
pub struct TIF_W < 'a > { w : & 'a mut W , } impl < 'a > TIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TIF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IF_A { # [ doc = "1: If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register." ]
MATCH = 1 } impl From < CC4IF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4IF`" ]
pub type CC4IF_R = crate :: R < bool , CC4IF_A > ; impl CC4IF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC4IF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC4IF_A :: MATCH ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == CC4IF_A :: MATCH } } # [ doc = "Capture/Compare 4 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC4IF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4IF`" ]
pub struct CC4IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_A = CC4IF_A ; # [ doc = "Reader of field `CC3IF`" ]
pub type CC3IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC3IF`" ]
pub struct CC3IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_A = CC4IF_A ; # [ doc = "Reader of field `CC2IF`" ]
pub type CC2IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC2IF`" ]
pub struct CC2IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 1 interrupt flag" ]
pub type CC1IF_A = CC4IF_A ; # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , CC4IF_A > ; # [ doc = "Capture/compare 1 interrupt flag" ]
pub type CC1IF_AW = CC4IF_AW ; # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC4IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & self ) -> CC4OF_R { CC4OF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & self ) -> CC3OF_R { CC3OF_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & self ) -> CC2OF_R { CC2OF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & self ) -> TIF_R { TIF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & self ) -> CC4IF_R { CC4IF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & self ) -> CC3IF_R { CC3IF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & self ) -> CC2IF_R { CC2IF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & mut self ) -> CC4OF_W { CC4OF_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & mut self ) -> CC3OF_W { CC3OF_W { w : self } } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & mut self ) -> CC2OF_W { CC2OF_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & mut self ) -> TIF_W { TIF_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & mut self ) -> CC4IF_W { CC4IF_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & mut self ) -> CC3IF_W { CC3IF_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & mut self ) -> CC2IF_W { CC2IF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Trigger generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TG_AW { # [ doc = "1: The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
TRIGGER = 1 } impl From < TG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TG`" ]
pub struct TG_W < 'a > { w : & 'a mut W , } impl < 'a > TG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( TG_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Capture/compare 4 generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4G_AW { # [ doc = "1: If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
TRIGGER = 1 } impl From < CC4G_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC4G_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC4G`" ]
pub struct CC4G_W < 'a > { w : & 'a mut W , } impl < 'a > CC4G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/compare 3 generation" ]
pub type CC3G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC3G`" ]
pub struct CC3G_W < 'a > { w : & 'a mut W , } impl < 'a > CC3G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/compare 2 generation" ]
pub type CC2G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC2G`" ]
pub struct CC2G_W < 'a > { w : & 'a mut W , } impl < 'a > CC2G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 1 generation" ]
pub type CC1G_AW = CC4G_AW ; # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC4G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 6 - Trigger generation" ]
# [ inline ( always ) ]
pub fn tg ( & mut self ) -> TG_W { TG_W { w : self } } # [ doc = "Bit 4 - Capture/compare 4 generation" ]
# [ inline ( always ) ]
pub fn cc4g ( & mut self ) -> CC4G_W { CC4G_W { w : self } } # [ doc = "Bit 3 - Capture/compare 3 generation" ]
# [ inline ( always ) ]
pub fn cc3g ( & mut self ) -> CC3G_W { CC3G_W { w : self } } # [ doc = "Bit 2 - Capture/compare 2 generation" ]
# [ inline ( always ) ]
pub fn cc2g ( & mut self ) -> CC2G_W { CC2G_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "capture/compare mode register 1 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register 1 (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC2CE`" ]
pub type OC2CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2CE`" ]
pub struct OC2CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output compare 2 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC2M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC2M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC2M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC2M`" ]
pub type OC2M_R = crate :: R < u8 , OC2M_A > ; impl OC2M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2M_A { match self . bits { 0 => OC2M_A :: FROZEN , 1 => OC2M_A :: ACTIVEONMATCH , 2 => OC2M_A :: INACTIVEONMATCH , 3 => OC2M_A :: TOGGLE , 4 => OC2M_A :: FORCEINACTIVE , 5 => OC2M_A :: FORCEACTIVE , 6 => OC2M_A :: PWMMODE1 , 7 => OC2M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC2M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC2M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC2M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC2M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC2M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC2M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC2M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC2M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC2M`" ]
pub struct OC2M_W < 'a > { w : & 'a mut W , } impl < 'a > OC2M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output compare 2 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC2PE_A { # [ doc = "0: Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC2PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC2PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC2PE`" ]
pub type OC2PE_R = crate :: R < bool , OC2PE_A > ; impl OC2PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2PE_A { match self . bits { false => OC2PE_A :: DISABLED , true => OC2PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC2PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC2PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC2PE`" ]
pub struct OC2PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: DISABLED ) } # [ doc = "Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC2FE`" ]
pub type OC2FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2FE`" ]
pub struct OC2FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "0: CC2 channel is configured as output" ]
OUTPUT = 0 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC2S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC2S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC2S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC1CE`" ]
pub type OC1CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1CE`" ]
pub struct OC1CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output compare 1 mode" ]
pub type OC1M_A = OC2M_A ; # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , OC2M_A > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output compare 1 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC1PE_A { # [ doc = "0: Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC1PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC1PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , OC1PE_A > ; impl OC1PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC1PE_A { match self . bits { false => OC1PE_A :: DISABLED , true => OC1PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC1PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC1PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: DISABLED ) } # [ doc = "Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "0: CC1 channel is configured as output" ]
OUTPUT = 0 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC1S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC1S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC1S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & self ) -> OC2CE_R { OC2CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & self ) -> OC2M_R { OC2M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & self ) -> OC2PE_R { OC2PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & self ) -> OC2FE_R { OC2FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & self ) -> OC1CE_R { OC1CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 15 - Output compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & mut self ) -> OC2CE_W { OC2CE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & mut self ) -> OC2M_W { OC2M_W { w : self } } # [ doc = "Bit 11 - Output compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & mut self ) -> OC2PE_W { OC2PE_W { w : self } } # [ doc = "Bit 10 - Output compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & mut self ) -> OC2FE_W { OC2FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bit 7 - Output compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & mut self ) -> OC1CE_W { OC1CE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } # [ doc = "Bit 3 - Output compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register 1 (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC2F`" ]
pub type IC2F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2F`" ]
pub struct IC2F_W < 'a > { w : & 'a mut W , } impl < 'a > IC2F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC2PSC`" ]
pub type IC2PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2PSC`" ]
pub struct IC2PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC2PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "1: CC2 channel is configured as input, IC2 is mapped on TI2" ]
TI2 = 1 , # [ doc = "2: CC2 channel is configured as input, IC2 is mapped on TI1" ]
TI1 = 2 , # [ doc = "3: CC2 channel is configured as input, IC2 is mapped on TRC" ]
TRC = 3 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC2S_A :: TI2 ) , 2 => Val ( CC2S_A :: TI1 ) , 3 => Val ( CC2S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC2S_A :: TI2 } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC2S_A :: TI1 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC2S_A :: TRC } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI2 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI1 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Input capture 1 filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum IC1F_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < IC1F_A > for u8 { # [ inline ( always ) ]
fn from ( variant : IC1F_A ) -> Self { variant as _ } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , IC1F_A > ; impl IC1F_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IC1F_A { match self . bits { 0 => IC1F_A :: NOFILTER , 1 => IC1F_A :: FCK_INT_N2 , 2 => IC1F_A :: FCK_INT_N4 , 3 => IC1F_A :: FCK_INT_N8 , 4 => IC1F_A :: FDTS_DIV2_N6 , 5 => IC1F_A :: FDTS_DIV2_N8 , 6 => IC1F_A :: FDTS_DIV4_N6 , 7 => IC1F_A :: FDTS_DIV4_N8 , 8 => IC1F_A :: FDTS_DIV8_N6 , 9 => IC1F_A :: FDTS_DIV8_N8 , 10 => IC1F_A :: FDTS_DIV16_N5 , 11 => IC1F_A :: FDTS_DIV16_N6 , 12 => IC1F_A :: FDTS_DIV16_N8 , 13 => IC1F_A :: FDTS_DIV32_N5 , 14 => IC1F_A :: FDTS_DIV32_N6 , 15 => IC1F_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == IC1F_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IC1F_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( IC1F_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "1: CC1 channel is configured as input, IC1 is mapped on TI1" ]
TI1 = 1 , # [ doc = "2: CC1 channel is configured as input, IC1 is mapped on TI2" ]
TI2 = 2 , # [ doc = "3: CC1 channel is configured as input, IC1 is mapped on TRC" ]
TRC = 3 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC1S_A :: TI1 ) , 2 => Val ( CC1S_A :: TI2 ) , 3 => Val ( CC1S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC1S_A :: TI1 } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC1S_A :: TI2 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC1S_A :: TRC } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI1 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI2 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & self ) -> IC2F_R { IC2F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & self ) -> IC2PSC_R { IC2PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & mut self ) -> IC2F_W { IC2F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & mut self ) -> IC2PSC_W { IC2PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 2 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_output](ccmr2_output) module" ]
pub type CCMR2_OUTPUT = crate :: Reg < u32 , _CCMR2_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_OUTPUT ; # [ doc = "`read()` method returns [ccmr2_output::R](ccmr2_output::R) reader structure" ]
impl crate :: Readable for CCMR2_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_output::W](ccmr2_output::W) writer structure" ]
impl crate :: Writable for CCMR2_OUTPUT { } # [ doc = "capture/compare mode register 2 (output mode)" ]
pub mod ccmr2_output { # [ doc = "Reader of register CCMR2_Output" ]
pub type R = crate :: R < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Writer for register CCMR2_Output" ]
pub type W = crate :: W < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Register CCMR2_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC4CE`" ]
pub type OC4CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4CE`" ]
pub struct OC4CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output compare 4 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC4M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC4M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC4M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC4M`" ]
pub type OC4M_R = crate :: R < u8 , OC4M_A > ; impl OC4M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4M_A { match self . bits { 0 => OC4M_A :: FROZEN , 1 => OC4M_A :: ACTIVEONMATCH , 2 => OC4M_A :: INACTIVEONMATCH , 3 => OC4M_A :: TOGGLE , 4 => OC4M_A :: FORCEINACTIVE , 5 => OC4M_A :: FORCEACTIVE , 6 => OC4M_A :: PWMMODE1 , 7 => OC4M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC4M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC4M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC4M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC4M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC4M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC4M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC4M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC4M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC4M`" ]
pub struct OC4M_W < 'a > { w : & 'a mut W , } impl < 'a > OC4M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output compare 4 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC4PE_A { # [ doc = "0: Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC4PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC4PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC4PE`" ]
pub type OC4PE_R = crate :: R < bool , OC4PE_A > ; impl OC4PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4PE_A { match self . bits { false => OC4PE_A :: DISABLED , true => OC4PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC4PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC4PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC4PE`" ]
pub struct OC4PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: DISABLED ) } # [ doc = "Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC4FE`" ]
pub type OC4FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4FE`" ]
pub struct OC4FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "0: CC4 channel is configured as output" ]
OUTPUT = 0 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC4S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC4S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC4S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC3CE`" ]
pub type OC3CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3CE`" ]
pub struct OC3CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output compare 3 mode" ]
pub type OC3M_A = OC4M_A ; # [ doc = "Reader of field `OC3M`" ]
pub type OC3M_R = crate :: R < u8 , OC4M_A > ; # [ doc = "Write proxy for field `OC3M`" ]
pub struct OC3M_W < 'a > { w : & 'a mut W , } impl < 'a > OC3M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output compare 3 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC3PE_A { # [ doc = "0: Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC3PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC3PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC3PE`" ]
pub type OC3PE_R = crate :: R < bool , OC3PE_A > ; impl OC3PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC3PE_A { match self . bits { false => OC3PE_A :: DISABLED , true => OC3PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC3PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC3PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC3PE`" ]
pub struct OC3PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: DISABLED ) } # [ doc = "Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC3FE`" ]
pub type OC3FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3FE`" ]
pub struct OC3FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "0: CC3 channel is configured as output" ]
OUTPUT = 0 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC3S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC3S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC3S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & self ) -> OC4CE_R { OC4CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & self ) -> OC4M_R { OC4M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & self ) -> OC4PE_R { OC4PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & self ) -> OC4FE_R { OC4FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & self ) -> OC3CE_R { OC3CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & self ) -> OC3M_R { OC3M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & self ) -> OC3PE_R { OC3PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & self ) -> OC3FE_R { OC3FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & mut self ) -> OC4CE_W { OC4CE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & mut self ) -> OC4M_W { OC4M_W { w : self } } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & mut self ) -> OC4PE_W { OC4PE_W { w : self } } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & mut self ) -> OC4FE_W { OC4FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & mut self ) -> OC3CE_W { OC3CE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & mut self ) -> OC3M_W { OC3M_W { w : self } } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & mut self ) -> OC3PE_W { OC3PE_W { w : self } } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & mut self ) -> OC3FE_W { OC3FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } } } # [ doc = "capture/compare mode register 2 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_input](ccmr2_input) module" ]
pub type CCMR2_INPUT = crate :: Reg < u32 , _CCMR2_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_INPUT ; # [ doc = "`read()` method returns [ccmr2_input::R](ccmr2_input::R) reader structure" ]
impl crate :: Readable for CCMR2_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_input::W](ccmr2_input::W) writer structure" ]
impl crate :: Writable for CCMR2_INPUT { } # [ doc = "capture/compare mode register 2 (input mode)" ]
pub mod ccmr2_input { # [ doc = "Reader of register CCMR2_Input" ]
pub type R = crate :: R < u32 , super :: CCMR2_INPUT > ; # [ doc = "Writer for register CCMR2_Input" ]
pub type W = crate :: W < u32 , super :: CCMR2_INPUT > ; # [ doc = "Register CCMR2_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC4F`" ]
pub type IC4F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4F`" ]
pub struct IC4F_W < 'a > { w : & 'a mut W , } impl < 'a > IC4F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC4PSC`" ]
pub type IC4PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4PSC`" ]
pub struct IC4PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC4PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "1: CC4 channel is configured as input, IC4 is mapped on TI4" ]
TI4 = 1 , # [ doc = "2: CC4 channel is configured as input, IC4 is mapped on TI3" ]
TI3 = 2 , # [ doc = "3: CC4 channel is configured as input, IC4 is mapped on TRC" ]
TRC = 3 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC4S_A :: TI4 ) , 2 => Val ( CC4S_A :: TI3 ) , 3 => Val ( CC4S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC4S_A :: TI4 } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC4S_A :: TI3 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC4S_A :: TRC } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI4 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI3 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `IC3F`" ]
pub type IC3F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3F`" ]
pub struct IC3F_W < 'a > { w : & 'a mut W , } impl < 'a > IC3F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC3PSC`" ]
pub type IC3PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3PSC`" ]
pub struct IC3PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC3PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "1: CC3 channel is configured as input, IC3 is mapped on TI3" ]
TI3 = 1 , # [ doc = "2: CC3 channel is configured as input, IC3 is mapped on TI4" ]
TI4 = 2 , # [ doc = "3: CC3 channel is configured as input, IC3 is mapped on TRC" ]
TRC = 3 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC3S_A :: TI3 ) , 2 => Val ( CC3S_A :: TI4 ) , 3 => Val ( CC3S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC3S_A :: TI3 } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC3S_A :: TI4 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC3S_A :: TRC } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI3 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI4 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & self ) -> IC4F_R { IC4F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & self ) -> IC4PSC_R { IC4PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & self ) -> IC3F_R { IC3F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & self ) -> IC3PSC_R { IC3PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & mut self ) -> IC4F_W { IC4F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & mut self ) -> IC4PSC_W { IC4PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & mut self ) -> IC3F_W { IC3F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & mut self ) -> IC3PSC_W { IC3PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC2E`" ]
pub type CC2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2E`" ]
pub struct CC2E_W < 'a > { w : & 'a mut W , } impl < 'a > CC2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CC2P`" ]
pub type CC2P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2P`" ]
pub struct CC2P_W < 'a > { w : & 'a mut W , } impl < 'a > CC2P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2NP`" ]
pub type CC2NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2NP`" ]
pub struct CC2NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC2NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `CC3E`" ]
pub type CC3E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3E`" ]
pub struct CC3E_W < 'a > { w : & 'a mut W , } impl < 'a > CC3E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `CC3P`" ]
pub type CC3P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3P`" ]
pub struct CC3P_W < 'a > { w : & 'a mut W , } impl < 'a > CC3P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CC3NP`" ]
pub type CC3NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3NP`" ]
pub struct CC3NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC3NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `CC4E`" ]
pub type CC4E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4E`" ]
pub struct CC4E_W < 'a > { w : & 'a mut W , } impl < 'a > CC4E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `CC4P`" ]
pub type CC4P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4P`" ]
pub struct CC4P_W < 'a > { w : & 'a mut W , } impl < 'a > CC4P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `CC4NP`" ]
pub type CC4NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4NP`" ]
pub struct CC4NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC4NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & self ) -> CC2E_R { CC2E_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & self ) -> CC2P_R { CC2P_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & self ) -> CC2NP_R { CC2NP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & self ) -> CC3E_R { CC3E_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & self ) -> CC3P_R { CC3P_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & self ) -> CC3NP_R { CC3NP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & self ) -> CC4E_R { CC4E_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & self ) -> CC4P_R { CC4P_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & self ) -> CC4NP_R { CC4NP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & mut self ) -> CC2E_W { CC2E_W { w : self } } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & mut self ) -> CC2P_W { CC2P_W { w : self } } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & mut self ) -> CC2NP_W { CC2NP_W { w : self } } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & mut self ) -> CC3E_W { CC3E_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & mut self ) -> CC3P_W { CC3P_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & mut self ) -> CC3NP_W { CC3NP_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & mut self ) -> CC4E_W { CC4E_W { w : self } } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & mut self ) -> CC4P_W { CC4P_W { w : self } } # [ doc = "Bit 15 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & mut self ) -> CC4NP_W { CC4NP_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module" ]
pub type CCR = crate :: Reg < u32 , _CCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR ; # [ doc = "`read()` method returns [ccr::R](ccr::R) reader structure" ]
impl crate :: Readable for CCR { } # [ doc = "`write(|w| ..)` method takes [ccr::W](ccr::W) writer structure" ]
impl crate :: Writable for CCR { } # [ doc = "capture/compare register 1" ]
pub mod ccr { # [ doc = "Reader of register CCR%s" ]
pub type R = crate :: R < u32 , super :: CCR > ; # [ doc = "Writer for register CCR%s" ]
pub type W = crate :: W < u32 , super :: CCR > ; # [ doc = "Register CCR%s `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } } } # [ doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module" ]
pub type DCR = crate :: Reg < u32 , _DCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DCR ; # [ doc = "`read()` method returns [dcr::R](dcr::R) reader structure" ]
impl crate :: Readable for DCR { } # [ doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure" ]
impl crate :: Writable for DCR { } # [ doc = "DMA control register" ]
pub mod dcr { # [ doc = "Reader of register DCR" ]
pub type R = crate :: R < u32 , super :: DCR > ; # [ doc = "Writer for register DCR" ]
pub type W = crate :: W < u32 , super :: DCR > ; # [ doc = "Register DCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBL`" ]
pub type DBL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBL`" ]
pub struct DBL_W < 'a > { w : & 'a mut W , } impl < 'a > DBL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 8 ) ) | ( ( ( value as u32 ) & 0x1f ) << 8 ) ; self . w } } # [ doc = "Reader of field `DBA`" ]
pub type DBA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBA`" ]
pub struct DBA_W < 'a > { w : & 'a mut W , } impl < 'a > DBA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & self ) -> DBL_R { DBL_R :: new ( ( ( self . bits >> 8 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & self ) -> DBA_R { DBA_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & mut self ) -> DBL_W { DBL_W { w : self } } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & mut self ) -> DBA_W { DBA_W { w : self } } } } # [ doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module" ]
pub type DMAR = crate :: Reg < u32 , _DMAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DMAR ; # [ doc = "`read()` method returns [dmar::R](dmar::R) reader structure" ]
impl crate :: Readable for DMAR { } # [ doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure" ]
impl crate :: Writable for DMAR { } # [ doc = "DMA address for full transfer" ]
pub mod dmar { # [ doc = "Reader of register DMAR" ]
pub type R = crate :: R < u32 , super :: DMAR > ; # [ doc = "Writer for register DMAR" ]
pub type W = crate :: W < u32 , super :: DMAR > ; # [ doc = "Register DMAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DMAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAB`" ]
pub type DMAB_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DMAB`" ]
pub struct DMAB_W < 'a > { w : & 'a mut W , } impl < 'a > DMAB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & self ) -> DMAB_R { DMAB_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & mut self ) -> DMAB_W { DMAB_W { w : self } } } } } # [ doc = "General purpose timer" ]
pub struct TIM4 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM4 { } impl TIM4 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim3 :: RegisterBlock { 0x4000_0800 as * const _ } } impl Deref for TIM4 { type Target = tim3 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM4 :: ptr ( ) } } } # [ doc = "General purpose timer" ]
pub struct TIM19 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM19 { } impl TIM19 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim3 :: RegisterBlock { 0x4001_5c00 as * const _ } } impl Deref for TIM19 { type Target = tim3 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM19 :: ptr ( ) } } } # [ doc = "General purpose timers" ]
pub struct TIM15 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM15 { } impl TIM15 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim15 :: RegisterBlock { 0x4001_4000 as * const _ } } impl Deref for TIM15 { type Target = tim15 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM15 :: ptr ( ) } } } # [ doc = "General purpose timers" ]
pub mod tim15 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - slave mode control register" ]
pub smcr : SMCR , # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_6_ccmr1 : [ u8 ; 4usize ]
, _reserved7 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , # [ doc = "0x30 - repetition counter register" ]
pub rcr : RCR , # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR1 , # [ doc = "0x38 - capture/compare register 2" ]
pub ccr2 : CCR2 , _reserved14 : [ u8 ; 8usize ]
, # [ doc = "0x44 - break and dead-time register" ]
pub bdtr : BDTR , # [ doc = "0x48 - DMA control register" ]
pub dcr : DCR , # [ doc = "0x4c - DMA address for full transfer" ]
pub dmar : DMAR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OIS2`" ]
pub type OIS2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS2`" ]
pub struct OIS2_W < 'a > { w : & 'a mut W , } impl < 'a > OIS2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `OIS1N`" ]
pub type OIS1N_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS1N`" ]
pub struct OIS1N_W < 'a > { w : & 'a mut W , } impl < 'a > OIS1N_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `OIS1`" ]
pub type OIS1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS1`" ]
pub struct OIS1_W < 'a > { w : & 'a mut W , } impl < 'a > OIS1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `MMS`" ]
pub type MMS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MMS`" ]
pub struct MMS_W < 'a > { w : & 'a mut W , } impl < 'a > MMS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CCDS`" ]
pub type CCDS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CCDS`" ]
pub struct CCDS_W < 'a > { w : & 'a mut W , } impl < 'a > CCDS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CCUS`" ]
pub type CCUS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CCUS`" ]
pub struct CCUS_W < 'a > { w : & 'a mut W , } impl < 'a > CCUS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CCPC`" ]
pub type CCPC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CCPC`" ]
pub struct CCPC_W < 'a > { w : & 'a mut W , } impl < 'a > CCPC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 10 - Output Idle state 2" ]
# [ inline ( always ) ]
pub fn ois2 ( & self ) -> OIS2_R { OIS2_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1n ( & self ) -> OIS1N_R { OIS1N_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1 ( & self ) -> OIS1_R { OIS1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & self ) -> MMS_R { MMS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & self ) -> CCDS_R { CCDS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/compare control update selection" ]
# [ inline ( always ) ]
pub fn ccus ( & self ) -> CCUS_R { CCUS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Capture/compare preloaded control" ]
# [ inline ( always ) ]
pub fn ccpc ( & self ) -> CCPC_R { CCPC_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 10 - Output Idle state 2" ]
# [ inline ( always ) ]
pub fn ois2 ( & mut self ) -> OIS2_W { OIS2_W { w : self } } # [ doc = "Bit 9 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1n ( & mut self ) -> OIS1N_W { OIS1N_W { w : self } } # [ doc = "Bit 8 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1 ( & mut self ) -> OIS1_W { OIS1_W { w : self } } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & mut self ) -> MMS_W { MMS_W { w : self } } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & mut self ) -> CCDS_W { CCDS_W { w : self } } # [ doc = "Bit 2 - Capture/compare control update selection" ]
# [ inline ( always ) ]
pub fn ccus ( & mut self ) -> CCUS_W { CCUS_W { w : self } } # [ doc = "Bit 0 - Capture/compare preloaded control" ]
# [ inline ( always ) ]
pub fn ccpc ( & mut self ) -> CCPC_W { CCPC_W { w : self } } } } # [ doc = "slave mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcr](smcr) module" ]
pub type SMCR = crate :: Reg < u32 , _SMCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMCR ; # [ doc = "`read()` method returns [smcr::R](smcr::R) reader structure" ]
impl crate :: Readable for SMCR { } # [ doc = "`write(|w| ..)` method takes [smcr::W](smcr::W) writer structure" ]
impl crate :: Writable for SMCR { } # [ doc = "slave mode control register" ]
pub mod smcr { # [ doc = "Reader of register SMCR" ]
pub type R = crate :: R < u32 , super :: SMCR > ; # [ doc = "Writer for register SMCR" ]
pub type W = crate :: W < u32 , super :: SMCR > ; # [ doc = "Register SMCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MSM`" ]
pub type MSM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MSM`" ]
pub struct MSM_W < 'a > { w : & 'a mut W , } impl < 'a > MSM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `TS`" ]
pub type TS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TS`" ]
pub struct TS_W < 'a > { w : & 'a mut W , } impl < 'a > TS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `SMS`" ]
pub type SMS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SMS`" ]
pub struct SMS_W < 'a > { w : & 'a mut W , } impl < 'a > SMS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } impl R { # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & self ) -> MSM_R { MSM_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & self ) -> TS_R { TS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & self ) -> SMS_R { SMS_R :: new ( ( self . bits & 0x07 ) as u8 ) } } impl W { # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & mut self ) -> MSM_W { MSM_W { w : self } } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & mut self ) -> TS_W { TS_W { w : self } } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & mut self ) -> SMS_W { SMS_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TDE`" ]
pub type TDE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TDE`" ]
pub struct TDE_W < 'a > { w : & 'a mut W , } impl < 'a > TDE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CC2DE`" ]
pub type CC2DE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2DE`" ]
pub struct CC2DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2DE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC1DE`" ]
pub type CC1DE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1DE`" ]
pub struct CC1DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1DE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `UDE`" ]
pub type UDE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `UDE`" ]
pub struct UDE_W < 'a > { w : & 'a mut W , } impl < 'a > UDE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `BIE`" ]
pub type BIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BIE`" ]
pub struct BIE_W < 'a > { w : & 'a mut W , } impl < 'a > BIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `TIE`" ]
pub type TIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TIE`" ]
pub struct TIE_W < 'a > { w : & 'a mut W , } impl < 'a > TIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `COMIE`" ]
pub type COMIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMIE`" ]
pub struct COMIE_W < 'a > { w : & 'a mut W , } impl < 'a > COMIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2IE`" ]
pub type CC2IE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2IE`" ]
pub struct CC2IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & self ) -> TDE_R { TDE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & self ) -> CC2DE_R { CC2DE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & self ) -> CC1DE_R { CC1DE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & self ) -> UDE_R { UDE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Break interrupt enable" ]
# [ inline ( always ) ]
pub fn bie ( & self ) -> BIE_R { BIE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & self ) -> TIE_R { TIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - COM interrupt enable" ]
# [ inline ( always ) ]
pub fn comie ( & self ) -> COMIE_R { COMIE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & self ) -> CC2IE_R { CC2IE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & mut self ) -> TDE_W { TDE_W { w : self } } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & mut self ) -> CC2DE_W { CC2DE_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & mut self ) -> CC1DE_W { CC1DE_W { w : self } } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & mut self ) -> UDE_W { UDE_W { w : self } } # [ doc = "Bit 7 - Break interrupt enable" ]
# [ inline ( always ) ]
pub fn bie ( & mut self ) -> BIE_W { BIE_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & mut self ) -> TIE_W { TIE_W { w : self } } # [ doc = "Bit 5 - COM interrupt enable" ]
# [ inline ( always ) ]
pub fn comie ( & mut self ) -> COMIE_W { COMIE_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & mut self ) -> CC2IE_W { CC2IE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC2OF`" ]
pub type CC2OF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2OF`" ]
pub struct CC2OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2OF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `BIF`" ]
pub type BIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BIF`" ]
pub struct BIF_W < 'a > { w : & 'a mut W , } impl < 'a > BIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `TIF`" ]
pub type TIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TIF`" ]
pub struct TIF_W < 'a > { w : & 'a mut W , } impl < 'a > TIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `COMIF`" ]
pub type COMIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMIF`" ]
pub struct COMIF_W < 'a > { w : & 'a mut W , } impl < 'a > COMIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2IF`" ]
pub type CC2IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2IF`" ]
pub struct CC2IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & self ) -> CC2OF_R { CC2OF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Break interrupt flag" ]
# [ inline ( always ) ]
pub fn bif ( & self ) -> BIF_R { BIF_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & self ) -> TIF_R { TIF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - COM interrupt flag" ]
# [ inline ( always ) ]
pub fn comif ( & self ) -> COMIF_R { COMIF_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & self ) -> CC2IF_R { CC2IF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & mut self ) -> CC2OF_W { CC2OF_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 7 - Break interrupt flag" ]
# [ inline ( always ) ]
pub fn bif ( & mut self ) -> BIF_W { BIF_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & mut self ) -> TIF_W { TIF_W { w : self } } # [ doc = "Bit 5 - COM interrupt flag" ]
# [ inline ( always ) ]
pub fn comif ( & mut self ) -> COMIF_W { COMIF_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & mut self ) -> CC2IF_W { CC2IF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `BG`" ]
pub struct BG_W < 'a > { w : & 'a mut W , } impl < 'a > BG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Write proxy for field `TG`" ]
pub struct TG_W < 'a > { w : & 'a mut W , } impl < 'a > TG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Write proxy for field `COMG`" ]
pub struct COMG_W < 'a > { w : & 'a mut W , } impl < 'a > COMG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Write proxy for field `CC2G`" ]
pub struct CC2G_W < 'a > { w : & 'a mut W , } impl < 'a > CC2G_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 7 - Break generation" ]
# [ inline ( always ) ]
pub fn bg ( & mut self ) -> BG_W { BG_W { w : self } } # [ doc = "Bit 6 - Trigger generation" ]
# [ inline ( always ) ]
pub fn tg ( & mut self ) -> TG_W { TG_W { w : self } } # [ doc = "Bit 5 - Capture/Compare control update generation" ]
# [ inline ( always ) ]
pub fn comg ( & mut self ) -> COMG_W { COMG_W { w : self } } # [ doc = "Bit 2 - Capture/compare 2 generation" ]
# [ inline ( always ) ]
pub fn cc2g ( & mut self ) -> CC2G_W { CC2G_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC2M`" ]
pub type OC2M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC2M`" ]
pub struct OC2M_W < 'a > { w : & 'a mut W , } impl < 'a > OC2M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Reader of field `OC2PE`" ]
pub type OC2PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2PE`" ]
pub struct OC2PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC2FE`" ]
pub type OC2FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2FE`" ]
pub struct OC2FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:14 - Output Compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & self ) -> OC2M_R { OC2M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output Compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & self ) -> OC2PE_R { OC2PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output Compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & self ) -> OC2FE_R { OC2FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:14 - Output Compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & mut self ) -> OC2M_W { OC2M_W { w : self } } # [ doc = "Bit 11 - Output Compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & mut self ) -> OC2PE_W { OC2PE_W { w : self } } # [ doc = "Bit 10 - Output Compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & mut self ) -> OC2FE_W { OC2FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register 1 (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC2F`" ]
pub type IC2F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2F`" ]
pub struct IC2F_W < 'a > { w : & 'a mut W , } impl < 'a > IC2F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC2PSC`" ]
pub type IC2PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2PSC`" ]
pub struct IC2PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC2PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & self ) -> IC2F_R { IC2F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & self ) -> IC2PSC_R { IC2PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & mut self ) -> IC2F_W { IC2F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & mut self ) -> IC2PSC_W { IC2PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC2NP`" ]
pub type CC2NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2NP`" ]
pub struct CC2NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC2NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `CC2P`" ]
pub type CC2P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2P`" ]
pub struct CC2P_W < 'a > { w : & 'a mut W , } impl < 'a > CC2P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2E`" ]
pub type CC2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2E`" ]
pub struct CC2E_W < 'a > { w : & 'a mut W , } impl < 'a > CC2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC1NE`" ]
pub type CC1NE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NE`" ]
pub struct CC1NE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & self ) -> CC2NP_R { CC2NP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & self ) -> CC2P_R { CC2P_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & self ) -> CC2E_R { CC2E_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 1 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc1ne ( & self ) -> CC1NE_R { CC1NE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & mut self ) -> CC2NP_W { CC2NP_W { w : self } } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & mut self ) -> CC2P_W { CC2P_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & mut self ) -> CC2E_W { CC2E_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 1 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc1ne ( & mut self ) -> CC1NE_W { CC1NE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcr](rcr) module" ]
pub type RCR = crate :: Reg < u32 , _RCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RCR ; # [ doc = "`read()` method returns [rcr::R](rcr::R) reader structure" ]
impl crate :: Readable for RCR { } # [ doc = "`write(|w| ..)` method takes [rcr::W](rcr::W) writer structure" ]
impl crate :: Writable for RCR { } # [ doc = "repetition counter register" ]
pub mod rcr { # [ doc = "Reader of register RCR" ]
pub type R = crate :: R < u32 , super :: RCR > ; # [ doc = "Writer for register RCR" ]
pub type W = crate :: W < u32 , super :: RCR > ; # [ doc = "Register RCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `REP`" ]
pub type REP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `REP`" ]
pub struct REP_W < 'a > { w : & 'a mut W , } impl < 'a > REP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - Repetition counter value" ]
# [ inline ( always ) ]
pub fn rep ( & self ) -> REP_R { REP_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - Repetition counter value" ]
# [ inline ( always ) ]
pub fn rep ( & mut self ) -> REP_W { REP_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr1](ccr1) module" ]
pub type CCR1 = crate :: Reg < u32 , _CCR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR1 ; # [ doc = "`read()` method returns [ccr1::R](ccr1::R) reader structure" ]
impl crate :: Readable for CCR1 { } # [ doc = "`write(|w| ..)` method takes [ccr1::W](ccr1::W) writer structure" ]
impl crate :: Writable for CCR1 { } # [ doc = "capture/compare register 1" ]
pub mod ccr1 { # [ doc = "Reader of register CCR1" ]
pub type R = crate :: R < u32 , super :: CCR1 > ; # [ doc = "Writer for register CCR1" ]
pub type W = crate :: W < u32 , super :: CCR1 > ; # [ doc = "Register CCR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR1`" ]
pub type CCR1_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR1`" ]
pub struct CCR1_W < 'a > { w : & 'a mut W , } impl < 'a > CCR1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr1 ( & self ) -> CCR1_R { CCR1_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr1 ( & mut self ) -> CCR1_W { CCR1_W { w : self } } } } # [ doc = "capture/compare register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr2](ccr2) module" ]
pub type CCR2 = crate :: Reg < u32 , _CCR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR2 ; # [ doc = "`read()` method returns [ccr2::R](ccr2::R) reader structure" ]
impl crate :: Readable for CCR2 { } # [ doc = "`write(|w| ..)` method takes [ccr2::W](ccr2::W) writer structure" ]
impl crate :: Writable for CCR2 { } # [ doc = "capture/compare register 2" ]
pub mod ccr2 { # [ doc = "Reader of register CCR2" ]
pub type R = crate :: R < u32 , super :: CCR2 > ; # [ doc = "Writer for register CCR2" ]
pub type W = crate :: W < u32 , super :: CCR2 > ; # [ doc = "Register CCR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR2`" ]
pub type CCR2_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR2`" ]
pub struct CCR2_W < 'a > { w : & 'a mut W , } impl < 'a > CCR2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 2 value" ]
# [ inline ( always ) ]
pub fn ccr2 ( & self ) -> CCR2_R { CCR2_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 2 value" ]
# [ inline ( always ) ]
pub fn ccr2 ( & mut self ) -> CCR2_W { CCR2_W { w : self } } } } # [ doc = "break and dead-time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdtr](bdtr) module" ]
pub type BDTR = crate :: Reg < u32 , _BDTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BDTR ; # [ doc = "`read()` method returns [bdtr::R](bdtr::R) reader structure" ]
impl crate :: Readable for BDTR { } # [ doc = "`write(|w| ..)` method takes [bdtr::W](bdtr::W) writer structure" ]
impl crate :: Writable for BDTR { } # [ doc = "break and dead-time register" ]
pub mod bdtr { # [ doc = "Reader of register BDTR" ]
pub type R = crate :: R < u32 , super :: BDTR > ; # [ doc = "Writer for register BDTR" ]
pub type W = crate :: W < u32 , super :: BDTR > ; # [ doc = "Register BDTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BDTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MOE`" ]
pub type MOE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MOE`" ]
pub struct MOE_W < 'a > { w : & 'a mut W , } impl < 'a > MOE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `AOE`" ]
pub type AOE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `AOE`" ]
pub struct AOE_W < 'a > { w : & 'a mut W , } impl < 'a > AOE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `BKP`" ]
pub type BKP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BKP`" ]
pub struct BKP_W < 'a > { w : & 'a mut W , } impl < 'a > BKP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `BKE`" ]
pub type BKE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BKE`" ]
pub struct BKE_W < 'a > { w : & 'a mut W , } impl < 'a > BKE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `OSSR`" ]
pub type OSSR_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OSSR`" ]
pub struct OSSR_W < 'a > { w : & 'a mut W , } impl < 'a > OSSR_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OSSI`" ]
pub type OSSI_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OSSI`" ]
pub struct OSSI_W < 'a > { w : & 'a mut W , } impl < 'a > OSSI_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `DTG`" ]
pub type DTG_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DTG`" ]
pub struct DTG_W < 'a > { w : & 'a mut W , } impl < 'a > DTG_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bit 15 - Main output enable" ]
# [ inline ( always ) ]
pub fn moe ( & self ) -> MOE_R { MOE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Automatic output enable" ]
# [ inline ( always ) ]
pub fn aoe ( & self ) -> AOE_R { AOE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Break polarity" ]
# [ inline ( always ) ]
pub fn bkp ( & self ) -> BKP_R { BKP_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Break enable" ]
# [ inline ( always ) ]
pub fn bke ( & self ) -> BKE_R { BKE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Off-state selection for Run mode" ]
# [ inline ( always ) ]
pub fn ossr ( & self ) -> OSSR_R { OSSR_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Off-state selection for Idle mode" ]
# [ inline ( always ) ]
pub fn ossi ( & self ) -> OSSI_R { OSSI_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Lock configuration" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:7 - Dead-time generator setup" ]
# [ inline ( always ) ]
pub fn dtg ( & self ) -> DTG_R { DTG_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bit 15 - Main output enable" ]
# [ inline ( always ) ]
pub fn moe ( & mut self ) -> MOE_W { MOE_W { w : self } } # [ doc = "Bit 14 - Automatic output enable" ]
# [ inline ( always ) ]
pub fn aoe ( & mut self ) -> AOE_W { AOE_W { w : self } } # [ doc = "Bit 13 - Break polarity" ]
# [ inline ( always ) ]
pub fn bkp ( & mut self ) -> BKP_W { BKP_W { w : self } } # [ doc = "Bit 12 - Break enable" ]
# [ inline ( always ) ]
pub fn bke ( & mut self ) -> BKE_W { BKE_W { w : self } } # [ doc = "Bit 11 - Off-state selection for Run mode" ]
# [ inline ( always ) ]
pub fn ossr ( & mut self ) -> OSSR_W { OSSR_W { w : self } } # [ doc = "Bit 10 - Off-state selection for Idle mode" ]
# [ inline ( always ) ]
pub fn ossi ( & mut self ) -> OSSI_W { OSSI_W { w : self } } # [ doc = "Bits 8:9 - Lock configuration" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } # [ doc = "Bits 0:7 - Dead-time generator setup" ]
# [ inline ( always ) ]
pub fn dtg ( & mut self ) -> DTG_W { DTG_W { w : self } } } } # [ doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module" ]
pub type DCR = crate :: Reg < u32 , _DCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DCR ; # [ doc = "`read()` method returns [dcr::R](dcr::R) reader structure" ]
impl crate :: Readable for DCR { } # [ doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure" ]
impl crate :: Writable for DCR { } # [ doc = "DMA control register" ]
pub mod dcr { # [ doc = "Reader of register DCR" ]
pub type R = crate :: R < u32 , super :: DCR > ; # [ doc = "Writer for register DCR" ]
pub type W = crate :: W < u32 , super :: DCR > ; # [ doc = "Register DCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBL`" ]
pub type DBL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBL`" ]
pub struct DBL_W < 'a > { w : & 'a mut W , } impl < 'a > DBL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 8 ) ) | ( ( ( value as u32 ) & 0x1f ) << 8 ) ; self . w } } # [ doc = "Reader of field `DBA`" ]
pub type DBA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBA`" ]
pub struct DBA_W < 'a > { w : & 'a mut W , } impl < 'a > DBA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & self ) -> DBL_R { DBL_R :: new ( ( ( self . bits >> 8 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & self ) -> DBA_R { DBA_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & mut self ) -> DBL_W { DBL_W { w : self } } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & mut self ) -> DBA_W { DBA_W { w : self } } } } # [ doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module" ]
pub type DMAR = crate :: Reg < u32 , _DMAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DMAR ; # [ doc = "`read()` method returns [dmar::R](dmar::R) reader structure" ]
impl crate :: Readable for DMAR { } # [ doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure" ]
impl crate :: Writable for DMAR { } # [ doc = "DMA address for full transfer" ]
pub mod dmar { # [ doc = "Reader of register DMAR" ]
pub type R = crate :: R < u32 , super :: DMAR > ; # [ doc = "Writer for register DMAR" ]
pub type W = crate :: W < u32 , super :: DMAR > ; # [ doc = "Register DMAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DMAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAB`" ]
pub type DMAB_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DMAB`" ]
pub struct DMAB_W < 'a > { w : & 'a mut W , } impl < 'a > DMAB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & self ) -> DMAB_R { DMAB_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & mut self ) -> DMAB_W { DMAB_W { w : self } } } } } # [ doc = "General-purpose-timers" ]
pub struct TIM16 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM16 { } impl TIM16 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim16 :: RegisterBlock { 0x4001_4400 as * const _ } } impl Deref for TIM16 { type Target = tim16 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM16 :: ptr ( ) } } } # [ doc = "General-purpose-timers" ]
pub mod tim16 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , _reserved2 : [ u8 ; 4usize ]
, # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_5_ccmr1 : [ u8 ; 4usize ]
, _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , # [ doc = "0x30 - repetition counter register" ]
pub rcr : RCR , # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR1 , _reserved12 : [ u8 ; 12usize ]
, # [ doc = "0x44 - break and dead-time register" ]
pub bdtr : BDTR , # [ doc = "0x48 - DMA control register" ]
pub dcr : DCR , # [ doc = "0x4c - DMA address for full transfer" ]
pub dmar : DMAR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "One-pulse mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPM_A { # [ doc = "0: Not stopped at update event" ]
NOTSTOPPED = 0 , # [ doc = "1: Counter stops counting at next update event" ]
STOPPED = 1 } impl From < OPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , OPM_A > ; impl OPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPM_A { match self . bits { false => OPM_A :: NOTSTOPPED , true => OPM_A :: STOPPED } } # [ doc = "Checks if the value of the field is `NOTSTOPPED`" ]
# [ inline ( always ) ]
pub fn is_not_stopped ( & self ) -> bool { * self == OPM_A :: NOTSTOPPED } # [ doc = "Checks if the value of the field is `STOPPED`" ]
# [ inline ( always ) ]
pub fn is_stopped ( & self ) -> bool { * self == OPM_A :: STOPPED } } # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Not stopped at update event" ]
# [ inline ( always ) ]
pub fn not_stopped ( self ) -> & 'a mut W { self . variant ( OPM_A :: NOTSTOPPED ) } # [ doc = "Counter stops counting at next update event" ]
# [ inline ( always ) ]
pub fn stopped ( self ) -> & 'a mut W { self . variant ( OPM_A :: STOPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Output Idle state 1\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OIS1N_A { # [ doc = "0: OC1N=0 after a dead-time when MOE=0" ]
LOW = 0 , # [ doc = "1: OC1N=1 after a dead-time when MOE=0" ]
HIGH = 1 } impl From < OIS1N_A > for bool { # [ inline ( always ) ]
fn from ( variant : OIS1N_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OIS1N`" ]
pub type OIS1N_R = crate :: R < bool , OIS1N_A > ; impl OIS1N_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OIS1N_A { match self . bits { false => OIS1N_A :: LOW , true => OIS1N_A :: HIGH } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == OIS1N_A :: LOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == OIS1N_A :: HIGH } } # [ doc = "Write proxy for field `OIS1N`" ]
pub struct OIS1N_W < 'a > { w : & 'a mut W , } impl < 'a > OIS1N_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OIS1N_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "OC1N=0 after a dead-time when MOE=0" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( OIS1N_A :: LOW ) } # [ doc = "OC1N=1 after a dead-time when MOE=0" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( OIS1N_A :: HIGH ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Output Idle state 1\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OIS1_A { # [ doc = "0: OC1=0 (after a dead-time if OC1N is implemented) when MOE=0" ]
LOW = 0 , # [ doc = "1: OC1=1 (after a dead-time if OC1N is implemented) when MOE=0" ]
HIGH = 1 } impl From < OIS1_A > for bool { # [ inline ( always ) ]
fn from ( variant : OIS1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OIS1`" ]
pub type OIS1_R = crate :: R < bool , OIS1_A > ; impl OIS1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OIS1_A { match self . bits { false => OIS1_A :: LOW , true => OIS1_A :: HIGH } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == OIS1_A :: LOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == OIS1_A :: HIGH } } # [ doc = "Write proxy for field `OIS1`" ]
pub struct OIS1_W < 'a > { w : & 'a mut W , } impl < 'a > OIS1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OIS1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "OC1=0 (after a dead-time if OC1N is implemented) when MOE=0" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( OIS1_A :: LOW ) } # [ doc = "OC1=1 (after a dead-time if OC1N is implemented) when MOE=0" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( OIS1_A :: HIGH ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Capture/compare DMA selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CCDS_A { # [ doc = "0: CCx DMA request sent when CCx event occurs" ]
ONCOMPARE = 0 , # [ doc = "1: CCx DMA request sent when update event occurs" ]
ONUPDATE = 1 } impl From < CCDS_A > for bool { # [ inline ( always ) ]
fn from ( variant : CCDS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CCDS`" ]
pub type CCDS_R = crate :: R < bool , CCDS_A > ; impl CCDS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CCDS_A { match self . bits { false => CCDS_A :: ONCOMPARE , true => CCDS_A :: ONUPDATE } } # [ doc = "Checks if the value of the field is `ONCOMPARE`" ]
# [ inline ( always ) ]
pub fn is_on_compare ( & self ) -> bool { * self == CCDS_A :: ONCOMPARE } # [ doc = "Checks if the value of the field is `ONUPDATE`" ]
# [ inline ( always ) ]
pub fn is_on_update ( & self ) -> bool { * self == CCDS_A :: ONUPDATE } } # [ doc = "Write proxy for field `CCDS`" ]
pub struct CCDS_W < 'a > { w : & 'a mut W , } impl < 'a > CCDS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CCDS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request sent when CCx event occurs" ]
# [ inline ( always ) ]
pub fn on_compare ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONCOMPARE ) } # [ doc = "CCx DMA request sent when update event occurs" ]
# [ inline ( always ) ]
pub fn on_update ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONUPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/compare control update selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CCUS_A { # [ doc = "0: Capture/compare are updated only by setting the COMG bit" ]
DEFAULT = 0 , # [ doc = "1: Capture/compare are updated by setting the COMG bit or when an rising edge occurs on TRGI" ]
WITHRISINGEDGE = 1 } impl From < CCUS_A > for bool { # [ inline ( always ) ]
fn from ( variant : CCUS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CCUS`" ]
pub type CCUS_R = crate :: R < bool , CCUS_A > ; impl CCUS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CCUS_A { match self . bits { false => CCUS_A :: DEFAULT , true => CCUS_A :: WITHRISINGEDGE } } # [ doc = "Checks if the value of the field is `DEFAULT`" ]
# [ inline ( always ) ]
pub fn is_default ( & self ) -> bool { * self == CCUS_A :: DEFAULT } # [ doc = "Checks if the value of the field is `WITHRISINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_with_rising_edge ( & self ) -> bool { * self == CCUS_A :: WITHRISINGEDGE } } # [ doc = "Write proxy for field `CCUS`" ]
pub struct CCUS_W < 'a > { w : & 'a mut W , } impl < 'a > CCUS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CCUS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Capture/compare are updated only by setting the COMG bit" ]
# [ inline ( always ) ]
pub fn default ( self ) -> & 'a mut W { self . variant ( CCUS_A :: DEFAULT ) } # [ doc = "Capture/compare are updated by setting the COMG bit or when an rising edge occurs on TRGI" ]
# [ inline ( always ) ]
pub fn with_rising_edge ( self ) -> & 'a mut W { self . variant ( CCUS_A :: WITHRISINGEDGE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare preloaded control\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CCPC_A { # [ doc = "0: CCxE, CCxNE and OCxM bits are not preloaded" ]
NOTPRELOADED = 0 , # [ doc = "1: CCxE, CCxNE and OCxM bits are preloaded" ]
PRELOADED = 1 } impl From < CCPC_A > for bool { # [ inline ( always ) ]
fn from ( variant : CCPC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CCPC`" ]
pub type CCPC_R = crate :: R < bool , CCPC_A > ; impl CCPC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CCPC_A { match self . bits { false => CCPC_A :: NOTPRELOADED , true => CCPC_A :: PRELOADED } } # [ doc = "Checks if the value of the field is `NOTPRELOADED`" ]
# [ inline ( always ) ]
pub fn is_not_preloaded ( & self ) -> bool { * self == CCPC_A :: NOTPRELOADED } # [ doc = "Checks if the value of the field is `PRELOADED`" ]
# [ inline ( always ) ]
pub fn is_preloaded ( & self ) -> bool { * self == CCPC_A :: PRELOADED } } # [ doc = "Write proxy for field `CCPC`" ]
pub struct CCPC_W < 'a > { w : & 'a mut W , } impl < 'a > CCPC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CCPC_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCxE, CCxNE and OCxM bits are not preloaded" ]
# [ inline ( always ) ]
pub fn not_preloaded ( self ) -> & 'a mut W { self . variant ( CCPC_A :: NOTPRELOADED ) } # [ doc = "CCxE, CCxNE and OCxM bits are preloaded" ]
# [ inline ( always ) ]
pub fn preloaded ( self ) -> & 'a mut W { self . variant ( CCPC_A :: PRELOADED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 9 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1n ( & self ) -> OIS1N_R { OIS1N_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1 ( & self ) -> OIS1_R { OIS1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & self ) -> CCDS_R { CCDS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/compare control update selection" ]
# [ inline ( always ) ]
pub fn ccus ( & self ) -> CCUS_R { CCUS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Capture/compare preloaded control" ]
# [ inline ( always ) ]
pub fn ccpc ( & self ) -> CCPC_R { CCPC_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 9 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1n ( & mut self ) -> OIS1N_W { OIS1N_W { w : self } } # [ doc = "Bit 8 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1 ( & mut self ) -> OIS1_W { OIS1_W { w : self } } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & mut self ) -> CCDS_W { CCDS_W { w : self } } # [ doc = "Bit 2 - Capture/compare control update selection" ]
# [ inline ( always ) ]
pub fn ccus ( & mut self ) -> CCUS_W { CCUS_W { w : self } } # [ doc = "Bit 0 - Capture/compare preloaded control" ]
# [ inline ( always ) ]
pub fn ccpc ( & mut self ) -> CCPC_W { CCPC_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TDE`" ]
pub type TDE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TDE`" ]
pub struct TDE_W < 'a > { w : & 'a mut W , } impl < 'a > TDE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Capture/Compare 1 DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC1DE_A { # [ doc = "0: CC1 DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: CC1 DMA request enabled" ]
ENABLED = 1 } impl From < CC1DE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC1DE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC1DE`" ]
pub type CC1DE_R = crate :: R < bool , CC1DE_A > ; impl CC1DE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC1DE_A { match self . bits { false => CC1DE_A :: DISABLED , true => CC1DE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC1DE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC1DE_A :: ENABLED } } # [ doc = "Write proxy for field `CC1DE`" ]
pub struct CC1DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CC1 DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC1DE_A :: DISABLED ) } # [ doc = "CC1 DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC1DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `UDE`" ]
pub type UDE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `UDE`" ]
pub struct UDE_W < 'a > { w : & 'a mut W , } impl < 'a > UDE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Break interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BIE_A { # [ doc = "0: Break interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Break interrupt enabled" ]
ENABLED = 1 } impl From < BIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : BIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BIE`" ]
pub type BIE_R = crate :: R < bool , BIE_A > ; impl BIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BIE_A { match self . bits { false => BIE_A :: DISABLED , true => BIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == BIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == BIE_A :: ENABLED } } # [ doc = "Write proxy for field `BIE`" ]
pub struct BIE_W < 'a > { w : & 'a mut W , } impl < 'a > BIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Break interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( BIE_A :: DISABLED ) } # [ doc = "Break interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( BIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `TIE`" ]
pub type TIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TIE`" ]
pub struct TIE_W < 'a > { w : & 'a mut W , } impl < 'a > TIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "COM interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMIE_A { # [ doc = "0: COM interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: COM interrupt enabled" ]
ENABLED = 1 } impl From < COMIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMIE`" ]
pub type COMIE_R = crate :: R < bool , COMIE_A > ; impl COMIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMIE_A { match self . bits { false => COMIE_A :: DISABLED , true => COMIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == COMIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == COMIE_A :: ENABLED } } # [ doc = "Write proxy for field `COMIE`" ]
pub struct COMIE_W < 'a > { w : & 'a mut W , } impl < 'a > COMIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "COM interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( COMIE_A :: DISABLED ) } # [ doc = "COM interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( COMIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Capture/Compare 1 interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC1IE_A { # [ doc = "0: CC1 interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: CC1 interrupt enabled" ]
ENABLED = 1 } impl From < CC1IE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC1IE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , CC1IE_A > ; impl CC1IE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC1IE_A { match self . bits { false => CC1IE_A :: DISABLED , true => CC1IE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC1IE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC1IE_A :: ENABLED } } # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CC1 interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC1IE_A :: DISABLED ) } # [ doc = "CC1 interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC1IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & self ) -> TDE_R { TDE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & self ) -> CC1DE_R { CC1DE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & self ) -> UDE_R { UDE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Break interrupt enable" ]
# [ inline ( always ) ]
pub fn bie ( & self ) -> BIE_R { BIE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & self ) -> TIE_R { TIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - COM interrupt enable" ]
# [ inline ( always ) ]
pub fn comie ( & self ) -> COMIE_R { COMIE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & mut self ) -> TDE_W { TDE_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & mut self ) -> CC1DE_W { CC1DE_W { w : self } } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & mut self ) -> UDE_W { UDE_W { w : self } } # [ doc = "Bit 7 - Break interrupt enable" ]
# [ inline ( always ) ]
pub fn bie ( & mut self ) -> BIE_W { BIE_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & mut self ) -> TIE_W { TIE_W { w : self } } # [ doc = "Bit 5 - COM interrupt enable" ]
# [ inline ( always ) ]
pub fn comie ( & mut self ) -> COMIE_W { COMIE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `BIF`" ]
pub type BIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BIF`" ]
pub struct BIF_W < 'a > { w : & 'a mut W , } impl < 'a > BIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `TIF`" ]
pub type TIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TIF`" ]
pub struct TIF_W < 'a > { w : & 'a mut W , } impl < 'a > TIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `COMIF`" ]
pub type COMIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMIF`" ]
pub struct COMIF_W < 'a > { w : & 'a mut W , } impl < 'a > COMIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Break interrupt flag" ]
# [ inline ( always ) ]
pub fn bif ( & self ) -> BIF_R { BIF_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & self ) -> TIF_R { TIF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - COM interrupt flag" ]
# [ inline ( always ) ]
pub fn comif ( & self ) -> COMIF_R { COMIF_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 7 - Break interrupt flag" ]
# [ inline ( always ) ]
pub fn bif ( & mut self ) -> BIF_W { BIF_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & mut self ) -> TIF_W { TIF_W { w : self } } # [ doc = "Bit 5 - COM interrupt flag" ]
# [ inline ( always ) ]
pub fn comif ( & mut self ) -> COMIF_W { COMIF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `BG`" ]
pub struct BG_W < 'a > { w : & 'a mut W , } impl < 'a > BG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Write proxy for field `TG`" ]
pub struct TG_W < 'a > { w : & 'a mut W , } impl < 'a > TG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Write proxy for field `COMG`" ]
pub struct COMG_W < 'a > { w : & 'a mut W , } impl < 'a > COMG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 7 - Break generation" ]
# [ inline ( always ) ]
pub fn bg ( & mut self ) -> BG_W { BG_W { w : self } } # [ doc = "Bit 6 - Trigger generation" ]
# [ inline ( always ) ]
pub fn tg ( & mut self ) -> TG_W { TG_W { w : self } } # [ doc = "Bit 5 - Capture/Compare control update generation" ]
# [ inline ( always ) ]
pub fn comg ( & mut self ) -> COMG_W { COMG_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register 1 (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC1NE`" ]
pub type CC1NE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NE`" ]
pub struct CC1NE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 1 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc1ne ( & self ) -> CC1NE_R { CC1NE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 1 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc1ne ( & mut self ) -> CC1NE_W { CC1NE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcr](rcr) module" ]
pub type RCR = crate :: Reg < u32 , _RCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RCR ; # [ doc = "`read()` method returns [rcr::R](rcr::R) reader structure" ]
impl crate :: Readable for RCR { } # [ doc = "`write(|w| ..)` method takes [rcr::W](rcr::W) writer structure" ]
impl crate :: Writable for RCR { } # [ doc = "repetition counter register" ]
pub mod rcr { # [ doc = "Reader of register RCR" ]
pub type R = crate :: R < u32 , super :: RCR > ; # [ doc = "Writer for register RCR" ]
pub type W = crate :: W < u32 , super :: RCR > ; # [ doc = "Register RCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `REP`" ]
pub type REP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `REP`" ]
pub struct REP_W < 'a > { w : & 'a mut W , } impl < 'a > REP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - Repetition counter value" ]
# [ inline ( always ) ]
pub fn rep ( & self ) -> REP_R { REP_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - Repetition counter value" ]
# [ inline ( always ) ]
pub fn rep ( & mut self ) -> REP_W { REP_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr1](ccr1) module" ]
pub type CCR1 = crate :: Reg < u32 , _CCR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR1 ; # [ doc = "`read()` method returns [ccr1::R](ccr1::R) reader structure" ]
impl crate :: Readable for CCR1 { } # [ doc = "`write(|w| ..)` method takes [ccr1::W](ccr1::W) writer structure" ]
impl crate :: Writable for CCR1 { } # [ doc = "capture/compare register 1" ]
pub mod ccr1 { # [ doc = "Reader of register CCR1" ]
pub type R = crate :: R < u32 , super :: CCR1 > ; # [ doc = "Writer for register CCR1" ]
pub type W = crate :: W < u32 , super :: CCR1 > ; # [ doc = "Register CCR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR1`" ]
pub type CCR1_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR1`" ]
pub struct CCR1_W < 'a > { w : & 'a mut W , } impl < 'a > CCR1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr1 ( & self ) -> CCR1_R { CCR1_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr1 ( & mut self ) -> CCR1_W { CCR1_W { w : self } } } } # [ doc = "break and dead-time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdtr](bdtr) module" ]
pub type BDTR = crate :: Reg < u32 , _BDTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BDTR ; # [ doc = "`read()` method returns [bdtr::R](bdtr::R) reader structure" ]
impl crate :: Readable for BDTR { } # [ doc = "`write(|w| ..)` method takes [bdtr::W](bdtr::W) writer structure" ]
impl crate :: Writable for BDTR { } # [ doc = "break and dead-time register" ]
pub mod bdtr { # [ doc = "Reader of register BDTR" ]
pub type R = crate :: R < u32 , super :: BDTR > ; # [ doc = "Writer for register BDTR" ]
pub type W = crate :: W < u32 , super :: BDTR > ; # [ doc = "Register BDTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BDTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MOE`" ]
pub type MOE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MOE`" ]
pub struct MOE_W < 'a > { w : & 'a mut W , } impl < 'a > MOE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `AOE`" ]
pub type AOE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `AOE`" ]
pub struct AOE_W < 'a > { w : & 'a mut W , } impl < 'a > AOE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `BKP`" ]
pub type BKP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BKP`" ]
pub struct BKP_W < 'a > { w : & 'a mut W , } impl < 'a > BKP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `BKE`" ]
pub type BKE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BKE`" ]
pub struct BKE_W < 'a > { w : & 'a mut W , } impl < 'a > BKE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `OSSR`" ]
pub type OSSR_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OSSR`" ]
pub struct OSSR_W < 'a > { w : & 'a mut W , } impl < 'a > OSSR_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OSSI`" ]
pub type OSSI_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OSSI`" ]
pub struct OSSI_W < 'a > { w : & 'a mut W , } impl < 'a > OSSI_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `DTG`" ]
pub type DTG_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DTG`" ]
pub struct DTG_W < 'a > { w : & 'a mut W , } impl < 'a > DTG_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bit 15 - Main output enable" ]
# [ inline ( always ) ]
pub fn moe ( & self ) -> MOE_R { MOE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Automatic output enable" ]
# [ inline ( always ) ]
pub fn aoe ( & self ) -> AOE_R { AOE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Break polarity" ]
# [ inline ( always ) ]
pub fn bkp ( & self ) -> BKP_R { BKP_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Break enable" ]
# [ inline ( always ) ]
pub fn bke ( & self ) -> BKE_R { BKE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Off-state selection for Run mode" ]
# [ inline ( always ) ]
pub fn ossr ( & self ) -> OSSR_R { OSSR_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Off-state selection for Idle mode" ]
# [ inline ( always ) ]
pub fn ossi ( & self ) -> OSSI_R { OSSI_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Lock configuration" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:7 - Dead-time generator setup" ]
# [ inline ( always ) ]
pub fn dtg ( & self ) -> DTG_R { DTG_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bit 15 - Main output enable" ]
# [ inline ( always ) ]
pub fn moe ( & mut self ) -> MOE_W { MOE_W { w : self } } # [ doc = "Bit 14 - Automatic output enable" ]
# [ inline ( always ) ]
pub fn aoe ( & mut self ) -> AOE_W { AOE_W { w : self } } # [ doc = "Bit 13 - Break polarity" ]
# [ inline ( always ) ]
pub fn bkp ( & mut self ) -> BKP_W { BKP_W { w : self } } # [ doc = "Bit 12 - Break enable" ]
# [ inline ( always ) ]
pub fn bke ( & mut self ) -> BKE_W { BKE_W { w : self } } # [ doc = "Bit 11 - Off-state selection for Run mode" ]
# [ inline ( always ) ]
pub fn ossr ( & mut self ) -> OSSR_W { OSSR_W { w : self } } # [ doc = "Bit 10 - Off-state selection for Idle mode" ]
# [ inline ( always ) ]
pub fn ossi ( & mut self ) -> OSSI_W { OSSI_W { w : self } } # [ doc = "Bits 8:9 - Lock configuration" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } # [ doc = "Bits 0:7 - Dead-time generator setup" ]
# [ inline ( always ) ]
pub fn dtg ( & mut self ) -> DTG_W { DTG_W { w : self } } } } # [ doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module" ]
pub type DCR = crate :: Reg < u32 , _DCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DCR ; # [ doc = "`read()` method returns [dcr::R](dcr::R) reader structure" ]
impl crate :: Readable for DCR { } # [ doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure" ]
impl crate :: Writable for DCR { } # [ doc = "DMA control register" ]
pub mod dcr { # [ doc = "Reader of register DCR" ]
pub type R = crate :: R < u32 , super :: DCR > ; # [ doc = "Writer for register DCR" ]
pub type W = crate :: W < u32 , super :: DCR > ; # [ doc = "Register DCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBL`" ]
pub type DBL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBL`" ]
pub struct DBL_W < 'a > { w : & 'a mut W , } impl < 'a > DBL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 8 ) ) | ( ( ( value as u32 ) & 0x1f ) << 8 ) ; self . w } } # [ doc = "Reader of field `DBA`" ]
pub type DBA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBA`" ]
pub struct DBA_W < 'a > { w : & 'a mut W , } impl < 'a > DBA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & self ) -> DBL_R { DBL_R :: new ( ( ( self . bits >> 8 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & self ) -> DBA_R { DBA_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & mut self ) -> DBL_W { DBL_W { w : self } } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & mut self ) -> DBA_W { DBA_W { w : self } } } } # [ doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module" ]
pub type DMAR = crate :: Reg < u32 , _DMAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DMAR ; # [ doc = "`read()` method returns [dmar::R](dmar::R) reader structure" ]
impl crate :: Readable for DMAR { } # [ doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure" ]
impl crate :: Writable for DMAR { } # [ doc = "DMA address for full transfer" ]
pub mod dmar { # [ doc = "Reader of register DMAR" ]
pub type R = crate :: R < u32 , super :: DMAR > ; # [ doc = "Writer for register DMAR" ]
pub type W = crate :: W < u32 , super :: DMAR > ; # [ doc = "Register DMAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DMAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAB`" ]
pub type DMAB_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DMAB`" ]
pub struct DMAB_W < 'a > { w : & 'a mut W , } impl < 'a > DMAB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & self ) -> DMAB_R { DMAB_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & mut self ) -> DMAB_W { DMAB_W { w : self } } } } } # [ doc = "General-purpose-timers" ]
pub struct TIM17 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM17 { } impl TIM17 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim16 :: RegisterBlock { 0x4001_4800 as * const _ } } impl Deref for TIM17 { type Target = tim16 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM17 :: ptr ( ) } } } # [ doc = "General-purpose-timers" ]
pub struct TIM20 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM20 { } impl TIM20 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim16 :: RegisterBlock { 0x4001_5000 as * const _ } } impl Deref for TIM20 { type Target = tim16 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM20 :: ptr ( ) } } } # [ doc = "Universal synchronous asynchronous receiver transmitter" ]
pub struct USART1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for USART1 { } impl USART1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const usart1 :: RegisterBlock { 0x4001_3800 as * const _ } } impl Deref for USART1 { type Target = usart1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * USART1 :: ptr ( ) } } } # [ doc = "Universal synchronous asynchronous receiver transmitter" ]
pub mod usart1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - Control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - Control register 3" ]
pub cr3 : CR3 , # [ doc = "0x0c - Baud rate register" ]
pub brr : BRR , # [ doc = "0x10 - Guard time and prescaler register" ]
pub gtpr : GTPR , # [ doc = "0x14 - Receiver timeout register" ]
pub rtor : RTOR , # [ doc = "0x18 - Request register" ]
pub rqr : RQR , # [ doc = "0x1c - Interrupt & status register" ]
pub isr : ISR , # [ doc = "0x20 - Interrupt flag clear register" ]
pub icr : ICR , # [ doc = "0x24 - Receive data register" ]
pub rdr : RDR , # [ doc = "0x28 - Transmit data register" ]
pub tdr : TDR , } # [ doc = "Control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "Control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "End of Block interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOBIE_A { # [ doc = "0: Interrupt is inhibited" ]
DISABLED = 0 , # [ doc = "1: A USART interrupt is generated when the EOBF flag is set in the ISR register" ]
ENABLED = 1 } impl From < EOBIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOBIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOBIE`" ]
pub type EOBIE_R = crate :: R < bool , EOBIE_A > ; impl EOBIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOBIE_A { match self . bits { false => EOBIE_A :: DISABLED , true => EOBIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EOBIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EOBIE_A :: ENABLED } } # [ doc = "Write proxy for field `EOBIE`" ]
pub struct EOBIE_W < 'a > { w : & 'a mut W , } impl < 'a > EOBIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOBIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is inhibited" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EOBIE_A :: DISABLED ) } # [ doc = "A USART interrupt is generated when the EOBF flag is set in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EOBIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Receiver timeout interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RTOIE_A { # [ doc = "0: Interrupt is inhibited" ]
DISABLED = 0 , # [ doc = "1: An USART interrupt is generated when the RTOF bit is set in the ISR register" ]
ENABLED = 1 } impl From < RTOIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RTOIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RTOIE`" ]
pub type RTOIE_R = crate :: R < bool , RTOIE_A > ; impl RTOIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RTOIE_A { match self . bits { false => RTOIE_A :: DISABLED , true => RTOIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RTOIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RTOIE_A :: ENABLED } } # [ doc = "Write proxy for field `RTOIE`" ]
pub struct RTOIE_W < 'a > { w : & 'a mut W , } impl < 'a > RTOIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RTOIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is inhibited" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RTOIE_A :: DISABLED ) } # [ doc = "An USART interrupt is generated when the RTOF bit is set in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RTOIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `DEAT`" ]
pub type DEAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DEAT`" ]
pub struct DEAT_W < 'a > { w : & 'a mut W , } impl < 'a > DEAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 21 ) ) | ( ( ( value as u32 ) & 0x1f ) << 21 ) ; self . w } } # [ doc = "Reader of field `DEDT`" ]
pub type DEDT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DEDT`" ]
pub struct DEDT_W < 'a > { w : & 'a mut W , } impl < 'a > DEDT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 16 ) ) | ( ( ( value as u32 ) & 0x1f ) << 16 ) ; self . w } } # [ doc = "Oversampling mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVER8_A { # [ doc = "0: Oversampling by 16" ]
OVERSAMPLING16 = 0 , # [ doc = "1: Oversampling by 8" ]
OVERSAMPLING8 = 1 } impl From < OVER8_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVER8_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVER8`" ]
pub type OVER8_R = crate :: R < bool , OVER8_A > ; impl OVER8_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVER8_A { match self . bits { false => OVER8_A :: OVERSAMPLING16 , true => OVER8_A :: OVERSAMPLING8 } } # [ doc = "Checks if the value of the field is `OVERSAMPLING16`" ]
# [ inline ( always ) ]
pub fn is_oversampling16 ( & self ) -> bool { * self == OVER8_A :: OVERSAMPLING16 } # [ doc = "Checks if the value of the field is `OVERSAMPLING8`" ]
# [ inline ( always ) ]
pub fn is_oversampling8 ( & self ) -> bool { * self == OVER8_A :: OVERSAMPLING8 } } # [ doc = "Write proxy for field `OVER8`" ]
pub struct OVER8_W < 'a > { w : & 'a mut W , } impl < 'a > OVER8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OVER8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Oversampling by 16" ]
# [ inline ( always ) ]
pub fn oversampling16 ( self ) -> & 'a mut W { self . variant ( OVER8_A :: OVERSAMPLING16 ) } # [ doc = "Oversampling by 8" ]
# [ inline ( always ) ]
pub fn oversampling8 ( self ) -> & 'a mut W { self . variant ( OVER8_A :: OVERSAMPLING8 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Character match interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CMIE_A { # [ doc = "0: Interrupt is disabled" ]
DISABLED = 0 , # [ doc = "1: Interrupt is generated when the CMF bit is set in the ISR register" ]
ENABLED = 1 } impl From < CMIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CMIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CMIE`" ]
pub type CMIE_R = crate :: R < bool , CMIE_A > ; impl CMIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CMIE_A { match self . bits { false => CMIE_A :: DISABLED , true => CMIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CMIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CMIE_A :: ENABLED } } # [ doc = "Write proxy for field `CMIE`" ]
pub struct CMIE_W < 'a > { w : & 'a mut W , } impl < 'a > CMIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CMIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CMIE_A :: DISABLED ) } # [ doc = "Interrupt is generated when the CMF bit is set in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CMIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Mute mode enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MME_A { # [ doc = "0: Receiver in active mode permanently" ]
DISABLED = 0 , # [ doc = "1: Receiver can switch between mute mode and active mode" ]
ENABLED = 1 } impl From < MME_A > for bool { # [ inline ( always ) ]
fn from ( variant : MME_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MME`" ]
pub type MME_R = crate :: R < bool , MME_A > ; impl MME_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MME_A { match self . bits { false => MME_A :: DISABLED , true => MME_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == MME_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == MME_A :: ENABLED } } # [ doc = "Write proxy for field `MME`" ]
pub struct MME_W < 'a > { w : & 'a mut W , } impl < 'a > MME_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MME_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Receiver in active mode permanently" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( MME_A :: DISABLED ) } # [ doc = "Receiver can switch between mute mode and active mode" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( MME_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Word length\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum M_A { # [ doc = "0: 1 start bit, 8 data bits, n stop bits" ]
BIT8 = 0 , # [ doc = "1: 1 start bit, 9 data bits, n stop bits" ]
BIT9 = 1 } impl From < M_A > for bool { # [ inline ( always ) ]
fn from ( variant : M_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `M`" ]
pub type M_R = crate :: R < bool , M_A > ; impl M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> M_A { match self . bits { false => M_A :: BIT8 , true => M_A :: BIT9 } } # [ doc = "Checks if the value of the field is `BIT8`" ]
# [ inline ( always ) ]
pub fn is_bit8 ( & self ) -> bool { * self == M_A :: BIT8 } # [ doc = "Checks if the value of the field is `BIT9`" ]
# [ inline ( always ) ]
pub fn is_bit9 ( & self ) -> bool { * self == M_A :: BIT9 } } # [ doc = "Write proxy for field `M`" ]
pub struct M_W < 'a > { w : & 'a mut W , } impl < 'a > M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : M_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "1 start bit, 8 data bits, n stop bits" ]
# [ inline ( always ) ]
pub fn bit8 ( self ) -> & 'a mut W { self . variant ( M_A :: BIT8 ) } # [ doc = "1 start bit, 9 data bits, n stop bits" ]
# [ inline ( always ) ]
pub fn bit9 ( self ) -> & 'a mut W { self . variant ( M_A :: BIT9 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Receiver wakeup method\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WAKE_A { # [ doc = "0: Idle line" ]
IDLE = 0 , # [ doc = "1: Address mask" ]
ADDRESS = 1 } impl From < WAKE_A > for bool { # [ inline ( always ) ]
fn from ( variant : WAKE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WAKE`" ]
pub type WAKE_R = crate :: R < bool , WAKE_A > ; impl WAKE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WAKE_A { match self . bits { false => WAKE_A :: IDLE , true => WAKE_A :: ADDRESS } } # [ doc = "Checks if the value of the field is `IDLE`" ]
# [ inline ( always ) ]
pub fn is_idle ( & self ) -> bool { * self == WAKE_A :: IDLE } # [ doc = "Checks if the value of the field is `ADDRESS`" ]
# [ inline ( always ) ]
pub fn is_address ( & self ) -> bool { * self == WAKE_A :: ADDRESS } } # [ doc = "Write proxy for field `WAKE`" ]
pub struct WAKE_W < 'a > { w : & 'a mut W , } impl < 'a > WAKE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WAKE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Idle line" ]
# [ inline ( always ) ]
pub fn idle ( self ) -> & 'a mut W { self . variant ( WAKE_A :: IDLE ) } # [ doc = "Address mask" ]
# [ inline ( always ) ]
pub fn address ( self ) -> & 'a mut W { self . variant ( WAKE_A :: ADDRESS ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Parity control enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PCE_A { # [ doc = "0: Parity control disabled" ]
DISABLED = 0 , # [ doc = "1: Parity control enabled" ]
ENABLED = 1 } impl From < PCE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PCE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PCE`" ]
pub type PCE_R = crate :: R < bool , PCE_A > ; impl PCE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PCE_A { match self . bits { false => PCE_A :: DISABLED , true => PCE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PCE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PCE_A :: ENABLED } } # [ doc = "Write proxy for field `PCE`" ]
pub struct PCE_W < 'a > { w : & 'a mut W , } impl < 'a > PCE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PCE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Parity control disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PCE_A :: DISABLED ) } # [ doc = "Parity control enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PCE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Parity selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PS_A { # [ doc = "0: Even parity" ]
EVEN = 0 , # [ doc = "1: Odd parity" ]
ODD = 1 } impl From < PS_A > for bool { # [ inline ( always ) ]
fn from ( variant : PS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PS`" ]
pub type PS_R = crate :: R < bool , PS_A > ; impl PS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PS_A { match self . bits { false => PS_A :: EVEN , true => PS_A :: ODD } } # [ doc = "Checks if the value of the field is `EVEN`" ]
# [ inline ( always ) ]
pub fn is_even ( & self ) -> bool { * self == PS_A :: EVEN } # [ doc = "Checks if the value of the field is `ODD`" ]
# [ inline ( always ) ]
pub fn is_odd ( & self ) -> bool { * self == PS_A :: ODD } } # [ doc = "Write proxy for field `PS`" ]
pub struct PS_W < 'a > { w : & 'a mut W , } impl < 'a > PS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Even parity" ]
# [ inline ( always ) ]
pub fn even ( self ) -> & 'a mut W { self . variant ( PS_A :: EVEN ) } # [ doc = "Odd parity" ]
# [ inline ( always ) ]
pub fn odd ( self ) -> & 'a mut W { self . variant ( PS_A :: ODD ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "PE interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PEIE_A { # [ doc = "0: Interrupt is disabled" ]
DISABLED = 0 , # [ doc = "1: Interrupt is generated whenever PE=1 in the ISR register" ]
ENABLED = 1 } impl From < PEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PEIE`" ]
pub type PEIE_R = crate :: R < bool , PEIE_A > ; impl PEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PEIE_A { match self . bits { false => PEIE_A :: DISABLED , true => PEIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PEIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PEIE_A :: ENABLED } } # [ doc = "Write proxy for field `PEIE`" ]
pub struct PEIE_W < 'a > { w : & 'a mut W , } impl < 'a > PEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PEIE_A :: DISABLED ) } # [ doc = "Interrupt is generated whenever PE=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PEIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXEIE_A { # [ doc = "0: Interrupt is disabled" ]
DISABLED = 0 , # [ doc = "1: Interrupt is generated whenever TXE=1 in the ISR register" ]
ENABLED = 1 } impl From < TXEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXEIE`" ]
pub type TXEIE_R = crate :: R < bool , TXEIE_A > ; impl TXEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXEIE_A { match self . bits { false => TXEIE_A :: DISABLED , true => TXEIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TXEIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TXEIE_A :: ENABLED } } # [ doc = "Write proxy for field `TXEIE`" ]
pub struct TXEIE_W < 'a > { w : & 'a mut W , } impl < 'a > TXEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TXEIE_A :: DISABLED ) } # [ doc = "Interrupt is generated whenever TXE=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TXEIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Transmission complete interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TCIE_A { # [ doc = "0: Interrupt is disabled" ]
DISABLED = 0 , # [ doc = "1: Interrupt is generated whenever TC=1 in the ISR register" ]
ENABLED = 1 } impl From < TCIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TCIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TCIE`" ]
pub type TCIE_R = crate :: R < bool , TCIE_A > ; impl TCIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TCIE_A { match self . bits { false => TCIE_A :: DISABLED , true => TCIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TCIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TCIE_A :: ENABLED } } # [ doc = "Write proxy for field `TCIE`" ]
pub struct TCIE_W < 'a > { w : & 'a mut W , } impl < 'a > TCIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TCIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TCIE_A :: DISABLED ) } # [ doc = "Interrupt is generated whenever TC=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TCIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "RXNE interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXNEIE_A { # [ doc = "0: Interrupt is disabled" ]
DISABLED = 0 , # [ doc = "1: Interrupt is generated whenever ORE=1 or RXNE=1 in the ISR register" ]
ENABLED = 1 } impl From < RXNEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXNEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXNEIE`" ]
pub type RXNEIE_R = crate :: R < bool , RXNEIE_A > ; impl RXNEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXNEIE_A { match self . bits { false => RXNEIE_A :: DISABLED , true => RXNEIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RXNEIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RXNEIE_A :: ENABLED } } # [ doc = "Write proxy for field `RXNEIE`" ]
pub struct RXNEIE_W < 'a > { w : & 'a mut W , } impl < 'a > RXNEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXNEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RXNEIE_A :: DISABLED ) } # [ doc = "Interrupt is generated whenever ORE=1 or RXNE=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RXNEIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "IDLE interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IDLEIE_A { # [ doc = "0: Interrupt is disabled" ]
DISABLED = 0 , # [ doc = "1: Interrupt is generated whenever IDLE=1 in the ISR register" ]
ENABLED = 1 } impl From < IDLEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : IDLEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IDLEIE`" ]
pub type IDLEIE_R = crate :: R < bool , IDLEIE_A > ; impl IDLEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IDLEIE_A { match self . bits { false => IDLEIE_A :: DISABLED , true => IDLEIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == IDLEIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == IDLEIE_A :: ENABLED } } # [ doc = "Write proxy for field `IDLEIE`" ]
pub struct IDLEIE_W < 'a > { w : & 'a mut W , } impl < 'a > IDLEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IDLEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( IDLEIE_A :: DISABLED ) } # [ doc = "Interrupt is generated whenever IDLE=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( IDLEIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Transmitter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TE_A { # [ doc = "0: Transmitter is disabled" ]
DISABLED = 0 , # [ doc = "1: Transmitter is enabled" ]
ENABLED = 1 } impl From < TE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TE`" ]
pub type TE_R = crate :: R < bool , TE_A > ; impl TE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TE_A { match self . bits { false => TE_A :: DISABLED , true => TE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TE_A :: ENABLED } } # [ doc = "Write proxy for field `TE`" ]
pub struct TE_W < 'a > { w : & 'a mut W , } impl < 'a > TE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Transmitter is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TE_A :: DISABLED ) } # [ doc = "Transmitter is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Receiver enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RE_A { # [ doc = "0: Receiver is disabled" ]
DISABLED = 0 , # [ doc = "1: Receiver is enabled" ]
ENABLED = 1 } impl From < RE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RE`" ]
pub type RE_R = crate :: R < bool , RE_A > ; impl RE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RE_A { match self . bits { false => RE_A :: DISABLED , true => RE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RE_A :: ENABLED } } # [ doc = "Write proxy for field `RE`" ]
pub struct RE_W < 'a > { w : & 'a mut W , } impl < 'a > RE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Receiver is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RE_A :: DISABLED ) } # [ doc = "Receiver is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "USART enable in Stop mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UESM_A { # [ doc = "0: USART not able to wake up the MCU from Stop mode" ]
DISABLED = 0 , # [ doc = "1: USART able to wake up the MCU from Stop mode" ]
ENABLED = 1 } impl From < UESM_A > for bool { # [ inline ( always ) ]
fn from ( variant : UESM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UESM`" ]
pub type UESM_R = crate :: R < bool , UESM_A > ; impl UESM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UESM_A { match self . bits { false => UESM_A :: DISABLED , true => UESM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UESM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UESM_A :: ENABLED } } # [ doc = "Write proxy for field `UESM`" ]
pub struct UESM_W < 'a > { w : & 'a mut W , } impl < 'a > UESM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UESM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "USART not able to wake up the MCU from Stop mode" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UESM_A :: DISABLED ) } # [ doc = "USART able to wake up the MCU from Stop mode" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UESM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "USART enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UE_A { # [ doc = "0: UART is disabled" ]
DISABLED = 0 , # [ doc = "1: UART is enabled" ]
ENABLED = 1 } impl From < UE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UE`" ]
pub type UE_R = crate :: R < bool , UE_A > ; impl UE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UE_A { match self . bits { false => UE_A :: DISABLED , true => UE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UE_A :: ENABLED } } # [ doc = "Write proxy for field `UE`" ]
pub struct UE_W < 'a > { w : & 'a mut W , } impl < 'a > UE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "UART is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UE_A :: DISABLED ) } # [ doc = "UART is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 27 - End of Block interrupt enable" ]
# [ inline ( always ) ]
pub fn eobie ( & self ) -> EOBIE_R { EOBIE_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Receiver timeout interrupt enable" ]
# [ inline ( always ) ]
pub fn rtoie ( & self ) -> RTOIE_R { RTOIE_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bits 21:25 - Driver Enable assertion time" ]
# [ inline ( always ) ]
pub fn deat ( & self ) -> DEAT_R { DEAT_R :: new ( ( ( self . bits >> 21 ) & 0x1f ) as u8 ) } # [ doc = "Bits 16:20 - Driver Enable deassertion time" ]
# [ inline ( always ) ]
pub fn dedt ( & self ) -> DEDT_R { DEDT_R :: new ( ( ( self . bits >> 16 ) & 0x1f ) as u8 ) } # [ doc = "Bit 15 - Oversampling mode" ]
# [ inline ( always ) ]
pub fn over8 ( & self ) -> OVER8_R { OVER8_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Character match interrupt enable" ]
# [ inline ( always ) ]
pub fn cmie ( & self ) -> CMIE_R { CMIE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Mute mode enable" ]
# [ inline ( always ) ]
pub fn mme ( & self ) -> MME_R { MME_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Word length" ]
# [ inline ( always ) ]
pub fn m ( & self ) -> M_R { M_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Receiver wakeup method" ]
# [ inline ( always ) ]
pub fn wake ( & self ) -> WAKE_R { WAKE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Parity control enable" ]
# [ inline ( always ) ]
pub fn pce ( & self ) -> PCE_R { PCE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Parity selection" ]
# [ inline ( always ) ]
pub fn ps ( & self ) -> PS_R { PS_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - PE interrupt enable" ]
# [ inline ( always ) ]
pub fn peie ( & self ) -> PEIE_R { PEIE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - interrupt enable" ]
# [ inline ( always ) ]
pub fn txeie ( & self ) -> TXEIE_R { TXEIE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Transmission complete interrupt enable" ]
# [ inline ( always ) ]
pub fn tcie ( & self ) -> TCIE_R { TCIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - RXNE interrupt enable" ]
# [ inline ( always ) ]
pub fn rxneie ( & self ) -> RXNEIE_R { RXNEIE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - IDLE interrupt enable" ]
# [ inline ( always ) ]
pub fn idleie ( & self ) -> IDLEIE_R { IDLEIE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Transmitter enable" ]
# [ inline ( always ) ]
pub fn te ( & self ) -> TE_R { TE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Receiver enable" ]
# [ inline ( always ) ]
pub fn re ( & self ) -> RE_R { RE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - USART enable in Stop mode" ]
# [ inline ( always ) ]
pub fn uesm ( & self ) -> UESM_R { UESM_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - USART enable" ]
# [ inline ( always ) ]
pub fn ue ( & self ) -> UE_R { UE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 27 - End of Block interrupt enable" ]
# [ inline ( always ) ]
pub fn eobie ( & mut self ) -> EOBIE_W { EOBIE_W { w : self } } # [ doc = "Bit 26 - Receiver timeout interrupt enable" ]
# [ inline ( always ) ]
pub fn rtoie ( & mut self ) -> RTOIE_W { RTOIE_W { w : self } } # [ doc = "Bits 21:25 - Driver Enable assertion time" ]
# [ inline ( always ) ]
pub fn deat ( & mut self ) -> DEAT_W { DEAT_W { w : self } } # [ doc = "Bits 16:20 - Driver Enable deassertion time" ]
# [ inline ( always ) ]
pub fn dedt ( & mut self ) -> DEDT_W { DEDT_W { w : self } } # [ doc = "Bit 15 - Oversampling mode" ]
# [ inline ( always ) ]
pub fn over8 ( & mut self ) -> OVER8_W { OVER8_W { w : self } } # [ doc = "Bit 14 - Character match interrupt enable" ]
# [ inline ( always ) ]
pub fn cmie ( & mut self ) -> CMIE_W { CMIE_W { w : self } } # [ doc = "Bit 13 - Mute mode enable" ]
# [ inline ( always ) ]
pub fn mme ( & mut self ) -> MME_W { MME_W { w : self } } # [ doc = "Bit 12 - Word length" ]
# [ inline ( always ) ]
pub fn m ( & mut self ) -> M_W { M_W { w : self } } # [ doc = "Bit 11 - Receiver wakeup method" ]
# [ inline ( always ) ]
pub fn wake ( & mut self ) -> WAKE_W { WAKE_W { w : self } } # [ doc = "Bit 10 - Parity control enable" ]
# [ inline ( always ) ]
pub fn pce ( & mut self ) -> PCE_W { PCE_W { w : self } } # [ doc = "Bit 9 - Parity selection" ]
# [ inline ( always ) ]
pub fn ps ( & mut self ) -> PS_W { PS_W { w : self } } # [ doc = "Bit 8 - PE interrupt enable" ]
# [ inline ( always ) ]
pub fn peie ( & mut self ) -> PEIE_W { PEIE_W { w : self } } # [ doc = "Bit 7 - interrupt enable" ]
# [ inline ( always ) ]
pub fn txeie ( & mut self ) -> TXEIE_W { TXEIE_W { w : self } } # [ doc = "Bit 6 - Transmission complete interrupt enable" ]
# [ inline ( always ) ]
pub fn tcie ( & mut self ) -> TCIE_W { TCIE_W { w : self } } # [ doc = "Bit 5 - RXNE interrupt enable" ]
# [ inline ( always ) ]
pub fn rxneie ( & mut self ) -> RXNEIE_W { RXNEIE_W { w : self } } # [ doc = "Bit 4 - IDLE interrupt enable" ]
# [ inline ( always ) ]
pub fn idleie ( & mut self ) -> IDLEIE_W { IDLEIE_W { w : self } } # [ doc = "Bit 3 - Transmitter enable" ]
# [ inline ( always ) ]
pub fn te ( & mut self ) -> TE_W { TE_W { w : self } } # [ doc = "Bit 2 - Receiver enable" ]
# [ inline ( always ) ]
pub fn re ( & mut self ) -> RE_W { RE_W { w : self } } # [ doc = "Bit 1 - USART enable in Stop mode" ]
# [ inline ( always ) ]
pub fn uesm ( & mut self ) -> UESM_W { UESM_W { w : self } } # [ doc = "Bit 0 - USART enable" ]
# [ inline ( always ) ]
pub fn ue ( & mut self ) -> UE_W { UE_W { w : self } } } } # [ doc = "Control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "Control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Receiver timeout enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RTOEN_A { # [ doc = "0: Receiver timeout feature disabled" ]
DISABLED = 0 , # [ doc = "1: Receiver timeout feature enabled" ]
ENABLED = 1 } impl From < RTOEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : RTOEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RTOEN`" ]
pub type RTOEN_R = crate :: R < bool , RTOEN_A > ; impl RTOEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RTOEN_A { match self . bits { false => RTOEN_A :: DISABLED , true => RTOEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RTOEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RTOEN_A :: ENABLED } } # [ doc = "Write proxy for field `RTOEN`" ]
pub struct RTOEN_W < 'a > { w : & 'a mut W , } impl < 'a > RTOEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RTOEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Receiver timeout feature disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RTOEN_A :: DISABLED ) } # [ doc = "Receiver timeout feature enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RTOEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Auto baud rate mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ABRMOD_A { # [ doc = "0: Measurement of the start bit is used to detect the baud rate" ]
START = 0 , # [ doc = "1: Falling edge to falling edge measurement" ]
EDGE = 1 , # [ doc = "2: 0x7F frame detection" ]
FRAME7F = 2 , # [ doc = "3: 0x55 frame detection" ]
FRAME55 = 3 } impl From < ABRMOD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ABRMOD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ABRMOD`" ]
pub type ABRMOD_R = crate :: R < u8 , ABRMOD_A > ; impl ABRMOD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ABRMOD_A { match self . bits { 0 => ABRMOD_A :: START , 1 => ABRMOD_A :: EDGE , 2 => ABRMOD_A :: FRAME7F , 3 => ABRMOD_A :: FRAME55 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `START`" ]
# [ inline ( always ) ]
pub fn is_start ( & self ) -> bool { * self == ABRMOD_A :: START } # [ doc = "Checks if the value of the field is `EDGE`" ]
# [ inline ( always ) ]
pub fn is_edge ( & self ) -> bool { * self == ABRMOD_A :: EDGE } # [ doc = "Checks if the value of the field is `FRAME7F`" ]
# [ inline ( always ) ]
pub fn is_frame7f ( & self ) -> bool { * self == ABRMOD_A :: FRAME7F } # [ doc = "Checks if the value of the field is `FRAME55`" ]
# [ inline ( always ) ]
pub fn is_frame55 ( & self ) -> bool { * self == ABRMOD_A :: FRAME55 } } # [ doc = "Write proxy for field `ABRMOD`" ]
pub struct ABRMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ABRMOD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ABRMOD_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Measurement of the start bit is used to detect the baud rate" ]
# [ inline ( always ) ]
pub fn start ( self ) -> & 'a mut W { self . variant ( ABRMOD_A :: START ) } # [ doc = "Falling edge to falling edge measurement" ]
# [ inline ( always ) ]
pub fn edge ( self ) -> & 'a mut W { self . variant ( ABRMOD_A :: EDGE ) } # [ doc = "0x7F frame detection" ]
# [ inline ( always ) ]
pub fn frame7f ( self ) -> & 'a mut W { self . variant ( ABRMOD_A :: FRAME7F ) } # [ doc = "0x55 frame detection" ]
# [ inline ( always ) ]
pub fn frame55 ( self ) -> & 'a mut W { self . variant ( ABRMOD_A :: FRAME55 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 21 ) ) | ( ( ( value as u32 ) & 0x03 ) << 21 ) ; self . w } } # [ doc = "Auto baud rate enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ABREN_A { # [ doc = "0: Auto baud rate detection is disabled" ]
DISABLED = 0 , # [ doc = "1: Auto baud rate detection is enabled" ]
ENABLED = 1 } impl From < ABREN_A > for bool { # [ inline ( always ) ]
fn from ( variant : ABREN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ABREN`" ]
pub type ABREN_R = crate :: R < bool , ABREN_A > ; impl ABREN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ABREN_A { match self . bits { false => ABREN_A :: DISABLED , true => ABREN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ABREN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ABREN_A :: ENABLED } } # [ doc = "Write proxy for field `ABREN`" ]
pub struct ABREN_W < 'a > { w : & 'a mut W , } impl < 'a > ABREN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ABREN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Auto baud rate detection is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ABREN_A :: DISABLED ) } # [ doc = "Auto baud rate detection is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ABREN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Most significant bit first\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSBFIRST_A { # [ doc = "0: data is transmitted/received with data bit 0 first, following the start bit" ]
LSB = 0 , # [ doc = "1: data is transmitted/received with MSB (bit 7/8/9) first, following the start bit" ]
MSB = 1 } impl From < MSBFIRST_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSBFIRST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSBFIRST`" ]
pub type MSBFIRST_R = crate :: R < bool , MSBFIRST_A > ; impl MSBFIRST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSBFIRST_A { match self . bits { false => MSBFIRST_A :: LSB , true => MSBFIRST_A :: MSB } } # [ doc = "Checks if the value of the field is `LSB`" ]
# [ inline ( always ) ]
pub fn is_lsb ( & self ) -> bool { * self == MSBFIRST_A :: LSB } # [ doc = "Checks if the value of the field is `MSB`" ]
# [ inline ( always ) ]
pub fn is_msb ( & self ) -> bool { * self == MSBFIRST_A :: MSB } } # [ doc = "Write proxy for field `MSBFIRST`" ]
pub struct MSBFIRST_W < 'a > { w : & 'a mut W , } impl < 'a > MSBFIRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSBFIRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "data is transmitted/received with data bit 0 first, following the start bit" ]
# [ inline ( always ) ]
pub fn lsb ( self ) -> & 'a mut W { self . variant ( MSBFIRST_A :: LSB ) } # [ doc = "data is transmitted/received with MSB (bit 7/8/9) first, following the start bit" ]
# [ inline ( always ) ]
pub fn msb ( self ) -> & 'a mut W { self . variant ( MSBFIRST_A :: MSB ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Binary data inversion\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DATAINV_A { # [ doc = "0: Logical data from the data register are send/received in positive/direct logic" ]
POSITIVE = 0 , # [ doc = "1: Logical data from the data register are send/received in negative/inverse logic" ]
NEGATIVE = 1 } impl From < DATAINV_A > for bool { # [ inline ( always ) ]
fn from ( variant : DATAINV_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DATAINV`" ]
pub type DATAINV_R = crate :: R < bool , DATAINV_A > ; impl DATAINV_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DATAINV_A { match self . bits { false => DATAINV_A :: POSITIVE , true => DATAINV_A :: NEGATIVE } } # [ doc = "Checks if the value of the field is `POSITIVE`" ]
# [ inline ( always ) ]
pub fn is_positive ( & self ) -> bool { * self == DATAINV_A :: POSITIVE } # [ doc = "Checks if the value of the field is `NEGATIVE`" ]
# [ inline ( always ) ]
pub fn is_negative ( & self ) -> bool { * self == DATAINV_A :: NEGATIVE } } # [ doc = "Write proxy for field `DATAINV`" ]
pub struct DATAINV_W < 'a > { w : & 'a mut W , } impl < 'a > DATAINV_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DATAINV_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Logical data from the data register are send/received in positive/direct logic" ]
# [ inline ( always ) ]
pub fn positive ( self ) -> & 'a mut W { self . variant ( DATAINV_A :: POSITIVE ) } # [ doc = "Logical data from the data register are send/received in negative/inverse logic" ]
# [ inline ( always ) ]
pub fn negative ( self ) -> & 'a mut W { self . variant ( DATAINV_A :: NEGATIVE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "TX pin active level inversion\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXINV_A { # [ doc = "0: TX pin signal works using the standard logic levels" ]
STANDARD = 0 , # [ doc = "1: TX pin signal values are inverted" ]
INVERTED = 1 } impl From < TXINV_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXINV_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXINV`" ]
pub type TXINV_R = crate :: R < bool , TXINV_A > ; impl TXINV_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXINV_A { match self . bits { false => TXINV_A :: STANDARD , true => TXINV_A :: INVERTED } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == TXINV_A :: STANDARD } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == TXINV_A :: INVERTED } } # [ doc = "Write proxy for field `TXINV`" ]
pub struct TXINV_W < 'a > { w : & 'a mut W , } impl < 'a > TXINV_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXINV_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TX pin signal works using the standard logic levels" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( TXINV_A :: STANDARD ) } # [ doc = "TX pin signal values are inverted" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( TXINV_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "RX pin active level inversion\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXINV_A { # [ doc = "0: RX pin signal works using the standard logic levels" ]
STANDARD = 0 , # [ doc = "1: RX pin signal values are inverted" ]
INVERTED = 1 } impl From < RXINV_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXINV_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXINV`" ]
pub type RXINV_R = crate :: R < bool , RXINV_A > ; impl RXINV_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXINV_A { match self . bits { false => RXINV_A :: STANDARD , true => RXINV_A :: INVERTED } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == RXINV_A :: STANDARD } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == RXINV_A :: INVERTED } } # [ doc = "Write proxy for field `RXINV`" ]
pub struct RXINV_W < 'a > { w : & 'a mut W , } impl < 'a > RXINV_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXINV_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RX pin signal works using the standard logic levels" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( RXINV_A :: STANDARD ) } # [ doc = "RX pin signal values are inverted" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( RXINV_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Swap TX/RX pins\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SWAP_A { # [ doc = "0: TX/RX pins are used as defined in standard pinout" ]
STANDARD = 0 , # [ doc = "1: The TX and RX pins functions are swapped" ]
SWAPPED = 1 } impl From < SWAP_A > for bool { # [ inline ( always ) ]
fn from ( variant : SWAP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SWAP`" ]
pub type SWAP_R = crate :: R < bool , SWAP_A > ; impl SWAP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SWAP_A { match self . bits { false => SWAP_A :: STANDARD , true => SWAP_A :: SWAPPED } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == SWAP_A :: STANDARD } # [ doc = "Checks if the value of the field is `SWAPPED`" ]
# [ inline ( always ) ]
pub fn is_swapped ( & self ) -> bool { * self == SWAP_A :: SWAPPED } } # [ doc = "Write proxy for field `SWAP`" ]
pub struct SWAP_W < 'a > { w : & 'a mut W , } impl < 'a > SWAP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWAP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TX/RX pins are used as defined in standard pinout" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( SWAP_A :: STANDARD ) } # [ doc = "The TX and RX pins functions are swapped" ]
# [ inline ( always ) ]
pub fn swapped ( self ) -> & 'a mut W { self . variant ( SWAP_A :: SWAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "LIN mode enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LINEN_A { # [ doc = "0: LIN mode disabled" ]
DISABLED = 0 , # [ doc = "1: LIN mode enabled" ]
ENABLED = 1 } impl From < LINEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : LINEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LINEN`" ]
pub type LINEN_R = crate :: R < bool , LINEN_A > ; impl LINEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LINEN_A { match self . bits { false => LINEN_A :: DISABLED , true => LINEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == LINEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == LINEN_A :: ENABLED } } # [ doc = "Write proxy for field `LINEN`" ]
pub struct LINEN_W < 'a > { w : & 'a mut W , } impl < 'a > LINEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LINEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "LIN mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LINEN_A :: DISABLED ) } # [ doc = "LIN mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LINEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "STOP bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STOP_A { # [ doc = "0: 1 stop bit" ]
STOP1 = 0 , # [ doc = "1: 0.5 stop bit" ]
STOP0P5 = 1 , # [ doc = "2: 2 stop bit" ]
STOP2 = 2 , # [ doc = "3: 1.5 stop bit" ]
STOP1P5 = 3 } impl From < STOP_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STOP_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STOP`" ]
pub type STOP_R = crate :: R < u8 , STOP_A > ; impl STOP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STOP_A { match self . bits { 0 => STOP_A :: STOP1 , 1 => STOP_A :: STOP0P5 , 2 => STOP_A :: STOP2 , 3 => STOP_A :: STOP1P5 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `STOP1`" ]
# [ inline ( always ) ]
pub fn is_stop1 ( & self ) -> bool { * self == STOP_A :: STOP1 } # [ doc = "Checks if the value of the field is `STOP0P5`" ]
# [ inline ( always ) ]
pub fn is_stop0p5 ( & self ) -> bool { * self == STOP_A :: STOP0P5 } # [ doc = "Checks if the value of the field is `STOP2`" ]
# [ inline ( always ) ]
pub fn is_stop2 ( & self ) -> bool { * self == STOP_A :: STOP2 } # [ doc = "Checks if the value of the field is `STOP1P5`" ]
# [ inline ( always ) ]
pub fn is_stop1p5 ( & self ) -> bool { * self == STOP_A :: STOP1P5 } } # [ doc = "Write proxy for field `STOP`" ]
pub struct STOP_W < 'a > { w : & 'a mut W , } impl < 'a > STOP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STOP_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1 stop bit" ]
# [ inline ( always ) ]
pub fn stop1 ( self ) -> & 'a mut W { self . variant ( STOP_A :: STOP1 ) } # [ doc = "0.5 stop bit" ]
# [ inline ( always ) ]
pub fn stop0p5 ( self ) -> & 'a mut W { self . variant ( STOP_A :: STOP0P5 ) } # [ doc = "2 stop bit" ]
# [ inline ( always ) ]
pub fn stop2 ( self ) -> & 'a mut W { self . variant ( STOP_A :: STOP2 ) } # [ doc = "1.5 stop bit" ]
# [ inline ( always ) ]
pub fn stop1p5 ( self ) -> & 'a mut W { self . variant ( STOP_A :: STOP1P5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CLKEN_A { # [ doc = "0: CK pin disabled" ]
DISABLED = 0 , # [ doc = "1: CK pin enabled" ]
ENABLED = 1 } impl From < CLKEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CLKEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CLKEN`" ]
pub type CLKEN_R = crate :: R < bool , CLKEN_A > ; impl CLKEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CLKEN_A { match self . bits { false => CLKEN_A :: DISABLED , true => CLKEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CLKEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CLKEN_A :: ENABLED } } # [ doc = "Write proxy for field `CLKEN`" ]
pub struct CLKEN_W < 'a > { w : & 'a mut W , } impl < 'a > CLKEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CLKEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CK pin disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CLKEN_A :: DISABLED ) } # [ doc = "CK pin enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CLKEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Clock polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CPOL_A { # [ doc = "0: Steady low value on CK pin outside transmission window" ]
LOW = 0 , # [ doc = "1: Steady high value on CK pin outside transmission window" ]
HIGH = 1 } impl From < CPOL_A > for bool { # [ inline ( always ) ]
fn from ( variant : CPOL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CPOL`" ]
pub type CPOL_R = crate :: R < bool , CPOL_A > ; impl CPOL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CPOL_A { match self . bits { false => CPOL_A :: LOW , true => CPOL_A :: HIGH } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == CPOL_A :: LOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == CPOL_A :: HIGH } } # [ doc = "Write proxy for field `CPOL`" ]
pub struct CPOL_W < 'a > { w : & 'a mut W , } impl < 'a > CPOL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CPOL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Steady low value on CK pin outside transmission window" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( CPOL_A :: LOW ) } # [ doc = "Steady high value on CK pin outside transmission window" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( CPOL_A :: HIGH ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Clock phase\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CPHA_A { # [ doc = "0: The first clock transition is the first data capture edge" ]
FIRST = 0 , # [ doc = "1: The second clock transition is the first data capture edge" ]
SECOND = 1 } impl From < CPHA_A > for bool { # [ inline ( always ) ]
fn from ( variant : CPHA_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CPHA`" ]
pub type CPHA_R = crate :: R < bool , CPHA_A > ; impl CPHA_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CPHA_A { match self . bits { false => CPHA_A :: FIRST , true => CPHA_A :: SECOND } } # [ doc = "Checks if the value of the field is `FIRST`" ]
# [ inline ( always ) ]
pub fn is_first ( & self ) -> bool { * self == CPHA_A :: FIRST } # [ doc = "Checks if the value of the field is `SECOND`" ]
# [ inline ( always ) ]
pub fn is_second ( & self ) -> bool { * self == CPHA_A :: SECOND } } # [ doc = "Write proxy for field `CPHA`" ]
pub struct CPHA_W < 'a > { w : & 'a mut W , } impl < 'a > CPHA_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CPHA_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The first clock transition is the first data capture edge" ]
# [ inline ( always ) ]
pub fn first ( self ) -> & 'a mut W { self . variant ( CPHA_A :: FIRST ) } # [ doc = "The second clock transition is the first data capture edge" ]
# [ inline ( always ) ]
pub fn second ( self ) -> & 'a mut W { self . variant ( CPHA_A :: SECOND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Last bit clock pulse\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LBCL_A { # [ doc = "0: The clock pulse of the last data bit is not output to the CK pin" ]
NOTOUTPUT = 0 , # [ doc = "1: The clock pulse of the last data bit is output to the CK pin" ]
OUTPUT = 1 } impl From < LBCL_A > for bool { # [ inline ( always ) ]
fn from ( variant : LBCL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LBCL`" ]
pub type LBCL_R = crate :: R < bool , LBCL_A > ; impl LBCL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LBCL_A { match self . bits { false => LBCL_A :: NOTOUTPUT , true => LBCL_A :: OUTPUT } } # [ doc = "Checks if the value of the field is `NOTOUTPUT`" ]
# [ inline ( always ) ]
pub fn is_not_output ( & self ) -> bool { * self == LBCL_A :: NOTOUTPUT } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == LBCL_A :: OUTPUT } } # [ doc = "Write proxy for field `LBCL`" ]
pub struct LBCL_W < 'a > { w : & 'a mut W , } impl < 'a > LBCL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LBCL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The clock pulse of the last data bit is not output to the CK pin" ]
# [ inline ( always ) ]
pub fn not_output ( self ) -> & 'a mut W { self . variant ( LBCL_A :: NOTOUTPUT ) } # [ doc = "The clock pulse of the last data bit is output to the CK pin" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( LBCL_A :: OUTPUT ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "LIN break detection interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LBDIE_A { # [ doc = "0: Interrupt is inhibited" ]
DISABLED = 0 , # [ doc = "1: An interrupt is generated whenever LBDF=1 in the ISR register" ]
ENABLED = 1 } impl From < LBDIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : LBDIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LBDIE`" ]
pub type LBDIE_R = crate :: R < bool , LBDIE_A > ; impl LBDIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LBDIE_A { match self . bits { false => LBDIE_A :: DISABLED , true => LBDIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == LBDIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == LBDIE_A :: ENABLED } } # [ doc = "Write proxy for field `LBDIE`" ]
pub struct LBDIE_W < 'a > { w : & 'a mut W , } impl < 'a > LBDIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LBDIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is inhibited" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LBDIE_A :: DISABLED ) } # [ doc = "An interrupt is generated whenever LBDF=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LBDIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "LIN break detection length\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LBDL_A { # [ doc = "0: 10-bit break detection" ]
BIT10 = 0 , # [ doc = "1: 11-bit break detection" ]
BIT11 = 1 } impl From < LBDL_A > for bool { # [ inline ( always ) ]
fn from ( variant : LBDL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LBDL`" ]
pub type LBDL_R = crate :: R < bool , LBDL_A > ; impl LBDL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LBDL_A { match self . bits { false => LBDL_A :: BIT10 , true => LBDL_A :: BIT11 } } # [ doc = "Checks if the value of the field is `BIT10`" ]
# [ inline ( always ) ]
pub fn is_bit10 ( & self ) -> bool { * self == LBDL_A :: BIT10 } # [ doc = "Checks if the value of the field is `BIT11`" ]
# [ inline ( always ) ]
pub fn is_bit11 ( & self ) -> bool { * self == LBDL_A :: BIT11 } } # [ doc = "Write proxy for field `LBDL`" ]
pub struct LBDL_W < 'a > { w : & 'a mut W , } impl < 'a > LBDL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LBDL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "10-bit break detection" ]
# [ inline ( always ) ]
pub fn bit10 ( self ) -> & 'a mut W { self . variant ( LBDL_A :: BIT10 ) } # [ doc = "11-bit break detection" ]
# [ inline ( always ) ]
pub fn bit11 ( self ) -> & 'a mut W { self . variant ( LBDL_A :: BIT11 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "7-bit Address Detection/4-bit Address Detection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADDM7_A { # [ doc = "0: 4-bit address detection" ]
BIT4 = 0 , # [ doc = "1: 7-bit address detection" ]
BIT7 = 1 } impl From < ADDM7_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADDM7_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADDM7`" ]
pub type ADDM7_R = crate :: R < bool , ADDM7_A > ; impl ADDM7_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADDM7_A { match self . bits { false => ADDM7_A :: BIT4 , true => ADDM7_A :: BIT7 } } # [ doc = "Checks if the value of the field is `BIT4`" ]
# [ inline ( always ) ]
pub fn is_bit4 ( & self ) -> bool { * self == ADDM7_A :: BIT4 } # [ doc = "Checks if the value of the field is `BIT7`" ]
# [ inline ( always ) ]
pub fn is_bit7 ( & self ) -> bool { * self == ADDM7_A :: BIT7 } } # [ doc = "Write proxy for field `ADDM7`" ]
pub struct ADDM7_W < 'a > { w : & 'a mut W , } impl < 'a > ADDM7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADDM7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "4-bit address detection" ]
# [ inline ( always ) ]
pub fn bit4 ( self ) -> & 'a mut W { self . variant ( ADDM7_A :: BIT4 ) } # [ doc = "7-bit address detection" ]
# [ inline ( always ) ]
pub fn bit7 ( self ) -> & 'a mut W { self . variant ( ADDM7_A :: BIT7 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADD`" ]
pub type ADD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADD`" ]
pub struct ADD_W < 'a > { w : & 'a mut W , } impl < 'a > ADD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } impl R { # [ doc = "Bit 23 - Receiver timeout enable" ]
# [ inline ( always ) ]
pub fn rtoen ( & self ) -> RTOEN_R { RTOEN_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bits 21:22 - Auto baud rate mode" ]
# [ inline ( always ) ]
pub fn abrmod ( & self ) -> ABRMOD_R { ABRMOD_R :: new ( ( ( self . bits >> 21 ) & 0x03 ) as u8 ) } # [ doc = "Bit 20 - Auto baud rate enable" ]
# [ inline ( always ) ]
pub fn abren ( & self ) -> ABREN_R { ABREN_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Most significant bit first" ]
# [ inline ( always ) ]
pub fn msbfirst ( & self ) -> MSBFIRST_R { MSBFIRST_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Binary data inversion" ]
# [ inline ( always ) ]
pub fn datainv ( & self ) -> DATAINV_R { DATAINV_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - TX pin active level inversion" ]
# [ inline ( always ) ]
pub fn txinv ( & self ) -> TXINV_R { TXINV_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - RX pin active level inversion" ]
# [ inline ( always ) ]
pub fn rxinv ( & self ) -> RXINV_R { RXINV_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Swap TX/RX pins" ]
# [ inline ( always ) ]
pub fn swap ( & self ) -> SWAP_R { SWAP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - LIN mode enable" ]
# [ inline ( always ) ]
pub fn linen ( & self ) -> LINEN_R { LINEN_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - STOP bits" ]
# [ inline ( always ) ]
pub fn stop ( & self ) -> STOP_R { STOP_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Clock enable" ]
# [ inline ( always ) ]
pub fn clken ( & self ) -> CLKEN_R { CLKEN_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Clock polarity" ]
# [ inline ( always ) ]
pub fn cpol ( & self ) -> CPOL_R { CPOL_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Clock phase" ]
# [ inline ( always ) ]
pub fn cpha ( & self ) -> CPHA_R { CPHA_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Last bit clock pulse" ]
# [ inline ( always ) ]
pub fn lbcl ( & self ) -> LBCL_R { LBCL_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - LIN break detection interrupt enable" ]
# [ inline ( always ) ]
pub fn lbdie ( & self ) -> LBDIE_R { LBDIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - LIN break detection length" ]
# [ inline ( always ) ]
pub fn lbdl ( & self ) -> LBDL_R { LBDL_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - 7-bit Address Detection/4-bit Address Detection" ]
# [ inline ( always ) ]
pub fn addm7 ( & self ) -> ADDM7_R { ADDM7_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bits 24:31 - Address of the USART node" ]
# [ inline ( always ) ]
pub fn add ( & self ) -> ADD_R { ADD_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } } impl W { # [ doc = "Bit 23 - Receiver timeout enable" ]
# [ inline ( always ) ]
pub fn rtoen ( & mut self ) -> RTOEN_W { RTOEN_W { w : self } } # [ doc = "Bits 21:22 - Auto baud rate mode" ]
# [ inline ( always ) ]
pub fn abrmod ( & mut self ) -> ABRMOD_W { ABRMOD_W { w : self } } # [ doc = "Bit 20 - Auto baud rate enable" ]
# [ inline ( always ) ]
pub fn abren ( & mut self ) -> ABREN_W { ABREN_W { w : self } } # [ doc = "Bit 19 - Most significant bit first" ]
# [ inline ( always ) ]
pub fn msbfirst ( & mut self ) -> MSBFIRST_W { MSBFIRST_W { w : self } } # [ doc = "Bit 18 - Binary data inversion" ]
# [ inline ( always ) ]
pub fn datainv ( & mut self ) -> DATAINV_W { DATAINV_W { w : self } } # [ doc = "Bit 17 - TX pin active level inversion" ]
# [ inline ( always ) ]
pub fn txinv ( & mut self ) -> TXINV_W { TXINV_W { w : self } } # [ doc = "Bit 16 - RX pin active level inversion" ]
# [ inline ( always ) ]
pub fn rxinv ( & mut self ) -> RXINV_W { RXINV_W { w : self } } # [ doc = "Bit 15 - Swap TX/RX pins" ]
# [ inline ( always ) ]
pub fn swap ( & mut self ) -> SWAP_W { SWAP_W { w : self } } # [ doc = "Bit 14 - LIN mode enable" ]
# [ inline ( always ) ]
pub fn linen ( & mut self ) -> LINEN_W { LINEN_W { w : self } } # [ doc = "Bits 12:13 - STOP bits" ]
# [ inline ( always ) ]
pub fn stop ( & mut self ) -> STOP_W { STOP_W { w : self } } # [ doc = "Bit 11 - Clock enable" ]
# [ inline ( always ) ]
pub fn clken ( & mut self ) -> CLKEN_W { CLKEN_W { w : self } } # [ doc = "Bit 10 - Clock polarity" ]
# [ inline ( always ) ]
pub fn cpol ( & mut self ) -> CPOL_W { CPOL_W { w : self } } # [ doc = "Bit 9 - Clock phase" ]
# [ inline ( always ) ]
pub fn cpha ( & mut self ) -> CPHA_W { CPHA_W { w : self } } # [ doc = "Bit 8 - Last bit clock pulse" ]
# [ inline ( always ) ]
pub fn lbcl ( & mut self ) -> LBCL_W { LBCL_W { w : self } } # [ doc = "Bit 6 - LIN break detection interrupt enable" ]
# [ inline ( always ) ]
pub fn lbdie ( & mut self ) -> LBDIE_W { LBDIE_W { w : self } } # [ doc = "Bit 5 - LIN break detection length" ]
# [ inline ( always ) ]
pub fn lbdl ( & mut self ) -> LBDL_W { LBDL_W { w : self } } # [ doc = "Bit 4 - 7-bit Address Detection/4-bit Address Detection" ]
# [ inline ( always ) ]
pub fn addm7 ( & mut self ) -> ADDM7_W { ADDM7_W { w : self } } # [ doc = "Bits 24:31 - Address of the USART node" ]
# [ inline ( always ) ]
pub fn add ( & mut self ) -> ADD_W { ADD_W { w : self } } } } # [ doc = "Control register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr3](cr3) module" ]
pub type CR3 = crate :: Reg < u32 , _CR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR3 ; # [ doc = "`read()` method returns [cr3::R](cr3::R) reader structure" ]
impl crate :: Readable for CR3 { } # [ doc = "`write(|w| ..)` method takes [cr3::W](cr3::W) writer structure" ]
impl crate :: Writable for CR3 { } # [ doc = "Control register 3" ]
pub mod cr3 { # [ doc = "Reader of register CR3" ]
pub type R = crate :: R < u32 , super :: CR3 > ; # [ doc = "Writer for register CR3" ]
pub type W = crate :: W < u32 , super :: CR3 > ; # [ doc = "Register CR3 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Wakeup from Stop mode interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUFIE_A { # [ doc = "0: Interrupt is inhibited" ]
DISABLED = 0 , # [ doc = "1: An USART interrupt is generated whenever WUF=1 in the ISR register" ]
ENABLED = 1 } impl From < WUFIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : WUFIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WUFIE`" ]
pub type WUFIE_R = crate :: R < bool , WUFIE_A > ; impl WUFIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WUFIE_A { match self . bits { false => WUFIE_A :: DISABLED , true => WUFIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == WUFIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == WUFIE_A :: ENABLED } } # [ doc = "Write proxy for field `WUFIE`" ]
pub struct WUFIE_W < 'a > { w : & 'a mut W , } impl < 'a > WUFIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUFIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is inhibited" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( WUFIE_A :: DISABLED ) } # [ doc = "An USART interrupt is generated whenever WUF=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( WUFIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Wakeup from Stop mode interrupt flag selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum WUS_A { # [ doc = "0: WUF active on address match" ]
ADDRESS = 0 , # [ doc = "2: WuF active on Start bit detection" ]
START = 2 , # [ doc = "3: WUF active on RXNE" ]
RXNE = 3 } impl From < WUS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : WUS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `WUS`" ]
pub type WUS_R = crate :: R < u8 , WUS_A > ; impl WUS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , WUS_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( WUS_A :: ADDRESS ) , 2 => Val ( WUS_A :: START ) , 3 => Val ( WUS_A :: RXNE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ADDRESS`" ]
# [ inline ( always ) ]
pub fn is_address ( & self ) -> bool { * self == WUS_A :: ADDRESS } # [ doc = "Checks if the value of the field is `START`" ]
# [ inline ( always ) ]
pub fn is_start ( & self ) -> bool { * self == WUS_A :: START } # [ doc = "Checks if the value of the field is `RXNE`" ]
# [ inline ( always ) ]
pub fn is_rxne ( & self ) -> bool { * self == WUS_A :: RXNE } } # [ doc = "Write proxy for field `WUS`" ]
pub struct WUS_W < 'a > { w : & 'a mut W , } impl < 'a > WUS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUS_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "WUF active on address match" ]
# [ inline ( always ) ]
pub fn address ( self ) -> & 'a mut W { self . variant ( WUS_A :: ADDRESS ) } # [ doc = "WuF active on Start bit detection" ]
# [ inline ( always ) ]
pub fn start ( self ) -> & 'a mut W { self . variant ( WUS_A :: START ) } # [ doc = "WUF active on RXNE" ]
# [ inline ( always ) ]
pub fn rxne ( self ) -> & 'a mut W { self . variant ( WUS_A :: RXNE ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Reader of field `SCARCNT`" ]
pub type SCARCNT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SCARCNT`" ]
pub struct SCARCNT_W < 'a > { w : & 'a mut W , } impl < 'a > SCARCNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 17 ) ) | ( ( ( value as u32 ) & 0x07 ) << 17 ) ; self . w } } # [ doc = "Driver enable polarity selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DEP_A { # [ doc = "0: DE signal is active high" ]
HIGH = 0 , # [ doc = "1: DE signal is active low" ]
LOW = 1 } impl From < DEP_A > for bool { # [ inline ( always ) ]
fn from ( variant : DEP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DEP`" ]
pub type DEP_R = crate :: R < bool , DEP_A > ; impl DEP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DEP_A { match self . bits { false => DEP_A :: HIGH , true => DEP_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == DEP_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == DEP_A :: LOW } } # [ doc = "Write proxy for field `DEP`" ]
pub struct DEP_W < 'a > { w : & 'a mut W , } impl < 'a > DEP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DEP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DE signal is active high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( DEP_A :: HIGH ) } # [ doc = "DE signal is active low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( DEP_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Driver enable mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DEM_A { # [ doc = "0: DE function is disabled" ]
DISABLED = 0 , # [ doc = "1: The DE signal is output on the RTS pin" ]
ENABLED = 1 } impl From < DEM_A > for bool { # [ inline ( always ) ]
fn from ( variant : DEM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DEM`" ]
pub type DEM_R = crate :: R < bool , DEM_A > ; impl DEM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DEM_A { match self . bits { false => DEM_A :: DISABLED , true => DEM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == DEM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == DEM_A :: ENABLED } } # [ doc = "Write proxy for field `DEM`" ]
pub struct DEM_W < 'a > { w : & 'a mut W , } impl < 'a > DEM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DEM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DE function is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DEM_A :: DISABLED ) } # [ doc = "The DE signal is output on the RTS pin" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DEM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "DMA Disable on Reception Error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DDRE_A { # [ doc = "0: DMA is not disabled in case of reception error" ]
NOTDISABLED = 0 , # [ doc = "1: DMA is disabled following a reception error" ]
DISABLED = 1 } impl From < DDRE_A > for bool { # [ inline ( always ) ]
fn from ( variant : DDRE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DDRE`" ]
pub type DDRE_R = crate :: R < bool , DDRE_A > ; impl DDRE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DDRE_A { match self . bits { false => DDRE_A :: NOTDISABLED , true => DDRE_A :: DISABLED } } # [ doc = "Checks if the value of the field is `NOTDISABLED`" ]
# [ inline ( always ) ]
pub fn is_not_disabled ( & self ) -> bool { * self == DDRE_A :: NOTDISABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == DDRE_A :: DISABLED } } # [ doc = "Write proxy for field `DDRE`" ]
pub struct DDRE_W < 'a > { w : & 'a mut W , } impl < 'a > DDRE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DDRE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA is not disabled in case of reception error" ]
# [ inline ( always ) ]
pub fn not_disabled ( self ) -> & 'a mut W { self . variant ( DDRE_A :: NOTDISABLED ) } # [ doc = "DMA is disabled following a reception error" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DDRE_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Overrun Disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVRDIS_A { # [ doc = "0: Overrun Error Flag, ORE, is set when received data is not read before receiving new data" ]
ENABLED = 0 , # [ doc = "1: Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register" ]
DISABLED = 1 } impl From < OVRDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVRDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVRDIS`" ]
pub type OVRDIS_R = crate :: R < bool , OVRDIS_A > ; impl OVRDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVRDIS_A { match self . bits { false => OVRDIS_A :: ENABLED , true => OVRDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OVRDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OVRDIS_A :: DISABLED } } # [ doc = "Write proxy for field `OVRDIS`" ]
pub struct OVRDIS_W < 'a > { w : & 'a mut W , } impl < 'a > OVRDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OVRDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Overrun Error Flag, ORE, is set when received data is not read before receiving new data" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OVRDIS_A :: ENABLED ) } # [ doc = "Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OVRDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "One sample bit method enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ONEBIT_A { # [ doc = "0: Three sample bit method" ]
SAMPLE3 = 0 , # [ doc = "1: One sample bit method" ]
SAMPLE1 = 1 } impl From < ONEBIT_A > for bool { # [ inline ( always ) ]
fn from ( variant : ONEBIT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ONEBIT`" ]
pub type ONEBIT_R = crate :: R < bool , ONEBIT_A > ; impl ONEBIT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ONEBIT_A { match self . bits { false => ONEBIT_A :: SAMPLE3 , true => ONEBIT_A :: SAMPLE1 } } # [ doc = "Checks if the value of the field is `SAMPLE3`" ]
# [ inline ( always ) ]
pub fn is_sample3 ( & self ) -> bool { * self == ONEBIT_A :: SAMPLE3 } # [ doc = "Checks if the value of the field is `SAMPLE1`" ]
# [ inline ( always ) ]
pub fn is_sample1 ( & self ) -> bool { * self == ONEBIT_A :: SAMPLE1 } } # [ doc = "Write proxy for field `ONEBIT`" ]
pub struct ONEBIT_W < 'a > { w : & 'a mut W , } impl < 'a > ONEBIT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ONEBIT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Three sample bit method" ]
# [ inline ( always ) ]
pub fn sample3 ( self ) -> & 'a mut W { self . variant ( ONEBIT_A :: SAMPLE3 ) } # [ doc = "One sample bit method" ]
# [ inline ( always ) ]
pub fn sample1 ( self ) -> & 'a mut W { self . variant ( ONEBIT_A :: SAMPLE1 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "CTS interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CTSIE_A { # [ doc = "0: Interrupt is inhibited" ]
DISABLED = 0 , # [ doc = "1: An interrupt is generated whenever CTSIF=1 in the ISR register" ]
ENABLED = 1 } impl From < CTSIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CTSIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CTSIE`" ]
pub type CTSIE_R = crate :: R < bool , CTSIE_A > ; impl CTSIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CTSIE_A { match self . bits { false => CTSIE_A :: DISABLED , true => CTSIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CTSIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CTSIE_A :: ENABLED } } # [ doc = "Write proxy for field `CTSIE`" ]
pub struct CTSIE_W < 'a > { w : & 'a mut W , } impl < 'a > CTSIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTSIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is inhibited" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CTSIE_A :: DISABLED ) } # [ doc = "An interrupt is generated whenever CTSIF=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CTSIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "CTS enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CTSE_A { # [ doc = "0: CTS hardware flow control disabled" ]
DISABLED = 0 , # [ doc = "1: CTS mode enabled, data is only transmitted when the CTS input is asserted" ]
ENABLED = 1 } impl From < CTSE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CTSE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CTSE`" ]
pub type CTSE_R = crate :: R < bool , CTSE_A > ; impl CTSE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CTSE_A { match self . bits { false => CTSE_A :: DISABLED , true => CTSE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CTSE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CTSE_A :: ENABLED } } # [ doc = "Write proxy for field `CTSE`" ]
pub struct CTSE_W < 'a > { w : & 'a mut W , } impl < 'a > CTSE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTSE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CTS hardware flow control disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CTSE_A :: DISABLED ) } # [ doc = "CTS mode enabled, data is only transmitted when the CTS input is asserted" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CTSE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "RTS enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RTSE_A { # [ doc = "0: RTS hardware flow control disabled" ]
DISABLED = 0 , # [ doc = "1: RTS output enabled, data is only requested when there is space in the receive buffer" ]
ENABLED = 1 } impl From < RTSE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RTSE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RTSE`" ]
pub type RTSE_R = crate :: R < bool , RTSE_A > ; impl RTSE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RTSE_A { match self . bits { false => RTSE_A :: DISABLED , true => RTSE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RTSE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RTSE_A :: ENABLED } } # [ doc = "Write proxy for field `RTSE`" ]
pub struct RTSE_W < 'a > { w : & 'a mut W , } impl < 'a > RTSE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RTSE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RTS hardware flow control disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RTSE_A :: DISABLED ) } # [ doc = "RTS output enabled, data is only requested when there is space in the receive buffer" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RTSE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "DMA enable transmitter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DMAT_A { # [ doc = "0: DMA mode is disabled for transmission" ]
DISABLED = 0 , # [ doc = "1: DMA mode is enabled for transmission" ]
ENABLED = 1 } impl From < DMAT_A > for bool { # [ inline ( always ) ]
fn from ( variant : DMAT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DMAT`" ]
pub type DMAT_R = crate :: R < bool , DMAT_A > ; impl DMAT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DMAT_A { match self . bits { false => DMAT_A :: DISABLED , true => DMAT_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == DMAT_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == DMAT_A :: ENABLED } } # [ doc = "Write proxy for field `DMAT`" ]
pub struct DMAT_W < 'a > { w : & 'a mut W , } impl < 'a > DMAT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DMAT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA mode is disabled for transmission" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMAT_A :: DISABLED ) } # [ doc = "DMA mode is enabled for transmission" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMAT_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "DMA enable receiver\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DMAR_A { # [ doc = "0: DMA mode is disabled for reception" ]
DISABLED = 0 , # [ doc = "1: DMA mode is enabled for reception" ]
ENABLED = 1 } impl From < DMAR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DMAR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DMAR`" ]
pub type DMAR_R = crate :: R < bool , DMAR_A > ; impl DMAR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DMAR_A { match self . bits { false => DMAR_A :: DISABLED , true => DMAR_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == DMAR_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == DMAR_A :: ENABLED } } # [ doc = "Write proxy for field `DMAR`" ]
pub struct DMAR_W < 'a > { w : & 'a mut W , } impl < 'a > DMAR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DMAR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA mode is disabled for reception" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMAR_A :: DISABLED ) } # [ doc = "DMA mode is enabled for reception" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMAR_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Smartcard mode enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SCEN_A { # [ doc = "0: Smartcard Mode disabled" ]
DISABLED = 0 , # [ doc = "1: Smartcard Mode enabled" ]
ENABLED = 1 } impl From < SCEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : SCEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SCEN`" ]
pub type SCEN_R = crate :: R < bool , SCEN_A > ; impl SCEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SCEN_A { match self . bits { false => SCEN_A :: DISABLED , true => SCEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SCEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SCEN_A :: ENABLED } } # [ doc = "Write proxy for field `SCEN`" ]
pub struct SCEN_W < 'a > { w : & 'a mut W , } impl < 'a > SCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Smartcard Mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SCEN_A :: DISABLED ) } # [ doc = "Smartcard Mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SCEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Smartcard NACK enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NACK_A { # [ doc = "0: NACK transmission in case of parity error is disabled" ]
DISABLED = 0 , # [ doc = "1: NACK transmission during parity error is enabled" ]
ENABLED = 1 } impl From < NACK_A > for bool { # [ inline ( always ) ]
fn from ( variant : NACK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `NACK`" ]
pub type NACK_R = crate :: R < bool , NACK_A > ; impl NACK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NACK_A { match self . bits { false => NACK_A :: DISABLED , true => NACK_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == NACK_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == NACK_A :: ENABLED } } # [ doc = "Write proxy for field `NACK`" ]
pub struct NACK_W < 'a > { w : & 'a mut W , } impl < 'a > NACK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : NACK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "NACK transmission in case of parity error is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( NACK_A :: DISABLED ) } # [ doc = "NACK transmission during parity error is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( NACK_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Half-duplex selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HDSEL_A { # [ doc = "0: Half duplex mode is not selected" ]
NOTSELECTED = 0 , # [ doc = "1: Half duplex mode is selected" ]
SELECTED = 1 } impl From < HDSEL_A > for bool { # [ inline ( always ) ]
fn from ( variant : HDSEL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HDSEL`" ]
pub type HDSEL_R = crate :: R < bool , HDSEL_A > ; impl HDSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HDSEL_A { match self . bits { false => HDSEL_A :: NOTSELECTED , true => HDSEL_A :: SELECTED } } # [ doc = "Checks if the value of the field is `NOTSELECTED`" ]
# [ inline ( always ) ]
pub fn is_not_selected ( & self ) -> bool { * self == HDSEL_A :: NOTSELECTED } # [ doc = "Checks if the value of the field is `SELECTED`" ]
# [ inline ( always ) ]
pub fn is_selected ( & self ) -> bool { * self == HDSEL_A :: SELECTED } } # [ doc = "Write proxy for field `HDSEL`" ]
pub struct HDSEL_W < 'a > { w : & 'a mut W , } impl < 'a > HDSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HDSEL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Half duplex mode is not selected" ]
# [ inline ( always ) ]
pub fn not_selected ( self ) -> & 'a mut W { self . variant ( HDSEL_A :: NOTSELECTED ) } # [ doc = "Half duplex mode is selected" ]
# [ inline ( always ) ]
pub fn selected ( self ) -> & 'a mut W { self . variant ( HDSEL_A :: SELECTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "IrDA low-power\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IRLP_A { # [ doc = "0: Normal mode" ]
NORMAL = 0 , # [ doc = "1: Low-power mode" ]
LOWPOWER = 1 } impl From < IRLP_A > for bool { # [ inline ( always ) ]
fn from ( variant : IRLP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IRLP`" ]
pub type IRLP_R = crate :: R < bool , IRLP_A > ; impl IRLP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IRLP_A { match self . bits { false => IRLP_A :: NORMAL , true => IRLP_A :: LOWPOWER } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == IRLP_A :: NORMAL } # [ doc = "Checks if the value of the field is `LOWPOWER`" ]
# [ inline ( always ) ]
pub fn is_low_power ( & self ) -> bool { * self == IRLP_A :: LOWPOWER } } # [ doc = "Write proxy for field `IRLP`" ]
pub struct IRLP_W < 'a > { w : & 'a mut W , } impl < 'a > IRLP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IRLP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Normal mode" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( IRLP_A :: NORMAL ) } # [ doc = "Low-power mode" ]
# [ inline ( always ) ]
pub fn low_power ( self ) -> & 'a mut W { self . variant ( IRLP_A :: LOWPOWER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "IrDA mode enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IREN_A { # [ doc = "0: IrDA disabled" ]
DISABLED = 0 , # [ doc = "1: IrDA enabled" ]
ENABLED = 1 } impl From < IREN_A > for bool { # [ inline ( always ) ]
fn from ( variant : IREN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IREN`" ]
pub type IREN_R = crate :: R < bool , IREN_A > ; impl IREN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IREN_A { match self . bits { false => IREN_A :: DISABLED , true => IREN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == IREN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == IREN_A :: ENABLED } } # [ doc = "Write proxy for field `IREN`" ]
pub struct IREN_W < 'a > { w : & 'a mut W , } impl < 'a > IREN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IREN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "IrDA disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( IREN_A :: DISABLED ) } # [ doc = "IrDA enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( IREN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Error interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EIE_A { # [ doc = "0: Interrupt is inhibited" ]
DISABLED = 0 , # [ doc = "1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register" ]
ENABLED = 1 } impl From < EIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EIE`" ]
pub type EIE_R = crate :: R < bool , EIE_A > ; impl EIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EIE_A { match self . bits { false => EIE_A :: DISABLED , true => EIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EIE_A :: ENABLED } } # [ doc = "Write proxy for field `EIE`" ]
pub struct EIE_W < 'a > { w : & 'a mut W , } impl < 'a > EIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt is inhibited" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EIE_A :: DISABLED ) } # [ doc = "An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 22 - Wakeup from Stop mode interrupt enable" ]
# [ inline ( always ) ]
pub fn wufie ( & self ) -> WUFIE_R { WUFIE_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection" ]
# [ inline ( always ) ]
pub fn wus ( & self ) -> WUS_R { WUS_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 17:19 - Smartcard auto-retry count" ]
# [ inline ( always ) ]
pub fn scarcnt ( & self ) -> SCARCNT_R { SCARCNT_R :: new ( ( ( self . bits >> 17 ) & 0x07 ) as u8 ) } # [ doc = "Bit 15 - Driver enable polarity selection" ]
# [ inline ( always ) ]
pub fn dep ( & self ) -> DEP_R { DEP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Driver enable mode" ]
# [ inline ( always ) ]
pub fn dem ( & self ) -> DEM_R { DEM_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - DMA Disable on Reception Error" ]
# [ inline ( always ) ]
pub fn ddre ( & self ) -> DDRE_R { DDRE_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Overrun Disable" ]
# [ inline ( always ) ]
pub fn ovrdis ( & self ) -> OVRDIS_R { OVRDIS_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - One sample bit method enable" ]
# [ inline ( always ) ]
pub fn onebit ( & self ) -> ONEBIT_R { ONEBIT_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - CTS interrupt enable" ]
# [ inline ( always ) ]
pub fn ctsie ( & self ) -> CTSIE_R { CTSIE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - CTS enable" ]
# [ inline ( always ) ]
pub fn ctse ( & self ) -> CTSE_R { CTSE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - RTS enable" ]
# [ inline ( always ) ]
pub fn rtse ( & self ) -> RTSE_R { RTSE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - DMA enable transmitter" ]
# [ inline ( always ) ]
pub fn dmat ( & self ) -> DMAT_R { DMAT_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - DMA enable receiver" ]
# [ inline ( always ) ]
pub fn dmar ( & self ) -> DMAR_R { DMAR_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Smartcard mode enable" ]
# [ inline ( always ) ]
pub fn scen ( & self ) -> SCEN_R { SCEN_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Smartcard NACK enable" ]
# [ inline ( always ) ]
pub fn nack ( & self ) -> NACK_R { NACK_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Half-duplex selection" ]
# [ inline ( always ) ]
pub fn hdsel ( & self ) -> HDSEL_R { HDSEL_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - IrDA low-power" ]
# [ inline ( always ) ]
pub fn irlp ( & self ) -> IRLP_R { IRLP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - IrDA mode enable" ]
# [ inline ( always ) ]
pub fn iren ( & self ) -> IREN_R { IREN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Error interrupt enable" ]
# [ inline ( always ) ]
pub fn eie ( & self ) -> EIE_R { EIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 22 - Wakeup from Stop mode interrupt enable" ]
# [ inline ( always ) ]
pub fn wufie ( & mut self ) -> WUFIE_W { WUFIE_W { w : self } } # [ doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection" ]
# [ inline ( always ) ]
pub fn wus ( & mut self ) -> WUS_W { WUS_W { w : self } } # [ doc = "Bits 17:19 - Smartcard auto-retry count" ]
# [ inline ( always ) ]
pub fn scarcnt ( & mut self ) -> SCARCNT_W { SCARCNT_W { w : self } } # [ doc = "Bit 15 - Driver enable polarity selection" ]
# [ inline ( always ) ]
pub fn dep ( & mut self ) -> DEP_W { DEP_W { w : self } } # [ doc = "Bit 14 - Driver enable mode" ]
# [ inline ( always ) ]
pub fn dem ( & mut self ) -> DEM_W { DEM_W { w : self } } # [ doc = "Bit 13 - DMA Disable on Reception Error" ]
# [ inline ( always ) ]
pub fn ddre ( & mut self ) -> DDRE_W { DDRE_W { w : self } } # [ doc = "Bit 12 - Overrun Disable" ]
# [ inline ( always ) ]
pub fn ovrdis ( & mut self ) -> OVRDIS_W { OVRDIS_W { w : self } } # [ doc = "Bit 11 - One sample bit method enable" ]
# [ inline ( always ) ]
pub fn onebit ( & mut self ) -> ONEBIT_W { ONEBIT_W { w : self } } # [ doc = "Bit 10 - CTS interrupt enable" ]
# [ inline ( always ) ]
pub fn ctsie ( & mut self ) -> CTSIE_W { CTSIE_W { w : self } } # [ doc = "Bit 9 - CTS enable" ]
# [ inline ( always ) ]
pub fn ctse ( & mut self ) -> CTSE_W { CTSE_W { w : self } } # [ doc = "Bit 8 - RTS enable" ]
# [ inline ( always ) ]
pub fn rtse ( & mut self ) -> RTSE_W { RTSE_W { w : self } } # [ doc = "Bit 7 - DMA enable transmitter" ]
# [ inline ( always ) ]
pub fn dmat ( & mut self ) -> DMAT_W { DMAT_W { w : self } } # [ doc = "Bit 6 - DMA enable receiver" ]
# [ inline ( always ) ]
pub fn dmar ( & mut self ) -> DMAR_W { DMAR_W { w : self } } # [ doc = "Bit 5 - Smartcard mode enable" ]
# [ inline ( always ) ]
pub fn scen ( & mut self ) -> SCEN_W { SCEN_W { w : self } } # [ doc = "Bit 4 - Smartcard NACK enable" ]
# [ inline ( always ) ]
pub fn nack ( & mut self ) -> NACK_W { NACK_W { w : self } } # [ doc = "Bit 3 - Half-duplex selection" ]
# [ inline ( always ) ]
pub fn hdsel ( & mut self ) -> HDSEL_W { HDSEL_W { w : self } } # [ doc = "Bit 2 - IrDA low-power" ]
# [ inline ( always ) ]
pub fn irlp ( & mut self ) -> IRLP_W { IRLP_W { w : self } } # [ doc = "Bit 1 - IrDA mode enable" ]
# [ inline ( always ) ]
pub fn iren ( & mut self ) -> IREN_W { IREN_W { w : self } } # [ doc = "Bit 0 - Error interrupt enable" ]
# [ inline ( always ) ]
pub fn eie ( & mut self ) -> EIE_W { EIE_W { w : self } } } } # [ doc = "Baud rate register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [brr](brr) module" ]
pub type BRR = crate :: Reg < u32 , _BRR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BRR ; # [ doc = "`read()` method returns [brr::R](brr::R) reader structure" ]
impl crate :: Readable for BRR { } # [ doc = "`write(|w| ..)` method takes [brr::W](brr::W) writer structure" ]
impl crate :: Writable for BRR { } # [ doc = "Baud rate register" ]
pub mod brr { # [ doc = "Reader of register BRR" ]
pub type R = crate :: R < u32 , super :: BRR > ; # [ doc = "Writer for register BRR" ]
pub type W = crate :: W < u32 , super :: BRR > ; # [ doc = "Register BRR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BRR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `BRR`" ]
pub type BRR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `BRR`" ]
pub struct BRR_W < 'a > { w : & 'a mut W , } impl < 'a > BRR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - mantissa of USARTDIV" ]
# [ inline ( always ) ]
pub fn brr ( & self ) -> BRR_R { BRR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - mantissa of USARTDIV" ]
# [ inline ( always ) ]
pub fn brr ( & mut self ) -> BRR_W { BRR_W { w : self } } } } # [ doc = "Guard time and prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gtpr](gtpr) module" ]
pub type GTPR = crate :: Reg < u32 , _GTPR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _GTPR ; # [ doc = "`read()` method returns [gtpr::R](gtpr::R) reader structure" ]
impl crate :: Readable for GTPR { } # [ doc = "`write(|w| ..)` method takes [gtpr::W](gtpr::W) writer structure" ]
impl crate :: Writable for GTPR { } # [ doc = "Guard time and prescaler register" ]
pub mod gtpr { # [ doc = "Reader of register GTPR" ]
pub type R = crate :: R < u32 , super :: GTPR > ; # [ doc = "Writer for register GTPR" ]
pub type W = crate :: W < u32 , super :: GTPR > ; # [ doc = "Register GTPR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: GTPR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `GT`" ]
pub type GT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `GT`" ]
pub struct GT_W < 'a > { w : & 'a mut W , } impl < 'a > GT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 8:15 - Guard time value" ]
# [ inline ( always ) ]
pub fn gt ( & self ) -> GT_R { GT_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 8:15 - Guard time value" ]
# [ inline ( always ) ]
pub fn gt ( & mut self ) -> GT_W { GT_W { w : self } } # [ doc = "Bits 0:7 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "Receiver timeout register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rtor](rtor) module" ]
pub type RTOR = crate :: Reg < u32 , _RTOR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RTOR ; # [ doc = "`read()` method returns [rtor::R](rtor::R) reader structure" ]
impl crate :: Readable for RTOR { } # [ doc = "`write(|w| ..)` method takes [rtor::W](rtor::W) writer structure" ]
impl crate :: Writable for RTOR { } # [ doc = "Receiver timeout register" ]
pub mod rtor { # [ doc = "Reader of register RTOR" ]
pub type R = crate :: R < u32 , super :: RTOR > ; # [ doc = "Writer for register RTOR" ]
pub type W = crate :: W < u32 , super :: RTOR > ; # [ doc = "Register RTOR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RTOR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `BLEN`" ]
pub type BLEN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BLEN`" ]
pub struct BLEN_W < 'a > { w : & 'a mut W , } impl < 'a > BLEN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `RTO`" ]
pub type RTO_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `RTO`" ]
pub struct RTO_W < 'a > { w : & 'a mut W , } impl < 'a > RTO_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x00ff_ffff ) | ( ( value as u32 ) & 0x00ff_ffff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - Block Length" ]
# [ inline ( always ) ]
pub fn blen ( & self ) -> BLEN_R { BLEN_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:23 - Receiver timeout value" ]
# [ inline ( always ) ]
pub fn rto ( & self ) -> RTO_R { RTO_R :: new ( ( self . bits & 0x00ff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 24:31 - Block Length" ]
# [ inline ( always ) ]
pub fn blen ( & mut self ) -> BLEN_W { BLEN_W { w : self } } # [ doc = "Bits 0:23 - Receiver timeout value" ]
# [ inline ( always ) ]
pub fn rto ( & mut self ) -> RTO_W { RTO_W { w : self } } } } # [ doc = "Request register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rqr](rqr) module" ]
pub type RQR = crate :: Reg < u32 , _RQR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RQR ; # [ doc = "`read()` method returns [rqr::R](rqr::R) reader structure" ]
impl crate :: Readable for RQR { } # [ doc = "`write(|w| ..)` method takes [rqr::W](rqr::W) writer structure" ]
impl crate :: Writable for RQR { } # [ doc = "Request register" ]
pub mod rqr { # [ doc = "Reader of register RQR" ]
pub type R = crate :: R < u32 , super :: RQR > ; # [ doc = "Writer for register RQR" ]
pub type W = crate :: W < u32 , super :: RQR > ; # [ doc = "Register RQR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RQR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Transmit data flush request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXFRQ_A { # [ doc = "1: Set the TXE flags. This allows to discard the transmit data" ]
DISCARD = 1 } impl From < TXFRQ_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXFRQ_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXFRQ`" ]
pub type TXFRQ_R = crate :: R < bool , TXFRQ_A > ; impl TXFRQ_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , TXFRQ_A > { use crate :: Variant :: * ; match self . bits { true => Val ( TXFRQ_A :: DISCARD ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DISCARD`" ]
# [ inline ( always ) ]
pub fn is_discard ( & self ) -> bool { * self == TXFRQ_A :: DISCARD } } # [ doc = "Write proxy for field `TXFRQ`" ]
pub struct TXFRQ_W < 'a > { w : & 'a mut W , } impl < 'a > TXFRQ_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXFRQ_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set the TXE flags. This allows to discard the transmit data" ]
# [ inline ( always ) ]
pub fn discard ( self ) -> & 'a mut W { self . variant ( TXFRQ_A :: DISCARD ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Receive data flush request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXFRQ_A { # [ doc = "1: clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition" ]
DISCARD = 1 } impl From < RXFRQ_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXFRQ_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXFRQ`" ]
pub type RXFRQ_R = crate :: R < bool , RXFRQ_A > ; impl RXFRQ_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RXFRQ_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RXFRQ_A :: DISCARD ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DISCARD`" ]
# [ inline ( always ) ]
pub fn is_discard ( & self ) -> bool { * self == RXFRQ_A :: DISCARD } } # [ doc = "Write proxy for field `RXFRQ`" ]
pub struct RXFRQ_W < 'a > { w : & 'a mut W , } impl < 'a > RXFRQ_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXFRQ_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition" ]
# [ inline ( always ) ]
pub fn discard ( self ) -> & 'a mut W { self . variant ( RXFRQ_A :: DISCARD ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Mute mode request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MMRQ_A { # [ doc = "1: Puts the USART in mute mode and sets the RWU flag" ]
MUTE = 1 } impl From < MMRQ_A > for bool { # [ inline ( always ) ]
fn from ( variant : MMRQ_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MMRQ`" ]
pub type MMRQ_R = crate :: R < bool , MMRQ_A > ; impl MMRQ_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , MMRQ_A > { use crate :: Variant :: * ; match self . bits { true => Val ( MMRQ_A :: MUTE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MUTE`" ]
# [ inline ( always ) ]
pub fn is_mute ( & self ) -> bool { * self == MMRQ_A :: MUTE } } # [ doc = "Write proxy for field `MMRQ`" ]
pub struct MMRQ_W < 'a > { w : & 'a mut W , } impl < 'a > MMRQ_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MMRQ_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Puts the USART in mute mode and sets the RWU flag" ]
# [ inline ( always ) ]
pub fn mute ( self ) -> & 'a mut W { self . variant ( MMRQ_A :: MUTE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Send break request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SBKRQ_A { # [ doc = "1: sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available" ]
BREAK = 1 } impl From < SBKRQ_A > for bool { # [ inline ( always ) ]
fn from ( variant : SBKRQ_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SBKRQ`" ]
pub type SBKRQ_R = crate :: R < bool , SBKRQ_A > ; impl SBKRQ_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , SBKRQ_A > { use crate :: Variant :: * ; match self . bits { true => Val ( SBKRQ_A :: BREAK ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `BREAK`" ]
# [ inline ( always ) ]
pub fn is_break_ ( & self ) -> bool { * self == SBKRQ_A :: BREAK } } # [ doc = "Write proxy for field `SBKRQ`" ]
pub struct SBKRQ_W < 'a > { w : & 'a mut W , } impl < 'a > SBKRQ_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SBKRQ_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available" ]
# [ inline ( always ) ]
pub fn break_ ( self ) -> & 'a mut W { self . variant ( SBKRQ_A :: BREAK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Auto baud rate request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ABRRQ_A { # [ doc = "1: resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame" ]
REQUEST = 1 } impl From < ABRRQ_A > for bool { # [ inline ( always ) ]
fn from ( variant : ABRRQ_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ABRRQ`" ]
pub type ABRRQ_R = crate :: R < bool , ABRRQ_A > ; impl ABRRQ_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ABRRQ_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ABRRQ_A :: REQUEST ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `REQUEST`" ]
# [ inline ( always ) ]
pub fn is_request ( & self ) -> bool { * self == ABRRQ_A :: REQUEST } } # [ doc = "Write proxy for field `ABRRQ`" ]
pub struct ABRRQ_W < 'a > { w : & 'a mut W , } impl < 'a > ABRRQ_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ABRRQ_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame" ]
# [ inline ( always ) ]
pub fn request ( self ) -> & 'a mut W { self . variant ( ABRRQ_A :: REQUEST ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 4 - Transmit data flush request" ]
# [ inline ( always ) ]
pub fn txfrq ( & self ) -> TXFRQ_R { TXFRQ_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Receive data flush request" ]
# [ inline ( always ) ]
pub fn rxfrq ( & self ) -> RXFRQ_R { RXFRQ_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Mute mode request" ]
# [ inline ( always ) ]
pub fn mmrq ( & self ) -> MMRQ_R { MMRQ_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Send break request" ]
# [ inline ( always ) ]
pub fn sbkrq ( & self ) -> SBKRQ_R { SBKRQ_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Auto baud rate request" ]
# [ inline ( always ) ]
pub fn abrrq ( & self ) -> ABRRQ_R { ABRRQ_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 4 - Transmit data flush request" ]
# [ inline ( always ) ]
pub fn txfrq ( & mut self ) -> TXFRQ_W { TXFRQ_W { w : self } } # [ doc = "Bit 3 - Receive data flush request" ]
# [ inline ( always ) ]
pub fn rxfrq ( & mut self ) -> RXFRQ_W { RXFRQ_W { w : self } } # [ doc = "Bit 2 - Mute mode request" ]
# [ inline ( always ) ]
pub fn mmrq ( & mut self ) -> MMRQ_W { MMRQ_W { w : self } } # [ doc = "Bit 1 - Send break request" ]
# [ inline ( always ) ]
pub fn sbkrq ( & mut self ) -> SBKRQ_W { SBKRQ_W { w : self } } # [ doc = "Bit 0 - Auto baud rate request" ]
# [ inline ( always ) ]
pub fn abrrq ( & mut self ) -> ABRRQ_W { ABRRQ_W { w : self } } } } # [ doc = "Interrupt & status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module" ]
pub type ISR = crate :: Reg < u32 , _ISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISR ; # [ doc = "`read()` method returns [isr::R](isr::R) reader structure" ]
impl crate :: Readable for ISR { } # [ doc = "Interrupt & status register" ]
pub mod isr { # [ doc = "Reader of register ISR" ]
pub type R = crate :: R < u32 , super :: ISR > ; # [ doc = "Reader of field `REACK`" ]
pub type REACK_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `TEACK`" ]
pub type TEACK_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `WUF`" ]
pub type WUF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `RWU`" ]
pub type RWU_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `SBKF`" ]
pub type SBKF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `CMF`" ]
pub type CMF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `BUSY`" ]
pub type BUSY_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `ABRF`" ]
pub type ABRF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `ABRE`" ]
pub type ABRE_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `EOBF`" ]
pub type EOBF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `RTOF`" ]
pub type RTOF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `CTS`" ]
pub type CTS_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `CTSIF`" ]
pub type CTSIF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `LBDF`" ]
pub type LBDF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `TXE`" ]
pub type TXE_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `TC`" ]
pub type TC_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `RXNE`" ]
pub type RXNE_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `IDLE`" ]
pub type IDLE_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `ORE`" ]
pub type ORE_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `NF`" ]
pub type NF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `FE`" ]
pub type FE_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `PE`" ]
pub type PE_R = crate :: R < bool , bool > ; impl R { # [ doc = "Bit 22 - Receive enable acknowledge flag" ]
# [ inline ( always ) ]
pub fn reack ( & self ) -> REACK_R { REACK_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Transmit enable acknowledge flag" ]
# [ inline ( always ) ]
pub fn teack ( & self ) -> TEACK_R { TEACK_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Wakeup from Stop mode flag" ]
# [ inline ( always ) ]
pub fn wuf ( & self ) -> WUF_R { WUF_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Receiver wakeup from Mute mode" ]
# [ inline ( always ) ]
pub fn rwu ( & self ) -> RWU_R { RWU_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Send break flag" ]
# [ inline ( always ) ]
pub fn sbkf ( & self ) -> SBKF_R { SBKF_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - character match flag" ]
# [ inline ( always ) ]
pub fn cmf ( & self ) -> CMF_R { CMF_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Busy flag" ]
# [ inline ( always ) ]
pub fn busy ( & self ) -> BUSY_R { BUSY_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Auto baud rate flag" ]
# [ inline ( always ) ]
pub fn abrf ( & self ) -> ABRF_R { ABRF_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Auto baud rate error" ]
# [ inline ( always ) ]
pub fn abre ( & self ) -> ABRE_R { ABRE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - End of block flag" ]
# [ inline ( always ) ]
pub fn eobf ( & self ) -> EOBF_R { EOBF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Receiver timeout" ]
# [ inline ( always ) ]
pub fn rtof ( & self ) -> RTOF_R { RTOF_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - CTS flag" ]
# [ inline ( always ) ]
pub fn cts ( & self ) -> CTS_R { CTS_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - CTS interrupt flag" ]
# [ inline ( always ) ]
pub fn ctsif ( & self ) -> CTSIF_R { CTSIF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - LIN break detection flag" ]
# [ inline ( always ) ]
pub fn lbdf ( & self ) -> LBDF_R { LBDF_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Transmit data register empty" ]
# [ inline ( always ) ]
pub fn txe ( & self ) -> TXE_R { TXE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Transmission complete" ]
# [ inline ( always ) ]
pub fn tc ( & self ) -> TC_R { TC_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Read data register not empty" ]
# [ inline ( always ) ]
pub fn rxne ( & self ) -> RXNE_R { RXNE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Idle line detected" ]
# [ inline ( always ) ]
pub fn idle ( & self ) -> IDLE_R { IDLE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Overrun error" ]
# [ inline ( always ) ]
pub fn ore ( & self ) -> ORE_R { ORE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Noise detected flag" ]
# [ inline ( always ) ]
pub fn nf ( & self ) -> NF_R { NF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Framing error" ]
# [ inline ( always ) ]
pub fn fe ( & self ) -> FE_R { FE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Parity error" ]
# [ inline ( always ) ]
pub fn pe ( & self ) -> PE_R { PE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } } # [ doc = "Interrupt flag clear register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](icr) module" ]
pub type ICR = crate :: Reg < u32 , _ICR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ICR ; # [ doc = "`read()` method returns [icr::R](icr::R) reader structure" ]
impl crate :: Readable for ICR { } # [ doc = "`write(|w| ..)` method takes [icr::W](icr::W) writer structure" ]
impl crate :: Writable for ICR { } # [ doc = "Interrupt flag clear register" ]
pub mod icr { # [ doc = "Reader of register ICR" ]
pub type R = crate :: R < u32 , super :: ICR > ; # [ doc = "Writer for register ICR" ]
pub type W = crate :: W < u32 , super :: ICR > ; # [ doc = "Register ICR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ICR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Wakeup from Stop mode clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUCF_A { # [ doc = "1: Clears the WUF flag in the ISR register" ]
CLEAR = 1 } impl From < WUCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : WUCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WUCF`" ]
pub type WUCF_R = crate :: R < bool , WUCF_A > ; impl WUCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , WUCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( WUCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == WUCF_A :: CLEAR } } # [ doc = "Write proxy for field `WUCF`" ]
pub struct WUCF_W < 'a > { w : & 'a mut W , } impl < 'a > WUCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the WUF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( WUCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Character match clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CMCF_A { # [ doc = "1: Clears the CMF flag in the ISR register" ]
CLEAR = 1 } impl From < CMCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CMCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CMCF`" ]
pub type CMCF_R = crate :: R < bool , CMCF_A > ; impl CMCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CMCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CMCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == CMCF_A :: CLEAR } } # [ doc = "Write proxy for field `CMCF`" ]
pub struct CMCF_W < 'a > { w : & 'a mut W , } impl < 'a > CMCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CMCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the CMF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CMCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "End of timeout clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOBCF_A { # [ doc = "1: Clears the EOBF flag in the ISR register" ]
CLEAR = 1 } impl From < EOBCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOBCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOBCF`" ]
pub type EOBCF_R = crate :: R < bool , EOBCF_A > ; impl EOBCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , EOBCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( EOBCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == EOBCF_A :: CLEAR } } # [ doc = "Write proxy for field `EOBCF`" ]
pub struct EOBCF_W < 'a > { w : & 'a mut W , } impl < 'a > EOBCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOBCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the EOBF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( EOBCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Receiver timeout clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RTOCF_A { # [ doc = "1: Clears the RTOF flag in the ISR register" ]
CLEAR = 1 } impl From < RTOCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : RTOCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RTOCF`" ]
pub type RTOCF_R = crate :: R < bool , RTOCF_A > ; impl RTOCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RTOCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RTOCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == RTOCF_A :: CLEAR } } # [ doc = "Write proxy for field `RTOCF`" ]
pub struct RTOCF_W < 'a > { w : & 'a mut W , } impl < 'a > RTOCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RTOCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the RTOF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( RTOCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "CTS clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CTSCF_A { # [ doc = "1: Clears the CTSIF flag in the ISR register" ]
CLEAR = 1 } impl From < CTSCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CTSCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CTSCF`" ]
pub type CTSCF_R = crate :: R < bool , CTSCF_A > ; impl CTSCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CTSCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CTSCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == CTSCF_A :: CLEAR } } # [ doc = "Write proxy for field `CTSCF`" ]
pub struct CTSCF_W < 'a > { w : & 'a mut W , } impl < 'a > CTSCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTSCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the CTSIF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CTSCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "LIN break detection clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LBDCF_A { # [ doc = "1: Clears the LBDF flag in the ISR register" ]
CLEAR = 1 } impl From < LBDCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : LBDCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LBDCF`" ]
pub type LBDCF_R = crate :: R < bool , LBDCF_A > ; impl LBDCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , LBDCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( LBDCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == LBDCF_A :: CLEAR } } # [ doc = "Write proxy for field `LBDCF`" ]
pub struct LBDCF_W < 'a > { w : & 'a mut W , } impl < 'a > LBDCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LBDCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the LBDF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( LBDCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Transmission complete clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TCCF_A { # [ doc = "1: Clears the TC flag in the ISR register" ]
CLEAR = 1 } impl From < TCCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TCCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TCCF`" ]
pub type TCCF_R = crate :: R < bool , TCCF_A > ; impl TCCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , TCCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( TCCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == TCCF_A :: CLEAR } } # [ doc = "Write proxy for field `TCCF`" ]
pub struct TCCF_W < 'a > { w : & 'a mut W , } impl < 'a > TCCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TCCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TC flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TCCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Idle line detected clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IDLECF_A { # [ doc = "1: Clears the IDLE flag in the ISR register" ]
CLEAR = 1 } impl From < IDLECF_A > for bool { # [ inline ( always ) ]
fn from ( variant : IDLECF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IDLECF`" ]
pub type IDLECF_R = crate :: R < bool , IDLECF_A > ; impl IDLECF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , IDLECF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( IDLECF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == IDLECF_A :: CLEAR } } # [ doc = "Write proxy for field `IDLECF`" ]
pub struct IDLECF_W < 'a > { w : & 'a mut W , } impl < 'a > IDLECF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IDLECF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the IDLE flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( IDLECF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Overrun error clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ORECF_A { # [ doc = "1: Clears the ORE flag in the ISR register" ]
CLEAR = 1 } impl From < ORECF_A > for bool { # [ inline ( always ) ]
fn from ( variant : ORECF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ORECF`" ]
pub type ORECF_R = crate :: R < bool , ORECF_A > ; impl ORECF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ORECF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ORECF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == ORECF_A :: CLEAR } } # [ doc = "Write proxy for field `ORECF`" ]
pub struct ORECF_W < 'a > { w : & 'a mut W , } impl < 'a > ORECF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ORECF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the ORE flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( ORECF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Noise detected clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NCF_A { # [ doc = "1: Clears the NF flag in the ISR register" ]
CLEAR = 1 } impl From < NCF_A > for bool { # [ inline ( always ) ]
fn from ( variant : NCF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `NCF`" ]
pub type NCF_R = crate :: R < bool , NCF_A > ; impl NCF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , NCF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( NCF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == NCF_A :: CLEAR } } # [ doc = "Write proxy for field `NCF`" ]
pub struct NCF_W < 'a > { w : & 'a mut W , } impl < 'a > NCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : NCF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the NF flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( NCF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Framing error clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FECF_A { # [ doc = "1: Clears the FE flag in the ISR register" ]
CLEAR = 1 } impl From < FECF_A > for bool { # [ inline ( always ) ]
fn from ( variant : FECF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FECF`" ]
pub type FECF_R = crate :: R < bool , FECF_A > ; impl FECF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , FECF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( FECF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == FECF_A :: CLEAR } } # [ doc = "Write proxy for field `FECF`" ]
pub struct FECF_W < 'a > { w : & 'a mut W , } impl < 'a > FECF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FECF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the FE flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( FECF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Parity error clear flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PECF_A { # [ doc = "1: Clears the PE flag in the ISR register" ]
CLEAR = 1 } impl From < PECF_A > for bool { # [ inline ( always ) ]
fn from ( variant : PECF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PECF`" ]
pub type PECF_R = crate :: R < bool , PECF_A > ; impl PECF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , PECF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( PECF_A :: CLEAR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == PECF_A :: CLEAR } } # [ doc = "Write proxy for field `PECF`" ]
pub struct PECF_W < 'a > { w : & 'a mut W , } impl < 'a > PECF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PECF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the PE flag in the ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PECF_A :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 20 - Wakeup from Stop mode clear flag" ]
# [ inline ( always ) ]
pub fn wucf ( & self ) -> WUCF_R { WUCF_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Character match clear flag" ]
# [ inline ( always ) ]
pub fn cmcf ( & self ) -> CMCF_R { CMCF_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - End of timeout clear flag" ]
# [ inline ( always ) ]
pub fn eobcf ( & self ) -> EOBCF_R { EOBCF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Receiver timeout clear flag" ]
# [ inline ( always ) ]
pub fn rtocf ( & self ) -> RTOCF_R { RTOCF_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - CTS clear flag" ]
# [ inline ( always ) ]
pub fn ctscf ( & self ) -> CTSCF_R { CTSCF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - LIN break detection clear flag" ]
# [ inline ( always ) ]
pub fn lbdcf ( & self ) -> LBDCF_R { LBDCF_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Transmission complete clear flag" ]
# [ inline ( always ) ]
pub fn tccf ( & self ) -> TCCF_R { TCCF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Idle line detected clear flag" ]
# [ inline ( always ) ]
pub fn idlecf ( & self ) -> IDLECF_R { IDLECF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Overrun error clear flag" ]
# [ inline ( always ) ]
pub fn orecf ( & self ) -> ORECF_R { ORECF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Noise detected clear flag" ]
# [ inline ( always ) ]
pub fn ncf ( & self ) -> NCF_R { NCF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Framing error clear flag" ]
# [ inline ( always ) ]
pub fn fecf ( & self ) -> FECF_R { FECF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Parity error clear flag" ]
# [ inline ( always ) ]
pub fn pecf ( & self ) -> PECF_R { PECF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 20 - Wakeup from Stop mode clear flag" ]
# [ inline ( always ) ]
pub fn wucf ( & mut self ) -> WUCF_W { WUCF_W { w : self } } # [ doc = "Bit 17 - Character match clear flag" ]
# [ inline ( always ) ]
pub fn cmcf ( & mut self ) -> CMCF_W { CMCF_W { w : self } } # [ doc = "Bit 12 - End of timeout clear flag" ]
# [ inline ( always ) ]
pub fn eobcf ( & mut self ) -> EOBCF_W { EOBCF_W { w : self } } # [ doc = "Bit 11 - Receiver timeout clear flag" ]
# [ inline ( always ) ]
pub fn rtocf ( & mut self ) -> RTOCF_W { RTOCF_W { w : self } } # [ doc = "Bit 9 - CTS clear flag" ]
# [ inline ( always ) ]
pub fn ctscf ( & mut self ) -> CTSCF_W { CTSCF_W { w : self } } # [ doc = "Bit 8 - LIN break detection clear flag" ]
# [ inline ( always ) ]
pub fn lbdcf ( & mut self ) -> LBDCF_W { LBDCF_W { w : self } } # [ doc = "Bit 6 - Transmission complete clear flag" ]
# [ inline ( always ) ]
pub fn tccf ( & mut self ) -> TCCF_W { TCCF_W { w : self } } # [ doc = "Bit 4 - Idle line detected clear flag" ]
# [ inline ( always ) ]
pub fn idlecf ( & mut self ) -> IDLECF_W { IDLECF_W { w : self } } # [ doc = "Bit 3 - Overrun error clear flag" ]
# [ inline ( always ) ]
pub fn orecf ( & mut self ) -> ORECF_W { ORECF_W { w : self } } # [ doc = "Bit 2 - Noise detected clear flag" ]
# [ inline ( always ) ]
pub fn ncf ( & mut self ) -> NCF_W { NCF_W { w : self } } # [ doc = "Bit 1 - Framing error clear flag" ]
# [ inline ( always ) ]
pub fn fecf ( & mut self ) -> FECF_W { FECF_W { w : self } } # [ doc = "Bit 0 - Parity error clear flag" ]
# [ inline ( always ) ]
pub fn pecf ( & mut self ) -> PECF_W { PECF_W { w : self } } } } # [ doc = "Receive data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdr](rdr) module" ]
pub type RDR = crate :: Reg < u32 , _RDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RDR ; # [ doc = "`read()` method returns [rdr::R](rdr::R) reader structure" ]
impl crate :: Readable for RDR { } # [ doc = "Receive data register" ]
pub mod rdr { # [ doc = "Reader of register RDR" ]
pub type R = crate :: R < u32 , super :: RDR > ; # [ doc = "Reader of field `RDR`" ]
pub type RDR_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:8 - Receive data value" ]
# [ inline ( always ) ]
pub fn rdr ( & self ) -> RDR_R { RDR_R :: new ( ( self . bits & 0x01ff ) as u16 ) } } } # [ doc = "Transmit data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdr](tdr) module" ]
pub type TDR = crate :: Reg < u32 , _TDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TDR ; # [ doc = "`read()` method returns [tdr::R](tdr::R) reader structure" ]
impl crate :: Readable for TDR { } # [ doc = "`write(|w| ..)` method takes [tdr::W](tdr::W) writer structure" ]
impl crate :: Writable for TDR { } # [ doc = "Transmit data register" ]
pub mod tdr { # [ doc = "Reader of register TDR" ]
pub type R = crate :: R < u32 , super :: TDR > ; # [ doc = "Writer for register TDR" ]
pub type W = crate :: W < u32 , super :: TDR > ; # [ doc = "Register TDR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TDR`" ]
pub type TDR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `TDR`" ]
pub struct TDR_W < 'a > { w : & 'a mut W , } impl < 'a > TDR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01ff ) | ( ( value as u32 ) & 0x01ff ) ; self . w } } impl R { # [ doc = "Bits 0:8 - Transmit data value" ]
# [ inline ( always ) ]
pub fn tdr ( & self ) -> TDR_R { TDR_R :: new ( ( self . bits & 0x01ff ) as u16 ) } } impl W { # [ doc = "Bits 0:8 - Transmit data value" ]
# [ inline ( always ) ]
pub fn tdr ( & mut self ) -> TDR_W { TDR_W { w : self } } } } } # [ doc = "Universal synchronous asynchronous receiver transmitter" ]
pub struct USART2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for USART2 { } impl USART2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const usart1 :: RegisterBlock { 0x4000_4400 as * const _ } } impl Deref for USART2 { type Target = usart1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * USART2 :: ptr ( ) } } } # [ doc = "Universal synchronous asynchronous receiver transmitter" ]
pub struct USART3 { _marker : PhantomData < * const ( ) > } unsafe impl Send for USART3 { } impl USART3 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const usart1 :: RegisterBlock { 0x4000_4800 as * const _ } } impl Deref for USART3 { type Target = usart1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * USART3 :: ptr ( ) } } } # [ doc = "Universal synchronous asynchronous receiver transmitter" ]
pub struct UART4 { _marker : PhantomData < * const ( ) > } unsafe impl Send for UART4 { } impl UART4 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const usart1 :: RegisterBlock { 0x4000_4c00 as * const _ } } impl Deref for UART4 { type Target = usart1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * UART4 :: ptr ( ) } } } # [ doc = "Universal synchronous asynchronous receiver transmitter" ]
pub struct UART5 { _marker : PhantomData < * const ( ) > } unsafe impl Send for UART5 { } impl UART5 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const usart1 :: RegisterBlock { 0x4000_5000 as * const _ } } impl Deref for UART5 { type Target = usart1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * UART5 :: ptr ( ) } } } # [ doc = "Serial peripheral interface/Inter-IC sound" ]
pub struct SPI1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for SPI1 { } impl SPI1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const spi1 :: RegisterBlock { 0x4001_3000 as * const _ } } impl Deref for SPI1 { type Target = spi1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SPI1 :: ptr ( ) } } } # [ doc = "Serial peripheral interface/Inter-IC sound" ]
pub mod spi1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - status register" ]
pub sr : SR , # [ doc = "0x0c - data register" ]
pub dr : DR , # [ doc = "0x10 - CRC polynomial register" ]
pub crcpr : CRCPR , # [ doc = "0x14 - RX CRC register" ]
pub rxcrcr : RXCRCR , # [ doc = "0x18 - TX CRC register" ]
pub txcrcr : TXCRCR , # [ doc = "0x1c - I2S configuration register" ]
pub i2scfgr : I2SCFGR , # [ doc = "0x20 - I2S prescaler register" ]
pub i2spr : I2SPR , } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Bidirectional data mode enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BIDIMODE_A { # [ doc = "0: 2-line unidirectional data mode selected" ]
UNIDIRECTIONAL = 0 , # [ doc = "1: 1-line bidirectional data mode selected" ]
BIDIRECTIONAL = 1 } impl From < BIDIMODE_A > for bool { # [ inline ( always ) ]
fn from ( variant : BIDIMODE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BIDIMODE`" ]
pub type BIDIMODE_R = crate :: R < bool , BIDIMODE_A > ; impl BIDIMODE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BIDIMODE_A { match self . bits { false => BIDIMODE_A :: UNIDIRECTIONAL , true => BIDIMODE_A :: BIDIRECTIONAL } } # [ doc = "Checks if the value of the field is `UNIDIRECTIONAL`" ]
# [ inline ( always ) ]
pub fn is_unidirectional ( & self ) -> bool { * self == BIDIMODE_A :: UNIDIRECTIONAL } # [ doc = "Checks if the value of the field is `BIDIRECTIONAL`" ]
# [ inline ( always ) ]
pub fn is_bidirectional ( & self ) -> bool { * self == BIDIMODE_A :: BIDIRECTIONAL } } # [ doc = "Write proxy for field `BIDIMODE`" ]
pub struct BIDIMODE_W < 'a > { w : & 'a mut W , } impl < 'a > BIDIMODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BIDIMODE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "2-line unidirectional data mode selected" ]
# [ inline ( always ) ]
pub fn unidirectional ( self ) -> & 'a mut W { self . variant ( BIDIMODE_A :: UNIDIRECTIONAL ) } # [ doc = "1-line bidirectional data mode selected" ]
# [ inline ( always ) ]
pub fn bidirectional ( self ) -> & 'a mut W { self . variant ( BIDIMODE_A :: BIDIRECTIONAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output enable in bidirectional mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BIDIOE_A { # [ doc = "0: Output disabled (receive-only mode)" ]
OUTPUTDISABLED = 0 , # [ doc = "1: Output enabled (transmit-only mode)" ]
OUTPUTENABLED = 1 } impl From < BIDIOE_A > for bool { # [ inline ( always ) ]
fn from ( variant : BIDIOE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BIDIOE`" ]
pub type BIDIOE_R = crate :: R < bool , BIDIOE_A > ; impl BIDIOE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BIDIOE_A { match self . bits { false => BIDIOE_A :: OUTPUTDISABLED , true => BIDIOE_A :: OUTPUTENABLED } } # [ doc = "Checks if the value of the field is `OUTPUTDISABLED`" ]
# [ inline ( always ) ]
pub fn is_output_disabled ( & self ) -> bool { * self == BIDIOE_A :: OUTPUTDISABLED } # [ doc = "Checks if the value of the field is `OUTPUTENABLED`" ]
# [ inline ( always ) ]
pub fn is_output_enabled ( & self ) -> bool { * self == BIDIOE_A :: OUTPUTENABLED } } # [ doc = "Write proxy for field `BIDIOE`" ]
pub struct BIDIOE_W < 'a > { w : & 'a mut W , } impl < 'a > BIDIOE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BIDIOE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output disabled (receive-only mode)" ]
# [ inline ( always ) ]
pub fn output_disabled ( self ) -> & 'a mut W { self . variant ( BIDIOE_A :: OUTPUTDISABLED ) } # [ doc = "Output enabled (transmit-only mode)" ]
# [ inline ( always ) ]
pub fn output_enabled ( self ) -> & 'a mut W { self . variant ( BIDIOE_A :: OUTPUTENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Hardware CRC calculation enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CRCEN_A { # [ doc = "0: CRC calculation disabled" ]
DISABLED = 0 , # [ doc = "1: CRC calculation enabled" ]
ENABLED = 1 } impl From < CRCEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CRCEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CRCEN`" ]
pub type CRCEN_R = crate :: R < bool , CRCEN_A > ; impl CRCEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CRCEN_A { match self . bits { false => CRCEN_A :: DISABLED , true => CRCEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CRCEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CRCEN_A :: ENABLED } } # [ doc = "Write proxy for field `CRCEN`" ]
pub struct CRCEN_W < 'a > { w : & 'a mut W , } impl < 'a > CRCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CRCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CRC calculation disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CRCEN_A :: DISABLED ) } # [ doc = "CRC calculation enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CRCEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "CRC transfer next\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CRCNEXT_A { # [ doc = "0: Next transmit value is from Tx buffer" ]
TXBUFFER = 0 , # [ doc = "1: Next transmit value is from Tx CRC register" ]
CRC = 1 } impl From < CRCNEXT_A > for bool { # [ inline ( always ) ]
fn from ( variant : CRCNEXT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CRCNEXT`" ]
pub type CRCNEXT_R = crate :: R < bool , CRCNEXT_A > ; impl CRCNEXT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CRCNEXT_A { match self . bits { false => CRCNEXT_A :: TXBUFFER , true => CRCNEXT_A :: CRC } } # [ doc = "Checks if the value of the field is `TXBUFFER`" ]
# [ inline ( always ) ]
pub fn is_tx_buffer ( & self ) -> bool { * self == CRCNEXT_A :: TXBUFFER } # [ doc = "Checks if the value of the field is `CRC`" ]
# [ inline ( always ) ]
pub fn is_crc ( & self ) -> bool { * self == CRCNEXT_A :: CRC } } # [ doc = "Write proxy for field `CRCNEXT`" ]
pub struct CRCNEXT_W < 'a > { w : & 'a mut W , } impl < 'a > CRCNEXT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CRCNEXT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Next transmit value is from Tx buffer" ]
# [ inline ( always ) ]
pub fn tx_buffer ( self ) -> & 'a mut W { self . variant ( CRCNEXT_A :: TXBUFFER ) } # [ doc = "Next transmit value is from Tx CRC register" ]
# [ inline ( always ) ]
pub fn crc ( self ) -> & 'a mut W { self . variant ( CRCNEXT_A :: CRC ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "CRC length\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CRCL_A { # [ doc = "0: 8-bit CRC length" ]
EIGHTBIT = 0 , # [ doc = "1: 16-bit CRC length" ]
SIXTEENBIT = 1 } impl From < CRCL_A > for bool { # [ inline ( always ) ]
fn from ( variant : CRCL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CRCL`" ]
pub type CRCL_R = crate :: R < bool , CRCL_A > ; impl CRCL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CRCL_A { match self . bits { false => CRCL_A :: EIGHTBIT , true => CRCL_A :: SIXTEENBIT } } # [ doc = "Checks if the value of the field is `EIGHTBIT`" ]
# [ inline ( always ) ]
pub fn is_eight_bit ( & self ) -> bool { * self == CRCL_A :: EIGHTBIT } # [ doc = "Checks if the value of the field is `SIXTEENBIT`" ]
# [ inline ( always ) ]
pub fn is_sixteen_bit ( & self ) -> bool { * self == CRCL_A :: SIXTEENBIT } } # [ doc = "Write proxy for field `CRCL`" ]
pub struct CRCL_W < 'a > { w : & 'a mut W , } impl < 'a > CRCL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CRCL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "8-bit CRC length" ]
# [ inline ( always ) ]
pub fn eight_bit ( self ) -> & 'a mut W { self . variant ( CRCL_A :: EIGHTBIT ) } # [ doc = "16-bit CRC length" ]
# [ inline ( always ) ]
pub fn sixteen_bit ( self ) -> & 'a mut W { self . variant ( CRCL_A :: SIXTEENBIT ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Receive only\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXONLY_A { # [ doc = "0: Full duplex (Transmit and receive)" ]
FULLDUPLEX = 0 , # [ doc = "1: Output disabled (Receive-only mode)" ]
OUTPUTDISABLED = 1 } impl From < RXONLY_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXONLY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXONLY`" ]
pub type RXONLY_R = crate :: R < bool , RXONLY_A > ; impl RXONLY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXONLY_A { match self . bits { false => RXONLY_A :: FULLDUPLEX , true => RXONLY_A :: OUTPUTDISABLED } } # [ doc = "Checks if the value of the field is `FULLDUPLEX`" ]
# [ inline ( always ) ]
pub fn is_full_duplex ( & self ) -> bool { * self == RXONLY_A :: FULLDUPLEX } # [ doc = "Checks if the value of the field is `OUTPUTDISABLED`" ]
# [ inline ( always ) ]
pub fn is_output_disabled ( & self ) -> bool { * self == RXONLY_A :: OUTPUTDISABLED } } # [ doc = "Write proxy for field `RXONLY`" ]
pub struct RXONLY_W < 'a > { w : & 'a mut W , } impl < 'a > RXONLY_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXONLY_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Full duplex (Transmit and receive)" ]
# [ inline ( always ) ]
pub fn full_duplex ( self ) -> & 'a mut W { self . variant ( RXONLY_A :: FULLDUPLEX ) } # [ doc = "Output disabled (Receive-only mode)" ]
# [ inline ( always ) ]
pub fn output_disabled ( self ) -> & 'a mut W { self . variant ( RXONLY_A :: OUTPUTDISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Software slave management\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SSM_A { # [ doc = "0: Software slave management disabled" ]
DISABLED = 0 , # [ doc = "1: Software slave management enabled" ]
ENABLED = 1 } impl From < SSM_A > for bool { # [ inline ( always ) ]
fn from ( variant : SSM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SSM`" ]
pub type SSM_R = crate :: R < bool , SSM_A > ; impl SSM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SSM_A { match self . bits { false => SSM_A :: DISABLED , true => SSM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SSM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SSM_A :: ENABLED } } # [ doc = "Write proxy for field `SSM`" ]
pub struct SSM_W < 'a > { w : & 'a mut W , } impl < 'a > SSM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SSM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Software slave management disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SSM_A :: DISABLED ) } # [ doc = "Software slave management enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SSM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Internal slave select\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SSI_A { # [ doc = "0: 0 is forced onto the NSS pin and the I/O value of the NSS pin is ignored" ]
SLAVESELECTED = 0 , # [ doc = "1: 1 is forced onto the NSS pin and the I/O value of the NSS pin is ignored" ]
SLAVENOTSELECTED = 1 } impl From < SSI_A > for bool { # [ inline ( always ) ]
fn from ( variant : SSI_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SSI`" ]
pub type SSI_R = crate :: R < bool , SSI_A > ; impl SSI_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SSI_A { match self . bits { false => SSI_A :: SLAVESELECTED , true => SSI_A :: SLAVENOTSELECTED } } # [ doc = "Checks if the value of the field is `SLAVESELECTED`" ]
# [ inline ( always ) ]
pub fn is_slave_selected ( & self ) -> bool { * self == SSI_A :: SLAVESELECTED } # [ doc = "Checks if the value of the field is `SLAVENOTSELECTED`" ]
# [ inline ( always ) ]
pub fn is_slave_not_selected ( & self ) -> bool { * self == SSI_A :: SLAVENOTSELECTED } } # [ doc = "Write proxy for field `SSI`" ]
pub struct SSI_W < 'a > { w : & 'a mut W , } impl < 'a > SSI_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SSI_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "0 is forced onto the NSS pin and the I/O value of the NSS pin is ignored" ]
# [ inline ( always ) ]
pub fn slave_selected ( self ) -> & 'a mut W { self . variant ( SSI_A :: SLAVESELECTED ) } # [ doc = "1 is forced onto the NSS pin and the I/O value of the NSS pin is ignored" ]
# [ inline ( always ) ]
pub fn slave_not_selected ( self ) -> & 'a mut W { self . variant ( SSI_A :: SLAVENOTSELECTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Frame format\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LSBFIRST_A { # [ doc = "0: Data is transmitted/received with the MSB first" ]
MSBFIRST = 0 , # [ doc = "1: Data is transmitted/received with the LSB first" ]
LSBFIRST = 1 } impl From < LSBFIRST_A > for bool { # [ inline ( always ) ]
fn from ( variant : LSBFIRST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LSBFIRST`" ]
pub type LSBFIRST_R = crate :: R < bool , LSBFIRST_A > ; impl LSBFIRST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LSBFIRST_A { match self . bits { false => LSBFIRST_A :: MSBFIRST , true => LSBFIRST_A :: LSBFIRST } } # [ doc = "Checks if the value of the field is `MSBFIRST`" ]
# [ inline ( always ) ]
pub fn is_msbfirst ( & self ) -> bool { * self == LSBFIRST_A :: MSBFIRST } # [ doc = "Checks if the value of the field is `LSBFIRST`" ]
# [ inline ( always ) ]
pub fn is_lsbfirst ( & self ) -> bool { * self == LSBFIRST_A :: LSBFIRST } } # [ doc = "Write proxy for field `LSBFIRST`" ]
pub struct LSBFIRST_W < 'a > { w : & 'a mut W , } impl < 'a > LSBFIRST_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LSBFIRST_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Data is transmitted/received with the MSB first" ]
# [ inline ( always ) ]
pub fn msbfirst ( self ) -> & 'a mut W { self . variant ( LSBFIRST_A :: MSBFIRST ) } # [ doc = "Data is transmitted/received with the LSB first" ]
# [ inline ( always ) ]
pub fn lsbfirst ( self ) -> & 'a mut W { self . variant ( LSBFIRST_A :: LSBFIRST ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "SPI enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SPE_A { # [ doc = "0: Peripheral disabled" ]
DISABLED = 0 , # [ doc = "1: Peripheral enabled" ]
ENABLED = 1 } impl From < SPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : SPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SPE`" ]
pub type SPE_R = crate :: R < bool , SPE_A > ; impl SPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SPE_A { match self . bits { false => SPE_A :: DISABLED , true => SPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SPE_A :: ENABLED } } # [ doc = "Write proxy for field `SPE`" ]
pub struct SPE_W < 'a > { w : & 'a mut W , } impl < 'a > SPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Peripheral disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SPE_A :: DISABLED ) } # [ doc = "Peripheral enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Baud rate control\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum BR_A { # [ doc = "0: f_PCLK / 2" ]
DIV2 = 0 , # [ doc = "1: f_PCLK / 4" ]
DIV4 = 1 , # [ doc = "2: f_PCLK / 8" ]
DIV8 = 2 , # [ doc = "3: f_PCLK / 16" ]
DIV16 = 3 , # [ doc = "4: f_PCLK / 32" ]
DIV32 = 4 , # [ doc = "5: f_PCLK / 64" ]
DIV64 = 5 , # [ doc = "6: f_PCLK / 128" ]
DIV128 = 6 , # [ doc = "7: f_PCLK / 256" ]
DIV256 = 7 } impl From < BR_A > for u8 { # [ inline ( always ) ]
fn from ( variant : BR_A ) -> Self { variant as _ } } # [ doc = "Reader of field `BR`" ]
pub type BR_R = crate :: R < u8 , BR_A > ; impl BR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BR_A { match self . bits { 0 => BR_A :: DIV2 , 1 => BR_A :: DIV4 , 2 => BR_A :: DIV8 , 3 => BR_A :: DIV16 , 4 => BR_A :: DIV32 , 5 => BR_A :: DIV64 , 6 => BR_A :: DIV128 , 7 => BR_A :: DIV256 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == BR_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == BR_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == BR_A :: DIV8 } # [ doc = "Checks if the value of the field is `DIV16`" ]
# [ inline ( always ) ]
pub fn is_div16 ( & self ) -> bool { * self == BR_A :: DIV16 } # [ doc = "Checks if the value of the field is `DIV32`" ]
# [ inline ( always ) ]
pub fn is_div32 ( & self ) -> bool { * self == BR_A :: DIV32 } # [ doc = "Checks if the value of the field is `DIV64`" ]
# [ inline ( always ) ]
pub fn is_div64 ( & self ) -> bool { * self == BR_A :: DIV64 } # [ doc = "Checks if the value of the field is `DIV128`" ]
# [ inline ( always ) ]
pub fn is_div128 ( & self ) -> bool { * self == BR_A :: DIV128 } # [ doc = "Checks if the value of the field is `DIV256`" ]
# [ inline ( always ) ]
pub fn is_div256 ( & self ) -> bool { * self == BR_A :: DIV256 } } # [ doc = "Write proxy for field `BR`" ]
pub struct BR_W < 'a > { w : & 'a mut W , } impl < 'a > BR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "f_PCLK / 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV2 ) } # [ doc = "f_PCLK / 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV4 ) } # [ doc = "f_PCLK / 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV8 ) } # [ doc = "f_PCLK / 16" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV16 ) } # [ doc = "f_PCLK / 32" ]
# [ inline ( always ) ]
pub fn div32 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV32 ) } # [ doc = "f_PCLK / 64" ]
# [ inline ( always ) ]
pub fn div64 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV64 ) } # [ doc = "f_PCLK / 128" ]
# [ inline ( always ) ]
pub fn div128 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV128 ) } # [ doc = "f_PCLK / 256" ]
# [ inline ( always ) ]
pub fn div256 ( self ) -> & 'a mut W { self . variant ( BR_A :: DIV256 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 3 ) ) | ( ( ( value as u32 ) & 0x07 ) << 3 ) ; self . w } } # [ doc = "Master selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSTR_A { # [ doc = "0: Slave configuration" ]
SLAVE = 0 , # [ doc = "1: Master configuration" ]
MASTER = 1 } impl From < MSTR_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSTR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSTR`" ]
pub type MSTR_R = crate :: R < bool , MSTR_A > ; impl MSTR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSTR_A { match self . bits { false => MSTR_A :: SLAVE , true => MSTR_A :: MASTER } } # [ doc = "Checks if the value of the field is `SLAVE`" ]
# [ inline ( always ) ]
pub fn is_slave ( & self ) -> bool { * self == MSTR_A :: SLAVE } # [ doc = "Checks if the value of the field is `MASTER`" ]
# [ inline ( always ) ]
pub fn is_master ( & self ) -> bool { * self == MSTR_A :: MASTER } } # [ doc = "Write proxy for field `MSTR`" ]
pub struct MSTR_W < 'a > { w : & 'a mut W , } impl < 'a > MSTR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSTR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Slave configuration" ]
# [ inline ( always ) ]
pub fn slave ( self ) -> & 'a mut W { self . variant ( MSTR_A :: SLAVE ) } # [ doc = "Master configuration" ]
# [ inline ( always ) ]
pub fn master ( self ) -> & 'a mut W { self . variant ( MSTR_A :: MASTER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Clock polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CPOL_A { # [ doc = "0: CK to 0 when idle" ]
IDLELOW = 0 , # [ doc = "1: CK to 1 when idle" ]
IDLEHIGH = 1 } impl From < CPOL_A > for bool { # [ inline ( always ) ]
fn from ( variant : CPOL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CPOL`" ]
pub type CPOL_R = crate :: R < bool , CPOL_A > ; impl CPOL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CPOL_A { match self . bits { false => CPOL_A :: IDLELOW , true => CPOL_A :: IDLEHIGH } } # [ doc = "Checks if the value of the field is `IDLELOW`" ]
# [ inline ( always ) ]
pub fn is_idle_low ( & self ) -> bool { * self == CPOL_A :: IDLELOW } # [ doc = "Checks if the value of the field is `IDLEHIGH`" ]
# [ inline ( always ) ]
pub fn is_idle_high ( & self ) -> bool { * self == CPOL_A :: IDLEHIGH } } # [ doc = "Write proxy for field `CPOL`" ]
pub struct CPOL_W < 'a > { w : & 'a mut W , } impl < 'a > CPOL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CPOL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CK to 0 when idle" ]
# [ inline ( always ) ]
pub fn idle_low ( self ) -> & 'a mut W { self . variant ( CPOL_A :: IDLELOW ) } # [ doc = "CK to 1 when idle" ]
# [ inline ( always ) ]
pub fn idle_high ( self ) -> & 'a mut W { self . variant ( CPOL_A :: IDLEHIGH ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Clock phase\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CPHA_A { # [ doc = "0: The first clock transition is the first data capture edge" ]
FIRSTEDGE = 0 , # [ doc = "1: The second clock transition is the first data capture edge" ]
SECONDEDGE = 1 } impl From < CPHA_A > for bool { # [ inline ( always ) ]
fn from ( variant : CPHA_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CPHA`" ]
pub type CPHA_R = crate :: R < bool , CPHA_A > ; impl CPHA_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CPHA_A { match self . bits { false => CPHA_A :: FIRSTEDGE , true => CPHA_A :: SECONDEDGE } } # [ doc = "Checks if the value of the field is `FIRSTEDGE`" ]
# [ inline ( always ) ]
pub fn is_first_edge ( & self ) -> bool { * self == CPHA_A :: FIRSTEDGE } # [ doc = "Checks if the value of the field is `SECONDEDGE`" ]
# [ inline ( always ) ]
pub fn is_second_edge ( & self ) -> bool { * self == CPHA_A :: SECONDEDGE } } # [ doc = "Write proxy for field `CPHA`" ]
pub struct CPHA_W < 'a > { w : & 'a mut W , } impl < 'a > CPHA_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CPHA_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The first clock transition is the first data capture edge" ]
# [ inline ( always ) ]
pub fn first_edge ( self ) -> & 'a mut W { self . variant ( CPHA_A :: FIRSTEDGE ) } # [ doc = "The second clock transition is the first data capture edge" ]
# [ inline ( always ) ]
pub fn second_edge ( self ) -> & 'a mut W { self . variant ( CPHA_A :: SECONDEDGE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 15 - Bidirectional data mode enable" ]
# [ inline ( always ) ]
pub fn bidimode ( & self ) -> BIDIMODE_R { BIDIMODE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Output enable in bidirectional mode" ]
# [ inline ( always ) ]
pub fn bidioe ( & self ) -> BIDIOE_R { BIDIOE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Hardware CRC calculation enable" ]
# [ inline ( always ) ]
pub fn crcen ( & self ) -> CRCEN_R { CRCEN_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - CRC transfer next" ]
# [ inline ( always ) ]
pub fn crcnext ( & self ) -> CRCNEXT_R { CRCNEXT_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - CRC length" ]
# [ inline ( always ) ]
pub fn crcl ( & self ) -> CRCL_R { CRCL_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Receive only" ]
# [ inline ( always ) ]
pub fn rxonly ( & self ) -> RXONLY_R { RXONLY_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Software slave management" ]
# [ inline ( always ) ]
pub fn ssm ( & self ) -> SSM_R { SSM_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Internal slave select" ]
# [ inline ( always ) ]
pub fn ssi ( & self ) -> SSI_R { SSI_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Frame format" ]
# [ inline ( always ) ]
pub fn lsbfirst ( & self ) -> LSBFIRST_R { LSBFIRST_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - SPI enable" ]
# [ inline ( always ) ]
pub fn spe ( & self ) -> SPE_R { SPE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 3:5 - Baud rate control" ]
# [ inline ( always ) ]
pub fn br ( & self ) -> BR_R { BR_R :: new ( ( ( self . bits >> 3 ) & 0x07 ) as u8 ) } # [ doc = "Bit 2 - Master selection" ]
# [ inline ( always ) ]
pub fn mstr ( & self ) -> MSTR_R { MSTR_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Clock polarity" ]
# [ inline ( always ) ]
pub fn cpol ( & self ) -> CPOL_R { CPOL_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Clock phase" ]
# [ inline ( always ) ]
pub fn cpha ( & self ) -> CPHA_R { CPHA_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Bidirectional data mode enable" ]
# [ inline ( always ) ]
pub fn bidimode ( & mut self ) -> BIDIMODE_W { BIDIMODE_W { w : self } } # [ doc = "Bit 14 - Output enable in bidirectional mode" ]
# [ inline ( always ) ]
pub fn bidioe ( & mut self ) -> BIDIOE_W { BIDIOE_W { w : self } } # [ doc = "Bit 13 - Hardware CRC calculation enable" ]
# [ inline ( always ) ]
pub fn crcen ( & mut self ) -> CRCEN_W { CRCEN_W { w : self } } # [ doc = "Bit 12 - CRC transfer next" ]
# [ inline ( always ) ]
pub fn crcnext ( & mut self ) -> CRCNEXT_W { CRCNEXT_W { w : self } } # [ doc = "Bit 11 - CRC length" ]
# [ inline ( always ) ]
pub fn crcl ( & mut self ) -> CRCL_W { CRCL_W { w : self } } # [ doc = "Bit 10 - Receive only" ]
# [ inline ( always ) ]
pub fn rxonly ( & mut self ) -> RXONLY_W { RXONLY_W { w : self } } # [ doc = "Bit 9 - Software slave management" ]
# [ inline ( always ) ]
pub fn ssm ( & mut self ) -> SSM_W { SSM_W { w : self } } # [ doc = "Bit 8 - Internal slave select" ]
# [ inline ( always ) ]
pub fn ssi ( & mut self ) -> SSI_W { SSI_W { w : self } } # [ doc = "Bit 7 - Frame format" ]
# [ inline ( always ) ]
pub fn lsbfirst ( & mut self ) -> LSBFIRST_W { LSBFIRST_W { w : self } } # [ doc = "Bit 6 - SPI enable" ]
# [ inline ( always ) ]
pub fn spe ( & mut self ) -> SPE_W { SPE_W { w : self } } # [ doc = "Bits 3:5 - Baud rate control" ]
# [ inline ( always ) ]
pub fn br ( & mut self ) -> BR_W { BR_W { w : self } } # [ doc = "Bit 2 - Master selection" ]
# [ inline ( always ) ]
pub fn mstr ( & mut self ) -> MSTR_W { MSTR_W { w : self } } # [ doc = "Bit 1 - Clock polarity" ]
# [ inline ( always ) ]
pub fn cpol ( & mut self ) -> CPOL_W { CPOL_W { w : self } } # [ doc = "Bit 0 - Clock phase" ]
# [ inline ( always ) ]
pub fn cpha ( & mut self ) -> CPHA_W { CPHA_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Rx buffer DMA enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXDMAEN_A { # [ doc = "0: Rx buffer DMA disabled" ]
DISABLED = 0 , # [ doc = "1: Rx buffer DMA enabled" ]
ENABLED = 1 } impl From < RXDMAEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXDMAEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXDMAEN`" ]
pub type RXDMAEN_R = crate :: R < bool , RXDMAEN_A > ; impl RXDMAEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXDMAEN_A { match self . bits { false => RXDMAEN_A :: DISABLED , true => RXDMAEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RXDMAEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RXDMAEN_A :: ENABLED } } # [ doc = "Write proxy for field `RXDMAEN`" ]
pub struct RXDMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > RXDMAEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXDMAEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rx buffer DMA disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RXDMAEN_A :: DISABLED ) } # [ doc = "Rx buffer DMA enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RXDMAEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Tx buffer DMA enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXDMAEN_A { # [ doc = "0: Tx buffer DMA disabled" ]
DISABLED = 0 , # [ doc = "1: Tx buffer DMA enabled" ]
ENABLED = 1 } impl From < TXDMAEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXDMAEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXDMAEN`" ]
pub type TXDMAEN_R = crate :: R < bool , TXDMAEN_A > ; impl TXDMAEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXDMAEN_A { match self . bits { false => TXDMAEN_A :: DISABLED , true => TXDMAEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TXDMAEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TXDMAEN_A :: ENABLED } } # [ doc = "Write proxy for field `TXDMAEN`" ]
pub struct TXDMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > TXDMAEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXDMAEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Tx buffer DMA disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TXDMAEN_A :: DISABLED ) } # [ doc = "Tx buffer DMA enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TXDMAEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "SS output enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SSOE_A { # [ doc = "0: SS output is disabled in master mode" ]
DISABLED = 0 , # [ doc = "1: SS output is enabled in master mode" ]
ENABLED = 1 } impl From < SSOE_A > for bool { # [ inline ( always ) ]
fn from ( variant : SSOE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SSOE`" ]
pub type SSOE_R = crate :: R < bool , SSOE_A > ; impl SSOE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SSOE_A { match self . bits { false => SSOE_A :: DISABLED , true => SSOE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SSOE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SSOE_A :: ENABLED } } # [ doc = "Write proxy for field `SSOE`" ]
pub struct SSOE_W < 'a > { w : & 'a mut W , } impl < 'a > SSOE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SSOE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "SS output is disabled in master mode" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SSOE_A :: DISABLED ) } # [ doc = "SS output is enabled in master mode" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SSOE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "NSS pulse management\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NSSP_A { # [ doc = "0: No NSS pulse" ]
NOPULSE = 0 , # [ doc = "1: NSS pulse generated" ]
PULSEGENERATED = 1 } impl From < NSSP_A > for bool { # [ inline ( always ) ]
fn from ( variant : NSSP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `NSSP`" ]
pub type NSSP_R = crate :: R < bool , NSSP_A > ; impl NSSP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NSSP_A { match self . bits { false => NSSP_A :: NOPULSE , true => NSSP_A :: PULSEGENERATED } } # [ doc = "Checks if the value of the field is `NOPULSE`" ]
# [ inline ( always ) ]
pub fn is_no_pulse ( & self ) -> bool { * self == NSSP_A :: NOPULSE } # [ doc = "Checks if the value of the field is `PULSEGENERATED`" ]
# [ inline ( always ) ]
pub fn is_pulse_generated ( & self ) -> bool { * self == NSSP_A :: PULSEGENERATED } } # [ doc = "Write proxy for field `NSSP`" ]
pub struct NSSP_W < 'a > { w : & 'a mut W , } impl < 'a > NSSP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : NSSP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No NSS pulse" ]
# [ inline ( always ) ]
pub fn no_pulse ( self ) -> & 'a mut W { self . variant ( NSSP_A :: NOPULSE ) } # [ doc = "NSS pulse generated" ]
# [ inline ( always ) ]
pub fn pulse_generated ( self ) -> & 'a mut W { self . variant ( NSSP_A :: PULSEGENERATED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Frame format\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FRF_A { # [ doc = "0: SPI Motorola mode" ]
MOTOROLA = 0 , # [ doc = "1: SPI TI mode" ]
TI = 1 } impl From < FRF_A > for bool { # [ inline ( always ) ]
fn from ( variant : FRF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FRF`" ]
pub type FRF_R = crate :: R < bool , FRF_A > ; impl FRF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FRF_A { match self . bits { false => FRF_A :: MOTOROLA , true => FRF_A :: TI } } # [ doc = "Checks if the value of the field is `MOTOROLA`" ]
# [ inline ( always ) ]
pub fn is_motorola ( & self ) -> bool { * self == FRF_A :: MOTOROLA } # [ doc = "Checks if the value of the field is `TI`" ]
# [ inline ( always ) ]
pub fn is_ti ( & self ) -> bool { * self == FRF_A :: TI } } # [ doc = "Write proxy for field `FRF`" ]
pub struct FRF_W < 'a > { w : & 'a mut W , } impl < 'a > FRF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FRF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "SPI Motorola mode" ]
# [ inline ( always ) ]
pub fn motorola ( self ) -> & 'a mut W { self . variant ( FRF_A :: MOTOROLA ) } # [ doc = "SPI TI mode" ]
# [ inline ( always ) ]
pub fn ti ( self ) -> & 'a mut W { self . variant ( FRF_A :: TI ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Error interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ERRIE_A { # [ doc = "0: Error interrupt masked" ]
MASKED = 0 , # [ doc = "1: Error interrupt not masked" ]
NOTMASKED = 1 } impl From < ERRIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ERRIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ERRIE`" ]
pub type ERRIE_R = crate :: R < bool , ERRIE_A > ; impl ERRIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ERRIE_A { match self . bits { false => ERRIE_A :: MASKED , true => ERRIE_A :: NOTMASKED } } # [ doc = "Checks if the value of the field is `MASKED`" ]
# [ inline ( always ) ]
pub fn is_masked ( & self ) -> bool { * self == ERRIE_A :: MASKED } # [ doc = "Checks if the value of the field is `NOTMASKED`" ]
# [ inline ( always ) ]
pub fn is_not_masked ( & self ) -> bool { * self == ERRIE_A :: NOTMASKED } } # [ doc = "Write proxy for field `ERRIE`" ]
pub struct ERRIE_W < 'a > { w : & 'a mut W , } impl < 'a > ERRIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ERRIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Error interrupt masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: MASKED ) } # [ doc = "Error interrupt not masked" ]
# [ inline ( always ) ]
pub fn not_masked ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: NOTMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "RX buffer not empty interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXNEIE_A { # [ doc = "0: RXE interrupt masked" ]
MASKED = 0 , # [ doc = "1: RXE interrupt not masked" ]
NOTMASKED = 1 } impl From < RXNEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXNEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXNEIE`" ]
pub type RXNEIE_R = crate :: R < bool , RXNEIE_A > ; impl RXNEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXNEIE_A { match self . bits { false => RXNEIE_A :: MASKED , true => RXNEIE_A :: NOTMASKED } } # [ doc = "Checks if the value of the field is `MASKED`" ]
# [ inline ( always ) ]
pub fn is_masked ( & self ) -> bool { * self == RXNEIE_A :: MASKED } # [ doc = "Checks if the value of the field is `NOTMASKED`" ]
# [ inline ( always ) ]
pub fn is_not_masked ( & self ) -> bool { * self == RXNEIE_A :: NOTMASKED } } # [ doc = "Write proxy for field `RXNEIE`" ]
pub struct RXNEIE_W < 'a > { w : & 'a mut W , } impl < 'a > RXNEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXNEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RXE interrupt masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( RXNEIE_A :: MASKED ) } # [ doc = "RXE interrupt not masked" ]
# [ inline ( always ) ]
pub fn not_masked ( self ) -> & 'a mut W { self . variant ( RXNEIE_A :: NOTMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Tx buffer empty interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXEIE_A { # [ doc = "0: TXE interrupt masked" ]
MASKED = 0 , # [ doc = "1: TXE interrupt not masked" ]
NOTMASKED = 1 } impl From < TXEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXEIE`" ]
pub type TXEIE_R = crate :: R < bool , TXEIE_A > ; impl TXEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXEIE_A { match self . bits { false => TXEIE_A :: MASKED , true => TXEIE_A :: NOTMASKED } } # [ doc = "Checks if the value of the field is `MASKED`" ]
# [ inline ( always ) ]
pub fn is_masked ( & self ) -> bool { * self == TXEIE_A :: MASKED } # [ doc = "Checks if the value of the field is `NOTMASKED`" ]
# [ inline ( always ) ]
pub fn is_not_masked ( & self ) -> bool { * self == TXEIE_A :: NOTMASKED } } # [ doc = "Write proxy for field `TXEIE`" ]
pub struct TXEIE_W < 'a > { w : & 'a mut W , } impl < 'a > TXEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TXE interrupt masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( TXEIE_A :: MASKED ) } # [ doc = "TXE interrupt not masked" ]
# [ inline ( always ) ]
pub fn not_masked ( self ) -> & 'a mut W { self . variant ( TXEIE_A :: NOTMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Data size\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum DS_A { # [ doc = "3: 4-bit" ]
FOURBIT = 3 , # [ doc = "4: 5-bit" ]
FIVEBIT = 4 , # [ doc = "5: 6-bit" ]
SIXBIT = 5 , # [ doc = "6: 7-bit" ]
SEVENBIT = 6 , # [ doc = "7: 8-bit" ]
EIGHTBIT = 7 , # [ doc = "8: 9-bit" ]
NINEBIT = 8 , # [ doc = "9: 10-bit" ]
TENBIT = 9 , # [ doc = "10: 11-bit" ]
ELEVENBIT = 10 , # [ doc = "11: 12-bit" ]
TWELVEBIT = 11 , # [ doc = "12: 13-bit" ]
THIRTEENBIT = 12 , # [ doc = "13: 14-bit" ]
FOURTEENBIT = 13 , # [ doc = "14: 15-bit" ]
FIFTEENBIT = 14 , # [ doc = "15: 16-bit" ]
SIXTEENBIT = 15 } impl From < DS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : DS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `DS`" ]
pub type DS_R = crate :: R < u8 , DS_A > ; impl DS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , DS_A > { use crate :: Variant :: * ; match self . bits { 3 => Val ( DS_A :: FOURBIT ) , 4 => Val ( DS_A :: FIVEBIT ) , 5 => Val ( DS_A :: SIXBIT ) , 6 => Val ( DS_A :: SEVENBIT ) , 7 => Val ( DS_A :: EIGHTBIT ) , 8 => Val ( DS_A :: NINEBIT ) , 9 => Val ( DS_A :: TENBIT ) , 10 => Val ( DS_A :: ELEVENBIT ) , 11 => Val ( DS_A :: TWELVEBIT ) , 12 => Val ( DS_A :: THIRTEENBIT ) , 13 => Val ( DS_A :: FOURTEENBIT ) , 14 => Val ( DS_A :: FIFTEENBIT ) , 15 => Val ( DS_A :: SIXTEENBIT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `FOURBIT`" ]
# [ inline ( always ) ]
pub fn is_four_bit ( & self ) -> bool { * self == DS_A :: FOURBIT } # [ doc = "Checks if the value of the field is `FIVEBIT`" ]
# [ inline ( always ) ]
pub fn is_five_bit ( & self ) -> bool { * self == DS_A :: FIVEBIT } # [ doc = "Checks if the value of the field is `SIXBIT`" ]
# [ inline ( always ) ]
pub fn is_six_bit ( & self ) -> bool { * self == DS_A :: SIXBIT } # [ doc = "Checks if the value of the field is `SEVENBIT`" ]
# [ inline ( always ) ]
pub fn is_seven_bit ( & self ) -> bool { * self == DS_A :: SEVENBIT } # [ doc = "Checks if the value of the field is `EIGHTBIT`" ]
# [ inline ( always ) ]
pub fn is_eight_bit ( & self ) -> bool { * self == DS_A :: EIGHTBIT } # [ doc = "Checks if the value of the field is `NINEBIT`" ]
# [ inline ( always ) ]
pub fn is_nine_bit ( & self ) -> bool { * self == DS_A :: NINEBIT } # [ doc = "Checks if the value of the field is `TENBIT`" ]
# [ inline ( always ) ]
pub fn is_ten_bit ( & self ) -> bool { * self == DS_A :: TENBIT } # [ doc = "Checks if the value of the field is `ELEVENBIT`" ]
# [ inline ( always ) ]
pub fn is_eleven_bit ( & self ) -> bool { * self == DS_A :: ELEVENBIT } # [ doc = "Checks if the value of the field is `TWELVEBIT`" ]
# [ inline ( always ) ]
pub fn is_twelve_bit ( & self ) -> bool { * self == DS_A :: TWELVEBIT } # [ doc = "Checks if the value of the field is `THIRTEENBIT`" ]
# [ inline ( always ) ]
pub fn is_thirteen_bit ( & self ) -> bool { * self == DS_A :: THIRTEENBIT } # [ doc = "Checks if the value of the field is `FOURTEENBIT`" ]
# [ inline ( always ) ]
pub fn is_fourteen_bit ( & self ) -> bool { * self == DS_A :: FOURTEENBIT } # [ doc = "Checks if the value of the field is `FIFTEENBIT`" ]
# [ inline ( always ) ]
pub fn is_fifteen_bit ( & self ) -> bool { * self == DS_A :: FIFTEENBIT } # [ doc = "Checks if the value of the field is `SIXTEENBIT`" ]
# [ inline ( always ) ]
pub fn is_sixteen_bit ( & self ) -> bool { * self == DS_A :: SIXTEENBIT } } # [ doc = "Write proxy for field `DS`" ]
pub struct DS_W < 'a > { w : & 'a mut W , } impl < 'a > DS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DS_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "4-bit" ]
# [ inline ( always ) ]
pub fn four_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: FOURBIT ) } # [ doc = "5-bit" ]
# [ inline ( always ) ]
pub fn five_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: FIVEBIT ) } # [ doc = "6-bit" ]
# [ inline ( always ) ]
pub fn six_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: SIXBIT ) } # [ doc = "7-bit" ]
# [ inline ( always ) ]
pub fn seven_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: SEVENBIT ) } # [ doc = "8-bit" ]
# [ inline ( always ) ]
pub fn eight_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: EIGHTBIT ) } # [ doc = "9-bit" ]
# [ inline ( always ) ]
pub fn nine_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: NINEBIT ) } # [ doc = "10-bit" ]
# [ inline ( always ) ]
pub fn ten_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: TENBIT ) } # [ doc = "11-bit" ]
# [ inline ( always ) ]
pub fn eleven_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: ELEVENBIT ) } # [ doc = "12-bit" ]
# [ inline ( always ) ]
pub fn twelve_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: TWELVEBIT ) } # [ doc = "13-bit" ]
# [ inline ( always ) ]
pub fn thirteen_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: THIRTEENBIT ) } # [ doc = "14-bit" ]
# [ inline ( always ) ]
pub fn fourteen_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: FOURTEENBIT ) } # [ doc = "15-bit" ]
# [ inline ( always ) ]
pub fn fifteen_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: FIFTEENBIT ) } # [ doc = "16-bit" ]
# [ inline ( always ) ]
pub fn sixteen_bit ( self ) -> & 'a mut W { self . variant ( DS_A :: SIXTEENBIT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "FIFO reception threshold\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FRXTH_A { # [ doc = "0: RXNE event is generated if the FIFO level is greater than or equal to 1/2 (16-bit)" ]
HALF = 0 , # [ doc = "1: RXNE event is generated if the FIFO level is greater than or equal to 1/4 (8-bit)" ]
QUARTER = 1 } impl From < FRXTH_A > for bool { # [ inline ( always ) ]
fn from ( variant : FRXTH_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FRXTH`" ]
pub type FRXTH_R = crate :: R < bool , FRXTH_A > ; impl FRXTH_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FRXTH_A { match self . bits { false => FRXTH_A :: HALF , true => FRXTH_A :: QUARTER } } # [ doc = "Checks if the value of the field is `HALF`" ]
# [ inline ( always ) ]
pub fn is_half ( & self ) -> bool { * self == FRXTH_A :: HALF } # [ doc = "Checks if the value of the field is `QUARTER`" ]
# [ inline ( always ) ]
pub fn is_quarter ( & self ) -> bool { * self == FRXTH_A :: QUARTER } } # [ doc = "Write proxy for field `FRXTH`" ]
pub struct FRXTH_W < 'a > { w : & 'a mut W , } impl < 'a > FRXTH_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FRXTH_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/2 (16-bit)" ]
# [ inline ( always ) ]
pub fn half ( self ) -> & 'a mut W { self . variant ( FRXTH_A :: HALF ) } # [ doc = "RXNE event is generated if the FIFO level is greater than or equal to 1/4 (8-bit)" ]
# [ inline ( always ) ]
pub fn quarter ( self ) -> & 'a mut W { self . variant ( FRXTH_A :: QUARTER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Last DMA transfer for reception\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LDMA_RX_A { # [ doc = "0: Number of data to transfer for receive is even" ]
EVEN = 0 , # [ doc = "1: Number of data to transfer for receive is odd" ]
ODD = 1 } impl From < LDMA_RX_A > for bool { # [ inline ( always ) ]
fn from ( variant : LDMA_RX_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LDMA_RX`" ]
pub type LDMA_RX_R = crate :: R < bool , LDMA_RX_A > ; impl LDMA_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LDMA_RX_A { match self . bits { false => LDMA_RX_A :: EVEN , true => LDMA_RX_A :: ODD } } # [ doc = "Checks if the value of the field is `EVEN`" ]
# [ inline ( always ) ]
pub fn is_even ( & self ) -> bool { * self == LDMA_RX_A :: EVEN } # [ doc = "Checks if the value of the field is `ODD`" ]
# [ inline ( always ) ]
pub fn is_odd ( & self ) -> bool { * self == LDMA_RX_A :: ODD } } # [ doc = "Write proxy for field `LDMA_RX`" ]
pub struct LDMA_RX_W < 'a > { w : & 'a mut W , } impl < 'a > LDMA_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LDMA_RX_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Number of data to transfer for receive is even" ]
# [ inline ( always ) ]
pub fn even ( self ) -> & 'a mut W { self . variant ( LDMA_RX_A :: EVEN ) } # [ doc = "Number of data to transfer for receive is odd" ]
# [ inline ( always ) ]
pub fn odd ( self ) -> & 'a mut W { self . variant ( LDMA_RX_A :: ODD ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Last DMA transfer for transmission\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LDMA_TX_A { # [ doc = "0: Number of data to transfer for transmit is even" ]
EVEN = 0 , # [ doc = "1: Number of data to transfer for transmit is odd" ]
ODD = 1 } impl From < LDMA_TX_A > for bool { # [ inline ( always ) ]
fn from ( variant : LDMA_TX_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LDMA_TX`" ]
pub type LDMA_TX_R = crate :: R < bool , LDMA_TX_A > ; impl LDMA_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LDMA_TX_A { match self . bits { false => LDMA_TX_A :: EVEN , true => LDMA_TX_A :: ODD } } # [ doc = "Checks if the value of the field is `EVEN`" ]
# [ inline ( always ) ]
pub fn is_even ( & self ) -> bool { * self == LDMA_TX_A :: EVEN } # [ doc = "Checks if the value of the field is `ODD`" ]
# [ inline ( always ) ]
pub fn is_odd ( & self ) -> bool { * self == LDMA_TX_A :: ODD } } # [ doc = "Write proxy for field `LDMA_TX`" ]
pub struct LDMA_TX_W < 'a > { w : & 'a mut W , } impl < 'a > LDMA_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LDMA_TX_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Number of data to transfer for transmit is even" ]
# [ inline ( always ) ]
pub fn even ( self ) -> & 'a mut W { self . variant ( LDMA_TX_A :: EVEN ) } # [ doc = "Number of data to transfer for transmit is odd" ]
# [ inline ( always ) ]
pub fn odd ( self ) -> & 'a mut W { self . variant ( LDMA_TX_A :: ODD ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } impl R { # [ doc = "Bit 0 - Rx buffer DMA enable" ]
# [ inline ( always ) ]
pub fn rxdmaen ( & self ) -> RXDMAEN_R { RXDMAEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Tx buffer DMA enable" ]
# [ inline ( always ) ]
pub fn txdmaen ( & self ) -> TXDMAEN_R { TXDMAEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - SS output enable" ]
# [ inline ( always ) ]
pub fn ssoe ( & self ) -> SSOE_R { SSOE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - NSS pulse management" ]
# [ inline ( always ) ]
pub fn nssp ( & self ) -> NSSP_R { NSSP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Frame format" ]
# [ inline ( always ) ]
pub fn frf ( & self ) -> FRF_R { FRF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Error interrupt enable" ]
# [ inline ( always ) ]
pub fn errie ( & self ) -> ERRIE_R { ERRIE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - RX buffer not empty interrupt enable" ]
# [ inline ( always ) ]
pub fn rxneie ( & self ) -> RXNEIE_R { RXNEIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Tx buffer empty interrupt enable" ]
# [ inline ( always ) ]
pub fn txeie ( & self ) -> TXEIE_R { TXEIE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:11 - Data size" ]
# [ inline ( always ) ]
pub fn ds ( & self ) -> DS_R { DS_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 12 - FIFO reception threshold" ]
# [ inline ( always ) ]
pub fn frxth ( & self ) -> FRXTH_R { FRXTH_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Last DMA transfer for reception" ]
# [ inline ( always ) ]
pub fn ldma_rx ( & self ) -> LDMA_RX_R { LDMA_RX_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Last DMA transfer for transmission" ]
# [ inline ( always ) ]
pub fn ldma_tx ( & self ) -> LDMA_TX_R { LDMA_TX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Rx buffer DMA enable" ]
# [ inline ( always ) ]
pub fn rxdmaen ( & mut self ) -> RXDMAEN_W { RXDMAEN_W { w : self } } # [ doc = "Bit 1 - Tx buffer DMA enable" ]
# [ inline ( always ) ]
pub fn txdmaen ( & mut self ) -> TXDMAEN_W { TXDMAEN_W { w : self } } # [ doc = "Bit 2 - SS output enable" ]
# [ inline ( always ) ]
pub fn ssoe ( & mut self ) -> SSOE_W { SSOE_W { w : self } } # [ doc = "Bit 3 - NSS pulse management" ]
# [ inline ( always ) ]
pub fn nssp ( & mut self ) -> NSSP_W { NSSP_W { w : self } } # [ doc = "Bit 4 - Frame format" ]
# [ inline ( always ) ]
pub fn frf ( & mut self ) -> FRF_W { FRF_W { w : self } } # [ doc = "Bit 5 - Error interrupt enable" ]
# [ inline ( always ) ]
pub fn errie ( & mut self ) -> ERRIE_W { ERRIE_W { w : self } } # [ doc = "Bit 6 - RX buffer not empty interrupt enable" ]
# [ inline ( always ) ]
pub fn rxneie ( & mut self ) -> RXNEIE_W { RXNEIE_W { w : self } } # [ doc = "Bit 7 - Tx buffer empty interrupt enable" ]
# [ inline ( always ) ]
pub fn txeie ( & mut self ) -> TXEIE_W { TXEIE_W { w : self } } # [ doc = "Bits 8:11 - Data size" ]
# [ inline ( always ) ]
pub fn ds ( & mut self ) -> DS_W { DS_W { w : self } } # [ doc = "Bit 12 - FIFO reception threshold" ]
# [ inline ( always ) ]
pub fn frxth ( & mut self ) -> FRXTH_W { FRXTH_W { w : self } } # [ doc = "Bit 13 - Last DMA transfer for reception" ]
# [ inline ( always ) ]
pub fn ldma_rx ( & mut self ) -> LDMA_RX_W { LDMA_RX_W { w : self } } # [ doc = "Bit 14 - Last DMA transfer for transmission" ]
# [ inline ( always ) ]
pub fn ldma_tx ( & mut self ) -> LDMA_TX_W { LDMA_TX_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0x02" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x02 } } # [ doc = "Receive buffer not empty\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXNE_A { # [ doc = "0: Rx buffer empty" ]
EMPTY = 0 , # [ doc = "1: Rx buffer not empty" ]
NOTEMPTY = 1 } impl From < RXNE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXNE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXNE`" ]
pub type RXNE_R = crate :: R < bool , RXNE_A > ; impl RXNE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXNE_A { match self . bits { false => RXNE_A :: EMPTY , true => RXNE_A :: NOTEMPTY } } # [ doc = "Checks if the value of the field is `EMPTY`" ]
# [ inline ( always ) ]
pub fn is_empty ( & self ) -> bool { * self == RXNE_A :: EMPTY } # [ doc = "Checks if the value of the field is `NOTEMPTY`" ]
# [ inline ( always ) ]
pub fn is_not_empty ( & self ) -> bool { * self == RXNE_A :: NOTEMPTY } } # [ doc = "Transmit buffer empty\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXE_A { # [ doc = "0: Tx buffer not empty" ]
NOTEMPTY = 0 , # [ doc = "1: Tx buffer empty" ]
EMPTY = 1 } impl From < TXE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXE`" ]
pub type TXE_R = crate :: R < bool , TXE_A > ; impl TXE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXE_A { match self . bits { false => TXE_A :: NOTEMPTY , true => TXE_A :: EMPTY } } # [ doc = "Checks if the value of the field is `NOTEMPTY`" ]
# [ inline ( always ) ]
pub fn is_not_empty ( & self ) -> bool { * self == TXE_A :: NOTEMPTY } # [ doc = "Checks if the value of the field is `EMPTY`" ]
# [ inline ( always ) ]
pub fn is_empty ( & self ) -> bool { * self == TXE_A :: EMPTY } } # [ doc = "Channel side\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CHSIDE_A { # [ doc = "0: Channel left has to be transmitted or has been received" ]
LEFT = 0 , # [ doc = "1: Channel right has to be transmitted or has been received" ]
RIGHT = 1 } impl From < CHSIDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CHSIDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CHSIDE`" ]
pub type CHSIDE_R = crate :: R < bool , CHSIDE_A > ; impl CHSIDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CHSIDE_A { match self . bits { false => CHSIDE_A :: LEFT , true => CHSIDE_A :: RIGHT } } # [ doc = "Checks if the value of the field is `LEFT`" ]
# [ inline ( always ) ]
pub fn is_left ( & self ) -> bool { * self == CHSIDE_A :: LEFT } # [ doc = "Checks if the value of the field is `RIGHT`" ]
# [ inline ( always ) ]
pub fn is_right ( & self ) -> bool { * self == CHSIDE_A :: RIGHT } } # [ doc = "Underrun flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDR_A { # [ doc = "0: No underrun occurred" ]
NOUNDERRUN = 0 , # [ doc = "1: Underrun occurred" ]
UNDERRUN = 1 } impl From < UDR_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDR`" ]
pub type UDR_R = crate :: R < bool , UDR_A > ; impl UDR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDR_A { match self . bits { false => UDR_A :: NOUNDERRUN , true => UDR_A :: UNDERRUN } } # [ doc = "Checks if the value of the field is `NOUNDERRUN`" ]
# [ inline ( always ) ]
pub fn is_no_underrun ( & self ) -> bool { * self == UDR_A :: NOUNDERRUN } # [ doc = "Checks if the value of the field is `UNDERRUN`" ]
# [ inline ( always ) ]
pub fn is_underrun ( & self ) -> bool { * self == UDR_A :: UNDERRUN } } # [ doc = "CRC error flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CRCERR_A { # [ doc = "0: CRC value received matches the SPIx_RXCRCR value" ]
MATCH = 0 , # [ doc = "1: CRC value received does not match the SPIx_RXCRCR value" ]
NOMATCH = 1 } impl From < CRCERR_A > for bool { # [ inline ( always ) ]
fn from ( variant : CRCERR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CRCERR`" ]
pub type CRCERR_R = crate :: R < bool , CRCERR_A > ; impl CRCERR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CRCERR_A { match self . bits { false => CRCERR_A :: MATCH , true => CRCERR_A :: NOMATCH } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == CRCERR_A :: MATCH } # [ doc = "Checks if the value of the field is `NOMATCH`" ]
# [ inline ( always ) ]
pub fn is_no_match ( & self ) -> bool { * self == CRCERR_A :: NOMATCH } } # [ doc = "Write proxy for field `CRCERR`" ]
pub struct CRCERR_W < 'a > { w : & 'a mut W , } impl < 'a > CRCERR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CRCERR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CRC value received matches the SPIx_RXCRCR value" ]
# [ inline ( always ) ]
pub fn match_ ( self ) -> & 'a mut W { self . variant ( CRCERR_A :: MATCH ) } # [ doc = "CRC value received does not match the SPIx_RXCRCR value" ]
# [ inline ( always ) ]
pub fn no_match ( self ) -> & 'a mut W { self . variant ( CRCERR_A :: NOMATCH ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Mode fault\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MODF_A { # [ doc = "0: No mode fault occurred" ]
NOFAULT = 0 , # [ doc = "1: Mode fault occurred" ]
FAULT = 1 } impl From < MODF_A > for bool { # [ inline ( always ) ]
fn from ( variant : MODF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MODF`" ]
pub type MODF_R = crate :: R < bool , MODF_A > ; impl MODF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MODF_A { match self . bits { false => MODF_A :: NOFAULT , true => MODF_A :: FAULT } } # [ doc = "Checks if the value of the field is `NOFAULT`" ]
# [ inline ( always ) ]
pub fn is_no_fault ( & self ) -> bool { * self == MODF_A :: NOFAULT } # [ doc = "Checks if the value of the field is `FAULT`" ]
# [ inline ( always ) ]
pub fn is_fault ( & self ) -> bool { * self == MODF_A :: FAULT } } # [ doc = "Overrun flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVR_A { # [ doc = "0: No overrun occurred" ]
NOOVERRUN = 0 , # [ doc = "1: Overrun occurred" ]
OVERRUN = 1 } impl From < OVR_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVR`" ]
pub type OVR_R = crate :: R < bool , OVR_A > ; impl OVR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVR_A { match self . bits { false => OVR_A :: NOOVERRUN , true => OVR_A :: OVERRUN } } # [ doc = "Checks if the value of the field is `NOOVERRUN`" ]
# [ inline ( always ) ]
pub fn is_no_overrun ( & self ) -> bool { * self == OVR_A :: NOOVERRUN } # [ doc = "Checks if the value of the field is `OVERRUN`" ]
# [ inline ( always ) ]
pub fn is_overrun ( & self ) -> bool { * self == OVR_A :: OVERRUN } } # [ doc = "Busy flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BSY_A { # [ doc = "0: SPI not busy" ]
NOTBUSY = 0 , # [ doc = "1: SPI busy" ]
BUSY = 1 } impl From < BSY_A > for bool { # [ inline ( always ) ]
fn from ( variant : BSY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BSY`" ]
pub type BSY_R = crate :: R < bool , BSY_A > ; impl BSY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BSY_A { match self . bits { false => BSY_A :: NOTBUSY , true => BSY_A :: BUSY } } # [ doc = "Checks if the value of the field is `NOTBUSY`" ]
# [ inline ( always ) ]
pub fn is_not_busy ( & self ) -> bool { * self == BSY_A :: NOTBUSY } # [ doc = "Checks if the value of the field is `BUSY`" ]
# [ inline ( always ) ]
pub fn is_busy ( & self ) -> bool { * self == BSY_A :: BUSY } } # [ doc = "TI frame format error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIFRFE_A { # [ doc = "0: No frame format error" ]
NOERROR = 0 , # [ doc = "1: A frame format error occurred" ]
ERROR = 1 } impl From < TIFRFE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIFRFE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIFRFE`" ]
pub type TIFRFE_R = crate :: R < bool , TIFRFE_A > ; impl TIFRFE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIFRFE_A { match self . bits { false => TIFRFE_A :: NOERROR , true => TIFRFE_A :: ERROR } } # [ doc = "Checks if the value of the field is `NOERROR`" ]
# [ inline ( always ) ]
pub fn is_no_error ( & self ) -> bool { * self == TIFRFE_A :: NOERROR } # [ doc = "Checks if the value of the field is `ERROR`" ]
# [ inline ( always ) ]
pub fn is_error ( & self ) -> bool { * self == TIFRFE_A :: ERROR } } # [ doc = "FIFO reception level\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum FRLVL_A { # [ doc = "0: Rx FIFO Empty" ]
EMPTY = 0 , # [ doc = "1: Rx 1/4 FIFO" ]
QUARTER = 1 , # [ doc = "2: Rx 1/2 FIFO" ]
HALF = 2 , # [ doc = "3: Rx FIFO full" ]
FULL = 3 } impl From < FRLVL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : FRLVL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `FRLVL`" ]
pub type FRLVL_R = crate :: R < u8 , FRLVL_A > ; impl FRLVL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FRLVL_A { match self . bits { 0 => FRLVL_A :: EMPTY , 1 => FRLVL_A :: QUARTER , 2 => FRLVL_A :: HALF , 3 => FRLVL_A :: FULL , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `EMPTY`" ]
# [ inline ( always ) ]
pub fn is_empty ( & self ) -> bool { * self == FRLVL_A :: EMPTY } # [ doc = "Checks if the value of the field is `QUARTER`" ]
# [ inline ( always ) ]
pub fn is_quarter ( & self ) -> bool { * self == FRLVL_A :: QUARTER } # [ doc = "Checks if the value of the field is `HALF`" ]
# [ inline ( always ) ]
pub fn is_half ( & self ) -> bool { * self == FRLVL_A :: HALF } # [ doc = "Checks if the value of the field is `FULL`" ]
# [ inline ( always ) ]
pub fn is_full ( & self ) -> bool { * self == FRLVL_A :: FULL } } # [ doc = "FIFO transmission level\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum FTLVL_A { # [ doc = "0: Tx FIFO Empty" ]
EMPTY = 0 , # [ doc = "1: Tx 1/4 FIFO" ]
QUARTER = 1 , # [ doc = "2: Tx 1/2 FIFO" ]
HALF = 2 , # [ doc = "3: Tx FIFO full" ]
FULL = 3 } impl From < FTLVL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : FTLVL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `FTLVL`" ]
pub type FTLVL_R = crate :: R < u8 , FTLVL_A > ; impl FTLVL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FTLVL_A { match self . bits { 0 => FTLVL_A :: EMPTY , 1 => FTLVL_A :: QUARTER , 2 => FTLVL_A :: HALF , 3 => FTLVL_A :: FULL , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `EMPTY`" ]
# [ inline ( always ) ]
pub fn is_empty ( & self ) -> bool { * self == FTLVL_A :: EMPTY } # [ doc = "Checks if the value of the field is `QUARTER`" ]
# [ inline ( always ) ]
pub fn is_quarter ( & self ) -> bool { * self == FTLVL_A :: QUARTER } # [ doc = "Checks if the value of the field is `HALF`" ]
# [ inline ( always ) ]
pub fn is_half ( & self ) -> bool { * self == FTLVL_A :: HALF } # [ doc = "Checks if the value of the field is `FULL`" ]
# [ inline ( always ) ]
pub fn is_full ( & self ) -> bool { * self == FTLVL_A :: FULL } } impl R { # [ doc = "Bit 0 - Receive buffer not empty" ]
# [ inline ( always ) ]
pub fn rxne ( & self ) -> RXNE_R { RXNE_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Transmit buffer empty" ]
# [ inline ( always ) ]
pub fn txe ( & self ) -> TXE_R { TXE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Channel side" ]
# [ inline ( always ) ]
pub fn chside ( & self ) -> CHSIDE_R { CHSIDE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Underrun flag" ]
# [ inline ( always ) ]
pub fn udr ( & self ) -> UDR_R { UDR_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - CRC error flag" ]
# [ inline ( always ) ]
pub fn crcerr ( & self ) -> CRCERR_R { CRCERR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Mode fault" ]
# [ inline ( always ) ]
pub fn modf ( & self ) -> MODF_R { MODF_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Overrun flag" ]
# [ inline ( always ) ]
pub fn ovr ( & self ) -> OVR_R { OVR_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Busy flag" ]
# [ inline ( always ) ]
pub fn bsy ( & self ) -> BSY_R { BSY_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - TI frame format error" ]
# [ inline ( always ) ]
pub fn tifrfe ( & self ) -> TIFRFE_R { TIFRFE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - FIFO reception level" ]
# [ inline ( always ) ]
pub fn frlvl ( & self ) -> FRLVL_R { FRLVL_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bits 11:12 - FIFO transmission level" ]
# [ inline ( always ) ]
pub fn ftlvl ( & self ) -> FTLVL_R { FTLVL_R :: new ( ( ( self . bits >> 11 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 4 - CRC error flag" ]
# [ inline ( always ) ]
pub fn crcerr ( & mut self ) -> CRCERR_W { CRCERR_W { w : self } } } } # [ doc = "data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr](dr) module" ]
pub type DR = crate :: Reg < u32 , _DR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DR ; # [ doc = "`read()` method returns [dr::R](dr::R) reader structure" ]
impl crate :: Readable for DR { } # [ doc = "`write(|w| ..)` method takes [dr::W](dr::W) writer structure" ]
impl crate :: Writable for DR { } # [ doc = "data register" ]
pub mod dr { # [ doc = "Reader of register DR" ]
pub type R = crate :: R < u32 , super :: DR > ; # [ doc = "Writer for register DR" ]
pub type W = crate :: W < u32 , super :: DR > ; # [ doc = "Register DR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DR`" ]
pub type DR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DR`" ]
pub struct DR_W < 'a > { w : & 'a mut W , } impl < 'a > DR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Data register" ]
# [ inline ( always ) ]
pub fn dr ( & self ) -> DR_R { DR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Data register" ]
# [ inline ( always ) ]
pub fn dr ( & mut self ) -> DR_W { DR_W { w : self } } } } # [ doc = "CRC polynomial register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [crcpr](crcpr) module" ]
pub type CRCPR = crate :: Reg < u32 , _CRCPR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CRCPR ; # [ doc = "`read()` method returns [crcpr::R](crcpr::R) reader structure" ]
impl crate :: Readable for CRCPR { } # [ doc = "`write(|w| ..)` method takes [crcpr::W](crcpr::W) writer structure" ]
impl crate :: Writable for CRCPR { } # [ doc = "CRC polynomial register" ]
pub mod crcpr { # [ doc = "Reader of register CRCPR" ]
pub type R = crate :: R < u32 , super :: CRCPR > ; # [ doc = "Writer for register CRCPR" ]
pub type W = crate :: W < u32 , super :: CRCPR > ; # [ doc = "Register CRCPR `reset()`'s with value 0x07" ]
impl crate :: ResetValue for super :: CRCPR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x07 } } # [ doc = "Reader of field `CRCPOLY`" ]
pub type CRCPOLY_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CRCPOLY`" ]
pub struct CRCPOLY_W < 'a > { w : & 'a mut W , } impl < 'a > CRCPOLY_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - CRC polynomial register" ]
# [ inline ( always ) ]
pub fn crcpoly ( & self ) -> CRCPOLY_R { CRCPOLY_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - CRC polynomial register" ]
# [ inline ( always ) ]
pub fn crcpoly ( & mut self ) -> CRCPOLY_W { CRCPOLY_W { w : self } } } } # [ doc = "RX CRC register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxcrcr](rxcrcr) module" ]
pub type RXCRCR = crate :: Reg < u32 , _RXCRCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RXCRCR ; # [ doc = "`read()` method returns [rxcrcr::R](rxcrcr::R) reader structure" ]
impl crate :: Readable for RXCRCR { } # [ doc = "RX CRC register" ]
pub mod rxcrcr { # [ doc = "Reader of register RXCRCR" ]
pub type R = crate :: R < u32 , super :: RXCRCR > ; # [ doc = "Reader of field `RxCRC`" ]
pub type RXCRC_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - Rx CRC register" ]
# [ inline ( always ) ]
pub fn rx_crc ( & self ) -> RXCRC_R { RXCRC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "TX CRC register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txcrcr](txcrcr) module" ]
pub type TXCRCR = crate :: Reg < u32 , _TXCRCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TXCRCR ; # [ doc = "`read()` method returns [txcrcr::R](txcrcr::R) reader structure" ]
impl crate :: Readable for TXCRCR { } # [ doc = "TX CRC register" ]
pub mod txcrcr { # [ doc = "Reader of register TXCRCR" ]
pub type R = crate :: R < u32 , super :: TXCRCR > ; # [ doc = "Reader of field `TxCRC`" ]
pub type TXCRC_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - Tx CRC register" ]
# [ inline ( always ) ]
pub fn tx_crc ( & self ) -> TXCRC_R { TXCRC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "I2S configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2scfgr](i2scfgr) module" ]
pub type I2SCFGR = crate :: Reg < u32 , _I2SCFGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _I2SCFGR ; # [ doc = "`read()` method returns [i2scfgr::R](i2scfgr::R) reader structure" ]
impl crate :: Readable for I2SCFGR { } # [ doc = "`write(|w| ..)` method takes [i2scfgr::W](i2scfgr::W) writer structure" ]
impl crate :: Writable for I2SCFGR { } # [ doc = "I2S configuration register" ]
pub mod i2scfgr { # [ doc = "Reader of register I2SCFGR" ]
pub type R = crate :: R < u32 , super :: I2SCFGR > ; # [ doc = "Writer for register I2SCFGR" ]
pub type W = crate :: W < u32 , super :: I2SCFGR > ; # [ doc = "Register I2SCFGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: I2SCFGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "I2S mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2SMOD_A { # [ doc = "0: SPI mode is selected" ]
SPIMODE = 0 , # [ doc = "1: I2S mode is selected" ]
I2SMODE = 1 } impl From < I2SMOD_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2SMOD_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2SMOD`" ]
pub type I2SMOD_R = crate :: R < bool , I2SMOD_A > ; impl I2SMOD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2SMOD_A { match self . bits { false => I2SMOD_A :: SPIMODE , true => I2SMOD_A :: I2SMODE } } # [ doc = "Checks if the value of the field is `SPIMODE`" ]
# [ inline ( always ) ]
pub fn is_spimode ( & self ) -> bool { * self == I2SMOD_A :: SPIMODE } # [ doc = "Checks if the value of the field is `I2SMODE`" ]
# [ inline ( always ) ]
pub fn is_i2smode ( & self ) -> bool { * self == I2SMOD_A :: I2SMODE } } # [ doc = "Write proxy for field `I2SMOD`" ]
pub struct I2SMOD_W < 'a > { w : & 'a mut W , } impl < 'a > I2SMOD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2SMOD_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "SPI mode is selected" ]
# [ inline ( always ) ]
pub fn spimode ( self ) -> & 'a mut W { self . variant ( I2SMOD_A :: SPIMODE ) } # [ doc = "I2S mode is selected" ]
# [ inline ( always ) ]
pub fn i2smode ( self ) -> & 'a mut W { self . variant ( I2SMOD_A :: I2SMODE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "I2S Enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2SE_A { # [ doc = "0: I2S peripheral is disabled" ]
DISABLED = 0 , # [ doc = "1: I2S peripheral is enabled" ]
ENABLED = 1 } impl From < I2SE_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2SE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2SE`" ]
pub type I2SE_R = crate :: R < bool , I2SE_A > ; impl I2SE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2SE_A { match self . bits { false => I2SE_A :: DISABLED , true => I2SE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == I2SE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == I2SE_A :: ENABLED } } # [ doc = "Write proxy for field `I2SE`" ]
pub struct I2SE_W < 'a > { w : & 'a mut W , } impl < 'a > I2SE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2SE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "I2S peripheral is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( I2SE_A :: DISABLED ) } # [ doc = "I2S peripheral is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( I2SE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "I2S configuration mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum I2SCFG_A { # [ doc = "0: Slave - transmit" ]
SLAVETX = 0 , # [ doc = "1: Slave - receive" ]
SLAVERX = 1 , # [ doc = "2: Master - transmit" ]
MASTERTX = 2 , # [ doc = "3: Master - receive" ]
MASTERRX = 3 } impl From < I2SCFG_A > for u8 { # [ inline ( always ) ]
fn from ( variant : I2SCFG_A ) -> Self { variant as _ } } # [ doc = "Reader of field `I2SCFG`" ]
pub type I2SCFG_R = crate :: R < u8 , I2SCFG_A > ; impl I2SCFG_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2SCFG_A { match self . bits { 0 => I2SCFG_A :: SLAVETX , 1 => I2SCFG_A :: SLAVERX , 2 => I2SCFG_A :: MASTERTX , 3 => I2SCFG_A :: MASTERRX , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `SLAVETX`" ]
# [ inline ( always ) ]
pub fn is_slave_tx ( & self ) -> bool { * self == I2SCFG_A :: SLAVETX } # [ doc = "Checks if the value of the field is `SLAVERX`" ]
# [ inline ( always ) ]
pub fn is_slave_rx ( & self ) -> bool { * self == I2SCFG_A :: SLAVERX } # [ doc = "Checks if the value of the field is `MASTERTX`" ]
# [ inline ( always ) ]
pub fn is_master_tx ( & self ) -> bool { * self == I2SCFG_A :: MASTERTX } # [ doc = "Checks if the value of the field is `MASTERRX`" ]
# [ inline ( always ) ]
pub fn is_master_rx ( & self ) -> bool { * self == I2SCFG_A :: MASTERRX } } # [ doc = "Write proxy for field `I2SCFG`" ]
pub struct I2SCFG_W < 'a > { w : & 'a mut W , } impl < 'a > I2SCFG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2SCFG_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Slave - transmit" ]
# [ inline ( always ) ]
pub fn slave_tx ( self ) -> & 'a mut W { self . variant ( I2SCFG_A :: SLAVETX ) } # [ doc = "Slave - receive" ]
# [ inline ( always ) ]
pub fn slave_rx ( self ) -> & 'a mut W { self . variant ( I2SCFG_A :: SLAVERX ) } # [ doc = "Master - transmit" ]
# [ inline ( always ) ]
pub fn master_tx ( self ) -> & 'a mut W { self . variant ( I2SCFG_A :: MASTERTX ) } # [ doc = "Master - receive" ]
# [ inline ( always ) ]
pub fn master_rx ( self ) -> & 'a mut W { self . variant ( I2SCFG_A :: MASTERRX ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "PCM frame synchronization\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PCMSYNC_A { # [ doc = "0: Short frame synchronisation" ]
SHORT = 0 , # [ doc = "1: Long frame synchronisation" ]
LONG = 1 } impl From < PCMSYNC_A > for bool { # [ inline ( always ) ]
fn from ( variant : PCMSYNC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PCMSYNC`" ]
pub type PCMSYNC_R = crate :: R < bool , PCMSYNC_A > ; impl PCMSYNC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PCMSYNC_A { match self . bits { false => PCMSYNC_A :: SHORT , true => PCMSYNC_A :: LONG } } # [ doc = "Checks if the value of the field is `SHORT`" ]
# [ inline ( always ) ]
pub fn is_short ( & self ) -> bool { * self == PCMSYNC_A :: SHORT } # [ doc = "Checks if the value of the field is `LONG`" ]
# [ inline ( always ) ]
pub fn is_long ( & self ) -> bool { * self == PCMSYNC_A :: LONG } } # [ doc = "Write proxy for field `PCMSYNC`" ]
pub struct PCMSYNC_W < 'a > { w : & 'a mut W , } impl < 'a > PCMSYNC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PCMSYNC_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Short frame synchronisation" ]
# [ inline ( always ) ]
pub fn short ( self ) -> & 'a mut W { self . variant ( PCMSYNC_A :: SHORT ) } # [ doc = "Long frame synchronisation" ]
# [ inline ( always ) ]
pub fn long ( self ) -> & 'a mut W { self . variant ( PCMSYNC_A :: LONG ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "I2S standard selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum I2SSTD_A { # [ doc = "0: I2S Philips standard" ]
PHILIPS = 0 , # [ doc = "1: MSB justified standard" ]
MSB = 1 , # [ doc = "2: LSB justified standard" ]
LSB = 2 , # [ doc = "3: PCM standard" ]
PCM = 3 } impl From < I2SSTD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : I2SSTD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `I2SSTD`" ]
pub type I2SSTD_R = crate :: R < u8 , I2SSTD_A > ; impl I2SSTD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2SSTD_A { match self . bits { 0 => I2SSTD_A :: PHILIPS , 1 => I2SSTD_A :: MSB , 2 => I2SSTD_A :: LSB , 3 => I2SSTD_A :: PCM , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `PHILIPS`" ]
# [ inline ( always ) ]
pub fn is_philips ( & self ) -> bool { * self == I2SSTD_A :: PHILIPS } # [ doc = "Checks if the value of the field is `MSB`" ]
# [ inline ( always ) ]
pub fn is_msb ( & self ) -> bool { * self == I2SSTD_A :: MSB } # [ doc = "Checks if the value of the field is `LSB`" ]
# [ inline ( always ) ]
pub fn is_lsb ( & self ) -> bool { * self == I2SSTD_A :: LSB } # [ doc = "Checks if the value of the field is `PCM`" ]
# [ inline ( always ) ]
pub fn is_pcm ( & self ) -> bool { * self == I2SSTD_A :: PCM } } # [ doc = "Write proxy for field `I2SSTD`" ]
pub struct I2SSTD_W < 'a > { w : & 'a mut W , } impl < 'a > I2SSTD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2SSTD_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "I2S Philips standard" ]
# [ inline ( always ) ]
pub fn philips ( self ) -> & 'a mut W { self . variant ( I2SSTD_A :: PHILIPS ) } # [ doc = "MSB justified standard" ]
# [ inline ( always ) ]
pub fn msb ( self ) -> & 'a mut W { self . variant ( I2SSTD_A :: MSB ) } # [ doc = "LSB justified standard" ]
# [ inline ( always ) ]
pub fn lsb ( self ) -> & 'a mut W { self . variant ( I2SSTD_A :: LSB ) } # [ doc = "PCM standard" ]
# [ inline ( always ) ]
pub fn pcm ( self ) -> & 'a mut W { self . variant ( I2SSTD_A :: PCM ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Steady state clock polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CKPOL_A { # [ doc = "0: I2S clock inactive state is low level" ]
IDLELOW = 0 , # [ doc = "1: I2S clock inactive state is high level" ]
IDLEHIGH = 1 } impl From < CKPOL_A > for bool { # [ inline ( always ) ]
fn from ( variant : CKPOL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CKPOL`" ]
pub type CKPOL_R = crate :: R < bool , CKPOL_A > ; impl CKPOL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CKPOL_A { match self . bits { false => CKPOL_A :: IDLELOW , true => CKPOL_A :: IDLEHIGH } } # [ doc = "Checks if the value of the field is `IDLELOW`" ]
# [ inline ( always ) ]
pub fn is_idle_low ( & self ) -> bool { * self == CKPOL_A :: IDLELOW } # [ doc = "Checks if the value of the field is `IDLEHIGH`" ]
# [ inline ( always ) ]
pub fn is_idle_high ( & self ) -> bool { * self == CKPOL_A :: IDLEHIGH } } # [ doc = "Write proxy for field `CKPOL`" ]
pub struct CKPOL_W < 'a > { w : & 'a mut W , } impl < 'a > CKPOL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKPOL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "I2S clock inactive state is low level" ]
# [ inline ( always ) ]
pub fn idle_low ( self ) -> & 'a mut W { self . variant ( CKPOL_A :: IDLELOW ) } # [ doc = "I2S clock inactive state is high level" ]
# [ inline ( always ) ]
pub fn idle_high ( self ) -> & 'a mut W { self . variant ( CKPOL_A :: IDLEHIGH ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Data length to be transferred\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum DATLEN_A { # [ doc = "0: 16-bit data length" ]
SIXTEENBIT = 0 , # [ doc = "1: 24-bit data length" ]
TWENTYFOURBIT = 1 , # [ doc = "2: 32-bit data length" ]
THIRTYTWOBIT = 2 } impl From < DATLEN_A > for u8 { # [ inline ( always ) ]
fn from ( variant : DATLEN_A ) -> Self { variant as _ } } # [ doc = "Reader of field `DATLEN`" ]
pub type DATLEN_R = crate :: R < u8 , DATLEN_A > ; impl DATLEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , DATLEN_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( DATLEN_A :: SIXTEENBIT ) , 1 => Val ( DATLEN_A :: TWENTYFOURBIT ) , 2 => Val ( DATLEN_A :: THIRTYTWOBIT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `SIXTEENBIT`" ]
# [ inline ( always ) ]
pub fn is_sixteen_bit ( & self ) -> bool { * self == DATLEN_A :: SIXTEENBIT } # [ doc = "Checks if the value of the field is `TWENTYFOURBIT`" ]
# [ inline ( always ) ]
pub fn is_twenty_four_bit ( & self ) -> bool { * self == DATLEN_A :: TWENTYFOURBIT } # [ doc = "Checks if the value of the field is `THIRTYTWOBIT`" ]
# [ inline ( always ) ]
pub fn is_thirty_two_bit ( & self ) -> bool { * self == DATLEN_A :: THIRTYTWOBIT } } # [ doc = "Write proxy for field `DATLEN`" ]
pub struct DATLEN_W < 'a > { w : & 'a mut W , } impl < 'a > DATLEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DATLEN_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "16-bit data length" ]
# [ inline ( always ) ]
pub fn sixteen_bit ( self ) -> & 'a mut W { self . variant ( DATLEN_A :: SIXTEENBIT ) } # [ doc = "24-bit data length" ]
# [ inline ( always ) ]
pub fn twenty_four_bit ( self ) -> & 'a mut W { self . variant ( DATLEN_A :: TWENTYFOURBIT ) } # [ doc = "32-bit data length" ]
# [ inline ( always ) ]
pub fn thirty_two_bit ( self ) -> & 'a mut W { self . variant ( DATLEN_A :: THIRTYTWOBIT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 1 ) ) | ( ( ( value as u32 ) & 0x03 ) << 1 ) ; self . w } } # [ doc = "Channel length (number of bits per audio channel)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CHLEN_A { # [ doc = "0: 16-bit wide" ]
SIXTEENBIT = 0 , # [ doc = "1: 32-bit wide" ]
THIRTYTWOBIT = 1 } impl From < CHLEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CHLEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CHLEN`" ]
pub type CHLEN_R = crate :: R < bool , CHLEN_A > ; impl CHLEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CHLEN_A { match self . bits { false => CHLEN_A :: SIXTEENBIT , true => CHLEN_A :: THIRTYTWOBIT } } # [ doc = "Checks if the value of the field is `SIXTEENBIT`" ]
# [ inline ( always ) ]
pub fn is_sixteen_bit ( & self ) -> bool { * self == CHLEN_A :: SIXTEENBIT } # [ doc = "Checks if the value of the field is `THIRTYTWOBIT`" ]
# [ inline ( always ) ]
pub fn is_thirty_two_bit ( & self ) -> bool { * self == CHLEN_A :: THIRTYTWOBIT } } # [ doc = "Write proxy for field `CHLEN`" ]
pub struct CHLEN_W < 'a > { w : & 'a mut W , } impl < 'a > CHLEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CHLEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "16-bit wide" ]
# [ inline ( always ) ]
pub fn sixteen_bit ( self ) -> & 'a mut W { self . variant ( CHLEN_A :: SIXTEENBIT ) } # [ doc = "32-bit wide" ]
# [ inline ( always ) ]
pub fn thirty_two_bit ( self ) -> & 'a mut W { self . variant ( CHLEN_A :: THIRTYTWOBIT ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 11 - I2S mode selection" ]
# [ inline ( always ) ]
pub fn i2smod ( & self ) -> I2SMOD_R { I2SMOD_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - I2S Enable" ]
# [ inline ( always ) ]
pub fn i2se ( & self ) -> I2SE_R { I2SE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - I2S configuration mode" ]
# [ inline ( always ) ]
pub fn i2scfg ( & self ) -> I2SCFG_R { I2SCFG_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - PCM frame synchronization" ]
# [ inline ( always ) ]
pub fn pcmsync ( & self ) -> PCMSYNC_R { PCMSYNC_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - I2S standard selection" ]
# [ inline ( always ) ]
pub fn i2sstd ( & self ) -> I2SSTD_R { I2SSTD_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 3 - Steady state clock polarity" ]
# [ inline ( always ) ]
pub fn ckpol ( & self ) -> CKPOL_R { CKPOL_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bits 1:2 - Data length to be transferred" ]
# [ inline ( always ) ]
pub fn datlen ( & self ) -> DATLEN_R { DATLEN_R :: new ( ( ( self . bits >> 1 ) & 0x03 ) as u8 ) } # [ doc = "Bit 0 - Channel length (number of bits per audio channel)" ]
# [ inline ( always ) ]
pub fn chlen ( & self ) -> CHLEN_R { CHLEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 11 - I2S mode selection" ]
# [ inline ( always ) ]
pub fn i2smod ( & mut self ) -> I2SMOD_W { I2SMOD_W { w : self } } # [ doc = "Bit 10 - I2S Enable" ]
# [ inline ( always ) ]
pub fn i2se ( & mut self ) -> I2SE_W { I2SE_W { w : self } } # [ doc = "Bits 8:9 - I2S configuration mode" ]
# [ inline ( always ) ]
pub fn i2scfg ( & mut self ) -> I2SCFG_W { I2SCFG_W { w : self } } # [ doc = "Bit 7 - PCM frame synchronization" ]
# [ inline ( always ) ]
pub fn pcmsync ( & mut self ) -> PCMSYNC_W { PCMSYNC_W { w : self } } # [ doc = "Bits 4:5 - I2S standard selection" ]
# [ inline ( always ) ]
pub fn i2sstd ( & mut self ) -> I2SSTD_W { I2SSTD_W { w : self } } # [ doc = "Bit 3 - Steady state clock polarity" ]
# [ inline ( always ) ]
pub fn ckpol ( & mut self ) -> CKPOL_W { CKPOL_W { w : self } } # [ doc = "Bits 1:2 - Data length to be transferred" ]
# [ inline ( always ) ]
pub fn datlen ( & mut self ) -> DATLEN_W { DATLEN_W { w : self } } # [ doc = "Bit 0 - Channel length (number of bits per audio channel)" ]
# [ inline ( always ) ]
pub fn chlen ( & mut self ) -> CHLEN_W { CHLEN_W { w : self } } } } # [ doc = "I2S prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2spr](i2spr) module" ]
pub type I2SPR = crate :: Reg < u32 , _I2SPR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _I2SPR ; # [ doc = "`read()` method returns [i2spr::R](i2spr::R) reader structure" ]
impl crate :: Readable for I2SPR { } # [ doc = "`write(|w| ..)` method takes [i2spr::W](i2spr::W) writer structure" ]
impl crate :: Writable for I2SPR { } # [ doc = "I2S prescaler register" ]
pub mod i2spr { # [ doc = "Reader of register I2SPR" ]
pub type R = crate :: R < u32 , super :: I2SPR > ; # [ doc = "Writer for register I2SPR" ]
pub type W = crate :: W < u32 , super :: I2SPR > ; # [ doc = "Register I2SPR `reset()`'s with value 0x10" ]
impl crate :: ResetValue for super :: I2SPR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x10 } } # [ doc = "Master clock output enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MCKOE_A { # [ doc = "0: Master clock output is disabled" ]
DISABLED = 0 , # [ doc = "1: Master clock output is enabled" ]
ENABLED = 1 } impl From < MCKOE_A > for bool { # [ inline ( always ) ]
fn from ( variant : MCKOE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MCKOE`" ]
pub type MCKOE_R = crate :: R < bool , MCKOE_A > ; impl MCKOE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MCKOE_A { match self . bits { false => MCKOE_A :: DISABLED , true => MCKOE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == MCKOE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == MCKOE_A :: ENABLED } } # [ doc = "Write proxy for field `MCKOE`" ]
pub struct MCKOE_W < 'a > { w : & 'a mut W , } impl < 'a > MCKOE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MCKOE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Master clock output is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( MCKOE_A :: DISABLED ) } # [ doc = "Master clock output is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( MCKOE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Odd factor for the prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ODD_A { # [ doc = "0: Real divider value is I2SDIV * 2" ]
EVEN = 0 , # [ doc = "1: Real divider value is (I2SDIV * 2) + 1" ]
ODD = 1 } impl From < ODD_A > for bool { # [ inline ( always ) ]
fn from ( variant : ODD_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ODD`" ]
pub type ODD_R = crate :: R < bool , ODD_A > ; impl ODD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ODD_A { match self . bits { false => ODD_A :: EVEN , true => ODD_A :: ODD } } # [ doc = "Checks if the value of the field is `EVEN`" ]
# [ inline ( always ) ]
pub fn is_even ( & self ) -> bool { * self == ODD_A :: EVEN } # [ doc = "Checks if the value of the field is `ODD`" ]
# [ inline ( always ) ]
pub fn is_odd ( & self ) -> bool { * self == ODD_A :: ODD } } # [ doc = "Write proxy for field `ODD`" ]
pub struct ODD_W < 'a > { w : & 'a mut W , } impl < 'a > ODD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODD_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Real divider value is I2SDIV * 2" ]
# [ inline ( always ) ]
pub fn even ( self ) -> & 'a mut W { self . variant ( ODD_A :: EVEN ) } # [ doc = "Real divider value is (I2SDIV * 2) + 1" ]
# [ inline ( always ) ]
pub fn odd ( self ) -> & 'a mut W { self . variant ( ODD_A :: ODD ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `I2SDIV`" ]
pub type I2SDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `I2SDIV`" ]
pub struct I2SDIV_W < 'a > { w : & 'a mut W , } impl < 'a > I2SDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bit 9 - Master clock output enable" ]
# [ inline ( always ) ]
pub fn mckoe ( & self ) -> MCKOE_R { MCKOE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Odd factor for the prescaler" ]
# [ inline ( always ) ]
pub fn odd ( & self ) -> ODD_R { ODD_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:7 - I2S Linear prescaler" ]
# [ inline ( always ) ]
pub fn i2sdiv ( & self ) -> I2SDIV_R { I2SDIV_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bit 9 - Master clock output enable" ]
# [ inline ( always ) ]
pub fn mckoe ( & mut self ) -> MCKOE_W { MCKOE_W { w : self } } # [ doc = "Bit 8 - Odd factor for the prescaler" ]
# [ inline ( always ) ]
pub fn odd ( & mut self ) -> ODD_W { ODD_W { w : self } } # [ doc = "Bits 0:7 - I2S Linear prescaler" ]
# [ inline ( always ) ]
pub fn i2sdiv ( & mut self ) -> I2SDIV_W { I2SDIV_W { w : self } } } } } # [ doc = "Serial peripheral interface/Inter-IC sound" ]
pub struct SPI2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for SPI2 { } impl SPI2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const spi1 :: RegisterBlock { 0x4000_3800 as * const _ } } impl Deref for SPI2 { type Target = spi1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SPI2 :: ptr ( ) } } } # [ doc = "Serial peripheral interface/Inter-IC sound" ]
pub struct SPI3 { _marker : PhantomData < * const ( ) > } unsafe impl Send for SPI3 { } impl SPI3 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const spi1 :: RegisterBlock { 0x4000_3c00 as * const _ } } impl Deref for SPI3 { type Target = spi1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SPI3 :: ptr ( ) } } } # [ doc = "Serial peripheral interface/Inter-IC sound" ]
pub struct I2S2EXT { _marker : PhantomData < * const ( ) > } unsafe impl Send for I2S2EXT { } impl I2S2EXT { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const spi1 :: RegisterBlock { 0x4000_3400 as * const _ } } impl Deref for I2S2EXT { type Target = spi1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * I2S2EXT :: ptr ( ) } } } # [ doc = "Serial peripheral interface/Inter-IC sound" ]
pub struct I2S3EXT { _marker : PhantomData < * const ( ) > } unsafe impl Send for I2S3EXT { } impl I2S3EXT { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const spi1 :: RegisterBlock { 0x4000_4000 as * const _ } } impl Deref for I2S3EXT { type Target = spi1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * I2S3EXT :: ptr ( ) } } } # [ doc = "Serial peripheral interface/Inter-IC sound" ]
pub struct SPI4 { _marker : PhantomData < * const ( ) > } unsafe impl Send for SPI4 { } impl SPI4 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const spi1 :: RegisterBlock { 0x4001_3c00 as * const _ } } impl Deref for SPI4 { type Target = spi1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SPI4 :: ptr ( ) } } } # [ doc = "External interrupt/event controller" ]
pub struct EXTI { _marker : PhantomData < * const ( ) > } unsafe impl Send for EXTI { } impl EXTI { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const exti :: RegisterBlock { 0x4001_0400 as * const _ } } impl Deref for EXTI { type Target = exti :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * EXTI :: ptr ( ) } } } # [ doc = "External interrupt/event controller" ]
pub mod exti { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Interrupt mask register (EXTI_IMR)" ]
pub imr : IMR , # [ doc = "0x04 - Event mask register (EXTI_EMR)" ]
pub emr : EMR , # [ doc = "0x08 - Rising Trigger selection register (EXTI_RTSR)" ]
pub rtsr : RTSR , # [ doc = "0x0c - Falling Trigger selection register (EXTI_FTSR)" ]
pub ftsr : FTSR , # [ doc = "0x10 - Software interrupt event register (EXTI_SWIER)" ]
pub swier : SWIER , # [ doc = "0x14 - Pending register (EXTI_PR)" ]
pub pr : PR , } # [ doc = "Interrupt mask register (EXTI_IMR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](imr) module" ]
pub type IMR = crate :: Reg < u32 , _IMR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IMR ; # [ doc = "`read()` method returns [imr::R](imr::R) reader structure" ]
impl crate :: Readable for IMR { } # [ doc = "`write(|w| ..)` method takes [imr::W](imr::W) writer structure" ]
impl crate :: Writable for IMR { } # [ doc = "Interrupt mask register (EXTI_IMR)" ]
pub mod imr { # [ doc = "Reader of register IMR" ]
pub type R = crate :: R < u32 , super :: IMR > ; # [ doc = "Writer for register IMR" ]
pub type W = crate :: W < u32 , super :: IMR > ; # [ doc = "Register IMR `reset()`'s with value 0x1f80_0000" ]
impl crate :: ResetValue for super :: IMR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x1f80_0000 } } # [ doc = "Interrupt Mask on line 0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MR0_A { # [ doc = "0: Interrupt request line is masked" ]
MASKED = 0 , # [ doc = "1: Interrupt request line is unmasked" ]
UNMASKED = 1 } impl From < MR0_A > for bool { # [ inline ( always ) ]
fn from ( variant : MR0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MR0`" ]
pub type MR0_R = crate :: R < bool , MR0_A > ; impl MR0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MR0_A { match self . bits { false => MR0_A :: MASKED , true => MR0_A :: UNMASKED } } # [ doc = "Checks if the value of the field is `MASKED`" ]
# [ inline ( always ) ]
pub fn is_masked ( & self ) -> bool { * self == MR0_A :: MASKED } # [ doc = "Checks if the value of the field is `UNMASKED`" ]
# [ inline ( always ) ]
pub fn is_unmasked ( & self ) -> bool { * self == MR0_A :: UNMASKED } } # [ doc = "Write proxy for field `MR0`" ]
pub struct MR0_W < 'a > { w : & 'a mut W , } impl < 'a > MR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Interrupt Mask on line 1" ]
pub type MR1_A = MR0_A ; # [ doc = "Reader of field `MR1`" ]
pub type MR1_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR1`" ]
pub struct MR1_W < 'a > { w : & 'a mut W , } impl < 'a > MR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Interrupt Mask on line 2" ]
pub type MR2_A = MR0_A ; # [ doc = "Reader of field `MR2`" ]
pub type MR2_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR2`" ]
pub struct MR2_W < 'a > { w : & 'a mut W , } impl < 'a > MR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Interrupt Mask on line 3" ]
pub type MR3_A = MR0_A ; # [ doc = "Reader of field `MR3`" ]
pub type MR3_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR3`" ]
pub struct MR3_W < 'a > { w : & 'a mut W , } impl < 'a > MR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Interrupt Mask on line 4" ]
pub type MR4_A = MR0_A ; # [ doc = "Reader of field `MR4`" ]
pub type MR4_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR4`" ]
pub struct MR4_W < 'a > { w : & 'a mut W , } impl < 'a > MR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Interrupt Mask on line 5" ]
pub type MR5_A = MR0_A ; # [ doc = "Reader of field `MR5`" ]
pub type MR5_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR5`" ]
pub struct MR5_W < 'a > { w : & 'a mut W , } impl < 'a > MR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Interrupt Mask on line 6" ]
pub type MR6_A = MR0_A ; # [ doc = "Reader of field `MR6`" ]
pub type MR6_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR6`" ]
pub struct MR6_W < 'a > { w : & 'a mut W , } impl < 'a > MR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Interrupt Mask on line 7" ]
pub type MR7_A = MR0_A ; # [ doc = "Reader of field `MR7`" ]
pub type MR7_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR7`" ]
pub struct MR7_W < 'a > { w : & 'a mut W , } impl < 'a > MR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Interrupt Mask on line 8" ]
pub type MR8_A = MR0_A ; # [ doc = "Reader of field `MR8`" ]
pub type MR8_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR8`" ]
pub struct MR8_W < 'a > { w : & 'a mut W , } impl < 'a > MR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Interrupt Mask on line 9" ]
pub type MR9_A = MR0_A ; # [ doc = "Reader of field `MR9`" ]
pub type MR9_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR9`" ]
pub struct MR9_W < 'a > { w : & 'a mut W , } impl < 'a > MR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Interrupt Mask on line 10" ]
pub type MR10_A = MR0_A ; # [ doc = "Reader of field `MR10`" ]
pub type MR10_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR10`" ]
pub struct MR10_W < 'a > { w : & 'a mut W , } impl < 'a > MR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Interrupt Mask on line 11" ]
pub type MR11_A = MR0_A ; # [ doc = "Reader of field `MR11`" ]
pub type MR11_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR11`" ]
pub struct MR11_W < 'a > { w : & 'a mut W , } impl < 'a > MR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Interrupt Mask on line 12" ]
pub type MR12_A = MR0_A ; # [ doc = "Reader of field `MR12`" ]
pub type MR12_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR12`" ]
pub struct MR12_W < 'a > { w : & 'a mut W , } impl < 'a > MR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Interrupt Mask on line 13" ]
pub type MR13_A = MR0_A ; # [ doc = "Reader of field `MR13`" ]
pub type MR13_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR13`" ]
pub struct MR13_W < 'a > { w : & 'a mut W , } impl < 'a > MR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Interrupt Mask on line 14" ]
pub type MR14_A = MR0_A ; # [ doc = "Reader of field `MR14`" ]
pub type MR14_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR14`" ]
pub struct MR14_W < 'a > { w : & 'a mut W , } impl < 'a > MR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Interrupt Mask on line 15" ]
pub type MR15_A = MR0_A ; # [ doc = "Reader of field `MR15`" ]
pub type MR15_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR15`" ]
pub struct MR15_W < 'a > { w : & 'a mut W , } impl < 'a > MR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Interrupt Mask on line 16" ]
pub type MR16_A = MR0_A ; # [ doc = "Reader of field `MR16`" ]
pub type MR16_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR16`" ]
pub struct MR16_W < 'a > { w : & 'a mut W , } impl < 'a > MR16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Interrupt Mask on line 17" ]
pub type MR17_A = MR0_A ; # [ doc = "Reader of field `MR17`" ]
pub type MR17_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR17`" ]
pub struct MR17_W < 'a > { w : & 'a mut W , } impl < 'a > MR17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Interrupt Mask on line 18" ]
pub type MR18_A = MR0_A ; # [ doc = "Reader of field `MR18`" ]
pub type MR18_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR18`" ]
pub struct MR18_W < 'a > { w : & 'a mut W , } impl < 'a > MR18_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR18_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Interrupt Mask on line 19" ]
pub type MR19_A = MR0_A ; # [ doc = "Reader of field `MR19`" ]
pub type MR19_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR19`" ]
pub struct MR19_W < 'a > { w : & 'a mut W , } impl < 'a > MR19_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR19_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Interrupt Mask on line 20" ]
pub type MR20_A = MR0_A ; # [ doc = "Reader of field `MR20`" ]
pub type MR20_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR20`" ]
pub struct MR20_W < 'a > { w : & 'a mut W , } impl < 'a > MR20_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR20_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Interrupt Mask on line 21" ]
pub type MR21_A = MR0_A ; # [ doc = "Reader of field `MR21`" ]
pub type MR21_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR21`" ]
pub struct MR21_W < 'a > { w : & 'a mut W , } impl < 'a > MR21_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR21_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Interrupt Mask on line 22" ]
pub type MR22_A = MR0_A ; # [ doc = "Reader of field `MR22`" ]
pub type MR22_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR22`" ]
pub struct MR22_W < 'a > { w : & 'a mut W , } impl < 'a > MR22_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR22_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Interrupt Mask on line 23" ]
pub type MR23_A = MR0_A ; # [ doc = "Reader of field `MR23`" ]
pub type MR23_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR23`" ]
pub struct MR23_W < 'a > { w : & 'a mut W , } impl < 'a > MR23_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR23_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Interrupt Mask on line 24" ]
pub type MR24_A = MR0_A ; # [ doc = "Reader of field `MR24`" ]
pub type MR24_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR24`" ]
pub struct MR24_W < 'a > { w : & 'a mut W , } impl < 'a > MR24_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR24_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Interrupt Mask on line 25" ]
pub type MR25_A = MR0_A ; # [ doc = "Reader of field `MR25`" ]
pub type MR25_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR25`" ]
pub struct MR25_W < 'a > { w : & 'a mut W , } impl < 'a > MR25_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR25_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Interrupt Mask on line 26" ]
pub type MR26_A = MR0_A ; # [ doc = "Reader of field `MR26`" ]
pub type MR26_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR26`" ]
pub struct MR26_W < 'a > { w : & 'a mut W , } impl < 'a > MR26_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR26_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Interrupt Mask on line 27" ]
pub type MR27_A = MR0_A ; # [ doc = "Reader of field `MR27`" ]
pub type MR27_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR27`" ]
pub struct MR27_W < 'a > { w : & 'a mut W , } impl < 'a > MR27_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR27_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Interrupt Mask on line 28" ]
pub type MR28_A = MR0_A ; # [ doc = "Reader of field `MR28`" ]
pub type MR28_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR28`" ]
pub struct MR28_W < 'a > { w : & 'a mut W , } impl < 'a > MR28_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR28_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } impl R { # [ doc = "Bit 0 - Interrupt Mask on line 0" ]
# [ inline ( always ) ]
pub fn mr0 ( & self ) -> MR0_R { MR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Interrupt Mask on line 1" ]
# [ inline ( always ) ]
pub fn mr1 ( & self ) -> MR1_R { MR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Interrupt Mask on line 2" ]
# [ inline ( always ) ]
pub fn mr2 ( & self ) -> MR2_R { MR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Interrupt Mask on line 3" ]
# [ inline ( always ) ]
pub fn mr3 ( & self ) -> MR3_R { MR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Interrupt Mask on line 4" ]
# [ inline ( always ) ]
pub fn mr4 ( & self ) -> MR4_R { MR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Interrupt Mask on line 5" ]
# [ inline ( always ) ]
pub fn mr5 ( & self ) -> MR5_R { MR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Interrupt Mask on line 6" ]
# [ inline ( always ) ]
pub fn mr6 ( & self ) -> MR6_R { MR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Interrupt Mask on line 7" ]
# [ inline ( always ) ]
pub fn mr7 ( & self ) -> MR7_R { MR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Interrupt Mask on line 8" ]
# [ inline ( always ) ]
pub fn mr8 ( & self ) -> MR8_R { MR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Interrupt Mask on line 9" ]
# [ inline ( always ) ]
pub fn mr9 ( & self ) -> MR9_R { MR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Interrupt Mask on line 10" ]
# [ inline ( always ) ]
pub fn mr10 ( & self ) -> MR10_R { MR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Interrupt Mask on line 11" ]
# [ inline ( always ) ]
pub fn mr11 ( & self ) -> MR11_R { MR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Interrupt Mask on line 12" ]
# [ inline ( always ) ]
pub fn mr12 ( & self ) -> MR12_R { MR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Interrupt Mask on line 13" ]
# [ inline ( always ) ]
pub fn mr13 ( & self ) -> MR13_R { MR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Interrupt Mask on line 14" ]
# [ inline ( always ) ]
pub fn mr14 ( & self ) -> MR14_R { MR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Interrupt Mask on line 15" ]
# [ inline ( always ) ]
pub fn mr15 ( & self ) -> MR15_R { MR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Interrupt Mask on line 16" ]
# [ inline ( always ) ]
pub fn mr16 ( & self ) -> MR16_R { MR16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Interrupt Mask on line 17" ]
# [ inline ( always ) ]
pub fn mr17 ( & self ) -> MR17_R { MR17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Interrupt Mask on line 18" ]
# [ inline ( always ) ]
pub fn mr18 ( & self ) -> MR18_R { MR18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Interrupt Mask on line 19" ]
# [ inline ( always ) ]
pub fn mr19 ( & self ) -> MR19_R { MR19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Interrupt Mask on line 20" ]
# [ inline ( always ) ]
pub fn mr20 ( & self ) -> MR20_R { MR20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Interrupt Mask on line 21" ]
# [ inline ( always ) ]
pub fn mr21 ( & self ) -> MR21_R { MR21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Interrupt Mask on line 22" ]
# [ inline ( always ) ]
pub fn mr22 ( & self ) -> MR22_R { MR22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Interrupt Mask on line 23" ]
# [ inline ( always ) ]
pub fn mr23 ( & self ) -> MR23_R { MR23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Interrupt Mask on line 24" ]
# [ inline ( always ) ]
pub fn mr24 ( & self ) -> MR24_R { MR24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Interrupt Mask on line 25" ]
# [ inline ( always ) ]
pub fn mr25 ( & self ) -> MR25_R { MR25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Interrupt Mask on line 26" ]
# [ inline ( always ) ]
pub fn mr26 ( & self ) -> MR26_R { MR26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Interrupt Mask on line 27" ]
# [ inline ( always ) ]
pub fn mr27 ( & self ) -> MR27_R { MR27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Interrupt Mask on line 28" ]
# [ inline ( always ) ]
pub fn mr28 ( & self ) -> MR28_R { MR28_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Interrupt Mask on line 0" ]
# [ inline ( always ) ]
pub fn mr0 ( & mut self ) -> MR0_W { MR0_W { w : self } } # [ doc = "Bit 1 - Interrupt Mask on line 1" ]
# [ inline ( always ) ]
pub fn mr1 ( & mut self ) -> MR1_W { MR1_W { w : self } } # [ doc = "Bit 2 - Interrupt Mask on line 2" ]
# [ inline ( always ) ]
pub fn mr2 ( & mut self ) -> MR2_W { MR2_W { w : self } } # [ doc = "Bit 3 - Interrupt Mask on line 3" ]
# [ inline ( always ) ]
pub fn mr3 ( & mut self ) -> MR3_W { MR3_W { w : self } } # [ doc = "Bit 4 - Interrupt Mask on line 4" ]
# [ inline ( always ) ]
pub fn mr4 ( & mut self ) -> MR4_W { MR4_W { w : self } } # [ doc = "Bit 5 - Interrupt Mask on line 5" ]
# [ inline ( always ) ]
pub fn mr5 ( & mut self ) -> MR5_W { MR5_W { w : self } } # [ doc = "Bit 6 - Interrupt Mask on line 6" ]
# [ inline ( always ) ]
pub fn mr6 ( & mut self ) -> MR6_W { MR6_W { w : self } } # [ doc = "Bit 7 - Interrupt Mask on line 7" ]
# [ inline ( always ) ]
pub fn mr7 ( & mut self ) -> MR7_W { MR7_W { w : self } } # [ doc = "Bit 8 - Interrupt Mask on line 8" ]
# [ inline ( always ) ]
pub fn mr8 ( & mut self ) -> MR8_W { MR8_W { w : self } } # [ doc = "Bit 9 - Interrupt Mask on line 9" ]
# [ inline ( always ) ]
pub fn mr9 ( & mut self ) -> MR9_W { MR9_W { w : self } } # [ doc = "Bit 10 - Interrupt Mask on line 10" ]
# [ inline ( always ) ]
pub fn mr10 ( & mut self ) -> MR10_W { MR10_W { w : self } } # [ doc = "Bit 11 - Interrupt Mask on line 11" ]
# [ inline ( always ) ]
pub fn mr11 ( & mut self ) -> MR11_W { MR11_W { w : self } } # [ doc = "Bit 12 - Interrupt Mask on line 12" ]
# [ inline ( always ) ]
pub fn mr12 ( & mut self ) -> MR12_W { MR12_W { w : self } } # [ doc = "Bit 13 - Interrupt Mask on line 13" ]
# [ inline ( always ) ]
pub fn mr13 ( & mut self ) -> MR13_W { MR13_W { w : self } } # [ doc = "Bit 14 - Interrupt Mask on line 14" ]
# [ inline ( always ) ]
pub fn mr14 ( & mut self ) -> MR14_W { MR14_W { w : self } } # [ doc = "Bit 15 - Interrupt Mask on line 15" ]
# [ inline ( always ) ]
pub fn mr15 ( & mut self ) -> MR15_W { MR15_W { w : self } } # [ doc = "Bit 16 - Interrupt Mask on line 16" ]
# [ inline ( always ) ]
pub fn mr16 ( & mut self ) -> MR16_W { MR16_W { w : self } } # [ doc = "Bit 17 - Interrupt Mask on line 17" ]
# [ inline ( always ) ]
pub fn mr17 ( & mut self ) -> MR17_W { MR17_W { w : self } } # [ doc = "Bit 18 - Interrupt Mask on line 18" ]
# [ inline ( always ) ]
pub fn mr18 ( & mut self ) -> MR18_W { MR18_W { w : self } } # [ doc = "Bit 19 - Interrupt Mask on line 19" ]
# [ inline ( always ) ]
pub fn mr19 ( & mut self ) -> MR19_W { MR19_W { w : self } } # [ doc = "Bit 20 - Interrupt Mask on line 20" ]
# [ inline ( always ) ]
pub fn mr20 ( & mut self ) -> MR20_W { MR20_W { w : self } } # [ doc = "Bit 21 - Interrupt Mask on line 21" ]
# [ inline ( always ) ]
pub fn mr21 ( & mut self ) -> MR21_W { MR21_W { w : self } } # [ doc = "Bit 22 - Interrupt Mask on line 22" ]
# [ inline ( always ) ]
pub fn mr22 ( & mut self ) -> MR22_W { MR22_W { w : self } } # [ doc = "Bit 23 - Interrupt Mask on line 23" ]
# [ inline ( always ) ]
pub fn mr23 ( & mut self ) -> MR23_W { MR23_W { w : self } } # [ doc = "Bit 24 - Interrupt Mask on line 24" ]
# [ inline ( always ) ]
pub fn mr24 ( & mut self ) -> MR24_W { MR24_W { w : self } } # [ doc = "Bit 25 - Interrupt Mask on line 25" ]
# [ inline ( always ) ]
pub fn mr25 ( & mut self ) -> MR25_W { MR25_W { w : self } } # [ doc = "Bit 26 - Interrupt Mask on line 26" ]
# [ inline ( always ) ]
pub fn mr26 ( & mut self ) -> MR26_W { MR26_W { w : self } } # [ doc = "Bit 27 - Interrupt Mask on line 27" ]
# [ inline ( always ) ]
pub fn mr27 ( & mut self ) -> MR27_W { MR27_W { w : self } } # [ doc = "Bit 28 - Interrupt Mask on line 28" ]
# [ inline ( always ) ]
pub fn mr28 ( & mut self ) -> MR28_W { MR28_W { w : self } } } } # [ doc = "Event mask register (EXTI_EMR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [emr](emr) module" ]
pub type EMR = crate :: Reg < u32 , _EMR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EMR ; # [ doc = "`read()` method returns [emr::R](emr::R) reader structure" ]
impl crate :: Readable for EMR { } # [ doc = "`write(|w| ..)` method takes [emr::W](emr::W) writer structure" ]
impl crate :: Writable for EMR { } # [ doc = "Event mask register (EXTI_EMR)" ]
pub mod emr { # [ doc = "Reader of register EMR" ]
pub type R = crate :: R < u32 , super :: EMR > ; # [ doc = "Writer for register EMR" ]
pub type W = crate :: W < u32 , super :: EMR > ; # [ doc = "Register EMR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EMR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Event Mask on line 0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MR0_A { # [ doc = "0: Interrupt request line is masked" ]
MASKED = 0 , # [ doc = "1: Interrupt request line is unmasked" ]
UNMASKED = 1 } impl From < MR0_A > for bool { # [ inline ( always ) ]
fn from ( variant : MR0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MR0`" ]
pub type MR0_R = crate :: R < bool , MR0_A > ; impl MR0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MR0_A { match self . bits { false => MR0_A :: MASKED , true => MR0_A :: UNMASKED } } # [ doc = "Checks if the value of the field is `MASKED`" ]
# [ inline ( always ) ]
pub fn is_masked ( & self ) -> bool { * self == MR0_A :: MASKED } # [ doc = "Checks if the value of the field is `UNMASKED`" ]
# [ inline ( always ) ]
pub fn is_unmasked ( & self ) -> bool { * self == MR0_A :: UNMASKED } } # [ doc = "Write proxy for field `MR0`" ]
pub struct MR0_W < 'a > { w : & 'a mut W , } impl < 'a > MR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Event Mask on line 1" ]
pub type MR1_A = MR0_A ; # [ doc = "Reader of field `MR1`" ]
pub type MR1_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR1`" ]
pub struct MR1_W < 'a > { w : & 'a mut W , } impl < 'a > MR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Event Mask on line 2" ]
pub type MR2_A = MR0_A ; # [ doc = "Reader of field `MR2`" ]
pub type MR2_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR2`" ]
pub struct MR2_W < 'a > { w : & 'a mut W , } impl < 'a > MR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Event Mask on line 3" ]
pub type MR3_A = MR0_A ; # [ doc = "Reader of field `MR3`" ]
pub type MR3_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR3`" ]
pub struct MR3_W < 'a > { w : & 'a mut W , } impl < 'a > MR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Event Mask on line 4" ]
pub type MR4_A = MR0_A ; # [ doc = "Reader of field `MR4`" ]
pub type MR4_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR4`" ]
pub struct MR4_W < 'a > { w : & 'a mut W , } impl < 'a > MR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Event Mask on line 5" ]
pub type MR5_A = MR0_A ; # [ doc = "Reader of field `MR5`" ]
pub type MR5_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR5`" ]
pub struct MR5_W < 'a > { w : & 'a mut W , } impl < 'a > MR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Event Mask on line 6" ]
pub type MR6_A = MR0_A ; # [ doc = "Reader of field `MR6`" ]
pub type MR6_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR6`" ]
pub struct MR6_W < 'a > { w : & 'a mut W , } impl < 'a > MR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Event Mask on line 7" ]
pub type MR7_A = MR0_A ; # [ doc = "Reader of field `MR7`" ]
pub type MR7_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR7`" ]
pub struct MR7_W < 'a > { w : & 'a mut W , } impl < 'a > MR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Event Mask on line 8" ]
pub type MR8_A = MR0_A ; # [ doc = "Reader of field `MR8`" ]
pub type MR8_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR8`" ]
pub struct MR8_W < 'a > { w : & 'a mut W , } impl < 'a > MR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Event Mask on line 9" ]
pub type MR9_A = MR0_A ; # [ doc = "Reader of field `MR9`" ]
pub type MR9_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR9`" ]
pub struct MR9_W < 'a > { w : & 'a mut W , } impl < 'a > MR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Event Mask on line 10" ]
pub type MR10_A = MR0_A ; # [ doc = "Reader of field `MR10`" ]
pub type MR10_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR10`" ]
pub struct MR10_W < 'a > { w : & 'a mut W , } impl < 'a > MR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Event Mask on line 11" ]
pub type MR11_A = MR0_A ; # [ doc = "Reader of field `MR11`" ]
pub type MR11_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR11`" ]
pub struct MR11_W < 'a > { w : & 'a mut W , } impl < 'a > MR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Event Mask on line 12" ]
pub type MR12_A = MR0_A ; # [ doc = "Reader of field `MR12`" ]
pub type MR12_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR12`" ]
pub struct MR12_W < 'a > { w : & 'a mut W , } impl < 'a > MR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Event Mask on line 13" ]
pub type MR13_A = MR0_A ; # [ doc = "Reader of field `MR13`" ]
pub type MR13_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR13`" ]
pub struct MR13_W < 'a > { w : & 'a mut W , } impl < 'a > MR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Event Mask on line 14" ]
pub type MR14_A = MR0_A ; # [ doc = "Reader of field `MR14`" ]
pub type MR14_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR14`" ]
pub struct MR14_W < 'a > { w : & 'a mut W , } impl < 'a > MR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Event Mask on line 15" ]
pub type MR15_A = MR0_A ; # [ doc = "Reader of field `MR15`" ]
pub type MR15_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR15`" ]
pub struct MR15_W < 'a > { w : & 'a mut W , } impl < 'a > MR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Event Mask on line 16" ]
pub type MR16_A = MR0_A ; # [ doc = "Reader of field `MR16`" ]
pub type MR16_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR16`" ]
pub struct MR16_W < 'a > { w : & 'a mut W , } impl < 'a > MR16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Event Mask on line 17" ]
pub type MR17_A = MR0_A ; # [ doc = "Reader of field `MR17`" ]
pub type MR17_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR17`" ]
pub struct MR17_W < 'a > { w : & 'a mut W , } impl < 'a > MR17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Event Mask on line 18" ]
pub type MR18_A = MR0_A ; # [ doc = "Reader of field `MR18`" ]
pub type MR18_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR18`" ]
pub struct MR18_W < 'a > { w : & 'a mut W , } impl < 'a > MR18_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR18_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Event Mask on line 19" ]
pub type MR19_A = MR0_A ; # [ doc = "Reader of field `MR19`" ]
pub type MR19_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR19`" ]
pub struct MR19_W < 'a > { w : & 'a mut W , } impl < 'a > MR19_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR19_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Event Mask on line 20" ]
pub type MR20_A = MR0_A ; # [ doc = "Reader of field `MR20`" ]
pub type MR20_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR20`" ]
pub struct MR20_W < 'a > { w : & 'a mut W , } impl < 'a > MR20_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR20_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Event Mask on line 21" ]
pub type MR21_A = MR0_A ; # [ doc = "Reader of field `MR21`" ]
pub type MR21_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR21`" ]
pub struct MR21_W < 'a > { w : & 'a mut W , } impl < 'a > MR21_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR21_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Event Mask on line 22" ]
pub type MR22_A = MR0_A ; # [ doc = "Reader of field `MR22`" ]
pub type MR22_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR22`" ]
pub struct MR22_W < 'a > { w : & 'a mut W , } impl < 'a > MR22_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR22_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Event Mask on line 23" ]
pub type MR23_A = MR0_A ; # [ doc = "Reader of field `MR23`" ]
pub type MR23_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR23`" ]
pub struct MR23_W < 'a > { w : & 'a mut W , } impl < 'a > MR23_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR23_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Event Mask on line 24" ]
pub type MR24_A = MR0_A ; # [ doc = "Reader of field `MR24`" ]
pub type MR24_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR24`" ]
pub struct MR24_W < 'a > { w : & 'a mut W , } impl < 'a > MR24_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR24_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Event Mask on line 25" ]
pub type MR25_A = MR0_A ; # [ doc = "Reader of field `MR25`" ]
pub type MR25_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR25`" ]
pub struct MR25_W < 'a > { w : & 'a mut W , } impl < 'a > MR25_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR25_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Event Mask on line 26" ]
pub type MR26_A = MR0_A ; # [ doc = "Reader of field `MR26`" ]
pub type MR26_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR26`" ]
pub struct MR26_W < 'a > { w : & 'a mut W , } impl < 'a > MR26_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR26_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Event Mask on line 27" ]
pub type MR27_A = MR0_A ; # [ doc = "Reader of field `MR27`" ]
pub type MR27_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR27`" ]
pub struct MR27_W < 'a > { w : & 'a mut W , } impl < 'a > MR27_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR27_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Event Mask on line 28" ]
pub type MR28_A = MR0_A ; # [ doc = "Reader of field `MR28`" ]
pub type MR28_R = crate :: R < bool , MR0_A > ; # [ doc = "Write proxy for field `MR28`" ]
pub struct MR28_W < 'a > { w : & 'a mut W , } impl < 'a > MR28_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MR28_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Interrupt request line is masked" ]
# [ inline ( always ) ]
pub fn masked ( self ) -> & 'a mut W { self . variant ( MR0_A :: MASKED ) } # [ doc = "Interrupt request line is unmasked" ]
# [ inline ( always ) ]
pub fn unmasked ( self ) -> & 'a mut W { self . variant ( MR0_A :: UNMASKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } impl R { # [ doc = "Bit 0 - Event Mask on line 0" ]
# [ inline ( always ) ]
pub fn mr0 ( & self ) -> MR0_R { MR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Event Mask on line 1" ]
# [ inline ( always ) ]
pub fn mr1 ( & self ) -> MR1_R { MR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Event Mask on line 2" ]
# [ inline ( always ) ]
pub fn mr2 ( & self ) -> MR2_R { MR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Event Mask on line 3" ]
# [ inline ( always ) ]
pub fn mr3 ( & self ) -> MR3_R { MR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Event Mask on line 4" ]
# [ inline ( always ) ]
pub fn mr4 ( & self ) -> MR4_R { MR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Event Mask on line 5" ]
# [ inline ( always ) ]
pub fn mr5 ( & self ) -> MR5_R { MR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Event Mask on line 6" ]
# [ inline ( always ) ]
pub fn mr6 ( & self ) -> MR6_R { MR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Event Mask on line 7" ]
# [ inline ( always ) ]
pub fn mr7 ( & self ) -> MR7_R { MR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Event Mask on line 8" ]
# [ inline ( always ) ]
pub fn mr8 ( & self ) -> MR8_R { MR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Event Mask on line 9" ]
# [ inline ( always ) ]
pub fn mr9 ( & self ) -> MR9_R { MR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Event Mask on line 10" ]
# [ inline ( always ) ]
pub fn mr10 ( & self ) -> MR10_R { MR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Event Mask on line 11" ]
# [ inline ( always ) ]
pub fn mr11 ( & self ) -> MR11_R { MR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Event Mask on line 12" ]
# [ inline ( always ) ]
pub fn mr12 ( & self ) -> MR12_R { MR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Event Mask on line 13" ]
# [ inline ( always ) ]
pub fn mr13 ( & self ) -> MR13_R { MR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Event Mask on line 14" ]
# [ inline ( always ) ]
pub fn mr14 ( & self ) -> MR14_R { MR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Event Mask on line 15" ]
# [ inline ( always ) ]
pub fn mr15 ( & self ) -> MR15_R { MR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Event Mask on line 16" ]
# [ inline ( always ) ]
pub fn mr16 ( & self ) -> MR16_R { MR16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Event Mask on line 17" ]
# [ inline ( always ) ]
pub fn mr17 ( & self ) -> MR17_R { MR17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Event Mask on line 18" ]
# [ inline ( always ) ]
pub fn mr18 ( & self ) -> MR18_R { MR18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Event Mask on line 19" ]
# [ inline ( always ) ]
pub fn mr19 ( & self ) -> MR19_R { MR19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Event Mask on line 20" ]
# [ inline ( always ) ]
pub fn mr20 ( & self ) -> MR20_R { MR20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Event Mask on line 21" ]
# [ inline ( always ) ]
pub fn mr21 ( & self ) -> MR21_R { MR21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Event Mask on line 22" ]
# [ inline ( always ) ]
pub fn mr22 ( & self ) -> MR22_R { MR22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Event Mask on line 23" ]
# [ inline ( always ) ]
pub fn mr23 ( & self ) -> MR23_R { MR23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Event Mask on line 24" ]
# [ inline ( always ) ]
pub fn mr24 ( & self ) -> MR24_R { MR24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Event Mask on line 25" ]
# [ inline ( always ) ]
pub fn mr25 ( & self ) -> MR25_R { MR25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Event Mask on line 26" ]
# [ inline ( always ) ]
pub fn mr26 ( & self ) -> MR26_R { MR26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Event Mask on line 27" ]
# [ inline ( always ) ]
pub fn mr27 ( & self ) -> MR27_R { MR27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Event Mask on line 28" ]
# [ inline ( always ) ]
pub fn mr28 ( & self ) -> MR28_R { MR28_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Event Mask on line 0" ]
# [ inline ( always ) ]
pub fn mr0 ( & mut self ) -> MR0_W { MR0_W { w : self } } # [ doc = "Bit 1 - Event Mask on line 1" ]
# [ inline ( always ) ]
pub fn mr1 ( & mut self ) -> MR1_W { MR1_W { w : self } } # [ doc = "Bit 2 - Event Mask on line 2" ]
# [ inline ( always ) ]
pub fn mr2 ( & mut self ) -> MR2_W { MR2_W { w : self } } # [ doc = "Bit 3 - Event Mask on line 3" ]
# [ inline ( always ) ]
pub fn mr3 ( & mut self ) -> MR3_W { MR3_W { w : self } } # [ doc = "Bit 4 - Event Mask on line 4" ]
# [ inline ( always ) ]
pub fn mr4 ( & mut self ) -> MR4_W { MR4_W { w : self } } # [ doc = "Bit 5 - Event Mask on line 5" ]
# [ inline ( always ) ]
pub fn mr5 ( & mut self ) -> MR5_W { MR5_W { w : self } } # [ doc = "Bit 6 - Event Mask on line 6" ]
# [ inline ( always ) ]
pub fn mr6 ( & mut self ) -> MR6_W { MR6_W { w : self } } # [ doc = "Bit 7 - Event Mask on line 7" ]
# [ inline ( always ) ]
pub fn mr7 ( & mut self ) -> MR7_W { MR7_W { w : self } } # [ doc = "Bit 8 - Event Mask on line 8" ]
# [ inline ( always ) ]
pub fn mr8 ( & mut self ) -> MR8_W { MR8_W { w : self } } # [ doc = "Bit 9 - Event Mask on line 9" ]
# [ inline ( always ) ]
pub fn mr9 ( & mut self ) -> MR9_W { MR9_W { w : self } } # [ doc = "Bit 10 - Event Mask on line 10" ]
# [ inline ( always ) ]
pub fn mr10 ( & mut self ) -> MR10_W { MR10_W { w : self } } # [ doc = "Bit 11 - Event Mask on line 11" ]
# [ inline ( always ) ]
pub fn mr11 ( & mut self ) -> MR11_W { MR11_W { w : self } } # [ doc = "Bit 12 - Event Mask on line 12" ]
# [ inline ( always ) ]
pub fn mr12 ( & mut self ) -> MR12_W { MR12_W { w : self } } # [ doc = "Bit 13 - Event Mask on line 13" ]
# [ inline ( always ) ]
pub fn mr13 ( & mut self ) -> MR13_W { MR13_W { w : self } } # [ doc = "Bit 14 - Event Mask on line 14" ]
# [ inline ( always ) ]
pub fn mr14 ( & mut self ) -> MR14_W { MR14_W { w : self } } # [ doc = "Bit 15 - Event Mask on line 15" ]
# [ inline ( always ) ]
pub fn mr15 ( & mut self ) -> MR15_W { MR15_W { w : self } } # [ doc = "Bit 16 - Event Mask on line 16" ]
# [ inline ( always ) ]
pub fn mr16 ( & mut self ) -> MR16_W { MR16_W { w : self } } # [ doc = "Bit 17 - Event Mask on line 17" ]
# [ inline ( always ) ]
pub fn mr17 ( & mut self ) -> MR17_W { MR17_W { w : self } } # [ doc = "Bit 18 - Event Mask on line 18" ]
# [ inline ( always ) ]
pub fn mr18 ( & mut self ) -> MR18_W { MR18_W { w : self } } # [ doc = "Bit 19 - Event Mask on line 19" ]
# [ inline ( always ) ]
pub fn mr19 ( & mut self ) -> MR19_W { MR19_W { w : self } } # [ doc = "Bit 20 - Event Mask on line 20" ]
# [ inline ( always ) ]
pub fn mr20 ( & mut self ) -> MR20_W { MR20_W { w : self } } # [ doc = "Bit 21 - Event Mask on line 21" ]
# [ inline ( always ) ]
pub fn mr21 ( & mut self ) -> MR21_W { MR21_W { w : self } } # [ doc = "Bit 22 - Event Mask on line 22" ]
# [ inline ( always ) ]
pub fn mr22 ( & mut self ) -> MR22_W { MR22_W { w : self } } # [ doc = "Bit 23 - Event Mask on line 23" ]
# [ inline ( always ) ]
pub fn mr23 ( & mut self ) -> MR23_W { MR23_W { w : self } } # [ doc = "Bit 24 - Event Mask on line 24" ]
# [ inline ( always ) ]
pub fn mr24 ( & mut self ) -> MR24_W { MR24_W { w : self } } # [ doc = "Bit 25 - Event Mask on line 25" ]
# [ inline ( always ) ]
pub fn mr25 ( & mut self ) -> MR25_W { MR25_W { w : self } } # [ doc = "Bit 26 - Event Mask on line 26" ]
# [ inline ( always ) ]
pub fn mr26 ( & mut self ) -> MR26_W { MR26_W { w : self } } # [ doc = "Bit 27 - Event Mask on line 27" ]
# [ inline ( always ) ]
pub fn mr27 ( & mut self ) -> MR27_W { MR27_W { w : self } } # [ doc = "Bit 28 - Event Mask on line 28" ]
# [ inline ( always ) ]
pub fn mr28 ( & mut self ) -> MR28_W { MR28_W { w : self } } } } # [ doc = "Rising Trigger selection register (EXTI_RTSR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rtsr](rtsr) module" ]
pub type RTSR = crate :: Reg < u32 , _RTSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RTSR ; # [ doc = "`read()` method returns [rtsr::R](rtsr::R) reader structure" ]
impl crate :: Readable for RTSR { } # [ doc = "`write(|w| ..)` method takes [rtsr::W](rtsr::W) writer structure" ]
impl crate :: Writable for RTSR { } # [ doc = "Rising Trigger selection register (EXTI_RTSR)" ]
pub mod rtsr { # [ doc = "Reader of register RTSR" ]
pub type R = crate :: R < u32 , super :: RTSR > ; # [ doc = "Writer for register RTSR" ]
pub type W = crate :: W < u32 , super :: RTSR > ; # [ doc = "Register RTSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RTSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Rising trigger event configuration of line 0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TR0_A { # [ doc = "0: Rising edge trigger is disabled" ]
DISABLED = 0 , # [ doc = "1: Rising edge trigger is enabled" ]
ENABLED = 1 } impl From < TR0_A > for bool { # [ inline ( always ) ]
fn from ( variant : TR0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TR0`" ]
pub type TR0_R = crate :: R < bool , TR0_A > ; impl TR0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TR0_A { match self . bits { false => TR0_A :: DISABLED , true => TR0_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TR0_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TR0_A :: ENABLED } } # [ doc = "Write proxy for field `TR0`" ]
pub struct TR0_W < 'a > { w : & 'a mut W , } impl < 'a > TR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 1" ]
pub type TR1_A = TR0_A ; # [ doc = "Reader of field `TR1`" ]
pub type TR1_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR1`" ]
pub struct TR1_W < 'a > { w : & 'a mut W , } impl < 'a > TR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 2" ]
pub type TR2_A = TR0_A ; # [ doc = "Reader of field `TR2`" ]
pub type TR2_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR2`" ]
pub struct TR2_W < 'a > { w : & 'a mut W , } impl < 'a > TR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 3" ]
pub type TR3_A = TR0_A ; # [ doc = "Reader of field `TR3`" ]
pub type TR3_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR3`" ]
pub struct TR3_W < 'a > { w : & 'a mut W , } impl < 'a > TR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 4" ]
pub type TR4_A = TR0_A ; # [ doc = "Reader of field `TR4`" ]
pub type TR4_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR4`" ]
pub struct TR4_W < 'a > { w : & 'a mut W , } impl < 'a > TR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 5" ]
pub type TR5_A = TR0_A ; # [ doc = "Reader of field `TR5`" ]
pub type TR5_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR5`" ]
pub struct TR5_W < 'a > { w : & 'a mut W , } impl < 'a > TR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 6" ]
pub type TR6_A = TR0_A ; # [ doc = "Reader of field `TR6`" ]
pub type TR6_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR6`" ]
pub struct TR6_W < 'a > { w : & 'a mut W , } impl < 'a > TR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 7" ]
pub type TR7_A = TR0_A ; # [ doc = "Reader of field `TR7`" ]
pub type TR7_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR7`" ]
pub struct TR7_W < 'a > { w : & 'a mut W , } impl < 'a > TR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 8" ]
pub type TR8_A = TR0_A ; # [ doc = "Reader of field `TR8`" ]
pub type TR8_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR8`" ]
pub struct TR8_W < 'a > { w : & 'a mut W , } impl < 'a > TR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 9" ]
pub type TR9_A = TR0_A ; # [ doc = "Reader of field `TR9`" ]
pub type TR9_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR9`" ]
pub struct TR9_W < 'a > { w : & 'a mut W , } impl < 'a > TR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 10" ]
pub type TR10_A = TR0_A ; # [ doc = "Reader of field `TR10`" ]
pub type TR10_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR10`" ]
pub struct TR10_W < 'a > { w : & 'a mut W , } impl < 'a > TR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 11" ]
pub type TR11_A = TR0_A ; # [ doc = "Reader of field `TR11`" ]
pub type TR11_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR11`" ]
pub struct TR11_W < 'a > { w : & 'a mut W , } impl < 'a > TR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 12" ]
pub type TR12_A = TR0_A ; # [ doc = "Reader of field `TR12`" ]
pub type TR12_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR12`" ]
pub struct TR12_W < 'a > { w : & 'a mut W , } impl < 'a > TR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 13" ]
pub type TR13_A = TR0_A ; # [ doc = "Reader of field `TR13`" ]
pub type TR13_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR13`" ]
pub struct TR13_W < 'a > { w : & 'a mut W , } impl < 'a > TR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 14" ]
pub type TR14_A = TR0_A ; # [ doc = "Reader of field `TR14`" ]
pub type TR14_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR14`" ]
pub struct TR14_W < 'a > { w : & 'a mut W , } impl < 'a > TR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 15" ]
pub type TR15_A = TR0_A ; # [ doc = "Reader of field `TR15`" ]
pub type TR15_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR15`" ]
pub struct TR15_W < 'a > { w : & 'a mut W , } impl < 'a > TR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 16" ]
pub type TR16_A = TR0_A ; # [ doc = "Reader of field `TR16`" ]
pub type TR16_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR16`" ]
pub struct TR16_W < 'a > { w : & 'a mut W , } impl < 'a > TR16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 17" ]
pub type TR17_A = TR0_A ; # [ doc = "Reader of field `TR17`" ]
pub type TR17_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR17`" ]
pub struct TR17_W < 'a > { w : & 'a mut W , } impl < 'a > TR17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Rising trigger event configuration of line 19" ]
pub type TR19_A = TR0_A ; # [ doc = "Reader of field `TR19`" ]
pub type TR19_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR19`" ]
pub struct TR19_W < 'a > { w : & 'a mut W , } impl < 'a > TR19_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR19_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Rising edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Rising edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } impl R { # [ doc = "Bit 0 - Rising trigger event configuration of line 0" ]
# [ inline ( always ) ]
pub fn tr0 ( & self ) -> TR0_R { TR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Rising trigger event configuration of line 1" ]
# [ inline ( always ) ]
pub fn tr1 ( & self ) -> TR1_R { TR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Rising trigger event configuration of line 2" ]
# [ inline ( always ) ]
pub fn tr2 ( & self ) -> TR2_R { TR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Rising trigger event configuration of line 3" ]
# [ inline ( always ) ]
pub fn tr3 ( & self ) -> TR3_R { TR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Rising trigger event configuration of line 4" ]
# [ inline ( always ) ]
pub fn tr4 ( & self ) -> TR4_R { TR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Rising trigger event configuration of line 5" ]
# [ inline ( always ) ]
pub fn tr5 ( & self ) -> TR5_R { TR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Rising trigger event configuration of line 6" ]
# [ inline ( always ) ]
pub fn tr6 ( & self ) -> TR6_R { TR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Rising trigger event configuration of line 7" ]
# [ inline ( always ) ]
pub fn tr7 ( & self ) -> TR7_R { TR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Rising trigger event configuration of line 8" ]
# [ inline ( always ) ]
pub fn tr8 ( & self ) -> TR8_R { TR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Rising trigger event configuration of line 9" ]
# [ inline ( always ) ]
pub fn tr9 ( & self ) -> TR9_R { TR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Rising trigger event configuration of line 10" ]
# [ inline ( always ) ]
pub fn tr10 ( & self ) -> TR10_R { TR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Rising trigger event configuration of line 11" ]
# [ inline ( always ) ]
pub fn tr11 ( & self ) -> TR11_R { TR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Rising trigger event configuration of line 12" ]
# [ inline ( always ) ]
pub fn tr12 ( & self ) -> TR12_R { TR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Rising trigger event configuration of line 13" ]
# [ inline ( always ) ]
pub fn tr13 ( & self ) -> TR13_R { TR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Rising trigger event configuration of line 14" ]
# [ inline ( always ) ]
pub fn tr14 ( & self ) -> TR14_R { TR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Rising trigger event configuration of line 15" ]
# [ inline ( always ) ]
pub fn tr15 ( & self ) -> TR15_R { TR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Rising trigger event configuration of line 16" ]
# [ inline ( always ) ]
pub fn tr16 ( & self ) -> TR16_R { TR16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Rising trigger event configuration of line 17" ]
# [ inline ( always ) ]
pub fn tr17 ( & self ) -> TR17_R { TR17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Rising trigger event configuration of line 19" ]
# [ inline ( always ) ]
pub fn tr19 ( & self ) -> TR19_R { TR19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Rising trigger event configuration of line 0" ]
# [ inline ( always ) ]
pub fn tr0 ( & mut self ) -> TR0_W { TR0_W { w : self } } # [ doc = "Bit 1 - Rising trigger event configuration of line 1" ]
# [ inline ( always ) ]
pub fn tr1 ( & mut self ) -> TR1_W { TR1_W { w : self } } # [ doc = "Bit 2 - Rising trigger event configuration of line 2" ]
# [ inline ( always ) ]
pub fn tr2 ( & mut self ) -> TR2_W { TR2_W { w : self } } # [ doc = "Bit 3 - Rising trigger event configuration of line 3" ]
# [ inline ( always ) ]
pub fn tr3 ( & mut self ) -> TR3_W { TR3_W { w : self } } # [ doc = "Bit 4 - Rising trigger event configuration of line 4" ]
# [ inline ( always ) ]
pub fn tr4 ( & mut self ) -> TR4_W { TR4_W { w : self } } # [ doc = "Bit 5 - Rising trigger event configuration of line 5" ]
# [ inline ( always ) ]
pub fn tr5 ( & mut self ) -> TR5_W { TR5_W { w : self } } # [ doc = "Bit 6 - Rising trigger event configuration of line 6" ]
# [ inline ( always ) ]
pub fn tr6 ( & mut self ) -> TR6_W { TR6_W { w : self } } # [ doc = "Bit 7 - Rising trigger event configuration of line 7" ]
# [ inline ( always ) ]
pub fn tr7 ( & mut self ) -> TR7_W { TR7_W { w : self } } # [ doc = "Bit 8 - Rising trigger event configuration of line 8" ]
# [ inline ( always ) ]
pub fn tr8 ( & mut self ) -> TR8_W { TR8_W { w : self } } # [ doc = "Bit 9 - Rising trigger event configuration of line 9" ]
# [ inline ( always ) ]
pub fn tr9 ( & mut self ) -> TR9_W { TR9_W { w : self } } # [ doc = "Bit 10 - Rising trigger event configuration of line 10" ]
# [ inline ( always ) ]
pub fn tr10 ( & mut self ) -> TR10_W { TR10_W { w : self } } # [ doc = "Bit 11 - Rising trigger event configuration of line 11" ]
# [ inline ( always ) ]
pub fn tr11 ( & mut self ) -> TR11_W { TR11_W { w : self } } # [ doc = "Bit 12 - Rising trigger event configuration of line 12" ]
# [ inline ( always ) ]
pub fn tr12 ( & mut self ) -> TR12_W { TR12_W { w : self } } # [ doc = "Bit 13 - Rising trigger event configuration of line 13" ]
# [ inline ( always ) ]
pub fn tr13 ( & mut self ) -> TR13_W { TR13_W { w : self } } # [ doc = "Bit 14 - Rising trigger event configuration of line 14" ]
# [ inline ( always ) ]
pub fn tr14 ( & mut self ) -> TR14_W { TR14_W { w : self } } # [ doc = "Bit 15 - Rising trigger event configuration of line 15" ]
# [ inline ( always ) ]
pub fn tr15 ( & mut self ) -> TR15_W { TR15_W { w : self } } # [ doc = "Bit 16 - Rising trigger event configuration of line 16" ]
# [ inline ( always ) ]
pub fn tr16 ( & mut self ) -> TR16_W { TR16_W { w : self } } # [ doc = "Bit 17 - Rising trigger event configuration of line 17" ]
# [ inline ( always ) ]
pub fn tr17 ( & mut self ) -> TR17_W { TR17_W { w : self } } # [ doc = "Bit 19 - Rising trigger event configuration of line 19" ]
# [ inline ( always ) ]
pub fn tr19 ( & mut self ) -> TR19_W { TR19_W { w : self } } } } # [ doc = "Falling Trigger selection register (EXTI_FTSR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ftsr](ftsr) module" ]
pub type FTSR = crate :: Reg < u32 , _FTSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FTSR ; # [ doc = "`read()` method returns [ftsr::R](ftsr::R) reader structure" ]
impl crate :: Readable for FTSR { } # [ doc = "`write(|w| ..)` method takes [ftsr::W](ftsr::W) writer structure" ]
impl crate :: Writable for FTSR { } # [ doc = "Falling Trigger selection register (EXTI_FTSR)" ]
pub mod ftsr { # [ doc = "Reader of register FTSR" ]
pub type R = crate :: R < u32 , super :: FTSR > ; # [ doc = "Writer for register FTSR" ]
pub type W = crate :: W < u32 , super :: FTSR > ; # [ doc = "Register FTSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FTSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Falling trigger event configuration of line 0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TR0_A { # [ doc = "0: Falling edge trigger is disabled" ]
DISABLED = 0 , # [ doc = "1: Falling edge trigger is enabled" ]
ENABLED = 1 } impl From < TR0_A > for bool { # [ inline ( always ) ]
fn from ( variant : TR0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TR0`" ]
pub type TR0_R = crate :: R < bool , TR0_A > ; impl TR0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TR0_A { match self . bits { false => TR0_A :: DISABLED , true => TR0_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TR0_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TR0_A :: ENABLED } } # [ doc = "Write proxy for field `TR0`" ]
pub struct TR0_W < 'a > { w : & 'a mut W , } impl < 'a > TR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 1" ]
pub type TR1_A = TR0_A ; # [ doc = "Reader of field `TR1`" ]
pub type TR1_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR1`" ]
pub struct TR1_W < 'a > { w : & 'a mut W , } impl < 'a > TR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 2" ]
pub type TR2_A = TR0_A ; # [ doc = "Reader of field `TR2`" ]
pub type TR2_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR2`" ]
pub struct TR2_W < 'a > { w : & 'a mut W , } impl < 'a > TR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 3" ]
pub type TR3_A = TR0_A ; # [ doc = "Reader of field `TR3`" ]
pub type TR3_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR3`" ]
pub struct TR3_W < 'a > { w : & 'a mut W , } impl < 'a > TR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 4" ]
pub type TR4_A = TR0_A ; # [ doc = "Reader of field `TR4`" ]
pub type TR4_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR4`" ]
pub struct TR4_W < 'a > { w : & 'a mut W , } impl < 'a > TR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 5" ]
pub type TR5_A = TR0_A ; # [ doc = "Reader of field `TR5`" ]
pub type TR5_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR5`" ]
pub struct TR5_W < 'a > { w : & 'a mut W , } impl < 'a > TR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 6" ]
pub type TR6_A = TR0_A ; # [ doc = "Reader of field `TR6`" ]
pub type TR6_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR6`" ]
pub struct TR6_W < 'a > { w : & 'a mut W , } impl < 'a > TR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 7" ]
pub type TR7_A = TR0_A ; # [ doc = "Reader of field `TR7`" ]
pub type TR7_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR7`" ]
pub struct TR7_W < 'a > { w : & 'a mut W , } impl < 'a > TR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 8" ]
pub type TR8_A = TR0_A ; # [ doc = "Reader of field `TR8`" ]
pub type TR8_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR8`" ]
pub struct TR8_W < 'a > { w : & 'a mut W , } impl < 'a > TR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 9" ]
pub type TR9_A = TR0_A ; # [ doc = "Reader of field `TR9`" ]
pub type TR9_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR9`" ]
pub struct TR9_W < 'a > { w : & 'a mut W , } impl < 'a > TR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 10" ]
pub type TR10_A = TR0_A ; # [ doc = "Reader of field `TR10`" ]
pub type TR10_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR10`" ]
pub struct TR10_W < 'a > { w : & 'a mut W , } impl < 'a > TR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 11" ]
pub type TR11_A = TR0_A ; # [ doc = "Reader of field `TR11`" ]
pub type TR11_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR11`" ]
pub struct TR11_W < 'a > { w : & 'a mut W , } impl < 'a > TR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 12" ]
pub type TR12_A = TR0_A ; # [ doc = "Reader of field `TR12`" ]
pub type TR12_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR12`" ]
pub struct TR12_W < 'a > { w : & 'a mut W , } impl < 'a > TR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 13" ]
pub type TR13_A = TR0_A ; # [ doc = "Reader of field `TR13`" ]
pub type TR13_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR13`" ]
pub struct TR13_W < 'a > { w : & 'a mut W , } impl < 'a > TR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 14" ]
pub type TR14_A = TR0_A ; # [ doc = "Reader of field `TR14`" ]
pub type TR14_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR14`" ]
pub struct TR14_W < 'a > { w : & 'a mut W , } impl < 'a > TR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 15" ]
pub type TR15_A = TR0_A ; # [ doc = "Reader of field `TR15`" ]
pub type TR15_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR15`" ]
pub struct TR15_W < 'a > { w : & 'a mut W , } impl < 'a > TR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 16" ]
pub type TR16_A = TR0_A ; # [ doc = "Reader of field `TR16`" ]
pub type TR16_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR16`" ]
pub struct TR16_W < 'a > { w : & 'a mut W , } impl < 'a > TR16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 17" ]
pub type TR17_A = TR0_A ; # [ doc = "Reader of field `TR17`" ]
pub type TR17_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR17`" ]
pub struct TR17_W < 'a > { w : & 'a mut W , } impl < 'a > TR17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Falling trigger event configuration of line 19" ]
pub type TR19_A = TR0_A ; # [ doc = "Reader of field `TR19`" ]
pub type TR19_R = crate :: R < bool , TR0_A > ; # [ doc = "Write proxy for field `TR19`" ]
pub struct TR19_W < 'a > { w : & 'a mut W , } impl < 'a > TR19_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TR19_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Falling edge trigger is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: DISABLED ) } # [ doc = "Falling edge trigger is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TR0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } impl R { # [ doc = "Bit 0 - Falling trigger event configuration of line 0" ]
# [ inline ( always ) ]
pub fn tr0 ( & self ) -> TR0_R { TR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Falling trigger event configuration of line 1" ]
# [ inline ( always ) ]
pub fn tr1 ( & self ) -> TR1_R { TR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Falling trigger event configuration of line 2" ]
# [ inline ( always ) ]
pub fn tr2 ( & self ) -> TR2_R { TR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Falling trigger event configuration of line 3" ]
# [ inline ( always ) ]
pub fn tr3 ( & self ) -> TR3_R { TR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Falling trigger event configuration of line 4" ]
# [ inline ( always ) ]
pub fn tr4 ( & self ) -> TR4_R { TR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Falling trigger event configuration of line 5" ]
# [ inline ( always ) ]
pub fn tr5 ( & self ) -> TR5_R { TR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Falling trigger event configuration of line 6" ]
# [ inline ( always ) ]
pub fn tr6 ( & self ) -> TR6_R { TR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Falling trigger event configuration of line 7" ]
# [ inline ( always ) ]
pub fn tr7 ( & self ) -> TR7_R { TR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Falling trigger event configuration of line 8" ]
# [ inline ( always ) ]
pub fn tr8 ( & self ) -> TR8_R { TR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Falling trigger event configuration of line 9" ]
# [ inline ( always ) ]
pub fn tr9 ( & self ) -> TR9_R { TR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Falling trigger event configuration of line 10" ]
# [ inline ( always ) ]
pub fn tr10 ( & self ) -> TR10_R { TR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Falling trigger event configuration of line 11" ]
# [ inline ( always ) ]
pub fn tr11 ( & self ) -> TR11_R { TR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Falling trigger event configuration of line 12" ]
# [ inline ( always ) ]
pub fn tr12 ( & self ) -> TR12_R { TR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Falling trigger event configuration of line 13" ]
# [ inline ( always ) ]
pub fn tr13 ( & self ) -> TR13_R { TR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Falling trigger event configuration of line 14" ]
# [ inline ( always ) ]
pub fn tr14 ( & self ) -> TR14_R { TR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Falling trigger event configuration of line 15" ]
# [ inline ( always ) ]
pub fn tr15 ( & self ) -> TR15_R { TR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Falling trigger event configuration of line 16" ]
# [ inline ( always ) ]
pub fn tr16 ( & self ) -> TR16_R { TR16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Falling trigger event configuration of line 17" ]
# [ inline ( always ) ]
pub fn tr17 ( & self ) -> TR17_R { TR17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Falling trigger event configuration of line 19" ]
# [ inline ( always ) ]
pub fn tr19 ( & self ) -> TR19_R { TR19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Falling trigger event configuration of line 0" ]
# [ inline ( always ) ]
pub fn tr0 ( & mut self ) -> TR0_W { TR0_W { w : self } } # [ doc = "Bit 1 - Falling trigger event configuration of line 1" ]
# [ inline ( always ) ]
pub fn tr1 ( & mut self ) -> TR1_W { TR1_W { w : self } } # [ doc = "Bit 2 - Falling trigger event configuration of line 2" ]
# [ inline ( always ) ]
pub fn tr2 ( & mut self ) -> TR2_W { TR2_W { w : self } } # [ doc = "Bit 3 - Falling trigger event configuration of line 3" ]
# [ inline ( always ) ]
pub fn tr3 ( & mut self ) -> TR3_W { TR3_W { w : self } } # [ doc = "Bit 4 - Falling trigger event configuration of line 4" ]
# [ inline ( always ) ]
pub fn tr4 ( & mut self ) -> TR4_W { TR4_W { w : self } } # [ doc = "Bit 5 - Falling trigger event configuration of line 5" ]
# [ inline ( always ) ]
pub fn tr5 ( & mut self ) -> TR5_W { TR5_W { w : self } } # [ doc = "Bit 6 - Falling trigger event configuration of line 6" ]
# [ inline ( always ) ]
pub fn tr6 ( & mut self ) -> TR6_W { TR6_W { w : self } } # [ doc = "Bit 7 - Falling trigger event configuration of line 7" ]
# [ inline ( always ) ]
pub fn tr7 ( & mut self ) -> TR7_W { TR7_W { w : self } } # [ doc = "Bit 8 - Falling trigger event configuration of line 8" ]
# [ inline ( always ) ]
pub fn tr8 ( & mut self ) -> TR8_W { TR8_W { w : self } } # [ doc = "Bit 9 - Falling trigger event configuration of line 9" ]
# [ inline ( always ) ]
pub fn tr9 ( & mut self ) -> TR9_W { TR9_W { w : self } } # [ doc = "Bit 10 - Falling trigger event configuration of line 10" ]
# [ inline ( always ) ]
pub fn tr10 ( & mut self ) -> TR10_W { TR10_W { w : self } } # [ doc = "Bit 11 - Falling trigger event configuration of line 11" ]
# [ inline ( always ) ]
pub fn tr11 ( & mut self ) -> TR11_W { TR11_W { w : self } } # [ doc = "Bit 12 - Falling trigger event configuration of line 12" ]
# [ inline ( always ) ]
pub fn tr12 ( & mut self ) -> TR12_W { TR12_W { w : self } } # [ doc = "Bit 13 - Falling trigger event configuration of line 13" ]
# [ inline ( always ) ]
pub fn tr13 ( & mut self ) -> TR13_W { TR13_W { w : self } } # [ doc = "Bit 14 - Falling trigger event configuration of line 14" ]
# [ inline ( always ) ]
pub fn tr14 ( & mut self ) -> TR14_W { TR14_W { w : self } } # [ doc = "Bit 15 - Falling trigger event configuration of line 15" ]
# [ inline ( always ) ]
pub fn tr15 ( & mut self ) -> TR15_W { TR15_W { w : self } } # [ doc = "Bit 16 - Falling trigger event configuration of line 16" ]
# [ inline ( always ) ]
pub fn tr16 ( & mut self ) -> TR16_W { TR16_W { w : self } } # [ doc = "Bit 17 - Falling trigger event configuration of line 17" ]
# [ inline ( always ) ]
pub fn tr17 ( & mut self ) -> TR17_W { TR17_W { w : self } } # [ doc = "Bit 19 - Falling trigger event configuration of line 19" ]
# [ inline ( always ) ]
pub fn tr19 ( & mut self ) -> TR19_W { TR19_W { w : self } } } } # [ doc = "Software interrupt event register (EXTI_SWIER)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swier](swier) module" ]
pub type SWIER = crate :: Reg < u32 , _SWIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SWIER ; # [ doc = "`read()` method returns [swier::R](swier::R) reader structure" ]
impl crate :: Readable for SWIER { } # [ doc = "`write(|w| ..)` method takes [swier::W](swier::W) writer structure" ]
impl crate :: Writable for SWIER { } # [ doc = "Software interrupt event register (EXTI_SWIER)" ]
pub mod swier { # [ doc = "Reader of register SWIER" ]
pub type R = crate :: R < u32 , super :: SWIER > ; # [ doc = "Writer for register SWIER" ]
pub type W = crate :: W < u32 , super :: SWIER > ; # [ doc = "Register SWIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SWIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Software Interrupt on line 0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SWIER0_A { # [ doc = "1: Generates an interrupt request" ]
PEND = 1 } impl From < SWIER0_A > for bool { # [ inline ( always ) ]
fn from ( variant : SWIER0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SWIER0`" ]
pub type SWIER0_R = crate :: R < bool , SWIER0_A > ; impl SWIER0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , SWIER0_A > { use crate :: Variant :: * ; match self . bits { true => Val ( SWIER0_A :: PEND ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PEND`" ]
# [ inline ( always ) ]
pub fn is_pend ( & self ) -> bool { * self == SWIER0_A :: PEND } } # [ doc = "Write proxy for field `SWIER0`" ]
pub struct SWIER0_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Software Interrupt on line 1" ]
pub type SWIER1_A = SWIER0_A ; # [ doc = "Reader of field `SWIER1`" ]
pub type SWIER1_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER1`" ]
pub struct SWIER1_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Software Interrupt on line 2" ]
pub type SWIER2_A = SWIER0_A ; # [ doc = "Reader of field `SWIER2`" ]
pub type SWIER2_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER2`" ]
pub struct SWIER2_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Software Interrupt on line 3" ]
pub type SWIER3_A = SWIER0_A ; # [ doc = "Reader of field `SWIER3`" ]
pub type SWIER3_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER3`" ]
pub struct SWIER3_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Software Interrupt on line 4" ]
pub type SWIER4_A = SWIER0_A ; # [ doc = "Reader of field `SWIER4`" ]
pub type SWIER4_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER4`" ]
pub struct SWIER4_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Software Interrupt on line 5" ]
pub type SWIER5_A = SWIER0_A ; # [ doc = "Reader of field `SWIER5`" ]
pub type SWIER5_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER5`" ]
pub struct SWIER5_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Software Interrupt on line 6" ]
pub type SWIER6_A = SWIER0_A ; # [ doc = "Reader of field `SWIER6`" ]
pub type SWIER6_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER6`" ]
pub struct SWIER6_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Software Interrupt on line 7" ]
pub type SWIER7_A = SWIER0_A ; # [ doc = "Reader of field `SWIER7`" ]
pub type SWIER7_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER7`" ]
pub struct SWIER7_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Software Interrupt on line 8" ]
pub type SWIER8_A = SWIER0_A ; # [ doc = "Reader of field `SWIER8`" ]
pub type SWIER8_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER8`" ]
pub struct SWIER8_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Software Interrupt on line 9" ]
pub type SWIER9_A = SWIER0_A ; # [ doc = "Reader of field `SWIER9`" ]
pub type SWIER9_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER9`" ]
pub struct SWIER9_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Software Interrupt on line 10" ]
pub type SWIER10_A = SWIER0_A ; # [ doc = "Reader of field `SWIER10`" ]
pub type SWIER10_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER10`" ]
pub struct SWIER10_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Software Interrupt on line 11" ]
pub type SWIER11_A = SWIER0_A ; # [ doc = "Reader of field `SWIER11`" ]
pub type SWIER11_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER11`" ]
pub struct SWIER11_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Software Interrupt on line 12" ]
pub type SWIER12_A = SWIER0_A ; # [ doc = "Reader of field `SWIER12`" ]
pub type SWIER12_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER12`" ]
pub struct SWIER12_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Software Interrupt on line 13" ]
pub type SWIER13_A = SWIER0_A ; # [ doc = "Reader of field `SWIER13`" ]
pub type SWIER13_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER13`" ]
pub struct SWIER13_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Software Interrupt on line 14" ]
pub type SWIER14_A = SWIER0_A ; # [ doc = "Reader of field `SWIER14`" ]
pub type SWIER14_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER14`" ]
pub struct SWIER14_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Software Interrupt on line 15" ]
pub type SWIER15_A = SWIER0_A ; # [ doc = "Reader of field `SWIER15`" ]
pub type SWIER15_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER15`" ]
pub struct SWIER15_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Software Interrupt on line 16" ]
pub type SWIER16_A = SWIER0_A ; # [ doc = "Reader of field `SWIER16`" ]
pub type SWIER16_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER16`" ]
pub struct SWIER16_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Software Interrupt on line 17" ]
pub type SWIER17_A = SWIER0_A ; # [ doc = "Reader of field `SWIER17`" ]
pub type SWIER17_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER17`" ]
pub struct SWIER17_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Software Interrupt on line 19" ]
pub type SWIER19_A = SWIER0_A ; # [ doc = "Reader of field `SWIER19`" ]
pub type SWIER19_R = crate :: R < bool , SWIER0_A > ; # [ doc = "Write proxy for field `SWIER19`" ]
pub struct SWIER19_W < 'a > { w : & 'a mut W , } impl < 'a > SWIER19_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SWIER19_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Generates an interrupt request" ]
# [ inline ( always ) ]
pub fn pend ( self ) -> & 'a mut W { self . variant ( SWIER0_A :: PEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } impl R { # [ doc = "Bit 0 - Software Interrupt on line 0" ]
# [ inline ( always ) ]
pub fn swier0 ( & self ) -> SWIER0_R { SWIER0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Software Interrupt on line 1" ]
# [ inline ( always ) ]
pub fn swier1 ( & self ) -> SWIER1_R { SWIER1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Software Interrupt on line 2" ]
# [ inline ( always ) ]
pub fn swier2 ( & self ) -> SWIER2_R { SWIER2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Software Interrupt on line 3" ]
# [ inline ( always ) ]
pub fn swier3 ( & self ) -> SWIER3_R { SWIER3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Software Interrupt on line 4" ]
# [ inline ( always ) ]
pub fn swier4 ( & self ) -> SWIER4_R { SWIER4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Software Interrupt on line 5" ]
# [ inline ( always ) ]
pub fn swier5 ( & self ) -> SWIER5_R { SWIER5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Software Interrupt on line 6" ]
# [ inline ( always ) ]
pub fn swier6 ( & self ) -> SWIER6_R { SWIER6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Software Interrupt on line 7" ]
# [ inline ( always ) ]
pub fn swier7 ( & self ) -> SWIER7_R { SWIER7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Software Interrupt on line 8" ]
# [ inline ( always ) ]
pub fn swier8 ( & self ) -> SWIER8_R { SWIER8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Software Interrupt on line 9" ]
# [ inline ( always ) ]
pub fn swier9 ( & self ) -> SWIER9_R { SWIER9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Software Interrupt on line 10" ]
# [ inline ( always ) ]
pub fn swier10 ( & self ) -> SWIER10_R { SWIER10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Software Interrupt on line 11" ]
# [ inline ( always ) ]
pub fn swier11 ( & self ) -> SWIER11_R { SWIER11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Software Interrupt on line 12" ]
# [ inline ( always ) ]
pub fn swier12 ( & self ) -> SWIER12_R { SWIER12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Software Interrupt on line 13" ]
# [ inline ( always ) ]
pub fn swier13 ( & self ) -> SWIER13_R { SWIER13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Software Interrupt on line 14" ]
# [ inline ( always ) ]
pub fn swier14 ( & self ) -> SWIER14_R { SWIER14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Software Interrupt on line 15" ]
# [ inline ( always ) ]
pub fn swier15 ( & self ) -> SWIER15_R { SWIER15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Software Interrupt on line 16" ]
# [ inline ( always ) ]
pub fn swier16 ( & self ) -> SWIER16_R { SWIER16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Software Interrupt on line 17" ]
# [ inline ( always ) ]
pub fn swier17 ( & self ) -> SWIER17_R { SWIER17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Software Interrupt on line 19" ]
# [ inline ( always ) ]
pub fn swier19 ( & self ) -> SWIER19_R { SWIER19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Software Interrupt on line 0" ]
# [ inline ( always ) ]
pub fn swier0 ( & mut self ) -> SWIER0_W { SWIER0_W { w : self } } # [ doc = "Bit 1 - Software Interrupt on line 1" ]
# [ inline ( always ) ]
pub fn swier1 ( & mut self ) -> SWIER1_W { SWIER1_W { w : self } } # [ doc = "Bit 2 - Software Interrupt on line 2" ]
# [ inline ( always ) ]
pub fn swier2 ( & mut self ) -> SWIER2_W { SWIER2_W { w : self } } # [ doc = "Bit 3 - Software Interrupt on line 3" ]
# [ inline ( always ) ]
pub fn swier3 ( & mut self ) -> SWIER3_W { SWIER3_W { w : self } } # [ doc = "Bit 4 - Software Interrupt on line 4" ]
# [ inline ( always ) ]
pub fn swier4 ( & mut self ) -> SWIER4_W { SWIER4_W { w : self } } # [ doc = "Bit 5 - Software Interrupt on line 5" ]
# [ inline ( always ) ]
pub fn swier5 ( & mut self ) -> SWIER5_W { SWIER5_W { w : self } } # [ doc = "Bit 6 - Software Interrupt on line 6" ]
# [ inline ( always ) ]
pub fn swier6 ( & mut self ) -> SWIER6_W { SWIER6_W { w : self } } # [ doc = "Bit 7 - Software Interrupt on line 7" ]
# [ inline ( always ) ]
pub fn swier7 ( & mut self ) -> SWIER7_W { SWIER7_W { w : self } } # [ doc = "Bit 8 - Software Interrupt on line 8" ]
# [ inline ( always ) ]
pub fn swier8 ( & mut self ) -> SWIER8_W { SWIER8_W { w : self } } # [ doc = "Bit 9 - Software Interrupt on line 9" ]
# [ inline ( always ) ]
pub fn swier9 ( & mut self ) -> SWIER9_W { SWIER9_W { w : self } } # [ doc = "Bit 10 - Software Interrupt on line 10" ]
# [ inline ( always ) ]
pub fn swier10 ( & mut self ) -> SWIER10_W { SWIER10_W { w : self } } # [ doc = "Bit 11 - Software Interrupt on line 11" ]
# [ inline ( always ) ]
pub fn swier11 ( & mut self ) -> SWIER11_W { SWIER11_W { w : self } } # [ doc = "Bit 12 - Software Interrupt on line 12" ]
# [ inline ( always ) ]
pub fn swier12 ( & mut self ) -> SWIER12_W { SWIER12_W { w : self } } # [ doc = "Bit 13 - Software Interrupt on line 13" ]
# [ inline ( always ) ]
pub fn swier13 ( & mut self ) -> SWIER13_W { SWIER13_W { w : self } } # [ doc = "Bit 14 - Software Interrupt on line 14" ]
# [ inline ( always ) ]
pub fn swier14 ( & mut self ) -> SWIER14_W { SWIER14_W { w : self } } # [ doc = "Bit 15 - Software Interrupt on line 15" ]
# [ inline ( always ) ]
pub fn swier15 ( & mut self ) -> SWIER15_W { SWIER15_W { w : self } } # [ doc = "Bit 16 - Software Interrupt on line 16" ]
# [ inline ( always ) ]
pub fn swier16 ( & mut self ) -> SWIER16_W { SWIER16_W { w : self } } # [ doc = "Bit 17 - Software Interrupt on line 17" ]
# [ inline ( always ) ]
pub fn swier17 ( & mut self ) -> SWIER17_W { SWIER17_W { w : self } } # [ doc = "Bit 19 - Software Interrupt on line 19" ]
# [ inline ( always ) ]
pub fn swier19 ( & mut self ) -> SWIER19_W { SWIER19_W { w : self } } } } # [ doc = "Pending register (EXTI_PR)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pr](pr) module" ]
pub type PR = crate :: Reg < u32 , _PR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PR ; # [ doc = "`read()` method returns [pr::R](pr::R) reader structure" ]
impl crate :: Readable for PR { } # [ doc = "`write(|w| ..)` method takes [pr::W](pr::W) writer structure" ]
impl crate :: Writable for PR { } # [ doc = "Pending register (EXTI_PR)" ]
pub mod pr { # [ doc = "Reader of register PR" ]
pub type R = crate :: R < u32 , super :: PR > ; # [ doc = "Writer for register PR" ]
pub type W = crate :: W < u32 , super :: PR > ; # [ doc = "Register PR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Pending bit 0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PR0_A { # [ doc = "0: No trigger request occurred" ]
NOTPENDING = 0 , # [ doc = "1: Selected trigger request occurred" ]
PENDING = 1 } impl From < PR0_A > for bool { # [ inline ( always ) ]
fn from ( variant : PR0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PR0`" ]
pub type PR0_R = crate :: R < bool , PR0_A > ; impl PR0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PR0_A { match self . bits { false => PR0_A :: NOTPENDING , true => PR0_A :: PENDING } } # [ doc = "Checks if the value of the field is `NOTPENDING`" ]
# [ inline ( always ) ]
pub fn is_not_pending ( & self ) -> bool { * self == PR0_A :: NOTPENDING } # [ doc = "Checks if the value of the field is `PENDING`" ]
# [ inline ( always ) ]
pub fn is_pending ( & self ) -> bool { * self == PR0_A :: PENDING } } # [ doc = "Pending bit 0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PR0_AW { # [ doc = "1: Clears pending bit" ]
CLEAR = 1 } impl From < PR0_AW > for bool { # [ inline ( always ) ]
fn from ( variant : PR0_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `PR0`" ]
pub struct PR0_W < 'a > { w : & 'a mut W , } impl < 'a > PR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Pending bit 1" ]
pub type PR1_A = PR0_A ; # [ doc = "Reader of field `PR1`" ]
pub type PR1_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 1" ]
pub type PR1_AW = PR0_AW ; # [ doc = "Write proxy for field `PR1`" ]
pub struct PR1_W < 'a > { w : & 'a mut W , } impl < 'a > PR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Pending bit 2" ]
pub type PR2_A = PR0_A ; # [ doc = "Reader of field `PR2`" ]
pub type PR2_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 2" ]
pub type PR2_AW = PR0_AW ; # [ doc = "Write proxy for field `PR2`" ]
pub struct PR2_W < 'a > { w : & 'a mut W , } impl < 'a > PR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Pending bit 3" ]
pub type PR3_A = PR0_A ; # [ doc = "Reader of field `PR3`" ]
pub type PR3_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 3" ]
pub type PR3_AW = PR0_AW ; # [ doc = "Write proxy for field `PR3`" ]
pub struct PR3_W < 'a > { w : & 'a mut W , } impl < 'a > PR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Pending bit 4" ]
pub type PR4_A = PR0_A ; # [ doc = "Reader of field `PR4`" ]
pub type PR4_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 4" ]
pub type PR4_AW = PR0_AW ; # [ doc = "Write proxy for field `PR4`" ]
pub struct PR4_W < 'a > { w : & 'a mut W , } impl < 'a > PR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Pending bit 5" ]
pub type PR5_A = PR0_A ; # [ doc = "Reader of field `PR5`" ]
pub type PR5_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 5" ]
pub type PR5_AW = PR0_AW ; # [ doc = "Write proxy for field `PR5`" ]
pub struct PR5_W < 'a > { w : & 'a mut W , } impl < 'a > PR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Pending bit 6" ]
pub type PR6_A = PR0_A ; # [ doc = "Reader of field `PR6`" ]
pub type PR6_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 6" ]
pub type PR6_AW = PR0_AW ; # [ doc = "Write proxy for field `PR6`" ]
pub struct PR6_W < 'a > { w : & 'a mut W , } impl < 'a > PR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Pending bit 7" ]
pub type PR7_A = PR0_A ; # [ doc = "Reader of field `PR7`" ]
pub type PR7_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 7" ]
pub type PR7_AW = PR0_AW ; # [ doc = "Write proxy for field `PR7`" ]
pub struct PR7_W < 'a > { w : & 'a mut W , } impl < 'a > PR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Pending bit 8" ]
pub type PR8_A = PR0_A ; # [ doc = "Reader of field `PR8`" ]
pub type PR8_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 8" ]
pub type PR8_AW = PR0_AW ; # [ doc = "Write proxy for field `PR8`" ]
pub struct PR8_W < 'a > { w : & 'a mut W , } impl < 'a > PR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Pending bit 9" ]
pub type PR9_A = PR0_A ; # [ doc = "Reader of field `PR9`" ]
pub type PR9_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 9" ]
pub type PR9_AW = PR0_AW ; # [ doc = "Write proxy for field `PR9`" ]
pub struct PR9_W < 'a > { w : & 'a mut W , } impl < 'a > PR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Pending bit 10" ]
pub type PR10_A = PR0_A ; # [ doc = "Reader of field `PR10`" ]
pub type PR10_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 10" ]
pub type PR10_AW = PR0_AW ; # [ doc = "Write proxy for field `PR10`" ]
pub struct PR10_W < 'a > { w : & 'a mut W , } impl < 'a > PR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Pending bit 11" ]
pub type PR11_A = PR0_A ; # [ doc = "Reader of field `PR11`" ]
pub type PR11_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 11" ]
pub type PR11_AW = PR0_AW ; # [ doc = "Write proxy for field `PR11`" ]
pub struct PR11_W < 'a > { w : & 'a mut W , } impl < 'a > PR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Pending bit 12" ]
pub type PR12_A = PR0_A ; # [ doc = "Reader of field `PR12`" ]
pub type PR12_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 12" ]
pub type PR12_AW = PR0_AW ; # [ doc = "Write proxy for field `PR12`" ]
pub struct PR12_W < 'a > { w : & 'a mut W , } impl < 'a > PR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Pending bit 13" ]
pub type PR13_A = PR0_A ; # [ doc = "Reader of field `PR13`" ]
pub type PR13_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 13" ]
pub type PR13_AW = PR0_AW ; # [ doc = "Write proxy for field `PR13`" ]
pub struct PR13_W < 'a > { w : & 'a mut W , } impl < 'a > PR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Pending bit 14" ]
pub type PR14_A = PR0_A ; # [ doc = "Reader of field `PR14`" ]
pub type PR14_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 14" ]
pub type PR14_AW = PR0_AW ; # [ doc = "Write proxy for field `PR14`" ]
pub struct PR14_W < 'a > { w : & 'a mut W , } impl < 'a > PR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Pending bit 15" ]
pub type PR15_A = PR0_A ; # [ doc = "Reader of field `PR15`" ]
pub type PR15_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 15" ]
pub type PR15_AW = PR0_AW ; # [ doc = "Write proxy for field `PR15`" ]
pub struct PR15_W < 'a > { w : & 'a mut W , } impl < 'a > PR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Pending bit 16" ]
pub type PR16_A = PR0_A ; # [ doc = "Reader of field `PR16`" ]
pub type PR16_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 16" ]
pub type PR16_AW = PR0_AW ; # [ doc = "Write proxy for field `PR16`" ]
pub struct PR16_W < 'a > { w : & 'a mut W , } impl < 'a > PR16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR16_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Pending bit 17" ]
pub type PR17_A = PR0_A ; # [ doc = "Reader of field `PR17`" ]
pub type PR17_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 17" ]
pub type PR17_AW = PR0_AW ; # [ doc = "Write proxy for field `PR17`" ]
pub struct PR17_W < 'a > { w : & 'a mut W , } impl < 'a > PR17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR17_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Pending bit 19" ]
pub type PR19_A = PR0_A ; # [ doc = "Reader of field `PR19`" ]
pub type PR19_R = crate :: R < bool , PR0_A > ; # [ doc = "Pending bit 19" ]
pub type PR19_AW = PR0_AW ; # [ doc = "Write proxy for field `PR19`" ]
pub struct PR19_W < 'a > { w : & 'a mut W , } impl < 'a > PR19_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR19_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears pending bit" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PR0_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } impl R { # [ doc = "Bit 0 - Pending bit 0" ]
# [ inline ( always ) ]
pub fn pr0 ( & self ) -> PR0_R { PR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Pending bit 1" ]
# [ inline ( always ) ]
pub fn pr1 ( & self ) -> PR1_R { PR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Pending bit 2" ]
# [ inline ( always ) ]
pub fn pr2 ( & self ) -> PR2_R { PR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Pending bit 3" ]
# [ inline ( always ) ]
pub fn pr3 ( & self ) -> PR3_R { PR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Pending bit 4" ]
# [ inline ( always ) ]
pub fn pr4 ( & self ) -> PR4_R { PR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Pending bit 5" ]
# [ inline ( always ) ]
pub fn pr5 ( & self ) -> PR5_R { PR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Pending bit 6" ]
# [ inline ( always ) ]
pub fn pr6 ( & self ) -> PR6_R { PR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Pending bit 7" ]
# [ inline ( always ) ]
pub fn pr7 ( & self ) -> PR7_R { PR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Pending bit 8" ]
# [ inline ( always ) ]
pub fn pr8 ( & self ) -> PR8_R { PR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Pending bit 9" ]
# [ inline ( always ) ]
pub fn pr9 ( & self ) -> PR9_R { PR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Pending bit 10" ]
# [ inline ( always ) ]
pub fn pr10 ( & self ) -> PR10_R { PR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Pending bit 11" ]
# [ inline ( always ) ]
pub fn pr11 ( & self ) -> PR11_R { PR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Pending bit 12" ]
# [ inline ( always ) ]
pub fn pr12 ( & self ) -> PR12_R { PR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Pending bit 13" ]
# [ inline ( always ) ]
pub fn pr13 ( & self ) -> PR13_R { PR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Pending bit 14" ]
# [ inline ( always ) ]
pub fn pr14 ( & self ) -> PR14_R { PR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Pending bit 15" ]
# [ inline ( always ) ]
pub fn pr15 ( & self ) -> PR15_R { PR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Pending bit 16" ]
# [ inline ( always ) ]
pub fn pr16 ( & self ) -> PR16_R { PR16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Pending bit 17" ]
# [ inline ( always ) ]
pub fn pr17 ( & self ) -> PR17_R { PR17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Pending bit 19" ]
# [ inline ( always ) ]
pub fn pr19 ( & self ) -> PR19_R { PR19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Pending bit 0" ]
# [ inline ( always ) ]
pub fn pr0 ( & mut self ) -> PR0_W { PR0_W { w : self } } # [ doc = "Bit 1 - Pending bit 1" ]
# [ inline ( always ) ]
pub fn pr1 ( & mut self ) -> PR1_W { PR1_W { w : self } } # [ doc = "Bit 2 - Pending bit 2" ]
# [ inline ( always ) ]
pub fn pr2 ( & mut self ) -> PR2_W { PR2_W { w : self } } # [ doc = "Bit 3 - Pending bit 3" ]
# [ inline ( always ) ]
pub fn pr3 ( & mut self ) -> PR3_W { PR3_W { w : self } } # [ doc = "Bit 4 - Pending bit 4" ]
# [ inline ( always ) ]
pub fn pr4 ( & mut self ) -> PR4_W { PR4_W { w : self } } # [ doc = "Bit 5 - Pending bit 5" ]
# [ inline ( always ) ]
pub fn pr5 ( & mut self ) -> PR5_W { PR5_W { w : self } } # [ doc = "Bit 6 - Pending bit 6" ]
# [ inline ( always ) ]
pub fn pr6 ( & mut self ) -> PR6_W { PR6_W { w : self } } # [ doc = "Bit 7 - Pending bit 7" ]
# [ inline ( always ) ]
pub fn pr7 ( & mut self ) -> PR7_W { PR7_W { w : self } } # [ doc = "Bit 8 - Pending bit 8" ]
# [ inline ( always ) ]
pub fn pr8 ( & mut self ) -> PR8_W { PR8_W { w : self } } # [ doc = "Bit 9 - Pending bit 9" ]
# [ inline ( always ) ]
pub fn pr9 ( & mut self ) -> PR9_W { PR9_W { w : self } } # [ doc = "Bit 10 - Pending bit 10" ]
# [ inline ( always ) ]
pub fn pr10 ( & mut self ) -> PR10_W { PR10_W { w : self } } # [ doc = "Bit 11 - Pending bit 11" ]
# [ inline ( always ) ]
pub fn pr11 ( & mut self ) -> PR11_W { PR11_W { w : self } } # [ doc = "Bit 12 - Pending bit 12" ]
# [ inline ( always ) ]
pub fn pr12 ( & mut self ) -> PR12_W { PR12_W { w : self } } # [ doc = "Bit 13 - Pending bit 13" ]
# [ inline ( always ) ]
pub fn pr13 ( & mut self ) -> PR13_W { PR13_W { w : self } } # [ doc = "Bit 14 - Pending bit 14" ]
# [ inline ( always ) ]
pub fn pr14 ( & mut self ) -> PR14_W { PR14_W { w : self } } # [ doc = "Bit 15 - Pending bit 15" ]
# [ inline ( always ) ]
pub fn pr15 ( & mut self ) -> PR15_W { PR15_W { w : self } } # [ doc = "Bit 16 - Pending bit 16" ]
# [ inline ( always ) ]
pub fn pr16 ( & mut self ) -> PR16_W { PR16_W { w : self } } # [ doc = "Bit 17 - Pending bit 17" ]
# [ inline ( always ) ]
pub fn pr17 ( & mut self ) -> PR17_W { PR17_W { w : self } } # [ doc = "Bit 19 - Pending bit 19" ]
# [ inline ( always ) ]
pub fn pr19 ( & mut self ) -> PR19_W { PR19_W { w : self } } } } } # [ doc = "Power control" ]
pub struct PWR { _marker : PhantomData < * const ( ) > } unsafe impl Send for PWR { } impl PWR { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const pwr :: RegisterBlock { 0x4000_7000 as * const _ } } impl Deref for PWR { type Target = pwr :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * PWR :: ptr ( ) } } } # [ doc = "Power control" ]
pub mod pwr { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - power control register" ]
pub cr : CR , # [ doc = "0x04 - power control/status register" ]
pub csr : CSR , } # [ doc = "power control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "power control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `LPDS`" ]
pub type LPDS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `LPDS`" ]
pub struct LPDS_W < 'a > { w : & 'a mut W , } impl < 'a > LPDS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Power down deepsleep\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PDDS_A { # [ doc = "0: Enter Stop mode when the CPU enters deepsleep" ]
STOP_MODE = 0 , # [ doc = "1: Enter Standby mode when the CPU enters deepsleep" ]
STANDBY_MODE = 1 } impl From < PDDS_A > for bool { # [ inline ( always ) ]
fn from ( variant : PDDS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PDDS`" ]
pub type PDDS_R = crate :: R < bool , PDDS_A > ; impl PDDS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PDDS_A { match self . bits { false => PDDS_A :: STOP_MODE , true => PDDS_A :: STANDBY_MODE } } # [ doc = "Checks if the value of the field is `STOP_MODE`" ]
# [ inline ( always ) ]
pub fn is_stop_mode ( & self ) -> bool { * self == PDDS_A :: STOP_MODE } # [ doc = "Checks if the value of the field is `STANDBY_MODE`" ]
# [ inline ( always ) ]
pub fn is_standby_mode ( & self ) -> bool { * self == PDDS_A :: STANDBY_MODE } } # [ doc = "Write proxy for field `PDDS`" ]
pub struct PDDS_W < 'a > { w : & 'a mut W , } impl < 'a > PDDS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PDDS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Enter Stop mode when the CPU enters deepsleep" ]
# [ inline ( always ) ]
pub fn stop_mode ( self ) -> & 'a mut W { self . variant ( PDDS_A :: STOP_MODE ) } # [ doc = "Enter Standby mode when the CPU enters deepsleep" ]
# [ inline ( always ) ]
pub fn standby_mode ( self ) -> & 'a mut W { self . variant ( PDDS_A :: STANDBY_MODE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CWUF`" ]
pub type CWUF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CWUF`" ]
pub struct CWUF_W < 'a > { w : & 'a mut W , } impl < 'a > CWUF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CSBF`" ]
pub type CSBF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CSBF`" ]
pub struct CSBF_W < 'a > { w : & 'a mut W , } impl < 'a > CSBF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `PVDE`" ]
pub type PVDE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PVDE`" ]
pub struct PVDE_W < 'a > { w : & 'a mut W , } impl < 'a > PVDE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `PLS`" ]
pub type PLS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PLS`" ]
pub struct PLS_W < 'a > { w : & 'a mut W , } impl < 'a > PLS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 5 ) ) | ( ( ( value as u32 ) & 0x07 ) << 5 ) ; self . w } } # [ doc = "Reader of field `DBP`" ]
pub type DBP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBP`" ]
pub struct DBP_W < 'a > { w : & 'a mut W , } impl < 'a > DBP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `ENSD1`" ]
pub type ENSD1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ENSD1`" ]
pub struct ENSD1_W < 'a > { w : & 'a mut W , } impl < 'a > ENSD1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `ENSD2`" ]
pub type ENSD2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ENSD2`" ]
pub struct ENSD2_W < 'a > { w : & 'a mut W , } impl < 'a > ENSD2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `ENSD3`" ]
pub type ENSD3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ENSD3`" ]
pub struct ENSD3_W < 'a > { w : & 'a mut W , } impl < 'a > ENSD3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } impl R { # [ doc = "Bit 0 - Low-power deep sleep" ]
# [ inline ( always ) ]
pub fn lpds ( & self ) -> LPDS_R { LPDS_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Power down deepsleep" ]
# [ inline ( always ) ]
pub fn pdds ( & self ) -> PDDS_R { PDDS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Clear wakeup flag" ]
# [ inline ( always ) ]
pub fn cwuf ( & self ) -> CWUF_R { CWUF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Clear standby flag" ]
# [ inline ( always ) ]
pub fn csbf ( & self ) -> CSBF_R { CSBF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Power voltage detector enable" ]
# [ inline ( always ) ]
pub fn pvde ( & self ) -> PVDE_R { PVDE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bits 5:7 - PVD level selection" ]
# [ inline ( always ) ]
pub fn pls ( & self ) -> PLS_R { PLS_R :: new ( ( ( self . bits >> 5 ) & 0x07 ) as u8 ) } # [ doc = "Bit 8 - Disable backup domain write protection" ]
# [ inline ( always ) ]
pub fn dbp ( & self ) -> DBP_R { DBP_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - ENable SD1 ADC" ]
# [ inline ( always ) ]
pub fn ensd1 ( & self ) -> ENSD1_R { ENSD1_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - ENable SD2 ADC" ]
# [ inline ( always ) ]
pub fn ensd2 ( & self ) -> ENSD2_R { ENSD2_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - ENable SD3 ADC" ]
# [ inline ( always ) ]
pub fn ensd3 ( & self ) -> ENSD3_R { ENSD3_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Low-power deep sleep" ]
# [ inline ( always ) ]
pub fn lpds ( & mut self ) -> LPDS_W { LPDS_W { w : self } } # [ doc = "Bit 1 - Power down deepsleep" ]
# [ inline ( always ) ]
pub fn pdds ( & mut self ) -> PDDS_W { PDDS_W { w : self } } # [ doc = "Bit 2 - Clear wakeup flag" ]
# [ inline ( always ) ]
pub fn cwuf ( & mut self ) -> CWUF_W { CWUF_W { w : self } } # [ doc = "Bit 3 - Clear standby flag" ]
# [ inline ( always ) ]
pub fn csbf ( & mut self ) -> CSBF_W { CSBF_W { w : self } } # [ doc = "Bit 4 - Power voltage detector enable" ]
# [ inline ( always ) ]
pub fn pvde ( & mut self ) -> PVDE_W { PVDE_W { w : self } } # [ doc = "Bits 5:7 - PVD level selection" ]
# [ inline ( always ) ]
pub fn pls ( & mut self ) -> PLS_W { PLS_W { w : self } } # [ doc = "Bit 8 - Disable backup domain write protection" ]
# [ inline ( always ) ]
pub fn dbp ( & mut self ) -> DBP_W { DBP_W { w : self } } # [ doc = "Bit 9 - ENable SD1 ADC" ]
# [ inline ( always ) ]
pub fn ensd1 ( & mut self ) -> ENSD1_W { ENSD1_W { w : self } } # [ doc = "Bit 10 - ENable SD2 ADC" ]
# [ inline ( always ) ]
pub fn ensd2 ( & mut self ) -> ENSD2_W { ENSD2_W { w : self } } # [ doc = "Bit 11 - ENable SD3 ADC" ]
# [ inline ( always ) ]
pub fn ensd3 ( & mut self ) -> ENSD3_W { ENSD3_W { w : self } } } } # [ doc = "power control/status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csr](csr) module" ]
pub type CSR = crate :: Reg < u32 , _CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CSR ; # [ doc = "`read()` method returns [csr::R](csr::R) reader structure" ]
impl crate :: Readable for CSR { } # [ doc = "`write(|w| ..)` method takes [csr::W](csr::W) writer structure" ]
impl crate :: Writable for CSR { } # [ doc = "power control/status register" ]
pub mod csr { # [ doc = "Reader of register CSR" ]
pub type R = crate :: R < u32 , super :: CSR > ; # [ doc = "Writer for register CSR" ]
pub type W = crate :: W < u32 , super :: CSR > ; # [ doc = "Register CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `WUF`" ]
pub type WUF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `SBF`" ]
pub type SBF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `PVDO`" ]
pub type PVDO_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `EWUP1`" ]
pub type EWUP1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EWUP1`" ]
pub struct EWUP1_W < 'a > { w : & 'a mut W , } impl < 'a > EWUP1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `EWUP2`" ]
pub type EWUP2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EWUP2`" ]
pub struct EWUP2_W < 'a > { w : & 'a mut W , } impl < 'a > EWUP2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `EWUP3`" ]
pub type EWUP3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EWUP3`" ]
pub struct EWUP3_W < 'a > { w : & 'a mut W , } impl < 'a > EWUP3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } impl R { # [ doc = "Bit 0 - Wakeup flag" ]
# [ inline ( always ) ]
pub fn wuf ( & self ) -> WUF_R { WUF_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Standby flag" ]
# [ inline ( always ) ]
pub fn sbf ( & self ) -> SBF_R { SBF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - PVD output" ]
# [ inline ( always ) ]
pub fn pvdo ( & self ) -> PVDO_R { PVDO_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Enable WKUP1 pin" ]
# [ inline ( always ) ]
pub fn ewup1 ( & self ) -> EWUP1_R { EWUP1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Enable WKUP2 pin" ]
# [ inline ( always ) ]
pub fn ewup2 ( & self ) -> EWUP2_R { EWUP2_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Enable WKUP3 pin" ]
# [ inline ( always ) ]
pub fn ewup3 ( & self ) -> EWUP3_R { EWUP3_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 8 - Enable WKUP1 pin" ]
# [ inline ( always ) ]
pub fn ewup1 ( & mut self ) -> EWUP1_W { EWUP1_W { w : self } } # [ doc = "Bit 9 - Enable WKUP2 pin" ]
# [ inline ( always ) ]
pub fn ewup2 ( & mut self ) -> EWUP2_W { EWUP2_W { w : self } } # [ doc = "Bit 10 - Enable WKUP3 pin" ]
# [ inline ( always ) ]
pub fn ewup3 ( & mut self ) -> EWUP3_W { EWUP3_W { w : self } } } } } # [ doc = "Controller area network" ]
pub struct CAN { _marker : PhantomData < * const ( ) > } unsafe impl Send for CAN { } impl CAN { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const can :: RegisterBlock { 0x4000_6400 as * const _ } } impl Deref for CAN { type Target = can :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * CAN :: ptr ( ) } } } # [ doc = "Controller area network" ]
pub mod can { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - master control register" ]
pub mcr : MCR , # [ doc = "0x04 - master status register" ]
pub msr : MSR , # [ doc = "0x08 - transmit status register" ]
pub tsr : TSR , # [ doc = "0x0c - receive FIFO 0 register" ]
pub rfr : [ RFR ; 2 ]
, # [ doc = "0x14 - interrupt enable register" ]
pub ier : IER , # [ doc = "0x18 - error status register" ]
pub esr : ESR , # [ doc = "0x1c - bit timing register" ]
pub btr : BTR , _reserved7 : [ u8 ; 352usize ]
, # [ doc = "0x180 - CAN Transmit cluster" ]
pub tx : [ TX ; 3 ]
, # [ doc = "0x1b0 - CAN Receive cluster" ]
pub rx : [ RX ; 2 ]
, _reserved9 : [ u8 ; 48usize ]
, # [ doc = "0x200 - filter master register" ]
pub fmr : FMR , # [ doc = "0x204 - filter mode register" ]
pub fm1r : FM1R , _reserved11 : [ u8 ; 4usize ]
, # [ doc = "0x20c - filter scale register" ]
pub fs1r : FS1R , _reserved12 : [ u8 ; 4usize ]
, # [ doc = "0x214 - filter FIFO assignment register" ]
pub ffa1r : FFA1R , _reserved13 : [ u8 ; 4usize ]
, # [ doc = "0x21c - CAN filter activation register" ]
pub fa1r : FA1R , _reserved14 : [ u8 ; 32usize ]
, # [ doc = "0x240 - CAN Filter Bank cluster" ]
pub fb : [ FB ; 28 ]
, } # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct TX { # [ doc = "0x00 - TX mailbox identifier register" ]
pub tir : self :: tx :: TIR , # [ doc = "0x04 - mailbox data length control and time stamp register" ]
pub tdtr : self :: tx :: TDTR , # [ doc = "0x08 - mailbox data low register" ]
pub tdlr : self :: tx :: TDLR , # [ doc = "0x0c - mailbox data high register" ]
pub tdhr : self :: tx :: TDHR , } # [ doc = r"Register block" ]
# [ doc = "CAN Transmit cluster" ]
pub mod tx { # [ doc = "TX mailbox identifier register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tir](tir) module" ]
pub type TIR = crate :: Reg < u32 , _TIR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TIR ; # [ doc = "`read()` method returns [tir::R](tir::R) reader structure" ]
impl crate :: Readable for TIR { } # [ doc = "`write(|w| ..)` method takes [tir::W](tir::W) writer structure" ]
impl crate :: Writable for TIR { } # [ doc = "TX mailbox identifier register" ]
pub mod tir { # [ doc = "Reader of register TIR" ]
pub type R = crate :: R < u32 , super :: TIR > ; # [ doc = "Writer for register TIR" ]
pub type W = crate :: W < u32 , super :: TIR > ; # [ doc = "Register TIR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TIR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `STID`" ]
pub type STID_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `STID`" ]
pub struct STID_W < 'a > { w : & 'a mut W , } impl < 'a > STID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07ff << 21 ) ) | ( ( ( value as u32 ) & 0x07ff ) << 21 ) ; self . w } } # [ doc = "Reader of field `EXID`" ]
pub type EXID_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `EXID`" ]
pub struct EXID_W < 'a > { w : & 'a mut W , } impl < 'a > EXID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0003_ffff << 3 ) ) | ( ( ( value as u32 ) & 0x0003_ffff ) << 3 ) ; self . w } } # [ doc = "IDE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IDE_A { # [ doc = "0: Standard identifier" ]
STANDARD = 0 , # [ doc = "1: Extended identifier" ]
EXTENDED = 1 } impl From < IDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : IDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IDE`" ]
pub type IDE_R = crate :: R < bool , IDE_A > ; impl IDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IDE_A { match self . bits { false => IDE_A :: STANDARD , true => IDE_A :: EXTENDED } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == IDE_A :: STANDARD } # [ doc = "Checks if the value of the field is `EXTENDED`" ]
# [ inline ( always ) ]
pub fn is_extended ( & self ) -> bool { * self == IDE_A :: EXTENDED } } # [ doc = "Write proxy for field `IDE`" ]
pub struct IDE_W < 'a > { w : & 'a mut W , } impl < 'a > IDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Standard identifier" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( IDE_A :: STANDARD ) } # [ doc = "Extended identifier" ]
# [ inline ( always ) ]
pub fn extended ( self ) -> & 'a mut W { self . variant ( IDE_A :: EXTENDED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "RTR\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RTR_A { # [ doc = "0: Data frame" ]
DATA = 0 , # [ doc = "1: Remote frame" ]
REMOTE = 1 } impl From < RTR_A > for bool { # [ inline ( always ) ]
fn from ( variant : RTR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RTR`" ]
pub type RTR_R = crate :: R < bool , RTR_A > ; impl RTR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RTR_A { match self . bits { false => RTR_A :: DATA , true => RTR_A :: REMOTE } } # [ doc = "Checks if the value of the field is `DATA`" ]
# [ inline ( always ) ]
pub fn is_data ( & self ) -> bool { * self == RTR_A :: DATA } # [ doc = "Checks if the value of the field is `REMOTE`" ]
# [ inline ( always ) ]
pub fn is_remote ( & self ) -> bool { * self == RTR_A :: REMOTE } } # [ doc = "Write proxy for field `RTR`" ]
pub struct RTR_W < 'a > { w : & 'a mut W , } impl < 'a > RTR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RTR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Data frame" ]
# [ inline ( always ) ]
pub fn data ( self ) -> & 'a mut W { self . variant ( RTR_A :: DATA ) } # [ doc = "Remote frame" ]
# [ inline ( always ) ]
pub fn remote ( self ) -> & 'a mut W { self . variant ( RTR_A :: REMOTE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `TXRQ`" ]
pub type TXRQ_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TXRQ`" ]
pub struct TXRQ_W < 'a > { w : & 'a mut W , } impl < 'a > TXRQ_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 21:31 - STID" ]
# [ inline ( always ) ]
pub fn stid ( & self ) -> STID_R { STID_R :: new ( ( ( self . bits >> 21 ) & 0x07ff ) as u16 ) } # [ doc = "Bits 3:20 - EXID" ]
# [ inline ( always ) ]
pub fn exid ( & self ) -> EXID_R { EXID_R :: new ( ( ( self . bits >> 3 ) & 0x0003_ffff ) as u32 ) } # [ doc = "Bit 2 - IDE" ]
# [ inline ( always ) ]
pub fn ide ( & self ) -> IDE_R { IDE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - RTR" ]
# [ inline ( always ) ]
pub fn rtr ( & self ) -> RTR_R { RTR_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - TXRQ" ]
# [ inline ( always ) ]
pub fn txrq ( & self ) -> TXRQ_R { TXRQ_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 21:31 - STID" ]
# [ inline ( always ) ]
pub fn stid ( & mut self ) -> STID_W { STID_W { w : self } } # [ doc = "Bits 3:20 - EXID" ]
# [ inline ( always ) ]
pub fn exid ( & mut self ) -> EXID_W { EXID_W { w : self } } # [ doc = "Bit 2 - IDE" ]
# [ inline ( always ) ]
pub fn ide ( & mut self ) -> IDE_W { IDE_W { w : self } } # [ doc = "Bit 1 - RTR" ]
# [ inline ( always ) ]
pub fn rtr ( & mut self ) -> RTR_W { RTR_W { w : self } } # [ doc = "Bit 0 - TXRQ" ]
# [ inline ( always ) ]
pub fn txrq ( & mut self ) -> TXRQ_W { TXRQ_W { w : self } } } } # [ doc = "mailbox data length control and time stamp register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdtr](tdtr) module" ]
pub type TDTR = crate :: Reg < u32 , _TDTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TDTR ; # [ doc = "`read()` method returns [tdtr::R](tdtr::R) reader structure" ]
impl crate :: Readable for TDTR { } # [ doc = "`write(|w| ..)` method takes [tdtr::W](tdtr::W) writer structure" ]
impl crate :: Writable for TDTR { } # [ doc = "mailbox data length control and time stamp register" ]
pub mod tdtr { # [ doc = "Reader of register TDTR" ]
pub type R = crate :: R < u32 , super :: TDTR > ; # [ doc = "Writer for register TDTR" ]
pub type W = crate :: W < u32 , super :: TDTR > ; # [ doc = "Register TDTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TDTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TIME`" ]
pub type TIME_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `TIME`" ]
pub struct TIME_W < 'a > { w : & 'a mut W , } impl < 'a > TIME_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xffff << 16 ) ) | ( ( ( value as u32 ) & 0xffff ) << 16 ) ; self . w } } # [ doc = "Reader of field `TGT`" ]
pub type TGT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TGT`" ]
pub struct TGT_W < 'a > { w : & 'a mut W , } impl < 'a > TGT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `DLC`" ]
pub type DLC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DLC`" ]
pub struct DLC_W < 'a > { w : & 'a mut W , } impl < 'a > DLC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 16:31 - TIME" ]
# [ inline ( always ) ]
pub fn time ( & self ) -> TIME_R { TIME_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } # [ doc = "Bit 8 - TGT" ]
# [ inline ( always ) ]
pub fn tgt ( & self ) -> TGT_R { TGT_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:3 - DLC" ]
# [ inline ( always ) ]
pub fn dlc ( & self ) -> DLC_R { DLC_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 16:31 - TIME" ]
# [ inline ( always ) ]
pub fn time ( & mut self ) -> TIME_W { TIME_W { w : self } } # [ doc = "Bit 8 - TGT" ]
# [ inline ( always ) ]
pub fn tgt ( & mut self ) -> TGT_W { TGT_W { w : self } } # [ doc = "Bits 0:3 - DLC" ]
# [ inline ( always ) ]
pub fn dlc ( & mut self ) -> DLC_W { DLC_W { w : self } } } } # [ doc = "mailbox data low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdlr](tdlr) module" ]
pub type TDLR = crate :: Reg < u32 , _TDLR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TDLR ; # [ doc = "`read()` method returns [tdlr::R](tdlr::R) reader structure" ]
impl crate :: Readable for TDLR { } # [ doc = "`write(|w| ..)` method takes [tdlr::W](tdlr::W) writer structure" ]
impl crate :: Writable for TDLR { } # [ doc = "mailbox data low register" ]
pub mod tdlr { # [ doc = "Reader of register TDLR" ]
pub type R = crate :: R < u32 , super :: TDLR > ; # [ doc = "Writer for register TDLR" ]
pub type W = crate :: W < u32 , super :: TDLR > ; # [ doc = "Register TDLR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TDLR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DATA3`" ]
pub type DATA3_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA3`" ]
pub struct DATA3_W < 'a > { w : & 'a mut W , } impl < 'a > DATA3_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `DATA2`" ]
pub type DATA2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA2`" ]
pub struct DATA2_W < 'a > { w : & 'a mut W , } impl < 'a > DATA2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATA1`" ]
pub type DATA1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA1`" ]
pub struct DATA1_W < 'a > { w : & 'a mut W , } impl < 'a > DATA1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `DATA0`" ]
pub type DATA0_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA0`" ]
pub struct DATA0_W < 'a > { w : & 'a mut W , } impl < 'a > DATA0_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - DATA3" ]
# [ inline ( always ) ]
pub fn data3 ( & self ) -> DATA3_R { DATA3_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - DATA2" ]
# [ inline ( always ) ]
pub fn data2 ( & self ) -> DATA2_R { DATA2_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - DATA1" ]
# [ inline ( always ) ]
pub fn data1 ( & self ) -> DATA1_R { DATA1_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - DATA0" ]
# [ inline ( always ) ]
pub fn data0 ( & self ) -> DATA0_R { DATA0_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - DATA3" ]
# [ inline ( always ) ]
pub fn data3 ( & mut self ) -> DATA3_W { DATA3_W { w : self } } # [ doc = "Bits 16:23 - DATA2" ]
# [ inline ( always ) ]
pub fn data2 ( & mut self ) -> DATA2_W { DATA2_W { w : self } } # [ doc = "Bits 8:15 - DATA1" ]
# [ inline ( always ) ]
pub fn data1 ( & mut self ) -> DATA1_W { DATA1_W { w : self } } # [ doc = "Bits 0:7 - DATA0" ]
# [ inline ( always ) ]
pub fn data0 ( & mut self ) -> DATA0_W { DATA0_W { w : self } } } } # [ doc = "mailbox data high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdhr](tdhr) module" ]
pub type TDHR = crate :: Reg < u32 , _TDHR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TDHR ; # [ doc = "`read()` method returns [tdhr::R](tdhr::R) reader structure" ]
impl crate :: Readable for TDHR { } # [ doc = "`write(|w| ..)` method takes [tdhr::W](tdhr::W) writer structure" ]
impl crate :: Writable for TDHR { } # [ doc = "mailbox data high register" ]
pub mod tdhr { # [ doc = "Reader of register TDHR" ]
pub type R = crate :: R < u32 , super :: TDHR > ; # [ doc = "Writer for register TDHR" ]
pub type W = crate :: W < u32 , super :: TDHR > ; # [ doc = "Register TDHR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TDHR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DATA7`" ]
pub type DATA7_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA7`" ]
pub struct DATA7_W < 'a > { w : & 'a mut W , } impl < 'a > DATA7_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `DATA6`" ]
pub type DATA6_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA6`" ]
pub struct DATA6_W < 'a > { w : & 'a mut W , } impl < 'a > DATA6_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATA5`" ]
pub type DATA5_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA5`" ]
pub struct DATA5_W < 'a > { w : & 'a mut W , } impl < 'a > DATA5_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `DATA4`" ]
pub type DATA4_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATA4`" ]
pub struct DATA4_W < 'a > { w : & 'a mut W , } impl < 'a > DATA4_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - DATA7" ]
# [ inline ( always ) ]
pub fn data7 ( & self ) -> DATA7_R { DATA7_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - DATA6" ]
# [ inline ( always ) ]
pub fn data6 ( & self ) -> DATA6_R { DATA6_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - DATA5" ]
# [ inline ( always ) ]
pub fn data5 ( & self ) -> DATA5_R { DATA5_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - DATA4" ]
# [ inline ( always ) ]
pub fn data4 ( & self ) -> DATA4_R { DATA4_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - DATA7" ]
# [ inline ( always ) ]
pub fn data7 ( & mut self ) -> DATA7_W { DATA7_W { w : self } } # [ doc = "Bits 16:23 - DATA6" ]
# [ inline ( always ) ]
pub fn data6 ( & mut self ) -> DATA6_W { DATA6_W { w : self } } # [ doc = "Bits 8:15 - DATA5" ]
# [ inline ( always ) ]
pub fn data5 ( & mut self ) -> DATA5_W { DATA5_W { w : self } } # [ doc = "Bits 0:7 - DATA4" ]
# [ inline ( always ) ]
pub fn data4 ( & mut self ) -> DATA4_W { DATA4_W { w : self } } } } } # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RX { # [ doc = "0x00 - receive FIFO mailbox identifier register" ]
pub rir : self :: rx :: RIR , # [ doc = "0x04 - receive FIFO mailbox data length control and time stamp register" ]
pub rdtr : self :: rx :: RDTR , # [ doc = "0x08 - receive FIFO mailbox data low register" ]
pub rdlr : self :: rx :: RDLR , # [ doc = "0x0c - receive FIFO mailbox data high register" ]
pub rdhr : self :: rx :: RDHR , } # [ doc = r"Register block" ]
# [ doc = "CAN Receive cluster" ]
pub mod rx { # [ doc = "receive FIFO mailbox identifier register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rir](rir) module" ]
pub type RIR = crate :: Reg < u32 , _RIR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RIR ; # [ doc = "`read()` method returns [rir::R](rir::R) reader structure" ]
impl crate :: Readable for RIR { } # [ doc = "receive FIFO mailbox identifier register" ]
pub mod rir { # [ doc = "Reader of register RIR" ]
pub type R = crate :: R < u32 , super :: RIR > ; # [ doc = "Reader of field `STID`" ]
pub type STID_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `EXID`" ]
pub type EXID_R = crate :: R < u32 , u32 > ; # [ doc = "IDE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IDE_A { # [ doc = "0: Standard identifier" ]
STANDARD = 0 , # [ doc = "1: Extended identifier" ]
EXTENDED = 1 } impl From < IDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : IDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IDE`" ]
pub type IDE_R = crate :: R < bool , IDE_A > ; impl IDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IDE_A { match self . bits { false => IDE_A :: STANDARD , true => IDE_A :: EXTENDED } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == IDE_A :: STANDARD } # [ doc = "Checks if the value of the field is `EXTENDED`" ]
# [ inline ( always ) ]
pub fn is_extended ( & self ) -> bool { * self == IDE_A :: EXTENDED } } # [ doc = "RTR\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RTR_A { # [ doc = "0: Data frame" ]
DATA = 0 , # [ doc = "1: Remote frame" ]
REMOTE = 1 } impl From < RTR_A > for bool { # [ inline ( always ) ]
fn from ( variant : RTR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RTR`" ]
pub type RTR_R = crate :: R < bool , RTR_A > ; impl RTR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RTR_A { match self . bits { false => RTR_A :: DATA , true => RTR_A :: REMOTE } } # [ doc = "Checks if the value of the field is `DATA`" ]
# [ inline ( always ) ]
pub fn is_data ( & self ) -> bool { * self == RTR_A :: DATA } # [ doc = "Checks if the value of the field is `REMOTE`" ]
# [ inline ( always ) ]
pub fn is_remote ( & self ) -> bool { * self == RTR_A :: REMOTE } } impl R { # [ doc = "Bits 21:31 - STID" ]
# [ inline ( always ) ]
pub fn stid ( & self ) -> STID_R { STID_R :: new ( ( ( self . bits >> 21 ) & 0x07ff ) as u16 ) } # [ doc = "Bits 3:20 - EXID" ]
# [ inline ( always ) ]
pub fn exid ( & self ) -> EXID_R { EXID_R :: new ( ( ( self . bits >> 3 ) & 0x0003_ffff ) as u32 ) } # [ doc = "Bit 2 - IDE" ]
# [ inline ( always ) ]
pub fn ide ( & self ) -> IDE_R { IDE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - RTR" ]
# [ inline ( always ) ]
pub fn rtr ( & self ) -> RTR_R { RTR_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } } } # [ doc = "receive FIFO mailbox data length control and time stamp register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdtr](rdtr) module" ]
pub type RDTR = crate :: Reg < u32 , _RDTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RDTR ; # [ doc = "`read()` method returns [rdtr::R](rdtr::R) reader structure" ]
impl crate :: Readable for RDTR { } # [ doc = "receive FIFO mailbox data length control and time stamp register" ]
pub mod rdtr { # [ doc = "Reader of register RDTR" ]
pub type R = crate :: R < u32 , super :: RDTR > ; # [ doc = "Reader of field `TIME`" ]
pub type TIME_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `FMI`" ]
pub type FMI_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DLC`" ]
pub type DLC_R = crate :: R < u8 , u8 > ; impl R { # [ doc = "Bits 16:31 - TIME" ]
# [ inline ( always ) ]
pub fn time ( & self ) -> TIME_R { TIME_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } # [ doc = "Bits 8:15 - FMI" ]
# [ inline ( always ) ]
pub fn fmi ( & self ) -> FMI_R { FMI_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:3 - DLC" ]
# [ inline ( always ) ]
pub fn dlc ( & self ) -> DLC_R { DLC_R :: new ( ( self . bits & 0x0f ) as u8 ) } } } # [ doc = "receive FIFO mailbox data low register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdlr](rdlr) module" ]
pub type RDLR = crate :: Reg < u32 , _RDLR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RDLR ; # [ doc = "`read()` method returns [rdlr::R](rdlr::R) reader structure" ]
impl crate :: Readable for RDLR { } # [ doc = "receive FIFO mailbox data low register" ]
pub mod rdlr { # [ doc = "Reader of register RDLR" ]
pub type R = crate :: R < u32 , super :: RDLR > ; # [ doc = "Reader of field `DATA3`" ]
pub type DATA3_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DATA2`" ]
pub type DATA2_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DATA1`" ]
pub type DATA1_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DATA0`" ]
pub type DATA0_R = crate :: R < u8 , u8 > ; impl R { # [ doc = "Bits 24:31 - DATA3" ]
# [ inline ( always ) ]
pub fn data3 ( & self ) -> DATA3_R { DATA3_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - DATA2" ]
# [ inline ( always ) ]
pub fn data2 ( & self ) -> DATA2_R { DATA2_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - DATA1" ]
# [ inline ( always ) ]
pub fn data1 ( & self ) -> DATA1_R { DATA1_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - DATA0" ]
# [ inline ( always ) ]
pub fn data0 ( & self ) -> DATA0_R { DATA0_R :: new ( ( self . bits & 0xff ) as u8 ) } } } # [ doc = "receive FIFO mailbox data high register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdhr](rdhr) module" ]
pub type RDHR = crate :: Reg < u32 , _RDHR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RDHR ; # [ doc = "`read()` method returns [rdhr::R](rdhr::R) reader structure" ]
impl crate :: Readable for RDHR { } # [ doc = "receive FIFO mailbox data high register" ]
pub mod rdhr { # [ doc = "Reader of register RDHR" ]
pub type R = crate :: R < u32 , super :: RDHR > ; # [ doc = "Reader of field `DATA7`" ]
pub type DATA7_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DATA6`" ]
pub type DATA6_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DATA5`" ]
pub type DATA5_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DATA4`" ]
pub type DATA4_R = crate :: R < u8 , u8 > ; impl R { # [ doc = "Bits 24:31 - DATA7" ]
# [ inline ( always ) ]
pub fn data7 ( & self ) -> DATA7_R { DATA7_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - DATA6" ]
# [ inline ( always ) ]
pub fn data6 ( & self ) -> DATA6_R { DATA6_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - DATA5" ]
# [ inline ( always ) ]
pub fn data5 ( & self ) -> DATA5_R { DATA5_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - DATA4" ]
# [ inline ( always ) ]
pub fn data4 ( & self ) -> DATA4_R { DATA4_R :: new ( ( self . bits & 0xff ) as u8 ) } } } } # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct FB { # [ doc = "0x00 - Filter bank 0 register 1" ]
pub fr1 : self :: fb :: FR1 , # [ doc = "0x04 - Filter bank 0 register 2" ]
pub fr2 : self :: fb :: FR2 , } # [ doc = r"Register block" ]
# [ doc = "CAN Filter Bank cluster" ]
pub mod fb { # [ doc = "Filter bank 0 register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fr1](fr1) module" ]
pub type FR1 = crate :: Reg < u32 , _FR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FR1 ; # [ doc = "`read()` method returns [fr1::R](fr1::R) reader structure" ]
impl crate :: Readable for FR1 { } # [ doc = "`write(|w| ..)` method takes [fr1::W](fr1::W) writer structure" ]
impl crate :: Writable for FR1 { } # [ doc = "Filter bank 0 register 1" ]
pub mod fr1 { # [ doc = "Reader of register FR1" ]
pub type R = crate :: R < u32 , super :: FR1 > ; # [ doc = "Writer for register FR1" ]
pub type W = crate :: W < u32 , super :: FR1 > ; # [ doc = "Register FR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `FB0`" ]
pub type FB0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB0`" ]
pub struct FB0_W < 'a > { w : & 'a mut W , } impl < 'a > FB0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FB1`" ]
pub type FB1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB1`" ]
pub struct FB1_W < 'a > { w : & 'a mut W , } impl < 'a > FB1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `FB2`" ]
pub type FB2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB2`" ]
pub struct FB2_W < 'a > { w : & 'a mut W , } impl < 'a > FB2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `FB3`" ]
pub type FB3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB3`" ]
pub struct FB3_W < 'a > { w : & 'a mut W , } impl < 'a > FB3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `FB4`" ]
pub type FB4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB4`" ]
pub struct FB4_W < 'a > { w : & 'a mut W , } impl < 'a > FB4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `FB5`" ]
pub type FB5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB5`" ]
pub struct FB5_W < 'a > { w : & 'a mut W , } impl < 'a > FB5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `FB6`" ]
pub type FB6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB6`" ]
pub struct FB6_W < 'a > { w : & 'a mut W , } impl < 'a > FB6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `FB7`" ]
pub type FB7_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB7`" ]
pub struct FB7_W < 'a > { w : & 'a mut W , } impl < 'a > FB7_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `FB8`" ]
pub type FB8_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB8`" ]
pub struct FB8_W < 'a > { w : & 'a mut W , } impl < 'a > FB8_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FB9`" ]
pub type FB9_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB9`" ]
pub struct FB9_W < 'a > { w : & 'a mut W , } impl < 'a > FB9_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `FB10`" ]
pub type FB10_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB10`" ]
pub struct FB10_W < 'a > { w : & 'a mut W , } impl < 'a > FB10_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `FB11`" ]
pub type FB11_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB11`" ]
pub struct FB11_W < 'a > { w : & 'a mut W , } impl < 'a > FB11_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `FB12`" ]
pub type FB12_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB12`" ]
pub struct FB12_W < 'a > { w : & 'a mut W , } impl < 'a > FB12_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `FB13`" ]
pub type FB13_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB13`" ]
pub struct FB13_W < 'a > { w : & 'a mut W , } impl < 'a > FB13_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `FB14`" ]
pub type FB14_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB14`" ]
pub struct FB14_W < 'a > { w : & 'a mut W , } impl < 'a > FB14_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `FB15`" ]
pub type FB15_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB15`" ]
pub struct FB15_W < 'a > { w : & 'a mut W , } impl < 'a > FB15_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `FB16`" ]
pub type FB16_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB16`" ]
pub struct FB16_W < 'a > { w : & 'a mut W , } impl < 'a > FB16_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `FB17`" ]
pub type FB17_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB17`" ]
pub struct FB17_W < 'a > { w : & 'a mut W , } impl < 'a > FB17_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `FB18`" ]
pub type FB18_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB18`" ]
pub struct FB18_W < 'a > { w : & 'a mut W , } impl < 'a > FB18_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `FB19`" ]
pub type FB19_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB19`" ]
pub struct FB19_W < 'a > { w : & 'a mut W , } impl < 'a > FB19_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `FB20`" ]
pub type FB20_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB20`" ]
pub struct FB20_W < 'a > { w : & 'a mut W , } impl < 'a > FB20_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `FB21`" ]
pub type FB21_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB21`" ]
pub struct FB21_W < 'a > { w : & 'a mut W , } impl < 'a > FB21_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `FB22`" ]
pub type FB22_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB22`" ]
pub struct FB22_W < 'a > { w : & 'a mut W , } impl < 'a > FB22_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `FB23`" ]
pub type FB23_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB23`" ]
pub struct FB23_W < 'a > { w : & 'a mut W , } impl < 'a > FB23_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `FB24`" ]
pub type FB24_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB24`" ]
pub struct FB24_W < 'a > { w : & 'a mut W , } impl < 'a > FB24_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `FB25`" ]
pub type FB25_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB25`" ]
pub struct FB25_W < 'a > { w : & 'a mut W , } impl < 'a > FB25_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `FB26`" ]
pub type FB26_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB26`" ]
pub struct FB26_W < 'a > { w : & 'a mut W , } impl < 'a > FB26_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `FB27`" ]
pub type FB27_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB27`" ]
pub struct FB27_W < 'a > { w : & 'a mut W , } impl < 'a > FB27_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Reader of field `FB28`" ]
pub type FB28_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB28`" ]
pub struct FB28_W < 'a > { w : & 'a mut W , } impl < 'a > FB28_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `FB29`" ]
pub type FB29_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB29`" ]
pub struct FB29_W < 'a > { w : & 'a mut W , } impl < 'a > FB29_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `FB30`" ]
pub type FB30_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB30`" ]
pub struct FB30_W < 'a > { w : & 'a mut W , } impl < 'a > FB30_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `FB31`" ]
pub type FB31_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB31`" ]
pub struct FB31_W < 'a > { w : & 'a mut W , } impl < 'a > FB31_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb0 ( & self ) -> FB0_R { FB0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb1 ( & self ) -> FB1_R { FB1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb2 ( & self ) -> FB2_R { FB2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb3 ( & self ) -> FB3_R { FB3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb4 ( & self ) -> FB4_R { FB4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb5 ( & self ) -> FB5_R { FB5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb6 ( & self ) -> FB6_R { FB6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb7 ( & self ) -> FB7_R { FB7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb8 ( & self ) -> FB8_R { FB8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb9 ( & self ) -> FB9_R { FB9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb10 ( & self ) -> FB10_R { FB10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb11 ( & self ) -> FB11_R { FB11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb12 ( & self ) -> FB12_R { FB12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb13 ( & self ) -> FB13_R { FB13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb14 ( & self ) -> FB14_R { FB14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb15 ( & self ) -> FB15_R { FB15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb16 ( & self ) -> FB16_R { FB16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb17 ( & self ) -> FB17_R { FB17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb18 ( & self ) -> FB18_R { FB18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb19 ( & self ) -> FB19_R { FB19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb20 ( & self ) -> FB20_R { FB20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb21 ( & self ) -> FB21_R { FB21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb22 ( & self ) -> FB22_R { FB22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb23 ( & self ) -> FB23_R { FB23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb24 ( & self ) -> FB24_R { FB24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb25 ( & self ) -> FB25_R { FB25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb26 ( & self ) -> FB26_R { FB26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb27 ( & self ) -> FB27_R { FB27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb28 ( & self ) -> FB28_R { FB28_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb29 ( & self ) -> FB29_R { FB29_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb30 ( & self ) -> FB30_R { FB30_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb31 ( & self ) -> FB31_R { FB31_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb0 ( & mut self ) -> FB0_W { FB0_W { w : self } } # [ doc = "Bit 1 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb1 ( & mut self ) -> FB1_W { FB1_W { w : self } } # [ doc = "Bit 2 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb2 ( & mut self ) -> FB2_W { FB2_W { w : self } } # [ doc = "Bit 3 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb3 ( & mut self ) -> FB3_W { FB3_W { w : self } } # [ doc = "Bit 4 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb4 ( & mut self ) -> FB4_W { FB4_W { w : self } } # [ doc = "Bit 5 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb5 ( & mut self ) -> FB5_W { FB5_W { w : self } } # [ doc = "Bit 6 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb6 ( & mut self ) -> FB6_W { FB6_W { w : self } } # [ doc = "Bit 7 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb7 ( & mut self ) -> FB7_W { FB7_W { w : self } } # [ doc = "Bit 8 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb8 ( & mut self ) -> FB8_W { FB8_W { w : self } } # [ doc = "Bit 9 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb9 ( & mut self ) -> FB9_W { FB9_W { w : self } } # [ doc = "Bit 10 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb10 ( & mut self ) -> FB10_W { FB10_W { w : self } } # [ doc = "Bit 11 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb11 ( & mut self ) -> FB11_W { FB11_W { w : self } } # [ doc = "Bit 12 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb12 ( & mut self ) -> FB12_W { FB12_W { w : self } } # [ doc = "Bit 13 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb13 ( & mut self ) -> FB13_W { FB13_W { w : self } } # [ doc = "Bit 14 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb14 ( & mut self ) -> FB14_W { FB14_W { w : self } } # [ doc = "Bit 15 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb15 ( & mut self ) -> FB15_W { FB15_W { w : self } } # [ doc = "Bit 16 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb16 ( & mut self ) -> FB16_W { FB16_W { w : self } } # [ doc = "Bit 17 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb17 ( & mut self ) -> FB17_W { FB17_W { w : self } } # [ doc = "Bit 18 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb18 ( & mut self ) -> FB18_W { FB18_W { w : self } } # [ doc = "Bit 19 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb19 ( & mut self ) -> FB19_W { FB19_W { w : self } } # [ doc = "Bit 20 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb20 ( & mut self ) -> FB20_W { FB20_W { w : self } } # [ doc = "Bit 21 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb21 ( & mut self ) -> FB21_W { FB21_W { w : self } } # [ doc = "Bit 22 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb22 ( & mut self ) -> FB22_W { FB22_W { w : self } } # [ doc = "Bit 23 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb23 ( & mut self ) -> FB23_W { FB23_W { w : self } } # [ doc = "Bit 24 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb24 ( & mut self ) -> FB24_W { FB24_W { w : self } } # [ doc = "Bit 25 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb25 ( & mut self ) -> FB25_W { FB25_W { w : self } } # [ doc = "Bit 26 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb26 ( & mut self ) -> FB26_W { FB26_W { w : self } } # [ doc = "Bit 27 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb27 ( & mut self ) -> FB27_W { FB27_W { w : self } } # [ doc = "Bit 28 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb28 ( & mut self ) -> FB28_W { FB28_W { w : self } } # [ doc = "Bit 29 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb29 ( & mut self ) -> FB29_W { FB29_W { w : self } } # [ doc = "Bit 30 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb30 ( & mut self ) -> FB30_W { FB30_W { w : self } } # [ doc = "Bit 31 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb31 ( & mut self ) -> FB31_W { FB31_W { w : self } } } } # [ doc = "Filter bank 0 register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fr2](fr2) module" ]
pub type FR2 = crate :: Reg < u32 , _FR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FR2 ; # [ doc = "`read()` method returns [fr2::R](fr2::R) reader structure" ]
impl crate :: Readable for FR2 { } # [ doc = "`write(|w| ..)` method takes [fr2::W](fr2::W) writer structure" ]
impl crate :: Writable for FR2 { } # [ doc = "Filter bank 0 register 2" ]
pub mod fr2 { # [ doc = "Reader of register FR2" ]
pub type R = crate :: R < u32 , super :: FR2 > ; # [ doc = "Writer for register FR2" ]
pub type W = crate :: W < u32 , super :: FR2 > ; # [ doc = "Register FR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `FB0`" ]
pub type FB0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB0`" ]
pub struct FB0_W < 'a > { w : & 'a mut W , } impl < 'a > FB0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FB1`" ]
pub type FB1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB1`" ]
pub struct FB1_W < 'a > { w : & 'a mut W , } impl < 'a > FB1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `FB2`" ]
pub type FB2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB2`" ]
pub struct FB2_W < 'a > { w : & 'a mut W , } impl < 'a > FB2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `FB3`" ]
pub type FB3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB3`" ]
pub struct FB3_W < 'a > { w : & 'a mut W , } impl < 'a > FB3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `FB4`" ]
pub type FB4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB4`" ]
pub struct FB4_W < 'a > { w : & 'a mut W , } impl < 'a > FB4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `FB5`" ]
pub type FB5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB5`" ]
pub struct FB5_W < 'a > { w : & 'a mut W , } impl < 'a > FB5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `FB6`" ]
pub type FB6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB6`" ]
pub struct FB6_W < 'a > { w : & 'a mut W , } impl < 'a > FB6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `FB7`" ]
pub type FB7_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB7`" ]
pub struct FB7_W < 'a > { w : & 'a mut W , } impl < 'a > FB7_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `FB8`" ]
pub type FB8_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB8`" ]
pub struct FB8_W < 'a > { w : & 'a mut W , } impl < 'a > FB8_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FB9`" ]
pub type FB9_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB9`" ]
pub struct FB9_W < 'a > { w : & 'a mut W , } impl < 'a > FB9_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `FB10`" ]
pub type FB10_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB10`" ]
pub struct FB10_W < 'a > { w : & 'a mut W , } impl < 'a > FB10_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `FB11`" ]
pub type FB11_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB11`" ]
pub struct FB11_W < 'a > { w : & 'a mut W , } impl < 'a > FB11_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `FB12`" ]
pub type FB12_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB12`" ]
pub struct FB12_W < 'a > { w : & 'a mut W , } impl < 'a > FB12_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `FB13`" ]
pub type FB13_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB13`" ]
pub struct FB13_W < 'a > { w : & 'a mut W , } impl < 'a > FB13_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `FB14`" ]
pub type FB14_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB14`" ]
pub struct FB14_W < 'a > { w : & 'a mut W , } impl < 'a > FB14_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `FB15`" ]
pub type FB15_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB15`" ]
pub struct FB15_W < 'a > { w : & 'a mut W , } impl < 'a > FB15_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `FB16`" ]
pub type FB16_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB16`" ]
pub struct FB16_W < 'a > { w : & 'a mut W , } impl < 'a > FB16_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `FB17`" ]
pub type FB17_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB17`" ]
pub struct FB17_W < 'a > { w : & 'a mut W , } impl < 'a > FB17_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `FB18`" ]
pub type FB18_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB18`" ]
pub struct FB18_W < 'a > { w : & 'a mut W , } impl < 'a > FB18_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `FB19`" ]
pub type FB19_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB19`" ]
pub struct FB19_W < 'a > { w : & 'a mut W , } impl < 'a > FB19_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `FB20`" ]
pub type FB20_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB20`" ]
pub struct FB20_W < 'a > { w : & 'a mut W , } impl < 'a > FB20_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `FB21`" ]
pub type FB21_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB21`" ]
pub struct FB21_W < 'a > { w : & 'a mut W , } impl < 'a > FB21_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `FB22`" ]
pub type FB22_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB22`" ]
pub struct FB22_W < 'a > { w : & 'a mut W , } impl < 'a > FB22_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `FB23`" ]
pub type FB23_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB23`" ]
pub struct FB23_W < 'a > { w : & 'a mut W , } impl < 'a > FB23_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `FB24`" ]
pub type FB24_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB24`" ]
pub struct FB24_W < 'a > { w : & 'a mut W , } impl < 'a > FB24_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `FB25`" ]
pub type FB25_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB25`" ]
pub struct FB25_W < 'a > { w : & 'a mut W , } impl < 'a > FB25_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `FB26`" ]
pub type FB26_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB26`" ]
pub struct FB26_W < 'a > { w : & 'a mut W , } impl < 'a > FB26_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `FB27`" ]
pub type FB27_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB27`" ]
pub struct FB27_W < 'a > { w : & 'a mut W , } impl < 'a > FB27_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Reader of field `FB28`" ]
pub type FB28_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB28`" ]
pub struct FB28_W < 'a > { w : & 'a mut W , } impl < 'a > FB28_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `FB29`" ]
pub type FB29_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB29`" ]
pub struct FB29_W < 'a > { w : & 'a mut W , } impl < 'a > FB29_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `FB30`" ]
pub type FB30_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB30`" ]
pub struct FB30_W < 'a > { w : & 'a mut W , } impl < 'a > FB30_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `FB31`" ]
pub type FB31_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FB31`" ]
pub struct FB31_W < 'a > { w : & 'a mut W , } impl < 'a > FB31_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb0 ( & self ) -> FB0_R { FB0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb1 ( & self ) -> FB1_R { FB1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb2 ( & self ) -> FB2_R { FB2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb3 ( & self ) -> FB3_R { FB3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb4 ( & self ) -> FB4_R { FB4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb5 ( & self ) -> FB5_R { FB5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb6 ( & self ) -> FB6_R { FB6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb7 ( & self ) -> FB7_R { FB7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb8 ( & self ) -> FB8_R { FB8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb9 ( & self ) -> FB9_R { FB9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb10 ( & self ) -> FB10_R { FB10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb11 ( & self ) -> FB11_R { FB11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb12 ( & self ) -> FB12_R { FB12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb13 ( & self ) -> FB13_R { FB13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb14 ( & self ) -> FB14_R { FB14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb15 ( & self ) -> FB15_R { FB15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb16 ( & self ) -> FB16_R { FB16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb17 ( & self ) -> FB17_R { FB17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb18 ( & self ) -> FB18_R { FB18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb19 ( & self ) -> FB19_R { FB19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb20 ( & self ) -> FB20_R { FB20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb21 ( & self ) -> FB21_R { FB21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb22 ( & self ) -> FB22_R { FB22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb23 ( & self ) -> FB23_R { FB23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb24 ( & self ) -> FB24_R { FB24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb25 ( & self ) -> FB25_R { FB25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb26 ( & self ) -> FB26_R { FB26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb27 ( & self ) -> FB27_R { FB27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb28 ( & self ) -> FB28_R { FB28_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb29 ( & self ) -> FB29_R { FB29_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb30 ( & self ) -> FB30_R { FB30_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb31 ( & self ) -> FB31_R { FB31_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb0 ( & mut self ) -> FB0_W { FB0_W { w : self } } # [ doc = "Bit 1 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb1 ( & mut self ) -> FB1_W { FB1_W { w : self } } # [ doc = "Bit 2 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb2 ( & mut self ) -> FB2_W { FB2_W { w : self } } # [ doc = "Bit 3 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb3 ( & mut self ) -> FB3_W { FB3_W { w : self } } # [ doc = "Bit 4 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb4 ( & mut self ) -> FB4_W { FB4_W { w : self } } # [ doc = "Bit 5 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb5 ( & mut self ) -> FB5_W { FB5_W { w : self } } # [ doc = "Bit 6 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb6 ( & mut self ) -> FB6_W { FB6_W { w : self } } # [ doc = "Bit 7 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb7 ( & mut self ) -> FB7_W { FB7_W { w : self } } # [ doc = "Bit 8 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb8 ( & mut self ) -> FB8_W { FB8_W { w : self } } # [ doc = "Bit 9 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb9 ( & mut self ) -> FB9_W { FB9_W { w : self } } # [ doc = "Bit 10 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb10 ( & mut self ) -> FB10_W { FB10_W { w : self } } # [ doc = "Bit 11 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb11 ( & mut self ) -> FB11_W { FB11_W { w : self } } # [ doc = "Bit 12 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb12 ( & mut self ) -> FB12_W { FB12_W { w : self } } # [ doc = "Bit 13 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb13 ( & mut self ) -> FB13_W { FB13_W { w : self } } # [ doc = "Bit 14 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb14 ( & mut self ) -> FB14_W { FB14_W { w : self } } # [ doc = "Bit 15 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb15 ( & mut self ) -> FB15_W { FB15_W { w : self } } # [ doc = "Bit 16 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb16 ( & mut self ) -> FB16_W { FB16_W { w : self } } # [ doc = "Bit 17 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb17 ( & mut self ) -> FB17_W { FB17_W { w : self } } # [ doc = "Bit 18 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb18 ( & mut self ) -> FB18_W { FB18_W { w : self } } # [ doc = "Bit 19 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb19 ( & mut self ) -> FB19_W { FB19_W { w : self } } # [ doc = "Bit 20 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb20 ( & mut self ) -> FB20_W { FB20_W { w : self } } # [ doc = "Bit 21 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb21 ( & mut self ) -> FB21_W { FB21_W { w : self } } # [ doc = "Bit 22 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb22 ( & mut self ) -> FB22_W { FB22_W { w : self } } # [ doc = "Bit 23 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb23 ( & mut self ) -> FB23_W { FB23_W { w : self } } # [ doc = "Bit 24 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb24 ( & mut self ) -> FB24_W { FB24_W { w : self } } # [ doc = "Bit 25 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb25 ( & mut self ) -> FB25_W { FB25_W { w : self } } # [ doc = "Bit 26 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb26 ( & mut self ) -> FB26_W { FB26_W { w : self } } # [ doc = "Bit 27 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb27 ( & mut self ) -> FB27_W { FB27_W { w : self } } # [ doc = "Bit 28 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb28 ( & mut self ) -> FB28_W { FB28_W { w : self } } # [ doc = "Bit 29 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb29 ( & mut self ) -> FB29_W { FB29_W { w : self } } # [ doc = "Bit 30 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb30 ( & mut self ) -> FB30_W { FB30_W { w : self } } # [ doc = "Bit 31 - Filter bits" ]
# [ inline ( always ) ]
pub fn fb31 ( & mut self ) -> FB31_W { FB31_W { w : self } } } } } # [ doc = "master control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mcr](mcr) module" ]
pub type MCR = crate :: Reg < u32 , _MCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _MCR ; # [ doc = "`read()` method returns [mcr::R](mcr::R) reader structure" ]
impl crate :: Readable for MCR { } # [ doc = "`write(|w| ..)` method takes [mcr::W](mcr::W) writer structure" ]
impl crate :: Writable for MCR { } # [ doc = "master control register" ]
pub mod mcr { # [ doc = "Reader of register MCR" ]
pub type R = crate :: R < u32 , super :: MCR > ; # [ doc = "Writer for register MCR" ]
pub type W = crate :: W < u32 , super :: MCR > ; # [ doc = "Register MCR `reset()`'s with value 0x0001_0002" ]
impl crate :: ResetValue for super :: MCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0001_0002 } } # [ doc = "Reader of field `DBF`" ]
pub type DBF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBF`" ]
pub struct DBF_W < 'a > { w : & 'a mut W , } impl < 'a > DBF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `RESET`" ]
pub type RESET_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RESET`" ]
pub struct RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RESET_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `TTCM`" ]
pub type TTCM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TTCM`" ]
pub struct TTCM_W < 'a > { w : & 'a mut W , } impl < 'a > TTCM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `ABOM`" ]
pub type ABOM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ABOM`" ]
pub struct ABOM_W < 'a > { w : & 'a mut W , } impl < 'a > ABOM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `AWUM`" ]
pub type AWUM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `AWUM`" ]
pub struct AWUM_W < 'a > { w : & 'a mut W , } impl < 'a > AWUM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `NART`" ]
pub type NART_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `NART`" ]
pub struct NART_W < 'a > { w : & 'a mut W , } impl < 'a > NART_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `RFLM`" ]
pub type RFLM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RFLM`" ]
pub struct RFLM_W < 'a > { w : & 'a mut W , } impl < 'a > RFLM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `TXFP`" ]
pub type TXFP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TXFP`" ]
pub struct TXFP_W < 'a > { w : & 'a mut W , } impl < 'a > TXFP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `SLEEP`" ]
pub type SLEEP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SLEEP`" ]
pub struct SLEEP_W < 'a > { w : & 'a mut W , } impl < 'a > SLEEP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `INRQ`" ]
pub type INRQ_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `INRQ`" ]
pub struct INRQ_W < 'a > { w : & 'a mut W , } impl < 'a > INRQ_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 16 - DBF" ]
# [ inline ( always ) ]
pub fn dbf ( & self ) -> DBF_R { DBF_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - RESET" ]
# [ inline ( always ) ]
pub fn reset ( & self ) -> RESET_R { RESET_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - TTCM" ]
# [ inline ( always ) ]
pub fn ttcm ( & self ) -> TTCM_R { TTCM_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - ABOM" ]
# [ inline ( always ) ]
pub fn abom ( & self ) -> ABOM_R { ABOM_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - AWUM" ]
# [ inline ( always ) ]
pub fn awum ( & self ) -> AWUM_R { AWUM_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - NART" ]
# [ inline ( always ) ]
pub fn nart ( & self ) -> NART_R { NART_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - RFLM" ]
# [ inline ( always ) ]
pub fn rflm ( & self ) -> RFLM_R { RFLM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - TXFP" ]
# [ inline ( always ) ]
pub fn txfp ( & self ) -> TXFP_R { TXFP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - SLEEP" ]
# [ inline ( always ) ]
pub fn sleep ( & self ) -> SLEEP_R { SLEEP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - INRQ" ]
# [ inline ( always ) ]
pub fn inrq ( & self ) -> INRQ_R { INRQ_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 16 - DBF" ]
# [ inline ( always ) ]
pub fn dbf ( & mut self ) -> DBF_W { DBF_W { w : self } } # [ doc = "Bit 15 - RESET" ]
# [ inline ( always ) ]
pub fn reset ( & mut self ) -> RESET_W { RESET_W { w : self } } # [ doc = "Bit 7 - TTCM" ]
# [ inline ( always ) ]
pub fn ttcm ( & mut self ) -> TTCM_W { TTCM_W { w : self } } # [ doc = "Bit 6 - ABOM" ]
# [ inline ( always ) ]
pub fn abom ( & mut self ) -> ABOM_W { ABOM_W { w : self } } # [ doc = "Bit 5 - AWUM" ]
# [ inline ( always ) ]
pub fn awum ( & mut self ) -> AWUM_W { AWUM_W { w : self } } # [ doc = "Bit 4 - NART" ]
# [ inline ( always ) ]
pub fn nart ( & mut self ) -> NART_W { NART_W { w : self } } # [ doc = "Bit 3 - RFLM" ]
# [ inline ( always ) ]
pub fn rflm ( & mut self ) -> RFLM_W { RFLM_W { w : self } } # [ doc = "Bit 2 - TXFP" ]
# [ inline ( always ) ]
pub fn txfp ( & mut self ) -> TXFP_W { TXFP_W { w : self } } # [ doc = "Bit 1 - SLEEP" ]
# [ inline ( always ) ]
pub fn sleep ( & mut self ) -> SLEEP_W { SLEEP_W { w : self } } # [ doc = "Bit 0 - INRQ" ]
# [ inline ( always ) ]
pub fn inrq ( & mut self ) -> INRQ_W { INRQ_W { w : self } } } } # [ doc = "master status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msr](msr) module" ]
pub type MSR = crate :: Reg < u32 , _MSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _MSR ; # [ doc = "`read()` method returns [msr::R](msr::R) reader structure" ]
impl crate :: Readable for MSR { } # [ doc = "`write(|w| ..)` method takes [msr::W](msr::W) writer structure" ]
impl crate :: Writable for MSR { } # [ doc = "master status register" ]
pub mod msr { # [ doc = "Reader of register MSR" ]
pub type R = crate :: R < u32 , super :: MSR > ; # [ doc = "Writer for register MSR" ]
pub type W = crate :: W < u32 , super :: MSR > ; # [ doc = "Register MSR `reset()`'s with value 0x0c02" ]
impl crate :: ResetValue for super :: MSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0c02 } } # [ doc = "Reader of field `RX`" ]
pub type RX_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `SAMP`" ]
pub type SAMP_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `RXM`" ]
pub type RXM_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `TXM`" ]
pub type TXM_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `SLAKI`" ]
pub type SLAKI_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SLAKI`" ]
pub struct SLAKI_W < 'a > { w : & 'a mut W , } impl < 'a > SLAKI_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `WKUI`" ]
pub type WKUI_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WKUI`" ]
pub struct WKUI_W < 'a > { w : & 'a mut W , } impl < 'a > WKUI_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `ERRI`" ]
pub type ERRI_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ERRI`" ]
pub struct ERRI_W < 'a > { w : & 'a mut W , } impl < 'a > ERRI_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `SLAK`" ]
pub type SLAK_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `INAK`" ]
pub type INAK_R = crate :: R < bool , bool > ; impl R { # [ doc = "Bit 11 - RX" ]
# [ inline ( always ) ]
pub fn rx ( & self ) -> RX_R { RX_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - SAMP" ]
# [ inline ( always ) ]
pub fn samp ( & self ) -> SAMP_R { SAMP_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - RXM" ]
# [ inline ( always ) ]
pub fn rxm ( & self ) -> RXM_R { RXM_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - TXM" ]
# [ inline ( always ) ]
pub fn txm ( & self ) -> TXM_R { TXM_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - SLAKI" ]
# [ inline ( always ) ]
pub fn slaki ( & self ) -> SLAKI_R { SLAKI_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - WKUI" ]
# [ inline ( always ) ]
pub fn wkui ( & self ) -> WKUI_R { WKUI_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - ERRI" ]
# [ inline ( always ) ]
pub fn erri ( & self ) -> ERRI_R { ERRI_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - SLAK" ]
# [ inline ( always ) ]
pub fn slak ( & self ) -> SLAK_R { SLAK_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - INAK" ]
# [ inline ( always ) ]
pub fn inak ( & self ) -> INAK_R { INAK_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 4 - SLAKI" ]
# [ inline ( always ) ]
pub fn slaki ( & mut self ) -> SLAKI_W { SLAKI_W { w : self } } # [ doc = "Bit 3 - WKUI" ]
# [ inline ( always ) ]
pub fn wkui ( & mut self ) -> WKUI_W { WKUI_W { w : self } } # [ doc = "Bit 2 - ERRI" ]
# [ inline ( always ) ]
pub fn erri ( & mut self ) -> ERRI_W { ERRI_W { w : self } } } } # [ doc = "transmit status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tsr](tsr) module" ]
pub type TSR = crate :: Reg < u32 , _TSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TSR ; # [ doc = "`read()` method returns [tsr::R](tsr::R) reader structure" ]
impl crate :: Readable for TSR { } # [ doc = "`write(|w| ..)` method takes [tsr::W](tsr::W) writer structure" ]
impl crate :: Writable for TSR { } # [ doc = "transmit status register" ]
pub mod tsr { # [ doc = "Reader of register TSR" ]
pub type R = crate :: R < u32 , super :: TSR > ; # [ doc = "Writer for register TSR" ]
pub type W = crate :: W < u32 , super :: TSR > ; # [ doc = "Register TSR `reset()`'s with value 0x1c00_0000" ]
impl crate :: ResetValue for super :: TSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x1c00_0000 } } # [ doc = "Reader of field `LOW2`" ]
pub type LOW2_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `LOW1`" ]
pub type LOW1_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `LOW0`" ]
pub type LOW0_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `TME2`" ]
pub type TME2_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `TME1`" ]
pub type TME1_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `TME0`" ]
pub type TME0_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `CODE`" ]
pub type CODE_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `ABRQ2`" ]
pub type ABRQ2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ABRQ2`" ]
pub struct ABRQ2_W < 'a > { w : & 'a mut W , } impl < 'a > ABRQ2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `TERR2`" ]
pub type TERR2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TERR2`" ]
pub struct TERR2_W < 'a > { w : & 'a mut W , } impl < 'a > TERR2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `ALST2`" ]
pub type ALST2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ALST2`" ]
pub struct ALST2_W < 'a > { w : & 'a mut W , } impl < 'a > ALST2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `TXOK2`" ]
pub type TXOK2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TXOK2`" ]
pub struct TXOK2_W < 'a > { w : & 'a mut W , } impl < 'a > TXOK2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `RQCP2`" ]
pub type RQCP2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RQCP2`" ]
pub struct RQCP2_W < 'a > { w : & 'a mut W , } impl < 'a > RQCP2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `ABRQ1`" ]
pub type ABRQ1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ABRQ1`" ]
pub struct ABRQ1_W < 'a > { w : & 'a mut W , } impl < 'a > ABRQ1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `TERR1`" ]
pub type TERR1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TERR1`" ]
pub struct TERR1_W < 'a > { w : & 'a mut W , } impl < 'a > TERR1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `ALST1`" ]
pub type ALST1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ALST1`" ]
pub struct ALST1_W < 'a > { w : & 'a mut W , } impl < 'a > ALST1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `TXOK1`" ]
pub type TXOK1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TXOK1`" ]
pub struct TXOK1_W < 'a > { w : & 'a mut W , } impl < 'a > TXOK1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `RQCP1`" ]
pub type RQCP1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RQCP1`" ]
pub struct RQCP1_W < 'a > { w : & 'a mut W , } impl < 'a > RQCP1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `ABRQ0`" ]
pub type ABRQ0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ABRQ0`" ]
pub struct ABRQ0_W < 'a > { w : & 'a mut W , } impl < 'a > ABRQ0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `TERR0`" ]
pub type TERR0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TERR0`" ]
pub struct TERR0_W < 'a > { w : & 'a mut W , } impl < 'a > TERR0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `ALST0`" ]
pub type ALST0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ALST0`" ]
pub struct ALST0_W < 'a > { w : & 'a mut W , } impl < 'a > ALST0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `TXOK0`" ]
pub type TXOK0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TXOK0`" ]
pub struct TXOK0_W < 'a > { w : & 'a mut W , } impl < 'a > TXOK0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `RQCP0`" ]
pub type RQCP0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RQCP0`" ]
pub struct RQCP0_W < 'a > { w : & 'a mut W , } impl < 'a > RQCP0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 31 - Lowest priority flag for mailbox 2" ]
# [ inline ( always ) ]
pub fn low2 ( & self ) -> LOW2_R { LOW2_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Lowest priority flag for mailbox 1" ]
# [ inline ( always ) ]
pub fn low1 ( & self ) -> LOW1_R { LOW1_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - Lowest priority flag for mailbox 0" ]
# [ inline ( always ) ]
pub fn low0 ( & self ) -> LOW0_R { LOW0_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Lowest priority flag for mailbox 2" ]
# [ inline ( always ) ]
pub fn tme2 ( & self ) -> TME2_R { TME2_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Lowest priority flag for mailbox 1" ]
# [ inline ( always ) ]
pub fn tme1 ( & self ) -> TME1_R { TME1_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Lowest priority flag for mailbox 0" ]
# [ inline ( always ) ]
pub fn tme0 ( & self ) -> TME0_R { TME0_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bits 24:25 - CODE" ]
# [ inline ( always ) ]
pub fn code ( & self ) -> CODE_R { CODE_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bit 23 - ABRQ2" ]
# [ inline ( always ) ]
pub fn abrq2 ( & self ) -> ABRQ2_R { ABRQ2_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - TERR2" ]
# [ inline ( always ) ]
pub fn terr2 ( & self ) -> TERR2_R { TERR2_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - ALST2" ]
# [ inline ( always ) ]
pub fn alst2 ( & self ) -> ALST2_R { ALST2_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - TXOK2" ]
# [ inline ( always ) ]
pub fn txok2 ( & self ) -> TXOK2_R { TXOK2_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - RQCP2" ]
# [ inline ( always ) ]
pub fn rqcp2 ( & self ) -> RQCP2_R { RQCP2_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - ABRQ1" ]
# [ inline ( always ) ]
pub fn abrq1 ( & self ) -> ABRQ1_R { ABRQ1_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - TERR1" ]
# [ inline ( always ) ]
pub fn terr1 ( & self ) -> TERR1_R { TERR1_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - ALST1" ]
# [ inline ( always ) ]
pub fn alst1 ( & self ) -> ALST1_R { ALST1_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - TXOK1" ]
# [ inline ( always ) ]
pub fn txok1 ( & self ) -> TXOK1_R { TXOK1_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - RQCP1" ]
# [ inline ( always ) ]
pub fn rqcp1 ( & self ) -> RQCP1_R { RQCP1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - ABRQ0" ]
# [ inline ( always ) ]
pub fn abrq0 ( & self ) -> ABRQ0_R { ABRQ0_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - TERR0" ]
# [ inline ( always ) ]
pub fn terr0 ( & self ) -> TERR0_R { TERR0_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - ALST0" ]
# [ inline ( always ) ]
pub fn alst0 ( & self ) -> ALST0_R { ALST0_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - TXOK0" ]
# [ inline ( always ) ]
pub fn txok0 ( & self ) -> TXOK0_R { TXOK0_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - RQCP0" ]
# [ inline ( always ) ]
pub fn rqcp0 ( & self ) -> RQCP0_R { RQCP0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 23 - ABRQ2" ]
# [ inline ( always ) ]
pub fn abrq2 ( & mut self ) -> ABRQ2_W { ABRQ2_W { w : self } } # [ doc = "Bit 19 - TERR2" ]
# [ inline ( always ) ]
pub fn terr2 ( & mut self ) -> TERR2_W { TERR2_W { w : self } } # [ doc = "Bit 18 - ALST2" ]
# [ inline ( always ) ]
pub fn alst2 ( & mut self ) -> ALST2_W { ALST2_W { w : self } } # [ doc = "Bit 17 - TXOK2" ]
# [ inline ( always ) ]
pub fn txok2 ( & mut self ) -> TXOK2_W { TXOK2_W { w : self } } # [ doc = "Bit 16 - RQCP2" ]
# [ inline ( always ) ]
pub fn rqcp2 ( & mut self ) -> RQCP2_W { RQCP2_W { w : self } } # [ doc = "Bit 15 - ABRQ1" ]
# [ inline ( always ) ]
pub fn abrq1 ( & mut self ) -> ABRQ1_W { ABRQ1_W { w : self } } # [ doc = "Bit 11 - TERR1" ]
# [ inline ( always ) ]
pub fn terr1 ( & mut self ) -> TERR1_W { TERR1_W { w : self } } # [ doc = "Bit 10 - ALST1" ]
# [ inline ( always ) ]
pub fn alst1 ( & mut self ) -> ALST1_W { ALST1_W { w : self } } # [ doc = "Bit 9 - TXOK1" ]
# [ inline ( always ) ]
pub fn txok1 ( & mut self ) -> TXOK1_W { TXOK1_W { w : self } } # [ doc = "Bit 8 - RQCP1" ]
# [ inline ( always ) ]
pub fn rqcp1 ( & mut self ) -> RQCP1_W { RQCP1_W { w : self } } # [ doc = "Bit 7 - ABRQ0" ]
# [ inline ( always ) ]
pub fn abrq0 ( & mut self ) -> ABRQ0_W { ABRQ0_W { w : self } } # [ doc = "Bit 3 - TERR0" ]
# [ inline ( always ) ]
pub fn terr0 ( & mut self ) -> TERR0_W { TERR0_W { w : self } } # [ doc = "Bit 2 - ALST0" ]
# [ inline ( always ) ]
pub fn alst0 ( & mut self ) -> ALST0_W { ALST0_W { w : self } } # [ doc = "Bit 1 - TXOK0" ]
# [ inline ( always ) ]
pub fn txok0 ( & mut self ) -> TXOK0_W { TXOK0_W { w : self } } # [ doc = "Bit 0 - RQCP0" ]
# [ inline ( always ) ]
pub fn rqcp0 ( & mut self ) -> RQCP0_W { RQCP0_W { w : self } } } } # [ doc = "receive FIFO 0 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfr](rfr) module" ]
pub type RFR = crate :: Reg < u32 , _RFR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RFR ; # [ doc = "`read()` method returns [rfr::R](rfr::R) reader structure" ]
impl crate :: Readable for RFR { } # [ doc = "`write(|w| ..)` method takes [rfr::W](rfr::W) writer structure" ]
impl crate :: Writable for RFR { } # [ doc = "receive FIFO 0 register" ]
pub mod rfr { # [ doc = "Reader of register RF%sR" ]
pub type R = crate :: R < u32 , super :: RFR > ; # [ doc = "Writer for register RF%sR" ]
pub type W = crate :: W < u32 , super :: RFR > ; # [ doc = "Register RF%sR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RFR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "RFOM0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RFOM_A { # [ doc = "1: Set by software to release the output mailbox of the FIFO" ]
RELEASE = 1 } impl From < RFOM_A > for bool { # [ inline ( always ) ]
fn from ( variant : RFOM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RFOM`" ]
pub type RFOM_R = crate :: R < bool , RFOM_A > ; impl RFOM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RFOM_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RFOM_A :: RELEASE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RELEASE`" ]
# [ inline ( always ) ]
pub fn is_release ( & self ) -> bool { * self == RFOM_A :: RELEASE } } # [ doc = "Write proxy for field `RFOM`" ]
pub struct RFOM_W < 'a > { w : & 'a mut W , } impl < 'a > RFOM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RFOM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set by software to release the output mailbox of the FIFO" ]
# [ inline ( always ) ]
pub fn release ( self ) -> & 'a mut W { self . variant ( RFOM_A :: RELEASE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "FOVR0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FOVR_A { # [ doc = "0: No FIFO x overrun" ]
NOOVERRUN = 0 , # [ doc = "1: FIFO x overrun" ]
OVERRUN = 1 } impl From < FOVR_A > for bool { # [ inline ( always ) ]
fn from ( variant : FOVR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FOVR`" ]
pub type FOVR_R = crate :: R < bool , FOVR_A > ; impl FOVR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FOVR_A { match self . bits { false => FOVR_A :: NOOVERRUN , true => FOVR_A :: OVERRUN } } # [ doc = "Checks if the value of the field is `NOOVERRUN`" ]
# [ inline ( always ) ]
pub fn is_no_overrun ( & self ) -> bool { * self == FOVR_A :: NOOVERRUN } # [ doc = "Checks if the value of the field is `OVERRUN`" ]
# [ inline ( always ) ]
pub fn is_overrun ( & self ) -> bool { * self == FOVR_A :: OVERRUN } } # [ doc = "FOVR0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FOVR_AW { # [ doc = "1: Clear flag" ]
CLEAR = 1 } impl From < FOVR_AW > for bool { # [ inline ( always ) ]
fn from ( variant : FOVR_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `FOVR`" ]
pub struct FOVR_W < 'a > { w : & 'a mut W , } impl < 'a > FOVR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FOVR_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( FOVR_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "FULL0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FULL_A { # [ doc = "0: FIFO x is not full" ]
NOTFULL = 0 , # [ doc = "1: FIFO x is full" ]
FULL = 1 } impl From < FULL_A > for bool { # [ inline ( always ) ]
fn from ( variant : FULL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FULL`" ]
pub type FULL_R = crate :: R < bool , FULL_A > ; impl FULL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FULL_A { match self . bits { false => FULL_A :: NOTFULL , true => FULL_A :: FULL } } # [ doc = "Checks if the value of the field is `NOTFULL`" ]
# [ inline ( always ) ]
pub fn is_not_full ( & self ) -> bool { * self == FULL_A :: NOTFULL } # [ doc = "Checks if the value of the field is `FULL`" ]
# [ inline ( always ) ]
pub fn is_full ( & self ) -> bool { * self == FULL_A :: FULL } } # [ doc = "FULL0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FULL_AW { # [ doc = "1: Clear flag" ]
CLEAR = 1 } impl From < FULL_AW > for bool { # [ inline ( always ) ]
fn from ( variant : FULL_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `FULL`" ]
pub struct FULL_W < 'a > { w : & 'a mut W , } impl < 'a > FULL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FULL_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( FULL_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `FMP`" ]
pub type FMP_R = crate :: R < u8 , u8 > ; impl R { # [ doc = "Bit 5 - RFOM0" ]
# [ inline ( always ) ]
pub fn rfom ( & self ) -> RFOM_R { RFOM_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - FOVR0" ]
# [ inline ( always ) ]
pub fn fovr ( & self ) -> FOVR_R { FOVR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - FULL0" ]
# [ inline ( always ) ]
pub fn full ( & self ) -> FULL_R { FULL_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - FMP0" ]
# [ inline ( always ) ]
pub fn fmp ( & self ) -> FMP_R { FMP_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 5 - RFOM0" ]
# [ inline ( always ) ]
pub fn rfom ( & mut self ) -> RFOM_W { RFOM_W { w : self } } # [ doc = "Bit 4 - FOVR0" ]
# [ inline ( always ) ]
pub fn fovr ( & mut self ) -> FOVR_W { FOVR_W { w : self } } # [ doc = "Bit 3 - FULL0" ]
# [ inline ( always ) ]
pub fn full ( & mut self ) -> FULL_W { FULL_W { w : self } } } } # [ doc = "interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](ier) module" ]
pub type IER = crate :: Reg < u32 , _IER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IER ; # [ doc = "`read()` method returns [ier::R](ier::R) reader structure" ]
impl crate :: Readable for IER { } # [ doc = "`write(|w| ..)` method takes [ier::W](ier::W) writer structure" ]
impl crate :: Writable for IER { } # [ doc = "interrupt enable register" ]
pub mod ier { # [ doc = "Reader of register IER" ]
pub type R = crate :: R < u32 , super :: IER > ; # [ doc = "Writer for register IER" ]
pub type W = crate :: W < u32 , super :: IER > ; # [ doc = "Register IER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "SLKIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SLKIE_A { # [ doc = "0: No interrupt when SLAKI bit is set" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when SLAKI bit is set" ]
ENABLED = 1 } impl From < SLKIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : SLKIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SLKIE`" ]
pub type SLKIE_R = crate :: R < bool , SLKIE_A > ; impl SLKIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SLKIE_A { match self . bits { false => SLKIE_A :: DISABLED , true => SLKIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SLKIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SLKIE_A :: ENABLED } } # [ doc = "Write proxy for field `SLKIE`" ]
pub struct SLKIE_W < 'a > { w : & 'a mut W , } impl < 'a > SLKIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SLKIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt when SLAKI bit is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SLKIE_A :: DISABLED ) } # [ doc = "Interrupt generated when SLAKI bit is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SLKIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "WKUIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WKUIE_A { # [ doc = "0: No interrupt when WKUI is set" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when WKUI bit is set" ]
ENABLED = 1 } impl From < WKUIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : WKUIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WKUIE`" ]
pub type WKUIE_R = crate :: R < bool , WKUIE_A > ; impl WKUIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WKUIE_A { match self . bits { false => WKUIE_A :: DISABLED , true => WKUIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == WKUIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == WKUIE_A :: ENABLED } } # [ doc = "Write proxy for field `WKUIE`" ]
pub struct WKUIE_W < 'a > { w : & 'a mut W , } impl < 'a > WKUIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WKUIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt when WKUI is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( WKUIE_A :: DISABLED ) } # [ doc = "Interrupt generated when WKUI bit is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( WKUIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "ERRIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ERRIE_A { # [ doc = "0: No interrupt will be generated when an error condition is pending in the CAN_ESR" ]
DISABLED = 0 , # [ doc = "1: An interrupt will be generation when an error condition is pending in the CAN_ESR" ]
ENABLED = 1 } impl From < ERRIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ERRIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ERRIE`" ]
pub type ERRIE_R = crate :: R < bool , ERRIE_A > ; impl ERRIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ERRIE_A { match self . bits { false => ERRIE_A :: DISABLED , true => ERRIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ERRIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ERRIE_A :: ENABLED } } # [ doc = "Write proxy for field `ERRIE`" ]
pub struct ERRIE_W < 'a > { w : & 'a mut W , } impl < 'a > ERRIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ERRIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt will be generated when an error condition is pending in the CAN_ESR" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: DISABLED ) } # [ doc = "An interrupt will be generation when an error condition is pending in the CAN_ESR" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "LECIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LECIE_A { # [ doc = "0: ERRI bit will not be set when the error code in LEC\\[2:0\\]
is set by hardware on error detection" ]
DISABLED = 0 , # [ doc = "1: ERRI bit will be set when the error code in LEC\\[2:0\\]
is set by hardware on error detection" ]
ENABLED = 1 } impl From < LECIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : LECIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LECIE`" ]
pub type LECIE_R = crate :: R < bool , LECIE_A > ; impl LECIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LECIE_A { match self . bits { false => LECIE_A :: DISABLED , true => LECIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == LECIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == LECIE_A :: ENABLED } } # [ doc = "Write proxy for field `LECIE`" ]
pub struct LECIE_W < 'a > { w : & 'a mut W , } impl < 'a > LECIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LECIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ERRI bit will not be set when the error code in LEC\\[2:0\\]
is set by hardware on error detection" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LECIE_A :: DISABLED ) } # [ doc = "ERRI bit will be set when the error code in LEC\\[2:0\\]
is set by hardware on error detection" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LECIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "BOFIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BOFIE_A { # [ doc = "0: ERRI bit will not be set when BOFF is set" ]
DISABLED = 0 , # [ doc = "1: ERRI bit will be set when BOFF is set" ]
ENABLED = 1 } impl From < BOFIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : BOFIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BOFIE`" ]
pub type BOFIE_R = crate :: R < bool , BOFIE_A > ; impl BOFIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BOFIE_A { match self . bits { false => BOFIE_A :: DISABLED , true => BOFIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == BOFIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == BOFIE_A :: ENABLED } } # [ doc = "Write proxy for field `BOFIE`" ]
pub struct BOFIE_W < 'a > { w : & 'a mut W , } impl < 'a > BOFIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BOFIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ERRI bit will not be set when BOFF is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( BOFIE_A :: DISABLED ) } # [ doc = "ERRI bit will be set when BOFF is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( BOFIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "EPVIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EPVIE_A { # [ doc = "0: ERRI bit will not be set when EPVF is set" ]
DISABLED = 0 , # [ doc = "1: ERRI bit will be set when EPVF is set" ]
ENABLED = 1 } impl From < EPVIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EPVIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EPVIE`" ]
pub type EPVIE_R = crate :: R < bool , EPVIE_A > ; impl EPVIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EPVIE_A { match self . bits { false => EPVIE_A :: DISABLED , true => EPVIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EPVIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EPVIE_A :: ENABLED } } # [ doc = "Write proxy for field `EPVIE`" ]
pub struct EPVIE_W < 'a > { w : & 'a mut W , } impl < 'a > EPVIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EPVIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ERRI bit will not be set when EPVF is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EPVIE_A :: DISABLED ) } # [ doc = "ERRI bit will be set when EPVF is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EPVIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "EWGIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EWGIE_A { # [ doc = "0: ERRI bit will not be set when EWGF is set" ]
DISABLED = 0 , # [ doc = "1: ERRI bit will be set when EWGF is set" ]
ENABLED = 1 } impl From < EWGIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EWGIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EWGIE`" ]
pub type EWGIE_R = crate :: R < bool , EWGIE_A > ; impl EWGIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EWGIE_A { match self . bits { false => EWGIE_A :: DISABLED , true => EWGIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EWGIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EWGIE_A :: ENABLED } } # [ doc = "Write proxy for field `EWGIE`" ]
pub struct EWGIE_W < 'a > { w : & 'a mut W , } impl < 'a > EWGIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EWGIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ERRI bit will not be set when EWGF is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EWGIE_A :: DISABLED ) } # [ doc = "ERRI bit will be set when EWGF is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EWGIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "FOVIE1\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FOVIE1_A { # [ doc = "0: No interrupt when FOVR is set" ]
DISABLED = 0 , # [ doc = "1: Interrupt generation when FOVR is set" ]
ENABLED = 1 } impl From < FOVIE1_A > for bool { # [ inline ( always ) ]
fn from ( variant : FOVIE1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FOVIE1`" ]
pub type FOVIE1_R = crate :: R < bool , FOVIE1_A > ; impl FOVIE1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FOVIE1_A { match self . bits { false => FOVIE1_A :: DISABLED , true => FOVIE1_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FOVIE1_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FOVIE1_A :: ENABLED } } # [ doc = "Write proxy for field `FOVIE1`" ]
pub struct FOVIE1_W < 'a > { w : & 'a mut W , } impl < 'a > FOVIE1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FOVIE1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt when FOVR is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FOVIE1_A :: DISABLED ) } # [ doc = "Interrupt generation when FOVR is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FOVIE1_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "FFIE1\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FFIE1_A { # [ doc = "0: No interrupt when FULL bit is set" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when FULL bit is set" ]
ENABLED = 1 } impl From < FFIE1_A > for bool { # [ inline ( always ) ]
fn from ( variant : FFIE1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FFIE1`" ]
pub type FFIE1_R = crate :: R < bool , FFIE1_A > ; impl FFIE1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FFIE1_A { match self . bits { false => FFIE1_A :: DISABLED , true => FFIE1_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FFIE1_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FFIE1_A :: ENABLED } } # [ doc = "Write proxy for field `FFIE1`" ]
pub struct FFIE1_W < 'a > { w : & 'a mut W , } impl < 'a > FFIE1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FFIE1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt when FULL bit is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FFIE1_A :: DISABLED ) } # [ doc = "Interrupt generated when FULL bit is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FFIE1_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "FMPIE1\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FMPIE1_A { # [ doc = "0: No interrupt generated when state of FMP\\[1:0\\]
bits are not 00b" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when state of FMP\\[1:0\\]
bits are not 00b" ]
ENABLED = 1 } impl From < FMPIE1_A > for bool { # [ inline ( always ) ]
fn from ( variant : FMPIE1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FMPIE1`" ]
pub type FMPIE1_R = crate :: R < bool , FMPIE1_A > ; impl FMPIE1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FMPIE1_A { match self . bits { false => FMPIE1_A :: DISABLED , true => FMPIE1_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FMPIE1_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FMPIE1_A :: ENABLED } } # [ doc = "Write proxy for field `FMPIE1`" ]
pub struct FMPIE1_W < 'a > { w : & 'a mut W , } impl < 'a > FMPIE1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FMPIE1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt generated when state of FMP\\[1:0\\]
bits are not 00b" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FMPIE1_A :: DISABLED ) } # [ doc = "Interrupt generated when state of FMP\\[1:0\\]
bits are not 00b" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FMPIE1_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "FOVIE0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FOVIE0_A { # [ doc = "0: No interrupt when FOVR bit is set" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when FOVR bit is set" ]
ENABLED = 1 } impl From < FOVIE0_A > for bool { # [ inline ( always ) ]
fn from ( variant : FOVIE0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FOVIE0`" ]
pub type FOVIE0_R = crate :: R < bool , FOVIE0_A > ; impl FOVIE0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FOVIE0_A { match self . bits { false => FOVIE0_A :: DISABLED , true => FOVIE0_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FOVIE0_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FOVIE0_A :: ENABLED } } # [ doc = "Write proxy for field `FOVIE0`" ]
pub struct FOVIE0_W < 'a > { w : & 'a mut W , } impl < 'a > FOVIE0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FOVIE0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt when FOVR bit is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FOVIE0_A :: DISABLED ) } # [ doc = "Interrupt generated when FOVR bit is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FOVIE0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "FFIE0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FFIE0_A { # [ doc = "0: No interrupt when FULL bit is set" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when FULL bit is set" ]
ENABLED = 1 } impl From < FFIE0_A > for bool { # [ inline ( always ) ]
fn from ( variant : FFIE0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FFIE0`" ]
pub type FFIE0_R = crate :: R < bool , FFIE0_A > ; impl FFIE0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FFIE0_A { match self . bits { false => FFIE0_A :: DISABLED , true => FFIE0_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FFIE0_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FFIE0_A :: ENABLED } } # [ doc = "Write proxy for field `FFIE0`" ]
pub struct FFIE0_W < 'a > { w : & 'a mut W , } impl < 'a > FFIE0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FFIE0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt when FULL bit is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FFIE0_A :: DISABLED ) } # [ doc = "Interrupt generated when FULL bit is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FFIE0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "FMPIE0\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FMPIE0_A { # [ doc = "0: No interrupt generated when state of FMP\\[1:0\\]
bits are not 00" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when state of FMP\\[1:0\\]
bits are not 00b" ]
ENABLED = 1 } impl From < FMPIE0_A > for bool { # [ inline ( always ) ]
fn from ( variant : FMPIE0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FMPIE0`" ]
pub type FMPIE0_R = crate :: R < bool , FMPIE0_A > ; impl FMPIE0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FMPIE0_A { match self . bits { false => FMPIE0_A :: DISABLED , true => FMPIE0_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FMPIE0_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FMPIE0_A :: ENABLED } } # [ doc = "Write proxy for field `FMPIE0`" ]
pub struct FMPIE0_W < 'a > { w : & 'a mut W , } impl < 'a > FMPIE0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FMPIE0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt generated when state of FMP\\[1:0\\]
bits are not 00" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FMPIE0_A :: DISABLED ) } # [ doc = "Interrupt generated when state of FMP\\[1:0\\]
bits are not 00b" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FMPIE0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "TMEIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TMEIE_A { # [ doc = "0: No interrupt when RQCPx bit is set" ]
DISABLED = 0 , # [ doc = "1: Interrupt generated when RQCPx bit is set" ]
ENABLED = 1 } impl From < TMEIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TMEIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TMEIE`" ]
pub type TMEIE_R = crate :: R < bool , TMEIE_A > ; impl TMEIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TMEIE_A { match self . bits { false => TMEIE_A :: DISABLED , true => TMEIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TMEIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TMEIE_A :: ENABLED } } # [ doc = "Write proxy for field `TMEIE`" ]
pub struct TMEIE_W < 'a > { w : & 'a mut W , } impl < 'a > TMEIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TMEIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No interrupt when RQCPx bit is set" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TMEIE_A :: DISABLED ) } # [ doc = "Interrupt generated when RQCPx bit is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TMEIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 17 - SLKIE" ]
# [ inline ( always ) ]
pub fn slkie ( & self ) -> SLKIE_R { SLKIE_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - WKUIE" ]
# [ inline ( always ) ]
pub fn wkuie ( & self ) -> WKUIE_R { WKUIE_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - ERRIE" ]
# [ inline ( always ) ]
pub fn errie ( & self ) -> ERRIE_R { ERRIE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - LECIE" ]
# [ inline ( always ) ]
pub fn lecie ( & self ) -> LECIE_R { LECIE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - BOFIE" ]
# [ inline ( always ) ]
pub fn bofie ( & self ) -> BOFIE_R { BOFIE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - EPVIE" ]
# [ inline ( always ) ]
pub fn epvie ( & self ) -> EPVIE_R { EPVIE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - EWGIE" ]
# [ inline ( always ) ]
pub fn ewgie ( & self ) -> EWGIE_R { EWGIE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - FOVIE1" ]
# [ inline ( always ) ]
pub fn fovie1 ( & self ) -> FOVIE1_R { FOVIE1_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - FFIE1" ]
# [ inline ( always ) ]
pub fn ffie1 ( & self ) -> FFIE1_R { FFIE1_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - FMPIE1" ]
# [ inline ( always ) ]
pub fn fmpie1 ( & self ) -> FMPIE1_R { FMPIE1_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - FOVIE0" ]
# [ inline ( always ) ]
pub fn fovie0 ( & self ) -> FOVIE0_R { FOVIE0_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - FFIE0" ]
# [ inline ( always ) ]
pub fn ffie0 ( & self ) -> FFIE0_R { FFIE0_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - FMPIE0" ]
# [ inline ( always ) ]
pub fn fmpie0 ( & self ) -> FMPIE0_R { FMPIE0_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - TMEIE" ]
# [ inline ( always ) ]
pub fn tmeie ( & self ) -> TMEIE_R { TMEIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 17 - SLKIE" ]
# [ inline ( always ) ]
pub fn slkie ( & mut self ) -> SLKIE_W { SLKIE_W { w : self } } # [ doc = "Bit 16 - WKUIE" ]
# [ inline ( always ) ]
pub fn wkuie ( & mut self ) -> WKUIE_W { WKUIE_W { w : self } } # [ doc = "Bit 15 - ERRIE" ]
# [ inline ( always ) ]
pub fn errie ( & mut self ) -> ERRIE_W { ERRIE_W { w : self } } # [ doc = "Bit 11 - LECIE" ]
# [ inline ( always ) ]
pub fn lecie ( & mut self ) -> LECIE_W { LECIE_W { w : self } } # [ doc = "Bit 10 - BOFIE" ]
# [ inline ( always ) ]
pub fn bofie ( & mut self ) -> BOFIE_W { BOFIE_W { w : self } } # [ doc = "Bit 9 - EPVIE" ]
# [ inline ( always ) ]
pub fn epvie ( & mut self ) -> EPVIE_W { EPVIE_W { w : self } } # [ doc = "Bit 8 - EWGIE" ]
# [ inline ( always ) ]
pub fn ewgie ( & mut self ) -> EWGIE_W { EWGIE_W { w : self } } # [ doc = "Bit 6 - FOVIE1" ]
# [ inline ( always ) ]
pub fn fovie1 ( & mut self ) -> FOVIE1_W { FOVIE1_W { w : self } } # [ doc = "Bit 5 - FFIE1" ]
# [ inline ( always ) ]
pub fn ffie1 ( & mut self ) -> FFIE1_W { FFIE1_W { w : self } } # [ doc = "Bit 4 - FMPIE1" ]
# [ inline ( always ) ]
pub fn fmpie1 ( & mut self ) -> FMPIE1_W { FMPIE1_W { w : self } } # [ doc = "Bit 3 - FOVIE0" ]
# [ inline ( always ) ]
pub fn fovie0 ( & mut self ) -> FOVIE0_W { FOVIE0_W { w : self } } # [ doc = "Bit 2 - FFIE0" ]
# [ inline ( always ) ]
pub fn ffie0 ( & mut self ) -> FFIE0_W { FFIE0_W { w : self } } # [ doc = "Bit 1 - FMPIE0" ]
# [ inline ( always ) ]
pub fn fmpie0 ( & mut self ) -> FMPIE0_W { FMPIE0_W { w : self } } # [ doc = "Bit 0 - TMEIE" ]
# [ inline ( always ) ]
pub fn tmeie ( & mut self ) -> TMEIE_W { TMEIE_W { w : self } } } } # [ doc = "error status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [esr](esr) module" ]
pub type ESR = crate :: Reg < u32 , _ESR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ESR ; # [ doc = "`read()` method returns [esr::R](esr::R) reader structure" ]
impl crate :: Readable for ESR { } # [ doc = "`write(|w| ..)` method takes [esr::W](esr::W) writer structure" ]
impl crate :: Writable for ESR { } # [ doc = "error status register" ]
pub mod esr { # [ doc = "Reader of register ESR" ]
pub type R = crate :: R < u32 , super :: ESR > ; # [ doc = "Writer for register ESR" ]
pub type W = crate :: W < u32 , super :: ESR > ; # [ doc = "Register ESR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ESR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `REC`" ]
pub type REC_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `TEC`" ]
pub type TEC_R = crate :: R < u8 , u8 > ; # [ doc = "LEC\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum LEC_A { # [ doc = "0: No Error" ]
NOERROR = 0 , # [ doc = "1: Stuff Error" ]
STUFF = 1 , # [ doc = "2: Form Error" ]
FORM = 2 , # [ doc = "3: Acknowledgment Error" ]
ACK = 3 , # [ doc = "4: Bit recessive Error" ]
BITRECESSIVE = 4 , # [ doc = "5: Bit dominant Error" ]
BITDOMINANT = 5 , # [ doc = "6: CRC Error" ]
CRC = 6 , # [ doc = "7: Set by software" ]
CUSTOM = 7 } impl From < LEC_A > for u8 { # [ inline ( always ) ]
fn from ( variant : LEC_A ) -> Self { variant as _ } } # [ doc = "Reader of field `LEC`" ]
pub type LEC_R = crate :: R < u8 , LEC_A > ; impl LEC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LEC_A { match self . bits { 0 => LEC_A :: NOERROR , 1 => LEC_A :: STUFF , 2 => LEC_A :: FORM , 3 => LEC_A :: ACK , 4 => LEC_A :: BITRECESSIVE , 5 => LEC_A :: BITDOMINANT , 6 => LEC_A :: CRC , 7 => LEC_A :: CUSTOM , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOERROR`" ]
# [ inline ( always ) ]
pub fn is_no_error ( & self ) -> bool { * self == LEC_A :: NOERROR } # [ doc = "Checks if the value of the field is `STUFF`" ]
# [ inline ( always ) ]
pub fn is_stuff ( & self ) -> bool { * self == LEC_A :: STUFF } # [ doc = "Checks if the value of the field is `FORM`" ]
# [ inline ( always ) ]
pub fn is_form ( & self ) -> bool { * self == LEC_A :: FORM } # [ doc = "Checks if the value of the field is `ACK`" ]
# [ inline ( always ) ]
pub fn is_ack ( & self ) -> bool { * self == LEC_A :: ACK } # [ doc = "Checks if the value of the field is `BITRECESSIVE`" ]
# [ inline ( always ) ]
pub fn is_bit_recessive ( & self ) -> bool { * self == LEC_A :: BITRECESSIVE } # [ doc = "Checks if the value of the field is `BITDOMINANT`" ]
# [ inline ( always ) ]
pub fn is_bit_dominant ( & self ) -> bool { * self == LEC_A :: BITDOMINANT } # [ doc = "Checks if the value of the field is `CRC`" ]
# [ inline ( always ) ]
pub fn is_crc ( & self ) -> bool { * self == LEC_A :: CRC } # [ doc = "Checks if the value of the field is `CUSTOM`" ]
# [ inline ( always ) ]
pub fn is_custom ( & self ) -> bool { * self == LEC_A :: CUSTOM } } # [ doc = "Write proxy for field `LEC`" ]
pub struct LEC_W < 'a > { w : & 'a mut W , } impl < 'a > LEC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LEC_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No Error" ]
# [ inline ( always ) ]
pub fn no_error ( self ) -> & 'a mut W { self . variant ( LEC_A :: NOERROR ) } # [ doc = "Stuff Error" ]
# [ inline ( always ) ]
pub fn stuff ( self ) -> & 'a mut W { self . variant ( LEC_A :: STUFF ) } # [ doc = "Form Error" ]
# [ inline ( always ) ]
pub fn form ( self ) -> & 'a mut W { self . variant ( LEC_A :: FORM ) } # [ doc = "Acknowledgment Error" ]
# [ inline ( always ) ]
pub fn ack ( self ) -> & 'a mut W { self . variant ( LEC_A :: ACK ) } # [ doc = "Bit recessive Error" ]
# [ inline ( always ) ]
pub fn bit_recessive ( self ) -> & 'a mut W { self . variant ( LEC_A :: BITRECESSIVE ) } # [ doc = "Bit dominant Error" ]
# [ inline ( always ) ]
pub fn bit_dominant ( self ) -> & 'a mut W { self . variant ( LEC_A :: BITDOMINANT ) } # [ doc = "CRC Error" ]
# [ inline ( always ) ]
pub fn crc ( self ) -> & 'a mut W { self . variant ( LEC_A :: CRC ) } # [ doc = "Set by software" ]
# [ inline ( always ) ]
pub fn custom ( self ) -> & 'a mut W { self . variant ( LEC_A :: CUSTOM ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `BOFF`" ]
pub type BOFF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `EPVF`" ]
pub type EPVF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `EWGF`" ]
pub type EWGF_R = crate :: R < bool , bool > ; impl R { # [ doc = "Bits 24:31 - REC" ]
# [ inline ( always ) ]
pub fn rec ( & self ) -> REC_R { REC_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - TEC" ]
# [ inline ( always ) ]
pub fn tec ( & self ) -> TEC_R { TEC_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:6 - LEC" ]
# [ inline ( always ) ]
pub fn lec ( & self ) -> LEC_R { LEC_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 2 - BOFF" ]
# [ inline ( always ) ]
pub fn boff ( & self ) -> BOFF_R { BOFF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - EPVF" ]
# [ inline ( always ) ]
pub fn epvf ( & self ) -> EPVF_R { EPVF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - EWGF" ]
# [ inline ( always ) ]
pub fn ewgf ( & self ) -> EWGF_R { EWGF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 4:6 - LEC" ]
# [ inline ( always ) ]
pub fn lec ( & mut self ) -> LEC_W { LEC_W { w : self } } } } # [ doc = "bit timing register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [btr](btr) module" ]
pub type BTR = crate :: Reg < u32 , _BTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BTR ; # [ doc = "`read()` method returns [btr::R](btr::R) reader structure" ]
impl crate :: Readable for BTR { } # [ doc = "`write(|w| ..)` method takes [btr::W](btr::W) writer structure" ]
impl crate :: Writable for BTR { } # [ doc = "bit timing register" ]
pub mod btr { # [ doc = "Reader of register BTR" ]
pub type R = crate :: R < u32 , super :: BTR > ; # [ doc = "Writer for register BTR" ]
pub type W = crate :: W < u32 , super :: BTR > ; # [ doc = "Register BTR `reset()`'s with value 0x0123_0000" ]
impl crate :: ResetValue for super :: BTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0123_0000 } } # [ doc = "SILM\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SILM_A { # [ doc = "0: Normal operation" ]
NORMAL = 0 , # [ doc = "1: Silent Mode" ]
SILENT = 1 } impl From < SILM_A > for bool { # [ inline ( always ) ]
fn from ( variant : SILM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SILM`" ]
pub type SILM_R = crate :: R < bool , SILM_A > ; impl SILM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SILM_A { match self . bits { false => SILM_A :: NORMAL , true => SILM_A :: SILENT } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == SILM_A :: NORMAL } # [ doc = "Checks if the value of the field is `SILENT`" ]
# [ inline ( always ) ]
pub fn is_silent ( & self ) -> bool { * self == SILM_A :: SILENT } } # [ doc = "Write proxy for field `SILM`" ]
pub struct SILM_W < 'a > { w : & 'a mut W , } impl < 'a > SILM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SILM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Normal operation" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( SILM_A :: NORMAL ) } # [ doc = "Silent Mode" ]
# [ inline ( always ) ]
pub fn silent ( self ) -> & 'a mut W { self . variant ( SILM_A :: SILENT ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "LBKM\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LBKM_A { # [ doc = "0: Loop Back Mode disabled" ]
DISABLED = 0 , # [ doc = "1: Loop Back Mode enabled" ]
ENABLED = 1 } impl From < LBKM_A > for bool { # [ inline ( always ) ]
fn from ( variant : LBKM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LBKM`" ]
pub type LBKM_R = crate :: R < bool , LBKM_A > ; impl LBKM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LBKM_A { match self . bits { false => LBKM_A :: DISABLED , true => LBKM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == LBKM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == LBKM_A :: ENABLED } } # [ doc = "Write proxy for field `LBKM`" ]
pub struct LBKM_W < 'a > { w : & 'a mut W , } impl < 'a > LBKM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LBKM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Loop Back Mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LBKM_A :: DISABLED ) } # [ doc = "Loop Back Mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LBKM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `SJW`" ]
pub type SJW_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SJW`" ]
pub struct SJW_W < 'a > { w : & 'a mut W , } impl < 'a > SJW_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Reader of field `TS2`" ]
pub type TS2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TS2`" ]
pub struct TS2_W < 'a > { w : & 'a mut W , } impl < 'a > TS2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 20 ) ) | ( ( ( value as u32 ) & 0x07 ) << 20 ) ; self . w } } # [ doc = "Reader of field `TS1`" ]
pub type TS1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TS1`" ]
pub struct TS1_W < 'a > { w : & 'a mut W , } impl < 'a > TS1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `BRP`" ]
pub type BRP_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `BRP`" ]
pub struct BRP_W < 'a > { w : & 'a mut W , } impl < 'a > BRP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03ff ) | ( ( value as u32 ) & 0x03ff ) ; self . w } } impl R { # [ doc = "Bit 31 - SILM" ]
# [ inline ( always ) ]
pub fn silm ( & self ) -> SILM_R { SILM_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - LBKM" ]
# [ inline ( always ) ]
pub fn lbkm ( & self ) -> LBKM_R { LBKM_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bits 24:25 - SJW" ]
# [ inline ( always ) ]
pub fn sjw ( & self ) -> SJW_R { SJW_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:22 - TS2" ]
# [ inline ( always ) ]
pub fn ts2 ( & self ) -> TS2_R { TS2_R :: new ( ( ( self . bits >> 20 ) & 0x07 ) as u8 ) } # [ doc = "Bits 16:19 - TS1" ]
# [ inline ( always ) ]
pub fn ts1 ( & self ) -> TS1_R { TS1_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:9 - BRP" ]
# [ inline ( always ) ]
pub fn brp ( & self ) -> BRP_R { BRP_R :: new ( ( self . bits & 0x03ff ) as u16 ) } } impl W { # [ doc = "Bit 31 - SILM" ]
# [ inline ( always ) ]
pub fn silm ( & mut self ) -> SILM_W { SILM_W { w : self } } # [ doc = "Bit 30 - LBKM" ]
# [ inline ( always ) ]
pub fn lbkm ( & mut self ) -> LBKM_W { LBKM_W { w : self } } # [ doc = "Bits 24:25 - SJW" ]
# [ inline ( always ) ]
pub fn sjw ( & mut self ) -> SJW_W { SJW_W { w : self } } # [ doc = "Bits 20:22 - TS2" ]
# [ inline ( always ) ]
pub fn ts2 ( & mut self ) -> TS2_W { TS2_W { w : self } } # [ doc = "Bits 16:19 - TS1" ]
# [ inline ( always ) ]
pub fn ts1 ( & mut self ) -> TS1_W { TS1_W { w : self } } # [ doc = "Bits 0:9 - BRP" ]
# [ inline ( always ) ]
pub fn brp ( & mut self ) -> BRP_W { BRP_W { w : self } } } } # [ doc = "filter master register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fmr](fmr) module" ]
pub type FMR = crate :: Reg < u32 , _FMR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FMR ; # [ doc = "`read()` method returns [fmr::R](fmr::R) reader structure" ]
impl crate :: Readable for FMR { } # [ doc = "`write(|w| ..)` method takes [fmr::W](fmr::W) writer structure" ]
impl crate :: Writable for FMR { } # [ doc = "filter master register" ]
pub mod fmr { # [ doc = "Reader of register FMR" ]
pub type R = crate :: R < u32 , super :: FMR > ; # [ doc = "Writer for register FMR" ]
pub type W = crate :: W < u32 , super :: FMR > ; # [ doc = "Register FMR `reset()`'s with value 0x2a1c_0e01" ]
impl crate :: ResetValue for super :: FMR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x2a1c_0e01 } } # [ doc = "Reader of field `CAN2SB`" ]
pub type CAN2SB_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CAN2SB`" ]
pub struct CAN2SB_W < 'a > { w : & 'a mut W , } impl < 'a > CAN2SB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x3f << 8 ) ) | ( ( ( value as u32 ) & 0x3f ) << 8 ) ; self . w } } # [ doc = "Reader of field `FINIT`" ]
pub type FINIT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FINIT`" ]
pub struct FINIT_W < 'a > { w : & 'a mut W , } impl < 'a > FINIT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:13 - CAN2SB" ]
# [ inline ( always ) ]
pub fn can2sb ( & self ) -> CAN2SB_R { CAN2SB_R :: new ( ( ( self . bits >> 8 ) & 0x3f ) as u8 ) } # [ doc = "Bit 0 - FINIT" ]
# [ inline ( always ) ]
pub fn finit ( & self ) -> FINIT_R { FINIT_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:13 - CAN2SB" ]
# [ inline ( always ) ]
pub fn can2sb ( & mut self ) -> CAN2SB_W { CAN2SB_W { w : self } } # [ doc = "Bit 0 - FINIT" ]
# [ inline ( always ) ]
pub fn finit ( & mut self ) -> FINIT_W { FINIT_W { w : self } } } } # [ doc = "filter mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fm1r](fm1r) module" ]
pub type FM1R = crate :: Reg < u32 , _FM1R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FM1R ; # [ doc = "`read()` method returns [fm1r::R](fm1r::R) reader structure" ]
impl crate :: Readable for FM1R { } # [ doc = "`write(|w| ..)` method takes [fm1r::W](fm1r::W) writer structure" ]
impl crate :: Writable for FM1R { } # [ doc = "filter mode register" ]
pub mod fm1r { # [ doc = "Reader of register FM1R" ]
pub type R = crate :: R < u32 , super :: FM1R > ; # [ doc = "Writer for register FM1R" ]
pub type W = crate :: W < u32 , super :: FM1R > ; # [ doc = "Register FM1R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FM1R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `FBM0`" ]
pub type FBM0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM0`" ]
pub struct FBM0_W < 'a > { w : & 'a mut W , } impl < 'a > FBM0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FBM1`" ]
pub type FBM1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM1`" ]
pub struct FBM1_W < 'a > { w : & 'a mut W , } impl < 'a > FBM1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `FBM2`" ]
pub type FBM2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM2`" ]
pub struct FBM2_W < 'a > { w : & 'a mut W , } impl < 'a > FBM2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `FBM3`" ]
pub type FBM3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM3`" ]
pub struct FBM3_W < 'a > { w : & 'a mut W , } impl < 'a > FBM3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `FBM4`" ]
pub type FBM4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM4`" ]
pub struct FBM4_W < 'a > { w : & 'a mut W , } impl < 'a > FBM4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `FBM5`" ]
pub type FBM5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM5`" ]
pub struct FBM5_W < 'a > { w : & 'a mut W , } impl < 'a > FBM5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `FBM6`" ]
pub type FBM6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM6`" ]
pub struct FBM6_W < 'a > { w : & 'a mut W , } impl < 'a > FBM6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `FBM7`" ]
pub type FBM7_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM7`" ]
pub struct FBM7_W < 'a > { w : & 'a mut W , } impl < 'a > FBM7_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `FBM8`" ]
pub type FBM8_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM8`" ]
pub struct FBM8_W < 'a > { w : & 'a mut W , } impl < 'a > FBM8_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FBM9`" ]
pub type FBM9_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM9`" ]
pub struct FBM9_W < 'a > { w : & 'a mut W , } impl < 'a > FBM9_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `FBM10`" ]
pub type FBM10_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM10`" ]
pub struct FBM10_W < 'a > { w : & 'a mut W , } impl < 'a > FBM10_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `FBM11`" ]
pub type FBM11_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM11`" ]
pub struct FBM11_W < 'a > { w : & 'a mut W , } impl < 'a > FBM11_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `FBM12`" ]
pub type FBM12_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM12`" ]
pub struct FBM12_W < 'a > { w : & 'a mut W , } impl < 'a > FBM12_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `FBM13`" ]
pub type FBM13_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM13`" ]
pub struct FBM13_W < 'a > { w : & 'a mut W , } impl < 'a > FBM13_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `FBM14`" ]
pub type FBM14_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM14`" ]
pub struct FBM14_W < 'a > { w : & 'a mut W , } impl < 'a > FBM14_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `FBM15`" ]
pub type FBM15_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM15`" ]
pub struct FBM15_W < 'a > { w : & 'a mut W , } impl < 'a > FBM15_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `FBM16`" ]
pub type FBM16_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM16`" ]
pub struct FBM16_W < 'a > { w : & 'a mut W , } impl < 'a > FBM16_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `FBM17`" ]
pub type FBM17_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM17`" ]
pub struct FBM17_W < 'a > { w : & 'a mut W , } impl < 'a > FBM17_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `FBM18`" ]
pub type FBM18_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM18`" ]
pub struct FBM18_W < 'a > { w : & 'a mut W , } impl < 'a > FBM18_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `FBM19`" ]
pub type FBM19_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM19`" ]
pub struct FBM19_W < 'a > { w : & 'a mut W , } impl < 'a > FBM19_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `FBM20`" ]
pub type FBM20_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM20`" ]
pub struct FBM20_W < 'a > { w : & 'a mut W , } impl < 'a > FBM20_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `FBM21`" ]
pub type FBM21_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM21`" ]
pub struct FBM21_W < 'a > { w : & 'a mut W , } impl < 'a > FBM21_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `FBM22`" ]
pub type FBM22_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM22`" ]
pub struct FBM22_W < 'a > { w : & 'a mut W , } impl < 'a > FBM22_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `FBM23`" ]
pub type FBM23_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM23`" ]
pub struct FBM23_W < 'a > { w : & 'a mut W , } impl < 'a > FBM23_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `FBM24`" ]
pub type FBM24_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM24`" ]
pub struct FBM24_W < 'a > { w : & 'a mut W , } impl < 'a > FBM24_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `FBM25`" ]
pub type FBM25_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM25`" ]
pub struct FBM25_W < 'a > { w : & 'a mut W , } impl < 'a > FBM25_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `FBM26`" ]
pub type FBM26_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM26`" ]
pub struct FBM26_W < 'a > { w : & 'a mut W , } impl < 'a > FBM26_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `FBM27`" ]
pub type FBM27_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FBM27`" ]
pub struct FBM27_W < 'a > { w : & 'a mut W , } impl < 'a > FBM27_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } impl R { # [ doc = "Bit 0 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm0 ( & self ) -> FBM0_R { FBM0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm1 ( & self ) -> FBM1_R { FBM1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm2 ( & self ) -> FBM2_R { FBM2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm3 ( & self ) -> FBM3_R { FBM3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm4 ( & self ) -> FBM4_R { FBM4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm5 ( & self ) -> FBM5_R { FBM5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm6 ( & self ) -> FBM6_R { FBM6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm7 ( & self ) -> FBM7_R { FBM7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm8 ( & self ) -> FBM8_R { FBM8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm9 ( & self ) -> FBM9_R { FBM9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm10 ( & self ) -> FBM10_R { FBM10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm11 ( & self ) -> FBM11_R { FBM11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm12 ( & self ) -> FBM12_R { FBM12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm13 ( & self ) -> FBM13_R { FBM13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm14 ( & self ) -> FBM14_R { FBM14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm15 ( & self ) -> FBM15_R { FBM15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm16 ( & self ) -> FBM16_R { FBM16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm17 ( & self ) -> FBM17_R { FBM17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm18 ( & self ) -> FBM18_R { FBM18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm19 ( & self ) -> FBM19_R { FBM19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm20 ( & self ) -> FBM20_R { FBM20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm21 ( & self ) -> FBM21_R { FBM21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm22 ( & self ) -> FBM22_R { FBM22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm23 ( & self ) -> FBM23_R { FBM23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm24 ( & self ) -> FBM24_R { FBM24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm25 ( & self ) -> FBM25_R { FBM25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm26 ( & self ) -> FBM26_R { FBM26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm27 ( & self ) -> FBM27_R { FBM27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm0 ( & mut self ) -> FBM0_W { FBM0_W { w : self } } # [ doc = "Bit 1 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm1 ( & mut self ) -> FBM1_W { FBM1_W { w : self } } # [ doc = "Bit 2 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm2 ( & mut self ) -> FBM2_W { FBM2_W { w : self } } # [ doc = "Bit 3 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm3 ( & mut self ) -> FBM3_W { FBM3_W { w : self } } # [ doc = "Bit 4 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm4 ( & mut self ) -> FBM4_W { FBM4_W { w : self } } # [ doc = "Bit 5 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm5 ( & mut self ) -> FBM5_W { FBM5_W { w : self } } # [ doc = "Bit 6 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm6 ( & mut self ) -> FBM6_W { FBM6_W { w : self } } # [ doc = "Bit 7 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm7 ( & mut self ) -> FBM7_W { FBM7_W { w : self } } # [ doc = "Bit 8 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm8 ( & mut self ) -> FBM8_W { FBM8_W { w : self } } # [ doc = "Bit 9 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm9 ( & mut self ) -> FBM9_W { FBM9_W { w : self } } # [ doc = "Bit 10 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm10 ( & mut self ) -> FBM10_W { FBM10_W { w : self } } # [ doc = "Bit 11 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm11 ( & mut self ) -> FBM11_W { FBM11_W { w : self } } # [ doc = "Bit 12 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm12 ( & mut self ) -> FBM12_W { FBM12_W { w : self } } # [ doc = "Bit 13 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm13 ( & mut self ) -> FBM13_W { FBM13_W { w : self } } # [ doc = "Bit 14 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm14 ( & mut self ) -> FBM14_W { FBM14_W { w : self } } # [ doc = "Bit 15 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm15 ( & mut self ) -> FBM15_W { FBM15_W { w : self } } # [ doc = "Bit 16 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm16 ( & mut self ) -> FBM16_W { FBM16_W { w : self } } # [ doc = "Bit 17 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm17 ( & mut self ) -> FBM17_W { FBM17_W { w : self } } # [ doc = "Bit 18 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm18 ( & mut self ) -> FBM18_W { FBM18_W { w : self } } # [ doc = "Bit 19 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm19 ( & mut self ) -> FBM19_W { FBM19_W { w : self } } # [ doc = "Bit 20 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm20 ( & mut self ) -> FBM20_W { FBM20_W { w : self } } # [ doc = "Bit 21 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm21 ( & mut self ) -> FBM21_W { FBM21_W { w : self } } # [ doc = "Bit 22 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm22 ( & mut self ) -> FBM22_W { FBM22_W { w : self } } # [ doc = "Bit 23 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm23 ( & mut self ) -> FBM23_W { FBM23_W { w : self } } # [ doc = "Bit 24 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm24 ( & mut self ) -> FBM24_W { FBM24_W { w : self } } # [ doc = "Bit 25 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm25 ( & mut self ) -> FBM25_W { FBM25_W { w : self } } # [ doc = "Bit 26 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm26 ( & mut self ) -> FBM26_W { FBM26_W { w : self } } # [ doc = "Bit 27 - Filter mode" ]
# [ inline ( always ) ]
pub fn fbm27 ( & mut self ) -> FBM27_W { FBM27_W { w : self } } } } # [ doc = "filter scale register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fs1r](fs1r) module" ]
pub type FS1R = crate :: Reg < u32 , _FS1R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FS1R ; # [ doc = "`read()` method returns [fs1r::R](fs1r::R) reader structure" ]
impl crate :: Readable for FS1R { } # [ doc = "`write(|w| ..)` method takes [fs1r::W](fs1r::W) writer structure" ]
impl crate :: Writable for FS1R { } # [ doc = "filter scale register" ]
pub mod fs1r { # [ doc = "Reader of register FS1R" ]
pub type R = crate :: R < u32 , super :: FS1R > ; # [ doc = "Writer for register FS1R" ]
pub type W = crate :: W < u32 , super :: FS1R > ; # [ doc = "Register FS1R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FS1R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `FSC0`" ]
pub type FSC0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC0`" ]
pub struct FSC0_W < 'a > { w : & 'a mut W , } impl < 'a > FSC0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FSC1`" ]
pub type FSC1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC1`" ]
pub struct FSC1_W < 'a > { w : & 'a mut W , } impl < 'a > FSC1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `FSC2`" ]
pub type FSC2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC2`" ]
pub struct FSC2_W < 'a > { w : & 'a mut W , } impl < 'a > FSC2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `FSC3`" ]
pub type FSC3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC3`" ]
pub struct FSC3_W < 'a > { w : & 'a mut W , } impl < 'a > FSC3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `FSC4`" ]
pub type FSC4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC4`" ]
pub struct FSC4_W < 'a > { w : & 'a mut W , } impl < 'a > FSC4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `FSC5`" ]
pub type FSC5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC5`" ]
pub struct FSC5_W < 'a > { w : & 'a mut W , } impl < 'a > FSC5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `FSC6`" ]
pub type FSC6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC6`" ]
pub struct FSC6_W < 'a > { w : & 'a mut W , } impl < 'a > FSC6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `FSC7`" ]
pub type FSC7_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC7`" ]
pub struct FSC7_W < 'a > { w : & 'a mut W , } impl < 'a > FSC7_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `FSC8`" ]
pub type FSC8_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC8`" ]
pub struct FSC8_W < 'a > { w : & 'a mut W , } impl < 'a > FSC8_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FSC9`" ]
pub type FSC9_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC9`" ]
pub struct FSC9_W < 'a > { w : & 'a mut W , } impl < 'a > FSC9_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `FSC10`" ]
pub type FSC10_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC10`" ]
pub struct FSC10_W < 'a > { w : & 'a mut W , } impl < 'a > FSC10_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `FSC11`" ]
pub type FSC11_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC11`" ]
pub struct FSC11_W < 'a > { w : & 'a mut W , } impl < 'a > FSC11_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `FSC12`" ]
pub type FSC12_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC12`" ]
pub struct FSC12_W < 'a > { w : & 'a mut W , } impl < 'a > FSC12_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `FSC13`" ]
pub type FSC13_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC13`" ]
pub struct FSC13_W < 'a > { w : & 'a mut W , } impl < 'a > FSC13_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `FSC14`" ]
pub type FSC14_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC14`" ]
pub struct FSC14_W < 'a > { w : & 'a mut W , } impl < 'a > FSC14_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `FSC15`" ]
pub type FSC15_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC15`" ]
pub struct FSC15_W < 'a > { w : & 'a mut W , } impl < 'a > FSC15_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `FSC16`" ]
pub type FSC16_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC16`" ]
pub struct FSC16_W < 'a > { w : & 'a mut W , } impl < 'a > FSC16_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `FSC17`" ]
pub type FSC17_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC17`" ]
pub struct FSC17_W < 'a > { w : & 'a mut W , } impl < 'a > FSC17_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `FSC18`" ]
pub type FSC18_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC18`" ]
pub struct FSC18_W < 'a > { w : & 'a mut W , } impl < 'a > FSC18_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `FSC19`" ]
pub type FSC19_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC19`" ]
pub struct FSC19_W < 'a > { w : & 'a mut W , } impl < 'a > FSC19_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `FSC20`" ]
pub type FSC20_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC20`" ]
pub struct FSC20_W < 'a > { w : & 'a mut W , } impl < 'a > FSC20_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `FSC21`" ]
pub type FSC21_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC21`" ]
pub struct FSC21_W < 'a > { w : & 'a mut W , } impl < 'a > FSC21_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `FSC22`" ]
pub type FSC22_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC22`" ]
pub struct FSC22_W < 'a > { w : & 'a mut W , } impl < 'a > FSC22_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `FSC23`" ]
pub type FSC23_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC23`" ]
pub struct FSC23_W < 'a > { w : & 'a mut W , } impl < 'a > FSC23_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `FSC24`" ]
pub type FSC24_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC24`" ]
pub struct FSC24_W < 'a > { w : & 'a mut W , } impl < 'a > FSC24_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `FSC25`" ]
pub type FSC25_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC25`" ]
pub struct FSC25_W < 'a > { w : & 'a mut W , } impl < 'a > FSC25_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `FSC26`" ]
pub type FSC26_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC26`" ]
pub struct FSC26_W < 'a > { w : & 'a mut W , } impl < 'a > FSC26_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `FSC27`" ]
pub type FSC27_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FSC27`" ]
pub struct FSC27_W < 'a > { w : & 'a mut W , } impl < 'a > FSC27_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } impl R { # [ doc = "Bit 0 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc0 ( & self ) -> FSC0_R { FSC0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc1 ( & self ) -> FSC1_R { FSC1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc2 ( & self ) -> FSC2_R { FSC2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc3 ( & self ) -> FSC3_R { FSC3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc4 ( & self ) -> FSC4_R { FSC4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc5 ( & self ) -> FSC5_R { FSC5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc6 ( & self ) -> FSC6_R { FSC6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc7 ( & self ) -> FSC7_R { FSC7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc8 ( & self ) -> FSC8_R { FSC8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc9 ( & self ) -> FSC9_R { FSC9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc10 ( & self ) -> FSC10_R { FSC10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc11 ( & self ) -> FSC11_R { FSC11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc12 ( & self ) -> FSC12_R { FSC12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc13 ( & self ) -> FSC13_R { FSC13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc14 ( & self ) -> FSC14_R { FSC14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc15 ( & self ) -> FSC15_R { FSC15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc16 ( & self ) -> FSC16_R { FSC16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc17 ( & self ) -> FSC17_R { FSC17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc18 ( & self ) -> FSC18_R { FSC18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc19 ( & self ) -> FSC19_R { FSC19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc20 ( & self ) -> FSC20_R { FSC20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc21 ( & self ) -> FSC21_R { FSC21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc22 ( & self ) -> FSC22_R { FSC22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc23 ( & self ) -> FSC23_R { FSC23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc24 ( & self ) -> FSC24_R { FSC24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc25 ( & self ) -> FSC25_R { FSC25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc26 ( & self ) -> FSC26_R { FSC26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc27 ( & self ) -> FSC27_R { FSC27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc0 ( & mut self ) -> FSC0_W { FSC0_W { w : self } } # [ doc = "Bit 1 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc1 ( & mut self ) -> FSC1_W { FSC1_W { w : self } } # [ doc = "Bit 2 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc2 ( & mut self ) -> FSC2_W { FSC2_W { w : self } } # [ doc = "Bit 3 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc3 ( & mut self ) -> FSC3_W { FSC3_W { w : self } } # [ doc = "Bit 4 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc4 ( & mut self ) -> FSC4_W { FSC4_W { w : self } } # [ doc = "Bit 5 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc5 ( & mut self ) -> FSC5_W { FSC5_W { w : self } } # [ doc = "Bit 6 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc6 ( & mut self ) -> FSC6_W { FSC6_W { w : self } } # [ doc = "Bit 7 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc7 ( & mut self ) -> FSC7_W { FSC7_W { w : self } } # [ doc = "Bit 8 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc8 ( & mut self ) -> FSC8_W { FSC8_W { w : self } } # [ doc = "Bit 9 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc9 ( & mut self ) -> FSC9_W { FSC9_W { w : self } } # [ doc = "Bit 10 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc10 ( & mut self ) -> FSC10_W { FSC10_W { w : self } } # [ doc = "Bit 11 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc11 ( & mut self ) -> FSC11_W { FSC11_W { w : self } } # [ doc = "Bit 12 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc12 ( & mut self ) -> FSC12_W { FSC12_W { w : self } } # [ doc = "Bit 13 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc13 ( & mut self ) -> FSC13_W { FSC13_W { w : self } } # [ doc = "Bit 14 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc14 ( & mut self ) -> FSC14_W { FSC14_W { w : self } } # [ doc = "Bit 15 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc15 ( & mut self ) -> FSC15_W { FSC15_W { w : self } } # [ doc = "Bit 16 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc16 ( & mut self ) -> FSC16_W { FSC16_W { w : self } } # [ doc = "Bit 17 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc17 ( & mut self ) -> FSC17_W { FSC17_W { w : self } } # [ doc = "Bit 18 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc18 ( & mut self ) -> FSC18_W { FSC18_W { w : self } } # [ doc = "Bit 19 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc19 ( & mut self ) -> FSC19_W { FSC19_W { w : self } } # [ doc = "Bit 20 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc20 ( & mut self ) -> FSC20_W { FSC20_W { w : self } } # [ doc = "Bit 21 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc21 ( & mut self ) -> FSC21_W { FSC21_W { w : self } } # [ doc = "Bit 22 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc22 ( & mut self ) -> FSC22_W { FSC22_W { w : self } } # [ doc = "Bit 23 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc23 ( & mut self ) -> FSC23_W { FSC23_W { w : self } } # [ doc = "Bit 24 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc24 ( & mut self ) -> FSC24_W { FSC24_W { w : self } } # [ doc = "Bit 25 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc25 ( & mut self ) -> FSC25_W { FSC25_W { w : self } } # [ doc = "Bit 26 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc26 ( & mut self ) -> FSC26_W { FSC26_W { w : self } } # [ doc = "Bit 27 - Filter scale configuration" ]
# [ inline ( always ) ]
pub fn fsc27 ( & mut self ) -> FSC27_W { FSC27_W { w : self } } } } # [ doc = "filter FIFO assignment register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ffa1r](ffa1r) module" ]
pub type FFA1R = crate :: Reg < u32 , _FFA1R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FFA1R ; # [ doc = "`read()` method returns [ffa1r::R](ffa1r::R) reader structure" ]
impl crate :: Readable for FFA1R { } # [ doc = "`write(|w| ..)` method takes [ffa1r::W](ffa1r::W) writer structure" ]
impl crate :: Writable for FFA1R { } # [ doc = "filter FIFO assignment register" ]
pub mod ffa1r { # [ doc = "Reader of register FFA1R" ]
pub type R = crate :: R < u32 , super :: FFA1R > ; # [ doc = "Writer for register FFA1R" ]
pub type W = crate :: W < u32 , super :: FFA1R > ; # [ doc = "Register FFA1R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FFA1R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `FFA0`" ]
pub type FFA0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA0`" ]
pub struct FFA0_W < 'a > { w : & 'a mut W , } impl < 'a > FFA0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FFA1`" ]
pub type FFA1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA1`" ]
pub struct FFA1_W < 'a > { w : & 'a mut W , } impl < 'a > FFA1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `FFA2`" ]
pub type FFA2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA2`" ]
pub struct FFA2_W < 'a > { w : & 'a mut W , } impl < 'a > FFA2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `FFA3`" ]
pub type FFA3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA3`" ]
pub struct FFA3_W < 'a > { w : & 'a mut W , } impl < 'a > FFA3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `FFA4`" ]
pub type FFA4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA4`" ]
pub struct FFA4_W < 'a > { w : & 'a mut W , } impl < 'a > FFA4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `FFA5`" ]
pub type FFA5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA5`" ]
pub struct FFA5_W < 'a > { w : & 'a mut W , } impl < 'a > FFA5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `FFA6`" ]
pub type FFA6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA6`" ]
pub struct FFA6_W < 'a > { w : & 'a mut W , } impl < 'a > FFA6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `FFA7`" ]
pub type FFA7_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA7`" ]
pub struct FFA7_W < 'a > { w : & 'a mut W , } impl < 'a > FFA7_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `FFA8`" ]
pub type FFA8_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA8`" ]
pub struct FFA8_W < 'a > { w : & 'a mut W , } impl < 'a > FFA8_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FFA9`" ]
pub type FFA9_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA9`" ]
pub struct FFA9_W < 'a > { w : & 'a mut W , } impl < 'a > FFA9_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `FFA10`" ]
pub type FFA10_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA10`" ]
pub struct FFA10_W < 'a > { w : & 'a mut W , } impl < 'a > FFA10_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `FFA11`" ]
pub type FFA11_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA11`" ]
pub struct FFA11_W < 'a > { w : & 'a mut W , } impl < 'a > FFA11_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `FFA12`" ]
pub type FFA12_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA12`" ]
pub struct FFA12_W < 'a > { w : & 'a mut W , } impl < 'a > FFA12_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `FFA13`" ]
pub type FFA13_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA13`" ]
pub struct FFA13_W < 'a > { w : & 'a mut W , } impl < 'a > FFA13_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `FFA14`" ]
pub type FFA14_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA14`" ]
pub struct FFA14_W < 'a > { w : & 'a mut W , } impl < 'a > FFA14_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `FFA15`" ]
pub type FFA15_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA15`" ]
pub struct FFA15_W < 'a > { w : & 'a mut W , } impl < 'a > FFA15_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `FFA16`" ]
pub type FFA16_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA16`" ]
pub struct FFA16_W < 'a > { w : & 'a mut W , } impl < 'a > FFA16_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `FFA17`" ]
pub type FFA17_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA17`" ]
pub struct FFA17_W < 'a > { w : & 'a mut W , } impl < 'a > FFA17_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `FFA18`" ]
pub type FFA18_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA18`" ]
pub struct FFA18_W < 'a > { w : & 'a mut W , } impl < 'a > FFA18_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `FFA19`" ]
pub type FFA19_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA19`" ]
pub struct FFA19_W < 'a > { w : & 'a mut W , } impl < 'a > FFA19_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `FFA20`" ]
pub type FFA20_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA20`" ]
pub struct FFA20_W < 'a > { w : & 'a mut W , } impl < 'a > FFA20_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `FFA21`" ]
pub type FFA21_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA21`" ]
pub struct FFA21_W < 'a > { w : & 'a mut W , } impl < 'a > FFA21_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `FFA22`" ]
pub type FFA22_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA22`" ]
pub struct FFA22_W < 'a > { w : & 'a mut W , } impl < 'a > FFA22_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `FFA23`" ]
pub type FFA23_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA23`" ]
pub struct FFA23_W < 'a > { w : & 'a mut W , } impl < 'a > FFA23_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `FFA24`" ]
pub type FFA24_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA24`" ]
pub struct FFA24_W < 'a > { w : & 'a mut W , } impl < 'a > FFA24_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `FFA25`" ]
pub type FFA25_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA25`" ]
pub struct FFA25_W < 'a > { w : & 'a mut W , } impl < 'a > FFA25_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `FFA26`" ]
pub type FFA26_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA26`" ]
pub struct FFA26_W < 'a > { w : & 'a mut W , } impl < 'a > FFA26_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `FFA27`" ]
pub type FFA27_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FFA27`" ]
pub struct FFA27_W < 'a > { w : & 'a mut W , } impl < 'a > FFA27_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } impl R { # [ doc = "Bit 0 - Filter FIFO assignment for filter 0" ]
# [ inline ( always ) ]
pub fn ffa0 ( & self ) -> FFA0_R { FFA0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Filter FIFO assignment for filter 1" ]
# [ inline ( always ) ]
pub fn ffa1 ( & self ) -> FFA1_R { FFA1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Filter FIFO assignment for filter 2" ]
# [ inline ( always ) ]
pub fn ffa2 ( & self ) -> FFA2_R { FFA2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Filter FIFO assignment for filter 3" ]
# [ inline ( always ) ]
pub fn ffa3 ( & self ) -> FFA3_R { FFA3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Filter FIFO assignment for filter 4" ]
# [ inline ( always ) ]
pub fn ffa4 ( & self ) -> FFA4_R { FFA4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Filter FIFO assignment for filter 5" ]
# [ inline ( always ) ]
pub fn ffa5 ( & self ) -> FFA5_R { FFA5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Filter FIFO assignment for filter 6" ]
# [ inline ( always ) ]
pub fn ffa6 ( & self ) -> FFA6_R { FFA6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Filter FIFO assignment for filter 7" ]
# [ inline ( always ) ]
pub fn ffa7 ( & self ) -> FFA7_R { FFA7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Filter FIFO assignment for filter 8" ]
# [ inline ( always ) ]
pub fn ffa8 ( & self ) -> FFA8_R { FFA8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Filter FIFO assignment for filter 9" ]
# [ inline ( always ) ]
pub fn ffa9 ( & self ) -> FFA9_R { FFA9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Filter FIFO assignment for filter 10" ]
# [ inline ( always ) ]
pub fn ffa10 ( & self ) -> FFA10_R { FFA10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Filter FIFO assignment for filter 11" ]
# [ inline ( always ) ]
pub fn ffa11 ( & self ) -> FFA11_R { FFA11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Filter FIFO assignment for filter 12" ]
# [ inline ( always ) ]
pub fn ffa12 ( & self ) -> FFA12_R { FFA12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Filter FIFO assignment for filter 13" ]
# [ inline ( always ) ]
pub fn ffa13 ( & self ) -> FFA13_R { FFA13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Filter FIFO assignment for filter 14" ]
# [ inline ( always ) ]
pub fn ffa14 ( & self ) -> FFA14_R { FFA14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Filter FIFO assignment for filter 15" ]
# [ inline ( always ) ]
pub fn ffa15 ( & self ) -> FFA15_R { FFA15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Filter FIFO assignment for filter 16" ]
# [ inline ( always ) ]
pub fn ffa16 ( & self ) -> FFA16_R { FFA16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Filter FIFO assignment for filter 17" ]
# [ inline ( always ) ]
pub fn ffa17 ( & self ) -> FFA17_R { FFA17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Filter FIFO assignment for filter 18" ]
# [ inline ( always ) ]
pub fn ffa18 ( & self ) -> FFA18_R { FFA18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Filter FIFO assignment for filter 19" ]
# [ inline ( always ) ]
pub fn ffa19 ( & self ) -> FFA19_R { FFA19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Filter FIFO assignment for filter 20" ]
# [ inline ( always ) ]
pub fn ffa20 ( & self ) -> FFA20_R { FFA20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Filter FIFO assignment for filter 21" ]
# [ inline ( always ) ]
pub fn ffa21 ( & self ) -> FFA21_R { FFA21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Filter FIFO assignment for filter 22" ]
# [ inline ( always ) ]
pub fn ffa22 ( & self ) -> FFA22_R { FFA22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Filter FIFO assignment for filter 23" ]
# [ inline ( always ) ]
pub fn ffa23 ( & self ) -> FFA23_R { FFA23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Filter FIFO assignment for filter 24" ]
# [ inline ( always ) ]
pub fn ffa24 ( & self ) -> FFA24_R { FFA24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Filter FIFO assignment for filter 25" ]
# [ inline ( always ) ]
pub fn ffa25 ( & self ) -> FFA25_R { FFA25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Filter FIFO assignment for filter 26" ]
# [ inline ( always ) ]
pub fn ffa26 ( & self ) -> FFA26_R { FFA26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Filter FIFO assignment for filter 27" ]
# [ inline ( always ) ]
pub fn ffa27 ( & self ) -> FFA27_R { FFA27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Filter FIFO assignment for filter 0" ]
# [ inline ( always ) ]
pub fn ffa0 ( & mut self ) -> FFA0_W { FFA0_W { w : self } } # [ doc = "Bit 1 - Filter FIFO assignment for filter 1" ]
# [ inline ( always ) ]
pub fn ffa1 ( & mut self ) -> FFA1_W { FFA1_W { w : self } } # [ doc = "Bit 2 - Filter FIFO assignment for filter 2" ]
# [ inline ( always ) ]
pub fn ffa2 ( & mut self ) -> FFA2_W { FFA2_W { w : self } } # [ doc = "Bit 3 - Filter FIFO assignment for filter 3" ]
# [ inline ( always ) ]
pub fn ffa3 ( & mut self ) -> FFA3_W { FFA3_W { w : self } } # [ doc = "Bit 4 - Filter FIFO assignment for filter 4" ]
# [ inline ( always ) ]
pub fn ffa4 ( & mut self ) -> FFA4_W { FFA4_W { w : self } } # [ doc = "Bit 5 - Filter FIFO assignment for filter 5" ]
# [ inline ( always ) ]
pub fn ffa5 ( & mut self ) -> FFA5_W { FFA5_W { w : self } } # [ doc = "Bit 6 - Filter FIFO assignment for filter 6" ]
# [ inline ( always ) ]
pub fn ffa6 ( & mut self ) -> FFA6_W { FFA6_W { w : self } } # [ doc = "Bit 7 - Filter FIFO assignment for filter 7" ]
# [ inline ( always ) ]
pub fn ffa7 ( & mut self ) -> FFA7_W { FFA7_W { w : self } } # [ doc = "Bit 8 - Filter FIFO assignment for filter 8" ]
# [ inline ( always ) ]
pub fn ffa8 ( & mut self ) -> FFA8_W { FFA8_W { w : self } } # [ doc = "Bit 9 - Filter FIFO assignment for filter 9" ]
# [ inline ( always ) ]
pub fn ffa9 ( & mut self ) -> FFA9_W { FFA9_W { w : self } } # [ doc = "Bit 10 - Filter FIFO assignment for filter 10" ]
# [ inline ( always ) ]
pub fn ffa10 ( & mut self ) -> FFA10_W { FFA10_W { w : self } } # [ doc = "Bit 11 - Filter FIFO assignment for filter 11" ]
# [ inline ( always ) ]
pub fn ffa11 ( & mut self ) -> FFA11_W { FFA11_W { w : self } } # [ doc = "Bit 12 - Filter FIFO assignment for filter 12" ]
# [ inline ( always ) ]
pub fn ffa12 ( & mut self ) -> FFA12_W { FFA12_W { w : self } } # [ doc = "Bit 13 - Filter FIFO assignment for filter 13" ]
# [ inline ( always ) ]
pub fn ffa13 ( & mut self ) -> FFA13_W { FFA13_W { w : self } } # [ doc = "Bit 14 - Filter FIFO assignment for filter 14" ]
# [ inline ( always ) ]
pub fn ffa14 ( & mut self ) -> FFA14_W { FFA14_W { w : self } } # [ doc = "Bit 15 - Filter FIFO assignment for filter 15" ]
# [ inline ( always ) ]
pub fn ffa15 ( & mut self ) -> FFA15_W { FFA15_W { w : self } } # [ doc = "Bit 16 - Filter FIFO assignment for filter 16" ]
# [ inline ( always ) ]
pub fn ffa16 ( & mut self ) -> FFA16_W { FFA16_W { w : self } } # [ doc = "Bit 17 - Filter FIFO assignment for filter 17" ]
# [ inline ( always ) ]
pub fn ffa17 ( & mut self ) -> FFA17_W { FFA17_W { w : self } } # [ doc = "Bit 18 - Filter FIFO assignment for filter 18" ]
# [ inline ( always ) ]
pub fn ffa18 ( & mut self ) -> FFA18_W { FFA18_W { w : self } } # [ doc = "Bit 19 - Filter FIFO assignment for filter 19" ]
# [ inline ( always ) ]
pub fn ffa19 ( & mut self ) -> FFA19_W { FFA19_W { w : self } } # [ doc = "Bit 20 - Filter FIFO assignment for filter 20" ]
# [ inline ( always ) ]
pub fn ffa20 ( & mut self ) -> FFA20_W { FFA20_W { w : self } } # [ doc = "Bit 21 - Filter FIFO assignment for filter 21" ]
# [ inline ( always ) ]
pub fn ffa21 ( & mut self ) -> FFA21_W { FFA21_W { w : self } } # [ doc = "Bit 22 - Filter FIFO assignment for filter 22" ]
# [ inline ( always ) ]
pub fn ffa22 ( & mut self ) -> FFA22_W { FFA22_W { w : self } } # [ doc = "Bit 23 - Filter FIFO assignment for filter 23" ]
# [ inline ( always ) ]
pub fn ffa23 ( & mut self ) -> FFA23_W { FFA23_W { w : self } } # [ doc = "Bit 24 - Filter FIFO assignment for filter 24" ]
# [ inline ( always ) ]
pub fn ffa24 ( & mut self ) -> FFA24_W { FFA24_W { w : self } } # [ doc = "Bit 25 - Filter FIFO assignment for filter 25" ]
# [ inline ( always ) ]
pub fn ffa25 ( & mut self ) -> FFA25_W { FFA25_W { w : self } } # [ doc = "Bit 26 - Filter FIFO assignment for filter 26" ]
# [ inline ( always ) ]
pub fn ffa26 ( & mut self ) -> FFA26_W { FFA26_W { w : self } } # [ doc = "Bit 27 - Filter FIFO assignment for filter 27" ]
# [ inline ( always ) ]
pub fn ffa27 ( & mut self ) -> FFA27_W { FFA27_W { w : self } } } } # [ doc = "CAN filter activation register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fa1r](fa1r) module" ]
pub type FA1R = crate :: Reg < u32 , _FA1R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FA1R ; # [ doc = "`read()` method returns [fa1r::R](fa1r::R) reader structure" ]
impl crate :: Readable for FA1R { } # [ doc = "`write(|w| ..)` method takes [fa1r::W](fa1r::W) writer structure" ]
impl crate :: Writable for FA1R { } # [ doc = "CAN filter activation register" ]
pub mod fa1r { # [ doc = "Reader of register FA1R" ]
pub type R = crate :: R < u32 , super :: FA1R > ; # [ doc = "Writer for register FA1R" ]
pub type W = crate :: W < u32 , super :: FA1R > ; # [ doc = "Register FA1R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FA1R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `FACT0`" ]
pub type FACT0_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT0`" ]
pub struct FACT0_W < 'a > { w : & 'a mut W , } impl < 'a > FACT0_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FACT1`" ]
pub type FACT1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT1`" ]
pub struct FACT1_W < 'a > { w : & 'a mut W , } impl < 'a > FACT1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `FACT2`" ]
pub type FACT2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT2`" ]
pub struct FACT2_W < 'a > { w : & 'a mut W , } impl < 'a > FACT2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `FACT3`" ]
pub type FACT3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT3`" ]
pub struct FACT3_W < 'a > { w : & 'a mut W , } impl < 'a > FACT3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `FACT4`" ]
pub type FACT4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT4`" ]
pub struct FACT4_W < 'a > { w : & 'a mut W , } impl < 'a > FACT4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `FACT5`" ]
pub type FACT5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT5`" ]
pub struct FACT5_W < 'a > { w : & 'a mut W , } impl < 'a > FACT5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `FACT6`" ]
pub type FACT6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT6`" ]
pub struct FACT6_W < 'a > { w : & 'a mut W , } impl < 'a > FACT6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `FACT7`" ]
pub type FACT7_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT7`" ]
pub struct FACT7_W < 'a > { w : & 'a mut W , } impl < 'a > FACT7_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `FACT8`" ]
pub type FACT8_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT8`" ]
pub struct FACT8_W < 'a > { w : & 'a mut W , } impl < 'a > FACT8_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FACT9`" ]
pub type FACT9_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT9`" ]
pub struct FACT9_W < 'a > { w : & 'a mut W , } impl < 'a > FACT9_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `FACT10`" ]
pub type FACT10_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT10`" ]
pub struct FACT10_W < 'a > { w : & 'a mut W , } impl < 'a > FACT10_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `FACT11`" ]
pub type FACT11_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT11`" ]
pub struct FACT11_W < 'a > { w : & 'a mut W , } impl < 'a > FACT11_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `FACT12`" ]
pub type FACT12_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT12`" ]
pub struct FACT12_W < 'a > { w : & 'a mut W , } impl < 'a > FACT12_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `FACT13`" ]
pub type FACT13_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT13`" ]
pub struct FACT13_W < 'a > { w : & 'a mut W , } impl < 'a > FACT13_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `FACT14`" ]
pub type FACT14_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT14`" ]
pub struct FACT14_W < 'a > { w : & 'a mut W , } impl < 'a > FACT14_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `FACT15`" ]
pub type FACT15_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT15`" ]
pub struct FACT15_W < 'a > { w : & 'a mut W , } impl < 'a > FACT15_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `FACT16`" ]
pub type FACT16_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT16`" ]
pub struct FACT16_W < 'a > { w : & 'a mut W , } impl < 'a > FACT16_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `FACT17`" ]
pub type FACT17_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT17`" ]
pub struct FACT17_W < 'a > { w : & 'a mut W , } impl < 'a > FACT17_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `FACT18`" ]
pub type FACT18_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT18`" ]
pub struct FACT18_W < 'a > { w : & 'a mut W , } impl < 'a > FACT18_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `FACT19`" ]
pub type FACT19_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT19`" ]
pub struct FACT19_W < 'a > { w : & 'a mut W , } impl < 'a > FACT19_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `FACT20`" ]
pub type FACT20_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT20`" ]
pub struct FACT20_W < 'a > { w : & 'a mut W , } impl < 'a > FACT20_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `FACT21`" ]
pub type FACT21_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT21`" ]
pub struct FACT21_W < 'a > { w : & 'a mut W , } impl < 'a > FACT21_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `FACT22`" ]
pub type FACT22_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT22`" ]
pub struct FACT22_W < 'a > { w : & 'a mut W , } impl < 'a > FACT22_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `FACT23`" ]
pub type FACT23_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT23`" ]
pub struct FACT23_W < 'a > { w : & 'a mut W , } impl < 'a > FACT23_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `FACT24`" ]
pub type FACT24_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT24`" ]
pub struct FACT24_W < 'a > { w : & 'a mut W , } impl < 'a > FACT24_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `FACT25`" ]
pub type FACT25_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT25`" ]
pub struct FACT25_W < 'a > { w : & 'a mut W , } impl < 'a > FACT25_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `FACT26`" ]
pub type FACT26_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT26`" ]
pub struct FACT26_W < 'a > { w : & 'a mut W , } impl < 'a > FACT26_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `FACT27`" ]
pub type FACT27_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACT27`" ]
pub struct FACT27_W < 'a > { w : & 'a mut W , } impl < 'a > FACT27_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } impl R { # [ doc = "Bit 0 - Filter active" ]
# [ inline ( always ) ]
pub fn fact0 ( & self ) -> FACT0_R { FACT0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Filter active" ]
# [ inline ( always ) ]
pub fn fact1 ( & self ) -> FACT1_R { FACT1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Filter active" ]
# [ inline ( always ) ]
pub fn fact2 ( & self ) -> FACT2_R { FACT2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Filter active" ]
# [ inline ( always ) ]
pub fn fact3 ( & self ) -> FACT3_R { FACT3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Filter active" ]
# [ inline ( always ) ]
pub fn fact4 ( & self ) -> FACT4_R { FACT4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Filter active" ]
# [ inline ( always ) ]
pub fn fact5 ( & self ) -> FACT5_R { FACT5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Filter active" ]
# [ inline ( always ) ]
pub fn fact6 ( & self ) -> FACT6_R { FACT6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Filter active" ]
# [ inline ( always ) ]
pub fn fact7 ( & self ) -> FACT7_R { FACT7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Filter active" ]
# [ inline ( always ) ]
pub fn fact8 ( & self ) -> FACT8_R { FACT8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Filter active" ]
# [ inline ( always ) ]
pub fn fact9 ( & self ) -> FACT9_R { FACT9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Filter active" ]
# [ inline ( always ) ]
pub fn fact10 ( & self ) -> FACT10_R { FACT10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Filter active" ]
# [ inline ( always ) ]
pub fn fact11 ( & self ) -> FACT11_R { FACT11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Filter active" ]
# [ inline ( always ) ]
pub fn fact12 ( & self ) -> FACT12_R { FACT12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Filter active" ]
# [ inline ( always ) ]
pub fn fact13 ( & self ) -> FACT13_R { FACT13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Filter active" ]
# [ inline ( always ) ]
pub fn fact14 ( & self ) -> FACT14_R { FACT14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Filter active" ]
# [ inline ( always ) ]
pub fn fact15 ( & self ) -> FACT15_R { FACT15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Filter active" ]
# [ inline ( always ) ]
pub fn fact16 ( & self ) -> FACT16_R { FACT16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Filter active" ]
# [ inline ( always ) ]
pub fn fact17 ( & self ) -> FACT17_R { FACT17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Filter active" ]
# [ inline ( always ) ]
pub fn fact18 ( & self ) -> FACT18_R { FACT18_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Filter active" ]
# [ inline ( always ) ]
pub fn fact19 ( & self ) -> FACT19_R { FACT19_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Filter active" ]
# [ inline ( always ) ]
pub fn fact20 ( & self ) -> FACT20_R { FACT20_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Filter active" ]
# [ inline ( always ) ]
pub fn fact21 ( & self ) -> FACT21_R { FACT21_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Filter active" ]
# [ inline ( always ) ]
pub fn fact22 ( & self ) -> FACT22_R { FACT22_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Filter active" ]
# [ inline ( always ) ]
pub fn fact23 ( & self ) -> FACT23_R { FACT23_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Filter active" ]
# [ inline ( always ) ]
pub fn fact24 ( & self ) -> FACT24_R { FACT24_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Filter active" ]
# [ inline ( always ) ]
pub fn fact25 ( & self ) -> FACT25_R { FACT25_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Filter active" ]
# [ inline ( always ) ]
pub fn fact26 ( & self ) -> FACT26_R { FACT26_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Filter active" ]
# [ inline ( always ) ]
pub fn fact27 ( & self ) -> FACT27_R { FACT27_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Filter active" ]
# [ inline ( always ) ]
pub fn fact0 ( & mut self ) -> FACT0_W { FACT0_W { w : self } } # [ doc = "Bit 1 - Filter active" ]
# [ inline ( always ) ]
pub fn fact1 ( & mut self ) -> FACT1_W { FACT1_W { w : self } } # [ doc = "Bit 2 - Filter active" ]
# [ inline ( always ) ]
pub fn fact2 ( & mut self ) -> FACT2_W { FACT2_W { w : self } } # [ doc = "Bit 3 - Filter active" ]
# [ inline ( always ) ]
pub fn fact3 ( & mut self ) -> FACT3_W { FACT3_W { w : self } } # [ doc = "Bit 4 - Filter active" ]
# [ inline ( always ) ]
pub fn fact4 ( & mut self ) -> FACT4_W { FACT4_W { w : self } } # [ doc = "Bit 5 - Filter active" ]
# [ inline ( always ) ]
pub fn fact5 ( & mut self ) -> FACT5_W { FACT5_W { w : self } } # [ doc = "Bit 6 - Filter active" ]
# [ inline ( always ) ]
pub fn fact6 ( & mut self ) -> FACT6_W { FACT6_W { w : self } } # [ doc = "Bit 7 - Filter active" ]
# [ inline ( always ) ]
pub fn fact7 ( & mut self ) -> FACT7_W { FACT7_W { w : self } } # [ doc = "Bit 8 - Filter active" ]
# [ inline ( always ) ]
pub fn fact8 ( & mut self ) -> FACT8_W { FACT8_W { w : self } } # [ doc = "Bit 9 - Filter active" ]
# [ inline ( always ) ]
pub fn fact9 ( & mut self ) -> FACT9_W { FACT9_W { w : self } } # [ doc = "Bit 10 - Filter active" ]
# [ inline ( always ) ]
pub fn fact10 ( & mut self ) -> FACT10_W { FACT10_W { w : self } } # [ doc = "Bit 11 - Filter active" ]
# [ inline ( always ) ]
pub fn fact11 ( & mut self ) -> FACT11_W { FACT11_W { w : self } } # [ doc = "Bit 12 - Filter active" ]
# [ inline ( always ) ]
pub fn fact12 ( & mut self ) -> FACT12_W { FACT12_W { w : self } } # [ doc = "Bit 13 - Filter active" ]
# [ inline ( always ) ]
pub fn fact13 ( & mut self ) -> FACT13_W { FACT13_W { w : self } } # [ doc = "Bit 14 - Filter active" ]
# [ inline ( always ) ]
pub fn fact14 ( & mut self ) -> FACT14_W { FACT14_W { w : self } } # [ doc = "Bit 15 - Filter active" ]
# [ inline ( always ) ]
pub fn fact15 ( & mut self ) -> FACT15_W { FACT15_W { w : self } } # [ doc = "Bit 16 - Filter active" ]
# [ inline ( always ) ]
pub fn fact16 ( & mut self ) -> FACT16_W { FACT16_W { w : self } } # [ doc = "Bit 17 - Filter active" ]
# [ inline ( always ) ]
pub fn fact17 ( & mut self ) -> FACT17_W { FACT17_W { w : self } } # [ doc = "Bit 18 - Filter active" ]
# [ inline ( always ) ]
pub fn fact18 ( & mut self ) -> FACT18_W { FACT18_W { w : self } } # [ doc = "Bit 19 - Filter active" ]
# [ inline ( always ) ]
pub fn fact19 ( & mut self ) -> FACT19_W { FACT19_W { w : self } } # [ doc = "Bit 20 - Filter active" ]
# [ inline ( always ) ]
pub fn fact20 ( & mut self ) -> FACT20_W { FACT20_W { w : self } } # [ doc = "Bit 21 - Filter active" ]
# [ inline ( always ) ]
pub fn fact21 ( & mut self ) -> FACT21_W { FACT21_W { w : self } } # [ doc = "Bit 22 - Filter active" ]
# [ inline ( always ) ]
pub fn fact22 ( & mut self ) -> FACT22_W { FACT22_W { w : self } } # [ doc = "Bit 23 - Filter active" ]
# [ inline ( always ) ]
pub fn fact23 ( & mut self ) -> FACT23_W { FACT23_W { w : self } } # [ doc = "Bit 24 - Filter active" ]
# [ inline ( always ) ]
pub fn fact24 ( & mut self ) -> FACT24_W { FACT24_W { w : self } } # [ doc = "Bit 25 - Filter active" ]
# [ inline ( always ) ]
pub fn fact25 ( & mut self ) -> FACT25_W { FACT25_W { w : self } } # [ doc = "Bit 26 - Filter active" ]
# [ inline ( always ) ]
pub fn fact26 ( & mut self ) -> FACT26_W { FACT26_W { w : self } } # [ doc = "Bit 27 - Filter active" ]
# [ inline ( always ) ]
pub fn fact27 ( & mut self ) -> FACT27_W { FACT27_W { w : self } } } } } # [ doc = "Universal serial bus full-speed device interface" ]
pub struct USB { _marker : PhantomData < * const ( ) > } unsafe impl Send for USB { } impl USB { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const usb :: RegisterBlock { 0x4000_5c00 as * const _ } } impl Deref for USB { type Target = usb :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * USB :: ptr ( ) } } } # [ doc = "Universal serial bus full-speed device interface" ]
pub mod usb { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - endpoint 0 register" ]
pub ep0r : EP0R , # [ doc = "0x04 - endpoint 1 register" ]
pub ep1r : EP1R , # [ doc = "0x08 - endpoint 2 register" ]
pub ep2r : EP2R , # [ doc = "0x0c - endpoint 3 register" ]
pub ep3r : EP3R , # [ doc = "0x10 - endpoint 4 register" ]
pub ep4r : EP4R , # [ doc = "0x14 - endpoint 5 register" ]
pub ep5r : EP5R , # [ doc = "0x18 - endpoint 6 register" ]
pub ep6r : EP6R , # [ doc = "0x1c - endpoint 7 register" ]
pub ep7r : EP7R , _reserved8 : [ u8 ; 32usize ]
, # [ doc = "0x40 - control register" ]
pub cntr : CNTR , # [ doc = "0x44 - interrupt status register" ]
pub istr : ISTR , # [ doc = "0x48 - frame number register" ]
pub fnr : FNR , # [ doc = "0x4c - device address" ]
pub daddr : DADDR , # [ doc = "0x50 - Buffer table address" ]
pub btable : BTABLE , } # [ doc = "endpoint 0 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep0r](ep0r) module" ]
pub type EP0R = crate :: Reg < u32 , _EP0R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP0R ; # [ doc = "`read()` method returns [ep0r::R](ep0r::R) reader structure" ]
impl crate :: Readable for EP0R { } # [ doc = "`write(|w| ..)` method takes [ep0r::W](ep0r::W) writer structure" ]
impl crate :: Writable for EP0R { } # [ doc = "endpoint 0 register" ]
pub mod ep0r { # [ doc = "Reader of register EP0R" ]
pub type R = crate :: R < u32 , super :: EP0R > ; # [ doc = "Writer for register EP0R" ]
pub type W = crate :: W < u32 , super :: EP0R > ; # [ doc = "Register EP0R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP0R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "endpoint 1 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep1r](ep1r) module" ]
pub type EP1R = crate :: Reg < u32 , _EP1R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP1R ; # [ doc = "`read()` method returns [ep1r::R](ep1r::R) reader structure" ]
impl crate :: Readable for EP1R { } # [ doc = "`write(|w| ..)` method takes [ep1r::W](ep1r::W) writer structure" ]
impl crate :: Writable for EP1R { } # [ doc = "endpoint 1 register" ]
pub mod ep1r { # [ doc = "Reader of register EP1R" ]
pub type R = crate :: R < u32 , super :: EP1R > ; # [ doc = "Writer for register EP1R" ]
pub type W = crate :: W < u32 , super :: EP1R > ; # [ doc = "Register EP1R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP1R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "endpoint 2 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep2r](ep2r) module" ]
pub type EP2R = crate :: Reg < u32 , _EP2R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP2R ; # [ doc = "`read()` method returns [ep2r::R](ep2r::R) reader structure" ]
impl crate :: Readable for EP2R { } # [ doc = "`write(|w| ..)` method takes [ep2r::W](ep2r::W) writer structure" ]
impl crate :: Writable for EP2R { } # [ doc = "endpoint 2 register" ]
pub mod ep2r { # [ doc = "Reader of register EP2R" ]
pub type R = crate :: R < u32 , super :: EP2R > ; # [ doc = "Writer for register EP2R" ]
pub type W = crate :: W < u32 , super :: EP2R > ; # [ doc = "Register EP2R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP2R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "endpoint 3 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep3r](ep3r) module" ]
pub type EP3R = crate :: Reg < u32 , _EP3R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP3R ; # [ doc = "`read()` method returns [ep3r::R](ep3r::R) reader structure" ]
impl crate :: Readable for EP3R { } # [ doc = "`write(|w| ..)` method takes [ep3r::W](ep3r::W) writer structure" ]
impl crate :: Writable for EP3R { } # [ doc = "endpoint 3 register" ]
pub mod ep3r { # [ doc = "Reader of register EP3R" ]
pub type R = crate :: R < u32 , super :: EP3R > ; # [ doc = "Writer for register EP3R" ]
pub type W = crate :: W < u32 , super :: EP3R > ; # [ doc = "Register EP3R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP3R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "endpoint 4 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep4r](ep4r) module" ]
pub type EP4R = crate :: Reg < u32 , _EP4R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP4R ; # [ doc = "`read()` method returns [ep4r::R](ep4r::R) reader structure" ]
impl crate :: Readable for EP4R { } # [ doc = "`write(|w| ..)` method takes [ep4r::W](ep4r::W) writer structure" ]
impl crate :: Writable for EP4R { } # [ doc = "endpoint 4 register" ]
pub mod ep4r { # [ doc = "Reader of register EP4R" ]
pub type R = crate :: R < u32 , super :: EP4R > ; # [ doc = "Writer for register EP4R" ]
pub type W = crate :: W < u32 , super :: EP4R > ; # [ doc = "Register EP4R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP4R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "endpoint 5 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep5r](ep5r) module" ]
pub type EP5R = crate :: Reg < u32 , _EP5R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP5R ; # [ doc = "`read()` method returns [ep5r::R](ep5r::R) reader structure" ]
impl crate :: Readable for EP5R { } # [ doc = "`write(|w| ..)` method takes [ep5r::W](ep5r::W) writer structure" ]
impl crate :: Writable for EP5R { } # [ doc = "endpoint 5 register" ]
pub mod ep5r { # [ doc = "Reader of register EP5R" ]
pub type R = crate :: R < u32 , super :: EP5R > ; # [ doc = "Writer for register EP5R" ]
pub type W = crate :: W < u32 , super :: EP5R > ; # [ doc = "Register EP5R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP5R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "endpoint 6 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep6r](ep6r) module" ]
pub type EP6R = crate :: Reg < u32 , _EP6R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP6R ; # [ doc = "`read()` method returns [ep6r::R](ep6r::R) reader structure" ]
impl crate :: Readable for EP6R { } # [ doc = "`write(|w| ..)` method takes [ep6r::W](ep6r::W) writer structure" ]
impl crate :: Writable for EP6R { } # [ doc = "endpoint 6 register" ]
pub mod ep6r { # [ doc = "Reader of register EP6R" ]
pub type R = crate :: R < u32 , super :: EP6R > ; # [ doc = "Writer for register EP6R" ]
pub type W = crate :: W < u32 , super :: EP6R > ; # [ doc = "Register EP6R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP6R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "endpoint 7 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ep7r](ep7r) module" ]
pub type EP7R = crate :: Reg < u32 , _EP7R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EP7R ; # [ doc = "`read()` method returns [ep7r::R](ep7r::R) reader structure" ]
impl crate :: Readable for EP7R { } # [ doc = "`write(|w| ..)` method takes [ep7r::W](ep7r::W) writer structure" ]
impl crate :: Writable for EP7R { } # [ doc = "endpoint 7 register" ]
pub mod ep7r { # [ doc = "Reader of register EP7R" ]
pub type R = crate :: R < u32 , super :: EP7R > ; # [ doc = "Writer for register EP7R" ]
pub type W = crate :: W < u32 , super :: EP7R > ; # [ doc = "Register EP7R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EP7R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EA`" ]
pub type EA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `EA`" ]
pub struct EA_W < 'a > { w : & 'a mut W , } impl < 'a > EA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } # [ doc = "Status bits, for transmission transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_TX_A { # [ doc = "0: all transmission requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all transmission requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all transmission requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for transmission" ]
VALID = 3 } impl From < STAT_TX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_TX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_TX`" ]
pub type STAT_TX_R = crate :: R < u8 , STAT_TX_A > ; impl STAT_TX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_TX_A { match self . bits { 0 => STAT_TX_A :: DISABLED , 1 => STAT_TX_A :: STALL , 2 => STAT_TX_A :: NAK , 3 => STAT_TX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_TX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_TX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_TX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_TX_A :: VALID } } # [ doc = "Write proxy for field `STAT_TX`" ]
pub struct STAT_TX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_TX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_TX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all transmission requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all transmission requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: STALL ) } # [ doc = "the endpoint is naked and all transmission requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: NAK ) } # [ doc = "this endpoint is enabled for transmission" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_TX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DTOG_TX`" ]
pub type DTOG_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_TX`" ]
pub struct DTOG_TX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CTR_TX`" ]
pub type CTR_TX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_TX`" ]
pub struct CTR_TX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_TX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `EP_KIND`" ]
pub type EP_KIND_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EP_KIND`" ]
pub struct EP_KIND_W < 'a > { w : & 'a mut W , } impl < 'a > EP_KIND_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Endpoint type\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EP_TYPE_A { # [ doc = "0: Bulk endpoint" ]
BULK = 0 , # [ doc = "1: Control endpoint" ]
CONTROL = 1 , # [ doc = "2: Iso endpoint" ]
ISO = 2 , # [ doc = "3: Interrupt endpoint" ]
INTERRUPT = 3 } impl From < EP_TYPE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EP_TYPE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EP_TYPE`" ]
pub type EP_TYPE_R = crate :: R < u8 , EP_TYPE_A > ; impl EP_TYPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EP_TYPE_A { match self . bits { 0 => EP_TYPE_A :: BULK , 1 => EP_TYPE_A :: CONTROL , 2 => EP_TYPE_A :: ISO , 3 => EP_TYPE_A :: INTERRUPT , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BULK`" ]
# [ inline ( always ) ]
pub fn is_bulk ( & self ) -> bool { * self == EP_TYPE_A :: BULK } # [ doc = "Checks if the value of the field is `CONTROL`" ]
# [ inline ( always ) ]
pub fn is_control ( & self ) -> bool { * self == EP_TYPE_A :: CONTROL } # [ doc = "Checks if the value of the field is `ISO`" ]
# [ inline ( always ) ]
pub fn is_iso ( & self ) -> bool { * self == EP_TYPE_A :: ISO } # [ doc = "Checks if the value of the field is `INTERRUPT`" ]
# [ inline ( always ) ]
pub fn is_interrupt ( & self ) -> bool { * self == EP_TYPE_A :: INTERRUPT } } # [ doc = "Write proxy for field `EP_TYPE`" ]
pub struct EP_TYPE_W < 'a > { w : & 'a mut W , } impl < 'a > EP_TYPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EP_TYPE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Bulk endpoint" ]
# [ inline ( always ) ]
pub fn bulk ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: BULK ) } # [ doc = "Control endpoint" ]
# [ inline ( always ) ]
pub fn control ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: CONTROL ) } # [ doc = "Iso endpoint" ]
# [ inline ( always ) ]
pub fn iso ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: ISO ) } # [ doc = "Interrupt endpoint" ]
# [ inline ( always ) ]
pub fn interrupt ( self ) -> & 'a mut W { self . variant ( EP_TYPE_A :: INTERRUPT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `SETUP`" ]
pub type SETUP_R = crate :: R < bool , bool > ; # [ doc = "Status bits, for reception transfers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum STAT_RX_A { # [ doc = "0: all reception requests addressed to this endpoint are ignored" ]
DISABLED = 0 , # [ doc = "1: the endpoint is stalled and all reception requests result in a STALL handshake" ]
STALL = 1 , # [ doc = "2: the endpoint is naked and all reception requests result in a NAK handshake" ]
NAK = 2 , # [ doc = "3: this endpoint is enabled for reception" ]
VALID = 3 } impl From < STAT_RX_A > for u8 { # [ inline ( always ) ]
fn from ( variant : STAT_RX_A ) -> Self { variant as _ } } # [ doc = "Reader of field `STAT_RX`" ]
pub type STAT_RX_R = crate :: R < u8 , STAT_RX_A > ; impl STAT_RX_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STAT_RX_A { match self . bits { 0 => STAT_RX_A :: DISABLED , 1 => STAT_RX_A :: STALL , 2 => STAT_RX_A :: NAK , 3 => STAT_RX_A :: VALID , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STAT_RX_A :: DISABLED } # [ doc = "Checks if the value of the field is `STALL`" ]
# [ inline ( always ) ]
pub fn is_stall ( & self ) -> bool { * self == STAT_RX_A :: STALL } # [ doc = "Checks if the value of the field is `NAK`" ]
# [ inline ( always ) ]
pub fn is_nak ( & self ) -> bool { * self == STAT_RX_A :: NAK } # [ doc = "Checks if the value of the field is `VALID`" ]
# [ inline ( always ) ]
pub fn is_valid ( & self ) -> bool { * self == STAT_RX_A :: VALID } } # [ doc = "Write proxy for field `STAT_RX`" ]
pub struct STAT_RX_W < 'a > { w : & 'a mut W , } impl < 'a > STAT_RX_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STAT_RX_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "all reception requests addressed to this endpoint are ignored" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: DISABLED ) } # [ doc = "the endpoint is stalled and all reception requests result in a STALL handshake" ]
# [ inline ( always ) ]
pub fn stall ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: STALL ) } # [ doc = "the endpoint is naked and all reception requests result in a NAK handshake" ]
# [ inline ( always ) ]
pub fn nak ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: NAK ) } # [ doc = "this endpoint is enabled for reception" ]
# [ inline ( always ) ]
pub fn valid ( self ) -> & 'a mut W { self . variant ( STAT_RX_A :: VALID ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `DTOG_RX`" ]
pub type DTOG_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DTOG_RX`" ]
pub struct DTOG_RX_W < 'a > { w : & 'a mut W , } impl < 'a > DTOG_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `CTR_RX`" ]
pub type CTR_RX_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CTR_RX`" ]
pub struct CTR_RX_W < 'a > { w : & 'a mut W , } impl < 'a > CTR_RX_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & self ) -> EA_R { EA_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & self ) -> STAT_TX_R { STAT_TX_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & self ) -> DTOG_TX_R { DTOG_TX_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & self ) -> CTR_TX_R { CTR_TX_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & self ) -> EP_KIND_R { EP_KIND_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & self ) -> EP_TYPE_R { EP_TYPE_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Setup transaction completed" ]
# [ inline ( always ) ]
pub fn setup ( & self ) -> SETUP_R { SETUP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & self ) -> STAT_RX_R { STAT_RX_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & self ) -> DTOG_RX_R { DTOG_RX_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & self ) -> CTR_RX_R { CTR_RX_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:3 - Endpoint address" ]
# [ inline ( always ) ]
pub fn ea ( & mut self ) -> EA_W { EA_W { w : self } } # [ doc = "Bits 4:5 - Status bits, for transmission transfers" ]
# [ inline ( always ) ]
pub fn stat_tx ( & mut self ) -> STAT_TX_W { STAT_TX_W { w : self } } # [ doc = "Bit 6 - Data Toggle, for transmission transfers" ]
# [ inline ( always ) ]
pub fn dtog_tx ( & mut self ) -> DTOG_TX_W { DTOG_TX_W { w : self } } # [ doc = "Bit 7 - Correct Transfer for transmission" ]
# [ inline ( always ) ]
pub fn ctr_tx ( & mut self ) -> CTR_TX_W { CTR_TX_W { w : self } } # [ doc = "Bit 8 - Endpoint kind" ]
# [ inline ( always ) ]
pub fn ep_kind ( & mut self ) -> EP_KIND_W { EP_KIND_W { w : self } } # [ doc = "Bits 9:10 - Endpoint type" ]
# [ inline ( always ) ]
pub fn ep_type ( & mut self ) -> EP_TYPE_W { EP_TYPE_W { w : self } } # [ doc = "Bits 12:13 - Status bits, for reception transfers" ]
# [ inline ( always ) ]
pub fn stat_rx ( & mut self ) -> STAT_RX_W { STAT_RX_W { w : self } } # [ doc = "Bit 14 - Data Toggle, for reception transfers" ]
# [ inline ( always ) ]
pub fn dtog_rx ( & mut self ) -> DTOG_RX_W { DTOG_RX_W { w : self } } # [ doc = "Bit 15 - Correct transfer for reception" ]
# [ inline ( always ) ]
pub fn ctr_rx ( & mut self ) -> CTR_RX_W { CTR_RX_W { w : self } } } } # [ doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cntr](cntr) module" ]
pub type CNTR = crate :: Reg < u32 , _CNTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNTR ; # [ doc = "`read()` method returns [cntr::R](cntr::R) reader structure" ]
impl crate :: Readable for CNTR { } # [ doc = "`write(|w| ..)` method takes [cntr::W](cntr::W) writer structure" ]
impl crate :: Writable for CNTR { } # [ doc = "control register" ]
pub mod cntr { # [ doc = "Reader of register CNTR" ]
pub type R = crate :: R < u32 , super :: CNTR > ; # [ doc = "Writer for register CNTR" ]
pub type W = crate :: W < u32 , super :: CNTR > ; # [ doc = "Register CNTR `reset()`'s with value 0x03" ]
impl crate :: ResetValue for super :: CNTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x03 } } # [ doc = "Force USB Reset\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FRES_A { # [ doc = "0: Clear USB reset" ]
NORESET = 0 , # [ doc = "1: Force a reset of the USB peripheral, exactly like a RESET signaling on the USB" ]
RESET = 1 } impl From < FRES_A > for bool { # [ inline ( always ) ]
fn from ( variant : FRES_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FRES`" ]
pub type FRES_R = crate :: R < bool , FRES_A > ; impl FRES_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FRES_A { match self . bits { false => FRES_A :: NORESET , true => FRES_A :: RESET } } # [ doc = "Checks if the value of the field is `NORESET`" ]
# [ inline ( always ) ]
pub fn is_no_reset ( & self ) -> bool { * self == FRES_A :: NORESET } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == FRES_A :: RESET } } # [ doc = "Write proxy for field `FRES`" ]
pub struct FRES_W < 'a > { w : & 'a mut W , } impl < 'a > FRES_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FRES_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear USB reset" ]
# [ inline ( always ) ]
pub fn no_reset ( self ) -> & 'a mut W { self . variant ( FRES_A :: NORESET ) } # [ doc = "Force a reset of the USB peripheral, exactly like a RESET signaling on the USB" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( FRES_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Power down\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PDWN_A { # [ doc = "0: No power down" ]
DISABLED = 0 , # [ doc = "1: Enter power down mode" ]
ENABLED = 1 } impl From < PDWN_A > for bool { # [ inline ( always ) ]
fn from ( variant : PDWN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PDWN`" ]
pub type PDWN_R = crate :: R < bool , PDWN_A > ; impl PDWN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PDWN_A { match self . bits { false => PDWN_A :: DISABLED , true => PDWN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PDWN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PDWN_A :: ENABLED } } # [ doc = "Write proxy for field `PDWN`" ]
pub struct PDWN_W < 'a > { w : & 'a mut W , } impl < 'a > PDWN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PDWN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No power down" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PDWN_A :: DISABLED ) } # [ doc = "Enter power down mode" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PDWN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Low-power mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LPMODE_A { # [ doc = "0: No low-power mode" ]
DISABLED = 0 , # [ doc = "1: Enter low-power mode" ]
ENABLED = 1 } impl From < LPMODE_A > for bool { # [ inline ( always ) ]
fn from ( variant : LPMODE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LPMODE`" ]
pub type LPMODE_R = crate :: R < bool , LPMODE_A > ; impl LPMODE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LPMODE_A { match self . bits { false => LPMODE_A :: DISABLED , true => LPMODE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == LPMODE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == LPMODE_A :: ENABLED } } # [ doc = "Write proxy for field `LPMODE`" ]
pub struct LPMODE_W < 'a > { w : & 'a mut W , } impl < 'a > LPMODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LPMODE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No low-power mode" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( LPMODE_A :: DISABLED ) } # [ doc = "Enter low-power mode" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( LPMODE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Force suspend\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FSUSP_A { # [ doc = "0: No effect" ]
NOEFFECT = 0 , # [ doc = "1: Enter suspend mode. Clocks and static power dissipation in the analog transceiver are left unaffected" ]
SUSPEND = 1 } impl From < FSUSP_A > for bool { # [ inline ( always ) ]
fn from ( variant : FSUSP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FSUSP`" ]
pub type FSUSP_R = crate :: R < bool , FSUSP_A > ; impl FSUSP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FSUSP_A { match self . bits { false => FSUSP_A :: NOEFFECT , true => FSUSP_A :: SUSPEND } } # [ doc = "Checks if the value of the field is `NOEFFECT`" ]
# [ inline ( always ) ]
pub fn is_no_effect ( & self ) -> bool { * self == FSUSP_A :: NOEFFECT } # [ doc = "Checks if the value of the field is `SUSPEND`" ]
# [ inline ( always ) ]
pub fn is_suspend ( & self ) -> bool { * self == FSUSP_A :: SUSPEND } } # [ doc = "Write proxy for field `FSUSP`" ]
pub struct FSUSP_W < 'a > { w : & 'a mut W , } impl < 'a > FSUSP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FSUSP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No effect" ]
# [ inline ( always ) ]
pub fn no_effect ( self ) -> & 'a mut W { self . variant ( FSUSP_A :: NOEFFECT ) } # [ doc = "Enter suspend mode. Clocks and static power dissipation in the analog transceiver are left unaffected" ]
# [ inline ( always ) ]
pub fn suspend ( self ) -> & 'a mut W { self . variant ( FSUSP_A :: SUSPEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Resume request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RESUME_A { # [ doc = "1: Resume requested" ]
REQUESTED = 1 } impl From < RESUME_A > for bool { # [ inline ( always ) ]
fn from ( variant : RESUME_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RESUME`" ]
pub type RESUME_R = crate :: R < bool , RESUME_A > ; impl RESUME_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RESUME_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RESUME_A :: REQUESTED ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `REQUESTED`" ]
# [ inline ( always ) ]
pub fn is_requested ( & self ) -> bool { * self == RESUME_A :: REQUESTED } } # [ doc = "Write proxy for field `RESUME`" ]
pub struct RESUME_W < 'a > { w : & 'a mut W , } impl < 'a > RESUME_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RESUME_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resume requested" ]
# [ inline ( always ) ]
pub fn requested ( self ) -> & 'a mut W { self . variant ( RESUME_A :: REQUESTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Expected start of frame interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ESOFM_A { # [ doc = "0: ESOF Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: ESOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < ESOFM_A > for bool { # [ inline ( always ) ]
fn from ( variant : ESOFM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ESOFM`" ]
pub type ESOFM_R = crate :: R < bool , ESOFM_A > ; impl ESOFM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ESOFM_A { match self . bits { false => ESOFM_A :: DISABLED , true => ESOFM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ESOFM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ESOFM_A :: ENABLED } } # [ doc = "Write proxy for field `ESOFM`" ]
pub struct ESOFM_W < 'a > { w : & 'a mut W , } impl < 'a > ESOFM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ESOFM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ESOF Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ESOFM_A :: DISABLED ) } # [ doc = "ESOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ESOFM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Start of frame interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SOFM_A { # [ doc = "0: SOF Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: SOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < SOFM_A > for bool { # [ inline ( always ) ]
fn from ( variant : SOFM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SOFM`" ]
pub type SOFM_R = crate :: R < bool , SOFM_A > ; impl SOFM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SOFM_A { match self . bits { false => SOFM_A :: DISABLED , true => SOFM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SOFM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SOFM_A :: ENABLED } } # [ doc = "Write proxy for field `SOFM`" ]
pub struct SOFM_W < 'a > { w : & 'a mut W , } impl < 'a > SOFM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SOFM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "SOF Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SOFM_A :: DISABLED ) } # [ doc = "SOF Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SOFM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "USB reset interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RESETM_A { # [ doc = "0: RESET Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: RESET Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < RESETM_A > for bool { # [ inline ( always ) ]
fn from ( variant : RESETM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RESETM`" ]
pub type RESETM_R = crate :: R < bool , RESETM_A > ; impl RESETM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RESETM_A { match self . bits { false => RESETM_A :: DISABLED , true => RESETM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RESETM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RESETM_A :: ENABLED } } # [ doc = "Write proxy for field `RESETM`" ]
pub struct RESETM_W < 'a > { w : & 'a mut W , } impl < 'a > RESETM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RESETM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RESET Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RESETM_A :: DISABLED ) } # [ doc = "RESET Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RESETM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Suspend mode interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SUSPM_A { # [ doc = "0: Suspend Mode Request SUSP Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: SUSP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < SUSPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : SUSPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SUSPM`" ]
pub type SUSPM_R = crate :: R < bool , SUSPM_A > ; impl SUSPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SUSPM_A { match self . bits { false => SUSPM_A :: DISABLED , true => SUSPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SUSPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SUSPM_A :: ENABLED } } # [ doc = "Write proxy for field `SUSPM`" ]
pub struct SUSPM_W < 'a > { w : & 'a mut W , } impl < 'a > SUSPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SUSPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Suspend Mode Request SUSP Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SUSPM_A :: DISABLED ) } # [ doc = "SUSP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SUSPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Wakeup interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WKUPM_A { # [ doc = "0: WKUP Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: WKUP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < WKUPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : WKUPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WKUPM`" ]
pub type WKUPM_R = crate :: R < bool , WKUPM_A > ; impl WKUPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WKUPM_A { match self . bits { false => WKUPM_A :: DISABLED , true => WKUPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == WKUPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == WKUPM_A :: ENABLED } } # [ doc = "Write proxy for field `WKUPM`" ]
pub struct WKUPM_W < 'a > { w : & 'a mut W , } impl < 'a > WKUPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WKUPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "WKUP Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( WKUPM_A :: DISABLED ) } # [ doc = "WKUP Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( WKUPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Error interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ERRM_A { # [ doc = "0: ERR Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: ERR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < ERRM_A > for bool { # [ inline ( always ) ]
fn from ( variant : ERRM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ERRM`" ]
pub type ERRM_R = crate :: R < bool , ERRM_A > ; impl ERRM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ERRM_A { match self . bits { false => ERRM_A :: DISABLED , true => ERRM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ERRM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ERRM_A :: ENABLED } } # [ doc = "Write proxy for field `ERRM`" ]
pub struct ERRM_W < 'a > { w : & 'a mut W , } impl < 'a > ERRM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ERRM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ERR Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ERRM_A :: DISABLED ) } # [ doc = "ERR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ERRM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Packet memory area over / underrun interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PMAOVRM_A { # [ doc = "0: PMAOVR Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: PMAOVR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < PMAOVRM_A > for bool { # [ inline ( always ) ]
fn from ( variant : PMAOVRM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PMAOVRM`" ]
pub type PMAOVRM_R = crate :: R < bool , PMAOVRM_A > ; impl PMAOVRM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PMAOVRM_A { match self . bits { false => PMAOVRM_A :: DISABLED , true => PMAOVRM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PMAOVRM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PMAOVRM_A :: ENABLED } } # [ doc = "Write proxy for field `PMAOVRM`" ]
pub struct PMAOVRM_W < 'a > { w : & 'a mut W , } impl < 'a > PMAOVRM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PMAOVRM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PMAOVR Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PMAOVRM_A :: DISABLED ) } # [ doc = "PMAOVR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PMAOVRM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Correct transfer interrupt mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CTRM_A { # [ doc = "0: Correct Transfer (CTR) Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: CTR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
ENABLED = 1 } impl From < CTRM_A > for bool { # [ inline ( always ) ]
fn from ( variant : CTRM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CTRM`" ]
pub type CTRM_R = crate :: R < bool , CTRM_A > ; impl CTRM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CTRM_A { match self . bits { false => CTRM_A :: DISABLED , true => CTRM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CTRM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CTRM_A :: ENABLED } } # [ doc = "Write proxy for field `CTRM`" ]
pub struct CTRM_W < 'a > { w : & 'a mut W , } impl < 'a > CTRM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CTRM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Correct Transfer (CTR) Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CTRM_A :: DISABLED ) } # [ doc = "CTR Interrupt enabled, an interrupt request is generated when the corresponding bit in the USB_ISTR register is set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CTRM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bit 0 - Force USB Reset" ]
# [ inline ( always ) ]
pub fn fres ( & self ) -> FRES_R { FRES_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Power down" ]
# [ inline ( always ) ]
pub fn pdwn ( & self ) -> PDWN_R { PDWN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Low-power mode" ]
# [ inline ( always ) ]
pub fn lpmode ( & self ) -> LPMODE_R { LPMODE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Force suspend" ]
# [ inline ( always ) ]
pub fn fsusp ( & self ) -> FSUSP_R { FSUSP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Resume request" ]
# [ inline ( always ) ]
pub fn resume ( & self ) -> RESUME_R { RESUME_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Expected start of frame interrupt mask" ]
# [ inline ( always ) ]
pub fn esofm ( & self ) -> ESOFM_R { ESOFM_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Start of frame interrupt mask" ]
# [ inline ( always ) ]
pub fn sofm ( & self ) -> SOFM_R { SOFM_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - USB reset interrupt mask" ]
# [ inline ( always ) ]
pub fn resetm ( & self ) -> RESETM_R { RESETM_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Suspend mode interrupt mask" ]
# [ inline ( always ) ]
pub fn suspm ( & self ) -> SUSPM_R { SUSPM_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Wakeup interrupt mask" ]
# [ inline ( always ) ]
pub fn wkupm ( & self ) -> WKUPM_R { WKUPM_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Error interrupt mask" ]
# [ inline ( always ) ]
pub fn errm ( & self ) -> ERRM_R { ERRM_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Packet memory area over / underrun interrupt mask" ]
# [ inline ( always ) ]
pub fn pmaovrm ( & self ) -> PMAOVRM_R { PMAOVRM_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer interrupt mask" ]
# [ inline ( always ) ]
pub fn ctrm ( & self ) -> CTRM_R { CTRM_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Force USB Reset" ]
# [ inline ( always ) ]
pub fn fres ( & mut self ) -> FRES_W { FRES_W { w : self } } # [ doc = "Bit 1 - Power down" ]
# [ inline ( always ) ]
pub fn pdwn ( & mut self ) -> PDWN_W { PDWN_W { w : self } } # [ doc = "Bit 2 - Low-power mode" ]
# [ inline ( always ) ]
pub fn lpmode ( & mut self ) -> LPMODE_W { LPMODE_W { w : self } } # [ doc = "Bit 3 - Force suspend" ]
# [ inline ( always ) ]
pub fn fsusp ( & mut self ) -> FSUSP_W { FSUSP_W { w : self } } # [ doc = "Bit 4 - Resume request" ]
# [ inline ( always ) ]
pub fn resume ( & mut self ) -> RESUME_W { RESUME_W { w : self } } # [ doc = "Bit 8 - Expected start of frame interrupt mask" ]
# [ inline ( always ) ]
pub fn esofm ( & mut self ) -> ESOFM_W { ESOFM_W { w : self } } # [ doc = "Bit 9 - Start of frame interrupt mask" ]
# [ inline ( always ) ]
pub fn sofm ( & mut self ) -> SOFM_W { SOFM_W { w : self } } # [ doc = "Bit 10 - USB reset interrupt mask" ]
# [ inline ( always ) ]
pub fn resetm ( & mut self ) -> RESETM_W { RESETM_W { w : self } } # [ doc = "Bit 11 - Suspend mode interrupt mask" ]
# [ inline ( always ) ]
pub fn suspm ( & mut self ) -> SUSPM_W { SUSPM_W { w : self } } # [ doc = "Bit 12 - Wakeup interrupt mask" ]
# [ inline ( always ) ]
pub fn wkupm ( & mut self ) -> WKUPM_W { WKUPM_W { w : self } } # [ doc = "Bit 13 - Error interrupt mask" ]
# [ inline ( always ) ]
pub fn errm ( & mut self ) -> ERRM_W { ERRM_W { w : self } } # [ doc = "Bit 14 - Packet memory area over / underrun interrupt mask" ]
# [ inline ( always ) ]
pub fn pmaovrm ( & mut self ) -> PMAOVRM_W { PMAOVRM_W { w : self } } # [ doc = "Bit 15 - Correct transfer interrupt mask" ]
# [ inline ( always ) ]
pub fn ctrm ( & mut self ) -> CTRM_W { CTRM_W { w : self } } } } # [ doc = "interrupt status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [istr](istr) module" ]
pub type ISTR = crate :: Reg < u32 , _ISTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISTR ; # [ doc = "`read()` method returns [istr::R](istr::R) reader structure" ]
impl crate :: Readable for ISTR { } # [ doc = "`write(|w| ..)` method takes [istr::W](istr::W) writer structure" ]
impl crate :: Writable for ISTR { } # [ doc = "interrupt status register" ]
pub mod istr { # [ doc = "Reader of register ISTR" ]
pub type R = crate :: R < u32 , super :: ISTR > ; # [ doc = "Writer for register ISTR" ]
pub type W = crate :: W < u32 , super :: ISTR > ; # [ doc = "Register ISTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ISTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EP_ID`" ]
pub type EP_ID_R = crate :: R < u8 , u8 > ; # [ doc = "Direction of transaction\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIR_A { # [ doc = "0: data transmitted by the USB peripheral to the host PC" ]
TO = 0 , # [ doc = "1: data received by the USB peripheral from the host PC" ]
FROM = 1 } impl From < DIR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIR`" ]
pub type DIR_R = crate :: R < bool , DIR_A > ; impl DIR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIR_A { match self . bits { false => DIR_A :: TO , true => DIR_A :: FROM } } # [ doc = "Checks if the value of the field is `TO`" ]
# [ inline ( always ) ]
pub fn is_to ( & self ) -> bool { * self == DIR_A :: TO } # [ doc = "Checks if the value of the field is `FROM`" ]
# [ inline ( always ) ]
pub fn is_from ( & self ) -> bool { * self == DIR_A :: FROM } } # [ doc = "Expected start frame\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ESOF_A { # [ doc = "1: an SOF packet is expected but not received" ]
EXPECTEDSTARTOFFRAME = 1 } impl From < ESOF_A > for bool { # [ inline ( always ) ]
fn from ( variant : ESOF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ESOF`" ]
pub type ESOF_R = crate :: R < bool , ESOF_A > ; impl ESOF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ESOF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ESOF_A :: EXPECTEDSTARTOFFRAME ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `EXPECTEDSTARTOFFRAME`" ]
# [ inline ( always ) ]
pub fn is_expected_start_of_frame ( & self ) -> bool { * self == ESOF_A :: EXPECTEDSTARTOFFRAME } } # [ doc = "Write proxy for field `ESOF`" ]
pub struct ESOF_W < 'a > { w : & 'a mut W , } impl < 'a > ESOF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ESOF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "an SOF packet is expected but not received" ]
# [ inline ( always ) ]
pub fn expected_start_of_frame ( self ) -> & 'a mut W { self . variant ( ESOF_A :: EXPECTEDSTARTOFFRAME ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "start of frame\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SOF_A { # [ doc = "1: beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus" ]
STARTOFFRAME = 1 } impl From < SOF_A > for bool { # [ inline ( always ) ]
fn from ( variant : SOF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SOF`" ]
pub type SOF_R = crate :: R < bool , SOF_A > ; impl SOF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , SOF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( SOF_A :: STARTOFFRAME ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `STARTOFFRAME`" ]
# [ inline ( always ) ]
pub fn is_start_of_frame ( & self ) -> bool { * self == SOF_A :: STARTOFFRAME } } # [ doc = "Write proxy for field `SOF`" ]
pub struct SOF_W < 'a > { w : & 'a mut W , } impl < 'a > SOF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SOF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "beginning of a new USB frame and it is set when a SOF packet arrives through the USB bus" ]
# [ inline ( always ) ]
pub fn start_of_frame ( self ) -> & 'a mut W { self . variant ( SOF_A :: STARTOFFRAME ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "reset request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RESET_A { # [ doc = "1: peripheral detects an active USB RESET signal at its inputs" ]
RESET = 1 } impl From < RESET_A > for bool { # [ inline ( always ) ]
fn from ( variant : RESET_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RESET`" ]
pub type RESET_R = crate :: R < bool , RESET_A > ; impl RESET_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RESET_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RESET_A :: RESET ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == RESET_A :: RESET } } # [ doc = "Write proxy for field `RESET`" ]
pub struct RESET_W < 'a > { w : & 'a mut W , } impl < 'a > RESET_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RESET_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "peripheral detects an active USB RESET signal at its inputs" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( RESET_A :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Suspend mode request\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SUSP_A { # [ doc = "1: no traffic has been received for 3 ms, indicating a suspend mode request from the USB bus" ]
SUSPEND = 1 } impl From < SUSP_A > for bool { # [ inline ( always ) ]
fn from ( variant : SUSP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SUSP`" ]
pub type SUSP_R = crate :: R < bool , SUSP_A > ; impl SUSP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , SUSP_A > { use crate :: Variant :: * ; match self . bits { true => Val ( SUSP_A :: SUSPEND ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `SUSPEND`" ]
# [ inline ( always ) ]
pub fn is_suspend ( & self ) -> bool { * self == SUSP_A :: SUSPEND } } # [ doc = "Write proxy for field `SUSP`" ]
pub struct SUSP_W < 'a > { w : & 'a mut W , } impl < 'a > SUSP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SUSP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "no traffic has been received for 3 ms, indicating a suspend mode request from the USB bus" ]
# [ inline ( always ) ]
pub fn suspend ( self ) -> & 'a mut W { self . variant ( SUSP_A :: SUSPEND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Wakeup\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WKUP_A { # [ doc = "1: activity is detected that wakes up the USB peripheral" ]
WAKEUP = 1 } impl From < WKUP_A > for bool { # [ inline ( always ) ]
fn from ( variant : WKUP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WKUP`" ]
pub type WKUP_R = crate :: R < bool , WKUP_A > ; impl WKUP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , WKUP_A > { use crate :: Variant :: * ; match self . bits { true => Val ( WKUP_A :: WAKEUP ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `WAKEUP`" ]
# [ inline ( always ) ]
pub fn is_wakeup ( & self ) -> bool { * self == WKUP_A :: WAKEUP } } # [ doc = "Write proxy for field `WKUP`" ]
pub struct WKUP_W < 'a > { w : & 'a mut W , } impl < 'a > WKUP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WKUP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "activity is detected that wakes up the USB peripheral" ]
# [ inline ( always ) ]
pub fn wakeup ( self ) -> & 'a mut W { self . variant ( WKUP_A :: WAKEUP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ERR_A { # [ doc = "1: One of No ANSwer, Cyclic Redundancy Check, Bit Stuffing or Framing format Violation error occurred" ]
ERROR = 1 } impl From < ERR_A > for bool { # [ inline ( always ) ]
fn from ( variant : ERR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ERR`" ]
pub type ERR_R = crate :: R < bool , ERR_A > ; impl ERR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ERR_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ERR_A :: ERROR ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ERROR`" ]
# [ inline ( always ) ]
pub fn is_error ( & self ) -> bool { * self == ERR_A :: ERROR } } # [ doc = "Write proxy for field `ERR`" ]
pub struct ERR_W < 'a > { w : & 'a mut W , } impl < 'a > ERR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ERR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "One of No ANSwer, Cyclic Redundancy Check, Bit Stuffing or Framing format Violation error occurred" ]
# [ inline ( always ) ]
pub fn error ( self ) -> & 'a mut W { self . variant ( ERR_A :: ERROR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Packet memory area over / underrun\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PMAOVR_A { # [ doc = "1: microcontroller has not been able to respond in time to an USB memory request" ]
OVERRUN = 1 } impl From < PMAOVR_A > for bool { # [ inline ( always ) ]
fn from ( variant : PMAOVR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PMAOVR`" ]
pub type PMAOVR_R = crate :: R < bool , PMAOVR_A > ; impl PMAOVR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , PMAOVR_A > { use crate :: Variant :: * ; match self . bits { true => Val ( PMAOVR_A :: OVERRUN ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OVERRUN`" ]
# [ inline ( always ) ]
pub fn is_overrun ( & self ) -> bool { * self == PMAOVR_A :: OVERRUN } } # [ doc = "Write proxy for field `PMAOVR`" ]
pub struct PMAOVR_W < 'a > { w : & 'a mut W , } impl < 'a > PMAOVR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PMAOVR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "microcontroller has not been able to respond in time to an USB memory request" ]
# [ inline ( always ) ]
pub fn overrun ( self ) -> & 'a mut W { self . variant ( PMAOVR_A :: OVERRUN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Correct transfer\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CTR_A { # [ doc = "1: endpoint has successfully completed a transaction" ]
COMPLETED = 1 } impl From < CTR_A > for bool { # [ inline ( always ) ]
fn from ( variant : CTR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CTR`" ]
pub type CTR_R = crate :: R < bool , CTR_A > ; impl CTR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CTR_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CTR_A :: COMPLETED ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `COMPLETED`" ]
# [ inline ( always ) ]
pub fn is_completed ( & self ) -> bool { * self == CTR_A :: COMPLETED } } impl R { # [ doc = "Bits 0:3 - Endpoint Identifier" ]
# [ inline ( always ) ]
pub fn ep_id ( & self ) -> EP_ID_R { EP_ID_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bit 4 - Direction of transaction" ]
# [ inline ( always ) ]
pub fn dir ( & self ) -> DIR_R { DIR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Expected start frame" ]
# [ inline ( always ) ]
pub fn esof ( & self ) -> ESOF_R { ESOF_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - start of frame" ]
# [ inline ( always ) ]
pub fn sof ( & self ) -> SOF_R { SOF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - reset request" ]
# [ inline ( always ) ]
pub fn reset ( & self ) -> RESET_R { RESET_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Suspend mode request" ]
# [ inline ( always ) ]
pub fn susp ( & self ) -> SUSP_R { SUSP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Wakeup" ]
# [ inline ( always ) ]
pub fn wkup ( & self ) -> WKUP_R { WKUP_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Error" ]
# [ inline ( always ) ]
pub fn err ( & self ) -> ERR_R { ERR_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Packet memory area over / underrun" ]
# [ inline ( always ) ]
pub fn pmaovr ( & self ) -> PMAOVR_R { PMAOVR_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Correct transfer" ]
# [ inline ( always ) ]
pub fn ctr ( & self ) -> CTR_R { CTR_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 8 - Expected start frame" ]
# [ inline ( always ) ]
pub fn esof ( & mut self ) -> ESOF_W { ESOF_W { w : self } } # [ doc = "Bit 9 - start of frame" ]
# [ inline ( always ) ]
pub fn sof ( & mut self ) -> SOF_W { SOF_W { w : self } } # [ doc = "Bit 10 - reset request" ]
# [ inline ( always ) ]
pub fn reset ( & mut self ) -> RESET_W { RESET_W { w : self } } # [ doc = "Bit 11 - Suspend mode request" ]
# [ inline ( always ) ]
pub fn susp ( & mut self ) -> SUSP_W { SUSP_W { w : self } } # [ doc = "Bit 12 - Wakeup" ]
# [ inline ( always ) ]
pub fn wkup ( & mut self ) -> WKUP_W { WKUP_W { w : self } } # [ doc = "Bit 13 - Error" ]
# [ inline ( always ) ]
pub fn err ( & mut self ) -> ERR_W { ERR_W { w : self } } # [ doc = "Bit 14 - Packet memory area over / underrun" ]
# [ inline ( always ) ]
pub fn pmaovr ( & mut self ) -> PMAOVR_W { PMAOVR_W { w : self } } } } # [ doc = "frame number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fnr](fnr) module" ]
pub type FNR = crate :: Reg < u32 , _FNR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FNR ; # [ doc = "`read()` method returns [fnr::R](fnr::R) reader structure" ]
impl crate :: Readable for FNR { } # [ doc = "frame number register" ]
pub mod fnr { # [ doc = "Reader of register FNR" ]
pub type R = crate :: R < u32 , super :: FNR > ; # [ doc = "Reader of field `FN`" ]
pub type FN_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `LSOF`" ]
pub type LSOF_R = crate :: R < u8 , u8 > ; # [ doc = "Locked\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCK_A { # [ doc = "1: the frame timer remains in this state until an USB reset or USB suspend event occurs" ]
LOCKED = 1 } impl From < LCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCK`" ]
pub type LCK_R = crate :: R < bool , LCK_A > ; impl LCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , LCK_A > { use crate :: Variant :: * ; match self . bits { true => Val ( LCK_A :: LOCKED ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LCK_A :: LOCKED } } # [ doc = "Receive data - line status\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXDM_A { # [ doc = "1: received data minus upstream port data line" ]
RECEIVED = 1 } impl From < RXDM_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXDM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXDM`" ]
pub type RXDM_R = crate :: R < bool , RXDM_A > ; impl RXDM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RXDM_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RXDM_A :: RECEIVED ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RECEIVED`" ]
# [ inline ( always ) ]
pub fn is_received ( & self ) -> bool { * self == RXDM_A :: RECEIVED } } # [ doc = "Receive data + line status\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXDP_A { # [ doc = "1: received data plus upstream port data line" ]
RECEIVED = 1 } impl From < RXDP_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXDP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXDP`" ]
pub type RXDP_R = crate :: R < bool , RXDP_A > ; impl RXDP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RXDP_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RXDP_A :: RECEIVED ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RECEIVED`" ]
# [ inline ( always ) ]
pub fn is_received ( & self ) -> bool { * self == RXDP_A :: RECEIVED } } impl R { # [ doc = "Bits 0:10 - Frame number" ]
# [ inline ( always ) ]
pub fn fn_ ( & self ) -> FN_R { FN_R :: new ( ( self . bits & 0x07ff ) as u16 ) } # [ doc = "Bits 11:12 - Lost SOF" ]
# [ inline ( always ) ]
pub fn lsof ( & self ) -> LSOF_R { LSOF_R :: new ( ( ( self . bits >> 11 ) & 0x03 ) as u8 ) } # [ doc = "Bit 13 - Locked" ]
# [ inline ( always ) ]
pub fn lck ( & self ) -> LCK_R { LCK_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Receive data - line status" ]
# [ inline ( always ) ]
pub fn rxdm ( & self ) -> RXDM_R { RXDM_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Receive data + line status" ]
# [ inline ( always ) ]
pub fn rxdp ( & self ) -> RXDP_R { RXDP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } } # [ doc = "device address\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [daddr](daddr) module" ]
pub type DADDR = crate :: Reg < u32 , _DADDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DADDR ; # [ doc = "`read()` method returns [daddr::R](daddr::R) reader structure" ]
impl crate :: Readable for DADDR { } # [ doc = "`write(|w| ..)` method takes [daddr::W](daddr::W) writer structure" ]
impl crate :: Writable for DADDR { } # [ doc = "device address" ]
pub mod daddr { # [ doc = "Reader of register DADDR" ]
pub type R = crate :: R < u32 , super :: DADDR > ; # [ doc = "Writer for register DADDR" ]
pub type W = crate :: W < u32 , super :: DADDR > ; # [ doc = "Register DADDR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DADDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ADD`" ]
pub type ADD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADD`" ]
pub struct ADD_W < 'a > { w : & 'a mut W , } impl < 'a > ADD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub unsafe fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub unsafe fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `ADD1`" ]
pub type ADD1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADD1`" ]
pub struct ADD1_W < 'a > { w : & 'a mut W , } impl < 'a > ADD1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `ADD2`" ]
pub type ADD2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADD2`" ]
pub struct ADD2_W < 'a > { w : & 'a mut W , } impl < 'a > ADD2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `ADD3`" ]
pub type ADD3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADD3`" ]
pub struct ADD3_W < 'a > { w : & 'a mut W , } impl < 'a > ADD3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `ADD4`" ]
pub type ADD4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADD4`" ]
pub struct ADD4_W < 'a > { w : & 'a mut W , } impl < 'a > ADD4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADD5`" ]
pub type ADD5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADD5`" ]
pub struct ADD5_W < 'a > { w : & 'a mut W , } impl < 'a > ADD5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `ADD6`" ]
pub type ADD6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADD6`" ]
pub struct ADD6_W < 'a > { w : & 'a mut W , } impl < 'a > ADD6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Enable function\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EF_A { # [ doc = "0: USB device disabled" ]
DISABLED = 0 , # [ doc = "1: USB device enabled" ]
ENABLED = 1 } impl From < EF_A > for bool { # [ inline ( always ) ]
fn from ( variant : EF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EF`" ]
pub type EF_R = crate :: R < bool , EF_A > ; impl EF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EF_A { match self . bits { false => EF_A :: DISABLED , true => EF_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EF_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EF_A :: ENABLED } } # [ doc = "Write proxy for field `EF`" ]
pub struct EF_W < 'a > { w : & 'a mut W , } impl < 'a > EF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "USB device disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EF_A :: DISABLED ) } # [ doc = "USB device enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EF_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } impl R { # [ doc = "Bit 0 - Device address" ]
# [ inline ( always ) ]
pub fn add ( & self ) -> ADD_R { ADD_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Device address" ]
# [ inline ( always ) ]
pub fn add1 ( & self ) -> ADD1_R { ADD1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Device address" ]
# [ inline ( always ) ]
pub fn add2 ( & self ) -> ADD2_R { ADD2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Device address" ]
# [ inline ( always ) ]
pub fn add3 ( & self ) -> ADD3_R { ADD3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Device address" ]
# [ inline ( always ) ]
pub fn add4 ( & self ) -> ADD4_R { ADD4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Device address" ]
# [ inline ( always ) ]
pub fn add5 ( & self ) -> ADD5_R { ADD5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Device address" ]
# [ inline ( always ) ]
pub fn add6 ( & self ) -> ADD6_R { ADD6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Enable function" ]
# [ inline ( always ) ]
pub fn ef ( & self ) -> EF_R { EF_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Device address" ]
# [ inline ( always ) ]
pub fn add ( & mut self ) -> ADD_W { ADD_W { w : self } } # [ doc = "Bit 1 - Device address" ]
# [ inline ( always ) ]
pub fn add1 ( & mut self ) -> ADD1_W { ADD1_W { w : self } } # [ doc = "Bit 2 - Device address" ]
# [ inline ( always ) ]
pub fn add2 ( & mut self ) -> ADD2_W { ADD2_W { w : self } } # [ doc = "Bit 3 - Device address" ]
# [ inline ( always ) ]
pub fn add3 ( & mut self ) -> ADD3_W { ADD3_W { w : self } } # [ doc = "Bit 4 - Device address" ]
# [ inline ( always ) ]
pub fn add4 ( & mut self ) -> ADD4_W { ADD4_W { w : self } } # [ doc = "Bit 5 - Device address" ]
# [ inline ( always ) ]
pub fn add5 ( & mut self ) -> ADD5_W { ADD5_W { w : self } } # [ doc = "Bit 6 - Device address" ]
# [ inline ( always ) ]
pub fn add6 ( & mut self ) -> ADD6_W { ADD6_W { w : self } } # [ doc = "Bit 7 - Enable function" ]
# [ inline ( always ) ]
pub fn ef ( & mut self ) -> EF_W { EF_W { w : self } } } } # [ doc = "Buffer table address\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [btable](btable) module" ]
pub type BTABLE = crate :: Reg < u32 , _BTABLE > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BTABLE ; # [ doc = "`read()` method returns [btable::R](btable::R) reader structure" ]
impl crate :: Readable for BTABLE { } # [ doc = "`write(|w| ..)` method takes [btable::W](btable::W) writer structure" ]
impl crate :: Writable for BTABLE { } # [ doc = "Buffer table address" ]
pub mod btable { # [ doc = "Reader of register BTABLE" ]
pub type R = crate :: R < u32 , super :: BTABLE > ; # [ doc = "Writer for register BTABLE" ]
pub type W = crate :: W < u32 , super :: BTABLE > ; # [ doc = "Register BTABLE `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BTABLE { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `BTABLE`" ]
pub type BTABLE_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `BTABLE`" ]
pub struct BTABLE_W < 'a > { w : & 'a mut W , } impl < 'a > BTABLE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1fff << 3 ) ) | ( ( ( value as u32 ) & 0x1fff ) << 3 ) ; self . w } } impl R { # [ doc = "Bits 3:15 - Buffer table" ]
# [ inline ( always ) ]
pub fn btable ( & self ) -> BTABLE_R { BTABLE_R :: new ( ( ( self . bits >> 3 ) & 0x1fff ) as u16 ) } } impl W { # [ doc = "Bits 3:15 - Buffer table" ]
# [ inline ( always ) ]
pub fn btable ( & mut self ) -> BTABLE_W { BTABLE_W { w : self } } } } } # [ doc = "Inter-integrated circuit" ]
pub struct I2C1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for I2C1 { } impl I2C1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const i2c1 :: RegisterBlock { 0x4000_5400 as * const _ } } impl Deref for I2C1 { type Target = i2c1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * I2C1 :: ptr ( ) } } } # [ doc = "Inter-integrated circuit" ]
pub mod i2c1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - Control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - Own address register 1" ]
pub oar1 : OAR1 , # [ doc = "0x0c - Own address register 2" ]
pub oar2 : OAR2 , # [ doc = "0x10 - Timing register" ]
pub timingr : TIMINGR , # [ doc = "0x14 - Status register 1" ]
pub timeoutr : TIMEOUTR , # [ doc = "0x18 - Interrupt and Status register" ]
pub isr : ISR , # [ doc = "0x1c - Interrupt clear register" ]
pub icr : ICR , # [ doc = "0x20 - PEC register" ]
pub pecr : PECR , # [ doc = "0x24 - Receive data register" ]
pub rxdr : RXDR , # [ doc = "0x28 - Transmit data register" ]
pub txdr : TXDR , } # [ doc = "Control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "Control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Peripheral enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PE_A { # [ doc = "0: Peripheral disabled" ]
DISABLED = 0 , # [ doc = "1: Peripheral enabled" ]
ENABLED = 1 } impl From < PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PE`" ]
pub type PE_R = crate :: R < bool , PE_A > ; impl PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PE_A { match self . bits { false => PE_A :: DISABLED , true => PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PE_A :: ENABLED } } # [ doc = "Write proxy for field `PE`" ]
pub struct PE_W < 'a > { w : & 'a mut W , } impl < 'a > PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Peripheral disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PE_A :: DISABLED ) } # [ doc = "Peripheral enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "TX Interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXIE_A { # [ doc = "0: Transmit (TXIS) interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Transmit (TXIS) interrupt enabled" ]
ENABLED = 1 } impl From < TXIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXIE`" ]
pub type TXIE_R = crate :: R < bool , TXIE_A > ; impl TXIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXIE_A { match self . bits { false => TXIE_A :: DISABLED , true => TXIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TXIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TXIE_A :: ENABLED } } # [ doc = "Write proxy for field `TXIE`" ]
pub struct TXIE_W < 'a > { w : & 'a mut W , } impl < 'a > TXIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Transmit (TXIS) interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TXIE_A :: DISABLED ) } # [ doc = "Transmit (TXIS) interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TXIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "RX Interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXIE_A { # [ doc = "0: Receive (RXNE) interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Receive (RXNE) interrupt enabled" ]
ENABLED = 1 } impl From < RXIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXIE`" ]
pub type RXIE_R = crate :: R < bool , RXIE_A > ; impl RXIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXIE_A { match self . bits { false => RXIE_A :: DISABLED , true => RXIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RXIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RXIE_A :: ENABLED } } # [ doc = "Write proxy for field `RXIE`" ]
pub struct RXIE_W < 'a > { w : & 'a mut W , } impl < 'a > RXIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Receive (RXNE) interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RXIE_A :: DISABLED ) } # [ doc = "Receive (RXNE) interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RXIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Address match interrupt enable (slave only)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADDRIE_A { # [ doc = "0: Address match (ADDR) interrupts disabled" ]
DISABLED = 0 , # [ doc = "1: Address match (ADDR) interrupts enabled" ]
ENABLED = 1 } impl From < ADDRIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADDRIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADDRIE`" ]
pub type ADDRIE_R = crate :: R < bool , ADDRIE_A > ; impl ADDRIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADDRIE_A { match self . bits { false => ADDRIE_A :: DISABLED , true => ADDRIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ADDRIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ADDRIE_A :: ENABLED } } # [ doc = "Write proxy for field `ADDRIE`" ]
pub struct ADDRIE_W < 'a > { w : & 'a mut W , } impl < 'a > ADDRIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADDRIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Address match (ADDR) interrupts disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ADDRIE_A :: DISABLED ) } # [ doc = "Address match (ADDR) interrupts enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ADDRIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Not acknowledge received interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NACKIE_A { # [ doc = "0: Not acknowledge (NACKF) received interrupts disabled" ]
DISABLED = 0 , # [ doc = "1: Not acknowledge (NACKF) received interrupts enabled" ]
ENABLED = 1 } impl From < NACKIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : NACKIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `NACKIE`" ]
pub type NACKIE_R = crate :: R < bool , NACKIE_A > ; impl NACKIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NACKIE_A { match self . bits { false => NACKIE_A :: DISABLED , true => NACKIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == NACKIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == NACKIE_A :: ENABLED } } # [ doc = "Write proxy for field `NACKIE`" ]
pub struct NACKIE_W < 'a > { w : & 'a mut W , } impl < 'a > NACKIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : NACKIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Not acknowledge (NACKF) received interrupts disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( NACKIE_A :: DISABLED ) } # [ doc = "Not acknowledge (NACKF) received interrupts enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( NACKIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "STOP detection Interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum STOPIE_A { # [ doc = "0: Stop detection (STOPF) interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Stop detection (STOPF) interrupt enabled" ]
ENABLED = 1 } impl From < STOPIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : STOPIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `STOPIE`" ]
pub type STOPIE_R = crate :: R < bool , STOPIE_A > ; impl STOPIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STOPIE_A { match self . bits { false => STOPIE_A :: DISABLED , true => STOPIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == STOPIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == STOPIE_A :: ENABLED } } # [ doc = "Write proxy for field `STOPIE`" ]
pub struct STOPIE_W < 'a > { w : & 'a mut W , } impl < 'a > STOPIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STOPIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Stop detection (STOPF) interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( STOPIE_A :: DISABLED ) } # [ doc = "Stop detection (STOPF) interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( STOPIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Transfer Complete interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TCIE_A { # [ doc = "0: Transfer Complete interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Transfer Complete interrupt enabled" ]
ENABLED = 1 } impl From < TCIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TCIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TCIE`" ]
pub type TCIE_R = crate :: R < bool , TCIE_A > ; impl TCIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TCIE_A { match self . bits { false => TCIE_A :: DISABLED , true => TCIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TCIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TCIE_A :: ENABLED } } # [ doc = "Write proxy for field `TCIE`" ]
pub struct TCIE_W < 'a > { w : & 'a mut W , } impl < 'a > TCIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TCIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Transfer Complete interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TCIE_A :: DISABLED ) } # [ doc = "Transfer Complete interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TCIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Error interrupts enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ERRIE_A { # [ doc = "0: Error detection interrupts disabled" ]
DISABLED = 0 , # [ doc = "1: Error detection interrupts enabled" ]
ENABLED = 1 } impl From < ERRIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ERRIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ERRIE`" ]
pub type ERRIE_R = crate :: R < bool , ERRIE_A > ; impl ERRIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ERRIE_A { match self . bits { false => ERRIE_A :: DISABLED , true => ERRIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ERRIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ERRIE_A :: ENABLED } } # [ doc = "Write proxy for field `ERRIE`" ]
pub struct ERRIE_W < 'a > { w : & 'a mut W , } impl < 'a > ERRIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ERRIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Error detection interrupts disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: DISABLED ) } # [ doc = "Error detection interrupts enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ERRIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Digital noise filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum DNF_A { # [ doc = "0: Digital filter disabled" ]
NOFILTER = 0 , # [ doc = "1: Digital filter enabled and filtering capability up to 1 tI2CCLK" ]
FILTER1 = 1 , # [ doc = "2: Digital filter enabled and filtering capability up to 2 tI2CCLK" ]
FILTER2 = 2 , # [ doc = "3: Digital filter enabled and filtering capability up to 3 tI2CCLK" ]
FILTER3 = 3 , # [ doc = "4: Digital filter enabled and filtering capability up to 4 tI2CCLK" ]
FILTER4 = 4 , # [ doc = "5: Digital filter enabled and filtering capability up to 5 tI2CCLK" ]
FILTER5 = 5 , # [ doc = "6: Digital filter enabled and filtering capability up to 6 tI2CCLK" ]
FILTER6 = 6 , # [ doc = "7: Digital filter enabled and filtering capability up to 7 tI2CCLK" ]
FILTER7 = 7 , # [ doc = "8: Digital filter enabled and filtering capability up to 8 tI2CCLK" ]
FILTER8 = 8 , # [ doc = "9: Digital filter enabled and filtering capability up to 9 tI2CCLK" ]
FILTER9 = 9 , # [ doc = "10: Digital filter enabled and filtering capability up to 10 tI2CCLK" ]
FILTER10 = 10 , # [ doc = "11: Digital filter enabled and filtering capability up to 11 tI2CCLK" ]
FILTER11 = 11 , # [ doc = "12: Digital filter enabled and filtering capability up to 12 tI2CCLK" ]
FILTER12 = 12 , # [ doc = "13: Digital filter enabled and filtering capability up to 13 tI2CCLK" ]
FILTER13 = 13 , # [ doc = "14: Digital filter enabled and filtering capability up to 14 tI2CCLK" ]
FILTER14 = 14 , # [ doc = "15: Digital filter enabled and filtering capability up to 15 tI2CCLK" ]
FILTER15 = 15 } impl From < DNF_A > for u8 { # [ inline ( always ) ]
fn from ( variant : DNF_A ) -> Self { variant as _ } } # [ doc = "Reader of field `DNF`" ]
pub type DNF_R = crate :: R < u8 , DNF_A > ; impl DNF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DNF_A { match self . bits { 0 => DNF_A :: NOFILTER , 1 => DNF_A :: FILTER1 , 2 => DNF_A :: FILTER2 , 3 => DNF_A :: FILTER3 , 4 => DNF_A :: FILTER4 , 5 => DNF_A :: FILTER5 , 6 => DNF_A :: FILTER6 , 7 => DNF_A :: FILTER7 , 8 => DNF_A :: FILTER8 , 9 => DNF_A :: FILTER9 , 10 => DNF_A :: FILTER10 , 11 => DNF_A :: FILTER11 , 12 => DNF_A :: FILTER12 , 13 => DNF_A :: FILTER13 , 14 => DNF_A :: FILTER14 , 15 => DNF_A :: FILTER15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == DNF_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FILTER1`" ]
# [ inline ( always ) ]
pub fn is_filter1 ( & self ) -> bool { * self == DNF_A :: FILTER1 } # [ doc = "Checks if the value of the field is `FILTER2`" ]
# [ inline ( always ) ]
pub fn is_filter2 ( & self ) -> bool { * self == DNF_A :: FILTER2 } # [ doc = "Checks if the value of the field is `FILTER3`" ]
# [ inline ( always ) ]
pub fn is_filter3 ( & self ) -> bool { * self == DNF_A :: FILTER3 } # [ doc = "Checks if the value of the field is `FILTER4`" ]
# [ inline ( always ) ]
pub fn is_filter4 ( & self ) -> bool { * self == DNF_A :: FILTER4 } # [ doc = "Checks if the value of the field is `FILTER5`" ]
# [ inline ( always ) ]
pub fn is_filter5 ( & self ) -> bool { * self == DNF_A :: FILTER5 } # [ doc = "Checks if the value of the field is `FILTER6`" ]
# [ inline ( always ) ]
pub fn is_filter6 ( & self ) -> bool { * self == DNF_A :: FILTER6 } # [ doc = "Checks if the value of the field is `FILTER7`" ]
# [ inline ( always ) ]
pub fn is_filter7 ( & self ) -> bool { * self == DNF_A :: FILTER7 } # [ doc = "Checks if the value of the field is `FILTER8`" ]
# [ inline ( always ) ]
pub fn is_filter8 ( & self ) -> bool { * self == DNF_A :: FILTER8 } # [ doc = "Checks if the value of the field is `FILTER9`" ]
# [ inline ( always ) ]
pub fn is_filter9 ( & self ) -> bool { * self == DNF_A :: FILTER9 } # [ doc = "Checks if the value of the field is `FILTER10`" ]
# [ inline ( always ) ]
pub fn is_filter10 ( & self ) -> bool { * self == DNF_A :: FILTER10 } # [ doc = "Checks if the value of the field is `FILTER11`" ]
# [ inline ( always ) ]
pub fn is_filter11 ( & self ) -> bool { * self == DNF_A :: FILTER11 } # [ doc = "Checks if the value of the field is `FILTER12`" ]
# [ inline ( always ) ]
pub fn is_filter12 ( & self ) -> bool { * self == DNF_A :: FILTER12 } # [ doc = "Checks if the value of the field is `FILTER13`" ]
# [ inline ( always ) ]
pub fn is_filter13 ( & self ) -> bool { * self == DNF_A :: FILTER13 } # [ doc = "Checks if the value of the field is `FILTER14`" ]
# [ inline ( always ) ]
pub fn is_filter14 ( & self ) -> bool { * self == DNF_A :: FILTER14 } # [ doc = "Checks if the value of the field is `FILTER15`" ]
# [ inline ( always ) ]
pub fn is_filter15 ( & self ) -> bool { * self == DNF_A :: FILTER15 } } # [ doc = "Write proxy for field `DNF`" ]
pub struct DNF_W < 'a > { w : & 'a mut W , } impl < 'a > DNF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DNF_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Digital filter disabled" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( DNF_A :: NOFILTER ) } # [ doc = "Digital filter enabled and filtering capability up to 1 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter1 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER1 ) } # [ doc = "Digital filter enabled and filtering capability up to 2 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter2 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER2 ) } # [ doc = "Digital filter enabled and filtering capability up to 3 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter3 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER3 ) } # [ doc = "Digital filter enabled and filtering capability up to 4 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter4 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER4 ) } # [ doc = "Digital filter enabled and filtering capability up to 5 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter5 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER5 ) } # [ doc = "Digital filter enabled and filtering capability up to 6 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter6 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER6 ) } # [ doc = "Digital filter enabled and filtering capability up to 7 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter7 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER7 ) } # [ doc = "Digital filter enabled and filtering capability up to 8 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter8 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER8 ) } # [ doc = "Digital filter enabled and filtering capability up to 9 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter9 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER9 ) } # [ doc = "Digital filter enabled and filtering capability up to 10 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter10 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER10 ) } # [ doc = "Digital filter enabled and filtering capability up to 11 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter11 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER11 ) } # [ doc = "Digital filter enabled and filtering capability up to 12 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter12 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER12 ) } # [ doc = "Digital filter enabled and filtering capability up to 13 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter13 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER13 ) } # [ doc = "Digital filter enabled and filtering capability up to 14 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter14 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER14 ) } # [ doc = "Digital filter enabled and filtering capability up to 15 tI2CCLK" ]
# [ inline ( always ) ]
pub fn filter15 ( self ) -> & 'a mut W { self . variant ( DNF_A :: FILTER15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Analog noise filter OFF\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ANFOFF_A { # [ doc = "0: Analog noise filter enabled" ]
ENABLED = 0 , # [ doc = "1: Analog noise filter disabled" ]
DISABLED = 1 } impl From < ANFOFF_A > for bool { # [ inline ( always ) ]
fn from ( variant : ANFOFF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ANFOFF`" ]
pub type ANFOFF_R = crate :: R < bool , ANFOFF_A > ; impl ANFOFF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ANFOFF_A { match self . bits { false => ANFOFF_A :: ENABLED , true => ANFOFF_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ANFOFF_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ANFOFF_A :: DISABLED } } # [ doc = "Write proxy for field `ANFOFF`" ]
pub struct ANFOFF_W < 'a > { w : & 'a mut W , } impl < 'a > ANFOFF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ANFOFF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Analog noise filter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ANFOFF_A :: ENABLED ) } # [ doc = "Analog noise filter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ANFOFF_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Write proxy for field `SWRST`" ]
pub struct SWRST_W < 'a > { w : & 'a mut W , } impl < 'a > SWRST_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "DMA transmission requests enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXDMAEN_A { # [ doc = "0: DMA mode disabled for transmission" ]
DISABLED = 0 , # [ doc = "1: DMA mode enabled for transmission" ]
ENABLED = 1 } impl From < TXDMAEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXDMAEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXDMAEN`" ]
pub type TXDMAEN_R = crate :: R < bool , TXDMAEN_A > ; impl TXDMAEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXDMAEN_A { match self . bits { false => TXDMAEN_A :: DISABLED , true => TXDMAEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TXDMAEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TXDMAEN_A :: ENABLED } } # [ doc = "Write proxy for field `TXDMAEN`" ]
pub struct TXDMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > TXDMAEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXDMAEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA mode disabled for transmission" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TXDMAEN_A :: DISABLED ) } # [ doc = "DMA mode enabled for transmission" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TXDMAEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "DMA reception requests enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXDMAEN_A { # [ doc = "0: DMA mode disabled for reception" ]
DISABLED = 0 , # [ doc = "1: DMA mode enabled for reception" ]
ENABLED = 1 } impl From < RXDMAEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXDMAEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXDMAEN`" ]
pub type RXDMAEN_R = crate :: R < bool , RXDMAEN_A > ; impl RXDMAEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXDMAEN_A { match self . bits { false => RXDMAEN_A :: DISABLED , true => RXDMAEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == RXDMAEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == RXDMAEN_A :: ENABLED } } # [ doc = "Write proxy for field `RXDMAEN`" ]
pub struct RXDMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > RXDMAEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RXDMAEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA mode disabled for reception" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( RXDMAEN_A :: DISABLED ) } # [ doc = "DMA mode enabled for reception" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( RXDMAEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Slave byte control\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SBC_A { # [ doc = "0: Slave byte control disabled" ]
DISABLED = 0 , # [ doc = "1: Slave byte control enabled" ]
ENABLED = 1 } impl From < SBC_A > for bool { # [ inline ( always ) ]
fn from ( variant : SBC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SBC`" ]
pub type SBC_R = crate :: R < bool , SBC_A > ; impl SBC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SBC_A { match self . bits { false => SBC_A :: DISABLED , true => SBC_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SBC_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SBC_A :: ENABLED } } # [ doc = "Write proxy for field `SBC`" ]
pub struct SBC_W < 'a > { w : & 'a mut W , } impl < 'a > SBC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SBC_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Slave byte control disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SBC_A :: DISABLED ) } # [ doc = "Slave byte control enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SBC_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Clock stretching disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NOSTRETCH_A { # [ doc = "0: Clock stretching enabled" ]
ENABLED = 0 , # [ doc = "1: Clock stretching disabled" ]
DISABLED = 1 } impl From < NOSTRETCH_A > for bool { # [ inline ( always ) ]
fn from ( variant : NOSTRETCH_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `NOSTRETCH`" ]
pub type NOSTRETCH_R = crate :: R < bool , NOSTRETCH_A > ; impl NOSTRETCH_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NOSTRETCH_A { match self . bits { false => NOSTRETCH_A :: ENABLED , true => NOSTRETCH_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == NOSTRETCH_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == NOSTRETCH_A :: DISABLED } } # [ doc = "Write proxy for field `NOSTRETCH`" ]
pub struct NOSTRETCH_W < 'a > { w : & 'a mut W , } impl < 'a > NOSTRETCH_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : NOSTRETCH_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clock stretching enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( NOSTRETCH_A :: ENABLED ) } # [ doc = "Clock stretching disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( NOSTRETCH_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Wakeup from STOP enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUPEN_A { # [ doc = "0: Wakeup from Stop mode disabled" ]
DISABLED = 0 , # [ doc = "1: Wakeup from Stop mode enabled" ]
ENABLED = 1 } impl From < WUPEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : WUPEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WUPEN`" ]
pub type WUPEN_R = crate :: R < bool , WUPEN_A > ; impl WUPEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WUPEN_A { match self . bits { false => WUPEN_A :: DISABLED , true => WUPEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == WUPEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == WUPEN_A :: ENABLED } } # [ doc = "Write proxy for field `WUPEN`" ]
pub struct WUPEN_W < 'a > { w : & 'a mut W , } impl < 'a > WUPEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUPEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Wakeup from Stop mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( WUPEN_A :: DISABLED ) } # [ doc = "Wakeup from Stop mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( WUPEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "General call enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum GCEN_A { # [ doc = "0: General call disabled. Address 0b00000000 is NACKed" ]
DISABLED = 0 , # [ doc = "1: General call enabled. Address 0b00000000 is ACKed" ]
ENABLED = 1 } impl From < GCEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : GCEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `GCEN`" ]
pub type GCEN_R = crate :: R < bool , GCEN_A > ; impl GCEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> GCEN_A { match self . bits { false => GCEN_A :: DISABLED , true => GCEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == GCEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == GCEN_A :: ENABLED } } # [ doc = "Write proxy for field `GCEN`" ]
pub struct GCEN_W < 'a > { w : & 'a mut W , } impl < 'a > GCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : GCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "General call disabled. Address 0b00000000 is NACKed" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( GCEN_A :: DISABLED ) } # [ doc = "General call enabled. Address 0b00000000 is ACKed" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( GCEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "SMBus Host address enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SMBHEN_A { # [ doc = "0: Host address disabled. Address 0b0001000x is NACKed" ]
DISABLED = 0 , # [ doc = "1: Host address enabled. Address 0b0001000x is ACKed" ]
ENABLED = 1 } impl From < SMBHEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : SMBHEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SMBHEN`" ]
pub type SMBHEN_R = crate :: R < bool , SMBHEN_A > ; impl SMBHEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMBHEN_A { match self . bits { false => SMBHEN_A :: DISABLED , true => SMBHEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SMBHEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SMBHEN_A :: ENABLED } } # [ doc = "Write proxy for field `SMBHEN`" ]
pub struct SMBHEN_W < 'a > { w : & 'a mut W , } impl < 'a > SMBHEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMBHEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Host address disabled. Address 0b0001000x is NACKed" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SMBHEN_A :: DISABLED ) } # [ doc = "Host address enabled. Address 0b0001000x is ACKed" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SMBHEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "SMBus Device Default address enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SMBDEN_A { # [ doc = "0: Device default address disabled. Address 0b1100001x is NACKed" ]
DISABLED = 0 , # [ doc = "1: Device default address enabled. Address 0b1100001x is ACKed" ]
ENABLED = 1 } impl From < SMBDEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : SMBDEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SMBDEN`" ]
pub type SMBDEN_R = crate :: R < bool , SMBDEN_A > ; impl SMBDEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMBDEN_A { match self . bits { false => SMBDEN_A :: DISABLED , true => SMBDEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SMBDEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == SMBDEN_A :: ENABLED } } # [ doc = "Write proxy for field `SMBDEN`" ]
pub struct SMBDEN_W < 'a > { w : & 'a mut W , } impl < 'a > SMBDEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMBDEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Device default address disabled. Address 0b1100001x is NACKed" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SMBDEN_A :: DISABLED ) } # [ doc = "Device default address enabled. Address 0b1100001x is ACKed" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( SMBDEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "SMBUS alert enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALERTEN_A { # [ doc = "0: In device mode (SMBHEN=Disabled) Releases SMBA pin high and Alert Response Address Header disabled (0001100x) followed by NACK. In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) not supported" ]
DISABLED = 0 , # [ doc = "1: In device mode (SMBHEN=Disabled) Drives SMBA pin low and Alert Response Address Header enabled (0001100x) followed by ACK.In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) supported" ]
ENABLED = 1 } impl From < ALERTEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALERTEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALERTEN`" ]
pub type ALERTEN_R = crate :: R < bool , ALERTEN_A > ; impl ALERTEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALERTEN_A { match self . bits { false => ALERTEN_A :: DISABLED , true => ALERTEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ALERTEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ALERTEN_A :: ENABLED } } # [ doc = "Write proxy for field `ALERTEN`" ]
pub struct ALERTEN_W < 'a > { w : & 'a mut W , } impl < 'a > ALERTEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALERTEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "In device mode (SMBHEN=Disabled) Releases SMBA pin high and Alert Response Address Header disabled (0001100x) followed by NACK. In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) not supported" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ALERTEN_A :: DISABLED ) } # [ doc = "In device mode (SMBHEN=Disabled) Drives SMBA pin low and Alert Response Address Header enabled (0001100x) followed by ACK.In host mode (SMBHEN=Enabled) SMBus Alert pin (SMBA) supported" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ALERTEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "PEC enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PECEN_A { # [ doc = "0: PEC calculation disabled" ]
DISABLED = 0 , # [ doc = "1: PEC calculation enabled" ]
ENABLED = 1 } impl From < PECEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : PECEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PECEN`" ]
pub type PECEN_R = crate :: R < bool , PECEN_A > ; impl PECEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PECEN_A { match self . bits { false => PECEN_A :: DISABLED , true => PECEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PECEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PECEN_A :: ENABLED } } # [ doc = "Write proxy for field `PECEN`" ]
pub struct PECEN_W < 'a > { w : & 'a mut W , } impl < 'a > PECEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PECEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PEC calculation disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PECEN_A :: DISABLED ) } # [ doc = "PEC calculation enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PECEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } impl R { # [ doc = "Bit 0 - Peripheral enable" ]
# [ inline ( always ) ]
pub fn pe ( & self ) -> PE_R { PE_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - TX Interrupt enable" ]
# [ inline ( always ) ]
pub fn txie ( & self ) -> TXIE_R { TXIE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - RX Interrupt enable" ]
# [ inline ( always ) ]
pub fn rxie ( & self ) -> RXIE_R { RXIE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Address match interrupt enable (slave only)" ]
# [ inline ( always ) ]
pub fn addrie ( & self ) -> ADDRIE_R { ADDRIE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Not acknowledge received interrupt enable" ]
# [ inline ( always ) ]
pub fn nackie ( & self ) -> NACKIE_R { NACKIE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - STOP detection Interrupt enable" ]
# [ inline ( always ) ]
pub fn stopie ( & self ) -> STOPIE_R { STOPIE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Transfer Complete interrupt enable" ]
# [ inline ( always ) ]
pub fn tcie ( & self ) -> TCIE_R { TCIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Error interrupts enable" ]
# [ inline ( always ) ]
pub fn errie ( & self ) -> ERRIE_R { ERRIE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:11 - Digital noise filter" ]
# [ inline ( always ) ]
pub fn dnf ( & self ) -> DNF_R { DNF_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 12 - Analog noise filter OFF" ]
# [ inline ( always ) ]
pub fn anfoff ( & self ) -> ANFOFF_R { ANFOFF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - DMA transmission requests enable" ]
# [ inline ( always ) ]
pub fn txdmaen ( & self ) -> TXDMAEN_R { TXDMAEN_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - DMA reception requests enable" ]
# [ inline ( always ) ]
pub fn rxdmaen ( & self ) -> RXDMAEN_R { RXDMAEN_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Slave byte control" ]
# [ inline ( always ) ]
pub fn sbc ( & self ) -> SBC_R { SBC_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Clock stretching disable" ]
# [ inline ( always ) ]
pub fn nostretch ( & self ) -> NOSTRETCH_R { NOSTRETCH_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Wakeup from STOP enable" ]
# [ inline ( always ) ]
pub fn wupen ( & self ) -> WUPEN_R { WUPEN_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - General call enable" ]
# [ inline ( always ) ]
pub fn gcen ( & self ) -> GCEN_R { GCEN_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - SMBus Host address enable" ]
# [ inline ( always ) ]
pub fn smbhen ( & self ) -> SMBHEN_R { SMBHEN_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - SMBus Device Default address enable" ]
# [ inline ( always ) ]
pub fn smbden ( & self ) -> SMBDEN_R { SMBDEN_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - SMBUS alert enable" ]
# [ inline ( always ) ]
pub fn alerten ( & self ) -> ALERTEN_R { ALERTEN_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - PEC enable" ]
# [ inline ( always ) ]
pub fn pecen ( & self ) -> PECEN_R { PECEN_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Peripheral enable" ]
# [ inline ( always ) ]
pub fn pe ( & mut self ) -> PE_W { PE_W { w : self } } # [ doc = "Bit 1 - TX Interrupt enable" ]
# [ inline ( always ) ]
pub fn txie ( & mut self ) -> TXIE_W { TXIE_W { w : self } } # [ doc = "Bit 2 - RX Interrupt enable" ]
# [ inline ( always ) ]
pub fn rxie ( & mut self ) -> RXIE_W { RXIE_W { w : self } } # [ doc = "Bit 3 - Address match interrupt enable (slave only)" ]
# [ inline ( always ) ]
pub fn addrie ( & mut self ) -> ADDRIE_W { ADDRIE_W { w : self } } # [ doc = "Bit 4 - Not acknowledge received interrupt enable" ]
# [ inline ( always ) ]
pub fn nackie ( & mut self ) -> NACKIE_W { NACKIE_W { w : self } } # [ doc = "Bit 5 - STOP detection Interrupt enable" ]
# [ inline ( always ) ]
pub fn stopie ( & mut self ) -> STOPIE_W { STOPIE_W { w : self } } # [ doc = "Bit 6 - Transfer Complete interrupt enable" ]
# [ inline ( always ) ]
pub fn tcie ( & mut self ) -> TCIE_W { TCIE_W { w : self } } # [ doc = "Bit 7 - Error interrupts enable" ]
# [ inline ( always ) ]
pub fn errie ( & mut self ) -> ERRIE_W { ERRIE_W { w : self } } # [ doc = "Bits 8:11 - Digital noise filter" ]
# [ inline ( always ) ]
pub fn dnf ( & mut self ) -> DNF_W { DNF_W { w : self } } # [ doc = "Bit 12 - Analog noise filter OFF" ]
# [ inline ( always ) ]
pub fn anfoff ( & mut self ) -> ANFOFF_W { ANFOFF_W { w : self } } # [ doc = "Bit 13 - Software reset" ]
# [ inline ( always ) ]
pub fn swrst ( & mut self ) -> SWRST_W { SWRST_W { w : self } } # [ doc = "Bit 14 - DMA transmission requests enable" ]
# [ inline ( always ) ]
pub fn txdmaen ( & mut self ) -> TXDMAEN_W { TXDMAEN_W { w : self } } # [ doc = "Bit 15 - DMA reception requests enable" ]
# [ inline ( always ) ]
pub fn rxdmaen ( & mut self ) -> RXDMAEN_W { RXDMAEN_W { w : self } } # [ doc = "Bit 16 - Slave byte control" ]
# [ inline ( always ) ]
pub fn sbc ( & mut self ) -> SBC_W { SBC_W { w : self } } # [ doc = "Bit 17 - Clock stretching disable" ]
# [ inline ( always ) ]
pub fn nostretch ( & mut self ) -> NOSTRETCH_W { NOSTRETCH_W { w : self } } # [ doc = "Bit 18 - Wakeup from STOP enable" ]
# [ inline ( always ) ]
pub fn wupen ( & mut self ) -> WUPEN_W { WUPEN_W { w : self } } # [ doc = "Bit 19 - General call enable" ]
# [ inline ( always ) ]
pub fn gcen ( & mut self ) -> GCEN_W { GCEN_W { w : self } } # [ doc = "Bit 20 - SMBus Host address enable" ]
# [ inline ( always ) ]
pub fn smbhen ( & mut self ) -> SMBHEN_W { SMBHEN_W { w : self } } # [ doc = "Bit 21 - SMBus Device Default address enable" ]
# [ inline ( always ) ]
pub fn smbden ( & mut self ) -> SMBDEN_W { SMBDEN_W { w : self } } # [ doc = "Bit 22 - SMBUS alert enable" ]
# [ inline ( always ) ]
pub fn alerten ( & mut self ) -> ALERTEN_W { ALERTEN_W { w : self } } # [ doc = "Bit 23 - PEC enable" ]
# [ inline ( always ) ]
pub fn pecen ( & mut self ) -> PECEN_W { PECEN_W { w : self } } } } # [ doc = "Control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "Control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Packet error checking byte\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PECBYTE_A { # [ doc = "0: No PEC transfer" ]
NOPEC = 0 , # [ doc = "1: PEC transmission/reception is requested" ]
PEC = 1 } impl From < PECBYTE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PECBYTE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PECBYTE`" ]
pub type PECBYTE_R = crate :: R < bool , PECBYTE_A > ; impl PECBYTE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PECBYTE_A { match self . bits { false => PECBYTE_A :: NOPEC , true => PECBYTE_A :: PEC } } # [ doc = "Checks if the value of the field is `NOPEC`" ]
# [ inline ( always ) ]
pub fn is_no_pec ( & self ) -> bool { * self == PECBYTE_A :: NOPEC } # [ doc = "Checks if the value of the field is `PEC`" ]
# [ inline ( always ) ]
pub fn is_pec ( & self ) -> bool { * self == PECBYTE_A :: PEC } } # [ doc = "Write proxy for field `PECBYTE`" ]
pub struct PECBYTE_W < 'a > { w : & 'a mut W , } impl < 'a > PECBYTE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PECBYTE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No PEC transfer" ]
# [ inline ( always ) ]
pub fn no_pec ( self ) -> & 'a mut W { self . variant ( PECBYTE_A :: NOPEC ) } # [ doc = "PEC transmission/reception is requested" ]
# [ inline ( always ) ]
pub fn pec ( self ) -> & 'a mut W { self . variant ( PECBYTE_A :: PEC ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Automatic end mode (master mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AUTOEND_A { # [ doc = "0: Software end mode: TC flag is set when NBYTES data are transferred, stretching SCL low" ]
SOFTWARE = 0 , # [ doc = "1: Automatic end mode: a STOP condition is automatically sent when NBYTES data are transferred" ]
AUTOMATIC = 1 } impl From < AUTOEND_A > for bool { # [ inline ( always ) ]
fn from ( variant : AUTOEND_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AUTOEND`" ]
pub type AUTOEND_R = crate :: R < bool , AUTOEND_A > ; impl AUTOEND_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AUTOEND_A { match self . bits { false => AUTOEND_A :: SOFTWARE , true => AUTOEND_A :: AUTOMATIC } } # [ doc = "Checks if the value of the field is `SOFTWARE`" ]
# [ inline ( always ) ]
pub fn is_software ( & self ) -> bool { * self == AUTOEND_A :: SOFTWARE } # [ doc = "Checks if the value of the field is `AUTOMATIC`" ]
# [ inline ( always ) ]
pub fn is_automatic ( & self ) -> bool { * self == AUTOEND_A :: AUTOMATIC } } # [ doc = "Write proxy for field `AUTOEND`" ]
pub struct AUTOEND_W < 'a > { w : & 'a mut W , } impl < 'a > AUTOEND_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AUTOEND_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Software end mode: TC flag is set when NBYTES data are transferred, stretching SCL low" ]
# [ inline ( always ) ]
pub fn software ( self ) -> & 'a mut W { self . variant ( AUTOEND_A :: SOFTWARE ) } # [ doc = "Automatic end mode: a STOP condition is automatically sent when NBYTES data are transferred" ]
# [ inline ( always ) ]
pub fn automatic ( self ) -> & 'a mut W { self . variant ( AUTOEND_A :: AUTOMATIC ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "NBYTES reload mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RELOAD_A { # [ doc = "0: The transfer is completed after the NBYTES data transfer (STOP or RESTART will follow)" ]
COMPLETED = 0 , # [ doc = "1: The transfer is not completed after the NBYTES data transfer (NBYTES will be reloaded)" ]
NOTCOMPLETED = 1 } impl From < RELOAD_A > for bool { # [ inline ( always ) ]
fn from ( variant : RELOAD_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RELOAD`" ]
pub type RELOAD_R = crate :: R < bool , RELOAD_A > ; impl RELOAD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RELOAD_A { match self . bits { false => RELOAD_A :: COMPLETED , true => RELOAD_A :: NOTCOMPLETED } } # [ doc = "Checks if the value of the field is `COMPLETED`" ]
# [ inline ( always ) ]
pub fn is_completed ( & self ) -> bool { * self == RELOAD_A :: COMPLETED } # [ doc = "Checks if the value of the field is `NOTCOMPLETED`" ]
# [ inline ( always ) ]
pub fn is_not_completed ( & self ) -> bool { * self == RELOAD_A :: NOTCOMPLETED } } # [ doc = "Write proxy for field `RELOAD`" ]
pub struct RELOAD_W < 'a > { w : & 'a mut W , } impl < 'a > RELOAD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RELOAD_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The transfer is completed after the NBYTES data transfer (STOP or RESTART will follow)" ]
# [ inline ( always ) ]
pub fn completed ( self ) -> & 'a mut W { self . variant ( RELOAD_A :: COMPLETED ) } # [ doc = "The transfer is not completed after the NBYTES data transfer (NBYTES will be reloaded)" ]
# [ inline ( always ) ]
pub fn not_completed ( self ) -> & 'a mut W { self . variant ( RELOAD_A :: NOTCOMPLETED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `NBYTES`" ]
pub type NBYTES_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `NBYTES`" ]
pub struct NBYTES_W < 'a > { w : & 'a mut W , } impl < 'a > NBYTES_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "NACK generation (slave mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NACK_A { # [ doc = "0: an ACK is sent after current received byte" ]
ACK = 0 , # [ doc = "1: a NACK is sent after current received byte" ]
NACK = 1 } impl From < NACK_A > for bool { # [ inline ( always ) ]
fn from ( variant : NACK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `NACK`" ]
pub type NACK_R = crate :: R < bool , NACK_A > ; impl NACK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NACK_A { match self . bits { false => NACK_A :: ACK , true => NACK_A :: NACK } } # [ doc = "Checks if the value of the field is `ACK`" ]
# [ inline ( always ) ]
pub fn is_ack ( & self ) -> bool { * self == NACK_A :: ACK } # [ doc = "Checks if the value of the field is `NACK`" ]
# [ inline ( always ) ]
pub fn is_nack ( & self ) -> bool { * self == NACK_A :: NACK } } # [ doc = "Write proxy for field `NACK`" ]
pub struct NACK_W < 'a > { w : & 'a mut W , } impl < 'a > NACK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : NACK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "an ACK is sent after current received byte" ]
# [ inline ( always ) ]
pub fn ack ( self ) -> & 'a mut W { self . variant ( NACK_A :: ACK ) } # [ doc = "a NACK is sent after current received byte" ]
# [ inline ( always ) ]
pub fn nack ( self ) -> & 'a mut W { self . variant ( NACK_A :: NACK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Stop generation (master mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum STOP_A { # [ doc = "0: No Stop generation" ]
NOSTOP = 0 , # [ doc = "1: Stop generation after current byte transfer" ]
STOP = 1 } impl From < STOP_A > for bool { # [ inline ( always ) ]
fn from ( variant : STOP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `STOP`" ]
pub type STOP_R = crate :: R < bool , STOP_A > ; impl STOP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STOP_A { match self . bits { false => STOP_A :: NOSTOP , true => STOP_A :: STOP } } # [ doc = "Checks if the value of the field is `NOSTOP`" ]
# [ inline ( always ) ]
pub fn is_no_stop ( & self ) -> bool { * self == STOP_A :: NOSTOP } # [ doc = "Checks if the value of the field is `STOP`" ]
# [ inline ( always ) ]
pub fn is_stop ( & self ) -> bool { * self == STOP_A :: STOP } } # [ doc = "Write proxy for field `STOP`" ]
pub struct STOP_W < 'a > { w : & 'a mut W , } impl < 'a > STOP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STOP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No Stop generation" ]
# [ inline ( always ) ]
pub fn no_stop ( self ) -> & 'a mut W { self . variant ( STOP_A :: NOSTOP ) } # [ doc = "Stop generation after current byte transfer" ]
# [ inline ( always ) ]
pub fn stop ( self ) -> & 'a mut W { self . variant ( STOP_A :: STOP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Start generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum START_A { # [ doc = "0: No Start generation" ]
NOSTART = 0 , # [ doc = "1: Restart/Start generation" ]
START = 1 } impl From < START_A > for bool { # [ inline ( always ) ]
fn from ( variant : START_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `START`" ]
pub type START_R = crate :: R < bool , START_A > ; impl START_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> START_A { match self . bits { false => START_A :: NOSTART , true => START_A :: START } } # [ doc = "Checks if the value of the field is `NOSTART`" ]
# [ inline ( always ) ]
pub fn is_no_start ( & self ) -> bool { * self == START_A :: NOSTART } # [ doc = "Checks if the value of the field is `START`" ]
# [ inline ( always ) ]
pub fn is_start ( & self ) -> bool { * self == START_A :: START } } # [ doc = "Write proxy for field `START`" ]
pub struct START_W < 'a > { w : & 'a mut W , } impl < 'a > START_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : START_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No Start generation" ]
# [ inline ( always ) ]
pub fn no_start ( self ) -> & 'a mut W { self . variant ( START_A :: NOSTART ) } # [ doc = "Restart/Start generation" ]
# [ inline ( always ) ]
pub fn start ( self ) -> & 'a mut W { self . variant ( START_A :: START ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "10-bit address header only read direction (master receiver mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum HEAD10R_A { # [ doc = "0: The master sends the complete 10 bit slave address read sequence" ]
COMPLETE = 0 , # [ doc = "1: The master only sends the 1st 7 bits of the 10 bit address, followed by Read direction" ]
PARTIAL = 1 } impl From < HEAD10R_A > for bool { # [ inline ( always ) ]
fn from ( variant : HEAD10R_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `HEAD10R`" ]
pub type HEAD10R_R = crate :: R < bool , HEAD10R_A > ; impl HEAD10R_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> HEAD10R_A { match self . bits { false => HEAD10R_A :: COMPLETE , true => HEAD10R_A :: PARTIAL } } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == HEAD10R_A :: COMPLETE } # [ doc = "Checks if the value of the field is `PARTIAL`" ]
# [ inline ( always ) ]
pub fn is_partial ( & self ) -> bool { * self == HEAD10R_A :: PARTIAL } } # [ doc = "Write proxy for field `HEAD10R`" ]
pub struct HEAD10R_W < 'a > { w : & 'a mut W , } impl < 'a > HEAD10R_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : HEAD10R_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The master sends the complete 10 bit slave address read sequence" ]
# [ inline ( always ) ]
pub fn complete ( self ) -> & 'a mut W { self . variant ( HEAD10R_A :: COMPLETE ) } # [ doc = "The master only sends the 1st 7 bits of the 10 bit address, followed by Read direction" ]
# [ inline ( always ) ]
pub fn partial ( self ) -> & 'a mut W { self . variant ( HEAD10R_A :: PARTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "10-bit addressing mode (master mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADD10_A { # [ doc = "0: The master operates in 7-bit addressing mode" ]
BIT7 = 0 , # [ doc = "1: The master operates in 10-bit addressing mode" ]
BIT10 = 1 } impl From < ADD10_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADD10_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADD10`" ]
pub type ADD10_R = crate :: R < bool , ADD10_A > ; impl ADD10_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADD10_A { match self . bits { false => ADD10_A :: BIT7 , true => ADD10_A :: BIT10 } } # [ doc = "Checks if the value of the field is `BIT7`" ]
# [ inline ( always ) ]
pub fn is_bit7 ( & self ) -> bool { * self == ADD10_A :: BIT7 } # [ doc = "Checks if the value of the field is `BIT10`" ]
# [ inline ( always ) ]
pub fn is_bit10 ( & self ) -> bool { * self == ADD10_A :: BIT10 } } # [ doc = "Write proxy for field `ADD10`" ]
pub struct ADD10_W < 'a > { w : & 'a mut W , } impl < 'a > ADD10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADD10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The master operates in 7-bit addressing mode" ]
# [ inline ( always ) ]
pub fn bit7 ( self ) -> & 'a mut W { self . variant ( ADD10_A :: BIT7 ) } # [ doc = "The master operates in 10-bit addressing mode" ]
# [ inline ( always ) ]
pub fn bit10 ( self ) -> & 'a mut W { self . variant ( ADD10_A :: BIT10 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Transfer direction (master mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RD_WRN_A { # [ doc = "0: Master requests a write transfer" ]
WRITE = 0 , # [ doc = "1: Master requests a read transfer" ]
READ = 1 } impl From < RD_WRN_A > for bool { # [ inline ( always ) ]
fn from ( variant : RD_WRN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RD_WRN`" ]
pub type RD_WRN_R = crate :: R < bool , RD_WRN_A > ; impl RD_WRN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RD_WRN_A { match self . bits { false => RD_WRN_A :: WRITE , true => RD_WRN_A :: READ } } # [ doc = "Checks if the value of the field is `WRITE`" ]
# [ inline ( always ) ]
pub fn is_write ( & self ) -> bool { * self == RD_WRN_A :: WRITE } # [ doc = "Checks if the value of the field is `READ`" ]
# [ inline ( always ) ]
pub fn is_read ( & self ) -> bool { * self == RD_WRN_A :: READ } } # [ doc = "Write proxy for field `RD_WRN`" ]
pub struct RD_WRN_W < 'a > { w : & 'a mut W , } impl < 'a > RD_WRN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RD_WRN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Master requests a write transfer" ]
# [ inline ( always ) ]
pub fn write ( self ) -> & 'a mut W { self . variant ( RD_WRN_A :: WRITE ) } # [ doc = "Master requests a read transfer" ]
# [ inline ( always ) ]
pub fn read ( self ) -> & 'a mut W { self . variant ( RD_WRN_A :: READ ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `SADD`" ]
pub type SADD_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `SADD`" ]
pub struct SADD_W < 'a > { w : & 'a mut W , } impl < 'a > SADD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03ff ) | ( ( value as u32 ) & 0x03ff ) ; self . w } } impl R { # [ doc = "Bit 26 - Packet error checking byte" ]
# [ inline ( always ) ]
pub fn pecbyte ( & self ) -> PECBYTE_R { PECBYTE_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Automatic end mode (master mode)" ]
# [ inline ( always ) ]
pub fn autoend ( & self ) -> AUTOEND_R { AUTOEND_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - NBYTES reload mode" ]
# [ inline ( always ) ]
pub fn reload ( & self ) -> RELOAD_R { RELOAD_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:23 - Number of bytes" ]
# [ inline ( always ) ]
pub fn nbytes ( & self ) -> NBYTES_R { NBYTES_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bit 15 - NACK generation (slave mode)" ]
# [ inline ( always ) ]
pub fn nack ( & self ) -> NACK_R { NACK_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Stop generation (master mode)" ]
# [ inline ( always ) ]
pub fn stop ( & self ) -> STOP_R { STOP_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Start generation" ]
# [ inline ( always ) ]
pub fn start ( & self ) -> START_R { START_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - 10-bit address header only read direction (master receiver mode)" ]
# [ inline ( always ) ]
pub fn head10r ( & self ) -> HEAD10R_R { HEAD10R_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - 10-bit addressing mode (master mode)" ]
# [ inline ( always ) ]
pub fn add10 ( & self ) -> ADD10_R { ADD10_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Transfer direction (master mode)" ]
# [ inline ( always ) ]
pub fn rd_wrn ( & self ) -> RD_WRN_R { RD_WRN_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:9 - Slave address bit 9:8 (master mode)" ]
# [ inline ( always ) ]
pub fn sadd ( & self ) -> SADD_R { SADD_R :: new ( ( self . bits & 0x03ff ) as u16 ) } } impl W { # [ doc = "Bit 26 - Packet error checking byte" ]
# [ inline ( always ) ]
pub fn pecbyte ( & mut self ) -> PECBYTE_W { PECBYTE_W { w : self } } # [ doc = "Bit 25 - Automatic end mode (master mode)" ]
# [ inline ( always ) ]
pub fn autoend ( & mut self ) -> AUTOEND_W { AUTOEND_W { w : self } } # [ doc = "Bit 24 - NBYTES reload mode" ]
# [ inline ( always ) ]
pub fn reload ( & mut self ) -> RELOAD_W { RELOAD_W { w : self } } # [ doc = "Bits 16:23 - Number of bytes" ]
# [ inline ( always ) ]
pub fn nbytes ( & mut self ) -> NBYTES_W { NBYTES_W { w : self } } # [ doc = "Bit 15 - NACK generation (slave mode)" ]
# [ inline ( always ) ]
pub fn nack ( & mut self ) -> NACK_W { NACK_W { w : self } } # [ doc = "Bit 14 - Stop generation (master mode)" ]
# [ inline ( always ) ]
pub fn stop ( & mut self ) -> STOP_W { STOP_W { w : self } } # [ doc = "Bit 13 - Start generation" ]
# [ inline ( always ) ]
pub fn start ( & mut self ) -> START_W { START_W { w : self } } # [ doc = "Bit 12 - 10-bit address header only read direction (master receiver mode)" ]
# [ inline ( always ) ]
pub fn head10r ( & mut self ) -> HEAD10R_W { HEAD10R_W { w : self } } # [ doc = "Bit 11 - 10-bit addressing mode (master mode)" ]
# [ inline ( always ) ]
pub fn add10 ( & mut self ) -> ADD10_W { ADD10_W { w : self } } # [ doc = "Bit 10 - Transfer direction (master mode)" ]
# [ inline ( always ) ]
pub fn rd_wrn ( & mut self ) -> RD_WRN_W { RD_WRN_W { w : self } } # [ doc = "Bits 0:9 - Slave address bit 9:8 (master mode)" ]
# [ inline ( always ) ]
pub fn sadd ( & mut self ) -> SADD_W { SADD_W { w : self } } } } # [ doc = "Own address register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [oar1](oar1) module" ]
pub type OAR1 = crate :: Reg < u32 , _OAR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OAR1 ; # [ doc = "`read()` method returns [oar1::R](oar1::R) reader structure" ]
impl crate :: Readable for OAR1 { } # [ doc = "`write(|w| ..)` method takes [oar1::W](oar1::W) writer structure" ]
impl crate :: Writable for OAR1 { } # [ doc = "Own address register 1" ]
pub mod oar1 { # [ doc = "Reader of register OAR1" ]
pub type R = crate :: R < u32 , super :: OAR1 > ; # [ doc = "Writer for register OAR1" ]
pub type W = crate :: W < u32 , super :: OAR1 > ; # [ doc = "Register OAR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OAR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Own Address 1 10-bit mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OA1MODE_A { # [ doc = "0: Own address 1 is a 7-bit address" ]
BIT7 = 0 , # [ doc = "1: Own address 1 is a 10-bit address" ]
BIT10 = 1 } impl From < OA1MODE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OA1MODE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OA1MODE`" ]
pub type OA1MODE_R = crate :: R < bool , OA1MODE_A > ; impl OA1MODE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OA1MODE_A { match self . bits { false => OA1MODE_A :: BIT7 , true => OA1MODE_A :: BIT10 } } # [ doc = "Checks if the value of the field is `BIT7`" ]
# [ inline ( always ) ]
pub fn is_bit7 ( & self ) -> bool { * self == OA1MODE_A :: BIT7 } # [ doc = "Checks if the value of the field is `BIT10`" ]
# [ inline ( always ) ]
pub fn is_bit10 ( & self ) -> bool { * self == OA1MODE_A :: BIT10 } } # [ doc = "Write proxy for field `OA1MODE`" ]
pub struct OA1MODE_W < 'a > { w : & 'a mut W , } impl < 'a > OA1MODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OA1MODE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Own address 1 is a 7-bit address" ]
# [ inline ( always ) ]
pub fn bit7 ( self ) -> & 'a mut W { self . variant ( OA1MODE_A :: BIT7 ) } # [ doc = "Own address 1 is a 10-bit address" ]
# [ inline ( always ) ]
pub fn bit10 ( self ) -> & 'a mut W { self . variant ( OA1MODE_A :: BIT10 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Own Address 1 enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OA1EN_A { # [ doc = "0: Own address 1 disabled. The received slave address OA1 is NACKed" ]
DISABLED = 0 , # [ doc = "1: Own address 1 enabled. The received slave address OA1 is ACKed" ]
ENABLED = 1 } impl From < OA1EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : OA1EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OA1EN`" ]
pub type OA1EN_R = crate :: R < bool , OA1EN_A > ; impl OA1EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OA1EN_A { match self . bits { false => OA1EN_A :: DISABLED , true => OA1EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OA1EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OA1EN_A :: ENABLED } } # [ doc = "Write proxy for field `OA1EN`" ]
pub struct OA1EN_W < 'a > { w : & 'a mut W , } impl < 'a > OA1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OA1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Own address 1 disabled. The received slave address OA1 is NACKed" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OA1EN_A :: DISABLED ) } # [ doc = "Own address 1 enabled. The received slave address OA1 is ACKed" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OA1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `OA1`" ]
pub type OA1_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OA1`" ]
pub struct OA1_W < 'a > { w : & 'a mut W , } impl < 'a > OA1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03ff ) | ( ( value as u32 ) & 0x03ff ) ; self . w } } impl R { # [ doc = "Bit 10 - Own Address 1 10-bit mode" ]
# [ inline ( always ) ]
pub fn oa1mode ( & self ) -> OA1MODE_R { OA1MODE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Own Address 1 enable" ]
# [ inline ( always ) ]
pub fn oa1en ( & self ) -> OA1EN_R { OA1EN_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:9 - Interface address" ]
# [ inline ( always ) ]
pub fn oa1 ( & self ) -> OA1_R { OA1_R :: new ( ( self . bits & 0x03ff ) as u16 ) } } impl W { # [ doc = "Bit 10 - Own Address 1 10-bit mode" ]
# [ inline ( always ) ]
pub fn oa1mode ( & mut self ) -> OA1MODE_W { OA1MODE_W { w : self } } # [ doc = "Bit 15 - Own Address 1 enable" ]
# [ inline ( always ) ]
pub fn oa1en ( & mut self ) -> OA1EN_W { OA1EN_W { w : self } } # [ doc = "Bits 0:9 - Interface address" ]
# [ inline ( always ) ]
pub fn oa1 ( & mut self ) -> OA1_W { OA1_W { w : self } } } } # [ doc = "Own address register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [oar2](oar2) module" ]
pub type OAR2 = crate :: Reg < u32 , _OAR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OAR2 ; # [ doc = "`read()` method returns [oar2::R](oar2::R) reader structure" ]
impl crate :: Readable for OAR2 { } # [ doc = "`write(|w| ..)` method takes [oar2::W](oar2::W) writer structure" ]
impl crate :: Writable for OAR2 { } # [ doc = "Own address register 2" ]
pub mod oar2 { # [ doc = "Reader of register OAR2" ]
pub type R = crate :: R < u32 , super :: OAR2 > ; # [ doc = "Writer for register OAR2" ]
pub type W = crate :: W < u32 , super :: OAR2 > ; # [ doc = "Register OAR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OAR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OA2`" ]
pub type OA2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OA2`" ]
pub struct OA2_W < 'a > { w : & 'a mut W , } impl < 'a > OA2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x7f << 1 ) ) | ( ( ( value as u32 ) & 0x7f ) << 1 ) ; self . w } } # [ doc = "Own Address 2 masks\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OA2MSK_A { # [ doc = "0: No mask" ]
NOMASK = 0 , # [ doc = "1: OA2\\[1\\]
is masked and don\u{2019}t care. Only OA2\\[7:2\\]
are compared" ]
MASK1 = 1 , # [ doc = "2: OA2\\[2:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:3\\]
are compared" ]
MASK2 = 2 , # [ doc = "3: OA2\\[3:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:4\\]
are compared" ]
MASK3 = 3 , # [ doc = "4: OA2\\[4:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:5\\]
are compared" ]
MASK4 = 4 , # [ doc = "5: OA2\\[5:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:6\\]
are compared" ]
MASK5 = 5 , # [ doc = "6: OA2\\[6:1\\]
are masked and don\u{2019}t care. Only OA2\\[7\\]
is compared." ]
MASK6 = 6 , # [ doc = "7: OA2\\[7:1\\]
are masked and don\u{2019}t care. No comparison is done, and all (except reserved) 7-bit received addresses are acknowledged" ]
MASK7 = 7 } impl From < OA2MSK_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OA2MSK_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OA2MSK`" ]
pub type OA2MSK_R = crate :: R < u8 , OA2MSK_A > ; impl OA2MSK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OA2MSK_A { match self . bits { 0 => OA2MSK_A :: NOMASK , 1 => OA2MSK_A :: MASK1 , 2 => OA2MSK_A :: MASK2 , 3 => OA2MSK_A :: MASK3 , 4 => OA2MSK_A :: MASK4 , 5 => OA2MSK_A :: MASK5 , 6 => OA2MSK_A :: MASK6 , 7 => OA2MSK_A :: MASK7 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOMASK`" ]
# [ inline ( always ) ]
pub fn is_no_mask ( & self ) -> bool { * self == OA2MSK_A :: NOMASK } # [ doc = "Checks if the value of the field is `MASK1`" ]
# [ inline ( always ) ]
pub fn is_mask1 ( & self ) -> bool { * self == OA2MSK_A :: MASK1 } # [ doc = "Checks if the value of the field is `MASK2`" ]
# [ inline ( always ) ]
pub fn is_mask2 ( & self ) -> bool { * self == OA2MSK_A :: MASK2 } # [ doc = "Checks if the value of the field is `MASK3`" ]
# [ inline ( always ) ]
pub fn is_mask3 ( & self ) -> bool { * self == OA2MSK_A :: MASK3 } # [ doc = "Checks if the value of the field is `MASK4`" ]
# [ inline ( always ) ]
pub fn is_mask4 ( & self ) -> bool { * self == OA2MSK_A :: MASK4 } # [ doc = "Checks if the value of the field is `MASK5`" ]
# [ inline ( always ) ]
pub fn is_mask5 ( & self ) -> bool { * self == OA2MSK_A :: MASK5 } # [ doc = "Checks if the value of the field is `MASK6`" ]
# [ inline ( always ) ]
pub fn is_mask6 ( & self ) -> bool { * self == OA2MSK_A :: MASK6 } # [ doc = "Checks if the value of the field is `MASK7`" ]
# [ inline ( always ) ]
pub fn is_mask7 ( & self ) -> bool { * self == OA2MSK_A :: MASK7 } } # [ doc = "Write proxy for field `OA2MSK`" ]
pub struct OA2MSK_W < 'a > { w : & 'a mut W , } impl < 'a > OA2MSK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OA2MSK_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No mask" ]
# [ inline ( always ) ]
pub fn no_mask ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: NOMASK ) } # [ doc = "OA2\\[1\\]
is masked and don\u{2019}t care. Only OA2\\[7:2\\]
are compared" ]
# [ inline ( always ) ]
pub fn mask1 ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: MASK1 ) } # [ doc = "OA2\\[2:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:3\\]
are compared" ]
# [ inline ( always ) ]
pub fn mask2 ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: MASK2 ) } # [ doc = "OA2\\[3:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:4\\]
are compared" ]
# [ inline ( always ) ]
pub fn mask3 ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: MASK3 ) } # [ doc = "OA2\\[4:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:5\\]
are compared" ]
# [ inline ( always ) ]
pub fn mask4 ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: MASK4 ) } # [ doc = "OA2\\[5:1\\]
are masked and don\u{2019}t care. Only OA2\\[7:6\\]
are compared" ]
# [ inline ( always ) ]
pub fn mask5 ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: MASK5 ) } # [ doc = "OA2\\[6:1\\]
are masked and don\u{2019}t care. Only OA2\\[7\\]
is compared." ]
# [ inline ( always ) ]
pub fn mask6 ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: MASK6 ) } # [ doc = "OA2\\[7:1\\]
are masked and don\u{2019}t care. No comparison is done, and all (except reserved) 7-bit received addresses are acknowledged" ]
# [ inline ( always ) ]
pub fn mask7 ( self ) -> & 'a mut W { self . variant ( OA2MSK_A :: MASK7 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 8 ) ) | ( ( ( value as u32 ) & 0x07 ) << 8 ) ; self . w } } # [ doc = "Own Address 2 enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OA2EN_A { # [ doc = "0: Own address 2 disabled. The received slave address OA2 is NACKed" ]
DISABLED = 0 , # [ doc = "1: Own address 2 enabled. The received slave address OA2 is ACKed" ]
ENABLED = 1 } impl From < OA2EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : OA2EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OA2EN`" ]
pub type OA2EN_R = crate :: R < bool , OA2EN_A > ; impl OA2EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OA2EN_A { match self . bits { false => OA2EN_A :: DISABLED , true => OA2EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OA2EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OA2EN_A :: ENABLED } } # [ doc = "Write proxy for field `OA2EN`" ]
pub struct OA2EN_W < 'a > { w : & 'a mut W , } impl < 'a > OA2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OA2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Own address 2 disabled. The received slave address OA2 is NACKed" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OA2EN_A :: DISABLED ) } # [ doc = "Own address 2 enabled. The received slave address OA2 is ACKed" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OA2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bits 1:7 - Interface address" ]
# [ inline ( always ) ]
pub fn oa2 ( & self ) -> OA2_R { OA2_R :: new ( ( ( self . bits >> 1 ) & 0x7f ) as u8 ) } # [ doc = "Bits 8:10 - Own Address 2 masks" ]
# [ inline ( always ) ]
pub fn oa2msk ( & self ) -> OA2MSK_R { OA2MSK_R :: new ( ( ( self . bits >> 8 ) & 0x07 ) as u8 ) } # [ doc = "Bit 15 - Own Address 2 enable" ]
# [ inline ( always ) ]
pub fn oa2en ( & self ) -> OA2EN_R { OA2EN_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 1:7 - Interface address" ]
# [ inline ( always ) ]
pub fn oa2 ( & mut self ) -> OA2_W { OA2_W { w : self } } # [ doc = "Bits 8:10 - Own Address 2 masks" ]
# [ inline ( always ) ]
pub fn oa2msk ( & mut self ) -> OA2MSK_W { OA2MSK_W { w : self } } # [ doc = "Bit 15 - Own Address 2 enable" ]
# [ inline ( always ) ]
pub fn oa2en ( & mut self ) -> OA2EN_W { OA2EN_W { w : self } } } } # [ doc = "Timing register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timingr](timingr) module" ]
pub type TIMINGR = crate :: Reg < u32 , _TIMINGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TIMINGR ; # [ doc = "`read()` method returns [timingr::R](timingr::R) reader structure" ]
impl crate :: Readable for TIMINGR { } # [ doc = "`write(|w| ..)` method takes [timingr::W](timingr::W) writer structure" ]
impl crate :: Writable for TIMINGR { } # [ doc = "Timing register" ]
pub mod timingr { # [ doc = "Reader of register TIMINGR" ]
pub type R = crate :: R < u32 , super :: TIMINGR > ; # [ doc = "Writer for register TIMINGR" ]
pub type W = crate :: W < u32 , super :: TIMINGR > ; # [ doc = "Register TIMINGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TIMINGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `SCLL`" ]
pub type SCLL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SCLL`" ]
pub struct SCLL_W < 'a > { w : & 'a mut W , } impl < 'a > SCLL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } # [ doc = "Reader of field `SCLH`" ]
pub type SCLH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SCLH`" ]
pub struct SCLH_W < 'a > { w : & 'a mut W , } impl < 'a > SCLH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `SDADEL`" ]
pub type SDADEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SDADEL`" ]
pub struct SDADEL_W < 'a > { w : & 'a mut W , } impl < 'a > SDADEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `SCLDEL`" ]
pub type SCLDEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SCLDEL`" ]
pub struct SCLDEL_W < 'a > { w : & 'a mut W , } impl < 'a > SCLDEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `PRESC`" ]
pub type PRESC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PRESC`" ]
pub struct PRESC_W < 'a > { w : & 'a mut W , } impl < 'a > PRESC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } impl R { # [ doc = "Bits 0:7 - SCL low period (master mode)" ]
# [ inline ( always ) ]
pub fn scll ( & self ) -> SCLL_R { SCLL_R :: new ( ( self . bits & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - SCL high period (master mode)" ]
# [ inline ( always ) ]
pub fn sclh ( & self ) -> SCLH_R { SCLH_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:19 - Data hold time" ]
# [ inline ( always ) ]
pub fn sdadel ( & self ) -> SDADEL_R { SDADEL_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Data setup time" ]
# [ inline ( always ) ]
pub fn scldel ( & self ) -> SCLDEL_R { SCLDEL_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 28:31 - Timing prescaler" ]
# [ inline ( always ) ]
pub fn presc ( & self ) -> PRESC_R { PRESC_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - SCL low period (master mode)" ]
# [ inline ( always ) ]
pub fn scll ( & mut self ) -> SCLL_W { SCLL_W { w : self } } # [ doc = "Bits 8:15 - SCL high period (master mode)" ]
# [ inline ( always ) ]
pub fn sclh ( & mut self ) -> SCLH_W { SCLH_W { w : self } } # [ doc = "Bits 16:19 - Data hold time" ]
# [ inline ( always ) ]
pub fn sdadel ( & mut self ) -> SDADEL_W { SDADEL_W { w : self } } # [ doc = "Bits 20:23 - Data setup time" ]
# [ inline ( always ) ]
pub fn scldel ( & mut self ) -> SCLDEL_W { SCLDEL_W { w : self } } # [ doc = "Bits 28:31 - Timing prescaler" ]
# [ inline ( always ) ]
pub fn presc ( & mut self ) -> PRESC_W { PRESC_W { w : self } } } } # [ doc = "Status register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timeoutr](timeoutr) module" ]
pub type TIMEOUTR = crate :: Reg < u32 , _TIMEOUTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TIMEOUTR ; # [ doc = "`read()` method returns [timeoutr::R](timeoutr::R) reader structure" ]
impl crate :: Readable for TIMEOUTR { } # [ doc = "`write(|w| ..)` method takes [timeoutr::W](timeoutr::W) writer structure" ]
impl crate :: Writable for TIMEOUTR { } # [ doc = "Status register 1" ]
pub mod timeoutr { # [ doc = "Reader of register TIMEOUTR" ]
pub type R = crate :: R < u32 , super :: TIMEOUTR > ; # [ doc = "Writer for register TIMEOUTR" ]
pub type W = crate :: W < u32 , super :: TIMEOUTR > ; # [ doc = "Register TIMEOUTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TIMEOUTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TIMEOUTA`" ]
pub type TIMEOUTA_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `TIMEOUTA`" ]
pub struct TIMEOUTA_W < 'a > { w : & 'a mut W , } impl < 'a > TIMEOUTA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } # [ doc = "Idle clock timeout detection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIDLE_A { # [ doc = "0: TIMEOUTA is used to detect SCL low timeout" ]
DISABLED = 0 , # [ doc = "1: TIMEOUTA is used to detect both SCL and SDA high timeout (bus idle condition)" ]
ENABLED = 1 } impl From < TIDLE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIDLE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIDLE`" ]
pub type TIDLE_R = crate :: R < bool , TIDLE_A > ; impl TIDLE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIDLE_A { match self . bits { false => TIDLE_A :: DISABLED , true => TIDLE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TIDLE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TIDLE_A :: ENABLED } } # [ doc = "Write proxy for field `TIDLE`" ]
pub struct TIDLE_W < 'a > { w : & 'a mut W , } impl < 'a > TIDLE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIDLE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMEOUTA is used to detect SCL low timeout" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIDLE_A :: DISABLED ) } # [ doc = "TIMEOUTA is used to detect both SCL and SDA high timeout (bus idle condition)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIDLE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Clock timeout enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIMOUTEN_A { # [ doc = "0: SCL timeout detection is disabled" ]
DISABLED = 0 , # [ doc = "1: SCL timeout detection is enabled" ]
ENABLED = 1 } impl From < TIMOUTEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIMOUTEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIMOUTEN`" ]
pub type TIMOUTEN_R = crate :: R < bool , TIMOUTEN_A > ; impl TIMOUTEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIMOUTEN_A { match self . bits { false => TIMOUTEN_A :: DISABLED , true => TIMOUTEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TIMOUTEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TIMOUTEN_A :: ENABLED } } # [ doc = "Write proxy for field `TIMOUTEN`" ]
pub struct TIMOUTEN_W < 'a > { w : & 'a mut W , } impl < 'a > TIMOUTEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIMOUTEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "SCL timeout detection is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIMOUTEN_A :: DISABLED ) } # [ doc = "SCL timeout detection is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIMOUTEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `TIMEOUTB`" ]
pub type TIMEOUTB_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `TIMEOUTB`" ]
pub struct TIMEOUTB_W < 'a > { w : & 'a mut W , } impl < 'a > TIMEOUTB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 16 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 16 ) ; self . w } } # [ doc = "Extended clock timeout enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TEXTEN_A { # [ doc = "0: Extended clock timeout detection is disabled" ]
DISABLED = 0 , # [ doc = "1: Extended clock timeout detection is enabled" ]
ENABLED = 1 } impl From < TEXTEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : TEXTEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TEXTEN`" ]
pub type TEXTEN_R = crate :: R < bool , TEXTEN_A > ; impl TEXTEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TEXTEN_A { match self . bits { false => TEXTEN_A :: DISABLED , true => TEXTEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TEXTEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TEXTEN_A :: ENABLED } } # [ doc = "Write proxy for field `TEXTEN`" ]
pub struct TEXTEN_W < 'a > { w : & 'a mut W , } impl < 'a > TEXTEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TEXTEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Extended clock timeout detection is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TEXTEN_A :: DISABLED ) } # [ doc = "Extended clock timeout detection is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TEXTEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bits 0:11 - Bus timeout A" ]
# [ inline ( always ) ]
pub fn timeouta ( & self ) -> TIMEOUTA_R { TIMEOUTA_R :: new ( ( self . bits & 0x0fff ) as u16 ) } # [ doc = "Bit 12 - Idle clock timeout detection" ]
# [ inline ( always ) ]
pub fn tidle ( & self ) -> TIDLE_R { TIDLE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Clock timeout enable" ]
# [ inline ( always ) ]
pub fn timouten ( & self ) -> TIMOUTEN_R { TIMOUTEN_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:27 - Bus timeout B" ]
# [ inline ( always ) ]
pub fn timeoutb ( & self ) -> TIMEOUTB_R { TIMEOUTB_R :: new ( ( ( self . bits >> 16 ) & 0x0fff ) as u16 ) } # [ doc = "Bit 31 - Extended clock timeout enable" ]
# [ inline ( always ) ]
pub fn texten ( & self ) -> TEXTEN_R { TEXTEN_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:11 - Bus timeout A" ]
# [ inline ( always ) ]
pub fn timeouta ( & mut self ) -> TIMEOUTA_W { TIMEOUTA_W { w : self } } # [ doc = "Bit 12 - Idle clock timeout detection" ]
# [ inline ( always ) ]
pub fn tidle ( & mut self ) -> TIDLE_W { TIDLE_W { w : self } } # [ doc = "Bit 15 - Clock timeout enable" ]
# [ inline ( always ) ]
pub fn timouten ( & mut self ) -> TIMOUTEN_W { TIMOUTEN_W { w : self } } # [ doc = "Bits 16:27 - Bus timeout B" ]
# [ inline ( always ) ]
pub fn timeoutb ( & mut self ) -> TIMEOUTB_W { TIMEOUTB_W { w : self } } # [ doc = "Bit 31 - Extended clock timeout enable" ]
# [ inline ( always ) ]
pub fn texten ( & mut self ) -> TEXTEN_W { TEXTEN_W { w : self } } } } # [ doc = "Interrupt and Status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module" ]
pub type ISR = crate :: Reg < u32 , _ISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISR ; # [ doc = "`read()` method returns [isr::R](isr::R) reader structure" ]
impl crate :: Readable for ISR { } # [ doc = "`write(|w| ..)` method takes [isr::W](isr::W) writer structure" ]
impl crate :: Writable for ISR { } # [ doc = "Interrupt and Status register" ]
pub mod isr { # [ doc = "Reader of register ISR" ]
pub type R = crate :: R < u32 , super :: ISR > ; # [ doc = "Writer for register ISR" ]
pub type W = crate :: W < u32 , super :: ISR > ; # [ doc = "Register ISR `reset()`'s with value 0x01" ]
impl crate :: ResetValue for super :: ISR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x01 } } # [ doc = "Reader of field `ADDCODE`" ]
pub type ADDCODE_R = crate :: R < u8 , u8 > ; # [ doc = "Transfer direction (Slave mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIR_A { # [ doc = "0: Write transfer, slave enters receiver mode" ]
WRITE = 0 , # [ doc = "1: Read transfer, slave enters transmitter mode" ]
READ = 1 } impl From < DIR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIR`" ]
pub type DIR_R = crate :: R < bool , DIR_A > ; impl DIR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIR_A { match self . bits { false => DIR_A :: WRITE , true => DIR_A :: READ } } # [ doc = "Checks if the value of the field is `WRITE`" ]
# [ inline ( always ) ]
pub fn is_write ( & self ) -> bool { * self == DIR_A :: WRITE } # [ doc = "Checks if the value of the field is `READ`" ]
# [ inline ( always ) ]
pub fn is_read ( & self ) -> bool { * self == DIR_A :: READ } } # [ doc = "Bus busy\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BUSY_A { # [ doc = "0: No communication is in progress on the bus" ]
NOTBUSY = 0 , # [ doc = "1: A communication is in progress on the bus" ]
BUSY = 1 } impl From < BUSY_A > for bool { # [ inline ( always ) ]
fn from ( variant : BUSY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BUSY`" ]
pub type BUSY_R = crate :: R < bool , BUSY_A > ; impl BUSY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BUSY_A { match self . bits { false => BUSY_A :: NOTBUSY , true => BUSY_A :: BUSY } } # [ doc = "Checks if the value of the field is `NOTBUSY`" ]
# [ inline ( always ) ]
pub fn is_not_busy ( & self ) -> bool { * self == BUSY_A :: NOTBUSY } # [ doc = "Checks if the value of the field is `BUSY`" ]
# [ inline ( always ) ]
pub fn is_busy ( & self ) -> bool { * self == BUSY_A :: BUSY } } # [ doc = "SMBus alert\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALERT_A { # [ doc = "0: SMBA alert is not detected" ]
NOALERT = 0 , # [ doc = "1: SMBA alert event is detected on SMBA pin" ]
ALERT = 1 } impl From < ALERT_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALERT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALERT`" ]
pub type ALERT_R = crate :: R < bool , ALERT_A > ; impl ALERT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALERT_A { match self . bits { false => ALERT_A :: NOALERT , true => ALERT_A :: ALERT } } # [ doc = "Checks if the value of the field is `NOALERT`" ]
# [ inline ( always ) ]
pub fn is_no_alert ( & self ) -> bool { * self == ALERT_A :: NOALERT } # [ doc = "Checks if the value of the field is `ALERT`" ]
# [ inline ( always ) ]
pub fn is_alert ( & self ) -> bool { * self == ALERT_A :: ALERT } } # [ doc = "Timeout or t_low detection flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIMEOUT_A { # [ doc = "0: No timeout occured" ]
NOTIMEOUT = 0 , # [ doc = "1: Timeout occured" ]
TIMEOUT = 1 } impl From < TIMEOUT_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIMEOUT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIMEOUT`" ]
pub type TIMEOUT_R = crate :: R < bool , TIMEOUT_A > ; impl TIMEOUT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIMEOUT_A { match self . bits { false => TIMEOUT_A :: NOTIMEOUT , true => TIMEOUT_A :: TIMEOUT } } # [ doc = "Checks if the value of the field is `NOTIMEOUT`" ]
# [ inline ( always ) ]
pub fn is_no_timeout ( & self ) -> bool { * self == TIMEOUT_A :: NOTIMEOUT } # [ doc = "Checks if the value of the field is `TIMEOUT`" ]
# [ inline ( always ) ]
pub fn is_timeout ( & self ) -> bool { * self == TIMEOUT_A :: TIMEOUT } } # [ doc = "PEC Error in reception\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PECERR_A { # [ doc = "0: Received PEC does match with PEC register" ]
MATCH = 0 , # [ doc = "1: Received PEC does not match with PEC register" ]
NOMATCH = 1 } impl From < PECERR_A > for bool { # [ inline ( always ) ]
fn from ( variant : PECERR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PECERR`" ]
pub type PECERR_R = crate :: R < bool , PECERR_A > ; impl PECERR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PECERR_A { match self . bits { false => PECERR_A :: MATCH , true => PECERR_A :: NOMATCH } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == PECERR_A :: MATCH } # [ doc = "Checks if the value of the field is `NOMATCH`" ]
# [ inline ( always ) ]
pub fn is_no_match ( & self ) -> bool { * self == PECERR_A :: NOMATCH } } # [ doc = "Overrun/Underrun (slave mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVR_A { # [ doc = "0: No overrun/underrun error occurs" ]
NOOVERRUN = 0 , # [ doc = "1: slave mode with NOSTRETCH=1, when an overrun/underrun error occurs" ]
OVERRUN = 1 } impl From < OVR_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVR`" ]
pub type OVR_R = crate :: R < bool , OVR_A > ; impl OVR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVR_A { match self . bits { false => OVR_A :: NOOVERRUN , true => OVR_A :: OVERRUN } } # [ doc = "Checks if the value of the field is `NOOVERRUN`" ]
# [ inline ( always ) ]
pub fn is_no_overrun ( & self ) -> bool { * self == OVR_A :: NOOVERRUN } # [ doc = "Checks if the value of the field is `OVERRUN`" ]
# [ inline ( always ) ]
pub fn is_overrun ( & self ) -> bool { * self == OVR_A :: OVERRUN } } # [ doc = "Arbitration lost\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARLO_A { # [ doc = "0: No arbitration lost" ]
NOTLOST = 0 , # [ doc = "1: Arbitration lost" ]
LOST = 1 } impl From < ARLO_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARLO_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARLO`" ]
pub type ARLO_R = crate :: R < bool , ARLO_A > ; impl ARLO_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARLO_A { match self . bits { false => ARLO_A :: NOTLOST , true => ARLO_A :: LOST } } # [ doc = "Checks if the value of the field is `NOTLOST`" ]
# [ inline ( always ) ]
pub fn is_not_lost ( & self ) -> bool { * self == ARLO_A :: NOTLOST } # [ doc = "Checks if the value of the field is `LOST`" ]
# [ inline ( always ) ]
pub fn is_lost ( & self ) -> bool { * self == ARLO_A :: LOST } } # [ doc = "Bus error\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BERR_A { # [ doc = "0: No bus error" ]
NOERROR = 0 , # [ doc = "1: Misplaced Start and Stop condition is detected" ]
ERROR = 1 } impl From < BERR_A > for bool { # [ inline ( always ) ]
fn from ( variant : BERR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BERR`" ]
pub type BERR_R = crate :: R < bool , BERR_A > ; impl BERR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BERR_A { match self . bits { false => BERR_A :: NOERROR , true => BERR_A :: ERROR } } # [ doc = "Checks if the value of the field is `NOERROR`" ]
# [ inline ( always ) ]
pub fn is_no_error ( & self ) -> bool { * self == BERR_A :: NOERROR } # [ doc = "Checks if the value of the field is `ERROR`" ]
# [ inline ( always ) ]
pub fn is_error ( & self ) -> bool { * self == BERR_A :: ERROR } } # [ doc = "Transfer Complete Reload\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TCR_A { # [ doc = "0: Transfer is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: NBYTES has been transfered" ]
COMPLETE = 1 } impl From < TCR_A > for bool { # [ inline ( always ) ]
fn from ( variant : TCR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TCR`" ]
pub type TCR_R = crate :: R < bool , TCR_A > ; impl TCR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TCR_A { match self . bits { false => TCR_A :: NOTCOMPLETE , true => TCR_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == TCR_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == TCR_A :: COMPLETE } } # [ doc = "Transfer Complete (master mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TC_A { # [ doc = "0: Transfer is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: NBYTES has been transfered" ]
COMPLETE = 1 } impl From < TC_A > for bool { # [ inline ( always ) ]
fn from ( variant : TC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TC`" ]
pub type TC_R = crate :: R < bool , TC_A > ; impl TC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TC_A { match self . bits { false => TC_A :: NOTCOMPLETE , true => TC_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == TC_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == TC_A :: COMPLETE } } # [ doc = "Stop detection flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum STOPF_A { # [ doc = "0: No Stop condition detected" ]
NOSTOP = 0 , # [ doc = "1: Stop condition detected" ]
STOP = 1 } impl From < STOPF_A > for bool { # [ inline ( always ) ]
fn from ( variant : STOPF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `STOPF`" ]
pub type STOPF_R = crate :: R < bool , STOPF_A > ; impl STOPF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> STOPF_A { match self . bits { false => STOPF_A :: NOSTOP , true => STOPF_A :: STOP } } # [ doc = "Checks if the value of the field is `NOSTOP`" ]
# [ inline ( always ) ]
pub fn is_no_stop ( & self ) -> bool { * self == STOPF_A :: NOSTOP } # [ doc = "Checks if the value of the field is `STOP`" ]
# [ inline ( always ) ]
pub fn is_stop ( & self ) -> bool { * self == STOPF_A :: STOP } } # [ doc = "Not acknowledge received flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NACKF_A { # [ doc = "0: No NACK has been received" ]
NONACK = 0 , # [ doc = "1: NACK has been received" ]
NACK = 1 } impl From < NACKF_A > for bool { # [ inline ( always ) ]
fn from ( variant : NACKF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `NACKF`" ]
pub type NACKF_R = crate :: R < bool , NACKF_A > ; impl NACKF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> NACKF_A { match self . bits { false => NACKF_A :: NONACK , true => NACKF_A :: NACK } } # [ doc = "Checks if the value of the field is `NONACK`" ]
# [ inline ( always ) ]
pub fn is_no_nack ( & self ) -> bool { * self == NACKF_A :: NONACK } # [ doc = "Checks if the value of the field is `NACK`" ]
# [ inline ( always ) ]
pub fn is_nack ( & self ) -> bool { * self == NACKF_A :: NACK } } # [ doc = "Address matched (slave mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADDR_A { # [ doc = "0: Adress mismatched or not received" ]
NOTMATCH = 0 , # [ doc = "1: Received slave address matched with one of the enabled slave addresses" ]
MATCH = 1 } impl From < ADDR_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADDR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADDR`" ]
pub type ADDR_R = crate :: R < bool , ADDR_A > ; impl ADDR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADDR_A { match self . bits { false => ADDR_A :: NOTMATCH , true => ADDR_A :: MATCH } } # [ doc = "Checks if the value of the field is `NOTMATCH`" ]
# [ inline ( always ) ]
pub fn is_not_match ( & self ) -> bool { * self == ADDR_A :: NOTMATCH } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == ADDR_A :: MATCH } } # [ doc = "Receive data register not empty (receivers)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RXNE_A { # [ doc = "0: The RXDR register is empty" ]
EMPTY = 0 , # [ doc = "1: Received data is copied into the RXDR register, and is ready to be read" ]
NOTEMPTY = 1 } impl From < RXNE_A > for bool { # [ inline ( always ) ]
fn from ( variant : RXNE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RXNE`" ]
pub type RXNE_R = crate :: R < bool , RXNE_A > ; impl RXNE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RXNE_A { match self . bits { false => RXNE_A :: EMPTY , true => RXNE_A :: NOTEMPTY } } # [ doc = "Checks if the value of the field is `EMPTY`" ]
# [ inline ( always ) ]
pub fn is_empty ( & self ) -> bool { * self == RXNE_A :: EMPTY } # [ doc = "Checks if the value of the field is `NOTEMPTY`" ]
# [ inline ( always ) ]
pub fn is_not_empty ( & self ) -> bool { * self == RXNE_A :: NOTEMPTY } } # [ doc = "Transmit interrupt status (transmitters)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXIS_A { # [ doc = "0: The TXDR register is not empty" ]
NOTEMPTY = 0 , # [ doc = "1: The TXDR register is empty and the data to be transmitted must be written in the TXDR register" ]
EMPTY = 1 } impl From < TXIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXIS`" ]
pub type TXIS_R = crate :: R < bool , TXIS_A > ; impl TXIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXIS_A { match self . bits { false => TXIS_A :: NOTEMPTY , true => TXIS_A :: EMPTY } } # [ doc = "Checks if the value of the field is `NOTEMPTY`" ]
# [ inline ( always ) ]
pub fn is_not_empty ( & self ) -> bool { * self == TXIS_A :: NOTEMPTY } # [ doc = "Checks if the value of the field is `EMPTY`" ]
# [ inline ( always ) ]
pub fn is_empty ( & self ) -> bool { * self == TXIS_A :: EMPTY } } # [ doc = "Write proxy for field `TXIS`" ]
pub struct TXIS_W < 'a > { w : & 'a mut W , } impl < 'a > TXIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TXDR register is not empty" ]
# [ inline ( always ) ]
pub fn not_empty ( self ) -> & 'a mut W { self . variant ( TXIS_A :: NOTEMPTY ) } # [ doc = "The TXDR register is empty and the data to be transmitted must be written in the TXDR register" ]
# [ inline ( always ) ]
pub fn empty ( self ) -> & 'a mut W { self . variant ( TXIS_A :: EMPTY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Transmit data register empty (transmitters)\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TXE_A { # [ doc = "0: TXDR register not empty" ]
NOTEMPTY = 0 , # [ doc = "1: TXDR register empty" ]
EMPTY = 1 } impl From < TXE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TXE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TXE`" ]
pub type TXE_R = crate :: R < bool , TXE_A > ; impl TXE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TXE_A { match self . bits { false => TXE_A :: NOTEMPTY , true => TXE_A :: EMPTY } } # [ doc = "Checks if the value of the field is `NOTEMPTY`" ]
# [ inline ( always ) ]
pub fn is_not_empty ( & self ) -> bool { * self == TXE_A :: NOTEMPTY } # [ doc = "Checks if the value of the field is `EMPTY`" ]
# [ inline ( always ) ]
pub fn is_empty ( & self ) -> bool { * self == TXE_A :: EMPTY } } # [ doc = "Write proxy for field `TXE`" ]
pub struct TXE_W < 'a > { w : & 'a mut W , } impl < 'a > TXE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TXE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TXDR register not empty" ]
# [ inline ( always ) ]
pub fn not_empty ( self ) -> & 'a mut W { self . variant ( TXE_A :: NOTEMPTY ) } # [ doc = "TXDR register empty" ]
# [ inline ( always ) ]
pub fn empty ( self ) -> & 'a mut W { self . variant ( TXE_A :: EMPTY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 17:23 - Address match code (Slave mode)" ]
# [ inline ( always ) ]
pub fn addcode ( & self ) -> ADDCODE_R { ADDCODE_R :: new ( ( ( self . bits >> 17 ) & 0x7f ) as u8 ) } # [ doc = "Bit 16 - Transfer direction (Slave mode)" ]
# [ inline ( always ) ]
pub fn dir ( & self ) -> DIR_R { DIR_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Bus busy" ]
# [ inline ( always ) ]
pub fn busy ( & self ) -> BUSY_R { BUSY_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - SMBus alert" ]
# [ inline ( always ) ]
pub fn alert ( & self ) -> ALERT_R { ALERT_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Timeout or t_low detection flag" ]
# [ inline ( always ) ]
pub fn timeout ( & self ) -> TIMEOUT_R { TIMEOUT_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - PEC Error in reception" ]
# [ inline ( always ) ]
pub fn pecerr ( & self ) -> PECERR_R { PECERR_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Overrun/Underrun (slave mode)" ]
# [ inline ( always ) ]
pub fn ovr ( & self ) -> OVR_R { OVR_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Arbitration lost" ]
# [ inline ( always ) ]
pub fn arlo ( & self ) -> ARLO_R { ARLO_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Bus error" ]
# [ inline ( always ) ]
pub fn berr ( & self ) -> BERR_R { BERR_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Transfer Complete Reload" ]
# [ inline ( always ) ]
pub fn tcr ( & self ) -> TCR_R { TCR_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Transfer Complete (master mode)" ]
# [ inline ( always ) ]
pub fn tc ( & self ) -> TC_R { TC_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Stop detection flag" ]
# [ inline ( always ) ]
pub fn stopf ( & self ) -> STOPF_R { STOPF_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Not acknowledge received flag" ]
# [ inline ( always ) ]
pub fn nackf ( & self ) -> NACKF_R { NACKF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Address matched (slave mode)" ]
# [ inline ( always ) ]
pub fn addr ( & self ) -> ADDR_R { ADDR_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Receive data register not empty (receivers)" ]
# [ inline ( always ) ]
pub fn rxne ( & self ) -> RXNE_R { RXNE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Transmit interrupt status (transmitters)" ]
# [ inline ( always ) ]
pub fn txis ( & self ) -> TXIS_R { TXIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Transmit data register empty (transmitters)" ]
# [ inline ( always ) ]
pub fn txe ( & self ) -> TXE_R { TXE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 1 - Transmit interrupt status (transmitters)" ]
# [ inline ( always ) ]
pub fn txis ( & mut self ) -> TXIS_W { TXIS_W { w : self } } # [ doc = "Bit 0 - Transmit data register empty (transmitters)" ]
# [ inline ( always ) ]
pub fn txe ( & mut self ) -> TXE_W { TXE_W { w : self } } } } # [ doc = "Interrupt clear register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](icr) module" ]
pub type ICR = crate :: Reg < u32 , _ICR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ICR ; # [ doc = "`write(|w| ..)` method takes [icr::W](icr::W) writer structure" ]
impl crate :: Writable for ICR { } # [ doc = "Interrupt clear register" ]
pub mod icr { # [ doc = "Writer for register ICR" ]
pub type W = crate :: W < u32 , super :: ICR > ; # [ doc = "Register ICR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ICR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alert flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALERTCF_AW { # [ doc = "1: Clears the ALERT flag in ISR register" ]
CLEAR = 1 } impl From < ALERTCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : ALERTCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `ALERTCF`" ]
pub struct ALERTCF_W < 'a > { w : & 'a mut W , } impl < 'a > ALERTCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALERTCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the ALERT flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( ALERTCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Timeout detection flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIMOUTCF_AW { # [ doc = "1: Clears the TIMOUT flag in ISR register" ]
CLEAR = 1 } impl From < TIMOUTCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TIMOUTCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TIMOUTCF`" ]
pub struct TIMOUTCF_W < 'a > { w : & 'a mut W , } impl < 'a > TIMOUTCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIMOUTCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the TIMOUT flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TIMOUTCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "PEC Error flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PECCF_AW { # [ doc = "1: Clears the PEC flag in ISR register" ]
CLEAR = 1 } impl From < PECCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : PECCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `PECCF`" ]
pub struct PECCF_W < 'a > { w : & 'a mut W , } impl < 'a > PECCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PECCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the PEC flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( PECCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Overrun/Underrun flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVRCF_AW { # [ doc = "1: Clears the OVR flag in ISR register" ]
CLEAR = 1 } impl From < OVRCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : OVRCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `OVRCF`" ]
pub struct OVRCF_W < 'a > { w : & 'a mut W , } impl < 'a > OVRCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OVRCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the OVR flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( OVRCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Arbitration lost flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARLOCF_AW { # [ doc = "1: Clears the ARLO flag in ISR register" ]
CLEAR = 1 } impl From < ARLOCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : ARLOCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `ARLOCF`" ]
pub struct ARLOCF_W < 'a > { w : & 'a mut W , } impl < 'a > ARLOCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARLOCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the ARLO flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( ARLOCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Bus error flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BERRCF_AW { # [ doc = "1: Clears the BERR flag in ISR register" ]
CLEAR = 1 } impl From < BERRCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BERRCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BERRCF`" ]
pub struct BERRCF_W < 'a > { w : & 'a mut W , } impl < 'a > BERRCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BERRCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the BERR flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( BERRCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Stop detection flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum STOPCF_AW { # [ doc = "1: Clears the STOP flag in ISR register" ]
CLEAR = 1 } impl From < STOPCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : STOPCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `STOPCF`" ]
pub struct STOPCF_W < 'a > { w : & 'a mut W , } impl < 'a > STOPCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : STOPCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the STOP flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( STOPCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Not Acknowledge flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum NACKCF_AW { # [ doc = "1: Clears the NACK flag in ISR register" ]
CLEAR = 1 } impl From < NACKCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : NACKCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `NACKCF`" ]
pub struct NACKCF_W < 'a > { w : & 'a mut W , } impl < 'a > NACKCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : NACKCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the NACK flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( NACKCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Address Matched flag clear\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADDRCF_AW { # [ doc = "1: Clears the ADDR flag in ISR register" ]
CLEAR = 1 } impl From < ADDRCF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : ADDRCF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `ADDRCF`" ]
pub struct ADDRCF_W < 'a > { w : & 'a mut W , } impl < 'a > ADDRCF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADDRCF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clears the ADDR flag in ISR register" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( ADDRCF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } impl W { # [ doc = "Bit 13 - Alert flag clear" ]
# [ inline ( always ) ]
pub fn alertcf ( & mut self ) -> ALERTCF_W { ALERTCF_W { w : self } } # [ doc = "Bit 12 - Timeout detection flag clear" ]
# [ inline ( always ) ]
pub fn timoutcf ( & mut self ) -> TIMOUTCF_W { TIMOUTCF_W { w : self } } # [ doc = "Bit 11 - PEC Error flag clear" ]
# [ inline ( always ) ]
pub fn peccf ( & mut self ) -> PECCF_W { PECCF_W { w : self } } # [ doc = "Bit 10 - Overrun/Underrun flag clear" ]
# [ inline ( always ) ]
pub fn ovrcf ( & mut self ) -> OVRCF_W { OVRCF_W { w : self } } # [ doc = "Bit 9 - Arbitration lost flag clear" ]
# [ inline ( always ) ]
pub fn arlocf ( & mut self ) -> ARLOCF_W { ARLOCF_W { w : self } } # [ doc = "Bit 8 - Bus error flag clear" ]
# [ inline ( always ) ]
pub fn berrcf ( & mut self ) -> BERRCF_W { BERRCF_W { w : self } } # [ doc = "Bit 5 - Stop detection flag clear" ]
# [ inline ( always ) ]
pub fn stopcf ( & mut self ) -> STOPCF_W { STOPCF_W { w : self } } # [ doc = "Bit 4 - Not Acknowledge flag clear" ]
# [ inline ( always ) ]
pub fn nackcf ( & mut self ) -> NACKCF_W { NACKCF_W { w : self } } # [ doc = "Bit 3 - Address Matched flag clear" ]
# [ inline ( always ) ]
pub fn addrcf ( & mut self ) -> ADDRCF_W { ADDRCF_W { w : self } } } } # [ doc = "PEC register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pecr](pecr) module" ]
pub type PECR = crate :: Reg < u32 , _PECR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PECR ; # [ doc = "`read()` method returns [pecr::R](pecr::R) reader structure" ]
impl crate :: Readable for PECR { } # [ doc = "PEC register" ]
pub mod pecr { # [ doc = "Reader of register PECR" ]
pub type R = crate :: R < u32 , super :: PECR > ; # [ doc = "Reader of field `PEC`" ]
pub type PEC_R = crate :: R < u8 , u8 > ; impl R { # [ doc = "Bits 0:7 - Packet error checking register" ]
# [ inline ( always ) ]
pub fn pec ( & self ) -> PEC_R { PEC_R :: new ( ( self . bits & 0xff ) as u8 ) } } } # [ doc = "Receive data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdr](rxdr) module" ]
pub type RXDR = crate :: Reg < u32 , _RXDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RXDR ; # [ doc = "`read()` method returns [rxdr::R](rxdr::R) reader structure" ]
impl crate :: Readable for RXDR { } # [ doc = "Receive data register" ]
pub mod rxdr { # [ doc = "Reader of register RXDR" ]
pub type R = crate :: R < u32 , super :: RXDR > ; # [ doc = "Reader of field `RXDATA`" ]
pub type RXDATA_R = crate :: R < u8 , u8 > ; impl R { # [ doc = "Bits 0:7 - 8-bit receive data" ]
# [ inline ( always ) ]
pub fn rxdata ( & self ) -> RXDATA_R { RXDATA_R :: new ( ( self . bits & 0xff ) as u8 ) } } } # [ doc = "Transmit data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdr](txdr) module" ]
pub type TXDR = crate :: Reg < u32 , _TXDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TXDR ; # [ doc = "`read()` method returns [txdr::R](txdr::R) reader structure" ]
impl crate :: Readable for TXDR { } # [ doc = "`write(|w| ..)` method takes [txdr::W](txdr::W) writer structure" ]
impl crate :: Writable for TXDR { } # [ doc = "Transmit data register" ]
pub mod txdr { # [ doc = "Reader of register TXDR" ]
pub type R = crate :: R < u32 , super :: TXDR > ; # [ doc = "Writer for register TXDR" ]
pub type W = crate :: W < u32 , super :: TXDR > ; # [ doc = "Register TXDR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TXDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TXDATA`" ]
pub type TXDATA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TXDATA`" ]
pub struct TXDATA_W < 'a > { w : & 'a mut W , } impl < 'a > TXDATA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - 8-bit transmit data" ]
# [ inline ( always ) ]
pub fn txdata ( & self ) -> TXDATA_R { TXDATA_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - 8-bit transmit data" ]
# [ inline ( always ) ]
pub fn txdata ( & mut self ) -> TXDATA_W { TXDATA_W { w : self } } } } } # [ doc = "Inter-integrated circuit" ]
pub struct I2C2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for I2C2 { } impl I2C2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const i2c1 :: RegisterBlock { 0x4000_5800 as * const _ } } impl Deref for I2C2 { type Target = i2c1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * I2C2 :: ptr ( ) } } } # [ doc = "Inter-integrated circuit" ]
pub struct I2C3 { _marker : PhantomData < * const ( ) > } unsafe impl Send for I2C3 { } impl I2C3 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const i2c1 :: RegisterBlock { 0x4000_7800 as * const _ } } impl Deref for I2C3 { type Target = i2c1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * I2C3 :: ptr ( ) } } } # [ doc = "Independent watchdog" ]
pub struct IWDG { _marker : PhantomData < * const ( ) > } unsafe impl Send for IWDG { } impl IWDG { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const iwdg :: RegisterBlock { 0x4000_3000 as * const _ } } impl Deref for IWDG { type Target = iwdg :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * IWDG :: ptr ( ) } } } # [ doc = "Independent watchdog" ]
pub mod iwdg { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Key register" ]
pub kr : KR , # [ doc = "0x04 - Prescaler register" ]
pub pr : PR , # [ doc = "0x08 - Reload register" ]
pub rlr : RLR , # [ doc = "0x0c - Status register" ]
pub sr : SR , # [ doc = "0x10 - Window register" ]
pub winr : WINR , } # [ doc = "Key register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [kr](kr) module" ]
pub type KR = crate :: Reg < u32 , _KR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _KR ; # [ doc = "`write(|w| ..)` method takes [kr::W](kr::W) writer structure" ]
impl crate :: Writable for KR { } # [ doc = "Key register" ]
pub mod kr { # [ doc = "Writer for register KR" ]
pub type W = crate :: W < u32 , super :: KR > ; # [ doc = "Register KR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: KR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Key value\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u16 ) ]
pub enum KEY_AW { # [ doc = "21845: Enable access to PR, RLR and WINR registers (0x5555)" ]
ENABLE = 21845 , # [ doc = "43690: Reset the watchdog value (0xAAAA)" ]
RESET = 43690 , # [ doc = "52428: Start the watchdog (0xCCCC)" ]
START = 52428 } impl From < KEY_AW > for u16 { # [ inline ( always ) ]
fn from ( variant : KEY_AW ) -> Self { variant as _ } } # [ doc = "Write proxy for field `KEY`" ]
pub struct KEY_W < 'a > { w : & 'a mut W , } impl < 'a > KEY_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : KEY_AW ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Enable access to PR, RLR and WINR registers (0x5555)" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( KEY_AW :: ENABLE ) } # [ doc = "Reset the watchdog value (0xAAAA)" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( KEY_AW :: RESET ) } # [ doc = "Start the watchdog (0xCCCC)" ]
# [ inline ( always ) ]
pub fn start ( self ) -> & 'a mut W { self . variant ( KEY_AW :: START ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl W { # [ doc = "Bits 0:15 - Key value" ]
# [ inline ( always ) ]
pub fn key ( & mut self ) -> KEY_W { KEY_W { w : self } } } } # [ doc = "Prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pr](pr) module" ]
pub type PR = crate :: Reg < u32 , _PR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PR ; # [ doc = "`read()` method returns [pr::R](pr::R) reader structure" ]
impl crate :: Readable for PR { } # [ doc = "`write(|w| ..)` method takes [pr::W](pr::W) writer structure" ]
impl crate :: Writable for PR { } # [ doc = "Prescaler register" ]
pub mod pr { # [ doc = "Reader of register PR" ]
pub type R = crate :: R < u32 , super :: PR > ; # [ doc = "Writer for register PR" ]
pub type W = crate :: W < u32 , super :: PR > ; # [ doc = "Register PR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Prescaler divider\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PR_A { # [ doc = "0: Divider /4" ]
DIVIDEBY4 = 0 , # [ doc = "1: Divider /8" ]
DIVIDEBY8 = 1 , # [ doc = "2: Divider /16" ]
DIVIDEBY16 = 2 , # [ doc = "3: Divider /32" ]
DIVIDEBY32 = 3 , # [ doc = "4: Divider /64" ]
DIVIDEBY64 = 4 , # [ doc = "5: Divider /128" ]
DIVIDEBY128 = 5 , # [ doc = "6: Divider /256" ]
DIVIDEBY256 = 6 , # [ doc = "7: Divider /256" ]
DIVIDEBY256BIS = 7 } impl From < PR_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PR_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PR`" ]
pub type PR_R = crate :: R < u8 , PR_A > ; impl PR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PR_A { match self . bits { 0 => PR_A :: DIVIDEBY4 , 1 => PR_A :: DIVIDEBY8 , 2 => PR_A :: DIVIDEBY16 , 3 => PR_A :: DIVIDEBY32 , 4 => PR_A :: DIVIDEBY64 , 5 => PR_A :: DIVIDEBY128 , 6 => PR_A :: DIVIDEBY256 , 7 => PR_A :: DIVIDEBY256BIS , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIVIDEBY4`" ]
# [ inline ( always ) ]
pub fn is_divide_by4 ( & self ) -> bool { * self == PR_A :: DIVIDEBY4 } # [ doc = "Checks if the value of the field is `DIVIDEBY8`" ]
# [ inline ( always ) ]
pub fn is_divide_by8 ( & self ) -> bool { * self == PR_A :: DIVIDEBY8 } # [ doc = "Checks if the value of the field is `DIVIDEBY16`" ]
# [ inline ( always ) ]
pub fn is_divide_by16 ( & self ) -> bool { * self == PR_A :: DIVIDEBY16 } # [ doc = "Checks if the value of the field is `DIVIDEBY32`" ]
# [ inline ( always ) ]
pub fn is_divide_by32 ( & self ) -> bool { * self == PR_A :: DIVIDEBY32 } # [ doc = "Checks if the value of the field is `DIVIDEBY64`" ]
# [ inline ( always ) ]
pub fn is_divide_by64 ( & self ) -> bool { * self == PR_A :: DIVIDEBY64 } # [ doc = "Checks if the value of the field is `DIVIDEBY128`" ]
# [ inline ( always ) ]
pub fn is_divide_by128 ( & self ) -> bool { * self == PR_A :: DIVIDEBY128 } # [ doc = "Checks if the value of the field is `DIVIDEBY256`" ]
# [ inline ( always ) ]
pub fn is_divide_by256 ( & self ) -> bool { * self == PR_A :: DIVIDEBY256 } # [ doc = "Checks if the value of the field is `DIVIDEBY256BIS`" ]
# [ inline ( always ) ]
pub fn is_divide_by256bis ( & self ) -> bool { * self == PR_A :: DIVIDEBY256BIS } } # [ doc = "Write proxy for field `PR`" ]
pub struct PR_W < 'a > { w : & 'a mut W , } impl < 'a > PR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PR_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Divider /4" ]
# [ inline ( always ) ]
pub fn divide_by4 ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY4 ) } # [ doc = "Divider /8" ]
# [ inline ( always ) ]
pub fn divide_by8 ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY8 ) } # [ doc = "Divider /16" ]
# [ inline ( always ) ]
pub fn divide_by16 ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY16 ) } # [ doc = "Divider /32" ]
# [ inline ( always ) ]
pub fn divide_by32 ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY32 ) } # [ doc = "Divider /64" ]
# [ inline ( always ) ]
pub fn divide_by64 ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY64 ) } # [ doc = "Divider /128" ]
# [ inline ( always ) ]
pub fn divide_by128 ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY128 ) } # [ doc = "Divider /256" ]
# [ inline ( always ) ]
pub fn divide_by256 ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY256 ) } # [ doc = "Divider /256" ]
# [ inline ( always ) ]
pub fn divide_by256bis ( self ) -> & 'a mut W { self . variant ( PR_A :: DIVIDEBY256BIS ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } impl R { # [ doc = "Bits 0:2 - Prescaler divider" ]
# [ inline ( always ) ]
pub fn pr ( & self ) -> PR_R { PR_R :: new ( ( self . bits & 0x07 ) as u8 ) } } impl W { # [ doc = "Bits 0:2 - Prescaler divider" ]
# [ inline ( always ) ]
pub fn pr ( & mut self ) -> PR_W { PR_W { w : self } } } } # [ doc = "Reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rlr](rlr) module" ]
pub type RLR = crate :: Reg < u32 , _RLR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RLR ; # [ doc = "`read()` method returns [rlr::R](rlr::R) reader structure" ]
impl crate :: Readable for RLR { } # [ doc = "`write(|w| ..)` method takes [rlr::W](rlr::W) writer structure" ]
impl crate :: Writable for RLR { } # [ doc = "Reload register" ]
pub mod rlr { # [ doc = "Reader of register RLR" ]
pub type R = crate :: R < u32 , super :: RLR > ; # [ doc = "Writer for register RLR" ]
pub type W = crate :: W < u32 , super :: RLR > ; # [ doc = "Register RLR `reset()`'s with value 0x0fff" ]
impl crate :: ResetValue for super :: RLR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff } } # [ doc = "Reader of field `RL`" ]
pub type RL_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `RL`" ]
pub struct RL_W < 'a > { w : & 'a mut W , } impl < 'a > RL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 0:11 - Watchdog counter reload value" ]
# [ inline ( always ) ]
pub fn rl ( & self ) -> RL_R { RL_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 0:11 - Watchdog counter reload value" ]
# [ inline ( always ) ]
pub fn rl ( & mut self ) -> RL_W { RL_W { w : self } } } } # [ doc = "Status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "Status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Reader of field `PVU`" ]
pub type PVU_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `RVU`" ]
pub type RVU_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `WVU`" ]
pub type WVU_R = crate :: R < bool , bool > ; impl R { # [ doc = "Bit 0 - Watchdog prescaler value update" ]
# [ inline ( always ) ]
pub fn pvu ( & self ) -> PVU_R { PVU_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Watchdog counter reload value update" ]
# [ inline ( always ) ]
pub fn rvu ( & self ) -> RVU_R { RVU_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Watchdog counter window value update" ]
# [ inline ( always ) ]
pub fn wvu ( & self ) -> WVU_R { WVU_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } } } # [ doc = "Window register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [winr](winr) module" ]
pub type WINR = crate :: Reg < u32 , _WINR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _WINR ; # [ doc = "`read()` method returns [winr::R](winr::R) reader structure" ]
impl crate :: Readable for WINR { } # [ doc = "`write(|w| ..)` method takes [winr::W](winr::W) writer structure" ]
impl crate :: Writable for WINR { } # [ doc = "Window register" ]
pub mod winr { # [ doc = "Reader of register WINR" ]
pub type R = crate :: R < u32 , super :: WINR > ; # [ doc = "Writer for register WINR" ]
pub type W = crate :: W < u32 , super :: WINR > ; # [ doc = "Register WINR `reset()`'s with value 0x0fff" ]
impl crate :: ResetValue for super :: WINR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff } } # [ doc = "Reader of field `WIN`" ]
pub type WIN_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `WIN`" ]
pub struct WIN_W < 'a > { w : & 'a mut W , } impl < 'a > WIN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 0:11 - Watchdog counter window value" ]
# [ inline ( always ) ]
pub fn win ( & self ) -> WIN_R { WIN_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 0:11 - Watchdog counter window value" ]
# [ inline ( always ) ]
pub fn win ( & mut self ) -> WIN_W { WIN_W { w : self } } } } } # [ doc = "Window watchdog" ]
pub struct WWDG { _marker : PhantomData < * const ( ) > } unsafe impl Send for WWDG { } impl WWDG { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const wwdg :: RegisterBlock { 0x4000_2c00 as * const _ } } impl Deref for WWDG { type Target = wwdg :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * WWDG :: ptr ( ) } } } # [ doc = "Window watchdog" ]
pub mod wwdg { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Control register" ]
pub cr : CR , # [ doc = "0x04 - Configuration register" ]
pub cfr : CFR , # [ doc = "0x08 - Status register" ]
pub sr : SR , } # [ doc = "Control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "Control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0x7f" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x7f } } # [ doc = "Activation bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WDGA_A { # [ doc = "0: Watchdog disabled" ]
DISABLED = 0 , # [ doc = "1: Watchdog enabled" ]
ENABLED = 1 } impl From < WDGA_A > for bool { # [ inline ( always ) ]
fn from ( variant : WDGA_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WDGA`" ]
pub type WDGA_R = crate :: R < bool , WDGA_A > ; impl WDGA_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WDGA_A { match self . bits { false => WDGA_A :: DISABLED , true => WDGA_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == WDGA_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == WDGA_A :: ENABLED } } # [ doc = "Write proxy for field `WDGA`" ]
pub struct WDGA_W < 'a > { w : & 'a mut W , } impl < 'a > WDGA_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WDGA_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Watchdog disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( WDGA_A :: DISABLED ) } # [ doc = "Watchdog enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( WDGA_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `T`" ]
pub type T_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `T`" ]
pub struct T_W < 'a > { w : & 'a mut W , } impl < 'a > T_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x7f ) | ( ( value as u32 ) & 0x7f ) ; self . w } } impl R { # [ doc = "Bit 7 - Activation bit" ]
# [ inline ( always ) ]
pub fn wdga ( & self ) -> WDGA_R { WDGA_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:6 - 7-bit counter" ]
# [ inline ( always ) ]
pub fn t ( & self ) -> T_R { T_R :: new ( ( self . bits & 0x7f ) as u8 ) } } impl W { # [ doc = "Bit 7 - Activation bit" ]
# [ inline ( always ) ]
pub fn wdga ( & mut self ) -> WDGA_W { WDGA_W { w : self } } # [ doc = "Bits 0:6 - 7-bit counter" ]
# [ inline ( always ) ]
pub fn t ( & mut self ) -> T_W { T_W { w : self } } } } # [ doc = "Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfr](cfr) module" ]
pub type CFR = crate :: Reg < u32 , _CFR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFR ; # [ doc = "`read()` method returns [cfr::R](cfr::R) reader structure" ]
impl crate :: Readable for CFR { } # [ doc = "`write(|w| ..)` method takes [cfr::W](cfr::W) writer structure" ]
impl crate :: Writable for CFR { } # [ doc = "Configuration register" ]
pub mod cfr { # [ doc = "Reader of register CFR" ]
pub type R = crate :: R < u32 , super :: CFR > ; # [ doc = "Writer for register CFR" ]
pub type W = crate :: W < u32 , super :: CFR > ; # [ doc = "Register CFR `reset()`'s with value 0x7f" ]
impl crate :: ResetValue for super :: CFR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x7f } } # [ doc = "Early wakeup interrupt\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EWI_A { # [ doc = "1: interrupt occurs whenever the counter reaches the value 0x40" ]
ENABLE = 1 } impl From < EWI_A > for bool { # [ inline ( always ) ]
fn from ( variant : EWI_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EWI`" ]
pub type EWI_R = crate :: R < bool , EWI_A > ; impl EWI_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , EWI_A > { use crate :: Variant :: * ; match self . bits { true => Val ( EWI_A :: ENABLE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ENABLE`" ]
# [ inline ( always ) ]
pub fn is_enable ( & self ) -> bool { * self == EWI_A :: ENABLE } } # [ doc = "Write proxy for field `EWI`" ]
pub struct EWI_W < 'a > { w : & 'a mut W , } impl < 'a > EWI_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EWI_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "interrupt occurs whenever the counter reaches the value 0x40" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( EWI_A :: ENABLE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `W`" ]
pub type W_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `W`" ]
pub struct W_W < 'a > { w : & 'a mut W , } impl < 'a > W_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x7f ) | ( ( value as u32 ) & 0x7f ) ; self . w } } # [ doc = "Timer base\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum WDGTB_A { # [ doc = "0: Counter clock (PCLK1 div 4096) div 1" ]
DIV1 = 0 , # [ doc = "1: Counter clock (PCLK1 div 4096) div 2" ]
DIV2 = 1 , # [ doc = "2: Counter clock (PCLK1 div 4096) div 4" ]
DIV4 = 2 , # [ doc = "3: Counter clock (PCLK1 div 4096) div 8" ]
DIV8 = 3 } impl From < WDGTB_A > for u8 { # [ inline ( always ) ]
fn from ( variant : WDGTB_A ) -> Self { variant as _ } } # [ doc = "Reader of field `WDGTB`" ]
pub type WDGTB_R = crate :: R < u8 , WDGTB_A > ; impl WDGTB_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WDGTB_A { match self . bits { 0 => WDGTB_A :: DIV1 , 1 => WDGTB_A :: DIV2 , 2 => WDGTB_A :: DIV4 , 3 => WDGTB_A :: DIV8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == WDGTB_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == WDGTB_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == WDGTB_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == WDGTB_A :: DIV8 } } # [ doc = "Write proxy for field `WDGTB`" ]
pub struct WDGTB_W < 'a > { w : & 'a mut W , } impl < 'a > WDGTB_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WDGTB_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Counter clock (PCLK1 div 4096) div 1" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( WDGTB_A :: DIV1 ) } # [ doc = "Counter clock (PCLK1 div 4096) div 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( WDGTB_A :: DIV2 ) } # [ doc = "Counter clock (PCLK1 div 4096) div 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( WDGTB_A :: DIV4 ) } # [ doc = "Counter clock (PCLK1 div 4096) div 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( WDGTB_A :: DIV8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 7 ) ) | ( ( ( value as u32 ) & 0x03 ) << 7 ) ; self . w } } impl R { # [ doc = "Bit 9 - Early wakeup interrupt" ]
# [ inline ( always ) ]
pub fn ewi ( & self ) -> EWI_R { EWI_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:6 - 7-bit window value" ]
# [ inline ( always ) ]
pub fn w ( & self ) -> W_R { W_R :: new ( ( self . bits & 0x7f ) as u8 ) } # [ doc = "Bits 7:8 - Timer base" ]
# [ inline ( always ) ]
pub fn wdgtb ( & self ) -> WDGTB_R { WDGTB_R :: new ( ( ( self . bits >> 7 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 9 - Early wakeup interrupt" ]
# [ inline ( always ) ]
pub fn ewi ( & mut self ) -> EWI_W { EWI_W { w : self } } # [ doc = "Bits 0:6 - 7-bit window value" ]
# [ inline ( always ) ]
pub fn w ( & mut self ) -> W_W { W_W { w : self } } # [ doc = "Bits 7:8 - Timer base" ]
# [ inline ( always ) ]
pub fn wdgtb ( & mut self ) -> WDGTB_W { WDGTB_W { w : self } } } } # [ doc = "Status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "Status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Early wakeup interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EWIF_A { # [ doc = "1: The EWI Interrupt Service Routine has been triggered" ]
PENDING = 1 , # [ doc = "0: The EWI Interrupt Service Routine has been serviced" ]
FINISHED = 0 } impl From < EWIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : EWIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EWIF`" ]
pub type EWIF_R = crate :: R < bool , EWIF_A > ; impl EWIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EWIF_A { match self . bits { true => EWIF_A :: PENDING , false => EWIF_A :: FINISHED } } # [ doc = "Checks if the value of the field is `PENDING`" ]
# [ inline ( always ) ]
pub fn is_pending ( & self ) -> bool { * self == EWIF_A :: PENDING } # [ doc = "Checks if the value of the field is `FINISHED`" ]
# [ inline ( always ) ]
pub fn is_finished ( & self ) -> bool { * self == EWIF_A :: FINISHED } } # [ doc = "Early wakeup interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EWIF_AW { # [ doc = "0: The EWI Interrupt Service Routine has been serviced" ]
FINISHED = 0 } impl From < EWIF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : EWIF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `EWIF`" ]
pub struct EWIF_W < 'a > { w : & 'a mut W , } impl < 'a > EWIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EWIF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The EWI Interrupt Service Routine has been serviced" ]
# [ inline ( always ) ]
pub fn finished ( self ) -> & 'a mut W { self . variant ( EWIF_AW :: FINISHED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 0 - Early wakeup interrupt flag" ]
# [ inline ( always ) ]
pub fn ewif ( & self ) -> EWIF_R { EWIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Early wakeup interrupt flag" ]
# [ inline ( always ) ]
pub fn ewif ( & mut self ) -> EWIF_W { EWIF_W { w : self } } } } } # [ doc = "Real-time clock" ]
pub struct RTC { _marker : PhantomData < * const ( ) > } unsafe impl Send for RTC { } impl RTC { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const rtc :: RegisterBlock { 0x4000_2800 as * const _ } } impl Deref for RTC { type Target = rtc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * RTC :: ptr ( ) } } } # [ doc = "Real-time clock" ]
pub mod rtc { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - time register" ]
pub tr : TR , # [ doc = "0x04 - date register" ]
pub dr : DR , # [ doc = "0x08 - control register" ]
pub cr : CR , # [ doc = "0x0c - initialization and status register" ]
pub isr : ISR , # [ doc = "0x10 - prescaler register" ]
pub prer : PRER , # [ doc = "0x14 - wakeup timer register" ]
pub wutr : WUTR , _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x1c - alarm A register" ]
pub alrmar : ALRMAR , # [ doc = "0x20 - alarm B register" ]
pub alrmbr : ALRMBR , # [ doc = "0x24 - write protection register" ]
pub wpr : WPR , # [ doc = "0x28 - sub second register" ]
pub ssr : SSR , # [ doc = "0x2c - shift control register" ]
pub shiftr : SHIFTR , # [ doc = "0x30 - time stamp time register" ]
pub tstr : TSTR , # [ doc = "0x34 - time stamp date register" ]
pub tsdr : TSDR , # [ doc = "0x38 - timestamp sub second register" ]
pub tsssr : TSSSR , # [ doc = "0x3c - calibration register" ]
pub calr : CALR , # [ doc = "0x40 - tamper and alternate function configuration register" ]
pub tafcr : TAFCR , # [ doc = "0x44 - alarm A sub second register" ]
pub alrmassr : ALRMASSR , # [ doc = "0x48 - alarm B sub second register" ]
pub alrmbssr : ALRMBSSR , _reserved18 : [ u8 ; 4usize ]
, # [ doc = "0x50 - backup register" ]
pub bkpr : [ BKPR ; 32 ]
, } # [ doc = "time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tr](tr) module" ]
pub type TR = crate :: Reg < u32 , _TR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TR ; # [ doc = "`read()` method returns [tr::R](tr::R) reader structure" ]
impl crate :: Readable for TR { } # [ doc = "`write(|w| ..)` method takes [tr::W](tr::W) writer structure" ]
impl crate :: Writable for TR { } # [ doc = "time register" ]
pub mod tr { # [ doc = "Reader of register TR" ]
pub type R = crate :: R < u32 , super :: TR > ; # [ doc = "Writer for register TR" ]
pub type W = crate :: W < u32 , super :: TR > ; # [ doc = "Register TR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "AM/PM notation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PM_A { # [ doc = "0: AM or 24-hour format" ]
AM = 0 , # [ doc = "1: PM" ]
PM = 1 } impl From < PM_A > for bool { # [ inline ( always ) ]
fn from ( variant : PM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PM`" ]
pub type PM_R = crate :: R < bool , PM_A > ; impl PM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PM_A { match self . bits { false => PM_A :: AM , true => PM_A :: PM } } # [ doc = "Checks if the value of the field is `AM`" ]
# [ inline ( always ) ]
pub fn is_am ( & self ) -> bool { * self == PM_A :: AM } # [ doc = "Checks if the value of the field is `PM`" ]
# [ inline ( always ) ]
pub fn is_pm ( & self ) -> bool { * self == PM_A :: PM } } # [ doc = "Write proxy for field `PM`" ]
pub struct PM_W < 'a > { w : & 'a mut W , } impl < 'a > PM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "AM or 24-hour format" ]
# [ inline ( always ) ]
pub fn am ( self ) -> & 'a mut W { self . variant ( PM_A :: AM ) } # [ doc = "PM" ]
# [ inline ( always ) ]
pub fn pm ( self ) -> & 'a mut W { self . variant ( PM_A :: PM ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `HT`" ]
pub type HT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HT`" ]
pub struct HT_W < 'a > { w : & 'a mut W , } impl < 'a > HT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Reader of field `HU`" ]
pub type HU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HU`" ]
pub struct HU_W < 'a > { w : & 'a mut W , } impl < 'a > HU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `MNT`" ]
pub type MNT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MNT`" ]
pub struct MNT_W < 'a > { w : & 'a mut W , } impl < 'a > MNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Reader of field `MNU`" ]
pub type MNU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MNU`" ]
pub struct MNU_W < 'a > { w : & 'a mut W , } impl < 'a > MNU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Reader of field `ST`" ]
pub type ST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ST`" ]
pub struct ST_W < 'a > { w : & 'a mut W , } impl < 'a > ST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `SU`" ]
pub type SU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SU`" ]
pub struct SU_W < 'a > { w : & 'a mut W , } impl < 'a > SU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bit 22 - AM/PM notation" ]
# [ inline ( always ) ]
pub fn pm ( & self ) -> PM_R { PM_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bits 20:21 - Hour tens in BCD format" ]
# [ inline ( always ) ]
pub fn ht ( & self ) -> HT_R { HT_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:19 - Hour units in BCD format" ]
# [ inline ( always ) ]
pub fn hu ( & self ) -> HU_R { HU_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:14 - Minute tens in BCD format" ]
# [ inline ( always ) ]
pub fn mnt ( & self ) -> MNT_R { MNT_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bits 8:11 - Minute units in BCD format" ]
# [ inline ( always ) ]
pub fn mnu ( & self ) -> MNU_R { MNU_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:6 - Second tens in BCD format" ]
# [ inline ( always ) ]
pub fn st ( & self ) -> ST_R { ST_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:3 - Second units in BCD format" ]
# [ inline ( always ) ]
pub fn su ( & self ) -> SU_R { SU_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bit 22 - AM/PM notation" ]
# [ inline ( always ) ]
pub fn pm ( & mut self ) -> PM_W { PM_W { w : self } } # [ doc = "Bits 20:21 - Hour tens in BCD format" ]
# [ inline ( always ) ]
pub fn ht ( & mut self ) -> HT_W { HT_W { w : self } } # [ doc = "Bits 16:19 - Hour units in BCD format" ]
# [ inline ( always ) ]
pub fn hu ( & mut self ) -> HU_W { HU_W { w : self } } # [ doc = "Bits 12:14 - Minute tens in BCD format" ]
# [ inline ( always ) ]
pub fn mnt ( & mut self ) -> MNT_W { MNT_W { w : self } } # [ doc = "Bits 8:11 - Minute units in BCD format" ]
# [ inline ( always ) ]
pub fn mnu ( & mut self ) -> MNU_W { MNU_W { w : self } } # [ doc = "Bits 4:6 - Second tens in BCD format" ]
# [ inline ( always ) ]
pub fn st ( & mut self ) -> ST_W { ST_W { w : self } } # [ doc = "Bits 0:3 - Second units in BCD format" ]
# [ inline ( always ) ]
pub fn su ( & mut self ) -> SU_W { SU_W { w : self } } } } # [ doc = "date register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr](dr) module" ]
pub type DR = crate :: Reg < u32 , _DR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DR ; # [ doc = "`read()` method returns [dr::R](dr::R) reader structure" ]
impl crate :: Readable for DR { } # [ doc = "`write(|w| ..)` method takes [dr::W](dr::W) writer structure" ]
impl crate :: Writable for DR { } # [ doc = "date register" ]
pub mod dr { # [ doc = "Reader of register DR" ]
pub type R = crate :: R < u32 , super :: DR > ; # [ doc = "Writer for register DR" ]
pub type W = crate :: W < u32 , super :: DR > ; # [ doc = "Register DR `reset()`'s with value 0x2101" ]
impl crate :: ResetValue for super :: DR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x2101 } } # [ doc = "Reader of field `YT`" ]
pub type YT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `YT`" ]
pub struct YT_W < 'a > { w : & 'a mut W , } impl < 'a > YT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `YU`" ]
pub type YU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `YU`" ]
pub struct YU_W < 'a > { w : & 'a mut W , } impl < 'a > YU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `WDU`" ]
pub type WDU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `WDU`" ]
pub struct WDU_W < 'a > { w : & 'a mut W , } impl < 'a > WDU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 13 ) ) | ( ( ( value as u32 ) & 0x07 ) << 13 ) ; self . w } } # [ doc = "Reader of field `MT`" ]
pub type MT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MT`" ]
pub struct MT_W < 'a > { w : & 'a mut W , } impl < 'a > MT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `MU`" ]
pub type MU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MU`" ]
pub struct MU_W < 'a > { w : & 'a mut W , } impl < 'a > MU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Reader of field `DT`" ]
pub type DT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DT`" ]
pub struct DT_W < 'a > { w : & 'a mut W , } impl < 'a > DT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DU`" ]
pub type DU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DU`" ]
pub struct DU_W < 'a > { w : & 'a mut W , } impl < 'a > DU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 20:23 - Year tens in BCD format" ]
# [ inline ( always ) ]
pub fn yt ( & self ) -> YT_R { YT_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Year units in BCD format" ]
# [ inline ( always ) ]
pub fn yu ( & self ) -> YU_R { YU_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 13:15 - Week day units" ]
# [ inline ( always ) ]
pub fn wdu ( & self ) -> WDU_R { WDU_R :: new ( ( ( self . bits >> 13 ) & 0x07 ) as u8 ) } # [ doc = "Bit 12 - Month tens in BCD format" ]
# [ inline ( always ) ]
pub fn mt ( & self ) -> MT_R { MT_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:11 - Month units in BCD format" ]
# [ inline ( always ) ]
pub fn mu ( & self ) -> MU_R { MU_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Date tens in BCD format" ]
# [ inline ( always ) ]
pub fn dt ( & self ) -> DT_R { DT_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:3 - Date units in BCD format" ]
# [ inline ( always ) ]
pub fn du ( & self ) -> DU_R { DU_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 20:23 - Year tens in BCD format" ]
# [ inline ( always ) ]
pub fn yt ( & mut self ) -> YT_W { YT_W { w : self } } # [ doc = "Bits 16:19 - Year units in BCD format" ]
# [ inline ( always ) ]
pub fn yu ( & mut self ) -> YU_W { YU_W { w : self } } # [ doc = "Bits 13:15 - Week day units" ]
# [ inline ( always ) ]
pub fn wdu ( & mut self ) -> WDU_W { WDU_W { w : self } } # [ doc = "Bit 12 - Month tens in BCD format" ]
# [ inline ( always ) ]
pub fn mt ( & mut self ) -> MT_W { MT_W { w : self } } # [ doc = "Bits 8:11 - Month units in BCD format" ]
# [ inline ( always ) ]
pub fn mu ( & mut self ) -> MU_W { MU_W { w : self } } # [ doc = "Bits 4:5 - Date tens in BCD format" ]
# [ inline ( always ) ]
pub fn dt ( & mut self ) -> DT_W { DT_W { w : self } } # [ doc = "Bits 0:3 - Date units in BCD format" ]
# [ inline ( always ) ]
pub fn du ( & mut self ) -> DU_W { DU_W { w : self } } } } # [ doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Wakeup clock selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum WUCKSEL_A { # [ doc = "0: RTC/16 clock is selected" ]
DIV16 = 0 , # [ doc = "1: RTC/8 clock is selected" ]
DIV8 = 1 , # [ doc = "2: RTC/4 clock is selected" ]
DIV4 = 2 , # [ doc = "3: RTC/2 clock is selected" ]
DIV2 = 3 , # [ doc = "4: ck_spre (usually 1 Hz) clock is selected" ]
CLOCKSPARE = 4 , # [ doc = "6: ck_spre (usually 1 Hz) clock is selected and 2^16 is added to the WUT counter value" ]
CLOCKSPAREWITHOFFSET = 6 } impl From < WUCKSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : WUCKSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `WUCKSEL`" ]
pub type WUCKSEL_R = crate :: R < u8 , WUCKSEL_A > ; impl WUCKSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , WUCKSEL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( WUCKSEL_A :: DIV16 ) , 1 => Val ( WUCKSEL_A :: DIV8 ) , 2 => Val ( WUCKSEL_A :: DIV4 ) , 3 => Val ( WUCKSEL_A :: DIV2 ) , 4 => Val ( WUCKSEL_A :: CLOCKSPARE ) , 6 => Val ( WUCKSEL_A :: CLOCKSPAREWITHOFFSET ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV16`" ]
# [ inline ( always ) ]
pub fn is_div16 ( & self ) -> bool { * self == WUCKSEL_A :: DIV16 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == WUCKSEL_A :: DIV8 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == WUCKSEL_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == WUCKSEL_A :: DIV2 } # [ doc = "Checks if the value of the field is `CLOCKSPARE`" ]
# [ inline ( always ) ]
pub fn is_clock_spare ( & self ) -> bool { * self == WUCKSEL_A :: CLOCKSPARE } # [ doc = "Checks if the value of the field is `CLOCKSPAREWITHOFFSET`" ]
# [ inline ( always ) ]
pub fn is_clock_spare_with_offset ( & self ) -> bool { * self == WUCKSEL_A :: CLOCKSPAREWITHOFFSET } } # [ doc = "Write proxy for field `WUCKSEL`" ]
pub struct WUCKSEL_W < 'a > { w : & 'a mut W , } impl < 'a > WUCKSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUCKSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "RTC/16 clock is selected" ]
# [ inline ( always ) ]
pub fn div16 ( self ) -> & 'a mut W { self . variant ( WUCKSEL_A :: DIV16 ) } # [ doc = "RTC/8 clock is selected" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( WUCKSEL_A :: DIV8 ) } # [ doc = "RTC/4 clock is selected" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( WUCKSEL_A :: DIV4 ) } # [ doc = "RTC/2 clock is selected" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( WUCKSEL_A :: DIV2 ) } # [ doc = "ck_spre (usually 1 Hz) clock is selected" ]
# [ inline ( always ) ]
pub fn clock_spare ( self ) -> & 'a mut W { self . variant ( WUCKSEL_A :: CLOCKSPARE ) } # [ doc = "ck_spre (usually 1 Hz) clock is selected and 2^16 is added to the WUT counter value" ]
# [ inline ( always ) ]
pub fn clock_spare_with_offset ( self ) -> & 'a mut W { self . variant ( WUCKSEL_A :: CLOCKSPAREWITHOFFSET ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } # [ doc = "Time-stamp event active edge\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSEDGE_A { # [ doc = "0: RTC_TS input rising edge generates a time-stamp event" ]
RISINGEDGE = 0 , # [ doc = "1: RTC_TS input falling edge generates a time-stamp event" ]
FALLINGEDGE = 1 } impl From < TSEDGE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TSEDGE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TSEDGE`" ]
pub type TSEDGE_R = crate :: R < bool , TSEDGE_A > ; impl TSEDGE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TSEDGE_A { match self . bits { false => TSEDGE_A :: RISINGEDGE , true => TSEDGE_A :: FALLINGEDGE } } # [ doc = "Checks if the value of the field is `RISINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_rising_edge ( & self ) -> bool { * self == TSEDGE_A :: RISINGEDGE } # [ doc = "Checks if the value of the field is `FALLINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_falling_edge ( & self ) -> bool { * self == TSEDGE_A :: FALLINGEDGE } } # [ doc = "Write proxy for field `TSEDGE`" ]
pub struct TSEDGE_W < 'a > { w : & 'a mut W , } impl < 'a > TSEDGE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSEDGE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RTC_TS input rising edge generates a time-stamp event" ]
# [ inline ( always ) ]
pub fn rising_edge ( self ) -> & 'a mut W { self . variant ( TSEDGE_A :: RISINGEDGE ) } # [ doc = "RTC_TS input falling edge generates a time-stamp event" ]
# [ inline ( always ) ]
pub fn falling_edge ( self ) -> & 'a mut W { self . variant ( TSEDGE_A :: FALLINGEDGE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reference clock detection enable (50 or 60 Hz)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum REFCKON_A { # [ doc = "0: RTC_REFIN detection disabled" ]
DISABLED = 0 , # [ doc = "1: RTC_REFIN detection enabled" ]
ENABLED = 1 } impl From < REFCKON_A > for bool { # [ inline ( always ) ]
fn from ( variant : REFCKON_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `REFCKON`" ]
pub type REFCKON_R = crate :: R < bool , REFCKON_A > ; impl REFCKON_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> REFCKON_A { match self . bits { false => REFCKON_A :: DISABLED , true => REFCKON_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == REFCKON_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == REFCKON_A :: ENABLED } } # [ doc = "Write proxy for field `REFCKON`" ]
pub struct REFCKON_W < 'a > { w : & 'a mut W , } impl < 'a > REFCKON_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : REFCKON_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RTC_REFIN detection disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( REFCKON_A :: DISABLED ) } # [ doc = "RTC_REFIN detection enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( REFCKON_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Bypass the shadow registers\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BYPSHAD_A { # [ doc = "0: Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken from the shadow registers, which are updated once every two RTCCLK cycles" ]
SHADOWREG = 0 , # [ doc = "1: Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken directly from the calendar counters" ]
BYPASSSHADOWREG = 1 } impl From < BYPSHAD_A > for bool { # [ inline ( always ) ]
fn from ( variant : BYPSHAD_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BYPSHAD`" ]
pub type BYPSHAD_R = crate :: R < bool , BYPSHAD_A > ; impl BYPSHAD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BYPSHAD_A { match self . bits { false => BYPSHAD_A :: SHADOWREG , true => BYPSHAD_A :: BYPASSSHADOWREG } } # [ doc = "Checks if the value of the field is `SHADOWREG`" ]
# [ inline ( always ) ]
pub fn is_shadow_reg ( & self ) -> bool { * self == BYPSHAD_A :: SHADOWREG } # [ doc = "Checks if the value of the field is `BYPASSSHADOWREG`" ]
# [ inline ( always ) ]
pub fn is_bypass_shadow_reg ( & self ) -> bool { * self == BYPSHAD_A :: BYPASSSHADOWREG } } # [ doc = "Write proxy for field `BYPSHAD`" ]
pub struct BYPSHAD_W < 'a > { w : & 'a mut W , } impl < 'a > BYPSHAD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BYPSHAD_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken from the shadow registers, which are updated once every two RTCCLK cycles" ]
# [ inline ( always ) ]
pub fn shadow_reg ( self ) -> & 'a mut W { self . variant ( BYPSHAD_A :: SHADOWREG ) } # [ doc = "Calendar values (when reading from RTC_SSR, RTC_TR, and RTC_DR) are taken directly from the calendar counters" ]
# [ inline ( always ) ]
pub fn bypass_shadow_reg ( self ) -> & 'a mut W { self . variant ( BYPSHAD_A :: BYPASSSHADOWREG ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Hour format\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FMT_A { # [ doc = "0: 24 hour/day format" ]
TWENTY_FOUR_HOUR = 0 , # [ doc = "1: AM/PM hour format" ]
AM_PM = 1 } impl From < FMT_A > for bool { # [ inline ( always ) ]
fn from ( variant : FMT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FMT`" ]
pub type FMT_R = crate :: R < bool , FMT_A > ; impl FMT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FMT_A { match self . bits { false => FMT_A :: TWENTY_FOUR_HOUR , true => FMT_A :: AM_PM } } # [ doc = "Checks if the value of the field is `TWENTY_FOUR_HOUR`" ]
# [ inline ( always ) ]
pub fn is_twenty_four_hour ( & self ) -> bool { * self == FMT_A :: TWENTY_FOUR_HOUR } # [ doc = "Checks if the value of the field is `AM_PM`" ]
# [ inline ( always ) ]
pub fn is_am_pm ( & self ) -> bool { * self == FMT_A :: AM_PM } } # [ doc = "Write proxy for field `FMT`" ]
pub struct FMT_W < 'a > { w : & 'a mut W , } impl < 'a > FMT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FMT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "24 hour/day format" ]
# [ inline ( always ) ]
pub fn twenty_four_hour ( self ) -> & 'a mut W { self . variant ( FMT_A :: TWENTY_FOUR_HOUR ) } # [ doc = "AM/PM hour format" ]
# [ inline ( always ) ]
pub fn am_pm ( self ) -> & 'a mut W { self . variant ( FMT_A :: AM_PM ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Alarm A enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRAE_A { # [ doc = "0: Alarm A disabled" ]
DISABLED = 0 , # [ doc = "1: Alarm A enabled" ]
ENABLED = 1 } impl From < ALRAE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALRAE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALRAE`" ]
pub type ALRAE_R = crate :: R < bool , ALRAE_A > ; impl ALRAE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALRAE_A { match self . bits { false => ALRAE_A :: DISABLED , true => ALRAE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ALRAE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ALRAE_A :: ENABLED } } # [ doc = "Write proxy for field `ALRAE`" ]
pub struct ALRAE_W < 'a > { w : & 'a mut W , } impl < 'a > ALRAE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALRAE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm A disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ALRAE_A :: DISABLED ) } # [ doc = "Alarm A enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ALRAE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Alarm B enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRBE_A { # [ doc = "0: Alarm B disabled" ]
DISABLED = 0 , # [ doc = "1: Alarm B enabled" ]
ENABLED = 1 } impl From < ALRBE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALRBE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALRBE`" ]
pub type ALRBE_R = crate :: R < bool , ALRBE_A > ; impl ALRBE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALRBE_A { match self . bits { false => ALRBE_A :: DISABLED , true => ALRBE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ALRBE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ALRBE_A :: ENABLED } } # [ doc = "Write proxy for field `ALRBE`" ]
pub struct ALRBE_W < 'a > { w : & 'a mut W , } impl < 'a > ALRBE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALRBE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm B disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ALRBE_A :: DISABLED ) } # [ doc = "Alarm B enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ALRBE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Wakeup timer enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUTE_A { # [ doc = "0: Wakeup timer disabled" ]
DISABLED = 0 , # [ doc = "1: Wakeup timer enabled" ]
ENABLED = 1 } impl From < WUTE_A > for bool { # [ inline ( always ) ]
fn from ( variant : WUTE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WUTE`" ]
pub type WUTE_R = crate :: R < bool , WUTE_A > ; impl WUTE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WUTE_A { match self . bits { false => WUTE_A :: DISABLED , true => WUTE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == WUTE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == WUTE_A :: ENABLED } } # [ doc = "Write proxy for field `WUTE`" ]
pub struct WUTE_W < 'a > { w : & 'a mut W , } impl < 'a > WUTE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUTE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Wakeup timer disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( WUTE_A :: DISABLED ) } # [ doc = "Wakeup timer enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( WUTE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Time stamp enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSE_A { # [ doc = "0: Timestamp disabled" ]
DISABLED = 0 , # [ doc = "1: Timestamp enabled" ]
ENABLED = 1 } impl From < TSE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TSE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TSE`" ]
pub type TSE_R = crate :: R < bool , TSE_A > ; impl TSE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TSE_A { match self . bits { false => TSE_A :: DISABLED , true => TSE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TSE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TSE_A :: ENABLED } } # [ doc = "Write proxy for field `TSE`" ]
pub struct TSE_W < 'a > { w : & 'a mut W , } impl < 'a > TSE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Timestamp disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TSE_A :: DISABLED ) } # [ doc = "Timestamp enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TSE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Alarm A interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRAIE_A { # [ doc = "0: Alarm A interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Alarm A interrupt enabled" ]
ENABLED = 1 } impl From < ALRAIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALRAIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALRAIE`" ]
pub type ALRAIE_R = crate :: R < bool , ALRAIE_A > ; impl ALRAIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALRAIE_A { match self . bits { false => ALRAIE_A :: DISABLED , true => ALRAIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ALRAIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ALRAIE_A :: ENABLED } } # [ doc = "Write proxy for field `ALRAIE`" ]
pub struct ALRAIE_W < 'a > { w : & 'a mut W , } impl < 'a > ALRAIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALRAIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm A interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ALRAIE_A :: DISABLED ) } # [ doc = "Alarm A interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ALRAIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Alarm B interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRBIE_A { # [ doc = "0: Alarm B Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Alarm B Interrupt enabled" ]
ENABLED = 1 } impl From < ALRBIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALRBIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALRBIE`" ]
pub type ALRBIE_R = crate :: R < bool , ALRBIE_A > ; impl ALRBIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALRBIE_A { match self . bits { false => ALRBIE_A :: DISABLED , true => ALRBIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ALRBIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ALRBIE_A :: ENABLED } } # [ doc = "Write proxy for field `ALRBIE`" ]
pub struct ALRBIE_W < 'a > { w : & 'a mut W , } impl < 'a > ALRBIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALRBIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm B Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ALRBIE_A :: DISABLED ) } # [ doc = "Alarm B Interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ALRBIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Wakeup timer interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUTIE_A { # [ doc = "0: Wakeup timer interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Wakeup timer interrupt enabled" ]
ENABLED = 1 } impl From < WUTIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : WUTIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WUTIE`" ]
pub type WUTIE_R = crate :: R < bool , WUTIE_A > ; impl WUTIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WUTIE_A { match self . bits { false => WUTIE_A :: DISABLED , true => WUTIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == WUTIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == WUTIE_A :: ENABLED } } # [ doc = "Write proxy for field `WUTIE`" ]
pub struct WUTIE_W < 'a > { w : & 'a mut W , } impl < 'a > WUTIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUTIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Wakeup timer interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( WUTIE_A :: DISABLED ) } # [ doc = "Wakeup timer interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( WUTIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Time-stamp interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSIE_A { # [ doc = "0: Time-stamp Interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Time-stamp Interrupt enabled" ]
ENABLED = 1 } impl From < TSIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TSIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TSIE`" ]
pub type TSIE_R = crate :: R < bool , TSIE_A > ; impl TSIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TSIE_A { match self . bits { false => TSIE_A :: DISABLED , true => TSIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TSIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TSIE_A :: ENABLED } } # [ doc = "Write proxy for field `TSIE`" ]
pub struct TSIE_W < 'a > { w : & 'a mut W , } impl < 'a > TSIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Time-stamp Interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TSIE_A :: DISABLED ) } # [ doc = "Time-stamp Interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TSIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Add 1 hour (summer time change)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADD1H_A { # [ doc = "1: Adds 1 hour to the current time. This can be used for summer time change outside initialization mode" ]
ADD1 = 1 } impl From < ADD1H_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADD1H_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADD1H`" ]
pub type ADD1H_R = crate :: R < bool , ADD1H_A > ; impl ADD1H_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ADD1H_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ADD1H_A :: ADD1 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ADD1`" ]
# [ inline ( always ) ]
pub fn is_add1 ( & self ) -> bool { * self == ADD1H_A :: ADD1 } } # [ doc = "Write proxy for field `ADD1H`" ]
pub struct ADD1H_W < 'a > { w : & 'a mut W , } impl < 'a > ADD1H_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADD1H_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Adds 1 hour to the current time. This can be used for summer time change outside initialization mode" ]
# [ inline ( always ) ]
pub fn add1 ( self ) -> & 'a mut W { self . variant ( ADD1H_A :: ADD1 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Subtract 1 hour (winter time change)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SUB1H_A { # [ doc = "1: Subtracts 1 hour to the current time. This can be used for winter time change outside initialization mode" ]
SUB1 = 1 } impl From < SUB1H_A > for bool { # [ inline ( always ) ]
fn from ( variant : SUB1H_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SUB1H`" ]
pub type SUB1H_R = crate :: R < bool , SUB1H_A > ; impl SUB1H_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , SUB1H_A > { use crate :: Variant :: * ; match self . bits { true => Val ( SUB1H_A :: SUB1 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `SUB1`" ]
# [ inline ( always ) ]
pub fn is_sub1 ( & self ) -> bool { * self == SUB1H_A :: SUB1 } } # [ doc = "Write proxy for field `SUB1H`" ]
pub struct SUB1H_W < 'a > { w : & 'a mut W , } impl < 'a > SUB1H_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SUB1H_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Subtracts 1 hour to the current time. This can be used for winter time change outside initialization mode" ]
# [ inline ( always ) ]
pub fn sub1 ( self ) -> & 'a mut W { self . variant ( SUB1H_A :: SUB1 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Backup\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BKP_A { # [ doc = "0: Daylight Saving Time change has not been performed" ]
DST_NOT_CHANGED = 0 , # [ doc = "1: Daylight Saving Time change has been performed" ]
DST_CHANGED = 1 } impl From < BKP_A > for bool { # [ inline ( always ) ]
fn from ( variant : BKP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BKP`" ]
pub type BKP_R = crate :: R < bool , BKP_A > ; impl BKP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BKP_A { match self . bits { false => BKP_A :: DST_NOT_CHANGED , true => BKP_A :: DST_CHANGED } } # [ doc = "Checks if the value of the field is `DST_NOT_CHANGED`" ]
# [ inline ( always ) ]
pub fn is_dst_not_changed ( & self ) -> bool { * self == BKP_A :: DST_NOT_CHANGED } # [ doc = "Checks if the value of the field is `DST_CHANGED`" ]
# [ inline ( always ) ]
pub fn is_dst_changed ( & self ) -> bool { * self == BKP_A :: DST_CHANGED } } # [ doc = "Write proxy for field `BKP`" ]
pub struct BKP_W < 'a > { w : & 'a mut W , } impl < 'a > BKP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BKP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Daylight Saving Time change has not been performed" ]
# [ inline ( always ) ]
pub fn dst_not_changed ( self ) -> & 'a mut W { self . variant ( BKP_A :: DST_NOT_CHANGED ) } # [ doc = "Daylight Saving Time change has been performed" ]
# [ inline ( always ) ]
pub fn dst_changed ( self ) -> & 'a mut W { self . variant ( BKP_A :: DST_CHANGED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Calibration output selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COSEL_A { # [ doc = "0: Calibration output is 512 Hz (with default prescaler setting)" ]
CALFREQ_512HZ = 0 , # [ doc = "1: Calibration output is 1 Hz (with default prescaler setting)" ]
CALFREQ_1HZ = 1 } impl From < COSEL_A > for bool { # [ inline ( always ) ]
fn from ( variant : COSEL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COSEL`" ]
pub type COSEL_R = crate :: R < bool , COSEL_A > ; impl COSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COSEL_A { match self . bits { false => COSEL_A :: CALFREQ_512HZ , true => COSEL_A :: CALFREQ_1HZ } } # [ doc = "Checks if the value of the field is `CALFREQ_512HZ`" ]
# [ inline ( always ) ]
pub fn is_cal_freq_512hz ( & self ) -> bool { * self == COSEL_A :: CALFREQ_512HZ } # [ doc = "Checks if the value of the field is `CALFREQ_1HZ`" ]
# [ inline ( always ) ]
pub fn is_cal_freq_1hz ( & self ) -> bool { * self == COSEL_A :: CALFREQ_1HZ } } # [ doc = "Write proxy for field `COSEL`" ]
pub struct COSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COSEL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Calibration output is 512 Hz (with default prescaler setting)" ]
# [ inline ( always ) ]
pub fn cal_freq_512hz ( self ) -> & 'a mut W { self . variant ( COSEL_A :: CALFREQ_512HZ ) } # [ doc = "Calibration output is 1 Hz (with default prescaler setting)" ]
# [ inline ( always ) ]
pub fn cal_freq_1hz ( self ) -> & 'a mut W { self . variant ( COSEL_A :: CALFREQ_1HZ ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Output polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum POL_A { # [ doc = "0: The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\\[1:0\\])" ]
HIGH = 0 , # [ doc = "1: The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\\[1:0\\])" ]
LOW = 1 } impl From < POL_A > for bool { # [ inline ( always ) ]
fn from ( variant : POL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `POL`" ]
pub type POL_R = crate :: R < bool , POL_A > ; impl POL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> POL_A { match self . bits { false => POL_A :: HIGH , true => POL_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == POL_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == POL_A :: LOW } } # [ doc = "Write proxy for field `POL`" ]
pub struct POL_W < 'a > { w : & 'a mut W , } impl < 'a > POL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : POL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The pin is high when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\\[1:0\\])" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( POL_A :: HIGH ) } # [ doc = "The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL\\[1:0\\])" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( POL_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Output selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OSEL_A { # [ doc = "0: Output disabled" ]
DISABLED = 0 , # [ doc = "1: Alarm A output enabled" ]
ALARMA = 1 , # [ doc = "2: Alarm B output enabled" ]
ALARMB = 2 , # [ doc = "3: Wakeup output enabled" ]
WAKEUP = 3 } impl From < OSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OSEL`" ]
pub type OSEL_R = crate :: R < u8 , OSEL_A > ; impl OSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OSEL_A { match self . bits { 0 => OSEL_A :: DISABLED , 1 => OSEL_A :: ALARMA , 2 => OSEL_A :: ALARMB , 3 => OSEL_A :: WAKEUP , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OSEL_A :: DISABLED } # [ doc = "Checks if the value of the field is `ALARMA`" ]
# [ inline ( always ) ]
pub fn is_alarm_a ( & self ) -> bool { * self == OSEL_A :: ALARMA } # [ doc = "Checks if the value of the field is `ALARMB`" ]
# [ inline ( always ) ]
pub fn is_alarm_b ( & self ) -> bool { * self == OSEL_A :: ALARMB } # [ doc = "Checks if the value of the field is `WAKEUP`" ]
# [ inline ( always ) ]
pub fn is_wakeup ( & self ) -> bool { * self == OSEL_A :: WAKEUP } } # [ doc = "Write proxy for field `OSEL`" ]
pub struct OSEL_W < 'a > { w : & 'a mut W , } impl < 'a > OSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSEL_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Output disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OSEL_A :: DISABLED ) } # [ doc = "Alarm A output enabled" ]
# [ inline ( always ) ]
pub fn alarm_a ( self ) -> & 'a mut W { self . variant ( OSEL_A :: ALARMA ) } # [ doc = "Alarm B output enabled" ]
# [ inline ( always ) ]
pub fn alarm_b ( self ) -> & 'a mut W { self . variant ( OSEL_A :: ALARMB ) } # [ doc = "Wakeup output enabled" ]
# [ inline ( always ) ]
pub fn wakeup ( self ) -> & 'a mut W { self . variant ( OSEL_A :: WAKEUP ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 21 ) ) | ( ( ( value as u32 ) & 0x03 ) << 21 ) ; self . w } } # [ doc = "Calibration output enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COE_A { # [ doc = "0: Calibration output disabled" ]
DISABLED = 0 , # [ doc = "1: Calibration output enabled" ]
ENABLED = 1 } impl From < COE_A > for bool { # [ inline ( always ) ]
fn from ( variant : COE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COE`" ]
pub type COE_R = crate :: R < bool , COE_A > ; impl COE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COE_A { match self . bits { false => COE_A :: DISABLED , true => COE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == COE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == COE_A :: ENABLED } } # [ doc = "Write proxy for field `COE`" ]
pub struct COE_W < 'a > { w : & 'a mut W , } impl < 'a > COE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Calibration output disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( COE_A :: DISABLED ) } # [ doc = "Calibration output enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( COE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } impl R { # [ doc = "Bits 0:2 - Wakeup clock selection" ]
# [ inline ( always ) ]
pub fn wucksel ( & self ) -> WUCKSEL_R { WUCKSEL_R :: new ( ( self . bits & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Time-stamp event active edge" ]
# [ inline ( always ) ]
pub fn tsedge ( & self ) -> TSEDGE_R { TSEDGE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Reference clock detection enable (50 or 60 Hz)" ]
# [ inline ( always ) ]
pub fn refckon ( & self ) -> REFCKON_R { REFCKON_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Bypass the shadow registers" ]
# [ inline ( always ) ]
pub fn bypshad ( & self ) -> BYPSHAD_R { BYPSHAD_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Hour format" ]
# [ inline ( always ) ]
pub fn fmt ( & self ) -> FMT_R { FMT_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Alarm A enable" ]
# [ inline ( always ) ]
pub fn alrae ( & self ) -> ALRAE_R { ALRAE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Alarm B enable" ]
# [ inline ( always ) ]
pub fn alrbe ( & self ) -> ALRBE_R { ALRBE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Wakeup timer enable" ]
# [ inline ( always ) ]
pub fn wute ( & self ) -> WUTE_R { WUTE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Time stamp enable" ]
# [ inline ( always ) ]
pub fn tse ( & self ) -> TSE_R { TSE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Alarm A interrupt enable" ]
# [ inline ( always ) ]
pub fn alraie ( & self ) -> ALRAIE_R { ALRAIE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Alarm B interrupt enable" ]
# [ inline ( always ) ]
pub fn alrbie ( & self ) -> ALRBIE_R { ALRBIE_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Wakeup timer interrupt enable" ]
# [ inline ( always ) ]
pub fn wutie ( & self ) -> WUTIE_R { WUTIE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Time-stamp interrupt enable" ]
# [ inline ( always ) ]
pub fn tsie ( & self ) -> TSIE_R { TSIE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Add 1 hour (summer time change)" ]
# [ inline ( always ) ]
pub fn add1h ( & self ) -> ADD1H_R { ADD1H_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Subtract 1 hour (winter time change)" ]
# [ inline ( always ) ]
pub fn sub1h ( & self ) -> SUB1H_R { SUB1H_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Backup" ]
# [ inline ( always ) ]
pub fn bkp ( & self ) -> BKP_R { BKP_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Calibration output selection" ]
# [ inline ( always ) ]
pub fn cosel ( & self ) -> COSEL_R { COSEL_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Output polarity" ]
# [ inline ( always ) ]
pub fn pol ( & self ) -> POL_R { POL_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bits 21:22 - Output selection" ]
# [ inline ( always ) ]
pub fn osel ( & self ) -> OSEL_R { OSEL_R :: new ( ( ( self . bits >> 21 ) & 0x03 ) as u8 ) } # [ doc = "Bit 23 - Calibration output enable" ]
# [ inline ( always ) ]
pub fn coe ( & self ) -> COE_R { COE_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:2 - Wakeup clock selection" ]
# [ inline ( always ) ]
pub fn wucksel ( & mut self ) -> WUCKSEL_W { WUCKSEL_W { w : self } } # [ doc = "Bit 3 - Time-stamp event active edge" ]
# [ inline ( always ) ]
pub fn tsedge ( & mut self ) -> TSEDGE_W { TSEDGE_W { w : self } } # [ doc = "Bit 4 - Reference clock detection enable (50 or 60 Hz)" ]
# [ inline ( always ) ]
pub fn refckon ( & mut self ) -> REFCKON_W { REFCKON_W { w : self } } # [ doc = "Bit 5 - Bypass the shadow registers" ]
# [ inline ( always ) ]
pub fn bypshad ( & mut self ) -> BYPSHAD_W { BYPSHAD_W { w : self } } # [ doc = "Bit 6 - Hour format" ]
# [ inline ( always ) ]
pub fn fmt ( & mut self ) -> FMT_W { FMT_W { w : self } } # [ doc = "Bit 8 - Alarm A enable" ]
# [ inline ( always ) ]
pub fn alrae ( & mut self ) -> ALRAE_W { ALRAE_W { w : self } } # [ doc = "Bit 9 - Alarm B enable" ]
# [ inline ( always ) ]
pub fn alrbe ( & mut self ) -> ALRBE_W { ALRBE_W { w : self } } # [ doc = "Bit 10 - Wakeup timer enable" ]
# [ inline ( always ) ]
pub fn wute ( & mut self ) -> WUTE_W { WUTE_W { w : self } } # [ doc = "Bit 11 - Time stamp enable" ]
# [ inline ( always ) ]
pub fn tse ( & mut self ) -> TSE_W { TSE_W { w : self } } # [ doc = "Bit 12 - Alarm A interrupt enable" ]
# [ inline ( always ) ]
pub fn alraie ( & mut self ) -> ALRAIE_W { ALRAIE_W { w : self } } # [ doc = "Bit 13 - Alarm B interrupt enable" ]
# [ inline ( always ) ]
pub fn alrbie ( & mut self ) -> ALRBIE_W { ALRBIE_W { w : self } } # [ doc = "Bit 14 - Wakeup timer interrupt enable" ]
# [ inline ( always ) ]
pub fn wutie ( & mut self ) -> WUTIE_W { WUTIE_W { w : self } } # [ doc = "Bit 15 - Time-stamp interrupt enable" ]
# [ inline ( always ) ]
pub fn tsie ( & mut self ) -> TSIE_W { TSIE_W { w : self } } # [ doc = "Bit 16 - Add 1 hour (summer time change)" ]
# [ inline ( always ) ]
pub fn add1h ( & mut self ) -> ADD1H_W { ADD1H_W { w : self } } # [ doc = "Bit 17 - Subtract 1 hour (winter time change)" ]
# [ inline ( always ) ]
pub fn sub1h ( & mut self ) -> SUB1H_W { SUB1H_W { w : self } } # [ doc = "Bit 18 - Backup" ]
# [ inline ( always ) ]
pub fn bkp ( & mut self ) -> BKP_W { BKP_W { w : self } } # [ doc = "Bit 19 - Calibration output selection" ]
# [ inline ( always ) ]
pub fn cosel ( & mut self ) -> COSEL_W { COSEL_W { w : self } } # [ doc = "Bit 20 - Output polarity" ]
# [ inline ( always ) ]
pub fn pol ( & mut self ) -> POL_W { POL_W { w : self } } # [ doc = "Bits 21:22 - Output selection" ]
# [ inline ( always ) ]
pub fn osel ( & mut self ) -> OSEL_W { OSEL_W { w : self } } # [ doc = "Bit 23 - Calibration output enable" ]
# [ inline ( always ) ]
pub fn coe ( & mut self ) -> COE_W { COE_W { w : self } } } } # [ doc = "initialization and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module" ]
pub type ISR = crate :: Reg < u32 , _ISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISR ; # [ doc = "`read()` method returns [isr::R](isr::R) reader structure" ]
impl crate :: Readable for ISR { } # [ doc = "`write(|w| ..)` method takes [isr::W](isr::W) writer structure" ]
impl crate :: Writable for ISR { } # [ doc = "initialization and status register" ]
pub mod isr { # [ doc = "Reader of register ISR" ]
pub type R = crate :: R < u32 , super :: ISR > ; # [ doc = "Writer for register ISR" ]
pub type W = crate :: W < u32 , super :: ISR > ; # [ doc = "Register ISR `reset()`'s with value 0x07" ]
impl crate :: ResetValue for super :: ISR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x07 } } # [ doc = "Tamper detection flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TAMP1F_A { # [ doc = "1: This flag is set by hardware when a tamper detection event is detected on the RTC_TAMPx input" ]
TAMPERED = 1 } impl From < TAMP1F_A > for bool { # [ inline ( always ) ]
fn from ( variant : TAMP1F_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TAMP1F`" ]
pub type TAMP1F_R = crate :: R < bool , TAMP1F_A > ; impl TAMP1F_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , TAMP1F_A > { use crate :: Variant :: * ; match self . bits { true => Val ( TAMP1F_A :: TAMPERED ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TAMPERED`" ]
# [ inline ( always ) ]
pub fn is_tampered ( & self ) -> bool { * self == TAMP1F_A :: TAMPERED } } # [ doc = "Tamper detection flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TAMP1F_AW { # [ doc = "0: Flag cleared by software writing 0" ]
CLEAR = 0 } impl From < TAMP1F_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TAMP1F_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TAMP1F`" ]
pub struct TAMP1F_W < 'a > { w : & 'a mut W , } impl < 'a > TAMP1F_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMP1F_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Flag cleared by software writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TAMP1F_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Time-stamp overflow flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSOVF_A { # [ doc = "1: This flag is set by hardware when a time-stamp event occurs while TSF is already set" ]
OVERFLOW = 1 } impl From < TSOVF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TSOVF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TSOVF`" ]
pub type TSOVF_R = crate :: R < bool , TSOVF_A > ; impl TSOVF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , TSOVF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( TSOVF_A :: OVERFLOW ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OVERFLOW`" ]
# [ inline ( always ) ]
pub fn is_overflow ( & self ) -> bool { * self == TSOVF_A :: OVERFLOW } } # [ doc = "Time-stamp overflow flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSOVF_AW { # [ doc = "0: This flag is cleared by software by writing 0" ]
CLEAR = 0 } impl From < TSOVF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TSOVF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TSOVF`" ]
pub struct TSOVF_W < 'a > { w : & 'a mut W , } impl < 'a > TSOVF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSOVF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "This flag is cleared by software by writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TSOVF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Time-stamp flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSF_A { # [ doc = "1: This flag is set by hardware when a time-stamp event occurs" ]
TIMESTAMPEVENT = 1 } impl From < TSF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TSF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TSF`" ]
pub type TSF_R = crate :: R < bool , TSF_A > ; impl TSF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , TSF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( TSF_A :: TIMESTAMPEVENT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TIMESTAMPEVENT`" ]
# [ inline ( always ) ]
pub fn is_timestamp_event ( & self ) -> bool { * self == TSF_A :: TIMESTAMPEVENT } } # [ doc = "Time-stamp flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSF_AW { # [ doc = "0: This flag is cleared by software by writing 0" ]
CLEAR = 0 } impl From < TSF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TSF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TSF`" ]
pub struct TSF_W < 'a > { w : & 'a mut W , } impl < 'a > TSF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "This flag is cleared by software by writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TSF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Wakeup timer flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUTF_A { # [ doc = "1: This flag is set by hardware when the wakeup auto-reload counter reaches 0" ]
ZERO = 1 } impl From < WUTF_A > for bool { # [ inline ( always ) ]
fn from ( variant : WUTF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WUTF`" ]
pub type WUTF_R = crate :: R < bool , WUTF_A > ; impl WUTF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , WUTF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( WUTF_A :: ZERO ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ZERO`" ]
# [ inline ( always ) ]
pub fn is_zero ( & self ) -> bool { * self == WUTF_A :: ZERO } } # [ doc = "Wakeup timer flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUTF_AW { # [ doc = "0: This flag is cleared by software by writing 0" ]
CLEAR = 0 } impl From < WUTF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : WUTF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `WUTF`" ]
pub struct WUTF_W < 'a > { w : & 'a mut W , } impl < 'a > WUTF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WUTF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "This flag is cleared by software by writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( WUTF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Alarm B flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRBF_A { # [ doc = "1: This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm B register (RTC_ALRMBR)" ]
MATCH = 1 } impl From < ALRBF_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALRBF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALRBF`" ]
pub type ALRBF_R = crate :: R < bool , ALRBF_A > ; impl ALRBF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ALRBF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ALRBF_A :: MATCH ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == ALRBF_A :: MATCH } } # [ doc = "Alarm B flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRBF_AW { # [ doc = "0: This flag is cleared by software by writing 0" ]
CLEAR = 0 } impl From < ALRBF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : ALRBF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `ALRBF`" ]
pub struct ALRBF_W < 'a > { w : & 'a mut W , } impl < 'a > ALRBF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALRBF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "This flag is cleared by software by writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( ALRBF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Alarm A flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRAF_A { # [ doc = "1: This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the Alarm A register (RTC_ALRMAR)" ]
MATCH = 1 } impl From < ALRAF_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALRAF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALRAF`" ]
pub type ALRAF_R = crate :: R < bool , ALRAF_A > ; impl ALRAF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ALRAF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ALRAF_A :: MATCH ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == ALRAF_A :: MATCH } } # [ doc = "Alarm A flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRAF_AW { # [ doc = "0: This flag is cleared by software by writing 0" ]
CLEAR = 0 } impl From < ALRAF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : ALRAF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `ALRAF`" ]
pub struct ALRAF_W < 'a > { w : & 'a mut W , } impl < 'a > ALRAF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALRAF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "This flag is cleared by software by writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( ALRAF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Initialization mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum INIT_A { # [ doc = "0: Free running mode" ]
FREERUNNINGMODE = 0 , # [ doc = "1: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset." ]
INITMODE = 1 } impl From < INIT_A > for bool { # [ inline ( always ) ]
fn from ( variant : INIT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `INIT`" ]
pub type INIT_R = crate :: R < bool , INIT_A > ; impl INIT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> INIT_A { match self . bits { false => INIT_A :: FREERUNNINGMODE , true => INIT_A :: INITMODE } } # [ doc = "Checks if the value of the field is `FREERUNNINGMODE`" ]
# [ inline ( always ) ]
pub fn is_free_running_mode ( & self ) -> bool { * self == INIT_A :: FREERUNNINGMODE } # [ doc = "Checks if the value of the field is `INITMODE`" ]
# [ inline ( always ) ]
pub fn is_init_mode ( & self ) -> bool { * self == INIT_A :: INITMODE } } # [ doc = "Write proxy for field `INIT`" ]
pub struct INIT_W < 'a > { w : & 'a mut W , } impl < 'a > INIT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : INIT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Free running mode" ]
# [ inline ( always ) ]
pub fn free_running_mode ( self ) -> & 'a mut W { self . variant ( INIT_A :: FREERUNNINGMODE ) } # [ doc = "Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset." ]
# [ inline ( always ) ]
pub fn init_mode ( self ) -> & 'a mut W { self . variant ( INIT_A :: INITMODE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Initialization flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum INITF_A { # [ doc = "0: Calendar registers update is not allowed" ]
NOTALLOWED = 0 , # [ doc = "1: Calendar registers update is allowed" ]
ALLOWED = 1 } impl From < INITF_A > for bool { # [ inline ( always ) ]
fn from ( variant : INITF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `INITF`" ]
pub type INITF_R = crate :: R < bool , INITF_A > ; impl INITF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> INITF_A { match self . bits { false => INITF_A :: NOTALLOWED , true => INITF_A :: ALLOWED } } # [ doc = "Checks if the value of the field is `NOTALLOWED`" ]
# [ inline ( always ) ]
pub fn is_not_allowed ( & self ) -> bool { * self == INITF_A :: NOTALLOWED } # [ doc = "Checks if the value of the field is `ALLOWED`" ]
# [ inline ( always ) ]
pub fn is_allowed ( & self ) -> bool { * self == INITF_A :: ALLOWED } } # [ doc = "Registers synchronization flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RSF_A { # [ doc = "0: Calendar shadow registers not yet synchronized" ]
NOTSYNCED = 0 , # [ doc = "1: Calendar shadow registers synchronized" ]
SYNCED = 1 } impl From < RSF_A > for bool { # [ inline ( always ) ]
fn from ( variant : RSF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RSF`" ]
pub type RSF_R = crate :: R < bool , RSF_A > ; impl RSF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RSF_A { match self . bits { false => RSF_A :: NOTSYNCED , true => RSF_A :: SYNCED } } # [ doc = "Checks if the value of the field is `NOTSYNCED`" ]
# [ inline ( always ) ]
pub fn is_not_synced ( & self ) -> bool { * self == RSF_A :: NOTSYNCED } # [ doc = "Checks if the value of the field is `SYNCED`" ]
# [ inline ( always ) ]
pub fn is_synced ( & self ) -> bool { * self == RSF_A :: SYNCED } } # [ doc = "Registers synchronization flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RSF_AW { # [ doc = "0: This flag is cleared by software by writing 0" ]
CLEAR = 0 } impl From < RSF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : RSF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `RSF`" ]
pub struct RSF_W < 'a > { w : & 'a mut W , } impl < 'a > RSF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RSF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "This flag is cleared by software by writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( RSF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Initialization status flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum INITS_A { # [ doc = "0: Calendar has not been initialized" ]
NOTINITALIZED = 0 , # [ doc = "1: Calendar has been initialized" ]
INITALIZED = 1 } impl From < INITS_A > for bool { # [ inline ( always ) ]
fn from ( variant : INITS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `INITS`" ]
pub type INITS_R = crate :: R < bool , INITS_A > ; impl INITS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> INITS_A { match self . bits { false => INITS_A :: NOTINITALIZED , true => INITS_A :: INITALIZED } } # [ doc = "Checks if the value of the field is `NOTINITALIZED`" ]
# [ inline ( always ) ]
pub fn is_not_initalized ( & self ) -> bool { * self == INITS_A :: NOTINITALIZED } # [ doc = "Checks if the value of the field is `INITALIZED`" ]
# [ inline ( always ) ]
pub fn is_initalized ( & self ) -> bool { * self == INITS_A :: INITALIZED } } # [ doc = "Wakeup timer write flag\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WUTWF_A { # [ doc = "0: Wakeup timer configuration update not allowed" ]
UPDATENOTALLOWED = 0 , # [ doc = "1: Wakeup timer configuration update allowed" ]
UPDATEALLOWED = 1 } impl From < WUTWF_A > for bool { # [ inline ( always ) ]
fn from ( variant : WUTWF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WUTWF`" ]
pub type WUTWF_R = crate :: R < bool , WUTWF_A > ; impl WUTWF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WUTWF_A { match self . bits { false => WUTWF_A :: UPDATENOTALLOWED , true => WUTWF_A :: UPDATEALLOWED } } # [ doc = "Checks if the value of the field is `UPDATENOTALLOWED`" ]
# [ inline ( always ) ]
pub fn is_update_not_allowed ( & self ) -> bool { * self == WUTWF_A :: UPDATENOTALLOWED } # [ doc = "Checks if the value of the field is `UPDATEALLOWED`" ]
# [ inline ( always ) ]
pub fn is_update_allowed ( & self ) -> bool { * self == WUTWF_A :: UPDATEALLOWED } } # [ doc = "Alarm B write flag\n\nValue on reset: 1" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALRBWF_A { # [ doc = "0: Alarm update not allowed" ]
UPDATENOTALLOWED = 0 , # [ doc = "1: Alarm update allowed" ]
UPDATEALLOWED = 1 } impl From < ALRBWF_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALRBWF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALRBWF`" ]
pub type ALRBWF_R = crate :: R < bool , ALRBWF_A > ; impl ALRBWF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALRBWF_A { match self . bits { false => ALRBWF_A :: UPDATENOTALLOWED , true => ALRBWF_A :: UPDATEALLOWED } } # [ doc = "Checks if the value of the field is `UPDATENOTALLOWED`" ]
# [ inline ( always ) ]
pub fn is_update_not_allowed ( & self ) -> bool { * self == ALRBWF_A :: UPDATENOTALLOWED } # [ doc = "Checks if the value of the field is `UPDATEALLOWED`" ]
# [ inline ( always ) ]
pub fn is_update_allowed ( & self ) -> bool { * self == ALRBWF_A :: UPDATEALLOWED } } # [ doc = "Alarm A write flag" ]
pub type ALRAWF_A = ALRBWF_A ; # [ doc = "Reader of field `ALRAWF`" ]
pub type ALRAWF_R = crate :: R < bool , ALRBWF_A > ; # [ doc = "Shift operation pending\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SHPF_A { # [ doc = "0: No shift operation is pending" ]
NOSHIFTPENDING = 0 , # [ doc = "1: A shift operation is pending" ]
SHIFTPENDING = 1 } impl From < SHPF_A > for bool { # [ inline ( always ) ]
fn from ( variant : SHPF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SHPF`" ]
pub type SHPF_R = crate :: R < bool , SHPF_A > ; impl SHPF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SHPF_A { match self . bits { false => SHPF_A :: NOSHIFTPENDING , true => SHPF_A :: SHIFTPENDING } } # [ doc = "Checks if the value of the field is `NOSHIFTPENDING`" ]
# [ inline ( always ) ]
pub fn is_no_shift_pending ( & self ) -> bool { * self == SHPF_A :: NOSHIFTPENDING } # [ doc = "Checks if the value of the field is `SHIFTPENDING`" ]
# [ inline ( always ) ]
pub fn is_shift_pending ( & self ) -> bool { * self == SHPF_A :: SHIFTPENDING } } # [ doc = "Write proxy for field `SHPF`" ]
pub struct SHPF_W < 'a > { w : & 'a mut W , } impl < 'a > SHPF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SHPF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No shift operation is pending" ]
# [ inline ( always ) ]
pub fn no_shift_pending ( self ) -> & 'a mut W { self . variant ( SHPF_A :: NOSHIFTPENDING ) } # [ doc = "A shift operation is pending" ]
# [ inline ( always ) ]
pub fn shift_pending ( self ) -> & 'a mut W { self . variant ( SHPF_A :: SHIFTPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "RTC_TAMP2 detection flag" ]
pub type TAMP2F_A = TAMP1F_A ; # [ doc = "Reader of field `TAMP2F`" ]
pub type TAMP2F_R = crate :: R < bool , TAMP1F_A > ; # [ doc = "RTC_TAMP2 detection flag" ]
pub type TAMP2F_AW = TAMP1F_AW ; # [ doc = "Write proxy for field `TAMP2F`" ]
pub struct TAMP2F_W < 'a > { w : & 'a mut W , } impl < 'a > TAMP2F_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMP2F_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Flag cleared by software writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TAMP1F_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "RTC_TAMP3 detection flag" ]
pub type TAMP3F_A = TAMP1F_A ; # [ doc = "Reader of field `TAMP3F`" ]
pub type TAMP3F_R = crate :: R < bool , TAMP1F_A > ; # [ doc = "RTC_TAMP3 detection flag" ]
pub type TAMP3F_AW = TAMP1F_AW ; # [ doc = "Write proxy for field `TAMP3F`" ]
pub struct TAMP3F_W < 'a > { w : & 'a mut W , } impl < 'a > TAMP3F_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMP3F_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Flag cleared by software writing 0" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TAMP1F_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Recalibration pending Flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum RECALPF_A { # [ doc = "1: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0" ]
PENDING = 1 } impl From < RECALPF_A > for bool { # [ inline ( always ) ]
fn from ( variant : RECALPF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `RECALPF`" ]
pub type RECALPF_R = crate :: R < bool , RECALPF_A > ; impl RECALPF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , RECALPF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( RECALPF_A :: PENDING ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PENDING`" ]
# [ inline ( always ) ]
pub fn is_pending ( & self ) -> bool { * self == RECALPF_A :: PENDING } } impl R { # [ doc = "Bit 13 - Tamper detection flag" ]
# [ inline ( always ) ]
pub fn tamp1f ( & self ) -> TAMP1F_R { TAMP1F_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Time-stamp overflow flag" ]
# [ inline ( always ) ]
pub fn tsovf ( & self ) -> TSOVF_R { TSOVF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Time-stamp flag" ]
# [ inline ( always ) ]
pub fn tsf ( & self ) -> TSF_R { TSF_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Wakeup timer flag" ]
# [ inline ( always ) ]
pub fn wutf ( & self ) -> WUTF_R { WUTF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Alarm B flag" ]
# [ inline ( always ) ]
pub fn alrbf ( & self ) -> ALRBF_R { ALRBF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Alarm A flag" ]
# [ inline ( always ) ]
pub fn alraf ( & self ) -> ALRAF_R { ALRAF_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Initialization mode" ]
# [ inline ( always ) ]
pub fn init ( & self ) -> INIT_R { INIT_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Initialization flag" ]
# [ inline ( always ) ]
pub fn initf ( & self ) -> INITF_R { INITF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Registers synchronization flag" ]
# [ inline ( always ) ]
pub fn rsf ( & self ) -> RSF_R { RSF_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Initialization status flag" ]
# [ inline ( always ) ]
pub fn inits ( & self ) -> INITS_R { INITS_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Wakeup timer write flag" ]
# [ inline ( always ) ]
pub fn wutwf ( & self ) -> WUTWF_R { WUTWF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Alarm B write flag" ]
# [ inline ( always ) ]
pub fn alrbwf ( & self ) -> ALRBWF_R { ALRBWF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Alarm A write flag" ]
# [ inline ( always ) ]
pub fn alrawf ( & self ) -> ALRAWF_R { ALRAWF_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Shift operation pending" ]
# [ inline ( always ) ]
pub fn shpf ( & self ) -> SHPF_R { SHPF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - RTC_TAMP2 detection flag" ]
# [ inline ( always ) ]
pub fn tamp2f ( & self ) -> TAMP2F_R { TAMP2F_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - RTC_TAMP3 detection flag" ]
# [ inline ( always ) ]
pub fn tamp3f ( & self ) -> TAMP3F_R { TAMP3F_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Recalibration pending Flag" ]
# [ inline ( always ) ]
pub fn recalpf ( & self ) -> RECALPF_R { RECALPF_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 13 - Tamper detection flag" ]
# [ inline ( always ) ]
pub fn tamp1f ( & mut self ) -> TAMP1F_W { TAMP1F_W { w : self } } # [ doc = "Bit 12 - Time-stamp overflow flag" ]
# [ inline ( always ) ]
pub fn tsovf ( & mut self ) -> TSOVF_W { TSOVF_W { w : self } } # [ doc = "Bit 11 - Time-stamp flag" ]
# [ inline ( always ) ]
pub fn tsf ( & mut self ) -> TSF_W { TSF_W { w : self } } # [ doc = "Bit 10 - Wakeup timer flag" ]
# [ inline ( always ) ]
pub fn wutf ( & mut self ) -> WUTF_W { WUTF_W { w : self } } # [ doc = "Bit 9 - Alarm B flag" ]
# [ inline ( always ) ]
pub fn alrbf ( & mut self ) -> ALRBF_W { ALRBF_W { w : self } } # [ doc = "Bit 8 - Alarm A flag" ]
# [ inline ( always ) ]
pub fn alraf ( & mut self ) -> ALRAF_W { ALRAF_W { w : self } } # [ doc = "Bit 7 - Initialization mode" ]
# [ inline ( always ) ]
pub fn init ( & mut self ) -> INIT_W { INIT_W { w : self } } # [ doc = "Bit 5 - Registers synchronization flag" ]
# [ inline ( always ) ]
pub fn rsf ( & mut self ) -> RSF_W { RSF_W { w : self } } # [ doc = "Bit 3 - Shift operation pending" ]
# [ inline ( always ) ]
pub fn shpf ( & mut self ) -> SHPF_W { SHPF_W { w : self } } # [ doc = "Bit 14 - RTC_TAMP2 detection flag" ]
# [ inline ( always ) ]
pub fn tamp2f ( & mut self ) -> TAMP2F_W { TAMP2F_W { w : self } } # [ doc = "Bit 15 - RTC_TAMP3 detection flag" ]
# [ inline ( always ) ]
pub fn tamp3f ( & mut self ) -> TAMP3F_W { TAMP3F_W { w : self } } } } # [ doc = "prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prer](prer) module" ]
pub type PRER = crate :: Reg < u32 , _PRER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PRER ; # [ doc = "`read()` method returns [prer::R](prer::R) reader structure" ]
impl crate :: Readable for PRER { } # [ doc = "`write(|w| ..)` method takes [prer::W](prer::W) writer structure" ]
impl crate :: Writable for PRER { } # [ doc = "prescaler register" ]
pub mod prer { # [ doc = "Reader of register PRER" ]
pub type R = crate :: R < u32 , super :: PRER > ; # [ doc = "Writer for register PRER" ]
pub type W = crate :: W < u32 , super :: PRER > ; # [ doc = "Register PRER `reset()`'s with value 0x007f_00ff" ]
impl crate :: ResetValue for super :: PRER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x007f_00ff } } # [ doc = "Reader of field `PREDIV_A`" ]
pub type PREDIV_A_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PREDIV_A`" ]
pub struct PREDIV_A_W < 'a > { w : & 'a mut W , } impl < 'a > PREDIV_A_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x7f << 16 ) ) | ( ( ( value as u32 ) & 0x7f ) << 16 ) ; self . w } } # [ doc = "Reader of field `PREDIV_S`" ]
pub type PREDIV_S_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PREDIV_S`" ]
pub struct PREDIV_S_W < 'a > { w : & 'a mut W , } impl < 'a > PREDIV_S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x7fff ) | ( ( value as u32 ) & 0x7fff ) ; self . w } } impl R { # [ doc = "Bits 16:22 - Asynchronous prescaler factor" ]
# [ inline ( always ) ]
pub fn prediv_a ( & self ) -> PREDIV_A_R { PREDIV_A_R :: new ( ( ( self . bits >> 16 ) & 0x7f ) as u8 ) } # [ doc = "Bits 0:14 - Synchronous prescaler factor" ]
# [ inline ( always ) ]
pub fn prediv_s ( & self ) -> PREDIV_S_R { PREDIV_S_R :: new ( ( self . bits & 0x7fff ) as u16 ) } } impl W { # [ doc = "Bits 16:22 - Asynchronous prescaler factor" ]
# [ inline ( always ) ]
pub fn prediv_a ( & mut self ) -> PREDIV_A_W { PREDIV_A_W { w : self } } # [ doc = "Bits 0:14 - Synchronous prescaler factor" ]
# [ inline ( always ) ]
pub fn prediv_s ( & mut self ) -> PREDIV_S_W { PREDIV_S_W { w : self } } } } # [ doc = "wakeup timer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wutr](wutr) module" ]
pub type WUTR = crate :: Reg < u32 , _WUTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _WUTR ; # [ doc = "`read()` method returns [wutr::R](wutr::R) reader structure" ]
impl crate :: Readable for WUTR { } # [ doc = "`write(|w| ..)` method takes [wutr::W](wutr::W) writer structure" ]
impl crate :: Writable for WUTR { } # [ doc = "wakeup timer register" ]
pub mod wutr { # [ doc = "Reader of register WUTR" ]
pub type R = crate :: R < u32 , super :: WUTR > ; # [ doc = "Writer for register WUTR" ]
pub type W = crate :: W < u32 , super :: WUTR > ; # [ doc = "Register WUTR `reset()`'s with value 0xffff" ]
impl crate :: ResetValue for super :: WUTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff } } # [ doc = "Reader of field `WUT`" ]
pub type WUT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `WUT`" ]
pub struct WUT_W < 'a > { w : & 'a mut W , } impl < 'a > WUT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Wakeup auto-reload value bits" ]
# [ inline ( always ) ]
pub fn wut ( & self ) -> WUT_R { WUT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Wakeup auto-reload value bits" ]
# [ inline ( always ) ]
pub fn wut ( & mut self ) -> WUT_W { WUT_W { w : self } } } } # [ doc = "alarm A register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alrmar](alrmar) module" ]
pub type ALRMAR = crate :: Reg < u32 , _ALRMAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ALRMAR ; # [ doc = "`read()` method returns [alrmar::R](alrmar::R) reader structure" ]
impl crate :: Readable for ALRMAR { } # [ doc = "`write(|w| ..)` method takes [alrmar::W](alrmar::W) writer structure" ]
impl crate :: Writable for ALRMAR { } # [ doc = "alarm A register" ]
pub mod alrmar { # [ doc = "Reader of register ALRMAR" ]
pub type R = crate :: R < u32 , super :: ALRMAR > ; # [ doc = "Writer for register ALRMAR" ]
pub type W = crate :: W < u32 , super :: ALRMAR > ; # [ doc = "Register ALRMAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ALRMAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alarm A date mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSK4_A { # [ doc = "0: Alarm set if the date/day match" ]
MASK = 0 , # [ doc = "1: Date/day don\u{2019}t care in Alarm comparison" ]
NOTMASK = 1 } impl From < MSK4_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSK4_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSK4`" ]
pub type MSK4_R = crate :: R < bool , MSK4_A > ; impl MSK4_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSK4_A { match self . bits { false => MSK4_A :: MASK , true => MSK4_A :: NOTMASK } } # [ doc = "Checks if the value of the field is `MASK`" ]
# [ inline ( always ) ]
pub fn is_mask ( & self ) -> bool { * self == MSK4_A :: MASK } # [ doc = "Checks if the value of the field is `NOTMASK`" ]
# [ inline ( always ) ]
pub fn is_not_mask ( & self ) -> bool { * self == MSK4_A :: NOTMASK } } # [ doc = "Write proxy for field `MSK4`" ]
pub struct MSK4_W < 'a > { w : & 'a mut W , } impl < 'a > MSK4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Week day selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WDSEL_A { # [ doc = "0: DU\\[3:0\\]
represents the date units" ]
DATEUNITS = 0 , # [ doc = "1: DU\\[3:0\\]
represents the week day. DT\\[1:0\\]
is don\u{2019}t care." ]
WEEKDAY = 1 } impl From < WDSEL_A > for bool { # [ inline ( always ) ]
fn from ( variant : WDSEL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WDSEL`" ]
pub type WDSEL_R = crate :: R < bool , WDSEL_A > ; impl WDSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WDSEL_A { match self . bits { false => WDSEL_A :: DATEUNITS , true => WDSEL_A :: WEEKDAY } } # [ doc = "Checks if the value of the field is `DATEUNITS`" ]
# [ inline ( always ) ]
pub fn is_date_units ( & self ) -> bool { * self == WDSEL_A :: DATEUNITS } # [ doc = "Checks if the value of the field is `WEEKDAY`" ]
# [ inline ( always ) ]
pub fn is_week_day ( & self ) -> bool { * self == WDSEL_A :: WEEKDAY } } # [ doc = "Write proxy for field `WDSEL`" ]
pub struct WDSEL_W < 'a > { w : & 'a mut W , } impl < 'a > WDSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WDSEL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DU\\[3:0\\]
represents the date units" ]
# [ inline ( always ) ]
pub fn date_units ( self ) -> & 'a mut W { self . variant ( WDSEL_A :: DATEUNITS ) } # [ doc = "DU\\[3:0\\]
represents the week day. DT\\[1:0\\]
is don\u{2019}t care." ]
# [ inline ( always ) ]
pub fn week_day ( self ) -> & 'a mut W { self . variant ( WDSEL_A :: WEEKDAY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `DT`" ]
pub type DT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DT`" ]
pub struct DT_W < 'a > { w : & 'a mut W , } impl < 'a > DT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DU`" ]
pub type DU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DU`" ]
pub struct DU_W < 'a > { w : & 'a mut W , } impl < 'a > DU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alarm A hours mask" ]
pub type MSK3_A = MSK4_A ; # [ doc = "Reader of field `MSK3`" ]
pub type MSK3_R = crate :: R < bool , MSK4_A > ; # [ doc = "Write proxy for field `MSK3`" ]
pub struct MSK3_W < 'a > { w : & 'a mut W , } impl < 'a > MSK3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "AM/PM notation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PM_A { # [ doc = "0: AM or 24-hour format" ]
AM = 0 , # [ doc = "1: PM" ]
PM = 1 } impl From < PM_A > for bool { # [ inline ( always ) ]
fn from ( variant : PM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PM`" ]
pub type PM_R = crate :: R < bool , PM_A > ; impl PM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PM_A { match self . bits { false => PM_A :: AM , true => PM_A :: PM } } # [ doc = "Checks if the value of the field is `AM`" ]
# [ inline ( always ) ]
pub fn is_am ( & self ) -> bool { * self == PM_A :: AM } # [ doc = "Checks if the value of the field is `PM`" ]
# [ inline ( always ) ]
pub fn is_pm ( & self ) -> bool { * self == PM_A :: PM } } # [ doc = "Write proxy for field `PM`" ]
pub struct PM_W < 'a > { w : & 'a mut W , } impl < 'a > PM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "AM or 24-hour format" ]
# [ inline ( always ) ]
pub fn am ( self ) -> & 'a mut W { self . variant ( PM_A :: AM ) } # [ doc = "PM" ]
# [ inline ( always ) ]
pub fn pm ( self ) -> & 'a mut W { self . variant ( PM_A :: PM ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `HT`" ]
pub type HT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HT`" ]
pub struct HT_W < 'a > { w : & 'a mut W , } impl < 'a > HT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Reader of field `HU`" ]
pub type HU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HU`" ]
pub struct HU_W < 'a > { w : & 'a mut W , } impl < 'a > HU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alarm A minutes mask" ]
pub type MSK2_A = MSK4_A ; # [ doc = "Reader of field `MSK2`" ]
pub type MSK2_R = crate :: R < bool , MSK4_A > ; # [ doc = "Write proxy for field `MSK2`" ]
pub struct MSK2_W < 'a > { w : & 'a mut W , } impl < 'a > MSK2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `MNT`" ]
pub type MNT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MNT`" ]
pub struct MNT_W < 'a > { w : & 'a mut W , } impl < 'a > MNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Reader of field `MNU`" ]
pub type MNU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MNU`" ]
pub struct MNU_W < 'a > { w : & 'a mut W , } impl < 'a > MNU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alarm A seconds mask" ]
pub type MSK1_A = MSK4_A ; # [ doc = "Reader of field `MSK1`" ]
pub type MSK1_R = crate :: R < bool , MSK4_A > ; # [ doc = "Write proxy for field `MSK1`" ]
pub struct MSK1_W < 'a > { w : & 'a mut W , } impl < 'a > MSK1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `ST`" ]
pub type ST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ST`" ]
pub struct ST_W < 'a > { w : & 'a mut W , } impl < 'a > ST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `SU`" ]
pub type SU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SU`" ]
pub struct SU_W < 'a > { w : & 'a mut W , } impl < 'a > SU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bit 31 - Alarm A date mask" ]
# [ inline ( always ) ]
pub fn msk4 ( & self ) -> MSK4_R { MSK4_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Week day selection" ]
# [ inline ( always ) ]
pub fn wdsel ( & self ) -> WDSEL_R { WDSEL_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bits 28:29 - Date tens in BCD format" ]
# [ inline ( always ) ]
pub fn dt ( & self ) -> DT_R { DT_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - Date units or day in BCD format" ]
# [ inline ( always ) ]
pub fn du ( & self ) -> DU_R { DU_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bit 23 - Alarm A hours mask" ]
# [ inline ( always ) ]
pub fn msk3 ( & self ) -> MSK3_R { MSK3_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - AM/PM notation" ]
# [ inline ( always ) ]
pub fn pm ( & self ) -> PM_R { PM_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bits 20:21 - Hour tens in BCD format" ]
# [ inline ( always ) ]
pub fn ht ( & self ) -> HT_R { HT_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:19 - Hour units in BCD format" ]
# [ inline ( always ) ]
pub fn hu ( & self ) -> HU_R { HU_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Alarm A minutes mask" ]
# [ inline ( always ) ]
pub fn msk2 ( & self ) -> MSK2_R { MSK2_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Minute tens in BCD format" ]
# [ inline ( always ) ]
pub fn mnt ( & self ) -> MNT_R { MNT_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bits 8:11 - Minute units in BCD format" ]
# [ inline ( always ) ]
pub fn mnu ( & self ) -> MNU_R { MNU_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 7 - Alarm A seconds mask" ]
# [ inline ( always ) ]
pub fn msk1 ( & self ) -> MSK1_R { MSK1_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Second tens in BCD format" ]
# [ inline ( always ) ]
pub fn st ( & self ) -> ST_R { ST_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:3 - Second units in BCD format" ]
# [ inline ( always ) ]
pub fn su ( & self ) -> SU_R { SU_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bit 31 - Alarm A date mask" ]
# [ inline ( always ) ]
pub fn msk4 ( & mut self ) -> MSK4_W { MSK4_W { w : self } } # [ doc = "Bit 30 - Week day selection" ]
# [ inline ( always ) ]
pub fn wdsel ( & mut self ) -> WDSEL_W { WDSEL_W { w : self } } # [ doc = "Bits 28:29 - Date tens in BCD format" ]
# [ inline ( always ) ]
pub fn dt ( & mut self ) -> DT_W { DT_W { w : self } } # [ doc = "Bits 24:27 - Date units or day in BCD format" ]
# [ inline ( always ) ]
pub fn du ( & mut self ) -> DU_W { DU_W { w : self } } # [ doc = "Bit 23 - Alarm A hours mask" ]
# [ inline ( always ) ]
pub fn msk3 ( & mut self ) -> MSK3_W { MSK3_W { w : self } } # [ doc = "Bit 22 - AM/PM notation" ]
# [ inline ( always ) ]
pub fn pm ( & mut self ) -> PM_W { PM_W { w : self } } # [ doc = "Bits 20:21 - Hour tens in BCD format" ]
# [ inline ( always ) ]
pub fn ht ( & mut self ) -> HT_W { HT_W { w : self } } # [ doc = "Bits 16:19 - Hour units in BCD format" ]
# [ inline ( always ) ]
pub fn hu ( & mut self ) -> HU_W { HU_W { w : self } } # [ doc = "Bit 15 - Alarm A minutes mask" ]
# [ inline ( always ) ]
pub fn msk2 ( & mut self ) -> MSK2_W { MSK2_W { w : self } } # [ doc = "Bits 12:14 - Minute tens in BCD format" ]
# [ inline ( always ) ]
pub fn mnt ( & mut self ) -> MNT_W { MNT_W { w : self } } # [ doc = "Bits 8:11 - Minute units in BCD format" ]
# [ inline ( always ) ]
pub fn mnu ( & mut self ) -> MNU_W { MNU_W { w : self } } # [ doc = "Bit 7 - Alarm A seconds mask" ]
# [ inline ( always ) ]
pub fn msk1 ( & mut self ) -> MSK1_W { MSK1_W { w : self } } # [ doc = "Bits 4:6 - Second tens in BCD format" ]
# [ inline ( always ) ]
pub fn st ( & mut self ) -> ST_W { ST_W { w : self } } # [ doc = "Bits 0:3 - Second units in BCD format" ]
# [ inline ( always ) ]
pub fn su ( & mut self ) -> SU_W { SU_W { w : self } } } } # [ doc = "alarm B register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alrmbr](alrmbr) module" ]
pub type ALRMBR = crate :: Reg < u32 , _ALRMBR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ALRMBR ; # [ doc = "`read()` method returns [alrmbr::R](alrmbr::R) reader structure" ]
impl crate :: Readable for ALRMBR { } # [ doc = "`write(|w| ..)` method takes [alrmbr::W](alrmbr::W) writer structure" ]
impl crate :: Writable for ALRMBR { } # [ doc = "alarm B register" ]
pub mod alrmbr { # [ doc = "Reader of register ALRMBR" ]
pub type R = crate :: R < u32 , super :: ALRMBR > ; # [ doc = "Writer for register ALRMBR" ]
pub type W = crate :: W < u32 , super :: ALRMBR > ; # [ doc = "Register ALRMBR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ALRMBR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alarm B date mask\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSK4_A { # [ doc = "0: Alarm set if the date/day match" ]
MASK = 0 , # [ doc = "1: Date/day don\u{2019}t care in Alarm comparison" ]
NOTMASK = 1 } impl From < MSK4_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSK4_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSK4`" ]
pub type MSK4_R = crate :: R < bool , MSK4_A > ; impl MSK4_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSK4_A { match self . bits { false => MSK4_A :: MASK , true => MSK4_A :: NOTMASK } } # [ doc = "Checks if the value of the field is `MASK`" ]
# [ inline ( always ) ]
pub fn is_mask ( & self ) -> bool { * self == MSK4_A :: MASK } # [ doc = "Checks if the value of the field is `NOTMASK`" ]
# [ inline ( always ) ]
pub fn is_not_mask ( & self ) -> bool { * self == MSK4_A :: NOTMASK } } # [ doc = "Write proxy for field `MSK4`" ]
pub struct MSK4_W < 'a > { w : & 'a mut W , } impl < 'a > MSK4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Week day selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum WDSEL_A { # [ doc = "0: DU\\[3:0\\]
represents the date units" ]
DATEUNITS = 0 , # [ doc = "1: DU\\[3:0\\]
represents the week day. DT\\[1:0\\]
is don\u{2019}t care." ]
WEEKDAY = 1 } impl From < WDSEL_A > for bool { # [ inline ( always ) ]
fn from ( variant : WDSEL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `WDSEL`" ]
pub type WDSEL_R = crate :: R < bool , WDSEL_A > ; impl WDSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> WDSEL_A { match self . bits { false => WDSEL_A :: DATEUNITS , true => WDSEL_A :: WEEKDAY } } # [ doc = "Checks if the value of the field is `DATEUNITS`" ]
# [ inline ( always ) ]
pub fn is_date_units ( & self ) -> bool { * self == WDSEL_A :: DATEUNITS } # [ doc = "Checks if the value of the field is `WEEKDAY`" ]
# [ inline ( always ) ]
pub fn is_week_day ( & self ) -> bool { * self == WDSEL_A :: WEEKDAY } } # [ doc = "Write proxy for field `WDSEL`" ]
pub struct WDSEL_W < 'a > { w : & 'a mut W , } impl < 'a > WDSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : WDSEL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DU\\[3:0\\]
represents the date units" ]
# [ inline ( always ) ]
pub fn date_units ( self ) -> & 'a mut W { self . variant ( WDSEL_A :: DATEUNITS ) } # [ doc = "DU\\[3:0\\]
represents the week day. DT\\[1:0\\]
is don\u{2019}t care." ]
# [ inline ( always ) ]
pub fn week_day ( self ) -> & 'a mut W { self . variant ( WDSEL_A :: WEEKDAY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `DT`" ]
pub type DT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DT`" ]
pub struct DT_W < 'a > { w : & 'a mut W , } impl < 'a > DT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DU`" ]
pub type DU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DU`" ]
pub struct DU_W < 'a > { w : & 'a mut W , } impl < 'a > DU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alarm B hours mask" ]
pub type MSK3_A = MSK4_A ; # [ doc = "Reader of field `MSK3`" ]
pub type MSK3_R = crate :: R < bool , MSK4_A > ; # [ doc = "Write proxy for field `MSK3`" ]
pub struct MSK3_W < 'a > { w : & 'a mut W , } impl < 'a > MSK3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "AM/PM notation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PM_A { # [ doc = "0: AM or 24-hour format" ]
AM = 0 , # [ doc = "1: PM" ]
PM = 1 } impl From < PM_A > for bool { # [ inline ( always ) ]
fn from ( variant : PM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PM`" ]
pub type PM_R = crate :: R < bool , PM_A > ; impl PM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PM_A { match self . bits { false => PM_A :: AM , true => PM_A :: PM } } # [ doc = "Checks if the value of the field is `AM`" ]
# [ inline ( always ) ]
pub fn is_am ( & self ) -> bool { * self == PM_A :: AM } # [ doc = "Checks if the value of the field is `PM`" ]
# [ inline ( always ) ]
pub fn is_pm ( & self ) -> bool { * self == PM_A :: PM } } # [ doc = "Write proxy for field `PM`" ]
pub struct PM_W < 'a > { w : & 'a mut W , } impl < 'a > PM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "AM or 24-hour format" ]
# [ inline ( always ) ]
pub fn am ( self ) -> & 'a mut W { self . variant ( PM_A :: AM ) } # [ doc = "PM" ]
# [ inline ( always ) ]
pub fn pm ( self ) -> & 'a mut W { self . variant ( PM_A :: PM ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `HT`" ]
pub type HT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HT`" ]
pub struct HT_W < 'a > { w : & 'a mut W , } impl < 'a > HT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Reader of field `HU`" ]
pub type HU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HU`" ]
pub struct HU_W < 'a > { w : & 'a mut W , } impl < 'a > HU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alarm B minutes mask" ]
pub type MSK2_A = MSK4_A ; # [ doc = "Reader of field `MSK2`" ]
pub type MSK2_R = crate :: R < bool , MSK4_A > ; # [ doc = "Write proxy for field `MSK2`" ]
pub struct MSK2_W < 'a > { w : & 'a mut W , } impl < 'a > MSK2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `MNT`" ]
pub type MNT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MNT`" ]
pub struct MNT_W < 'a > { w : & 'a mut W , } impl < 'a > MNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Reader of field `MNU`" ]
pub type MNU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MNU`" ]
pub struct MNU_W < 'a > { w : & 'a mut W , } impl < 'a > MNU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alarm B seconds mask" ]
pub type MSK1_A = MSK4_A ; # [ doc = "Reader of field `MSK1`" ]
pub type MSK1_R = crate :: R < bool , MSK4_A > ; # [ doc = "Write proxy for field `MSK1`" ]
pub struct MSK1_W < 'a > { w : & 'a mut W , } impl < 'a > MSK1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSK1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Alarm set if the date/day match" ]
# [ inline ( always ) ]
pub fn mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: MASK ) } # [ doc = "Date/day don\u{2019}t care in Alarm comparison" ]
# [ inline ( always ) ]
pub fn not_mask ( self ) -> & 'a mut W { self . variant ( MSK4_A :: NOTMASK ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `ST`" ]
pub type ST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ST`" ]
pub struct ST_W < 'a > { w : & 'a mut W , } impl < 'a > ST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `SU`" ]
pub type SU_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SU`" ]
pub struct SU_W < 'a > { w : & 'a mut W , } impl < 'a > SU_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bit 31 - Alarm B date mask" ]
# [ inline ( always ) ]
pub fn msk4 ( & self ) -> MSK4_R { MSK4_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Week day selection" ]
# [ inline ( always ) ]
pub fn wdsel ( & self ) -> WDSEL_R { WDSEL_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bits 28:29 - Date tens in BCD format" ]
# [ inline ( always ) ]
pub fn dt ( & self ) -> DT_R { DT_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - Date units or day in BCD format" ]
# [ inline ( always ) ]
pub fn du ( & self ) -> DU_R { DU_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bit 23 - Alarm B hours mask" ]
# [ inline ( always ) ]
pub fn msk3 ( & self ) -> MSK3_R { MSK3_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - AM/PM notation" ]
# [ inline ( always ) ]
pub fn pm ( & self ) -> PM_R { PM_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bits 20:21 - Hour tens in BCD format" ]
# [ inline ( always ) ]
pub fn ht ( & self ) -> HT_R { HT_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:19 - Hour units in BCD format" ]
# [ inline ( always ) ]
pub fn hu ( & self ) -> HU_R { HU_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Alarm B minutes mask" ]
# [ inline ( always ) ]
pub fn msk2 ( & self ) -> MSK2_R { MSK2_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Minute tens in BCD format" ]
# [ inline ( always ) ]
pub fn mnt ( & self ) -> MNT_R { MNT_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bits 8:11 - Minute units in BCD format" ]
# [ inline ( always ) ]
pub fn mnu ( & self ) -> MNU_R { MNU_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 7 - Alarm B seconds mask" ]
# [ inline ( always ) ]
pub fn msk1 ( & self ) -> MSK1_R { MSK1_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Second tens in BCD format" ]
# [ inline ( always ) ]
pub fn st ( & self ) -> ST_R { ST_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:3 - Second units in BCD format" ]
# [ inline ( always ) ]
pub fn su ( & self ) -> SU_R { SU_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bit 31 - Alarm B date mask" ]
# [ inline ( always ) ]
pub fn msk4 ( & mut self ) -> MSK4_W { MSK4_W { w : self } } # [ doc = "Bit 30 - Week day selection" ]
# [ inline ( always ) ]
pub fn wdsel ( & mut self ) -> WDSEL_W { WDSEL_W { w : self } } # [ doc = "Bits 28:29 - Date tens in BCD format" ]
# [ inline ( always ) ]
pub fn dt ( & mut self ) -> DT_W { DT_W { w : self } } # [ doc = "Bits 24:27 - Date units or day in BCD format" ]
# [ inline ( always ) ]
pub fn du ( & mut self ) -> DU_W { DU_W { w : self } } # [ doc = "Bit 23 - Alarm B hours mask" ]
# [ inline ( always ) ]
pub fn msk3 ( & mut self ) -> MSK3_W { MSK3_W { w : self } } # [ doc = "Bit 22 - AM/PM notation" ]
# [ inline ( always ) ]
pub fn pm ( & mut self ) -> PM_W { PM_W { w : self } } # [ doc = "Bits 20:21 - Hour tens in BCD format" ]
# [ inline ( always ) ]
pub fn ht ( & mut self ) -> HT_W { HT_W { w : self } } # [ doc = "Bits 16:19 - Hour units in BCD format" ]
# [ inline ( always ) ]
pub fn hu ( & mut self ) -> HU_W { HU_W { w : self } } # [ doc = "Bit 15 - Alarm B minutes mask" ]
# [ inline ( always ) ]
pub fn msk2 ( & mut self ) -> MSK2_W { MSK2_W { w : self } } # [ doc = "Bits 12:14 - Minute tens in BCD format" ]
# [ inline ( always ) ]
pub fn mnt ( & mut self ) -> MNT_W { MNT_W { w : self } } # [ doc = "Bits 8:11 - Minute units in BCD format" ]
# [ inline ( always ) ]
pub fn mnu ( & mut self ) -> MNU_W { MNU_W { w : self } } # [ doc = "Bit 7 - Alarm B seconds mask" ]
# [ inline ( always ) ]
pub fn msk1 ( & mut self ) -> MSK1_W { MSK1_W { w : self } } # [ doc = "Bits 4:6 - Second tens in BCD format" ]
# [ inline ( always ) ]
pub fn st ( & mut self ) -> ST_W { ST_W { w : self } } # [ doc = "Bits 0:3 - Second units in BCD format" ]
# [ inline ( always ) ]
pub fn su ( & mut self ) -> SU_W { SU_W { w : self } } } } # [ doc = "write protection register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wpr](wpr) module" ]
pub type WPR = crate :: Reg < u32 , _WPR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _WPR ; # [ doc = "`write(|w| ..)` method takes [wpr::W](wpr::W) writer structure" ]
impl crate :: Writable for WPR { } # [ doc = "write protection register" ]
pub mod wpr { # [ doc = "Writer for register WPR" ]
pub type W = crate :: W < u32 , super :: WPR > ; # [ doc = "Register WPR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: WPR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `KEY`" ]
pub struct KEY_W < 'a > { w : & 'a mut W , } impl < 'a > KEY_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl W { # [ doc = "Bits 0:7 - Write protection key" ]
# [ inline ( always ) ]
pub fn key ( & mut self ) -> KEY_W { KEY_W { w : self } } } } # [ doc = "sub second register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssr](ssr) module" ]
pub type SSR = crate :: Reg < u32 , _SSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SSR ; # [ doc = "`read()` method returns [ssr::R](ssr::R) reader structure" ]
impl crate :: Readable for SSR { } # [ doc = "sub second register" ]
pub mod ssr { # [ doc = "Reader of register SSR" ]
pub type R = crate :: R < u32 , super :: SSR > ; # [ doc = "Reader of field `SS`" ]
pub type SS_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - Sub second value" ]
# [ inline ( always ) ]
pub fn ss ( & self ) -> SS_R { SS_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "shift control register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shiftr](shiftr) module" ]
pub type SHIFTR = crate :: Reg < u32 , _SHIFTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SHIFTR ; # [ doc = "`write(|w| ..)` method takes [shiftr::W](shiftr::W) writer structure" ]
impl crate :: Writable for SHIFTR { } # [ doc = "shift control register" ]
pub mod shiftr { # [ doc = "Writer for register SHIFTR" ]
pub type W = crate :: W < u32 , super :: SHIFTR > ; # [ doc = "Register SHIFTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SHIFTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Add one second\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADD1S_AW { # [ doc = "1: Add one second to the clock/calendar" ]
ADD1 = 1 } impl From < ADD1S_AW > for bool { # [ inline ( always ) ]
fn from ( variant : ADD1S_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `ADD1S`" ]
pub struct ADD1S_W < 'a > { w : & 'a mut W , } impl < 'a > ADD1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADD1S_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Add one second to the clock/calendar" ]
# [ inline ( always ) ]
pub fn add1 ( self ) -> & 'a mut W { self . variant ( ADD1S_AW :: ADD1 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Write proxy for field `SUBFS`" ]
pub struct SUBFS_W < 'a > { w : & 'a mut W , } impl < 'a > SUBFS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x7fff ) | ( ( value as u32 ) & 0x7fff ) ; self . w } } impl W { # [ doc = "Bit 31 - Add one second" ]
# [ inline ( always ) ]
pub fn add1s ( & mut self ) -> ADD1S_W { ADD1S_W { w : self } } # [ doc = "Bits 0:14 - Subtract a fraction of a second" ]
# [ inline ( always ) ]
pub fn subfs ( & mut self ) -> SUBFS_W { SUBFS_W { w : self } } } } # [ doc = "time stamp time register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tstr](tstr) module" ]
pub type TSTR = crate :: Reg < u32 , _TSTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TSTR ; # [ doc = "`read()` method returns [tstr::R](tstr::R) reader structure" ]
impl crate :: Readable for TSTR { } # [ doc = "time stamp time register" ]
pub mod tstr { # [ doc = "Reader of register TSTR" ]
pub type R = crate :: R < u32 , super :: TSTR > ; # [ doc = "Reader of field `SU`" ]
pub type SU_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `ST`" ]
pub type ST_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `MNU`" ]
pub type MNU_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `MNT`" ]
pub type MNT_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `HU`" ]
pub type HU_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `HT`" ]
pub type HT_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `PM`" ]
pub type PM_R = crate :: R < bool , bool > ; impl R { # [ doc = "Bits 0:3 - Second units in BCD format" ]
# [ inline ( always ) ]
pub fn su ( & self ) -> SU_R { SU_R :: new ( ( self . bits & 0x0f ) as u8 ) } # [ doc = "Bits 4:6 - Second tens in BCD format" ]
# [ inline ( always ) ]
pub fn st ( & self ) -> ST_R { ST_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 8:11 - Minute units in BCD format" ]
# [ inline ( always ) ]
pub fn mnu ( & self ) -> MNU_R { MNU_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:14 - Minute tens in BCD format" ]
# [ inline ( always ) ]
pub fn mnt ( & self ) -> MNT_R { MNT_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bits 16:19 - Hour units in BCD format" ]
# [ inline ( always ) ]
pub fn hu ( & self ) -> HU_R { HU_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:21 - Hour tens in BCD format" ]
# [ inline ( always ) ]
pub fn ht ( & self ) -> HT_R { HT_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bit 22 - AM/PM notation" ]
# [ inline ( always ) ]
pub fn pm ( & self ) -> PM_R { PM_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } } } # [ doc = "time stamp date register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tsdr](tsdr) module" ]
pub type TSDR = crate :: Reg < u32 , _TSDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TSDR ; # [ doc = "`read()` method returns [tsdr::R](tsdr::R) reader structure" ]
impl crate :: Readable for TSDR { } # [ doc = "time stamp date register" ]
pub mod tsdr { # [ doc = "Reader of register TSDR" ]
pub type R = crate :: R < u32 , super :: TSDR > ; # [ doc = "Reader of field `WDU`" ]
pub type WDU_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `MT`" ]
pub type MT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `MU`" ]
pub type MU_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DT`" ]
pub type DT_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `DU`" ]
pub type DU_R = crate :: R < u8 , u8 > ; impl R { # [ doc = "Bits 13:15 - Week day units" ]
# [ inline ( always ) ]
pub fn wdu ( & self ) -> WDU_R { WDU_R :: new ( ( ( self . bits >> 13 ) & 0x07 ) as u8 ) } # [ doc = "Bit 12 - Month tens in BCD format" ]
# [ inline ( always ) ]
pub fn mt ( & self ) -> MT_R { MT_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:11 - Month units in BCD format" ]
# [ inline ( always ) ]
pub fn mu ( & self ) -> MU_R { MU_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:5 - Date tens in BCD format" ]
# [ inline ( always ) ]
pub fn dt ( & self ) -> DT_R { DT_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:3 - Date units in BCD format" ]
# [ inline ( always ) ]
pub fn du ( & self ) -> DU_R { DU_R :: new ( ( self . bits & 0x0f ) as u8 ) } } } # [ doc = "timestamp sub second register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tsssr](tsssr) module" ]
pub type TSSSR = crate :: Reg < u32 , _TSSSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TSSSR ; # [ doc = "`read()` method returns [tsssr::R](tsssr::R) reader structure" ]
impl crate :: Readable for TSSSR { } # [ doc = "timestamp sub second register" ]
pub mod tsssr { # [ doc = "Reader of register TSSSR" ]
pub type R = crate :: R < u32 , super :: TSSSR > ; # [ doc = "Reader of field `SS`" ]
pub type SS_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - Sub second value" ]
# [ inline ( always ) ]
pub fn ss ( & self ) -> SS_R { SS_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "calibration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calr](calr) module" ]
pub type CALR = crate :: Reg < u32 , _CALR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CALR ; # [ doc = "`read()` method returns [calr::R](calr::R) reader structure" ]
impl crate :: Readable for CALR { } # [ doc = "`write(|w| ..)` method takes [calr::W](calr::W) writer structure" ]
impl crate :: Writable for CALR { } # [ doc = "calibration register" ]
pub mod calr { # [ doc = "Reader of register CALR" ]
pub type R = crate :: R < u32 , super :: CALR > ; # [ doc = "Writer for register CALR" ]
pub type W = crate :: W < u32 , super :: CALR > ; # [ doc = "Register CALR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CALR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Increase frequency of RTC by 488.5 ppm\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CALP_A { # [ doc = "0: No RTCCLK pulses are added" ]
NOCHANGE = 0 , # [ doc = "1: One RTCCLK pulse is effectively inserted every 2^11 pulses (frequency increased by 488.5 ppm)" ]
INCREASEFREQ = 1 } impl From < CALP_A > for bool { # [ inline ( always ) ]
fn from ( variant : CALP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CALP`" ]
pub type CALP_R = crate :: R < bool , CALP_A > ; impl CALP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CALP_A { match self . bits { false => CALP_A :: NOCHANGE , true => CALP_A :: INCREASEFREQ } } # [ doc = "Checks if the value of the field is `NOCHANGE`" ]
# [ inline ( always ) ]
pub fn is_no_change ( & self ) -> bool { * self == CALP_A :: NOCHANGE } # [ doc = "Checks if the value of the field is `INCREASEFREQ`" ]
# [ inline ( always ) ]
pub fn is_increase_freq ( & self ) -> bool { * self == CALP_A :: INCREASEFREQ } } # [ doc = "Write proxy for field `CALP`" ]
pub struct CALP_W < 'a > { w : & 'a mut W , } impl < 'a > CALP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CALP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No RTCCLK pulses are added" ]
# [ inline ( always ) ]
pub fn no_change ( self ) -> & 'a mut W { self . variant ( CALP_A :: NOCHANGE ) } # [ doc = "One RTCCLK pulse is effectively inserted every 2^11 pulses (frequency increased by 488.5 ppm)" ]
# [ inline ( always ) ]
pub fn increase_freq ( self ) -> & 'a mut W { self . variant ( CALP_A :: INCREASEFREQ ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Use an 8-second calibration cycle period\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CALW8_A { # [ doc = "1: When CALW8 is set to \u{2018}1\u{2019}, the 8-second calibration cycle period is selected" ]
EIGHT_SECOND = 1 } impl From < CALW8_A > for bool { # [ inline ( always ) ]
fn from ( variant : CALW8_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CALW8`" ]
pub type CALW8_R = crate :: R < bool , CALW8_A > ; impl CALW8_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CALW8_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CALW8_A :: EIGHT_SECOND ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `EIGHT_SECOND`" ]
# [ inline ( always ) ]
pub fn is_eight_second ( & self ) -> bool { * self == CALW8_A :: EIGHT_SECOND } } # [ doc = "Write proxy for field `CALW8`" ]
pub struct CALW8_W < 'a > { w : & 'a mut W , } impl < 'a > CALW8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CALW8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "When CALW8 is set to \u{2018}1\u{2019}, the 8-second calibration cycle period is selected" ]
# [ inline ( always ) ]
pub fn eight_second ( self ) -> & 'a mut W { self . variant ( CALW8_A :: EIGHT_SECOND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Use a 16-second calibration cycle period\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CALW16_A { # [ doc = "1: When CALW16 is set to \u{2018}1\u{2019}, the 16-second calibration cycle period is selected.This bit must not be set to \u{2018}1\u{2019} if CALW8=1" ]
SIXTEEN_SECOND = 1 } impl From < CALW16_A > for bool { # [ inline ( always ) ]
fn from ( variant : CALW16_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CALW16`" ]
pub type CALW16_R = crate :: R < bool , CALW16_A > ; impl CALW16_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CALW16_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CALW16_A :: SIXTEEN_SECOND ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `SIXTEEN_SECOND`" ]
# [ inline ( always ) ]
pub fn is_sixteen_second ( & self ) -> bool { * self == CALW16_A :: SIXTEEN_SECOND } } # [ doc = "Write proxy for field `CALW16`" ]
pub struct CALW16_W < 'a > { w : & 'a mut W , } impl < 'a > CALW16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CALW16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "When CALW16 is set to \u{2018}1\u{2019}, the 16-second calibration cycle period is selected.This bit must not be set to \u{2018}1\u{2019} if CALW8=1" ]
# [ inline ( always ) ]
pub fn sixteen_second ( self ) -> & 'a mut W { self . variant ( CALW16_A :: SIXTEEN_SECOND ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `CALM`" ]
pub type CALM_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CALM`" ]
pub struct CALM_W < 'a > { w : & 'a mut W , } impl < 'a > CALM_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01ff ) | ( ( value as u32 ) & 0x01ff ) ; self . w } } impl R { # [ doc = "Bit 15 - Increase frequency of RTC by 488.5 ppm" ]
# [ inline ( always ) ]
pub fn calp ( & self ) -> CALP_R { CALP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Use an 8-second calibration cycle period" ]
# [ inline ( always ) ]
pub fn calw8 ( & self ) -> CALW8_R { CALW8_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Use a 16-second calibration cycle period" ]
# [ inline ( always ) ]
pub fn calw16 ( & self ) -> CALW16_R { CALW16_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:8 - Calibration minus" ]
# [ inline ( always ) ]
pub fn calm ( & self ) -> CALM_R { CALM_R :: new ( ( self . bits & 0x01ff ) as u16 ) } } impl W { # [ doc = "Bit 15 - Increase frequency of RTC by 488.5 ppm" ]
# [ inline ( always ) ]
pub fn calp ( & mut self ) -> CALP_W { CALP_W { w : self } } # [ doc = "Bit 14 - Use an 8-second calibration cycle period" ]
# [ inline ( always ) ]
pub fn calw8 ( & mut self ) -> CALW8_W { CALW8_W { w : self } } # [ doc = "Bit 13 - Use a 16-second calibration cycle period" ]
# [ inline ( always ) ]
pub fn calw16 ( & mut self ) -> CALW16_W { CALW16_W { w : self } } # [ doc = "Bits 0:8 - Calibration minus" ]
# [ inline ( always ) ]
pub fn calm ( & mut self ) -> CALM_W { CALM_W { w : self } } } } # [ doc = "tamper and alternate function configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tafcr](tafcr) module" ]
pub type TAFCR = crate :: Reg < u32 , _TAFCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TAFCR ; # [ doc = "`read()` method returns [tafcr::R](tafcr::R) reader structure" ]
impl crate :: Readable for TAFCR { } # [ doc = "`write(|w| ..)` method takes [tafcr::W](tafcr::W) writer structure" ]
impl crate :: Writable for TAFCR { } # [ doc = "tamper and alternate function configuration register" ]
pub mod tafcr { # [ doc = "Reader of register TAFCR" ]
pub type R = crate :: R < u32 , super :: TAFCR > ; # [ doc = "Writer for register TAFCR" ]
pub type W = crate :: W < u32 , super :: TAFCR > ; # [ doc = "Register TAFCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: TAFCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Tamper 1 detection enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TAMP1E_A { # [ doc = "0: RTC_TAMPx input detection disabled" ]
DISABLED = 0 , # [ doc = "1: RTC_TAMPx input detection enabled" ]
ENABLED = 1 } impl From < TAMP1E_A > for bool { # [ inline ( always ) ]
fn from ( variant : TAMP1E_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TAMP1E`" ]
pub type TAMP1E_R = crate :: R < bool , TAMP1E_A > ; impl TAMP1E_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMP1E_A { match self . bits { false => TAMP1E_A :: DISABLED , true => TAMP1E_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TAMP1E_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TAMP1E_A :: ENABLED } } # [ doc = "Write proxy for field `TAMP1E`" ]
pub struct TAMP1E_W < 'a > { w : & 'a mut W , } impl < 'a > TAMP1E_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMP1E_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RTC_TAMPx input detection disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TAMP1E_A :: DISABLED ) } # [ doc = "RTC_TAMPx input detection enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TAMP1E_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Active level for tamper 1\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TAMP1TRG_A { # [ doc = "0: If TAMPFLT = 00: RTC_TAMPx input rising edge triggers a tamper detection event. If TAMPFLT =\u{338} 00: RTC_TAMPx input staying low triggers a tamper detection event." ]
RISINGEDGE = 0 , # [ doc = "1: If TAMPFLT = 00: RTC_TAMPx input staying high triggers a tamper detection event. If TAMPFLT =\u{338} 00: RTC_TAMPx input falling edge triggers a tamper detection event" ]
FALLINGEDGE = 1 } impl From < TAMP1TRG_A > for bool { # [ inline ( always ) ]
fn from ( variant : TAMP1TRG_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TAMP1TRG`" ]
pub type TAMP1TRG_R = crate :: R < bool , TAMP1TRG_A > ; impl TAMP1TRG_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMP1TRG_A { match self . bits { false => TAMP1TRG_A :: RISINGEDGE , true => TAMP1TRG_A :: FALLINGEDGE } } # [ doc = "Checks if the value of the field is `RISINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_rising_edge ( & self ) -> bool { * self == TAMP1TRG_A :: RISINGEDGE } # [ doc = "Checks if the value of the field is `FALLINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_falling_edge ( & self ) -> bool { * self == TAMP1TRG_A :: FALLINGEDGE } } # [ doc = "Write proxy for field `TAMP1TRG`" ]
pub struct TAMP1TRG_W < 'a > { w : & 'a mut W , } impl < 'a > TAMP1TRG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMP1TRG_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If TAMPFLT = 00: RTC_TAMPx input rising edge triggers a tamper detection event. If TAMPFLT =\u{338} 00: RTC_TAMPx input staying low triggers a tamper detection event." ]
# [ inline ( always ) ]
pub fn rising_edge ( self ) -> & 'a mut W { self . variant ( TAMP1TRG_A :: RISINGEDGE ) } # [ doc = "If TAMPFLT = 00: RTC_TAMPx input staying high triggers a tamper detection event. If TAMPFLT =\u{338} 00: RTC_TAMPx input falling edge triggers a tamper detection event" ]
# [ inline ( always ) ]
pub fn falling_edge ( self ) -> & 'a mut W { self . variant ( TAMP1TRG_A :: FALLINGEDGE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Tamper interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TAMPIE_A { # [ doc = "0: Tamper interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Tamper interrupt enabled" ]
ENABLED = 1 } impl From < TAMPIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TAMPIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TAMPIE`" ]
pub type TAMPIE_R = crate :: R < bool , TAMPIE_A > ; impl TAMPIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMPIE_A { match self . bits { false => TAMPIE_A :: DISABLED , true => TAMPIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TAMPIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TAMPIE_A :: ENABLED } } # [ doc = "Write proxy for field `TAMPIE`" ]
pub struct TAMPIE_W < 'a > { w : & 'a mut W , } impl < 'a > TAMPIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMPIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Tamper interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TAMPIE_A :: DISABLED ) } # [ doc = "Tamper interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TAMPIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Tamper 2 detection enable" ]
pub type TAMP2E_A = TAMP1E_A ; # [ doc = "Reader of field `TAMP2E`" ]
pub type TAMP2E_R = crate :: R < bool , TAMP1E_A > ; # [ doc = "Write proxy for field `TAMP2E`" ]
pub struct TAMP2E_W < 'a > { w : & 'a mut W , } impl < 'a > TAMP2E_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMP2E_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "RTC_TAMPx input detection disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TAMP1E_A :: DISABLED ) } # [ doc = "RTC_TAMPx input detection enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TAMP1E_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Active level for tamper 2" ]
pub type TAMP2TRG_A = TAMP1TRG_A ; # [ doc = "Reader of field `TAMP2TRG`" ]
pub type TAMP2TRG_R = crate :: R < bool , TAMP1TRG_A > ; # [ doc = "Write proxy for field `TAMP2TRG`" ]
pub struct TAMP2TRG_W < 'a > { w : & 'a mut W , } impl < 'a > TAMP2TRG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMP2TRG_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If TAMPFLT = 00: RTC_TAMPx input rising edge triggers a tamper detection event. If TAMPFLT =\u{338} 00: RTC_TAMPx input staying low triggers a tamper detection event." ]
# [ inline ( always ) ]
pub fn rising_edge ( self ) -> & 'a mut W { self . variant ( TAMP1TRG_A :: RISINGEDGE ) } # [ doc = "If TAMPFLT = 00: RTC_TAMPx input staying high triggers a tamper detection event. If TAMPFLT =\u{338} 00: RTC_TAMPx input falling edge triggers a tamper detection event" ]
# [ inline ( always ) ]
pub fn falling_edge ( self ) -> & 'a mut W { self . variant ( TAMP1TRG_A :: FALLINGEDGE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Activate timestamp on tamper detection event\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TAMPTS_A { # [ doc = "0: Tamper detection event does not cause a timestamp to be saved" ]
NOSAVE = 0 , # [ doc = "1: Save timestamp on tamper detection event" ]
SAVE = 1 } impl From < TAMPTS_A > for bool { # [ inline ( always ) ]
fn from ( variant : TAMPTS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TAMPTS`" ]
pub type TAMPTS_R = crate :: R < bool , TAMPTS_A > ; impl TAMPTS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMPTS_A { match self . bits { false => TAMPTS_A :: NOSAVE , true => TAMPTS_A :: SAVE } } # [ doc = "Checks if the value of the field is `NOSAVE`" ]
# [ inline ( always ) ]
pub fn is_no_save ( & self ) -> bool { * self == TAMPTS_A :: NOSAVE } # [ doc = "Checks if the value of the field is `SAVE`" ]
# [ inline ( always ) ]
pub fn is_save ( & self ) -> bool { * self == TAMPTS_A :: SAVE } } # [ doc = "Write proxy for field `TAMPTS`" ]
pub struct TAMPTS_W < 'a > { w : & 'a mut W , } impl < 'a > TAMPTS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMPTS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Tamper detection event does not cause a timestamp to be saved" ]
# [ inline ( always ) ]
pub fn no_save ( self ) -> & 'a mut W { self . variant ( TAMPTS_A :: NOSAVE ) } # [ doc = "Save timestamp on tamper detection event" ]
# [ inline ( always ) ]
pub fn save ( self ) -> & 'a mut W { self . variant ( TAMPTS_A :: SAVE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Tamper sampling frequency\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum TAMPFREQ_A { # [ doc = "0: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)" ]
DIV32768 = 0 , # [ doc = "1: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)" ]
DIV16384 = 1 , # [ doc = "2: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)" ]
DIV8192 = 2 , # [ doc = "3: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)" ]
DIV4096 = 3 , # [ doc = "4: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)" ]
DIV2048 = 4 , # [ doc = "5: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)" ]
DIV1024 = 5 , # [ doc = "6: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)" ]
DIV512 = 6 , # [ doc = "7: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)" ]
DIV256 = 7 } impl From < TAMPFREQ_A > for u8 { # [ inline ( always ) ]
fn from ( variant : TAMPFREQ_A ) -> Self { variant as _ } } # [ doc = "Reader of field `TAMPFREQ`" ]
pub type TAMPFREQ_R = crate :: R < u8 , TAMPFREQ_A > ; impl TAMPFREQ_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMPFREQ_A { match self . bits { 0 => TAMPFREQ_A :: DIV32768 , 1 => TAMPFREQ_A :: DIV16384 , 2 => TAMPFREQ_A :: DIV8192 , 3 => TAMPFREQ_A :: DIV4096 , 4 => TAMPFREQ_A :: DIV2048 , 5 => TAMPFREQ_A :: DIV1024 , 6 => TAMPFREQ_A :: DIV512 , 7 => TAMPFREQ_A :: DIV256 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV32768`" ]
# [ inline ( always ) ]
pub fn is_div32768 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV32768 } # [ doc = "Checks if the value of the field is `DIV16384`" ]
# [ inline ( always ) ]
pub fn is_div16384 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV16384 } # [ doc = "Checks if the value of the field is `DIV8192`" ]
# [ inline ( always ) ]
pub fn is_div8192 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV8192 } # [ doc = "Checks if the value of the field is `DIV4096`" ]
# [ inline ( always ) ]
pub fn is_div4096 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV4096 } # [ doc = "Checks if the value of the field is `DIV2048`" ]
# [ inline ( always ) ]
pub fn is_div2048 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV2048 } # [ doc = "Checks if the value of the field is `DIV1024`" ]
# [ inline ( always ) ]
pub fn is_div1024 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV1024 } # [ doc = "Checks if the value of the field is `DIV512`" ]
# [ inline ( always ) ]
pub fn is_div512 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV512 } # [ doc = "Checks if the value of the field is `DIV256`" ]
# [ inline ( always ) ]
pub fn is_div256 ( & self ) -> bool { * self == TAMPFREQ_A :: DIV256 } } # [ doc = "Write proxy for field `TAMPFREQ`" ]
pub struct TAMPFREQ_W < 'a > { w : & 'a mut W , } impl < 'a > TAMPFREQ_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMPFREQ_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div32768 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV32768 ) } # [ doc = "RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div16384 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV16384 ) } # [ doc = "RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div8192 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV8192 ) } # [ doc = "RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div4096 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV4096 ) } # [ doc = "RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div2048 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV2048 ) } # [ doc = "RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div1024 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV1024 ) } # [ doc = "RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div512 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV512 ) } # [ doc = "RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)" ]
# [ inline ( always ) ]
pub fn div256 ( self ) -> & 'a mut W { self . variant ( TAMPFREQ_A :: DIV256 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 8 ) ) | ( ( ( value as u32 ) & 0x07 ) << 8 ) ; self . w } } # [ doc = "Tamper filter count\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum TAMPFLT_A { # [ doc = "0: Tamper event is activated on edge of RTC_TAMPx input transitions to the active level (no internal pull-up on RTC_TAMPx input)" ]
IMMEDIATE = 0 , # [ doc = "1: Tamper event is activated after 2 consecutive samples at the active level" ]
SAMPLES2 = 1 , # [ doc = "2: Tamper event is activated after 4 consecutive samples at the active level" ]
SAMPLES4 = 2 , # [ doc = "3: Tamper event is activated after 8 consecutive samples at the active level" ]
SAMPLES8 = 3 } impl From < TAMPFLT_A > for u8 { # [ inline ( always ) ]
fn from ( variant : TAMPFLT_A ) -> Self { variant as _ } } # [ doc = "Reader of field `TAMPFLT`" ]
pub type TAMPFLT_R = crate :: R < u8 , TAMPFLT_A > ; impl TAMPFLT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMPFLT_A { match self . bits { 0 => TAMPFLT_A :: IMMEDIATE , 1 => TAMPFLT_A :: SAMPLES2 , 2 => TAMPFLT_A :: SAMPLES4 , 3 => TAMPFLT_A :: SAMPLES8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `IMMEDIATE`" ]
# [ inline ( always ) ]
pub fn is_immediate ( & self ) -> bool { * self == TAMPFLT_A :: IMMEDIATE } # [ doc = "Checks if the value of the field is `SAMPLES2`" ]
# [ inline ( always ) ]
pub fn is_samples2 ( & self ) -> bool { * self == TAMPFLT_A :: SAMPLES2 } # [ doc = "Checks if the value of the field is `SAMPLES4`" ]
# [ inline ( always ) ]
pub fn is_samples4 ( & self ) -> bool { * self == TAMPFLT_A :: SAMPLES4 } # [ doc = "Checks if the value of the field is `SAMPLES8`" ]
# [ inline ( always ) ]
pub fn is_samples8 ( & self ) -> bool { * self == TAMPFLT_A :: SAMPLES8 } } # [ doc = "Write proxy for field `TAMPFLT`" ]
pub struct TAMPFLT_W < 'a > { w : & 'a mut W , } impl < 'a > TAMPFLT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMPFLT_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Tamper event is activated on edge of RTC_TAMPx input transitions to the active level (no internal pull-up on RTC_TAMPx input)" ]
# [ inline ( always ) ]
pub fn immediate ( self ) -> & 'a mut W { self . variant ( TAMPFLT_A :: IMMEDIATE ) } # [ doc = "Tamper event is activated after 2 consecutive samples at the active level" ]
# [ inline ( always ) ]
pub fn samples2 ( self ) -> & 'a mut W { self . variant ( TAMPFLT_A :: SAMPLES2 ) } # [ doc = "Tamper event is activated after 4 consecutive samples at the active level" ]
# [ inline ( always ) ]
pub fn samples4 ( self ) -> & 'a mut W { self . variant ( TAMPFLT_A :: SAMPLES4 ) } # [ doc = "Tamper event is activated after 8 consecutive samples at the active level" ]
# [ inline ( always ) ]
pub fn samples8 ( self ) -> & 'a mut W { self . variant ( TAMPFLT_A :: SAMPLES8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 11 ) ) | ( ( ( value as u32 ) & 0x03 ) << 11 ) ; self . w } } # [ doc = "Tamper precharge duration\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum TAMPPRCH_A { # [ doc = "0: 1 RTCCLK cycle" ]
CYCLES1 = 0 , # [ doc = "1: 2 RTCCLK cycles" ]
CYCLES2 = 1 , # [ doc = "2: 4 RTCCLK cycles" ]
CYCLES4 = 2 , # [ doc = "3: 8 RTCCLK cycles" ]
CYCLES8 = 3 } impl From < TAMPPRCH_A > for u8 { # [ inline ( always ) ]
fn from ( variant : TAMPPRCH_A ) -> Self { variant as _ } } # [ doc = "Reader of field `TAMPPRCH`" ]
pub type TAMPPRCH_R = crate :: R < u8 , TAMPPRCH_A > ; impl TAMPPRCH_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMPPRCH_A { match self . bits { 0 => TAMPPRCH_A :: CYCLES1 , 1 => TAMPPRCH_A :: CYCLES2 , 2 => TAMPPRCH_A :: CYCLES4 , 3 => TAMPPRCH_A :: CYCLES8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `CYCLES1`" ]
# [ inline ( always ) ]
pub fn is_cycles1 ( & self ) -> bool { * self == TAMPPRCH_A :: CYCLES1 } # [ doc = "Checks if the value of the field is `CYCLES2`" ]
# [ inline ( always ) ]
pub fn is_cycles2 ( & self ) -> bool { * self == TAMPPRCH_A :: CYCLES2 } # [ doc = "Checks if the value of the field is `CYCLES4`" ]
# [ inline ( always ) ]
pub fn is_cycles4 ( & self ) -> bool { * self == TAMPPRCH_A :: CYCLES4 } # [ doc = "Checks if the value of the field is `CYCLES8`" ]
# [ inline ( always ) ]
pub fn is_cycles8 ( & self ) -> bool { * self == TAMPPRCH_A :: CYCLES8 } } # [ doc = "Write proxy for field `TAMPPRCH`" ]
pub struct TAMPPRCH_W < 'a > { w : & 'a mut W , } impl < 'a > TAMPPRCH_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMPPRCH_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1 RTCCLK cycle" ]
# [ inline ( always ) ]
pub fn cycles1 ( self ) -> & 'a mut W { self . variant ( TAMPPRCH_A :: CYCLES1 ) } # [ doc = "2 RTCCLK cycles" ]
# [ inline ( always ) ]
pub fn cycles2 ( self ) -> & 'a mut W { self . variant ( TAMPPRCH_A :: CYCLES2 ) } # [ doc = "4 RTCCLK cycles" ]
# [ inline ( always ) ]
pub fn cycles4 ( self ) -> & 'a mut W { self . variant ( TAMPPRCH_A :: CYCLES4 ) } # [ doc = "8 RTCCLK cycles" ]
# [ inline ( always ) ]
pub fn cycles8 ( self ) -> & 'a mut W { self . variant ( TAMPPRCH_A :: CYCLES8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 13 ) ) | ( ( ( value as u32 ) & 0x03 ) << 13 ) ; self . w } } # [ doc = "TAMPER pull-up disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TAMPPUDIS_A { # [ doc = "0: Precharge RTC_TAMPx pins before sampling (enable internal pull-up)" ]
ENABLED = 0 , # [ doc = "1: Disable precharge of RTC_TAMPx pins" ]
DISABLED = 1 } impl From < TAMPPUDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : TAMPPUDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TAMPPUDIS`" ]
pub type TAMPPUDIS_R = crate :: R < bool , TAMPPUDIS_A > ; impl TAMPPUDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TAMPPUDIS_A { match self . bits { false => TAMPPUDIS_A :: ENABLED , true => TAMPPUDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TAMPPUDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TAMPPUDIS_A :: DISABLED } } # [ doc = "Write proxy for field `TAMPPUDIS`" ]
pub struct TAMPPUDIS_W < 'a > { w : & 'a mut W , } impl < 'a > TAMPPUDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TAMPPUDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Precharge RTC_TAMPx pins before sampling (enable internal pull-up)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TAMPPUDIS_A :: ENABLED ) } # [ doc = "Disable precharge of RTC_TAMPx pins" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TAMPPUDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "PC13 value\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PC13VALUE_A { # [ doc = "1: If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic high" ]
HIGH = 1 , # [ doc = "0: If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic low" ]
LOW = 0 } impl From < PC13VALUE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PC13VALUE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PC13VALUE`" ]
pub type PC13VALUE_R = crate :: R < bool , PC13VALUE_A > ; impl PC13VALUE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PC13VALUE_A { match self . bits { true => PC13VALUE_A :: HIGH , false => PC13VALUE_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == PC13VALUE_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == PC13VALUE_A :: LOW } } # [ doc = "Write proxy for field `PC13VALUE`" ]
pub struct PC13VALUE_W < 'a > { w : & 'a mut W , } impl < 'a > PC13VALUE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PC13VALUE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( PC13VALUE_A :: HIGH ) } # [ doc = "If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( PC13VALUE_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "PC13 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PC13MODE_A { # [ doc = "0: PCx is controlled by the GPIO configuration Register. Consequently PC15 is floating in Standby mode" ]
FLOATING = 0 , # [ doc = "1: PCx is forced to push-pull output if LSE is disabled" ]
PUSHPULL = 1 } impl From < PC13MODE_A > for bool { # [ inline ( always ) ]
fn from ( variant : PC13MODE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PC13MODE`" ]
pub type PC13MODE_R = crate :: R < bool , PC13MODE_A > ; impl PC13MODE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PC13MODE_A { match self . bits { false => PC13MODE_A :: FLOATING , true => PC13MODE_A :: PUSHPULL } } # [ doc = "Checks if the value of the field is `FLOATING`" ]
# [ inline ( always ) ]
pub fn is_floating ( & self ) -> bool { * self == PC13MODE_A :: FLOATING } # [ doc = "Checks if the value of the field is `PUSHPULL`" ]
# [ inline ( always ) ]
pub fn is_push_pull ( & self ) -> bool { * self == PC13MODE_A :: PUSHPULL } } # [ doc = "Write proxy for field `PC13MODE`" ]
pub struct PC13MODE_W < 'a > { w : & 'a mut W , } impl < 'a > PC13MODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PC13MODE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCx is controlled by the GPIO configuration Register. Consequently PC15 is floating in Standby mode" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PC13MODE_A :: FLOATING ) } # [ doc = "PCx is forced to push-pull output if LSE is disabled" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( PC13MODE_A :: PUSHPULL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "PC14 value" ]
pub type PC14VALUE_A = PC13VALUE_A ; # [ doc = "Reader of field `PC14VALUE`" ]
pub type PC14VALUE_R = crate :: R < bool , PC13VALUE_A > ; # [ doc = "Write proxy for field `PC14VALUE`" ]
pub struct PC14VALUE_W < 'a > { w : & 'a mut W , } impl < 'a > PC14VALUE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PC14VALUE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( PC13VALUE_A :: HIGH ) } # [ doc = "If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( PC13VALUE_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "PC 14 mode" ]
pub type PC14MODE_A = PC13MODE_A ; # [ doc = "Reader of field `PC14MODE`" ]
pub type PC14MODE_R = crate :: R < bool , PC13MODE_A > ; # [ doc = "Write proxy for field `PC14MODE`" ]
pub struct PC14MODE_W < 'a > { w : & 'a mut W , } impl < 'a > PC14MODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PC14MODE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCx is controlled by the GPIO configuration Register. Consequently PC15 is floating in Standby mode" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PC13MODE_A :: FLOATING ) } # [ doc = "PCx is forced to push-pull output if LSE is disabled" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( PC13MODE_A :: PUSHPULL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "PC15 value" ]
pub type PC15VALUE_A = PC13VALUE_A ; # [ doc = "Reader of field `PC15VALUE`" ]
pub type PC15VALUE_R = crate :: R < bool , PC13VALUE_A > ; # [ doc = "Write proxy for field `PC15VALUE`" ]
pub struct PC15VALUE_W < 'a > { w : & 'a mut W , } impl < 'a > PC15VALUE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PC15VALUE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( PC13VALUE_A :: HIGH ) } # [ doc = "If the LSE is disabled and PCxMODE = 1, set PCxVALUE to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( PC13VALUE_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "PC15 mode" ]
pub type PC15MODE_A = PC13MODE_A ; # [ doc = "Reader of field `PC15MODE`" ]
pub type PC15MODE_R = crate :: R < bool , PC13MODE_A > ; # [ doc = "Write proxy for field `PC15MODE`" ]
pub struct PC15MODE_W < 'a > { w : & 'a mut W , } impl < 'a > PC15MODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PC15MODE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PCx is controlled by the GPIO configuration Register. Consequently PC15 is floating in Standby mode" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PC13MODE_A :: FLOATING ) } # [ doc = "PCx is forced to push-pull output if LSE is disabled" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( PC13MODE_A :: PUSHPULL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } impl R { # [ doc = "Bit 0 - Tamper 1 detection enable" ]
# [ inline ( always ) ]
pub fn tamp1e ( & self ) -> TAMP1E_R { TAMP1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Active level for tamper 1" ]
# [ inline ( always ) ]
pub fn tamp1trg ( & self ) -> TAMP1TRG_R { TAMP1TRG_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Tamper interrupt enable" ]
# [ inline ( always ) ]
pub fn tampie ( & self ) -> TAMPIE_R { TAMPIE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Tamper 2 detection enable" ]
# [ inline ( always ) ]
pub fn tamp2e ( & self ) -> TAMP2E_R { TAMP2E_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Active level for tamper 2" ]
# [ inline ( always ) ]
pub fn tamp2trg ( & self ) -> TAMP2TRG_R { TAMP2TRG_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Activate timestamp on tamper detection event" ]
# [ inline ( always ) ]
pub fn tampts ( & self ) -> TAMPTS_R { TAMPTS_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:10 - Tamper sampling frequency" ]
# [ inline ( always ) ]
pub fn tampfreq ( & self ) -> TAMPFREQ_R { TAMPFREQ_R :: new ( ( ( self . bits >> 8 ) & 0x07 ) as u8 ) } # [ doc = "Bits 11:12 - Tamper filter count" ]
# [ inline ( always ) ]
pub fn tampflt ( & self ) -> TAMPFLT_R { TAMPFLT_R :: new ( ( ( self . bits >> 11 ) & 0x03 ) as u8 ) } # [ doc = "Bits 13:14 - Tamper precharge duration" ]
# [ inline ( always ) ]
pub fn tampprch ( & self ) -> TAMPPRCH_R { TAMPPRCH_R :: new ( ( ( self . bits >> 13 ) & 0x03 ) as u8 ) } # [ doc = "Bit 15 - TAMPER pull-up disable" ]
# [ inline ( always ) ]
pub fn tamppudis ( & self ) -> TAMPPUDIS_R { TAMPPUDIS_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - PC13 value" ]
# [ inline ( always ) ]
pub fn pc13value ( & self ) -> PC13VALUE_R { PC13VALUE_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - PC13 mode" ]
# [ inline ( always ) ]
pub fn pc13mode ( & self ) -> PC13MODE_R { PC13MODE_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - PC14 value" ]
# [ inline ( always ) ]
pub fn pc14value ( & self ) -> PC14VALUE_R { PC14VALUE_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - PC 14 mode" ]
# [ inline ( always ) ]
pub fn pc14mode ( & self ) -> PC14MODE_R { PC14MODE_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - PC15 value" ]
# [ inline ( always ) ]
pub fn pc15value ( & self ) -> PC15VALUE_R { PC15VALUE_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - PC15 mode" ]
# [ inline ( always ) ]
pub fn pc15mode ( & self ) -> PC15MODE_R { PC15MODE_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Tamper 1 detection enable" ]
# [ inline ( always ) ]
pub fn tamp1e ( & mut self ) -> TAMP1E_W { TAMP1E_W { w : self } } # [ doc = "Bit 1 - Active level for tamper 1" ]
# [ inline ( always ) ]
pub fn tamp1trg ( & mut self ) -> TAMP1TRG_W { TAMP1TRG_W { w : self } } # [ doc = "Bit 2 - Tamper interrupt enable" ]
# [ inline ( always ) ]
pub fn tampie ( & mut self ) -> TAMPIE_W { TAMPIE_W { w : self } } # [ doc = "Bit 3 - Tamper 2 detection enable" ]
# [ inline ( always ) ]
pub fn tamp2e ( & mut self ) -> TAMP2E_W { TAMP2E_W { w : self } } # [ doc = "Bit 4 - Active level for tamper 2" ]
# [ inline ( always ) ]
pub fn tamp2trg ( & mut self ) -> TAMP2TRG_W { TAMP2TRG_W { w : self } } # [ doc = "Bit 7 - Activate timestamp on tamper detection event" ]
# [ inline ( always ) ]
pub fn tampts ( & mut self ) -> TAMPTS_W { TAMPTS_W { w : self } } # [ doc = "Bits 8:10 - Tamper sampling frequency" ]
# [ inline ( always ) ]
pub fn tampfreq ( & mut self ) -> TAMPFREQ_W { TAMPFREQ_W { w : self } } # [ doc = "Bits 11:12 - Tamper filter count" ]
# [ inline ( always ) ]
pub fn tampflt ( & mut self ) -> TAMPFLT_W { TAMPFLT_W { w : self } } # [ doc = "Bits 13:14 - Tamper precharge duration" ]
# [ inline ( always ) ]
pub fn tampprch ( & mut self ) -> TAMPPRCH_W { TAMPPRCH_W { w : self } } # [ doc = "Bit 15 - TAMPER pull-up disable" ]
# [ inline ( always ) ]
pub fn tamppudis ( & mut self ) -> TAMPPUDIS_W { TAMPPUDIS_W { w : self } } # [ doc = "Bit 18 - PC13 value" ]
# [ inline ( always ) ]
pub fn pc13value ( & mut self ) -> PC13VALUE_W { PC13VALUE_W { w : self } } # [ doc = "Bit 19 - PC13 mode" ]
# [ inline ( always ) ]
pub fn pc13mode ( & mut self ) -> PC13MODE_W { PC13MODE_W { w : self } } # [ doc = "Bit 20 - PC14 value" ]
# [ inline ( always ) ]
pub fn pc14value ( & mut self ) -> PC14VALUE_W { PC14VALUE_W { w : self } } # [ doc = "Bit 21 - PC 14 mode" ]
# [ inline ( always ) ]
pub fn pc14mode ( & mut self ) -> PC14MODE_W { PC14MODE_W { w : self } } # [ doc = "Bit 22 - PC15 value" ]
# [ inline ( always ) ]
pub fn pc15value ( & mut self ) -> PC15VALUE_W { PC15VALUE_W { w : self } } # [ doc = "Bit 23 - PC15 mode" ]
# [ inline ( always ) ]
pub fn pc15mode ( & mut self ) -> PC15MODE_W { PC15MODE_W { w : self } } } } # [ doc = "alarm A sub second register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alrmassr](alrmassr) module" ]
pub type ALRMASSR = crate :: Reg < u32 , _ALRMASSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ALRMASSR ; # [ doc = "`read()` method returns [alrmassr::R](alrmassr::R) reader structure" ]
impl crate :: Readable for ALRMASSR { } # [ doc = "`write(|w| ..)` method takes [alrmassr::W](alrmassr::W) writer structure" ]
impl crate :: Writable for ALRMASSR { } # [ doc = "alarm A sub second register" ]
pub mod alrmassr { # [ doc = "Reader of register ALRMASSR" ]
pub type R = crate :: R < u32 , super :: ALRMASSR > ; # [ doc = "Writer for register ALRMASSR" ]
pub type W = crate :: W < u32 , super :: ALRMASSR > ; # [ doc = "Register ALRMASSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ALRMASSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MASKSS`" ]
pub type MASKSS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MASKSS`" ]
pub struct MASKSS_W < 'a > { w : & 'a mut W , } impl < 'a > MASKSS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `SS`" ]
pub type SS_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `SS`" ]
pub struct SS_W < 'a > { w : & 'a mut W , } impl < 'a > SS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x7fff ) | ( ( value as u32 ) & 0x7fff ) ; self . w } } impl R { # [ doc = "Bits 24:27 - Mask the most-significant bits starting at this bit" ]
# [ inline ( always ) ]
pub fn maskss ( & self ) -> MASKSS_R { MASKSS_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:14 - Sub seconds value" ]
# [ inline ( always ) ]
pub fn ss ( & self ) -> SS_R { SS_R :: new ( ( self . bits & 0x7fff ) as u16 ) } } impl W { # [ doc = "Bits 24:27 - Mask the most-significant bits starting at this bit" ]
# [ inline ( always ) ]
pub fn maskss ( & mut self ) -> MASKSS_W { MASKSS_W { w : self } } # [ doc = "Bits 0:14 - Sub seconds value" ]
# [ inline ( always ) ]
pub fn ss ( & mut self ) -> SS_W { SS_W { w : self } } } } # [ doc = "alarm B sub second register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alrmbssr](alrmbssr) module" ]
pub type ALRMBSSR = crate :: Reg < u32 , _ALRMBSSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ALRMBSSR ; # [ doc = "`read()` method returns [alrmbssr::R](alrmbssr::R) reader structure" ]
impl crate :: Readable for ALRMBSSR { } # [ doc = "`write(|w| ..)` method takes [alrmbssr::W](alrmbssr::W) writer structure" ]
impl crate :: Writable for ALRMBSSR { } # [ doc = "alarm B sub second register" ]
pub mod alrmbssr { # [ doc = "Reader of register ALRMBSSR" ]
pub type R = crate :: R < u32 , super :: ALRMBSSR > ; # [ doc = "Writer for register ALRMBSSR" ]
pub type W = crate :: W < u32 , super :: ALRMBSSR > ; # [ doc = "Register ALRMBSSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ALRMBSSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MASKSS`" ]
pub type MASKSS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MASKSS`" ]
pub struct MASKSS_W < 'a > { w : & 'a mut W , } impl < 'a > MASKSS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `SS`" ]
pub type SS_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `SS`" ]
pub struct SS_W < 'a > { w : & 'a mut W , } impl < 'a > SS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x7fff ) | ( ( value as u32 ) & 0x7fff ) ; self . w } } impl R { # [ doc = "Bits 24:27 - Mask the most-significant bits starting at this bit" ]
# [ inline ( always ) ]
pub fn maskss ( & self ) -> MASKSS_R { MASKSS_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:14 - Sub seconds value" ]
# [ inline ( always ) ]
pub fn ss ( & self ) -> SS_R { SS_R :: new ( ( self . bits & 0x7fff ) as u16 ) } } impl W { # [ doc = "Bits 24:27 - Mask the most-significant bits starting at this bit" ]
# [ inline ( always ) ]
pub fn maskss ( & mut self ) -> MASKSS_W { MASKSS_W { w : self } } # [ doc = "Bits 0:14 - Sub seconds value" ]
# [ inline ( always ) ]
pub fn ss ( & mut self ) -> SS_W { SS_W { w : self } } } } # [ doc = "backup register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bkpr](bkpr) module" ]
pub type BKPR = crate :: Reg < u32 , _BKPR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BKPR ; # [ doc = "`read()` method returns [bkpr::R](bkpr::R) reader structure" ]
impl crate :: Readable for BKPR { } # [ doc = "`write(|w| ..)` method takes [bkpr::W](bkpr::W) writer structure" ]
impl crate :: Writable for BKPR { } # [ doc = "backup register" ]
pub mod bkpr { # [ doc = "Reader of register BKP%sR" ]
pub type R = crate :: R < u32 , super :: BKPR > ; # [ doc = "Writer for register BKP%sR" ]
pub type W = crate :: W < u32 , super :: BKPR > ; # [ doc = "Register BKP%sR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BKPR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `BKP`" ]
pub type BKP_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `BKP`" ]
pub struct BKP_W < 'a > { w : & 'a mut W , } impl < 'a > BKP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff_ffff ) | ( ( value as u32 ) & 0xffff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:31 - BKP" ]
# [ inline ( always ) ]
pub fn bkp ( & self ) -> BKP_R { BKP_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:31 - BKP" ]
# [ inline ( always ) ]
pub fn bkp ( & mut self ) -> BKP_W { BKP_W { w : self } } } } } # [ doc = "Sigma-delta analog-to-digital converter" ]
pub struct SDADC1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for SDADC1 { } impl SDADC1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const sdadc1 :: RegisterBlock { 0x4001_6000 as * const _ } } impl Deref for SDADC1 { type Target = sdadc1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SDADC1 :: ptr ( ) } } } # [ doc = "Sigma-delta analog-to-digital converter" ]
pub mod sdadc1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - interrupt and status register" ]
pub isr : ISR , # [ doc = "0x0c - interrupt and status clear register" ]
pub clrisr : CLRISR , _reserved4 : [ u8 ; 4usize ]
, # [ doc = "0x14 - injected channel group selection register" ]
pub jchgr : JCHGR , _reserved5 : [ u8 ; 8usize ]
, # [ doc = "0x20 - configuration 0 register" ]
pub conf0r : CONF0R , # [ doc = "0x24 - configuration 1 register" ]
pub conf1r : CONF1R , # [ doc = "0x28 - configuration 2 register" ]
pub conf2r : CONF2R , _reserved8 : [ u8 ; 20usize ]
, # [ doc = "0x40 - channel configuration register 1" ]
pub confchr1 : CONFCHR1 , # [ doc = "0x44 - channel configuration register 2" ]
pub confchr2 : CONFCHR2 , _reserved10 : [ u8 ; 24usize ]
, # [ doc = "0x60 - data register for injected group" ]
pub jdatar : JDATAR , # [ doc = "0x64 - data register for the regular channel" ]
pub rdatar : RDATAR , _reserved12 : [ u8 ; 8usize ]
, # [ doc = "0x70 - SDADC1 and SDADC2 injected data register" ]
pub jdata12r : JDATA12R , # [ doc = "0x74 - SDADC1 and SDADC2 regular data register" ]
pub rdata12r : RDATA12R , # [ doc = "0x78 - SDADC1 and SDADC3 injected data register" ]
pub jdata13r : JDATA13R , # [ doc = "0x7c - SDADC1 and SDADC3 regular data register" ]
pub rdata13r : RDATA13R , } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `EOCALIE`" ]
pub type EOCALIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EOCALIE`" ]
pub struct EOCALIE_W < 'a > { w : & 'a mut W , } impl < 'a > EOCALIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `JEOCIE`" ]
pub type JEOCIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `JEOCIE`" ]
pub struct JEOCIE_W < 'a > { w : & 'a mut W , } impl < 'a > JEOCIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `JOVRIE`" ]
pub type JOVRIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `JOVRIE`" ]
pub struct JOVRIE_W < 'a > { w : & 'a mut W , } impl < 'a > JOVRIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `REOCIE`" ]
pub type REOCIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `REOCIE`" ]
pub struct REOCIE_W < 'a > { w : & 'a mut W , } impl < 'a > REOCIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `ROVRIE`" ]
pub type ROVRIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ROVRIE`" ]
pub struct ROVRIE_W < 'a > { w : & 'a mut W , } impl < 'a > ROVRIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `REFV`" ]
pub type REFV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `REFV`" ]
pub struct REFV_W < 'a > { w : & 'a mut W , } impl < 'a > REFV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `SLOWCK`" ]
pub type SLOWCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SLOWCK`" ]
pub struct SLOWCK_W < 'a > { w : & 'a mut W , } impl < 'a > SLOWCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `SBI`" ]
pub type SBI_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SBI`" ]
pub struct SBI_W < 'a > { w : & 'a mut W , } impl < 'a > SBI_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `PDI`" ]
pub type PDI_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PDI`" ]
pub struct PDI_W < 'a > { w : & 'a mut W , } impl < 'a > PDI_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `JSYNC`" ]
pub type JSYNC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `JSYNC`" ]
pub struct JSYNC_W < 'a > { w : & 'a mut W , } impl < 'a > JSYNC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `RSYNC`" ]
pub type RSYNC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RSYNC`" ]
pub struct RSYNC_W < 'a > { w : & 'a mut W , } impl < 'a > RSYNC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `JDMAEN`" ]
pub type JDMAEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `JDMAEN`" ]
pub struct JDMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > JDMAEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `RDMAEN`" ]
pub type RDMAEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RDMAEN`" ]
pub struct RDMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > RDMAEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `INIT`" ]
pub type INIT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `INIT`" ]
pub struct INIT_W < 'a > { w : & 'a mut W , } impl < 'a > INIT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - End of calibration interrupt enable" ]
# [ inline ( always ) ]
pub fn eocalie ( & self ) -> EOCALIE_R { EOCALIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Injected end of conversion interrupt enable" ]
# [ inline ( always ) ]
pub fn jeocie ( & self ) -> JEOCIE_R { JEOCIE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Injected data overrun interrupt enable" ]
# [ inline ( always ) ]
pub fn jovrie ( & self ) -> JOVRIE_R { JOVRIE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Regular end of conversion interrupt enable" ]
# [ inline ( always ) ]
pub fn reocie ( & self ) -> REOCIE_R { REOCIE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Regular data overrun interrupt enable" ]
# [ inline ( always ) ]
pub fn rovrie ( & self ) -> ROVRIE_R { ROVRIE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Reference voltage selection" ]
# [ inline ( always ) ]
pub fn refv ( & self ) -> REFV_R { REFV_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 10 - Slow clock mode enable" ]
# [ inline ( always ) ]
pub fn slowck ( & self ) -> SLOWCK_R { SLOWCK_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Enter Standby mode when idle" ]
# [ inline ( always ) ]
pub fn sbi ( & self ) -> SBI_R { SBI_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Enter power down mode when idle" ]
# [ inline ( always ) ]
pub fn pdi ( & self ) -> PDI_R { PDI_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Launch a injected conversion synchronously with SDADC1" ]
# [ inline ( always ) ]
pub fn jsync ( & self ) -> JSYNC_R { JSYNC_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Launch regular conversion synchronously with SDADC1" ]
# [ inline ( always ) ]
pub fn rsync ( & self ) -> RSYNC_R { RSYNC_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - DMA channel enabled to read data for the injected channel group" ]
# [ inline ( always ) ]
pub fn jdmaen ( & self ) -> JDMAEN_R { JDMAEN_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - DMA channel enabled to read data for the regular channel" ]
# [ inline ( always ) ]
pub fn rdmaen ( & self ) -> RDMAEN_R { RDMAEN_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Initialization mode request" ]
# [ inline ( always ) ]
pub fn init ( & self ) -> INIT_R { INIT_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - End of calibration interrupt enable" ]
# [ inline ( always ) ]
pub fn eocalie ( & mut self ) -> EOCALIE_W { EOCALIE_W { w : self } } # [ doc = "Bit 1 - Injected end of conversion interrupt enable" ]
# [ inline ( always ) ]
pub fn jeocie ( & mut self ) -> JEOCIE_W { JEOCIE_W { w : self } } # [ doc = "Bit 2 - Injected data overrun interrupt enable" ]
# [ inline ( always ) ]
pub fn jovrie ( & mut self ) -> JOVRIE_W { JOVRIE_W { w : self } } # [ doc = "Bit 3 - Regular end of conversion interrupt enable" ]
# [ inline ( always ) ]
pub fn reocie ( & mut self ) -> REOCIE_W { REOCIE_W { w : self } } # [ doc = "Bit 4 - Regular data overrun interrupt enable" ]
# [ inline ( always ) ]
pub fn rovrie ( & mut self ) -> ROVRIE_W { ROVRIE_W { w : self } } # [ doc = "Bits 8:9 - Reference voltage selection" ]
# [ inline ( always ) ]
pub fn refv ( & mut self ) -> REFV_W { REFV_W { w : self } } # [ doc = "Bit 10 - Slow clock mode enable" ]
# [ inline ( always ) ]
pub fn slowck ( & mut self ) -> SLOWCK_W { SLOWCK_W { w : self } } # [ doc = "Bit 11 - Enter Standby mode when idle" ]
# [ inline ( always ) ]
pub fn sbi ( & mut self ) -> SBI_W { SBI_W { w : self } } # [ doc = "Bit 12 - Enter power down mode when idle" ]
# [ inline ( always ) ]
pub fn pdi ( & mut self ) -> PDI_W { PDI_W { w : self } } # [ doc = "Bit 14 - Launch a injected conversion synchronously with SDADC1" ]
# [ inline ( always ) ]
pub fn jsync ( & mut self ) -> JSYNC_W { JSYNC_W { w : self } } # [ doc = "Bit 15 - Launch regular conversion synchronously with SDADC1" ]
# [ inline ( always ) ]
pub fn rsync ( & mut self ) -> RSYNC_W { RSYNC_W { w : self } } # [ doc = "Bit 16 - DMA channel enabled to read data for the injected channel group" ]
# [ inline ( always ) ]
pub fn jdmaen ( & mut self ) -> JDMAEN_W { JDMAEN_W { w : self } } # [ doc = "Bit 17 - DMA channel enabled to read data for the regular channel" ]
# [ inline ( always ) ]
pub fn rdmaen ( & mut self ) -> RDMAEN_W { RDMAEN_W { w : self } } # [ doc = "Bit 31 - Initialization mode request" ]
# [ inline ( always ) ]
pub fn init ( & mut self ) -> INIT_W { INIT_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `FAST`" ]
pub type FAST_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FAST`" ]
pub struct FAST_W < 'a > { w : & 'a mut W , } impl < 'a > FAST_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `RSWSTART`" ]
pub type RSWSTART_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RSWSTART`" ]
pub struct RSWSTART_W < 'a > { w : & 'a mut W , } impl < 'a > RSWSTART_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Reader of field `RCONT`" ]
pub type RCONT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `RCONT`" ]
pub struct RCONT_W < 'a > { w : & 'a mut W , } impl < 'a > RCONT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `RCH`" ]
pub type RCH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `RCH`" ]
pub struct RCH_W < 'a > { w : & 'a mut W , } impl < 'a > RCH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `JSWSTART`" ]
pub type JSWSTART_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `JSWSTART`" ]
pub struct JSWSTART_W < 'a > { w : & 'a mut W , } impl < 'a > JSWSTART_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `JEXTEN`" ]
pub type JEXTEN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `JEXTEN`" ]
pub struct JEXTEN_W < 'a > { w : & 'a mut W , } impl < 'a > JEXTEN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 13 ) ) | ( ( ( value as u32 ) & 0x03 ) << 13 ) ; self . w } } # [ doc = "Reader of field `JEXTSEL`" ]
pub type JEXTSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `JEXTSEL`" ]
pub struct JEXTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > JEXTSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Reader of field `JDS`" ]
pub type JDS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `JDS`" ]
pub struct JDS_W < 'a > { w : & 'a mut W , } impl < 'a > JDS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `JCONT`" ]
pub type JCONT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `JCONT`" ]
pub struct JCONT_W < 'a > { w : & 'a mut W , } impl < 'a > JCONT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `STARTCALIB`" ]
pub type STARTCALIB_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `STARTCALIB`" ]
pub struct STARTCALIB_W < 'a > { w : & 'a mut W , } impl < 'a > STARTCALIB_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CALIBCNT`" ]
pub type CALIBCNT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CALIBCNT`" ]
pub struct CALIBCNT_W < 'a > { w : & 'a mut W , } impl < 'a > CALIBCNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 1 ) ) | ( ( ( value as u32 ) & 0x03 ) << 1 ) ; self . w } } # [ doc = "Reader of field `ADON`" ]
pub type ADON_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ADON`" ]
pub struct ADON_W < 'a > { w : & 'a mut W , } impl < 'a > ADON_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 24 - Fast conversion mode selection" ]
# [ inline ( always ) ]
pub fn fast ( & self ) -> FAST_R { FAST_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Software start of a conversion on the regular channel" ]
# [ inline ( always ) ]
pub fn rswstart ( & self ) -> RSWSTART_R { RSWSTART_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - Continuous mode selection for regular conversions" ]
# [ inline ( always ) ]
pub fn rcont ( & self ) -> RCONT_R { RCONT_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:19 - Regular channel selection" ]
# [ inline ( always ) ]
pub fn rch ( & self ) -> RCH_R { RCH_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Start a conversion of the injected group of channels" ]
# [ inline ( always ) ]
pub fn jswstart ( & self ) -> JSWSTART_R { JSWSTART_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 13:14 - Trigger enable and trigger edge selection for injected conversions" ]
# [ inline ( always ) ]
pub fn jexten ( & self ) -> JEXTEN_R { JEXTEN_R :: new ( ( ( self . bits >> 13 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:11 - Trigger signal selection for launching injected conversions" ]
# [ inline ( always ) ]
pub fn jextsel ( & self ) -> JEXTSEL_R { JEXTSEL_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 6 - Delay start of injected conversions." ]
# [ inline ( always ) ]
pub fn jds ( & self ) -> JDS_R { JDS_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Continuous mode selection for injected conversions" ]
# [ inline ( always ) ]
pub fn jcont ( & self ) -> JCONT_R { JCONT_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Start calibration" ]
# [ inline ( always ) ]
pub fn startcalib ( & self ) -> STARTCALIB_R { STARTCALIB_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bits 1:2 - Number of calibration sequences to be performed (number of valid configurations)" ]
# [ inline ( always ) ]
pub fn calibcnt ( & self ) -> CALIBCNT_R { CALIBCNT_R :: new ( ( ( self . bits >> 1 ) & 0x03 ) as u8 ) } # [ doc = "Bit 0 - SDADC enable" ]
# [ inline ( always ) ]
pub fn adon ( & self ) -> ADON_R { ADON_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 24 - Fast conversion mode selection" ]
# [ inline ( always ) ]
pub fn fast ( & mut self ) -> FAST_W { FAST_W { w : self } } # [ doc = "Bit 23 - Software start of a conversion on the regular channel" ]
# [ inline ( always ) ]
pub fn rswstart ( & mut self ) -> RSWSTART_W { RSWSTART_W { w : self } } # [ doc = "Bit 22 - Continuous mode selection for regular conversions" ]
# [ inline ( always ) ]
pub fn rcont ( & mut self ) -> RCONT_W { RCONT_W { w : self } } # [ doc = "Bits 16:19 - Regular channel selection" ]
# [ inline ( always ) ]
pub fn rch ( & mut self ) -> RCH_W { RCH_W { w : self } } # [ doc = "Bit 15 - Start a conversion of the injected group of channels" ]
# [ inline ( always ) ]
pub fn jswstart ( & mut self ) -> JSWSTART_W { JSWSTART_W { w : self } } # [ doc = "Bits 13:14 - Trigger enable and trigger edge selection for injected conversions" ]
# [ inline ( always ) ]
pub fn jexten ( & mut self ) -> JEXTEN_W { JEXTEN_W { w : self } } # [ doc = "Bits 8:11 - Trigger signal selection for launching injected conversions" ]
# [ inline ( always ) ]
pub fn jextsel ( & mut self ) -> JEXTSEL_W { JEXTSEL_W { w : self } } # [ doc = "Bit 6 - Delay start of injected conversions." ]
# [ inline ( always ) ]
pub fn jds ( & mut self ) -> JDS_W { JDS_W { w : self } } # [ doc = "Bit 5 - Continuous mode selection for injected conversions" ]
# [ inline ( always ) ]
pub fn jcont ( & mut self ) -> JCONT_W { JCONT_W { w : self } } # [ doc = "Bit 4 - Start calibration" ]
# [ inline ( always ) ]
pub fn startcalib ( & mut self ) -> STARTCALIB_W { STARTCALIB_W { w : self } } # [ doc = "Bits 1:2 - Number of calibration sequences to be performed (number of valid configurations)" ]
# [ inline ( always ) ]
pub fn calibcnt ( & mut self ) -> CALIBCNT_W { CALIBCNT_W { w : self } } # [ doc = "Bit 0 - SDADC enable" ]
# [ inline ( always ) ]
pub fn adon ( & mut self ) -> ADON_W { ADON_W { w : self } } } } # [ doc = "interrupt and status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module" ]
pub type ISR = crate :: Reg < u32 , _ISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISR ; # [ doc = "`read()` method returns [isr::R](isr::R) reader structure" ]
impl crate :: Readable for ISR { } # [ doc = "interrupt and status register" ]
pub mod isr { # [ doc = "Reader of register ISR" ]
pub type R = crate :: R < u32 , super :: ISR > ; # [ doc = "Reader of field `INITRDY`" ]
pub type INITRDY_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `STABIP`" ]
pub type STABIP_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `RCIP`" ]
pub type RCIP_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `JCIP`" ]
pub type JCIP_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `CALIBIP`" ]
pub type CALIBIP_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `ROVRF`" ]
pub type ROVRF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `REOCF`" ]
pub type REOCF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `JOVRF`" ]
pub type JOVRF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `JEOCF`" ]
pub type JEOCF_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `EOCALF`" ]
pub type EOCALF_R = crate :: R < bool , bool > ; impl R { # [ doc = "Bit 31 - Initialization mode is ready" ]
# [ inline ( always ) ]
pub fn initrdy ( & self ) -> INITRDY_R { INITRDY_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Stabilization in progress status" ]
# [ inline ( always ) ]
pub fn stabip ( & self ) -> STABIP_R { STABIP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Regular conversion in progress status" ]
# [ inline ( always ) ]
pub fn rcip ( & self ) -> RCIP_R { RCIP_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Injected conversion in progress status" ]
# [ inline ( always ) ]
pub fn jcip ( & self ) -> JCIP_R { JCIP_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Calibration in progress status" ]
# [ inline ( always ) ]
pub fn calibip ( & self ) -> CALIBIP_R { CALIBIP_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Regular conversion overrun flag" ]
# [ inline ( always ) ]
pub fn rovrf ( & self ) -> ROVRF_R { ROVRF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - End of regular conversion flag" ]
# [ inline ( always ) ]
pub fn reocf ( & self ) -> REOCF_R { REOCF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Injected conversion overrun flag" ]
# [ inline ( always ) ]
pub fn jovrf ( & self ) -> JOVRF_R { JOVRF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - End of injected conversion flag" ]
# [ inline ( always ) ]
pub fn jeocf ( & self ) -> JEOCF_R { JEOCF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - End of calibration flag" ]
# [ inline ( always ) ]
pub fn eocalf ( & self ) -> EOCALF_R { EOCALF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } } # [ doc = "interrupt and status clear register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clrisr](clrisr) module" ]
pub type CLRISR = crate :: Reg < u32 , _CLRISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CLRISR ; # [ doc = "`read()` method returns [clrisr::R](clrisr::R) reader structure" ]
impl crate :: Readable for CLRISR { } # [ doc = "`write(|w| ..)` method takes [clrisr::W](clrisr::W) writer structure" ]
impl crate :: Writable for CLRISR { } # [ doc = "interrupt and status clear register" ]
pub mod clrisr { # [ doc = "Reader of register CLRISR" ]
pub type R = crate :: R < u32 , super :: CLRISR > ; # [ doc = "Writer for register CLRISR" ]
pub type W = crate :: W < u32 , super :: CLRISR > ; # [ doc = "Register CLRISR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CLRISR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CLRROVRF`" ]
pub type CLRROVRF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CLRROVRF`" ]
pub struct CLRROVRF_W < 'a > { w : & 'a mut W , } impl < 'a > CLRROVRF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CLRJOVRF`" ]
pub type CLRJOVRF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CLRJOVRF`" ]
pub struct CLRJOVRF_W < 'a > { w : & 'a mut W , } impl < 'a > CLRJOVRF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CLREOCALF`" ]
pub type CLREOCALF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CLREOCALF`" ]
pub struct CLREOCALF_W < 'a > { w : & 'a mut W , } impl < 'a > CLREOCALF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 4 - Clear the regular conversion overrun flag" ]
# [ inline ( always ) ]
pub fn clrrovrf ( & self ) -> CLRROVRF_R { CLRROVRF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Clear the injected conversion overrun flag" ]
# [ inline ( always ) ]
pub fn clrjovrf ( & self ) -> CLRJOVRF_R { CLRJOVRF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Clear the end of calibration flag" ]
# [ inline ( always ) ]
pub fn clreocalf ( & self ) -> CLREOCALF_R { CLREOCALF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 4 - Clear the regular conversion overrun flag" ]
# [ inline ( always ) ]
pub fn clrrovrf ( & mut self ) -> CLRROVRF_W { CLRROVRF_W { w : self } } # [ doc = "Bit 2 - Clear the injected conversion overrun flag" ]
# [ inline ( always ) ]
pub fn clrjovrf ( & mut self ) -> CLRJOVRF_W { CLRJOVRF_W { w : self } } # [ doc = "Bit 0 - Clear the end of calibration flag" ]
# [ inline ( always ) ]
pub fn clreocalf ( & mut self ) -> CLREOCALF_W { CLREOCALF_W { w : self } } } } # [ doc = "injected channel group selection register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jchgr](jchgr) module" ]
pub type JCHGR = crate :: Reg < u32 , _JCHGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JCHGR ; # [ doc = "`read()` method returns [jchgr::R](jchgr::R) reader structure" ]
impl crate :: Readable for JCHGR { } # [ doc = "`write(|w| ..)` method takes [jchgr::W](jchgr::W) writer structure" ]
impl crate :: Writable for JCHGR { } # [ doc = "injected channel group selection register" ]
pub mod jchgr { # [ doc = "Reader of register JCHGR" ]
pub type R = crate :: R < u32 , super :: JCHGR > ; # [ doc = "Writer for register JCHGR" ]
pub type W = crate :: W < u32 , super :: JCHGR > ; # [ doc = "Register JCHGR `reset()`'s with value 0x01" ]
impl crate :: ResetValue for super :: JCHGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x01 } } # [ doc = "Reader of field `JCHG`" ]
pub type JCHG_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `JCHG`" ]
pub struct JCHG_W < 'a > { w : & 'a mut W , } impl < 'a > JCHG_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01ff ) | ( ( value as u32 ) & 0x01ff ) ; self . w } } impl R { # [ doc = "Bits 0:8 - Injected channel group selection" ]
# [ inline ( always ) ]
pub fn jchg ( & self ) -> JCHG_R { JCHG_R :: new ( ( self . bits & 0x01ff ) as u16 ) } } impl W { # [ doc = "Bits 0:8 - Injected channel group selection" ]
# [ inline ( always ) ]
pub fn jchg ( & mut self ) -> JCHG_W { JCHG_W { w : self } } } } # [ doc = "configuration 0 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [conf0r](conf0r) module" ]
pub type CONF0R = crate :: Reg < u32 , _CONF0R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CONF0R ; # [ doc = "`read()` method returns [conf0r::R](conf0r::R) reader structure" ]
impl crate :: Readable for CONF0R { } # [ doc = "`write(|w| ..)` method takes [conf0r::W](conf0r::W) writer structure" ]
impl crate :: Writable for CONF0R { } # [ doc = "configuration 0 register" ]
pub mod conf0r { # [ doc = "Reader of register CONF0R" ]
pub type R = crate :: R < u32 , super :: CONF0R > ; # [ doc = "Writer for register CONF0R" ]
pub type W = crate :: W < u32 , super :: CONF0R > ; # [ doc = "Register CONF0R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CONF0R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `COMMON0`" ]
pub type COMMON0_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMMON0`" ]
pub struct COMMON0_W < 'a > { w : & 'a mut W , } impl < 'a > COMMON0_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Reader of field `SE0`" ]
pub type SE0_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SE0`" ]
pub struct SE0_W < 'a > { w : & 'a mut W , } impl < 'a > SE0_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Reader of field `GAIN0`" ]
pub type GAIN0_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `GAIN0`" ]
pub struct GAIN0_W < 'a > { w : & 'a mut W , } impl < 'a > GAIN0_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 20 ) ) | ( ( ( value as u32 ) & 0x07 ) << 20 ) ; self . w } } # [ doc = "Reader of field `OFFSET0`" ]
pub type OFFSET0_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OFFSET0`" ]
pub struct OFFSET0_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET0_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Common mode for configuration 0" ]
# [ inline ( always ) ]
pub fn common0 ( & self ) -> COMMON0_R { COMMON0_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Single-ended mode for configuration 0" ]
# [ inline ( always ) ]
pub fn se0 ( & self ) -> SE0_R { SE0_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:22 - Gain setting for configuration 0" ]
# [ inline ( always ) ]
pub fn gain0 ( & self ) -> GAIN0_R { GAIN0_R :: new ( ( ( self . bits >> 20 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:11 - Twelve-bit calibration offset for configuration 0" ]
# [ inline ( always ) ]
pub fn offset0 ( & self ) -> OFFSET0_R { OFFSET0_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 30:31 - Common mode for configuration 0" ]
# [ inline ( always ) ]
pub fn common0 ( & mut self ) -> COMMON0_W { COMMON0_W { w : self } } # [ doc = "Bits 26:27 - Single-ended mode for configuration 0" ]
# [ inline ( always ) ]
pub fn se0 ( & mut self ) -> SE0_W { SE0_W { w : self } } # [ doc = "Bits 20:22 - Gain setting for configuration 0" ]
# [ inline ( always ) ]
pub fn gain0 ( & mut self ) -> GAIN0_W { GAIN0_W { w : self } } # [ doc = "Bits 0:11 - Twelve-bit calibration offset for configuration 0" ]
# [ inline ( always ) ]
pub fn offset0 ( & mut self ) -> OFFSET0_W { OFFSET0_W { w : self } } } } # [ doc = "configuration 1 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [conf1r](conf1r) module" ]
pub type CONF1R = crate :: Reg < u32 , _CONF1R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CONF1R ; # [ doc = "`read()` method returns [conf1r::R](conf1r::R) reader structure" ]
impl crate :: Readable for CONF1R { } # [ doc = "`write(|w| ..)` method takes [conf1r::W](conf1r::W) writer structure" ]
impl crate :: Writable for CONF1R { } # [ doc = "configuration 1 register" ]
pub mod conf1r { # [ doc = "Reader of register CONF1R" ]
pub type R = crate :: R < u32 , super :: CONF1R > ; # [ doc = "Writer for register CONF1R" ]
pub type W = crate :: W < u32 , super :: CONF1R > ; # [ doc = "Register CONF1R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CONF1R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `COMMON1`" ]
pub type COMMON1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMMON1`" ]
pub struct COMMON1_W < 'a > { w : & 'a mut W , } impl < 'a > COMMON1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Reader of field `SE1`" ]
pub type SE1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SE1`" ]
pub struct SE1_W < 'a > { w : & 'a mut W , } impl < 'a > SE1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Reader of field `GAIN1`" ]
pub type GAIN1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `GAIN1`" ]
pub struct GAIN1_W < 'a > { w : & 'a mut W , } impl < 'a > GAIN1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 20 ) ) | ( ( ( value as u32 ) & 0x07 ) << 20 ) ; self . w } } # [ doc = "Reader of field `OFFSET1`" ]
pub type OFFSET1_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OFFSET1`" ]
pub struct OFFSET1_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Common mode for configuration 1" ]
# [ inline ( always ) ]
pub fn common1 ( & self ) -> COMMON1_R { COMMON1_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Single-ended mode for configuration 1" ]
# [ inline ( always ) ]
pub fn se1 ( & self ) -> SE1_R { SE1_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:22 - Gain setting for configuration 1" ]
# [ inline ( always ) ]
pub fn gain1 ( & self ) -> GAIN1_R { GAIN1_R :: new ( ( ( self . bits >> 20 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:11 - Twelve-bit calibration offset for configuration 1" ]
# [ inline ( always ) ]
pub fn offset1 ( & self ) -> OFFSET1_R { OFFSET1_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 30:31 - Common mode for configuration 1" ]
# [ inline ( always ) ]
pub fn common1 ( & mut self ) -> COMMON1_W { COMMON1_W { w : self } } # [ doc = "Bits 26:27 - Single-ended mode for configuration 1" ]
# [ inline ( always ) ]
pub fn se1 ( & mut self ) -> SE1_W { SE1_W { w : self } } # [ doc = "Bits 20:22 - Gain setting for configuration 1" ]
# [ inline ( always ) ]
pub fn gain1 ( & mut self ) -> GAIN1_W { GAIN1_W { w : self } } # [ doc = "Bits 0:11 - Twelve-bit calibration offset for configuration 1" ]
# [ inline ( always ) ]
pub fn offset1 ( & mut self ) -> OFFSET1_W { OFFSET1_W { w : self } } } } # [ doc = "configuration 2 register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [conf2r](conf2r) module" ]
pub type CONF2R = crate :: Reg < u32 , _CONF2R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CONF2R ; # [ doc = "`read()` method returns [conf2r::R](conf2r::R) reader structure" ]
impl crate :: Readable for CONF2R { } # [ doc = "`write(|w| ..)` method takes [conf2r::W](conf2r::W) writer structure" ]
impl crate :: Writable for CONF2R { } # [ doc = "configuration 2 register" ]
pub mod conf2r { # [ doc = "Reader of register CONF2R" ]
pub type R = crate :: R < u32 , super :: CONF2R > ; # [ doc = "Writer for register CONF2R" ]
pub type W = crate :: W < u32 , super :: CONF2R > ; # [ doc = "Register CONF2R `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CONF2R { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `COMMON2`" ]
pub type COMMON2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMMON2`" ]
pub struct COMMON2_W < 'a > { w : & 'a mut W , } impl < 'a > COMMON2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Reader of field `SE2`" ]
pub type SE2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SE2`" ]
pub struct SE2_W < 'a > { w : & 'a mut W , } impl < 'a > SE2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Reader of field `GAIN2`" ]
pub type GAIN2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `GAIN2`" ]
pub struct GAIN2_W < 'a > { w : & 'a mut W , } impl < 'a > GAIN2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 20 ) ) | ( ( ( value as u32 ) & 0x07 ) << 20 ) ; self . w } } # [ doc = "Reader of field `OFFSET2`" ]
pub type OFFSET2_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OFFSET2`" ]
pub struct OFFSET2_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Common mode for configuration 2" ]
# [ inline ( always ) ]
pub fn common2 ( & self ) -> COMMON2_R { COMMON2_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Single-ended mode for configuration 2" ]
# [ inline ( always ) ]
pub fn se2 ( & self ) -> SE2_R { SE2_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:22 - Gain setting for configuration 2" ]
# [ inline ( always ) ]
pub fn gain2 ( & self ) -> GAIN2_R { GAIN2_R :: new ( ( ( self . bits >> 20 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:11 - Twelve-bit calibration offset for configuration 2" ]
# [ inline ( always ) ]
pub fn offset2 ( & self ) -> OFFSET2_R { OFFSET2_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 30:31 - Common mode for configuration 2" ]
# [ inline ( always ) ]
pub fn common2 ( & mut self ) -> COMMON2_W { COMMON2_W { w : self } } # [ doc = "Bits 26:27 - Single-ended mode for configuration 2" ]
# [ inline ( always ) ]
pub fn se2 ( & mut self ) -> SE2_W { SE2_W { w : self } } # [ doc = "Bits 20:22 - Gain setting for configuration 2" ]
# [ inline ( always ) ]
pub fn gain2 ( & mut self ) -> GAIN2_W { GAIN2_W { w : self } } # [ doc = "Bits 0:11 - Twelve-bit calibration offset for configuration 2" ]
# [ inline ( always ) ]
pub fn offset2 ( & mut self ) -> OFFSET2_W { OFFSET2_W { w : self } } } } # [ doc = "channel configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [confchr1](confchr1) module" ]
pub type CONFCHR1 = crate :: Reg < u32 , _CONFCHR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CONFCHR1 ; # [ doc = "`read()` method returns [confchr1::R](confchr1::R) reader structure" ]
impl crate :: Readable for CONFCHR1 { } # [ doc = "`write(|w| ..)` method takes [confchr1::W](confchr1::W) writer structure" ]
impl crate :: Writable for CONFCHR1 { } # [ doc = "channel configuration register 1" ]
pub mod confchr1 { # [ doc = "Reader of register CONFCHR1" ]
pub type R = crate :: R < u32 , super :: CONFCHR1 > ; # [ doc = "Writer for register CONFCHR1" ]
pub type W = crate :: W < u32 , super :: CONFCHR1 > ; # [ doc = "Register CONFCHR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CONFCHR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CONFCH7`" ]
pub type CONFCH7_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH7`" ]
pub struct CONFCH7_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH7_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `CONFCH6`" ]
pub type CONFCH6_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH6`" ]
pub struct CONFCH6_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH6_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Reader of field `CONFCH5`" ]
pub type CONFCH5_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH5`" ]
pub struct CONFCH5_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH5_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Reader of field `CONFCH4`" ]
pub type CONFCH4_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH4`" ]
pub struct CONFCH4_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH4_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `CONFCH3`" ]
pub type CONFCH3_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH3`" ]
pub struct CONFCH3_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH3_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `CONFCH2`" ]
pub type CONFCH2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH2`" ]
pub struct CONFCH2_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `CONFCH1`" ]
pub type CONFCH1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH1`" ]
pub struct CONFCH1_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CONFCH0`" ]
pub type CONFCH0_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH0`" ]
pub struct CONFCH0_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH0_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 28:29 - CONFCH7" ]
# [ inline ( always ) ]
pub fn confch7 ( & self ) -> CONFCH7_R { CONFCH7_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - CONFCH6" ]
# [ inline ( always ) ]
pub fn confch6 ( & self ) -> CONFCH6_R { CONFCH6_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - CONFCH5" ]
# [ inline ( always ) ]
pub fn confch5 ( & self ) -> CONFCH5_R { CONFCH5_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - CONFCH4" ]
# [ inline ( always ) ]
pub fn confch4 ( & self ) -> CONFCH4_R { CONFCH4_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - CONFCH3" ]
# [ inline ( always ) ]
pub fn confch3 ( & self ) -> CONFCH3_R { CONFCH3_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - CONFCH2" ]
# [ inline ( always ) ]
pub fn confch2 ( & self ) -> CONFCH2_R { CONFCH2_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - CONFCH1" ]
# [ inline ( always ) ]
pub fn confch1 ( & self ) -> CONFCH1_R { CONFCH1_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - CONFCH0" ]
# [ inline ( always ) ]
pub fn confch0 ( & self ) -> CONFCH0_R { CONFCH0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - CONFCH7" ]
# [ inline ( always ) ]
pub fn confch7 ( & mut self ) -> CONFCH7_W { CONFCH7_W { w : self } } # [ doc = "Bits 24:25 - CONFCH6" ]
# [ inline ( always ) ]
pub fn confch6 ( & mut self ) -> CONFCH6_W { CONFCH6_W { w : self } } # [ doc = "Bits 20:21 - CONFCH5" ]
# [ inline ( always ) ]
pub fn confch5 ( & mut self ) -> CONFCH5_W { CONFCH5_W { w : self } } # [ doc = "Bits 16:17 - CONFCH4" ]
# [ inline ( always ) ]
pub fn confch4 ( & mut self ) -> CONFCH4_W { CONFCH4_W { w : self } } # [ doc = "Bits 12:13 - CONFCH3" ]
# [ inline ( always ) ]
pub fn confch3 ( & mut self ) -> CONFCH3_W { CONFCH3_W { w : self } } # [ doc = "Bits 8:9 - CONFCH2" ]
# [ inline ( always ) ]
pub fn confch2 ( & mut self ) -> CONFCH2_W { CONFCH2_W { w : self } } # [ doc = "Bits 4:5 - CONFCH1" ]
# [ inline ( always ) ]
pub fn confch1 ( & mut self ) -> CONFCH1_W { CONFCH1_W { w : self } } # [ doc = "Bits 0:1 - CONFCH0" ]
# [ inline ( always ) ]
pub fn confch0 ( & mut self ) -> CONFCH0_W { CONFCH0_W { w : self } } } } # [ doc = "channel configuration register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [confchr2](confchr2) module" ]
pub type CONFCHR2 = crate :: Reg < u32 , _CONFCHR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CONFCHR2 ; # [ doc = "`read()` method returns [confchr2::R](confchr2::R) reader structure" ]
impl crate :: Readable for CONFCHR2 { } # [ doc = "`write(|w| ..)` method takes [confchr2::W](confchr2::W) writer structure" ]
impl crate :: Writable for CONFCHR2 { } # [ doc = "channel configuration register 2" ]
pub mod confchr2 { # [ doc = "Reader of register CONFCHR2" ]
pub type R = crate :: R < u32 , super :: CONFCHR2 > ; # [ doc = "Writer for register CONFCHR2" ]
pub type W = crate :: W < u32 , super :: CONFCHR2 > ; # [ doc = "Register CONFCHR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CONFCHR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CONFCH8`" ]
pub type CONFCH8_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CONFCH8`" ]
pub struct CONFCH8_W < 'a > { w : & 'a mut W , } impl < 'a > CONFCH8_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 0:1 - Channel 8 configuration" ]
# [ inline ( always ) ]
pub fn confch8 ( & self ) -> CONFCH8_R { CONFCH8_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 0:1 - Channel 8 configuration" ]
# [ inline ( always ) ]
pub fn confch8 ( & mut self ) -> CONFCH8_W { CONFCH8_W { w : self } } } } # [ doc = "data register for injected group\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jdatar](jdatar) module" ]
pub type JDATAR = crate :: Reg < u32 , _JDATAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JDATAR ; # [ doc = "`read()` method returns [jdatar::R](jdatar::R) reader structure" ]
impl crate :: Readable for JDATAR { } # [ doc = "data register for injected group" ]
pub mod jdatar { # [ doc = "Reader of register JDATAR" ]
pub type R = crate :: R < u32 , super :: JDATAR > ; # [ doc = "Reader of field `JDATACH`" ]
pub type JDATACH_R = crate :: R < u8 , u8 > ; # [ doc = "Reader of field `JDATA`" ]
pub type JDATA_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 25:28 - Injected channel most recently converted" ]
# [ inline ( always ) ]
pub fn jdatach ( & self ) -> JDATACH_R { JDATACH_R :: new ( ( ( self . bits >> 25 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:15 - Injected group conversion data" ]
# [ inline ( always ) ]
pub fn jdata ( & self ) -> JDATA_R { JDATA_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "data register for the regular channel\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdatar](rdatar) module" ]
pub type RDATAR = crate :: Reg < u32 , _RDATAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RDATAR ; # [ doc = "`read()` method returns [rdatar::R](rdatar::R) reader structure" ]
impl crate :: Readable for RDATAR { } # [ doc = "data register for the regular channel" ]
pub mod rdatar { # [ doc = "Reader of register RDATAR" ]
pub type R = crate :: R < u32 , super :: RDATAR > ; # [ doc = "Reader of field `RDATA`" ]
pub type RDATA_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - Regular channel conversion data" ]
# [ inline ( always ) ]
pub fn rdata ( & self ) -> RDATA_R { RDATA_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "SDADC1 and SDADC2 injected data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jdata12r](jdata12r) module" ]
pub type JDATA12R = crate :: Reg < u32 , _JDATA12R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JDATA12R ; # [ doc = "`read()` method returns [jdata12r::R](jdata12r::R) reader structure" ]
impl crate :: Readable for JDATA12R { } # [ doc = "SDADC1 and SDADC2 injected data register" ]
pub mod jdata12r { # [ doc = "Reader of register JDATA12R" ]
pub type R = crate :: R < u32 , super :: JDATA12R > ; # [ doc = "Reader of field `JDATA2`" ]
pub type JDATA2_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `JDATA1`" ]
pub type JDATA1_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 16:31 - Injected group conversion data for SDADC2" ]
# [ inline ( always ) ]
pub fn jdata2 ( & self ) -> JDATA2_R { JDATA2_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } # [ doc = "Bits 0:15 - Injected group conversion data for SDADC1" ]
# [ inline ( always ) ]
pub fn jdata1 ( & self ) -> JDATA1_R { JDATA1_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "SDADC1 and SDADC2 regular data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdata12r](rdata12r) module" ]
pub type RDATA12R = crate :: Reg < u32 , _RDATA12R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RDATA12R ; # [ doc = "`read()` method returns [rdata12r::R](rdata12r::R) reader structure" ]
impl crate :: Readable for RDATA12R { } # [ doc = "SDADC1 and SDADC2 regular data register" ]
pub mod rdata12r { # [ doc = "Reader of register RDATA12R" ]
pub type R = crate :: R < u32 , super :: RDATA12R > ; # [ doc = "Reader of field `RDATA2`" ]
pub type RDATA2_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `RDATA1`" ]
pub type RDATA1_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 16:31 - Regular conversion data for SDADC2" ]
# [ inline ( always ) ]
pub fn rdata2 ( & self ) -> RDATA2_R { RDATA2_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } # [ doc = "Bits 0:15 - Regular conversion data for SDADC1" ]
# [ inline ( always ) ]
pub fn rdata1 ( & self ) -> RDATA1_R { RDATA1_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "SDADC1 and SDADC3 injected data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jdata13r](jdata13r) module" ]
pub type JDATA13R = crate :: Reg < u32 , _JDATA13R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JDATA13R ; # [ doc = "`read()` method returns [jdata13r::R](jdata13r::R) reader structure" ]
impl crate :: Readable for JDATA13R { } # [ doc = "SDADC1 and SDADC3 injected data register" ]
pub mod jdata13r { # [ doc = "Reader of register JDATA13R" ]
pub type R = crate :: R < u32 , super :: JDATA13R > ; # [ doc = "Reader of field `JDATA3`" ]
pub type JDATA3_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `JDATA1`" ]
pub type JDATA1_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 16:31 - Injected group conversion data for SDADC3" ]
# [ inline ( always ) ]
pub fn jdata3 ( & self ) -> JDATA3_R { JDATA3_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } # [ doc = "Bits 0:15 - Injected group conversion data for SDADC1" ]
# [ inline ( always ) ]
pub fn jdata1 ( & self ) -> JDATA1_R { JDATA1_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "SDADC1 and SDADC3 regular data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdata13r](rdata13r) module" ]
pub type RDATA13R = crate :: Reg < u32 , _RDATA13R > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RDATA13R ; # [ doc = "`read()` method returns [rdata13r::R](rdata13r::R) reader structure" ]
impl crate :: Readable for RDATA13R { } # [ doc = "SDADC1 and SDADC3 regular data register" ]
pub mod rdata13r { # [ doc = "Reader of register RDATA13R" ]
pub type R = crate :: R < u32 , super :: RDATA13R > ; # [ doc = "Reader of field `RDATA3`" ]
pub type RDATA3_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `RDATA1`" ]
pub type RDATA1_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 16:31 - Regular conversion data for SDADC3" ]
# [ inline ( always ) ]
pub fn rdata3 ( & self ) -> RDATA3_R { RDATA3_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } # [ doc = "Bits 0:15 - Regular conversion data for SDADC1" ]
# [ inline ( always ) ]
pub fn rdata1 ( & self ) -> RDATA1_R { RDATA1_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } } # [ doc = "Sigma-delta analog-to-digital converter" ]
pub struct SDADC2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for SDADC2 { } impl SDADC2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const sdadc1 :: RegisterBlock { 0x4001_6400 as * const _ } } impl Deref for SDADC2 { type Target = sdadc1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SDADC2 :: ptr ( ) } } } # [ doc = "Sigma-delta analog-to-digital converter" ]
pub struct SDADC3 { _marker : PhantomData < * const ( ) > } unsafe impl Send for SDADC3 { } impl SDADC3 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const sdadc1 :: RegisterBlock { 0x4001_6800 as * const _ } } impl Deref for SDADC3 { type Target = sdadc1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SDADC3 :: ptr ( ) } } } # [ doc = "Digital-to-analog converter" ]
pub struct DAC2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for DAC2 { } impl DAC2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const dac2 :: RegisterBlock { 0x4000_9800 as * const _ } } impl Deref for DAC2 { type Target = dac2 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * DAC2 :: ptr ( ) } } } # [ doc = "Digital-to-analog converter" ]
pub mod dac2 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register" ]
pub cr : CR , # [ doc = "0x04 - software trigger register" ]
pub swtrigr : SWTRIGR , # [ doc = "0x08 - channel1 12-bit right-aligned data holding register" ]
pub dhr12r1 : DHR12R1 , # [ doc = "0x0c - DAC channel1 12-bit left aligned data holding register" ]
pub dhr12l1 : DHR12L1 , # [ doc = "0x10 - DAC channel1 8-bit right aligned data holding register" ]
pub dhr8r1 : DHR8R1 , _reserved5 : [ u8 ; 24usize ]
, # [ doc = "0x2c - DAC channel1 data output register" ]
pub dor1 : DOR1 , _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x34 - DAC status register" ]
pub sr : SR , } # [ doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAUDRIE1`" ]
pub type DMAUDRIE1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAUDRIE1`" ]
pub struct DMAUDRIE1_W < 'a > { w : & 'a mut W , } impl < 'a > DMAUDRIE1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `DMAEN1`" ]
pub type DMAEN1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAEN1`" ]
pub struct DMAEN1_W < 'a > { w : & 'a mut W , } impl < 'a > DMAEN1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `MAMP13`" ]
pub type MAMP13_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MAMP13`" ]
pub struct MAMP13_W < 'a > { w : & 'a mut W , } impl < 'a > MAMP13_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `MAMP12`" ]
pub type MAMP12_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MAMP12`" ]
pub struct MAMP12_W < 'a > { w : & 'a mut W , } impl < 'a > MAMP12_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `MAMP11`" ]
pub type MAMP11_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MAMP11`" ]
pub struct MAMP11_W < 'a > { w : & 'a mut W , } impl < 'a > MAMP11_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `MAMP10`" ]
pub type MAMP10_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MAMP10`" ]
pub struct MAMP10_W < 'a > { w : & 'a mut W , } impl < 'a > MAMP10_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `WAVE1`" ]
pub type WAVE1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAVE1`" ]
pub struct WAVE1_W < 'a > { w : & 'a mut W , } impl < 'a > WAVE1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `WAVE2`" ]
pub type WAVE2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAVE2`" ]
pub struct WAVE2_W < 'a > { w : & 'a mut W , } impl < 'a > WAVE2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `TSEL1`" ]
pub type TSEL1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TSEL1`" ]
pub struct TSEL1_W < 'a > { w : & 'a mut W , } impl < 'a > TSEL1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 3 ) ) | ( ( ( value as u32 ) & 0x07 ) << 3 ) ; self . w } } # [ doc = "Reader of field `TEN1`" ]
pub type TEN1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TEN1`" ]
pub struct TEN1_W < 'a > { w : & 'a mut W , } impl < 'a > TEN1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `BOFF1`" ]
pub type BOFF1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BOFF1`" ]
pub struct BOFF1_W < 'a > { w : & 'a mut W , } impl < 'a > BOFF1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `EN1`" ]
pub type EN1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EN1`" ]
pub struct EN1_W < 'a > { w : & 'a mut W , } impl < 'a > EN1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 13 - DAC channel1 DMA Underrun Interrupt enable" ]
# [ inline ( always ) ]
pub fn dmaudrie1 ( & self ) -> DMAUDRIE1_R { DMAUDRIE1_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - DAC channel1 DMA enable" ]
# [ inline ( always ) ]
pub fn dmaen1 ( & self ) -> DMAEN1_R { DMAEN1_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - DAC channel1 mask/amplitude selector" ]
# [ inline ( always ) ]
pub fn mamp13 ( & self ) -> MAMP13_R { MAMP13_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - MAMP12" ]
# [ inline ( always ) ]
pub fn mamp12 ( & self ) -> MAMP12_R { MAMP12_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - MAMP11" ]
# [ inline ( always ) ]
pub fn mamp11 ( & self ) -> MAMP11_R { MAMP11_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - MAMP10" ]
# [ inline ( always ) ]
pub fn mamp10 ( & self ) -> MAMP10_R { MAMP10_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - DAC channel1 noise/triangle wave generation enable" ]
# [ inline ( always ) ]
pub fn wave1 ( & self ) -> WAVE1_R { WAVE1_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - WAVE2" ]
# [ inline ( always ) ]
pub fn wave2 ( & self ) -> WAVE2_R { WAVE2_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 3:5 - DAC channel1 trigger selection" ]
# [ inline ( always ) ]
pub fn tsel1 ( & self ) -> TSEL1_R { TSEL1_R :: new ( ( ( self . bits >> 3 ) & 0x07 ) as u8 ) } # [ doc = "Bit 2 - DAC channel1 trigger enable" ]
# [ inline ( always ) ]
pub fn ten1 ( & self ) -> TEN1_R { TEN1_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - DAC channel1 output buffer disable" ]
# [ inline ( always ) ]
pub fn boff1 ( & self ) -> BOFF1_R { BOFF1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - DAC channel1 enable" ]
# [ inline ( always ) ]
pub fn en1 ( & self ) -> EN1_R { EN1_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 13 - DAC channel1 DMA Underrun Interrupt enable" ]
# [ inline ( always ) ]
pub fn dmaudrie1 ( & mut self ) -> DMAUDRIE1_W { DMAUDRIE1_W { w : self } } # [ doc = "Bit 12 - DAC channel1 DMA enable" ]
# [ inline ( always ) ]
pub fn dmaen1 ( & mut self ) -> DMAEN1_W { DMAEN1_W { w : self } } # [ doc = "Bit 11 - DAC channel1 mask/amplitude selector" ]
# [ inline ( always ) ]
pub fn mamp13 ( & mut self ) -> MAMP13_W { MAMP13_W { w : self } } # [ doc = "Bit 10 - MAMP12" ]
# [ inline ( always ) ]
pub fn mamp12 ( & mut self ) -> MAMP12_W { MAMP12_W { w : self } } # [ doc = "Bit 9 - MAMP11" ]
# [ inline ( always ) ]
pub fn mamp11 ( & mut self ) -> MAMP11_W { MAMP11_W { w : self } } # [ doc = "Bit 8 - MAMP10" ]
# [ inline ( always ) ]
pub fn mamp10 ( & mut self ) -> MAMP10_W { MAMP10_W { w : self } } # [ doc = "Bit 7 - DAC channel1 noise/triangle wave generation enable" ]
# [ inline ( always ) ]
pub fn wave1 ( & mut self ) -> WAVE1_W { WAVE1_W { w : self } } # [ doc = "Bit 6 - WAVE2" ]
# [ inline ( always ) ]
pub fn wave2 ( & mut self ) -> WAVE2_W { WAVE2_W { w : self } } # [ doc = "Bits 3:5 - DAC channel1 trigger selection" ]
# [ inline ( always ) ]
pub fn tsel1 ( & mut self ) -> TSEL1_W { TSEL1_W { w : self } } # [ doc = "Bit 2 - DAC channel1 trigger enable" ]
# [ inline ( always ) ]
pub fn ten1 ( & mut self ) -> TEN1_W { TEN1_W { w : self } } # [ doc = "Bit 1 - DAC channel1 output buffer disable" ]
# [ inline ( always ) ]
pub fn boff1 ( & mut self ) -> BOFF1_W { BOFF1_W { w : self } } # [ doc = "Bit 0 - DAC channel1 enable" ]
# [ inline ( always ) ]
pub fn en1 ( & mut self ) -> EN1_W { EN1_W { w : self } } } } # [ doc = "software trigger register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swtrigr](swtrigr) module" ]
pub type SWTRIGR = crate :: Reg < u32 , _SWTRIGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SWTRIGR ; # [ doc = "`write(|w| ..)` method takes [swtrigr::W](swtrigr::W) writer structure" ]
impl crate :: Writable for SWTRIGR { } # [ doc = "software trigger register" ]
pub mod swtrigr { # [ doc = "Writer for register SWTRIGR" ]
pub type W = crate :: W < u32 , super :: SWTRIGR > ; # [ doc = "Register SWTRIGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SWTRIGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `SWTRIG1`" ]
pub struct SWTRIG1_W < 'a > { w : & 'a mut W , } impl < 'a > SWTRIG1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 0 - DAC channel1 software trigger" ]
# [ inline ( always ) ]
pub fn swtrig1 ( & mut self ) -> SWTRIG1_W { SWTRIG1_W { w : self } } } } # [ doc = "channel1 12-bit right-aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12r1](dhr12r1) module" ]
pub type DHR12R1 = crate :: Reg < u32 , _DHR12R1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12R1 ; # [ doc = "`read()` method returns [dhr12r1::R](dhr12r1::R) reader structure" ]
impl crate :: Readable for DHR12R1 { } # [ doc = "`write(|w| ..)` method takes [dhr12r1::W](dhr12r1::W) writer structure" ]
impl crate :: Writable for DHR12R1 { } # [ doc = "channel1 12-bit right-aligned data holding register" ]
pub mod dhr12r1 { # [ doc = "Reader of register DHR12R1" ]
pub type R = crate :: R < u32 , super :: DHR12R1 > ; # [ doc = "Writer for register DHR12R1" ]
pub type W = crate :: W < u32 , super :: DHR12R1 > ; # [ doc = "Register DHR12R1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12R1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 0:11 - DAC channel1 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 0:11 - DAC channel1 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "DAC channel1 12-bit left aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12l1](dhr12l1) module" ]
pub type DHR12L1 = crate :: Reg < u32 , _DHR12L1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12L1 ; # [ doc = "`read()` method returns [dhr12l1::R](dhr12l1::R) reader structure" ]
impl crate :: Readable for DHR12L1 { } # [ doc = "`write(|w| ..)` method takes [dhr12l1::W](dhr12l1::W) writer structure" ]
impl crate :: Writable for DHR12L1 { } # [ doc = "DAC channel1 12-bit left aligned data holding register" ]
pub mod dhr12l1 { # [ doc = "Reader of register DHR12L1" ]
pub type R = crate :: R < u32 , super :: DHR12L1 > ; # [ doc = "Writer for register DHR12L1" ]
pub type W = crate :: W < u32 , super :: DHR12L1 > ; # [ doc = "Register DHR12L1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12L1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 4 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 4 ) ; self . w } } impl R { # [ doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( ( self . bits >> 4 ) & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "DAC channel1 8-bit right aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr8r1](dhr8r1) module" ]
pub type DHR8R1 = crate :: Reg < u32 , _DHR8R1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR8R1 ; # [ doc = "`read()` method returns [dhr8r1::R](dhr8r1::R) reader structure" ]
impl crate :: Readable for DHR8R1 { } # [ doc = "`write(|w| ..)` method takes [dhr8r1::W](dhr8r1::W) writer structure" ]
impl crate :: Writable for DHR8R1 { } # [ doc = "DAC channel1 8-bit right aligned data holding register" ]
pub mod dhr8r1 { # [ doc = "Reader of register DHR8R1" ]
pub type R = crate :: R < u32 , super :: DHR8R1 > ; # [ doc = "Writer for register DHR8R1" ]
pub type W = crate :: W < u32 , super :: DHR8R1 > ; # [ doc = "Register DHR8R1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR8R1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - DAC channel1 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - DAC channel1 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "DAC channel1 data output register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dor1](dor1) module" ]
pub type DOR1 = crate :: Reg < u32 , _DOR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DOR1 ; # [ doc = "`read()` method returns [dor1::R](dor1::R) reader structure" ]
impl crate :: Readable for DOR1 { } # [ doc = "DAC channel1 data output register" ]
pub mod dor1 { # [ doc = "Reader of register DOR1" ]
pub type R = crate :: R < u32 , super :: DOR1 > ; # [ doc = "Reader of field `DACC1DOR`" ]
pub type DACC1DOR_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:11 - DAC channel1 data output" ]
# [ inline ( always ) ]
pub fn dacc1dor ( & self ) -> DACC1DOR_R { DACC1DOR_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } } # [ doc = "DAC status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "DAC status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAUDR1`" ]
pub type DMAUDR1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAUDR1`" ]
pub struct DMAUDR1_W < 'a > { w : & 'a mut W , } impl < 'a > DMAUDR1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } impl R { # [ doc = "Bit 13 - DAC channel1 DMA underrun flag" ]
# [ inline ( always ) ]
pub fn dmaudr1 ( & self ) -> DMAUDR1_R { DMAUDR1_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 13 - DAC channel1 DMA underrun flag" ]
# [ inline ( always ) ]
pub fn dmaudr1 ( & mut self ) -> DMAUDR1_W { DMAUDR1_W { w : self } } } } } # [ doc = "Basic timers" ]
pub struct TIM6 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM6 { } impl TIM6 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim6 :: RegisterBlock { 0x4000_1000 as * const _ } } impl Deref for TIM6 { type Target = tim6 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM6 :: ptr ( ) } } } # [ doc = "Basic timers" ]
pub mod tim6 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , _reserved2 : [ u8 ; 4usize ]
, # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved5 : [ u8 ; 12usize ]
, # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "One-pulse mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPM_A { # [ doc = "0: Counter is not stopped at update event" ]
DISABLED = 0 , # [ doc = "1: Counter stops counting at the next update event (clearing the CEN bit)" ]
ENABLED = 1 } impl From < OPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , OPM_A > ; impl OPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPM_A { match self . bits { false => OPM_A :: DISABLED , true => OPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPM_A :: ENABLED } } # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter is not stopped at update event" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: DISABLED ) } # [ doc = "Counter stops counting at the next update event (clearing the CEN bit)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Master mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MMS_A { # [ doc = "0: Use UG bit from TIMx_EGR register" ]
RESET = 0 , # [ doc = "1: Use CNT bit from TIMx_CEN register" ]
ENABLE = 1 , # [ doc = "2: Use the update event" ]
UPDATE = 2 } impl From < MMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MMS`" ]
pub type MMS_R = crate :: R < u8 , MMS_A > ; impl MMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , MMS_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( MMS_A :: RESET ) , 1 => Val ( MMS_A :: ENABLE ) , 2 => Val ( MMS_A :: UPDATE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == MMS_A :: RESET } # [ doc = "Checks if the value of the field is `ENABLE`" ]
# [ inline ( always ) ]
pub fn is_enable ( & self ) -> bool { * self == MMS_A :: ENABLE } # [ doc = "Checks if the value of the field is `UPDATE`" ]
# [ inline ( always ) ]
pub fn is_update ( & self ) -> bool { * self == MMS_A :: UPDATE } } # [ doc = "Write proxy for field `MMS`" ]
pub struct MMS_W < 'a > { w : & 'a mut W , } impl < 'a > MMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MMS_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Use UG bit from TIMx_EGR register" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( MMS_A :: RESET ) } # [ doc = "Use CNT bit from TIMx_CEN register" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( MMS_A :: ENABLE ) } # [ doc = "Use the update event" ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( MMS_A :: UPDATE ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } impl R { # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & self ) -> MMS_R { MMS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } } impl W { # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & mut self ) -> MMS_W { MMS_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Update DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDE_A { # [ doc = "0: Update DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Update DMA request enabled" ]
ENABLED = 1 } impl From < UDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDE`" ]
pub type UDE_R = crate :: R < bool , UDE_A > ; impl UDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDE_A { match self . bits { false => UDE_A :: DISABLED , true => UDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDE_A :: ENABLED } } # [ doc = "Write proxy for field `UDE`" ]
pub struct UDE_W < 'a > { w : & 'a mut W , } impl < 'a > UDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: DISABLED ) } # [ doc = "Update DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & self ) -> UDE_R { UDE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & mut self ) -> UDE_W { UDE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Low counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Low counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Low Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Low Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } } # [ doc = "Basic timers" ]
pub struct TIM7 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM7 { } impl TIM7 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim6 :: RegisterBlock { 0x4000_1400 as * const _ } } impl Deref for TIM7 { type Target = tim6 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM7 :: ptr ( ) } } } # [ doc = "Basic timers" ]
pub struct TIM18 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM18 { } impl TIM18 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim6 :: RegisterBlock { 0x4000_9c00 as * const _ } } impl Deref for TIM18 { type Target = tim6 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM18 :: ptr ( ) } } } # [ doc = "General purpose timers" ]
pub struct TIM13 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM13 { } impl TIM13 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim13 :: RegisterBlock { 0x4000_1c00 as * const _ } } impl Deref for TIM13 { type Target = tim13 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM13 :: ptr ( ) } } } # [ doc = "General purpose timers" ]
pub mod tim13 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , _reserved1 : [ u8 ; 8usize ]
, # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_4_ccmr1 : [ u8 ; 4usize ]
, _reserved5 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , _reserved9 : [ u8 ; 4usize ]
, # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } impl R { # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } } impl W { # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } # [ doc = "Bit 2 - Output compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } } } # [ doc = "capture/compare mode register (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module" ]
pub type CCR = crate :: Reg < u32 , _CCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR ; # [ doc = "`read()` method returns [ccr::R](ccr::R) reader structure" ]
impl crate :: Readable for CCR { } # [ doc = "`write(|w| ..)` method takes [ccr::W](ccr::W) writer structure" ]
impl crate :: Writable for CCR { } # [ doc = "capture/compare register 1" ]
pub mod ccr { # [ doc = "Reader of register CCR%s" ]
pub type R = crate :: R < u32 , super :: CCR > ; # [ doc = "Writer for register CCR%s" ]
pub type W = crate :: W < u32 , super :: CCR > ; # [ doc = "Register CCR%s `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } } } } # [ doc = "General purpose timers" ]
pub struct TIM14 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM14 { } impl TIM14 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim13 :: RegisterBlock { 0x4000_2000 as * const _ } } impl Deref for TIM14 { type Target = tim13 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM14 :: ptr ( ) } } } # [ doc = "General purpose timers" ]
pub struct TIM12 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM12 { } impl TIM12 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim12 :: RegisterBlock { 0x4000_1800 as * const _ } } impl Deref for TIM12 { type Target = tim12 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM12 :: ptr ( ) } } } # [ doc = "General purpose timers" ]
pub mod tim12 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , _reserved1 : [ u8 ; 4usize ]
, # [ doc = "0x08 - slave mode control register" ]
pub smcr : SMCR , # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_5_ccmr1 : [ u8 ; 4usize ]
, _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , _reserved10 : [ u8 ; 4usize ]
, # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR , # [ doc = "0x38 - capture/compare register 1" ]
pub ccr2 : CCR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "One-pulse mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPM_A { # [ doc = "0: Counter is not stopped at update event" ]
DISABLED = 0 , # [ doc = "1: Counter stops counting at the next update event (clearing the CEN bit)" ]
ENABLED = 1 } impl From < OPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , OPM_A > ; impl OPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPM_A { match self . bits { false => OPM_A :: DISABLED , true => OPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPM_A :: ENABLED } } # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter is not stopped at update event" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: DISABLED ) } # [ doc = "Counter stops counting at the next update event (clearing the CEN bit)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } } } # [ doc = "slave mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcr](smcr) module" ]
pub type SMCR = crate :: Reg < u32 , _SMCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMCR ; # [ doc = "`read()` method returns [smcr::R](smcr::R) reader structure" ]
impl crate :: Readable for SMCR { } # [ doc = "`write(|w| ..)` method takes [smcr::W](smcr::W) writer structure" ]
impl crate :: Writable for SMCR { } # [ doc = "slave mode control register" ]
pub mod smcr { # [ doc = "Reader of register SMCR" ]
pub type R = crate :: R < u32 , super :: SMCR > ; # [ doc = "Writer for register SMCR" ]
pub type W = crate :: W < u32 , super :: SMCR > ; # [ doc = "Register SMCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `MSM`" ]
pub type MSM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MSM`" ]
pub struct MSM_W < 'a > { w : & 'a mut W , } impl < 'a > MSM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `TS`" ]
pub type TS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TS`" ]
pub struct TS_W < 'a > { w : & 'a mut W , } impl < 'a > TS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `SMS`" ]
pub type SMS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SMS`" ]
pub struct SMS_W < 'a > { w : & 'a mut W , } impl < 'a > SMS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } impl R { # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & self ) -> MSM_R { MSM_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & self ) -> TS_R { TS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & self ) -> SMS_R { SMS_R :: new ( ( self . bits & 0x07 ) as u8 ) } } impl W { # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & mut self ) -> MSM_W { MSM_W { w : self } } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & mut self ) -> TS_W { TS_W { w : self } } # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & mut self ) -> SMS_W { SMS_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TIE`" ]
pub type TIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TIE`" ]
pub struct TIE_W < 'a > { w : & 'a mut W , } impl < 'a > TIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CC2IE`" ]
pub type CC2IE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2IE`" ]
pub struct CC2IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & self ) -> TIE_R { TIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & self ) -> CC2IE_R { CC2IE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & mut self ) -> TIE_W { TIE_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & mut self ) -> CC2IE_W { CC2IE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC2OF`" ]
pub type CC2OF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2OF`" ]
pub struct CC2OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2OF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `TIF`" ]
pub type TIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TIF`" ]
pub struct TIF_W < 'a > { w : & 'a mut W , } impl < 'a > TIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CC2IF`" ]
pub type CC2IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2IF`" ]
pub struct CC2IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & self ) -> CC2OF_R { CC2OF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & self ) -> TIF_R { TIF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & self ) -> CC2IF_R { CC2IF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & mut self ) -> CC2OF_W { CC2OF_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & mut self ) -> TIF_W { TIF_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & mut self ) -> CC2IF_W { CC2IF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `TG`" ]
pub struct TG_W < 'a > { w : & 'a mut W , } impl < 'a > TG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Write proxy for field `CC2G`" ]
pub struct CC2G_W < 'a > { w : & 'a mut W , } impl < 'a > CC2G_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 6 - Trigger generation" ]
# [ inline ( always ) ]
pub fn tg ( & mut self ) -> TG_W { TG_W { w : self } } # [ doc = "Bit 2 - Capture/compare 2 generation" ]
# [ inline ( always ) ]
pub fn cc2g ( & mut self ) -> CC2G_W { CC2G_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } } } # [ doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC2M`" ]
pub type OC2M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC2M`" ]
pub struct OC2M_W < 'a > { w : & 'a mut W , } impl < 'a > OC2M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Reader of field `OC2PE`" ]
pub type OC2PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2PE`" ]
pub struct OC2PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC2FE`" ]
pub type OC2FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2FE`" ]
pub struct OC2FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:14 - Output Compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & self ) -> OC2M_R { OC2M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output Compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & self ) -> OC2PE_R { OC2PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output Compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & self ) -> OC2FE_R { OC2FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:14 - Output Compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & mut self ) -> OC2M_W { OC2M_W { w : self } } # [ doc = "Bit 11 - Output Compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & mut self ) -> OC2PE_W { OC2PE_W { w : self } } # [ doc = "Bit 10 - Output Compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & mut self ) -> OC2FE_W { OC2FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register 1 (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC2F`" ]
pub type IC2F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2F`" ]
pub struct IC2F_W < 'a > { w : & 'a mut W , } impl < 'a > IC2F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC2PSC`" ]
pub type IC2PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2PSC`" ]
pub struct IC2PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC2PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & self ) -> IC2F_R { IC2F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & self ) -> IC2PSC_R { IC2PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:6 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & mut self ) -> IC2F_W { IC2F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & mut self ) -> IC2PSC_W { IC2PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:6 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC2NP`" ]
pub type CC2NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2NP`" ]
pub struct CC2NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC2NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `CC2P`" ]
pub type CC2P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2P`" ]
pub struct CC2P_W < 'a > { w : & 'a mut W , } impl < 'a > CC2P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2E`" ]
pub type CC2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2E`" ]
pub struct CC2E_W < 'a > { w : & 'a mut W , } impl < 'a > CC2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & self ) -> CC2NP_R { CC2NP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & self ) -> CC2P_R { CC2P_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & self ) -> CC2E_R { CC2E_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & mut self ) -> CC2NP_W { CC2NP_W { w : self } } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & mut self ) -> CC2P_W { CC2P_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & mut self ) -> CC2E_W { CC2E_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module" ]
pub type CCR = crate :: Reg < u32 , _CCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR ; # [ doc = "`read()` method returns [ccr::R](ccr::R) reader structure" ]
impl crate :: Readable for CCR { } # [ doc = "`write(|w| ..)` method takes [ccr::W](ccr::W) writer structure" ]
impl crate :: Writable for CCR { } # [ doc = "capture/compare register 1" ]
pub mod ccr { # [ doc = "Reader of register CCR%s" ]
pub type R = crate :: R < u32 , super :: CCR > ; # [ doc = "Writer for register CCR%s" ]
pub type W = crate :: W < u32 , super :: CCR > ; # [ doc = "Register CCR%s `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } } } } # [ doc = "Digital-to-analog converter" ]
pub struct DAC1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for DAC1 { } impl DAC1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const dac1 :: RegisterBlock { 0x4000_7400 as * const _ } } impl Deref for DAC1 { type Target = dac1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * DAC1 :: ptr ( ) } } } # [ doc = "Digital-to-analog converter" ]
pub mod dac1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register" ]
pub cr : CR , # [ doc = "0x04 - software trigger register" ]
pub swtrigr : SWTRIGR , # [ doc = "0x08 - channel1 12-bit right-aligned data holding register" ]
pub dhr12r1 : DHR12R1 , # [ doc = "0x0c - channel1 12-bit left aligned data holding register" ]
pub dhr12l1 : DHR12L1 , # [ doc = "0x10 - channel1 8-bit right aligned data holding register" ]
pub dhr8r1 : DHR8R1 , # [ doc = "0x14 - channel2 12-bit right aligned data holding register" ]
pub dhr12r2 : DHR12R2 , # [ doc = "0x18 - channel2 12-bit left aligned data holding register" ]
pub dhr12l2 : DHR12L2 , # [ doc = "0x1c - channel2 8-bit right-aligned data holding register" ]
pub dhr8r2 : DHR8R2 , # [ doc = "0x20 - Dual DAC 12-bit right-aligned data holding register" ]
pub dhr12rd : DHR12RD , # [ doc = "0x24 - DUAL DAC 12-bit left aligned data holding register" ]
pub dhr12ld : DHR12LD , # [ doc = "0x28 - DUAL DAC 8-bit right aligned data holding register" ]
pub dhr8rd : DHR8RD , # [ doc = "0x2c - channel1 data output register" ]
pub dor1 : DOR1 , # [ doc = "0x30 - channel2 data output register" ]
pub dor2 : DOR2 , # [ doc = "0x34 - status register" ]
pub sr : SR , } # [ doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAUDRIE2`" ]
pub type DMAUDRIE2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAUDRIE2`" ]
pub struct DMAUDRIE2_W < 'a > { w : & 'a mut W , } impl < 'a > DMAUDRIE2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `DMAEN2`" ]
pub type DMAEN2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAEN2`" ]
pub struct DMAEN2_W < 'a > { w : & 'a mut W , } impl < 'a > DMAEN2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `MAMP2`" ]
pub type MAMP2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MAMP2`" ]
pub struct MAMP2_W < 'a > { w : & 'a mut W , } impl < 'a > MAMP2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `WAVE2`" ]
pub type WAVE2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `WAVE2`" ]
pub struct WAVE2_W < 'a > { w : & 'a mut W , } impl < 'a > WAVE2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Reader of field `TSEL2`" ]
pub type TSEL2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TSEL2`" ]
pub struct TSEL2_W < 'a > { w : & 'a mut W , } impl < 'a > TSEL2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 19 ) ) | ( ( ( value as u32 ) & 0x07 ) << 19 ) ; self . w } } # [ doc = "Reader of field `TEN2`" ]
pub type TEN2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TEN2`" ]
pub struct TEN2_W < 'a > { w : & 'a mut W , } impl < 'a > TEN2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `BOFF2`" ]
pub type BOFF2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BOFF2`" ]
pub struct BOFF2_W < 'a > { w : & 'a mut W , } impl < 'a > BOFF2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `EN2`" ]
pub type EN2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EN2`" ]
pub struct EN2_W < 'a > { w : & 'a mut W , } impl < 'a > EN2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `DMAUDRIE1`" ]
pub type DMAUDRIE1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAUDRIE1`" ]
pub struct DMAUDRIE1_W < 'a > { w : & 'a mut W , } impl < 'a > DMAUDRIE1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `DMAEN1`" ]
pub type DMAEN1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAEN1`" ]
pub struct DMAEN1_W < 'a > { w : & 'a mut W , } impl < 'a > DMAEN1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `MAMP1`" ]
pub type MAMP1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MAMP1`" ]
pub struct MAMP1_W < 'a > { w : & 'a mut W , } impl < 'a > MAMP1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Reader of field `WAVE1`" ]
pub type WAVE1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `WAVE1`" ]
pub struct WAVE1_W < 'a > { w : & 'a mut W , } impl < 'a > WAVE1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Reader of field `TSEL1`" ]
pub type TSEL1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TSEL1`" ]
pub struct TSEL1_W < 'a > { w : & 'a mut W , } impl < 'a > TSEL1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 3 ) ) | ( ( ( value as u32 ) & 0x07 ) << 3 ) ; self . w } } # [ doc = "Reader of field `TEN1`" ]
pub type TEN1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TEN1`" ]
pub struct TEN1_W < 'a > { w : & 'a mut W , } impl < 'a > TEN1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `BOFF1`" ]
pub type BOFF1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BOFF1`" ]
pub struct BOFF1_W < 'a > { w : & 'a mut W , } impl < 'a > BOFF1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `EN1`" ]
pub type EN1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EN1`" ]
pub struct EN1_W < 'a > { w : & 'a mut W , } impl < 'a > EN1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 29 - DAC channel2 DMA underrun interrupt enable" ]
# [ inline ( always ) ]
pub fn dmaudrie2 ( & self ) -> DMAUDRIE2_R { DMAUDRIE2_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - DAC channel2 DMA enable" ]
# [ inline ( always ) ]
pub fn dmaen2 ( & self ) -> DMAEN2_R { DMAEN2_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bits 24:27 - DAC channel2 mask/amplitude selector" ]
# [ inline ( always ) ]
pub fn mamp2 ( & self ) -> MAMP2_R { MAMP2_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 22:23 - DAC channel2 noise/triangle wave generation enable" ]
# [ inline ( always ) ]
pub fn wave2 ( & self ) -> WAVE2_R { WAVE2_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 19:21 - DAC channel2 trigger selection" ]
# [ inline ( always ) ]
pub fn tsel2 ( & self ) -> TSEL2_R { TSEL2_R :: new ( ( ( self . bits >> 19 ) & 0x07 ) as u8 ) } # [ doc = "Bit 18 - DAC channel2 trigger enable" ]
# [ inline ( always ) ]
pub fn ten2 ( & self ) -> TEN2_R { TEN2_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - DAC channel2 output buffer disable" ]
# [ inline ( always ) ]
pub fn boff2 ( & self ) -> BOFF2_R { BOFF2_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - DAC channel2 enable" ]
# [ inline ( always ) ]
pub fn en2 ( & self ) -> EN2_R { EN2_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - DAC channel1 DMA Underrun Interrupt enable" ]
# [ inline ( always ) ]
pub fn dmaudrie1 ( & self ) -> DMAUDRIE1_R { DMAUDRIE1_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - DAC channel1 DMA enable" ]
# [ inline ( always ) ]
pub fn dmaen1 ( & self ) -> DMAEN1_R { DMAEN1_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:11 - DAC channel1 mask/amplitude selector" ]
# [ inline ( always ) ]
pub fn mamp1 ( & self ) -> MAMP1_R { MAMP1_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 6:7 - DAC channel1 noise/triangle wave generation enable" ]
# [ inline ( always ) ]
pub fn wave1 ( & self ) -> WAVE1_R { WAVE1_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 3:5 - DAC channel1 trigger selection" ]
# [ inline ( always ) ]
pub fn tsel1 ( & self ) -> TSEL1_R { TSEL1_R :: new ( ( ( self . bits >> 3 ) & 0x07 ) as u8 ) } # [ doc = "Bit 2 - DAC channel1 trigger enable" ]
# [ inline ( always ) ]
pub fn ten1 ( & self ) -> TEN1_R { TEN1_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - DAC channel1 output buffer disable" ]
# [ inline ( always ) ]
pub fn boff1 ( & self ) -> BOFF1_R { BOFF1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - DAC channel1 enable" ]
# [ inline ( always ) ]
pub fn en1 ( & self ) -> EN1_R { EN1_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 29 - DAC channel2 DMA underrun interrupt enable" ]
# [ inline ( always ) ]
pub fn dmaudrie2 ( & mut self ) -> DMAUDRIE2_W { DMAUDRIE2_W { w : self } } # [ doc = "Bit 28 - DAC channel2 DMA enable" ]
# [ inline ( always ) ]
pub fn dmaen2 ( & mut self ) -> DMAEN2_W { DMAEN2_W { w : self } } # [ doc = "Bits 24:27 - DAC channel2 mask/amplitude selector" ]
# [ inline ( always ) ]
pub fn mamp2 ( & mut self ) -> MAMP2_W { MAMP2_W { w : self } } # [ doc = "Bits 22:23 - DAC channel2 noise/triangle wave generation enable" ]
# [ inline ( always ) ]
pub fn wave2 ( & mut self ) -> WAVE2_W { WAVE2_W { w : self } } # [ doc = "Bits 19:21 - DAC channel2 trigger selection" ]
# [ inline ( always ) ]
pub fn tsel2 ( & mut self ) -> TSEL2_W { TSEL2_W { w : self } } # [ doc = "Bit 18 - DAC channel2 trigger enable" ]
# [ inline ( always ) ]
pub fn ten2 ( & mut self ) -> TEN2_W { TEN2_W { w : self } } # [ doc = "Bit 17 - DAC channel2 output buffer disable" ]
# [ inline ( always ) ]
pub fn boff2 ( & mut self ) -> BOFF2_W { BOFF2_W { w : self } } # [ doc = "Bit 16 - DAC channel2 enable" ]
# [ inline ( always ) ]
pub fn en2 ( & mut self ) -> EN2_W { EN2_W { w : self } } # [ doc = "Bit 13 - DAC channel1 DMA Underrun Interrupt enable" ]
# [ inline ( always ) ]
pub fn dmaudrie1 ( & mut self ) -> DMAUDRIE1_W { DMAUDRIE1_W { w : self } } # [ doc = "Bit 12 - DAC channel1 DMA enable" ]
# [ inline ( always ) ]
pub fn dmaen1 ( & mut self ) -> DMAEN1_W { DMAEN1_W { w : self } } # [ doc = "Bits 8:11 - DAC channel1 mask/amplitude selector" ]
# [ inline ( always ) ]
pub fn mamp1 ( & mut self ) -> MAMP1_W { MAMP1_W { w : self } } # [ doc = "Bits 6:7 - DAC channel1 noise/triangle wave generation enable" ]
# [ inline ( always ) ]
pub fn wave1 ( & mut self ) -> WAVE1_W { WAVE1_W { w : self } } # [ doc = "Bits 3:5 - DAC channel1 trigger selection" ]
# [ inline ( always ) ]
pub fn tsel1 ( & mut self ) -> TSEL1_W { TSEL1_W { w : self } } # [ doc = "Bit 2 - DAC channel1 trigger enable" ]
# [ inline ( always ) ]
pub fn ten1 ( & mut self ) -> TEN1_W { TEN1_W { w : self } } # [ doc = "Bit 1 - DAC channel1 output buffer disable" ]
# [ inline ( always ) ]
pub fn boff1 ( & mut self ) -> BOFF1_W { BOFF1_W { w : self } } # [ doc = "Bit 0 - DAC channel1 enable" ]
# [ inline ( always ) ]
pub fn en1 ( & mut self ) -> EN1_W { EN1_W { w : self } } } } # [ doc = "software trigger register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swtrigr](swtrigr) module" ]
pub type SWTRIGR = crate :: Reg < u32 , _SWTRIGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SWTRIGR ; # [ doc = "`write(|w| ..)` method takes [swtrigr::W](swtrigr::W) writer structure" ]
impl crate :: Writable for SWTRIGR { } # [ doc = "software trigger register" ]
pub mod swtrigr { # [ doc = "Writer for register SWTRIGR" ]
pub type W = crate :: W < u32 , super :: SWTRIGR > ; # [ doc = "Register SWTRIGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SWTRIGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Write proxy for field `SWTRIG2`" ]
pub struct SWTRIG2_W < 'a > { w : & 'a mut W , } impl < 'a > SWTRIG2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Write proxy for field `SWTRIG1`" ]
pub struct SWTRIG1_W < 'a > { w : & 'a mut W , } impl < 'a > SWTRIG1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 1 - DAC channel2 software trigger" ]
# [ inline ( always ) ]
pub fn swtrig2 ( & mut self ) -> SWTRIG2_W { SWTRIG2_W { w : self } } # [ doc = "Bit 0 - DAC channel1 software trigger" ]
# [ inline ( always ) ]
pub fn swtrig1 ( & mut self ) -> SWTRIG1_W { SWTRIG1_W { w : self } } } } # [ doc = "channel1 12-bit right-aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12r1](dhr12r1) module" ]
pub type DHR12R1 = crate :: Reg < u32 , _DHR12R1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12R1 ; # [ doc = "`read()` method returns [dhr12r1::R](dhr12r1::R) reader structure" ]
impl crate :: Readable for DHR12R1 { } # [ doc = "`write(|w| ..)` method takes [dhr12r1::W](dhr12r1::W) writer structure" ]
impl crate :: Writable for DHR12R1 { } # [ doc = "channel1 12-bit right-aligned data holding register" ]
pub mod dhr12r1 { # [ doc = "Reader of register DHR12R1" ]
pub type R = crate :: R < u32 , super :: DHR12R1 > ; # [ doc = "Writer for register DHR12R1" ]
pub type W = crate :: W < u32 , super :: DHR12R1 > ; # [ doc = "Register DHR12R1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12R1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 0:11 - DAC channel1 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 0:11 - DAC channel1 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "channel1 12-bit left aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12l1](dhr12l1) module" ]
pub type DHR12L1 = crate :: Reg < u32 , _DHR12L1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12L1 ; # [ doc = "`read()` method returns [dhr12l1::R](dhr12l1::R) reader structure" ]
impl crate :: Readable for DHR12L1 { } # [ doc = "`write(|w| ..)` method takes [dhr12l1::W](dhr12l1::W) writer structure" ]
impl crate :: Writable for DHR12L1 { } # [ doc = "channel1 12-bit left aligned data holding register" ]
pub mod dhr12l1 { # [ doc = "Reader of register DHR12L1" ]
pub type R = crate :: R < u32 , super :: DHR12L1 > ; # [ doc = "Writer for register DHR12L1" ]
pub type W = crate :: W < u32 , super :: DHR12L1 > ; # [ doc = "Register DHR12L1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12L1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 4 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 4 ) ; self . w } } impl R { # [ doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( ( self . bits >> 4 ) & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "channel1 8-bit right aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr8r1](dhr8r1) module" ]
pub type DHR8R1 = crate :: Reg < u32 , _DHR8R1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR8R1 ; # [ doc = "`read()` method returns [dhr8r1::R](dhr8r1::R) reader structure" ]
impl crate :: Readable for DHR8R1 { } # [ doc = "`write(|w| ..)` method takes [dhr8r1::W](dhr8r1::W) writer structure" ]
impl crate :: Writable for DHR8R1 { } # [ doc = "channel1 8-bit right aligned data holding register" ]
pub mod dhr8r1 { # [ doc = "Reader of register DHR8R1" ]
pub type R = crate :: R < u32 , super :: DHR8R1 > ; # [ doc = "Writer for register DHR8R1" ]
pub type W = crate :: W < u32 , super :: DHR8R1 > ; # [ doc = "Register DHR8R1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR8R1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - DAC channel1 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - DAC channel1 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "channel2 12-bit right aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12r2](dhr12r2) module" ]
pub type DHR12R2 = crate :: Reg < u32 , _DHR12R2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12R2 ; # [ doc = "`read()` method returns [dhr12r2::R](dhr12r2::R) reader structure" ]
impl crate :: Readable for DHR12R2 { } # [ doc = "`write(|w| ..)` method takes [dhr12r2::W](dhr12r2::W) writer structure" ]
impl crate :: Writable for DHR12R2 { } # [ doc = "channel2 12-bit right aligned data holding register" ]
pub mod dhr12r2 { # [ doc = "Reader of register DHR12R2" ]
pub type R = crate :: R < u32 , super :: DHR12R2 > ; # [ doc = "Writer for register DHR12R2" ]
pub type W = crate :: W < u32 , super :: DHR12R2 > ; # [ doc = "Register DHR12R2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12R2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC2DHR`" ]
pub type DACC2DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC2DHR`" ]
pub struct DACC2DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC2DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 0:11 - DAC channel2 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & self ) -> DACC2DHR_R { DACC2DHR_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 0:11 - DAC channel2 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & mut self ) -> DACC2DHR_W { DACC2DHR_W { w : self } } } } # [ doc = "channel2 12-bit left aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12l2](dhr12l2) module" ]
pub type DHR12L2 = crate :: Reg < u32 , _DHR12L2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12L2 ; # [ doc = "`read()` method returns [dhr12l2::R](dhr12l2::R) reader structure" ]
impl crate :: Readable for DHR12L2 { } # [ doc = "`write(|w| ..)` method takes [dhr12l2::W](dhr12l2::W) writer structure" ]
impl crate :: Writable for DHR12L2 { } # [ doc = "channel2 12-bit left aligned data holding register" ]
pub mod dhr12l2 { # [ doc = "Reader of register DHR12L2" ]
pub type R = crate :: R < u32 , super :: DHR12L2 > ; # [ doc = "Writer for register DHR12L2" ]
pub type W = crate :: W < u32 , super :: DHR12L2 > ; # [ doc = "Register DHR12L2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12L2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC2DHR`" ]
pub type DACC2DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC2DHR`" ]
pub struct DACC2DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC2DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 4 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 4 ) ; self . w } } impl R { # [ doc = "Bits 4:15 - DAC channel2 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & self ) -> DACC2DHR_R { DACC2DHR_R :: new ( ( ( self . bits >> 4 ) & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 4:15 - DAC channel2 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & mut self ) -> DACC2DHR_W { DACC2DHR_W { w : self } } } } # [ doc = "channel2 8-bit right-aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr8r2](dhr8r2) module" ]
pub type DHR8R2 = crate :: Reg < u32 , _DHR8R2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR8R2 ; # [ doc = "`read()` method returns [dhr8r2::R](dhr8r2::R) reader structure" ]
impl crate :: Readable for DHR8R2 { } # [ doc = "`write(|w| ..)` method takes [dhr8r2::W](dhr8r2::W) writer structure" ]
impl crate :: Writable for DHR8R2 { } # [ doc = "channel2 8-bit right-aligned data holding register" ]
pub mod dhr8r2 { # [ doc = "Reader of register DHR8R2" ]
pub type R = crate :: R < u32 , super :: DHR8R2 > ; # [ doc = "Writer for register DHR8R2" ]
pub type W = crate :: W < u32 , super :: DHR8R2 > ; # [ doc = "Register DHR8R2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR8R2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC2DHR`" ]
pub type DACC2DHR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DACC2DHR`" ]
pub struct DACC2DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC2DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 0:7 - DAC channel2 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & self ) -> DACC2DHR_R { DACC2DHR_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 0:7 - DAC channel2 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & mut self ) -> DACC2DHR_W { DACC2DHR_W { w : self } } } } # [ doc = "Dual DAC 12-bit right-aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12rd](dhr12rd) module" ]
pub type DHR12RD = crate :: Reg < u32 , _DHR12RD > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12RD ; # [ doc = "`read()` method returns [dhr12rd::R](dhr12rd::R) reader structure" ]
impl crate :: Readable for DHR12RD { } # [ doc = "`write(|w| ..)` method takes [dhr12rd::W](dhr12rd::W) writer structure" ]
impl crate :: Writable for DHR12RD { } # [ doc = "Dual DAC 12-bit right-aligned data holding register" ]
pub mod dhr12rd { # [ doc = "Reader of register DHR12RD" ]
pub type R = crate :: R < u32 , super :: DHR12RD > ; # [ doc = "Writer for register DHR12RD" ]
pub type W = crate :: W < u32 , super :: DHR12RD > ; # [ doc = "Register DHR12RD `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12RD { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC2DHR`" ]
pub type DACC2DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC2DHR`" ]
pub struct DACC2DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC2DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 16 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 16 ) ; self . w } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 16:27 - DAC channel2 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & self ) -> DACC2DHR_R { DACC2DHR_R :: new ( ( ( self . bits >> 16 ) & 0x0fff ) as u16 ) } # [ doc = "Bits 0:11 - DAC channel1 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 16:27 - DAC channel2 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & mut self ) -> DACC2DHR_W { DACC2DHR_W { w : self } } # [ doc = "Bits 0:11 - DAC channel1 12-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "DUAL DAC 12-bit left aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr12ld](dhr12ld) module" ]
pub type DHR12LD = crate :: Reg < u32 , _DHR12LD > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR12LD ; # [ doc = "`read()` method returns [dhr12ld::R](dhr12ld::R) reader structure" ]
impl crate :: Readable for DHR12LD { } # [ doc = "`write(|w| ..)` method takes [dhr12ld::W](dhr12ld::W) writer structure" ]
impl crate :: Writable for DHR12LD { } # [ doc = "DUAL DAC 12-bit left aligned data holding register" ]
pub mod dhr12ld { # [ doc = "Reader of register DHR12LD" ]
pub type R = crate :: R < u32 , super :: DHR12LD > ; # [ doc = "Writer for register DHR12LD" ]
pub type W = crate :: W < u32 , super :: DHR12LD > ; # [ doc = "Register DHR12LD `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR12LD { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC2DHR`" ]
pub type DACC2DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC2DHR`" ]
pub struct DACC2DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC2DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 20 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 20 ) ; self . w } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 4 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 4 ) ; self . w } } impl R { # [ doc = "Bits 20:31 - DAC channel2 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & self ) -> DACC2DHR_R { DACC2DHR_R :: new ( ( ( self . bits >> 20 ) & 0x0fff ) as u16 ) } # [ doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( ( self . bits >> 4 ) & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 20:31 - DAC channel2 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & mut self ) -> DACC2DHR_W { DACC2DHR_W { w : self } } # [ doc = "Bits 4:15 - DAC channel1 12-bit left-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "DUAL DAC 8-bit right aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhr8rd](dhr8rd) module" ]
pub type DHR8RD = crate :: Reg < u32 , _DHR8RD > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DHR8RD ; # [ doc = "`read()` method returns [dhr8rd::R](dhr8rd::R) reader structure" ]
impl crate :: Readable for DHR8RD { } # [ doc = "`write(|w| ..)` method takes [dhr8rd::W](dhr8rd::W) writer structure" ]
impl crate :: Writable for DHR8RD { } # [ doc = "DUAL DAC 8-bit right aligned data holding register" ]
pub mod dhr8rd { # [ doc = "Reader of register DHR8RD" ]
pub type R = crate :: R < u32 , super :: DHR8RD > ; # [ doc = "Writer for register DHR8RD" ]
pub type W = crate :: W < u32 , super :: DHR8RD > ; # [ doc = "Register DHR8RD `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DHR8RD { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DACC2DHR`" ]
pub type DACC2DHR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DACC2DHR`" ]
pub struct DACC2DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC2DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `DACC1DHR`" ]
pub type DACC1DHR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DACC1DHR`" ]
pub struct DACC1DHR_W < 'a > { w : & 'a mut W , } impl < 'a > DACC1DHR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 8:15 - DAC channel2 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & self ) -> DACC2DHR_R { DACC2DHR_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - DAC channel1 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & self ) -> DACC1DHR_R { DACC1DHR_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 8:15 - DAC channel2 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc2dhr ( & mut self ) -> DACC2DHR_W { DACC2DHR_W { w : self } } # [ doc = "Bits 0:7 - DAC channel1 8-bit right-aligned data" ]
# [ inline ( always ) ]
pub fn dacc1dhr ( & mut self ) -> DACC1DHR_W { DACC1DHR_W { w : self } } } } # [ doc = "channel1 data output register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dor1](dor1) module" ]
pub type DOR1 = crate :: Reg < u32 , _DOR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DOR1 ; # [ doc = "`read()` method returns [dor1::R](dor1::R) reader structure" ]
impl crate :: Readable for DOR1 { } # [ doc = "channel1 data output register" ]
pub mod dor1 { # [ doc = "Reader of register DOR1" ]
pub type R = crate :: R < u32 , super :: DOR1 > ; # [ doc = "Reader of field `DACC1DOR`" ]
pub type DACC1DOR_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:11 - DAC channel1 data output" ]
# [ inline ( always ) ]
pub fn dacc1dor ( & self ) -> DACC1DOR_R { DACC1DOR_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } } # [ doc = "channel2 data output register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dor2](dor2) module" ]
pub type DOR2 = crate :: Reg < u32 , _DOR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DOR2 ; # [ doc = "`read()` method returns [dor2::R](dor2::R) reader structure" ]
impl crate :: Readable for DOR2 { } # [ doc = "channel2 data output register" ]
pub mod dor2 { # [ doc = "Reader of register DOR2" ]
pub type R = crate :: R < u32 , super :: DOR2 > ; # [ doc = "Reader of field `DACC2DOR`" ]
pub type DACC2DOR_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:11 - DAC channel2 data output" ]
# [ inline ( always ) ]
pub fn dacc2dor ( & self ) -> DACC2DOR_R { DACC2DOR_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAUDR2`" ]
pub type DMAUDR2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAUDR2`" ]
pub struct DMAUDR2_W < 'a > { w : & 'a mut W , } impl < 'a > DMAUDR2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `DMAUDR1`" ]
pub type DMAUDR1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DMAUDR1`" ]
pub struct DMAUDR1_W < 'a > { w : & 'a mut W , } impl < 'a > DMAUDR1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } impl R { # [ doc = "Bit 29 - DAC channel2 DMA underrun flag" ]
# [ inline ( always ) ]
pub fn dmaudr2 ( & self ) -> DMAUDR2_R { DMAUDR2_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - DAC channel1 DMA underrun flag" ]
# [ inline ( always ) ]
pub fn dmaudr1 ( & self ) -> DMAUDR1_R { DMAUDR1_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 29 - DAC channel2 DMA underrun flag" ]
# [ inline ( always ) ]
pub fn dmaudr2 ( & mut self ) -> DMAUDR2_W { DMAUDR2_W { w : self } } # [ doc = "Bit 13 - DAC channel1 DMA underrun flag" ]
# [ inline ( always ) ]
pub fn dmaudr1 ( & mut self ) -> DMAUDR1_W { DMAUDR1_W { w : self } } } } } # [ doc = "Debug support" ]
pub struct DBGMCU { _marker : PhantomData < * const ( ) > } unsafe impl Send for DBGMCU { } impl DBGMCU { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const dbgmcu :: RegisterBlock { 0xe004_2000 as * const _ } } impl Deref for DBGMCU { type Target = dbgmcu :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * DBGMCU :: ptr ( ) } } } # [ doc = "Debug support" ]
pub mod dbgmcu { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - MCU Device ID Code Register" ]
pub idcode : IDCODE , # [ doc = "0x04 - Debug MCU Configuration Register" ]
pub cr : CR , # [ doc = "0x08 - APB Low Freeze Register" ]
pub apb1_fz : APB1_FZ , # [ doc = "0x0c - APB High Freeze Register" ]
pub apb2fz : APB2FZ , } # [ doc = "MCU Device ID Code Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idcode](idcode) module" ]
pub type IDCODE = crate :: Reg < u32 , _IDCODE > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IDCODE ; # [ doc = "`read()` method returns [idcode::R](idcode::R) reader structure" ]
impl crate :: Readable for IDCODE { } # [ doc = "MCU Device ID Code Register" ]
pub mod idcode { # [ doc = "Reader of register IDCODE" ]
pub type R = crate :: R < u32 , super :: IDCODE > ; # [ doc = "Reader of field `DEV_ID`" ]
pub type DEV_ID_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `REV_ID`" ]
pub type REV_ID_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:11 - Device Identifier" ]
# [ inline ( always ) ]
pub fn dev_id ( & self ) -> DEV_ID_R { DEV_ID_R :: new ( ( self . bits & 0x0fff ) as u16 ) } # [ doc = "Bits 16:31 - Revision Identifier" ]
# [ inline ( always ) ]
pub fn rev_id ( & self ) -> REV_ID_R { REV_ID_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } } } # [ doc = "Debug MCU Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "Debug MCU Configuration Register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBG_SLEEP`" ]
pub type DBG_SLEEP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_SLEEP`" ]
pub struct DBG_SLEEP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_SLEEP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `DBG_STOP`" ]
pub type DBG_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_STOP`" ]
pub struct DBG_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `DBG_STANDBY`" ]
pub type DBG_STANDBY_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_STANDBY`" ]
pub struct DBG_STANDBY_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_STANDBY_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `TRACE_IOEN`" ]
pub type TRACE_IOEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TRACE_IOEN`" ]
pub struct TRACE_IOEN_W < 'a > { w : & 'a mut W , } impl < 'a > TRACE_IOEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `TRACE_MODE`" ]
pub type TRACE_MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRACE_MODE`" ]
pub struct TRACE_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > TRACE_MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } impl R { # [ doc = "Bit 0 - Debug Sleep mode" ]
# [ inline ( always ) ]
pub fn dbg_sleep ( & self ) -> DBG_SLEEP_R { DBG_SLEEP_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Debug Stop Mode" ]
# [ inline ( always ) ]
pub fn dbg_stop ( & self ) -> DBG_STOP_R { DBG_STOP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Debug Standby Mode" ]
# [ inline ( always ) ]
pub fn dbg_standby ( & self ) -> DBG_STANDBY_R { DBG_STANDBY_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Trace pin assignment control" ]
# [ inline ( always ) ]
pub fn trace_ioen ( & self ) -> TRACE_IOEN_R { TRACE_IOEN_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bits 6:7 - Trace pin assignment control" ]
# [ inline ( always ) ]
pub fn trace_mode ( & self ) -> TRACE_MODE_R { TRACE_MODE_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bit 0 - Debug Sleep mode" ]
# [ inline ( always ) ]
pub fn dbg_sleep ( & mut self ) -> DBG_SLEEP_W { DBG_SLEEP_W { w : self } } # [ doc = "Bit 1 - Debug Stop Mode" ]
# [ inline ( always ) ]
pub fn dbg_stop ( & mut self ) -> DBG_STOP_W { DBG_STOP_W { w : self } } # [ doc = "Bit 2 - Debug Standby Mode" ]
# [ inline ( always ) ]
pub fn dbg_standby ( & mut self ) -> DBG_STANDBY_W { DBG_STANDBY_W { w : self } } # [ doc = "Bit 5 - Trace pin assignment control" ]
# [ inline ( always ) ]
pub fn trace_ioen ( & mut self ) -> TRACE_IOEN_W { TRACE_IOEN_W { w : self } } # [ doc = "Bits 6:7 - Trace pin assignment control" ]
# [ inline ( always ) ]
pub fn trace_mode ( & mut self ) -> TRACE_MODE_W { TRACE_MODE_W { w : self } } } } # [ doc = "APB Low Freeze Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1_fz](apb1_fz) module" ]
pub type APB1_FZ = crate :: Reg < u32 , _APB1_FZ > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _APB1_FZ ; # [ doc = "`read()` method returns [apb1_fz::R](apb1_fz::R) reader structure" ]
impl crate :: Readable for APB1_FZ { } # [ doc = "`write(|w| ..)` method takes [apb1_fz::W](apb1_fz::W) writer structure" ]
impl crate :: Writable for APB1_FZ { } # [ doc = "APB Low Freeze Register" ]
pub mod apb1_fz { # [ doc = "Reader of register APB1_FZ" ]
pub type R = crate :: R < u32 , super :: APB1_FZ > ; # [ doc = "Writer for register APB1_FZ" ]
pub type W = crate :: W < u32 , super :: APB1_FZ > ; # [ doc = "Register APB1_FZ `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: APB1_FZ { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBG_TIM2_STOP`" ]
pub type DBG_TIM2_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM2_STOP`" ]
pub struct DBG_TIM2_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM2_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM3_STOP`" ]
pub type DBG_TIM3_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM3_STOP`" ]
pub struct DBG_TIM3_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM3_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM4_STOP`" ]
pub type DBG_TIM4_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM4_STOP`" ]
pub struct DBG_TIM4_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM4_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM5_STOP`" ]
pub type DBG_TIM5_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM5_STOP`" ]
pub struct DBG_TIM5_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM5_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM6_STOP`" ]
pub type DBG_TIM6_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM6_STOP`" ]
pub struct DBG_TIM6_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM6_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM7_STOP`" ]
pub type DBG_TIM7_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM7_STOP`" ]
pub struct DBG_TIM7_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM7_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM12_STOP`" ]
pub type DBG_TIM12_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM12_STOP`" ]
pub struct DBG_TIM12_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM12_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM13_STOP`" ]
pub type DBG_TIM13_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM13_STOP`" ]
pub struct DBG_TIM13_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM13_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `DBG_TIMER14_STOP`" ]
pub type DBG_TIMER14_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIMER14_STOP`" ]
pub struct DBG_TIMER14_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIMER14_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM18_STOP`" ]
pub type DBG_TIM18_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM18_STOP`" ]
pub struct DBG_TIM18_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM18_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `DBG_RTC_STOP`" ]
pub type DBG_RTC_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_RTC_STOP`" ]
pub struct DBG_RTC_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_RTC_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `DBG_WWDG_STOP`" ]
pub type DBG_WWDG_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_WWDG_STOP`" ]
pub struct DBG_WWDG_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_WWDG_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `DBG_IWDG_STOP`" ]
pub type DBG_IWDG_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_IWDG_STOP`" ]
pub struct DBG_IWDG_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_IWDG_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `I2C1_SMBUS_TIMEOUT`" ]
pub type I2C1_SMBUS_TIMEOUT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `I2C1_SMBUS_TIMEOUT`" ]
pub struct I2C1_SMBUS_TIMEOUT_W < 'a > { w : & 'a mut W , } impl < 'a > I2C1_SMBUS_TIMEOUT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Reader of field `I2C2_SMBUS_TIMEOUT`" ]
pub type I2C2_SMBUS_TIMEOUT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `I2C2_SMBUS_TIMEOUT`" ]
pub struct I2C2_SMBUS_TIMEOUT_W < 'a > { w : & 'a mut W , } impl < 'a > I2C2_SMBUS_TIMEOUT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Reader of field `DBG_CAN_STOP`" ]
pub type DBG_CAN_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_CAN_STOP`" ]
pub struct DBG_CAN_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_CAN_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } impl R { # [ doc = "Bit 0 - Debug Timer 2 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim2_stop ( & self ) -> DBG_TIM2_STOP_R { DBG_TIM2_STOP_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Debug Timer 3 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim3_stop ( & self ) -> DBG_TIM3_STOP_R { DBG_TIM3_STOP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Debug Timer 4 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim4_stop ( & self ) -> DBG_TIM4_STOP_R { DBG_TIM4_STOP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Debug Timer 5 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim5_stop ( & self ) -> DBG_TIM5_STOP_R { DBG_TIM5_STOP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Debug Timer 6 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim6_stop ( & self ) -> DBG_TIM6_STOP_R { DBG_TIM6_STOP_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Debug Timer 7 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim7_stop ( & self ) -> DBG_TIM7_STOP_R { DBG_TIM7_STOP_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Debug Timer 12 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim12_stop ( & self ) -> DBG_TIM12_STOP_R { DBG_TIM12_STOP_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Debug Timer 13 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim13_stop ( & self ) -> DBG_TIM13_STOP_R { DBG_TIM13_STOP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Debug Timer 14 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_timer14_stop ( & self ) -> DBG_TIMER14_STOP_R { DBG_TIMER14_STOP_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Debug Timer 18 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim18_stop ( & self ) -> DBG_TIM18_STOP_R { DBG_TIM18_STOP_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Debug RTC stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_rtc_stop ( & self ) -> DBG_RTC_STOP_R { DBG_RTC_STOP_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Debug Window Wachdog stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_wwdg_stop ( & self ) -> DBG_WWDG_STOP_R { DBG_WWDG_STOP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Debug Independent Wachdog stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_iwdg_stop ( & self ) -> DBG_IWDG_STOP_R { DBG_IWDG_STOP_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - SMBUS timeout mode stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn i2c1_smbus_timeout ( & self ) -> I2C1_SMBUS_TIMEOUT_R { I2C1_SMBUS_TIMEOUT_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - SMBUS timeout mode stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn i2c2_smbus_timeout ( & self ) -> I2C2_SMBUS_TIMEOUT_R { I2C2_SMBUS_TIMEOUT_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Debug CAN stopped when core is halted" ]
# [ inline ( always ) ]
pub fn dbg_can_stop ( & self ) -> DBG_CAN_STOP_R { DBG_CAN_STOP_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Debug Timer 2 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim2_stop ( & mut self ) -> DBG_TIM2_STOP_W { DBG_TIM2_STOP_W { w : self } } # [ doc = "Bit 1 - Debug Timer 3 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim3_stop ( & mut self ) -> DBG_TIM3_STOP_W { DBG_TIM3_STOP_W { w : self } } # [ doc = "Bit 2 - Debug Timer 4 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim4_stop ( & mut self ) -> DBG_TIM4_STOP_W { DBG_TIM4_STOP_W { w : self } } # [ doc = "Bit 3 - Debug Timer 5 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim5_stop ( & mut self ) -> DBG_TIM5_STOP_W { DBG_TIM5_STOP_W { w : self } } # [ doc = "Bit 4 - Debug Timer 6 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim6_stop ( & mut self ) -> DBG_TIM6_STOP_W { DBG_TIM6_STOP_W { w : self } } # [ doc = "Bit 5 - Debug Timer 7 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim7_stop ( & mut self ) -> DBG_TIM7_STOP_W { DBG_TIM7_STOP_W { w : self } } # [ doc = "Bit 6 - Debug Timer 12 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim12_stop ( & mut self ) -> DBG_TIM12_STOP_W { DBG_TIM12_STOP_W { w : self } } # [ doc = "Bit 7 - Debug Timer 13 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim13_stop ( & mut self ) -> DBG_TIM13_STOP_W { DBG_TIM13_STOP_W { w : self } } # [ doc = "Bit 8 - Debug Timer 14 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_timer14_stop ( & mut self ) -> DBG_TIMER14_STOP_W { DBG_TIMER14_STOP_W { w : self } } # [ doc = "Bit 9 - Debug Timer 18 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim18_stop ( & mut self ) -> DBG_TIM18_STOP_W { DBG_TIM18_STOP_W { w : self } } # [ doc = "Bit 10 - Debug RTC stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_rtc_stop ( & mut self ) -> DBG_RTC_STOP_W { DBG_RTC_STOP_W { w : self } } # [ doc = "Bit 11 - Debug Window Wachdog stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_wwdg_stop ( & mut self ) -> DBG_WWDG_STOP_W { DBG_WWDG_STOP_W { w : self } } # [ doc = "Bit 12 - Debug Independent Wachdog stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_iwdg_stop ( & mut self ) -> DBG_IWDG_STOP_W { DBG_IWDG_STOP_W { w : self } } # [ doc = "Bit 21 - SMBUS timeout mode stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn i2c1_smbus_timeout ( & mut self ) -> I2C1_SMBUS_TIMEOUT_W { I2C1_SMBUS_TIMEOUT_W { w : self } } # [ doc = "Bit 22 - SMBUS timeout mode stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn i2c2_smbus_timeout ( & mut self ) -> I2C2_SMBUS_TIMEOUT_W { I2C2_SMBUS_TIMEOUT_W { w : self } } # [ doc = "Bit 25 - Debug CAN stopped when core is halted" ]
# [ inline ( always ) ]
pub fn dbg_can_stop ( & mut self ) -> DBG_CAN_STOP_W { DBG_CAN_STOP_W { w : self } } } } # [ doc = "APB High Freeze Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2fz](apb2fz) module" ]
pub type APB2FZ = crate :: Reg < u32 , _APB2FZ > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _APB2FZ ; # [ doc = "`read()` method returns [apb2fz::R](apb2fz::R) reader structure" ]
impl crate :: Readable for APB2FZ { } # [ doc = "`write(|w| ..)` method takes [apb2fz::W](apb2fz::W) writer structure" ]
impl crate :: Writable for APB2FZ { } # [ doc = "APB High Freeze Register" ]
pub mod apb2fz { # [ doc = "Reader of register APB2FZ" ]
pub type R = crate :: R < u32 , super :: APB2FZ > ; # [ doc = "Writer for register APB2FZ" ]
pub type W = crate :: W < u32 , super :: APB2FZ > ; # [ doc = "Register APB2FZ `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: APB2FZ { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBG_TIM15_STOP`" ]
pub type DBG_TIM15_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM15_STOP`" ]
pub struct DBG_TIM15_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM15_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM16_STOP`" ]
pub type DBG_TIM16_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM16_STOP`" ]
pub struct DBG_TIM16_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM16_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM17_STO`" ]
pub type DBG_TIM17_STO_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM17_STO`" ]
pub struct DBG_TIM17_STO_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM17_STO_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `DBG_TIM19_STOP`" ]
pub type DBG_TIM19_STOP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DBG_TIM19_STOP`" ]
pub struct DBG_TIM19_STOP_W < 'a > { w : & 'a mut W , } impl < 'a > DBG_TIM19_STOP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } impl R { # [ doc = "Bit 2 - Debug Timer 15 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim15_stop ( & self ) -> DBG_TIM15_STOP_R { DBG_TIM15_STOP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Debug Timer 16 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim16_stop ( & self ) -> DBG_TIM16_STOP_R { DBG_TIM16_STOP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Debug Timer 17 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim17_sto ( & self ) -> DBG_TIM17_STO_R { DBG_TIM17_STO_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Debug Timer 19 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim19_stop ( & self ) -> DBG_TIM19_STOP_R { DBG_TIM19_STOP_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 2 - Debug Timer 15 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim15_stop ( & mut self ) -> DBG_TIM15_STOP_W { DBG_TIM15_STOP_W { w : self } } # [ doc = "Bit 3 - Debug Timer 16 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim16_stop ( & mut self ) -> DBG_TIM16_STOP_W { DBG_TIM16_STOP_W { w : self } } # [ doc = "Bit 4 - Debug Timer 17 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim17_sto ( & mut self ) -> DBG_TIM17_STO_W { DBG_TIM17_STO_W { w : self } } # [ doc = "Bit 5 - Debug Timer 19 stopped when Core is halted" ]
# [ inline ( always ) ]
pub fn dbg_tim19_stop ( & mut self ) -> DBG_TIM19_STOP_W { DBG_TIM19_STOP_W { w : self } } } } } # [ doc = "Flexible memory controller" ]
pub struct FMC { _marker : PhantomData < * const ( ) > } unsafe impl Send for FMC { } impl FMC { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const fmc :: RegisterBlock { 0xa000_0400 as * const _ } } impl Deref for FMC { type Target = fmc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * FMC :: ptr ( ) } } } # [ doc = "Flexible memory controller" ]
pub mod fmc { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - SRAM/NOR-Flash chip-select control register 1" ]
pub bcr1 : BCR1 , # [ doc = "0x04 - SRAM/NOR-Flash chip-select timing register 1" ]
pub btr1 : BTR1 , # [ doc = "0x08 - SRAM/NOR-Flash chip-select control register 2" ]
pub bcr2 : BCR2 , # [ doc = "0x0c - SRAM/NOR-Flash chip-select timing register 2" ]
pub btr2 : BTR2 , # [ doc = "0x10 - SRAM/NOR-Flash chip-select control register 3" ]
pub bcr3 : BCR3 , # [ doc = "0x14 - SRAM/NOR-Flash chip-select timing register 3" ]
pub btr3 : BTR3 , # [ doc = "0x18 - SRAM/NOR-Flash chip-select control register 4" ]
pub bcr4 : BCR4 , # [ doc = "0x1c - SRAM/NOR-Flash chip-select timing register 4" ]
pub btr4 : BTR4 , _reserved8 : [ u8 ; 64usize ]
, # [ doc = "0x60 - PC Card/NAND Flash control register 2" ]
pub pcr2 : PCR2 , # [ doc = "0x64 - FIFO status and interrupt register 2" ]
pub sr2 : SR2 , # [ doc = "0x68 - Common memory space timing register 2" ]
pub pmem2 : PMEM2 , # [ doc = "0x6c - Attribute memory space timing register 2" ]
pub patt2 : PATT2 , _reserved12 : [ u8 ; 4usize ]
, # [ doc = "0x74 - ECC result register 2" ]
pub eccr2 : ECCR2 , _reserved13 : [ u8 ; 8usize ]
, # [ doc = "0x80 - PC Card/NAND Flash control register 3" ]
pub pcr3 : PCR3 , # [ doc = "0x84 - FIFO status and interrupt register 3" ]
pub sr3 : SR3 , # [ doc = "0x88 - Common memory space timing register 3" ]
pub pmem3 : PMEM3 , # [ doc = "0x8c - Attribute memory space timing register 3" ]
pub patt3 : PATT3 , _reserved17 : [ u8 ; 4usize ]
, # [ doc = "0x94 - ECC result register 3" ]
pub eccr3 : ECCR3 , _reserved18 : [ u8 ; 8usize ]
, # [ doc = "0xa0 - PC Card/NAND Flash control register 4" ]
pub pcr4 : PCR4 , # [ doc = "0xa4 - FIFO status and interrupt register 4" ]
pub sr4 : SR4 , # [ doc = "0xa8 - Common memory space timing register 4" ]
pub pmem4 : PMEM4 , # [ doc = "0xac - Attribute memory space timing register 4" ]
pub patt4 : PATT4 , # [ doc = "0xb0 - I/O space timing register 4" ]
pub pio4 : PIO4 , _reserved23 : [ u8 ; 80usize ]
, # [ doc = "0x104 - SRAM/NOR-Flash write timing registers 1" ]
pub bwtr1 : BWTR1 , _reserved24 : [ u8 ; 4usize ]
, # [ doc = "0x10c - SRAM/NOR-Flash write timing registers 2" ]
pub bwtr2 : BWTR2 , _reserved25 : [ u8 ; 4usize ]
, # [ doc = "0x114 - SRAM/NOR-Flash write timing registers 3" ]
pub bwtr3 : BWTR3 , _reserved26 : [ u8 ; 4usize ]
, # [ doc = "0x11c - SRAM/NOR-Flash write timing registers 4" ]
pub bwtr4 : BWTR4 , } # [ doc = "SRAM/NOR-Flash chip-select control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bcr1](bcr1) module" ]
pub type BCR1 = crate :: Reg < u32 , _BCR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BCR1 ; # [ doc = "`read()` method returns [bcr1::R](bcr1::R) reader structure" ]
impl crate :: Readable for BCR1 { } # [ doc = "`write(|w| ..)` method takes [bcr1::W](bcr1::W) writer structure" ]
impl crate :: Writable for BCR1 { } # [ doc = "SRAM/NOR-Flash chip-select control register 1" ]
pub mod bcr1 { # [ doc = "Reader of register BCR1" ]
pub type R = crate :: R < u32 , super :: BCR1 > ; # [ doc = "Writer for register BCR1" ]
pub type W = crate :: W < u32 , super :: BCR1 > ; # [ doc = "Register BCR1 `reset()`'s with value 0x30d0" ]
impl crate :: ResetValue for super :: BCR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x30d0 } } # [ doc = "Reader of field `CCLKEN`" ]
pub type CCLKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CCLKEN`" ]
pub struct CCLKEN_W < 'a > { w : & 'a mut W , } impl < 'a > CCLKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `CBURSTRW`" ]
pub type CBURSTRW_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CBURSTRW`" ]
pub struct CBURSTRW_W < 'a > { w : & 'a mut W , } impl < 'a > CBURSTRW_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `ASYNCWAIT`" ]
pub type ASYNCWAIT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ASYNCWAIT`" ]
pub struct ASYNCWAIT_W < 'a > { w : & 'a mut W , } impl < 'a > ASYNCWAIT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `EXTMOD`" ]
pub type EXTMOD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EXTMOD`" ]
pub struct EXTMOD_W < 'a > { w : & 'a mut W , } impl < 'a > EXTMOD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `WAITEN`" ]
pub type WAITEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITEN`" ]
pub struct WAITEN_W < 'a > { w : & 'a mut W , } impl < 'a > WAITEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `WREN`" ]
pub type WREN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WREN`" ]
pub struct WREN_W < 'a > { w : & 'a mut W , } impl < 'a > WREN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `WAITCFG`" ]
pub type WAITCFG_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITCFG`" ]
pub struct WAITCFG_W < 'a > { w : & 'a mut W , } impl < 'a > WAITCFG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `WAITPOL`" ]
pub type WAITPOL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITPOL`" ]
pub struct WAITPOL_W < 'a > { w : & 'a mut W , } impl < 'a > WAITPOL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `BURSTEN`" ]
pub type BURSTEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BURSTEN`" ]
pub struct BURSTEN_W < 'a > { w : & 'a mut W , } impl < 'a > BURSTEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FACCEN`" ]
pub type FACCEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACCEN`" ]
pub struct FACCEN_W < 'a > { w : & 'a mut W , } impl < 'a > FACCEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `MWID`" ]
pub type MWID_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MWID`" ]
pub struct MWID_W < 'a > { w : & 'a mut W , } impl < 'a > MWID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `MTYP`" ]
pub type MTYP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MTYP`" ]
pub struct MTYP_W < 'a > { w : & 'a mut W , } impl < 'a > MTYP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `MUXEN`" ]
pub type MUXEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MUXEN`" ]
pub struct MUXEN_W < 'a > { w : & 'a mut W , } impl < 'a > MUXEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `MBKEN`" ]
pub type MBKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MBKEN`" ]
pub struct MBKEN_W < 'a > { w : & 'a mut W , } impl < 'a > MBKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 20 - CCLKEN" ]
# [ inline ( always ) ]
pub fn cclken ( & self ) -> CCLKEN_R { CCLKEN_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & self ) -> CBURSTRW_R { CBURSTRW_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & self ) -> ASYNCWAIT_R { ASYNCWAIT_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & self ) -> EXTMOD_R { EXTMOD_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & self ) -> WAITEN_R { WAITEN_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & self ) -> WREN_R { WREN_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & self ) -> WAITCFG_R { WAITCFG_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & self ) -> WAITPOL_R { WAITPOL_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & self ) -> BURSTEN_R { BURSTEN_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & self ) -> FACCEN_R { FACCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & self ) -> MWID_R { MWID_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & self ) -> MTYP_R { MTYP_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & self ) -> MUXEN_R { MUXEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & self ) -> MBKEN_R { MBKEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 20 - CCLKEN" ]
# [ inline ( always ) ]
pub fn cclken ( & mut self ) -> CCLKEN_W { CCLKEN_W { w : self } } # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & mut self ) -> CBURSTRW_W { CBURSTRW_W { w : self } } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & mut self ) -> ASYNCWAIT_W { ASYNCWAIT_W { w : self } } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & mut self ) -> EXTMOD_W { EXTMOD_W { w : self } } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & mut self ) -> WAITEN_W { WAITEN_W { w : self } } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & mut self ) -> WREN_W { WREN_W { w : self } } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & mut self ) -> WAITCFG_W { WAITCFG_W { w : self } } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & mut self ) -> WAITPOL_W { WAITPOL_W { w : self } } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & mut self ) -> BURSTEN_W { BURSTEN_W { w : self } } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & mut self ) -> FACCEN_W { FACCEN_W { w : self } } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & mut self ) -> MWID_W { MWID_W { w : self } } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & mut self ) -> MTYP_W { MTYP_W { w : self } } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & mut self ) -> MUXEN_W { MUXEN_W { w : self } } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & mut self ) -> MBKEN_W { MBKEN_W { w : self } } } } # [ doc = "SRAM/NOR-Flash chip-select timing register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [btr1](btr1) module" ]
pub type BTR1 = crate :: Reg < u32 , _BTR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BTR1 ; # [ doc = "`read()` method returns [btr1::R](btr1::R) reader structure" ]
impl crate :: Readable for BTR1 { } # [ doc = "`write(|w| ..)` method takes [btr1::W](btr1::W) writer structure" ]
impl crate :: Writable for BTR1 { } # [ doc = "SRAM/NOR-Flash chip-select timing register 1" ]
pub mod btr1 { # [ doc = "Reader of register BTR1" ]
pub type R = crate :: R < u32 , super :: BTR1 > ; # [ doc = "Writer for register BTR1" ]
pub type W = crate :: W < u32 , super :: BTR1 > ; # [ doc = "Register BTR1 `reset()`'s with value 0xffff_ffff" ]
impl crate :: ResetValue for super :: BTR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } # [ doc = "SRAM/NOR-Flash chip-select control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bcr2](bcr2) module" ]
pub type BCR2 = crate :: Reg < u32 , _BCR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BCR2 ; # [ doc = "`read()` method returns [bcr2::R](bcr2::R) reader structure" ]
impl crate :: Readable for BCR2 { } # [ doc = "`write(|w| ..)` method takes [bcr2::W](bcr2::W) writer structure" ]
impl crate :: Writable for BCR2 { } # [ doc = "SRAM/NOR-Flash chip-select control register 2" ]
pub mod bcr2 { # [ doc = "Reader of register BCR2" ]
pub type R = crate :: R < u32 , super :: BCR2 > ; # [ doc = "Writer for register BCR2" ]
pub type W = crate :: W < u32 , super :: BCR2 > ; # [ doc = "Register BCR2 `reset()`'s with value 0x30d0" ]
impl crate :: ResetValue for super :: BCR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x30d0 } } # [ doc = "Reader of field `CBURSTRW`" ]
pub type CBURSTRW_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CBURSTRW`" ]
pub struct CBURSTRW_W < 'a > { w : & 'a mut W , } impl < 'a > CBURSTRW_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `ASYNCWAIT`" ]
pub type ASYNCWAIT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ASYNCWAIT`" ]
pub struct ASYNCWAIT_W < 'a > { w : & 'a mut W , } impl < 'a > ASYNCWAIT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `EXTMOD`" ]
pub type EXTMOD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EXTMOD`" ]
pub struct EXTMOD_W < 'a > { w : & 'a mut W , } impl < 'a > EXTMOD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `WAITEN`" ]
pub type WAITEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITEN`" ]
pub struct WAITEN_W < 'a > { w : & 'a mut W , } impl < 'a > WAITEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `WREN`" ]
pub type WREN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WREN`" ]
pub struct WREN_W < 'a > { w : & 'a mut W , } impl < 'a > WREN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `WAITCFG`" ]
pub type WAITCFG_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITCFG`" ]
pub struct WAITCFG_W < 'a > { w : & 'a mut W , } impl < 'a > WAITCFG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `WRAPMOD`" ]
pub type WRAPMOD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WRAPMOD`" ]
pub struct WRAPMOD_W < 'a > { w : & 'a mut W , } impl < 'a > WRAPMOD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `WAITPOL`" ]
pub type WAITPOL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITPOL`" ]
pub struct WAITPOL_W < 'a > { w : & 'a mut W , } impl < 'a > WAITPOL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `BURSTEN`" ]
pub type BURSTEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BURSTEN`" ]
pub struct BURSTEN_W < 'a > { w : & 'a mut W , } impl < 'a > BURSTEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FACCEN`" ]
pub type FACCEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACCEN`" ]
pub struct FACCEN_W < 'a > { w : & 'a mut W , } impl < 'a > FACCEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `MWID`" ]
pub type MWID_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MWID`" ]
pub struct MWID_W < 'a > { w : & 'a mut W , } impl < 'a > MWID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `MTYP`" ]
pub type MTYP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MTYP`" ]
pub struct MTYP_W < 'a > { w : & 'a mut W , } impl < 'a > MTYP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `MUXEN`" ]
pub type MUXEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MUXEN`" ]
pub struct MUXEN_W < 'a > { w : & 'a mut W , } impl < 'a > MUXEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `MBKEN`" ]
pub type MBKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MBKEN`" ]
pub struct MBKEN_W < 'a > { w : & 'a mut W , } impl < 'a > MBKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & self ) -> CBURSTRW_R { CBURSTRW_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & self ) -> ASYNCWAIT_R { ASYNCWAIT_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & self ) -> EXTMOD_R { EXTMOD_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & self ) -> WAITEN_R { WAITEN_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & self ) -> WREN_R { WREN_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & self ) -> WAITCFG_R { WAITCFG_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - WRAPMOD" ]
# [ inline ( always ) ]
pub fn wrapmod ( & self ) -> WRAPMOD_R { WRAPMOD_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & self ) -> WAITPOL_R { WAITPOL_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & self ) -> BURSTEN_R { BURSTEN_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & self ) -> FACCEN_R { FACCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & self ) -> MWID_R { MWID_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & self ) -> MTYP_R { MTYP_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & self ) -> MUXEN_R { MUXEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & self ) -> MBKEN_R { MBKEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & mut self ) -> CBURSTRW_W { CBURSTRW_W { w : self } } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & mut self ) -> ASYNCWAIT_W { ASYNCWAIT_W { w : self } } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & mut self ) -> EXTMOD_W { EXTMOD_W { w : self } } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & mut self ) -> WAITEN_W { WAITEN_W { w : self } } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & mut self ) -> WREN_W { WREN_W { w : self } } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & mut self ) -> WAITCFG_W { WAITCFG_W { w : self } } # [ doc = "Bit 10 - WRAPMOD" ]
# [ inline ( always ) ]
pub fn wrapmod ( & mut self ) -> WRAPMOD_W { WRAPMOD_W { w : self } } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & mut self ) -> WAITPOL_W { WAITPOL_W { w : self } } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & mut self ) -> BURSTEN_W { BURSTEN_W { w : self } } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & mut self ) -> FACCEN_W { FACCEN_W { w : self } } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & mut self ) -> MWID_W { MWID_W { w : self } } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & mut self ) -> MTYP_W { MTYP_W { w : self } } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & mut self ) -> MUXEN_W { MUXEN_W { w : self } } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & mut self ) -> MBKEN_W { MBKEN_W { w : self } } } } # [ doc = "SRAM/NOR-Flash chip-select timing register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [btr2](btr2) module" ]
pub type BTR2 = crate :: Reg < u32 , _BTR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BTR2 ; # [ doc = "`read()` method returns [btr2::R](btr2::R) reader structure" ]
impl crate :: Readable for BTR2 { } # [ doc = "`write(|w| ..)` method takes [btr2::W](btr2::W) writer structure" ]
impl crate :: Writable for BTR2 { } # [ doc = "SRAM/NOR-Flash chip-select timing register 2" ]
pub mod btr2 { # [ doc = "Reader of register BTR2" ]
pub type R = crate :: R < u32 , super :: BTR2 > ; # [ doc = "Writer for register BTR2" ]
pub type W = crate :: W < u32 , super :: BTR2 > ; # [ doc = "Register BTR2 `reset()`'s with value 0xffff_ffff" ]
impl crate :: ResetValue for super :: BTR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } # [ doc = "SRAM/NOR-Flash chip-select control register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bcr3](bcr3) module" ]
pub type BCR3 = crate :: Reg < u32 , _BCR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BCR3 ; # [ doc = "`read()` method returns [bcr3::R](bcr3::R) reader structure" ]
impl crate :: Readable for BCR3 { } # [ doc = "`write(|w| ..)` method takes [bcr3::W](bcr3::W) writer structure" ]
impl crate :: Writable for BCR3 { } # [ doc = "SRAM/NOR-Flash chip-select control register 3" ]
pub mod bcr3 { # [ doc = "Reader of register BCR3" ]
pub type R = crate :: R < u32 , super :: BCR3 > ; # [ doc = "Writer for register BCR3" ]
pub type W = crate :: W < u32 , super :: BCR3 > ; # [ doc = "Register BCR3 `reset()`'s with value 0x30d0" ]
impl crate :: ResetValue for super :: BCR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x30d0 } } # [ doc = "Reader of field `CBURSTRW`" ]
pub type CBURSTRW_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CBURSTRW`" ]
pub struct CBURSTRW_W < 'a > { w : & 'a mut W , } impl < 'a > CBURSTRW_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `ASYNCWAIT`" ]
pub type ASYNCWAIT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ASYNCWAIT`" ]
pub struct ASYNCWAIT_W < 'a > { w : & 'a mut W , } impl < 'a > ASYNCWAIT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `EXTMOD`" ]
pub type EXTMOD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EXTMOD`" ]
pub struct EXTMOD_W < 'a > { w : & 'a mut W , } impl < 'a > EXTMOD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `WAITEN`" ]
pub type WAITEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITEN`" ]
pub struct WAITEN_W < 'a > { w : & 'a mut W , } impl < 'a > WAITEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `WREN`" ]
pub type WREN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WREN`" ]
pub struct WREN_W < 'a > { w : & 'a mut W , } impl < 'a > WREN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `WAITCFG`" ]
pub type WAITCFG_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITCFG`" ]
pub struct WAITCFG_W < 'a > { w : & 'a mut W , } impl < 'a > WAITCFG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `WRAPMOD`" ]
pub type WRAPMOD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WRAPMOD`" ]
pub struct WRAPMOD_W < 'a > { w : & 'a mut W , } impl < 'a > WRAPMOD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `WAITPOL`" ]
pub type WAITPOL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITPOL`" ]
pub struct WAITPOL_W < 'a > { w : & 'a mut W , } impl < 'a > WAITPOL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `BURSTEN`" ]
pub type BURSTEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BURSTEN`" ]
pub struct BURSTEN_W < 'a > { w : & 'a mut W , } impl < 'a > BURSTEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FACCEN`" ]
pub type FACCEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACCEN`" ]
pub struct FACCEN_W < 'a > { w : & 'a mut W , } impl < 'a > FACCEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `MWID`" ]
pub type MWID_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MWID`" ]
pub struct MWID_W < 'a > { w : & 'a mut W , } impl < 'a > MWID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `MTYP`" ]
pub type MTYP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MTYP`" ]
pub struct MTYP_W < 'a > { w : & 'a mut W , } impl < 'a > MTYP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `MUXEN`" ]
pub type MUXEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MUXEN`" ]
pub struct MUXEN_W < 'a > { w : & 'a mut W , } impl < 'a > MUXEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `MBKEN`" ]
pub type MBKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MBKEN`" ]
pub struct MBKEN_W < 'a > { w : & 'a mut W , } impl < 'a > MBKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & self ) -> CBURSTRW_R { CBURSTRW_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & self ) -> ASYNCWAIT_R { ASYNCWAIT_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & self ) -> EXTMOD_R { EXTMOD_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & self ) -> WAITEN_R { WAITEN_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & self ) -> WREN_R { WREN_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & self ) -> WAITCFG_R { WAITCFG_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - WRAPMOD" ]
# [ inline ( always ) ]
pub fn wrapmod ( & self ) -> WRAPMOD_R { WRAPMOD_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & self ) -> WAITPOL_R { WAITPOL_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & self ) -> BURSTEN_R { BURSTEN_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & self ) -> FACCEN_R { FACCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & self ) -> MWID_R { MWID_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & self ) -> MTYP_R { MTYP_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & self ) -> MUXEN_R { MUXEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & self ) -> MBKEN_R { MBKEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & mut self ) -> CBURSTRW_W { CBURSTRW_W { w : self } } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & mut self ) -> ASYNCWAIT_W { ASYNCWAIT_W { w : self } } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & mut self ) -> EXTMOD_W { EXTMOD_W { w : self } } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & mut self ) -> WAITEN_W { WAITEN_W { w : self } } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & mut self ) -> WREN_W { WREN_W { w : self } } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & mut self ) -> WAITCFG_W { WAITCFG_W { w : self } } # [ doc = "Bit 10 - WRAPMOD" ]
# [ inline ( always ) ]
pub fn wrapmod ( & mut self ) -> WRAPMOD_W { WRAPMOD_W { w : self } } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & mut self ) -> WAITPOL_W { WAITPOL_W { w : self } } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & mut self ) -> BURSTEN_W { BURSTEN_W { w : self } } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & mut self ) -> FACCEN_W { FACCEN_W { w : self } } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & mut self ) -> MWID_W { MWID_W { w : self } } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & mut self ) -> MTYP_W { MTYP_W { w : self } } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & mut self ) -> MUXEN_W { MUXEN_W { w : self } } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & mut self ) -> MBKEN_W { MBKEN_W { w : self } } } } # [ doc = "SRAM/NOR-Flash chip-select timing register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [btr3](btr3) module" ]
pub type BTR3 = crate :: Reg < u32 , _BTR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BTR3 ; # [ doc = "`read()` method returns [btr3::R](btr3::R) reader structure" ]
impl crate :: Readable for BTR3 { } # [ doc = "`write(|w| ..)` method takes [btr3::W](btr3::W) writer structure" ]
impl crate :: Writable for BTR3 { } # [ doc = "SRAM/NOR-Flash chip-select timing register 3" ]
pub mod btr3 { # [ doc = "Reader of register BTR3" ]
pub type R = crate :: R < u32 , super :: BTR3 > ; # [ doc = "Writer for register BTR3" ]
pub type W = crate :: W < u32 , super :: BTR3 > ; # [ doc = "Register BTR3 `reset()`'s with value 0xffff_ffff" ]
impl crate :: ResetValue for super :: BTR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } # [ doc = "SRAM/NOR-Flash chip-select control register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bcr4](bcr4) module" ]
pub type BCR4 = crate :: Reg < u32 , _BCR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BCR4 ; # [ doc = "`read()` method returns [bcr4::R](bcr4::R) reader structure" ]
impl crate :: Readable for BCR4 { } # [ doc = "`write(|w| ..)` method takes [bcr4::W](bcr4::W) writer structure" ]
impl crate :: Writable for BCR4 { } # [ doc = "SRAM/NOR-Flash chip-select control register 4" ]
pub mod bcr4 { # [ doc = "Reader of register BCR4" ]
pub type R = crate :: R < u32 , super :: BCR4 > ; # [ doc = "Writer for register BCR4" ]
pub type W = crate :: W < u32 , super :: BCR4 > ; # [ doc = "Register BCR4 `reset()`'s with value 0x30d0" ]
impl crate :: ResetValue for super :: BCR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x30d0 } } # [ doc = "Reader of field `CBURSTRW`" ]
pub type CBURSTRW_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CBURSTRW`" ]
pub struct CBURSTRW_W < 'a > { w : & 'a mut W , } impl < 'a > CBURSTRW_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Reader of field `ASYNCWAIT`" ]
pub type ASYNCWAIT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ASYNCWAIT`" ]
pub struct ASYNCWAIT_W < 'a > { w : & 'a mut W , } impl < 'a > ASYNCWAIT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `EXTMOD`" ]
pub type EXTMOD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `EXTMOD`" ]
pub struct EXTMOD_W < 'a > { w : & 'a mut W , } impl < 'a > EXTMOD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `WAITEN`" ]
pub type WAITEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITEN`" ]
pub struct WAITEN_W < 'a > { w : & 'a mut W , } impl < 'a > WAITEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `WREN`" ]
pub type WREN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WREN`" ]
pub struct WREN_W < 'a > { w : & 'a mut W , } impl < 'a > WREN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `WAITCFG`" ]
pub type WAITCFG_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITCFG`" ]
pub struct WAITCFG_W < 'a > { w : & 'a mut W , } impl < 'a > WAITCFG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `WRAPMOD`" ]
pub type WRAPMOD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WRAPMOD`" ]
pub struct WRAPMOD_W < 'a > { w : & 'a mut W , } impl < 'a > WRAPMOD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `WAITPOL`" ]
pub type WAITPOL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `WAITPOL`" ]
pub struct WAITPOL_W < 'a > { w : & 'a mut W , } impl < 'a > WAITPOL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `BURSTEN`" ]
pub type BURSTEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BURSTEN`" ]
pub struct BURSTEN_W < 'a > { w : & 'a mut W , } impl < 'a > BURSTEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `FACCEN`" ]
pub type FACCEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FACCEN`" ]
pub struct FACCEN_W < 'a > { w : & 'a mut W , } impl < 'a > FACCEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `MWID`" ]
pub type MWID_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MWID`" ]
pub struct MWID_W < 'a > { w : & 'a mut W , } impl < 'a > MWID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `MTYP`" ]
pub type MTYP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MTYP`" ]
pub struct MTYP_W < 'a > { w : & 'a mut W , } impl < 'a > MTYP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `MUXEN`" ]
pub type MUXEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MUXEN`" ]
pub struct MUXEN_W < 'a > { w : & 'a mut W , } impl < 'a > MUXEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `MBKEN`" ]
pub type MBKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MBKEN`" ]
pub struct MBKEN_W < 'a > { w : & 'a mut W , } impl < 'a > MBKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & self ) -> CBURSTRW_R { CBURSTRW_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & self ) -> ASYNCWAIT_R { ASYNCWAIT_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & self ) -> EXTMOD_R { EXTMOD_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & self ) -> WAITEN_R { WAITEN_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & self ) -> WREN_R { WREN_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & self ) -> WAITCFG_R { WAITCFG_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - WRAPMOD" ]
# [ inline ( always ) ]
pub fn wrapmod ( & self ) -> WRAPMOD_R { WRAPMOD_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & self ) -> WAITPOL_R { WAITPOL_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & self ) -> BURSTEN_R { BURSTEN_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & self ) -> FACCEN_R { FACCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & self ) -> MWID_R { MWID_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & self ) -> MTYP_R { MTYP_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & self ) -> MUXEN_R { MUXEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & self ) -> MBKEN_R { MBKEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 19 - CBURSTRW" ]
# [ inline ( always ) ]
pub fn cburstrw ( & mut self ) -> CBURSTRW_W { CBURSTRW_W { w : self } } # [ doc = "Bit 15 - ASYNCWAIT" ]
# [ inline ( always ) ]
pub fn asyncwait ( & mut self ) -> ASYNCWAIT_W { ASYNCWAIT_W { w : self } } # [ doc = "Bit 14 - EXTMOD" ]
# [ inline ( always ) ]
pub fn extmod ( & mut self ) -> EXTMOD_W { EXTMOD_W { w : self } } # [ doc = "Bit 13 - WAITEN" ]
# [ inline ( always ) ]
pub fn waiten ( & mut self ) -> WAITEN_W { WAITEN_W { w : self } } # [ doc = "Bit 12 - WREN" ]
# [ inline ( always ) ]
pub fn wren ( & mut self ) -> WREN_W { WREN_W { w : self } } # [ doc = "Bit 11 - WAITCFG" ]
# [ inline ( always ) ]
pub fn waitcfg ( & mut self ) -> WAITCFG_W { WAITCFG_W { w : self } } # [ doc = "Bit 10 - WRAPMOD" ]
# [ inline ( always ) ]
pub fn wrapmod ( & mut self ) -> WRAPMOD_W { WRAPMOD_W { w : self } } # [ doc = "Bit 9 - WAITPOL" ]
# [ inline ( always ) ]
pub fn waitpol ( & mut self ) -> WAITPOL_W { WAITPOL_W { w : self } } # [ doc = "Bit 8 - BURSTEN" ]
# [ inline ( always ) ]
pub fn bursten ( & mut self ) -> BURSTEN_W { BURSTEN_W { w : self } } # [ doc = "Bit 6 - FACCEN" ]
# [ inline ( always ) ]
pub fn faccen ( & mut self ) -> FACCEN_W { FACCEN_W { w : self } } # [ doc = "Bits 4:5 - MWID" ]
# [ inline ( always ) ]
pub fn mwid ( & mut self ) -> MWID_W { MWID_W { w : self } } # [ doc = "Bits 2:3 - MTYP" ]
# [ inline ( always ) ]
pub fn mtyp ( & mut self ) -> MTYP_W { MTYP_W { w : self } } # [ doc = "Bit 1 - MUXEN" ]
# [ inline ( always ) ]
pub fn muxen ( & mut self ) -> MUXEN_W { MUXEN_W { w : self } } # [ doc = "Bit 0 - MBKEN" ]
# [ inline ( always ) ]
pub fn mbken ( & mut self ) -> MBKEN_W { MBKEN_W { w : self } } } } # [ doc = "SRAM/NOR-Flash chip-select timing register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [btr4](btr4) module" ]
pub type BTR4 = crate :: Reg < u32 , _BTR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BTR4 ; # [ doc = "`read()` method returns [btr4::R](btr4::R) reader structure" ]
impl crate :: Readable for BTR4 { } # [ doc = "`write(|w| ..)` method takes [btr4::W](btr4::W) writer structure" ]
impl crate :: Writable for BTR4 { } # [ doc = "SRAM/NOR-Flash chip-select timing register 4" ]
pub mod btr4 { # [ doc = "Reader of register BTR4" ]
pub type R = crate :: R < u32 , super :: BTR4 > ; # [ doc = "Writer for register BTR4" ]
pub type W = crate :: W < u32 , super :: BTR4 > ; # [ doc = "Register BTR4 `reset()`'s with value 0xffff_ffff" ]
impl crate :: ResetValue for super :: BTR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xffff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - BUSTURN" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } # [ doc = "PC Card/NAND Flash control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcr2](pcr2) module" ]
pub type PCR2 = crate :: Reg < u32 , _PCR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PCR2 ; # [ doc = "`read()` method returns [pcr2::R](pcr2::R) reader structure" ]
impl crate :: Readable for PCR2 { } # [ doc = "`write(|w| ..)` method takes [pcr2::W](pcr2::W) writer structure" ]
impl crate :: Writable for PCR2 { } # [ doc = "PC Card/NAND Flash control register 2" ]
pub mod pcr2 { # [ doc = "Reader of register PCR2" ]
pub type R = crate :: R < u32 , super :: PCR2 > ; # [ doc = "Writer for register PCR2" ]
pub type W = crate :: W < u32 , super :: PCR2 > ; # [ doc = "Register PCR2 `reset()`'s with value 0x18" ]
impl crate :: ResetValue for super :: PCR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x18 } } # [ doc = "Reader of field `ECCPS`" ]
pub type ECCPS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ECCPS`" ]
pub struct ECCPS_W < 'a > { w : & 'a mut W , } impl < 'a > ECCPS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 17 ) ) | ( ( ( value as u32 ) & 0x07 ) << 17 ) ; self . w } } # [ doc = "Reader of field `TAR`" ]
pub type TAR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TAR`" ]
pub struct TAR_W < 'a > { w : & 'a mut W , } impl < 'a > TAR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 13 ) ) | ( ( ( value as u32 ) & 0x0f ) << 13 ) ; self . w } } # [ doc = "Reader of field `TCLR`" ]
pub type TCLR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TCLR`" ]
pub struct TCLR_W < 'a > { w : & 'a mut W , } impl < 'a > TCLR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 9 ) ) | ( ( ( value as u32 ) & 0x0f ) << 9 ) ; self . w } } # [ doc = "Reader of field `ECCEN`" ]
pub type ECCEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ECCEN`" ]
pub struct ECCEN_W < 'a > { w : & 'a mut W , } impl < 'a > ECCEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `PWID`" ]
pub type PWID_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PWID`" ]
pub struct PWID_W < 'a > { w : & 'a mut W , } impl < 'a > PWID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `PTYP`" ]
pub type PTYP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PTYP`" ]
pub struct PTYP_W < 'a > { w : & 'a mut W , } impl < 'a > PTYP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `PBKEN`" ]
pub type PBKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PBKEN`" ]
pub struct PBKEN_W < 'a > { w : & 'a mut W , } impl < 'a > PBKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `PWAITEN`" ]
pub type PWAITEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PWAITEN`" ]
pub struct PWAITEN_W < 'a > { w : & 'a mut W , } impl < 'a > PWAITEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } impl R { # [ doc = "Bits 17:19 - ECCPS" ]
# [ inline ( always ) ]
pub fn eccps ( & self ) -> ECCPS_R { ECCPS_R :: new ( ( ( self . bits >> 17 ) & 0x07 ) as u8 ) } # [ doc = "Bits 13:16 - TAR" ]
# [ inline ( always ) ]
pub fn tar ( & self ) -> TAR_R { TAR_R :: new ( ( ( self . bits >> 13 ) & 0x0f ) as u8 ) } # [ doc = "Bits 9:12 - TCLR" ]
# [ inline ( always ) ]
pub fn tclr ( & self ) -> TCLR_R { TCLR_R :: new ( ( ( self . bits >> 9 ) & 0x0f ) as u8 ) } # [ doc = "Bit 6 - ECCEN" ]
# [ inline ( always ) ]
pub fn eccen ( & self ) -> ECCEN_R { ECCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - PWID" ]
# [ inline ( always ) ]
pub fn pwid ( & self ) -> PWID_R { PWID_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 3 - PTYP" ]
# [ inline ( always ) ]
pub fn ptyp ( & self ) -> PTYP_R { PTYP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - PBKEN" ]
# [ inline ( always ) ]
pub fn pbken ( & self ) -> PBKEN_R { PBKEN_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - PWAITEN" ]
# [ inline ( always ) ]
pub fn pwaiten ( & self ) -> PWAITEN_R { PWAITEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 17:19 - ECCPS" ]
# [ inline ( always ) ]
pub fn eccps ( & mut self ) -> ECCPS_W { ECCPS_W { w : self } } # [ doc = "Bits 13:16 - TAR" ]
# [ inline ( always ) ]
pub fn tar ( & mut self ) -> TAR_W { TAR_W { w : self } } # [ doc = "Bits 9:12 - TCLR" ]
# [ inline ( always ) ]
pub fn tclr ( & mut self ) -> TCLR_W { TCLR_W { w : self } } # [ doc = "Bit 6 - ECCEN" ]
# [ inline ( always ) ]
pub fn eccen ( & mut self ) -> ECCEN_W { ECCEN_W { w : self } } # [ doc = "Bits 4:5 - PWID" ]
# [ inline ( always ) ]
pub fn pwid ( & mut self ) -> PWID_W { PWID_W { w : self } } # [ doc = "Bit 3 - PTYP" ]
# [ inline ( always ) ]
pub fn ptyp ( & mut self ) -> PTYP_W { PTYP_W { w : self } } # [ doc = "Bit 2 - PBKEN" ]
# [ inline ( always ) ]
pub fn pbken ( & mut self ) -> PBKEN_W { PBKEN_W { w : self } } # [ doc = "Bit 1 - PWAITEN" ]
# [ inline ( always ) ]
pub fn pwaiten ( & mut self ) -> PWAITEN_W { PWAITEN_W { w : self } } } } # [ doc = "FIFO status and interrupt register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr2](sr2) module" ]
pub type SR2 = crate :: Reg < u32 , _SR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR2 ; # [ doc = "`read()` method returns [sr2::R](sr2::R) reader structure" ]
impl crate :: Readable for SR2 { } # [ doc = "`write(|w| ..)` method takes [sr2::W](sr2::W) writer structure" ]
impl crate :: Writable for SR2 { } # [ doc = "FIFO status and interrupt register 2" ]
pub mod sr2 { # [ doc = "Reader of register SR2" ]
pub type R = crate :: R < u32 , super :: SR2 > ; # [ doc = "Writer for register SR2" ]
pub type W = crate :: W < u32 , super :: SR2 > ; # [ doc = "Register SR2 `reset()`'s with value 0x40" ]
impl crate :: ResetValue for super :: SR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x40 } } # [ doc = "Reader of field `FEMPT`" ]
pub type FEMPT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `IFEN`" ]
pub type IFEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IFEN`" ]
pub struct IFEN_W < 'a > { w : & 'a mut W , } impl < 'a > IFEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `ILEN`" ]
pub type ILEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ILEN`" ]
pub struct ILEN_W < 'a > { w : & 'a mut W , } impl < 'a > ILEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `IREN`" ]
pub type IREN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IREN`" ]
pub struct IREN_W < 'a > { w : & 'a mut W , } impl < 'a > IREN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `IFS`" ]
pub type IFS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IFS`" ]
pub struct IFS_W < 'a > { w : & 'a mut W , } impl < 'a > IFS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `ILS`" ]
pub type ILS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ILS`" ]
pub struct ILS_W < 'a > { w : & 'a mut W , } impl < 'a > ILS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `IRS`" ]
pub type IRS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IRS`" ]
pub struct IRS_W < 'a > { w : & 'a mut W , } impl < 'a > IRS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 6 - FEMPT" ]
# [ inline ( always ) ]
pub fn fempt ( & self ) -> FEMPT_R { FEMPT_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - IFEN" ]
# [ inline ( always ) ]
pub fn ifen ( & self ) -> IFEN_R { IFEN_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - ILEN" ]
# [ inline ( always ) ]
pub fn ilen ( & self ) -> ILEN_R { ILEN_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - IREN" ]
# [ inline ( always ) ]
pub fn iren ( & self ) -> IREN_R { IREN_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - IFS" ]
# [ inline ( always ) ]
pub fn ifs ( & self ) -> IFS_R { IFS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - ILS" ]
# [ inline ( always ) ]
pub fn ils ( & self ) -> ILS_R { ILS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - IRS" ]
# [ inline ( always ) ]
pub fn irs ( & self ) -> IRS_R { IRS_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 5 - IFEN" ]
# [ inline ( always ) ]
pub fn ifen ( & mut self ) -> IFEN_W { IFEN_W { w : self } } # [ doc = "Bit 4 - ILEN" ]
# [ inline ( always ) ]
pub fn ilen ( & mut self ) -> ILEN_W { ILEN_W { w : self } } # [ doc = "Bit 3 - IREN" ]
# [ inline ( always ) ]
pub fn iren ( & mut self ) -> IREN_W { IREN_W { w : self } } # [ doc = "Bit 2 - IFS" ]
# [ inline ( always ) ]
pub fn ifs ( & mut self ) -> IFS_W { IFS_W { w : self } } # [ doc = "Bit 1 - ILS" ]
# [ inline ( always ) ]
pub fn ils ( & mut self ) -> ILS_W { ILS_W { w : self } } # [ doc = "Bit 0 - IRS" ]
# [ inline ( always ) ]
pub fn irs ( & mut self ) -> IRS_W { IRS_W { w : self } } } } # [ doc = "Common memory space timing register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pmem2](pmem2) module" ]
pub type PMEM2 = crate :: Reg < u32 , _PMEM2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PMEM2 ; # [ doc = "`read()` method returns [pmem2::R](pmem2::R) reader structure" ]
impl crate :: Readable for PMEM2 { } # [ doc = "`write(|w| ..)` method takes [pmem2::W](pmem2::W) writer structure" ]
impl crate :: Writable for PMEM2 { } # [ doc = "Common memory space timing register 2" ]
pub mod pmem2 { # [ doc = "Reader of register PMEM2" ]
pub type R = crate :: R < u32 , super :: PMEM2 > ; # [ doc = "Writer for register PMEM2" ]
pub type W = crate :: W < u32 , super :: PMEM2 > ; # [ doc = "Register PMEM2 `reset()`'s with value 0xfcfc_fcfc" ]
impl crate :: ResetValue for super :: PMEM2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xfcfc_fcfc } } # [ doc = "Reader of field `MEMHIZx`" ]
pub type MEMHIZX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMHIZx`" ]
pub struct MEMHIZX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMHIZX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `MEMHOLDx`" ]
pub type MEMHOLDX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMHOLDx`" ]
pub struct MEMHOLDX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMHOLDX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `MEMWAITx`" ]
pub type MEMWAITX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMWAITx`" ]
pub struct MEMWAITX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMWAITX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `MEMSETx`" ]
pub type MEMSETX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMSETx`" ]
pub struct MEMSETX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMSETX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - MEMHIZx" ]
# [ inline ( always ) ]
pub fn memhizx ( & self ) -> MEMHIZX_R { MEMHIZX_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - MEMHOLDx" ]
# [ inline ( always ) ]
pub fn memholdx ( & self ) -> MEMHOLDX_R { MEMHOLDX_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - MEMWAITx" ]
# [ inline ( always ) ]
pub fn memwaitx ( & self ) -> MEMWAITX_R { MEMWAITX_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - MEMSETx" ]
# [ inline ( always ) ]
pub fn memsetx ( & self ) -> MEMSETX_R { MEMSETX_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - MEMHIZx" ]
# [ inline ( always ) ]
pub fn memhizx ( & mut self ) -> MEMHIZX_W { MEMHIZX_W { w : self } } # [ doc = "Bits 16:23 - MEMHOLDx" ]
# [ inline ( always ) ]
pub fn memholdx ( & mut self ) -> MEMHOLDX_W { MEMHOLDX_W { w : self } } # [ doc = "Bits 8:15 - MEMWAITx" ]
# [ inline ( always ) ]
pub fn memwaitx ( & mut self ) -> MEMWAITX_W { MEMWAITX_W { w : self } } # [ doc = "Bits 0:7 - MEMSETx" ]
# [ inline ( always ) ]
pub fn memsetx ( & mut self ) -> MEMSETX_W { MEMSETX_W { w : self } } } } # [ doc = "Attribute memory space timing register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [patt2](patt2) module" ]
pub type PATT2 = crate :: Reg < u32 , _PATT2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PATT2 ; # [ doc = "`read()` method returns [patt2::R](patt2::R) reader structure" ]
impl crate :: Readable for PATT2 { } # [ doc = "`write(|w| ..)` method takes [patt2::W](patt2::W) writer structure" ]
impl crate :: Writable for PATT2 { } # [ doc = "Attribute memory space timing register 2" ]
pub mod patt2 { # [ doc = "Reader of register PATT2" ]
pub type R = crate :: R < u32 , super :: PATT2 > ; # [ doc = "Writer for register PATT2" ]
pub type W = crate :: W < u32 , super :: PATT2 > ; # [ doc = "Register PATT2 `reset()`'s with value 0xfcfc_fcfc" ]
impl crate :: ResetValue for super :: PATT2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xfcfc_fcfc } } # [ doc = "Reader of field `ATTHIZx`" ]
pub type ATTHIZX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTHIZx`" ]
pub struct ATTHIZX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTHIZX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `ATTHOLDx`" ]
pub type ATTHOLDX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTHOLDx`" ]
pub struct ATTHOLDX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTHOLDX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `ATTWAITx`" ]
pub type ATTWAITX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTWAITx`" ]
pub struct ATTWAITX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTWAITX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ATTSETx`" ]
pub type ATTSETX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTSETx`" ]
pub struct ATTSETX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTSETX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - ATTHIZx" ]
# [ inline ( always ) ]
pub fn atthizx ( & self ) -> ATTHIZX_R { ATTHIZX_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - ATTHOLDx" ]
# [ inline ( always ) ]
pub fn attholdx ( & self ) -> ATTHOLDX_R { ATTHOLDX_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - ATTWAITx" ]
# [ inline ( always ) ]
pub fn attwaitx ( & self ) -> ATTWAITX_R { ATTWAITX_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - ATTSETx" ]
# [ inline ( always ) ]
pub fn attsetx ( & self ) -> ATTSETX_R { ATTSETX_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - ATTHIZx" ]
# [ inline ( always ) ]
pub fn atthizx ( & mut self ) -> ATTHIZX_W { ATTHIZX_W { w : self } } # [ doc = "Bits 16:23 - ATTHOLDx" ]
# [ inline ( always ) ]
pub fn attholdx ( & mut self ) -> ATTHOLDX_W { ATTHOLDX_W { w : self } } # [ doc = "Bits 8:15 - ATTWAITx" ]
# [ inline ( always ) ]
pub fn attwaitx ( & mut self ) -> ATTWAITX_W { ATTWAITX_W { w : self } } # [ doc = "Bits 0:7 - ATTSETx" ]
# [ inline ( always ) ]
pub fn attsetx ( & mut self ) -> ATTSETX_W { ATTSETX_W { w : self } } } } # [ doc = "ECC result register 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccr2](eccr2) module" ]
pub type ECCR2 = crate :: Reg < u32 , _ECCR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ECCR2 ; # [ doc = "`read()` method returns [eccr2::R](eccr2::R) reader structure" ]
impl crate :: Readable for ECCR2 { } # [ doc = "ECC result register 2" ]
pub mod eccr2 { # [ doc = "Reader of register ECCR2" ]
pub type R = crate :: R < u32 , super :: ECCR2 > ; # [ doc = "Reader of field `ECCx`" ]
pub type ECCX_R = crate :: R < u32 , u32 > ; impl R { # [ doc = "Bits 0:31 - ECCx" ]
# [ inline ( always ) ]
pub fn eccx ( & self ) -> ECCX_R { ECCX_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } } # [ doc = "PC Card/NAND Flash control register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcr3](pcr3) module" ]
pub type PCR3 = crate :: Reg < u32 , _PCR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PCR3 ; # [ doc = "`read()` method returns [pcr3::R](pcr3::R) reader structure" ]
impl crate :: Readable for PCR3 { } # [ doc = "`write(|w| ..)` method takes [pcr3::W](pcr3::W) writer structure" ]
impl crate :: Writable for PCR3 { } # [ doc = "PC Card/NAND Flash control register 3" ]
pub mod pcr3 { # [ doc = "Reader of register PCR3" ]
pub type R = crate :: R < u32 , super :: PCR3 > ; # [ doc = "Writer for register PCR3" ]
pub type W = crate :: W < u32 , super :: PCR3 > ; # [ doc = "Register PCR3 `reset()`'s with value 0x18" ]
impl crate :: ResetValue for super :: PCR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x18 } } # [ doc = "Reader of field `ECCPS`" ]
pub type ECCPS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ECCPS`" ]
pub struct ECCPS_W < 'a > { w : & 'a mut W , } impl < 'a > ECCPS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 17 ) ) | ( ( ( value as u32 ) & 0x07 ) << 17 ) ; self . w } } # [ doc = "Reader of field `TAR`" ]
pub type TAR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TAR`" ]
pub struct TAR_W < 'a > { w : & 'a mut W , } impl < 'a > TAR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 13 ) ) | ( ( ( value as u32 ) & 0x0f ) << 13 ) ; self . w } } # [ doc = "Reader of field `TCLR`" ]
pub type TCLR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TCLR`" ]
pub struct TCLR_W < 'a > { w : & 'a mut W , } impl < 'a > TCLR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 9 ) ) | ( ( ( value as u32 ) & 0x0f ) << 9 ) ; self . w } } # [ doc = "Reader of field `ECCEN`" ]
pub type ECCEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ECCEN`" ]
pub struct ECCEN_W < 'a > { w : & 'a mut W , } impl < 'a > ECCEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `PWID`" ]
pub type PWID_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PWID`" ]
pub struct PWID_W < 'a > { w : & 'a mut W , } impl < 'a > PWID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `PTYP`" ]
pub type PTYP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PTYP`" ]
pub struct PTYP_W < 'a > { w : & 'a mut W , } impl < 'a > PTYP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `PBKEN`" ]
pub type PBKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PBKEN`" ]
pub struct PBKEN_W < 'a > { w : & 'a mut W , } impl < 'a > PBKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `PWAITEN`" ]
pub type PWAITEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PWAITEN`" ]
pub struct PWAITEN_W < 'a > { w : & 'a mut W , } impl < 'a > PWAITEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } impl R { # [ doc = "Bits 17:19 - ECCPS" ]
# [ inline ( always ) ]
pub fn eccps ( & self ) -> ECCPS_R { ECCPS_R :: new ( ( ( self . bits >> 17 ) & 0x07 ) as u8 ) } # [ doc = "Bits 13:16 - TAR" ]
# [ inline ( always ) ]
pub fn tar ( & self ) -> TAR_R { TAR_R :: new ( ( ( self . bits >> 13 ) & 0x0f ) as u8 ) } # [ doc = "Bits 9:12 - TCLR" ]
# [ inline ( always ) ]
pub fn tclr ( & self ) -> TCLR_R { TCLR_R :: new ( ( ( self . bits >> 9 ) & 0x0f ) as u8 ) } # [ doc = "Bit 6 - ECCEN" ]
# [ inline ( always ) ]
pub fn eccen ( & self ) -> ECCEN_R { ECCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - PWID" ]
# [ inline ( always ) ]
pub fn pwid ( & self ) -> PWID_R { PWID_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 3 - PTYP" ]
# [ inline ( always ) ]
pub fn ptyp ( & self ) -> PTYP_R { PTYP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - PBKEN" ]
# [ inline ( always ) ]
pub fn pbken ( & self ) -> PBKEN_R { PBKEN_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - PWAITEN" ]
# [ inline ( always ) ]
pub fn pwaiten ( & self ) -> PWAITEN_R { PWAITEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 17:19 - ECCPS" ]
# [ inline ( always ) ]
pub fn eccps ( & mut self ) -> ECCPS_W { ECCPS_W { w : self } } # [ doc = "Bits 13:16 - TAR" ]
# [ inline ( always ) ]
pub fn tar ( & mut self ) -> TAR_W { TAR_W { w : self } } # [ doc = "Bits 9:12 - TCLR" ]
# [ inline ( always ) ]
pub fn tclr ( & mut self ) -> TCLR_W { TCLR_W { w : self } } # [ doc = "Bit 6 - ECCEN" ]
# [ inline ( always ) ]
pub fn eccen ( & mut self ) -> ECCEN_W { ECCEN_W { w : self } } # [ doc = "Bits 4:5 - PWID" ]
# [ inline ( always ) ]
pub fn pwid ( & mut self ) -> PWID_W { PWID_W { w : self } } # [ doc = "Bit 3 - PTYP" ]
# [ inline ( always ) ]
pub fn ptyp ( & mut self ) -> PTYP_W { PTYP_W { w : self } } # [ doc = "Bit 2 - PBKEN" ]
# [ inline ( always ) ]
pub fn pbken ( & mut self ) -> PBKEN_W { PBKEN_W { w : self } } # [ doc = "Bit 1 - PWAITEN" ]
# [ inline ( always ) ]
pub fn pwaiten ( & mut self ) -> PWAITEN_W { PWAITEN_W { w : self } } } } # [ doc = "FIFO status and interrupt register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr3](sr3) module" ]
pub type SR3 = crate :: Reg < u32 , _SR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR3 ; # [ doc = "`read()` method returns [sr3::R](sr3::R) reader structure" ]
impl crate :: Readable for SR3 { } # [ doc = "`write(|w| ..)` method takes [sr3::W](sr3::W) writer structure" ]
impl crate :: Writable for SR3 { } # [ doc = "FIFO status and interrupt register 3" ]
pub mod sr3 { # [ doc = "Reader of register SR3" ]
pub type R = crate :: R < u32 , super :: SR3 > ; # [ doc = "Writer for register SR3" ]
pub type W = crate :: W < u32 , super :: SR3 > ; # [ doc = "Register SR3 `reset()`'s with value 0x40" ]
impl crate :: ResetValue for super :: SR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x40 } } # [ doc = "Reader of field `FEMPT`" ]
pub type FEMPT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `IFEN`" ]
pub type IFEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IFEN`" ]
pub struct IFEN_W < 'a > { w : & 'a mut W , } impl < 'a > IFEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `ILEN`" ]
pub type ILEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ILEN`" ]
pub struct ILEN_W < 'a > { w : & 'a mut W , } impl < 'a > ILEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `IREN`" ]
pub type IREN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IREN`" ]
pub struct IREN_W < 'a > { w : & 'a mut W , } impl < 'a > IREN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `IFS`" ]
pub type IFS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IFS`" ]
pub struct IFS_W < 'a > { w : & 'a mut W , } impl < 'a > IFS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `ILS`" ]
pub type ILS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ILS`" ]
pub struct ILS_W < 'a > { w : & 'a mut W , } impl < 'a > ILS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `IRS`" ]
pub type IRS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IRS`" ]
pub struct IRS_W < 'a > { w : & 'a mut W , } impl < 'a > IRS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 6 - FEMPT" ]
# [ inline ( always ) ]
pub fn fempt ( & self ) -> FEMPT_R { FEMPT_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - IFEN" ]
# [ inline ( always ) ]
pub fn ifen ( & self ) -> IFEN_R { IFEN_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - ILEN" ]
# [ inline ( always ) ]
pub fn ilen ( & self ) -> ILEN_R { ILEN_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - IREN" ]
# [ inline ( always ) ]
pub fn iren ( & self ) -> IREN_R { IREN_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - IFS" ]
# [ inline ( always ) ]
pub fn ifs ( & self ) -> IFS_R { IFS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - ILS" ]
# [ inline ( always ) ]
pub fn ils ( & self ) -> ILS_R { ILS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - IRS" ]
# [ inline ( always ) ]
pub fn irs ( & self ) -> IRS_R { IRS_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 5 - IFEN" ]
# [ inline ( always ) ]
pub fn ifen ( & mut self ) -> IFEN_W { IFEN_W { w : self } } # [ doc = "Bit 4 - ILEN" ]
# [ inline ( always ) ]
pub fn ilen ( & mut self ) -> ILEN_W { ILEN_W { w : self } } # [ doc = "Bit 3 - IREN" ]
# [ inline ( always ) ]
pub fn iren ( & mut self ) -> IREN_W { IREN_W { w : self } } # [ doc = "Bit 2 - IFS" ]
# [ inline ( always ) ]
pub fn ifs ( & mut self ) -> IFS_W { IFS_W { w : self } } # [ doc = "Bit 1 - ILS" ]
# [ inline ( always ) ]
pub fn ils ( & mut self ) -> ILS_W { ILS_W { w : self } } # [ doc = "Bit 0 - IRS" ]
# [ inline ( always ) ]
pub fn irs ( & mut self ) -> IRS_W { IRS_W { w : self } } } } # [ doc = "Common memory space timing register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pmem3](pmem3) module" ]
pub type PMEM3 = crate :: Reg < u32 , _PMEM3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PMEM3 ; # [ doc = "`read()` method returns [pmem3::R](pmem3::R) reader structure" ]
impl crate :: Readable for PMEM3 { } # [ doc = "`write(|w| ..)` method takes [pmem3::W](pmem3::W) writer structure" ]
impl crate :: Writable for PMEM3 { } # [ doc = "Common memory space timing register 3" ]
pub mod pmem3 { # [ doc = "Reader of register PMEM3" ]
pub type R = crate :: R < u32 , super :: PMEM3 > ; # [ doc = "Writer for register PMEM3" ]
pub type W = crate :: W < u32 , super :: PMEM3 > ; # [ doc = "Register PMEM3 `reset()`'s with value 0xfcfc_fcfc" ]
impl crate :: ResetValue for super :: PMEM3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xfcfc_fcfc } } # [ doc = "Reader of field `MEMHIZx`" ]
pub type MEMHIZX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMHIZx`" ]
pub struct MEMHIZX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMHIZX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `MEMHOLDx`" ]
pub type MEMHOLDX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMHOLDx`" ]
pub struct MEMHOLDX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMHOLDX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `MEMWAITx`" ]
pub type MEMWAITX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMWAITx`" ]
pub struct MEMWAITX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMWAITX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `MEMSETx`" ]
pub type MEMSETX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMSETx`" ]
pub struct MEMSETX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMSETX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - MEMHIZx" ]
# [ inline ( always ) ]
pub fn memhizx ( & self ) -> MEMHIZX_R { MEMHIZX_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - MEMHOLDx" ]
# [ inline ( always ) ]
pub fn memholdx ( & self ) -> MEMHOLDX_R { MEMHOLDX_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - MEMWAITx" ]
# [ inline ( always ) ]
pub fn memwaitx ( & self ) -> MEMWAITX_R { MEMWAITX_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - MEMSETx" ]
# [ inline ( always ) ]
pub fn memsetx ( & self ) -> MEMSETX_R { MEMSETX_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - MEMHIZx" ]
# [ inline ( always ) ]
pub fn memhizx ( & mut self ) -> MEMHIZX_W { MEMHIZX_W { w : self } } # [ doc = "Bits 16:23 - MEMHOLDx" ]
# [ inline ( always ) ]
pub fn memholdx ( & mut self ) -> MEMHOLDX_W { MEMHOLDX_W { w : self } } # [ doc = "Bits 8:15 - MEMWAITx" ]
# [ inline ( always ) ]
pub fn memwaitx ( & mut self ) -> MEMWAITX_W { MEMWAITX_W { w : self } } # [ doc = "Bits 0:7 - MEMSETx" ]
# [ inline ( always ) ]
pub fn memsetx ( & mut self ) -> MEMSETX_W { MEMSETX_W { w : self } } } } # [ doc = "Attribute memory space timing register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [patt3](patt3) module" ]
pub type PATT3 = crate :: Reg < u32 , _PATT3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PATT3 ; # [ doc = "`read()` method returns [patt3::R](patt3::R) reader structure" ]
impl crate :: Readable for PATT3 { } # [ doc = "`write(|w| ..)` method takes [patt3::W](patt3::W) writer structure" ]
impl crate :: Writable for PATT3 { } # [ doc = "Attribute memory space timing register 3" ]
pub mod patt3 { # [ doc = "Reader of register PATT3" ]
pub type R = crate :: R < u32 , super :: PATT3 > ; # [ doc = "Writer for register PATT3" ]
pub type W = crate :: W < u32 , super :: PATT3 > ; # [ doc = "Register PATT3 `reset()`'s with value 0xfcfc_fcfc" ]
impl crate :: ResetValue for super :: PATT3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xfcfc_fcfc } } # [ doc = "Reader of field `ATTHIZx`" ]
pub type ATTHIZX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTHIZx`" ]
pub struct ATTHIZX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTHIZX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `ATTHOLDx`" ]
pub type ATTHOLDX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTHOLDx`" ]
pub struct ATTHOLDX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTHOLDX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `ATTWAITx`" ]
pub type ATTWAITX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTWAITx`" ]
pub struct ATTWAITX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTWAITX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ATTSETx`" ]
pub type ATTSETX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTSETx`" ]
pub struct ATTSETX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTSETX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - ATTHIZx" ]
# [ inline ( always ) ]
pub fn atthizx ( & self ) -> ATTHIZX_R { ATTHIZX_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - ATTHOLDx" ]
# [ inline ( always ) ]
pub fn attholdx ( & self ) -> ATTHOLDX_R { ATTHOLDX_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - ATTWAITx" ]
# [ inline ( always ) ]
pub fn attwaitx ( & self ) -> ATTWAITX_R { ATTWAITX_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - ATTSETx" ]
# [ inline ( always ) ]
pub fn attsetx ( & self ) -> ATTSETX_R { ATTSETX_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - ATTHIZx" ]
# [ inline ( always ) ]
pub fn atthizx ( & mut self ) -> ATTHIZX_W { ATTHIZX_W { w : self } } # [ doc = "Bits 16:23 - ATTHOLDx" ]
# [ inline ( always ) ]
pub fn attholdx ( & mut self ) -> ATTHOLDX_W { ATTHOLDX_W { w : self } } # [ doc = "Bits 8:15 - ATTWAITx" ]
# [ inline ( always ) ]
pub fn attwaitx ( & mut self ) -> ATTWAITX_W { ATTWAITX_W { w : self } } # [ doc = "Bits 0:7 - ATTSETx" ]
# [ inline ( always ) ]
pub fn attsetx ( & mut self ) -> ATTSETX_W { ATTSETX_W { w : self } } } } # [ doc = "ECC result register 3\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eccr3](eccr3) module" ]
pub type ECCR3 = crate :: Reg < u32 , _ECCR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ECCR3 ; # [ doc = "`read()` method returns [eccr3::R](eccr3::R) reader structure" ]
impl crate :: Readable for ECCR3 { } # [ doc = "ECC result register 3" ]
pub mod eccr3 { # [ doc = "Reader of register ECCR3" ]
pub type R = crate :: R < u32 , super :: ECCR3 > ; # [ doc = "Reader of field `ECCx`" ]
pub type ECCX_R = crate :: R < u32 , u32 > ; impl R { # [ doc = "Bits 0:31 - ECCx" ]
# [ inline ( always ) ]
pub fn eccx ( & self ) -> ECCX_R { ECCX_R :: new ( ( self . bits & 0xffff_ffff ) as u32 ) } } } # [ doc = "PC Card/NAND Flash control register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pcr4](pcr4) module" ]
pub type PCR4 = crate :: Reg < u32 , _PCR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PCR4 ; # [ doc = "`read()` method returns [pcr4::R](pcr4::R) reader structure" ]
impl crate :: Readable for PCR4 { } # [ doc = "`write(|w| ..)` method takes [pcr4::W](pcr4::W) writer structure" ]
impl crate :: Writable for PCR4 { } # [ doc = "PC Card/NAND Flash control register 4" ]
pub mod pcr4 { # [ doc = "Reader of register PCR4" ]
pub type R = crate :: R < u32 , super :: PCR4 > ; # [ doc = "Writer for register PCR4" ]
pub type W = crate :: W < u32 , super :: PCR4 > ; # [ doc = "Register PCR4 `reset()`'s with value 0x18" ]
impl crate :: ResetValue for super :: PCR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x18 } } # [ doc = "Reader of field `ECCPS`" ]
pub type ECCPS_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ECCPS`" ]
pub struct ECCPS_W < 'a > { w : & 'a mut W , } impl < 'a > ECCPS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 17 ) ) | ( ( ( value as u32 ) & 0x07 ) << 17 ) ; self . w } } # [ doc = "Reader of field `TAR`" ]
pub type TAR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TAR`" ]
pub struct TAR_W < 'a > { w : & 'a mut W , } impl < 'a > TAR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 13 ) ) | ( ( ( value as u32 ) & 0x0f ) << 13 ) ; self . w } } # [ doc = "Reader of field `TCLR`" ]
pub type TCLR_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TCLR`" ]
pub struct TCLR_W < 'a > { w : & 'a mut W , } impl < 'a > TCLR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 9 ) ) | ( ( ( value as u32 ) & 0x0f ) << 9 ) ; self . w } } # [ doc = "Reader of field `ECCEN`" ]
pub type ECCEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ECCEN`" ]
pub struct ECCEN_W < 'a > { w : & 'a mut W , } impl < 'a > ECCEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `PWID`" ]
pub type PWID_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PWID`" ]
pub struct PWID_W < 'a > { w : & 'a mut W , } impl < 'a > PWID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Reader of field `PTYP`" ]
pub type PTYP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PTYP`" ]
pub struct PTYP_W < 'a > { w : & 'a mut W , } impl < 'a > PTYP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `PBKEN`" ]
pub type PBKEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PBKEN`" ]
pub struct PBKEN_W < 'a > { w : & 'a mut W , } impl < 'a > PBKEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `PWAITEN`" ]
pub type PWAITEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `PWAITEN`" ]
pub struct PWAITEN_W < 'a > { w : & 'a mut W , } impl < 'a > PWAITEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } impl R { # [ doc = "Bits 17:19 - ECCPS" ]
# [ inline ( always ) ]
pub fn eccps ( & self ) -> ECCPS_R { ECCPS_R :: new ( ( ( self . bits >> 17 ) & 0x07 ) as u8 ) } # [ doc = "Bits 13:16 - TAR" ]
# [ inline ( always ) ]
pub fn tar ( & self ) -> TAR_R { TAR_R :: new ( ( ( self . bits >> 13 ) & 0x0f ) as u8 ) } # [ doc = "Bits 9:12 - TCLR" ]
# [ inline ( always ) ]
pub fn tclr ( & self ) -> TCLR_R { TCLR_R :: new ( ( ( self . bits >> 9 ) & 0x0f ) as u8 ) } # [ doc = "Bit 6 - ECCEN" ]
# [ inline ( always ) ]
pub fn eccen ( & self ) -> ECCEN_R { ECCEN_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:5 - PWID" ]
# [ inline ( always ) ]
pub fn pwid ( & self ) -> PWID_R { PWID_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bit 3 - PTYP" ]
# [ inline ( always ) ]
pub fn ptyp ( & self ) -> PTYP_R { PTYP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - PBKEN" ]
# [ inline ( always ) ]
pub fn pbken ( & self ) -> PBKEN_R { PBKEN_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - PWAITEN" ]
# [ inline ( always ) ]
pub fn pwaiten ( & self ) -> PWAITEN_R { PWAITEN_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 17:19 - ECCPS" ]
# [ inline ( always ) ]
pub fn eccps ( & mut self ) -> ECCPS_W { ECCPS_W { w : self } } # [ doc = "Bits 13:16 - TAR" ]
# [ inline ( always ) ]
pub fn tar ( & mut self ) -> TAR_W { TAR_W { w : self } } # [ doc = "Bits 9:12 - TCLR" ]
# [ inline ( always ) ]
pub fn tclr ( & mut self ) -> TCLR_W { TCLR_W { w : self } } # [ doc = "Bit 6 - ECCEN" ]
# [ inline ( always ) ]
pub fn eccen ( & mut self ) -> ECCEN_W { ECCEN_W { w : self } } # [ doc = "Bits 4:5 - PWID" ]
# [ inline ( always ) ]
pub fn pwid ( & mut self ) -> PWID_W { PWID_W { w : self } } # [ doc = "Bit 3 - PTYP" ]
# [ inline ( always ) ]
pub fn ptyp ( & mut self ) -> PTYP_W { PTYP_W { w : self } } # [ doc = "Bit 2 - PBKEN" ]
# [ inline ( always ) ]
pub fn pbken ( & mut self ) -> PBKEN_W { PBKEN_W { w : self } } # [ doc = "Bit 1 - PWAITEN" ]
# [ inline ( always ) ]
pub fn pwaiten ( & mut self ) -> PWAITEN_W { PWAITEN_W { w : self } } } } # [ doc = "FIFO status and interrupt register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr4](sr4) module" ]
pub type SR4 = crate :: Reg < u32 , _SR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR4 ; # [ doc = "`read()` method returns [sr4::R](sr4::R) reader structure" ]
impl crate :: Readable for SR4 { } # [ doc = "`write(|w| ..)` method takes [sr4::W](sr4::W) writer structure" ]
impl crate :: Writable for SR4 { } # [ doc = "FIFO status and interrupt register 4" ]
pub mod sr4 { # [ doc = "Reader of register SR4" ]
pub type R = crate :: R < u32 , super :: SR4 > ; # [ doc = "Writer for register SR4" ]
pub type W = crate :: W < u32 , super :: SR4 > ; # [ doc = "Register SR4 `reset()`'s with value 0x40" ]
impl crate :: ResetValue for super :: SR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x40 } } # [ doc = "Reader of field `FEMPT`" ]
pub type FEMPT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `IFEN`" ]
pub type IFEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IFEN`" ]
pub struct IFEN_W < 'a > { w : & 'a mut W , } impl < 'a > IFEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `ILEN`" ]
pub type ILEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ILEN`" ]
pub struct ILEN_W < 'a > { w : & 'a mut W , } impl < 'a > ILEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `IREN`" ]
pub type IREN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IREN`" ]
pub struct IREN_W < 'a > { w : & 'a mut W , } impl < 'a > IREN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `IFS`" ]
pub type IFS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IFS`" ]
pub struct IFS_W < 'a > { w : & 'a mut W , } impl < 'a > IFS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `ILS`" ]
pub type ILS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ILS`" ]
pub struct ILS_W < 'a > { w : & 'a mut W , } impl < 'a > ILS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `IRS`" ]
pub type IRS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IRS`" ]
pub struct IRS_W < 'a > { w : & 'a mut W , } impl < 'a > IRS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 6 - FEMPT" ]
# [ inline ( always ) ]
pub fn fempt ( & self ) -> FEMPT_R { FEMPT_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - IFEN" ]
# [ inline ( always ) ]
pub fn ifen ( & self ) -> IFEN_R { IFEN_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - ILEN" ]
# [ inline ( always ) ]
pub fn ilen ( & self ) -> ILEN_R { ILEN_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - IREN" ]
# [ inline ( always ) ]
pub fn iren ( & self ) -> IREN_R { IREN_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - IFS" ]
# [ inline ( always ) ]
pub fn ifs ( & self ) -> IFS_R { IFS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - ILS" ]
# [ inline ( always ) ]
pub fn ils ( & self ) -> ILS_R { ILS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - IRS" ]
# [ inline ( always ) ]
pub fn irs ( & self ) -> IRS_R { IRS_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 5 - IFEN" ]
# [ inline ( always ) ]
pub fn ifen ( & mut self ) -> IFEN_W { IFEN_W { w : self } } # [ doc = "Bit 4 - ILEN" ]
# [ inline ( always ) ]
pub fn ilen ( & mut self ) -> ILEN_W { ILEN_W { w : self } } # [ doc = "Bit 3 - IREN" ]
# [ inline ( always ) ]
pub fn iren ( & mut self ) -> IREN_W { IREN_W { w : self } } # [ doc = "Bit 2 - IFS" ]
# [ inline ( always ) ]
pub fn ifs ( & mut self ) -> IFS_W { IFS_W { w : self } } # [ doc = "Bit 1 - ILS" ]
# [ inline ( always ) ]
pub fn ils ( & mut self ) -> ILS_W { ILS_W { w : self } } # [ doc = "Bit 0 - IRS" ]
# [ inline ( always ) ]
pub fn irs ( & mut self ) -> IRS_W { IRS_W { w : self } } } } # [ doc = "Common memory space timing register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pmem4](pmem4) module" ]
pub type PMEM4 = crate :: Reg < u32 , _PMEM4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PMEM4 ; # [ doc = "`read()` method returns [pmem4::R](pmem4::R) reader structure" ]
impl crate :: Readable for PMEM4 { } # [ doc = "`write(|w| ..)` method takes [pmem4::W](pmem4::W) writer structure" ]
impl crate :: Writable for PMEM4 { } # [ doc = "Common memory space timing register 4" ]
pub mod pmem4 { # [ doc = "Reader of register PMEM4" ]
pub type R = crate :: R < u32 , super :: PMEM4 > ; # [ doc = "Writer for register PMEM4" ]
pub type W = crate :: W < u32 , super :: PMEM4 > ; # [ doc = "Register PMEM4 `reset()`'s with value 0xfcfc_fcfc" ]
impl crate :: ResetValue for super :: PMEM4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xfcfc_fcfc } } # [ doc = "Reader of field `MEMHIZx`" ]
pub type MEMHIZX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMHIZx`" ]
pub struct MEMHIZX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMHIZX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `MEMHOLDx`" ]
pub type MEMHOLDX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMHOLDx`" ]
pub struct MEMHOLDX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMHOLDX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `MEMWAITx`" ]
pub type MEMWAITX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMWAITx`" ]
pub struct MEMWAITX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMWAITX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `MEMSETx`" ]
pub type MEMSETX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MEMSETx`" ]
pub struct MEMSETX_W < 'a > { w : & 'a mut W , } impl < 'a > MEMSETX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - MEMHIZx" ]
# [ inline ( always ) ]
pub fn memhizx ( & self ) -> MEMHIZX_R { MEMHIZX_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - MEMHOLDx" ]
# [ inline ( always ) ]
pub fn memholdx ( & self ) -> MEMHOLDX_R { MEMHOLDX_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - MEMWAITx" ]
# [ inline ( always ) ]
pub fn memwaitx ( & self ) -> MEMWAITX_R { MEMWAITX_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - MEMSETx" ]
# [ inline ( always ) ]
pub fn memsetx ( & self ) -> MEMSETX_R { MEMSETX_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - MEMHIZx" ]
# [ inline ( always ) ]
pub fn memhizx ( & mut self ) -> MEMHIZX_W { MEMHIZX_W { w : self } } # [ doc = "Bits 16:23 - MEMHOLDx" ]
# [ inline ( always ) ]
pub fn memholdx ( & mut self ) -> MEMHOLDX_W { MEMHOLDX_W { w : self } } # [ doc = "Bits 8:15 - MEMWAITx" ]
# [ inline ( always ) ]
pub fn memwaitx ( & mut self ) -> MEMWAITX_W { MEMWAITX_W { w : self } } # [ doc = "Bits 0:7 - MEMSETx" ]
# [ inline ( always ) ]
pub fn memsetx ( & mut self ) -> MEMSETX_W { MEMSETX_W { w : self } } } } # [ doc = "Attribute memory space timing register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [patt4](patt4) module" ]
pub type PATT4 = crate :: Reg < u32 , _PATT4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PATT4 ; # [ doc = "`read()` method returns [patt4::R](patt4::R) reader structure" ]
impl crate :: Readable for PATT4 { } # [ doc = "`write(|w| ..)` method takes [patt4::W](patt4::W) writer structure" ]
impl crate :: Writable for PATT4 { } # [ doc = "Attribute memory space timing register 4" ]
pub mod patt4 { # [ doc = "Reader of register PATT4" ]
pub type R = crate :: R < u32 , super :: PATT4 > ; # [ doc = "Writer for register PATT4" ]
pub type W = crate :: W < u32 , super :: PATT4 > ; # [ doc = "Register PATT4 `reset()`'s with value 0xfcfc_fcfc" ]
impl crate :: ResetValue for super :: PATT4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xfcfc_fcfc } } # [ doc = "Reader of field `ATTHIZx`" ]
pub type ATTHIZX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTHIZx`" ]
pub struct ATTHIZX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTHIZX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `ATTHOLDx`" ]
pub type ATTHOLDX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTHOLDx`" ]
pub struct ATTHOLDX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTHOLDX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `ATTWAITx`" ]
pub type ATTWAITX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTWAITx`" ]
pub struct ATTWAITX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTWAITX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ATTSETx`" ]
pub type ATTSETX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ATTSETx`" ]
pub struct ATTSETX_W < 'a > { w : & 'a mut W , } impl < 'a > ATTSETX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - ATTHIZx" ]
# [ inline ( always ) ]
pub fn atthizx ( & self ) -> ATTHIZX_R { ATTHIZX_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - ATTHOLDx" ]
# [ inline ( always ) ]
pub fn attholdx ( & self ) -> ATTHOLDX_R { ATTHOLDX_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - ATTWAITx" ]
# [ inline ( always ) ]
pub fn attwaitx ( & self ) -> ATTWAITX_R { ATTWAITX_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - ATTSETx" ]
# [ inline ( always ) ]
pub fn attsetx ( & self ) -> ATTSETX_R { ATTSETX_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - ATTHIZx" ]
# [ inline ( always ) ]
pub fn atthizx ( & mut self ) -> ATTHIZX_W { ATTHIZX_W { w : self } } # [ doc = "Bits 16:23 - ATTHOLDx" ]
# [ inline ( always ) ]
pub fn attholdx ( & mut self ) -> ATTHOLDX_W { ATTHOLDX_W { w : self } } # [ doc = "Bits 8:15 - ATTWAITx" ]
# [ inline ( always ) ]
pub fn attwaitx ( & mut self ) -> ATTWAITX_W { ATTWAITX_W { w : self } } # [ doc = "Bits 0:7 - ATTSETx" ]
# [ inline ( always ) ]
pub fn attsetx ( & mut self ) -> ATTSETX_W { ATTSETX_W { w : self } } } } # [ doc = "I/O space timing register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pio4](pio4) module" ]
pub type PIO4 = crate :: Reg < u32 , _PIO4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PIO4 ; # [ doc = "`read()` method returns [pio4::R](pio4::R) reader structure" ]
impl crate :: Readable for PIO4 { } # [ doc = "`write(|w| ..)` method takes [pio4::W](pio4::W) writer structure" ]
impl crate :: Writable for PIO4 { } # [ doc = "I/O space timing register 4" ]
pub mod pio4 { # [ doc = "Reader of register PIO4" ]
pub type R = crate :: R < u32 , super :: PIO4 > ; # [ doc = "Writer for register PIO4" ]
pub type W = crate :: W < u32 , super :: PIO4 > ; # [ doc = "Register PIO4 `reset()`'s with value 0xfcfc_fcfc" ]
impl crate :: ResetValue for super :: PIO4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0xfcfc_fcfc } } # [ doc = "Reader of field `IOHIZx`" ]
pub type IOHIZX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IOHIZx`" ]
pub struct IOHIZX_W < 'a > { w : & 'a mut W , } impl < 'a > IOHIZX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 24 ) ) | ( ( ( value as u32 ) & 0xff ) << 24 ) ; self . w } } # [ doc = "Reader of field `IOHOLDx`" ]
pub type IOHOLDX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IOHOLDx`" ]
pub struct IOHOLDX_W < 'a > { w : & 'a mut W , } impl < 'a > IOHOLDX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `IOWAITx`" ]
pub type IOWAITX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IOWAITx`" ]
pub struct IOWAITX_W < 'a > { w : & 'a mut W , } impl < 'a > IOWAITX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `IOSETx`" ]
pub type IOSETX_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IOSETx`" ]
pub struct IOSETX_W < 'a > { w : & 'a mut W , } impl < 'a > IOSETX_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 24:31 - IOHIZx" ]
# [ inline ( always ) ]
pub fn iohizx ( & self ) -> IOHIZX_R { IOHIZX_R :: new ( ( ( self . bits >> 24 ) & 0xff ) as u8 ) } # [ doc = "Bits 16:23 - IOHOLDx" ]
# [ inline ( always ) ]
pub fn ioholdx ( & self ) -> IOHOLDX_R { IOHOLDX_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 8:15 - IOWAITx" ]
# [ inline ( always ) ]
pub fn iowaitx ( & self ) -> IOWAITX_R { IOWAITX_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - IOSETx" ]
# [ inline ( always ) ]
pub fn iosetx ( & self ) -> IOSETX_R { IOSETX_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 24:31 - IOHIZx" ]
# [ inline ( always ) ]
pub fn iohizx ( & mut self ) -> IOHIZX_W { IOHIZX_W { w : self } } # [ doc = "Bits 16:23 - IOHOLDx" ]
# [ inline ( always ) ]
pub fn ioholdx ( & mut self ) -> IOHOLDX_W { IOHOLDX_W { w : self } } # [ doc = "Bits 8:15 - IOWAITx" ]
# [ inline ( always ) ]
pub fn iowaitx ( & mut self ) -> IOWAITX_W { IOWAITX_W { w : self } } # [ doc = "Bits 0:7 - IOSETx" ]
# [ inline ( always ) ]
pub fn iosetx ( & mut self ) -> IOSETX_W { IOSETX_W { w : self } } } } # [ doc = "SRAM/NOR-Flash write timing registers 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bwtr1](bwtr1) module" ]
pub type BWTR1 = crate :: Reg < u32 , _BWTR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BWTR1 ; # [ doc = "`read()` method returns [bwtr1::R](bwtr1::R) reader structure" ]
impl crate :: Readable for BWTR1 { } # [ doc = "`write(|w| ..)` method takes [bwtr1::W](bwtr1::W) writer structure" ]
impl crate :: Writable for BWTR1 { } # [ doc = "SRAM/NOR-Flash write timing registers 1" ]
pub mod bwtr1 { # [ doc = "Reader of register BWTR1" ]
pub type R = crate :: R < u32 , super :: BWTR1 > ; # [ doc = "Writer for register BWTR1" ]
pub type W = crate :: W < u32 , super :: BWTR1 > ; # [ doc = "Register BWTR1 `reset()`'s with value 0x0fff_ffff" ]
impl crate :: ResetValue for super :: BWTR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } # [ doc = "SRAM/NOR-Flash write timing registers 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bwtr2](bwtr2) module" ]
pub type BWTR2 = crate :: Reg < u32 , _BWTR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BWTR2 ; # [ doc = "`read()` method returns [bwtr2::R](bwtr2::R) reader structure" ]
impl crate :: Readable for BWTR2 { } # [ doc = "`write(|w| ..)` method takes [bwtr2::W](bwtr2::W) writer structure" ]
impl crate :: Writable for BWTR2 { } # [ doc = "SRAM/NOR-Flash write timing registers 2" ]
pub mod bwtr2 { # [ doc = "Reader of register BWTR2" ]
pub type R = crate :: R < u32 , super :: BWTR2 > ; # [ doc = "Writer for register BWTR2" ]
pub type W = crate :: W < u32 , super :: BWTR2 > ; # [ doc = "Register BWTR2 `reset()`'s with value 0x0fff_ffff" ]
impl crate :: ResetValue for super :: BWTR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } # [ doc = "SRAM/NOR-Flash write timing registers 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bwtr3](bwtr3) module" ]
pub type BWTR3 = crate :: Reg < u32 , _BWTR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BWTR3 ; # [ doc = "`read()` method returns [bwtr3::R](bwtr3::R) reader structure" ]
impl crate :: Readable for BWTR3 { } # [ doc = "`write(|w| ..)` method takes [bwtr3::W](bwtr3::W) writer structure" ]
impl crate :: Writable for BWTR3 { } # [ doc = "SRAM/NOR-Flash write timing registers 3" ]
pub mod bwtr3 { # [ doc = "Reader of register BWTR3" ]
pub type R = crate :: R < u32 , super :: BWTR3 > ; # [ doc = "Writer for register BWTR3" ]
pub type W = crate :: W < u32 , super :: BWTR3 > ; # [ doc = "Register BWTR3 `reset()`'s with value 0x0fff_ffff" ]
impl crate :: ResetValue for super :: BWTR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } # [ doc = "SRAM/NOR-Flash write timing registers 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bwtr4](bwtr4) module" ]
pub type BWTR4 = crate :: Reg < u32 , _BWTR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BWTR4 ; # [ doc = "`read()` method returns [bwtr4::R](bwtr4::R) reader structure" ]
impl crate :: Readable for BWTR4 { } # [ doc = "`write(|w| ..)` method takes [bwtr4::W](bwtr4::W) writer structure" ]
impl crate :: Writable for BWTR4 { } # [ doc = "SRAM/NOR-Flash write timing registers 4" ]
pub mod bwtr4 { # [ doc = "Reader of register BWTR4" ]
pub type R = crate :: R < u32 , super :: BWTR4 > ; # [ doc = "Writer for register BWTR4" ]
pub type W = crate :: W < u32 , super :: BWTR4 > ; # [ doc = "Register BWTR4 `reset()`'s with value 0x0fff_ffff" ]
impl crate :: ResetValue for super :: BWTR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff_ffff } } # [ doc = "Reader of field `ACCMOD`" ]
pub type ACCMOD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ACCMOD`" ]
pub struct ACCMOD_W < 'a > { w : & 'a mut W , } impl < 'a > ACCMOD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Reader of field `DATLAT`" ]
pub type DATLAT_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATLAT`" ]
pub struct DATLAT_W < 'a > { w : & 'a mut W , } impl < 'a > DATLAT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Reader of field `CLKDIV`" ]
pub type CLKDIV_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CLKDIV`" ]
pub struct CLKDIV_W < 'a > { w : & 'a mut W , } impl < 'a > CLKDIV_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BUSTURN`" ]
pub type BUSTURN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BUSTURN`" ]
pub struct BUSTURN_W < 'a > { w : & 'a mut W , } impl < 'a > BUSTURN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `DATAST`" ]
pub type DATAST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DATAST`" ]
pub struct DATAST_W < 'a > { w : & 'a mut W , } impl < 'a > DATAST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 8 ) ) | ( ( ( value as u32 ) & 0xff ) << 8 ) ; self . w } } # [ doc = "Reader of field `ADDHLD`" ]
pub type ADDHLD_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDHLD`" ]
pub struct ADDHLD_W < 'a > { w : & 'a mut W , } impl < 'a > ADDHLD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `ADDSET`" ]
pub type ADDSET_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `ADDSET`" ]
pub struct ADDSET_W < 'a > { w : & 'a mut W , } impl < 'a > ADDSET_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & self ) -> ACCMOD_R { ACCMOD_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & self ) -> DATLAT_R { DATLAT_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & self ) -> CLKDIV_R { CLKDIV_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & self ) -> BUSTURN_R { BUSTURN_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & self ) -> DATAST_R { DATAST_R :: new ( ( ( self . bits >> 8 ) & 0xff ) as u8 ) } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & self ) -> ADDHLD_R { ADDHLD_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & self ) -> ADDSET_R { ADDSET_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:29 - ACCMOD" ]
# [ inline ( always ) ]
pub fn accmod ( & mut self ) -> ACCMOD_W { ACCMOD_W { w : self } } # [ doc = "Bits 24:27 - DATLAT" ]
# [ inline ( always ) ]
pub fn datlat ( & mut self ) -> DATLAT_W { DATLAT_W { w : self } } # [ doc = "Bits 20:23 - CLKDIV" ]
# [ inline ( always ) ]
pub fn clkdiv ( & mut self ) -> CLKDIV_W { CLKDIV_W { w : self } } # [ doc = "Bits 16:19 - Bus turnaround phase duration" ]
# [ inline ( always ) ]
pub fn busturn ( & mut self ) -> BUSTURN_W { BUSTURN_W { w : self } } # [ doc = "Bits 8:15 - DATAST" ]
# [ inline ( always ) ]
pub fn datast ( & mut self ) -> DATAST_W { DATAST_W { w : self } } # [ doc = "Bits 4:7 - ADDHLD" ]
# [ inline ( always ) ]
pub fn addhld ( & mut self ) -> ADDHLD_W { ADDHLD_W { w : self } } # [ doc = "Bits 0:3 - ADDSET" ]
# [ inline ( always ) ]
pub fn addset ( & mut self ) -> ADDSET_W { ADDSET_W { w : self } } } } } # [ doc = "Advanced timer" ]
pub struct TIM1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM1 { } impl TIM1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim1 :: RegisterBlock { 0x4001_2c00 as * const _ } } impl Deref for TIM1 { type Target = tim1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM1 :: ptr ( ) } } } # [ doc = "Advanced timer" ]
pub mod tim1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - control register 1" ]
pub cr1 : CR1 , # [ doc = "0x04 - control register 2" ]
pub cr2 : CR2 , # [ doc = "0x08 - slave mode control register" ]
pub smcr : SMCR , # [ doc = "0x0c - DMA/Interrupt enable register" ]
pub dier : DIER , # [ doc = "0x10 - status register" ]
pub sr : SR , # [ doc = "0x14 - event generation register" ]
pub egr : EGR , _reserved_6_ccmr1 : [ u8 ; 4usize ]
, _reserved_7_ccmr2 : [ u8 ; 4usize ]
, # [ doc = "0x20 - capture/compare enable register" ]
pub ccer : CCER , # [ doc = "0x24 - counter" ]
pub cnt : CNT , # [ doc = "0x28 - prescaler" ]
pub psc : PSC , # [ doc = "0x2c - auto-reload register" ]
pub arr : ARR , # [ doc = "0x30 - repetition counter register" ]
pub rcr : RCR , # [ doc = "0x34 - capture/compare register 1" ]
pub ccr1 : CCR , # [ doc = "0x38 - capture/compare register 1" ]
pub ccr2 : CCR , # [ doc = "0x3c - capture/compare register 1" ]
pub ccr3 : CCR , # [ doc = "0x40 - capture/compare register 1" ]
pub ccr4 : CCR , # [ doc = "0x44 - break and dead-time register" ]
pub bdtr : BDTR , # [ doc = "0x48 - DMA control register" ]
pub dcr : DCR , # [ doc = "0x4c - DMA address for full transfer" ]
pub dmar : DMAR , _reserved20 : [ u8 ; 4usize ]
, # [ doc = "0x54 - capture/compare mode register 3 (output mode)" ]
pub ccmr3_output : CCMR3_OUTPUT , # [ doc = "0x58 - capture/compare register 5" ]
pub ccr5 : CCR5 , # [ doc = "0x5c - capture/compare register 6" ]
pub ccr6 : CCR6 , # [ doc = "0x60 - option registers" ]
pub or : OR , } impl RegisterBlock { # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input ( & self ) -> & CCMR1_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register 1 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_input_mut ( & self ) -> & mut CCMR1_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_INPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output ( & self ) -> & CCMR1_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 24usize ) as * const CCMR1_OUTPUT ) } } # [ doc = "0x18 - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr1_output_mut ( & self ) -> & mut CCMR1_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 24usize ) as * mut CCMR1_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input ( & self ) -> & CCMR2_INPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register 2 (input mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_input_mut ( & self ) -> & mut CCMR2_INPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_INPUT ) } } # [ doc = "0x1c - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output ( & self ) -> & CCMR2_OUTPUT { unsafe { & * ( ( ( self as * const Self ) as * const u8 ) . add ( 28usize ) as * const CCMR2_OUTPUT ) } } # [ doc = "0x1c - capture/compare mode register (output mode)" ]
# [ inline ( always ) ]
pub fn ccmr2_output_mut ( & self ) -> & mut CCMR2_OUTPUT { unsafe { & mut * ( ( ( self as * const Self ) as * mut u8 ) . add ( 28usize ) as * mut CCMR2_OUTPUT ) } } } # [ doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module" ]
pub type CR1 = crate :: Reg < u32 , _CR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR1 ; # [ doc = "`read()` method returns [cr1::R](cr1::R) reader structure" ]
impl crate :: Readable for CR1 { } # [ doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure" ]
impl crate :: Writable for CR1 { } # [ doc = "control register 1" ]
pub mod cr1 { # [ doc = "Reader of register CR1" ]
pub type R = crate :: R < u32 , super :: CR1 > ; # [ doc = "Writer for register CR1" ]
pub type W = crate :: W < u32 , super :: CR1 > ; # [ doc = "Register CR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Counter enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CEN_A { # [ doc = "0: Counter disabled" ]
DISABLED = 0 , # [ doc = "1: Counter enabled" ]
ENABLED = 1 } impl From < CEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : CEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CEN`" ]
pub type CEN_R = crate :: R < bool , CEN_A > ; impl CEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CEN_A { match self . bits { false => CEN_A :: DISABLED , true => CEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CEN_A :: ENABLED } } # [ doc = "Write proxy for field `CEN`" ]
pub struct CEN_W < 'a > { w : & 'a mut W , } impl < 'a > CEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: DISABLED ) } # [ doc = "Counter enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Update disable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDIS_A { # [ doc = "0: Update event enabled" ]
ENABLED = 0 , # [ doc = "1: Update event disabled" ]
DISABLED = 1 } impl From < UDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDIS`" ]
pub type UDIS_R = crate :: R < bool , UDIS_A > ; impl UDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDIS_A { match self . bits { false => UDIS_A :: ENABLED , true => UDIS_A :: DISABLED } } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDIS_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDIS_A :: DISABLED } } # [ doc = "Write proxy for field `UDIS`" ]
pub struct UDIS_W < 'a > { w : & 'a mut W , } impl < 'a > UDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update event enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: ENABLED ) } # [ doc = "Update event disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDIS_A :: DISABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update request source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum URS_A { # [ doc = "0: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
ANYEVENT = 0 , # [ doc = "1: Only counter overflow/underflow generates an update interrupt or DMA request" ]
COUNTERONLY = 1 } impl From < URS_A > for bool { # [ inline ( always ) ]
fn from ( variant : URS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `URS`" ]
pub type URS_R = crate :: R < bool , URS_A > ; impl URS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> URS_A { match self . bits { false => URS_A :: ANYEVENT , true => URS_A :: COUNTERONLY } } # [ doc = "Checks if the value of the field is `ANYEVENT`" ]
# [ inline ( always ) ]
pub fn is_any_event ( & self ) -> bool { * self == URS_A :: ANYEVENT } # [ doc = "Checks if the value of the field is `COUNTERONLY`" ]
# [ inline ( always ) ]
pub fn is_counter_only ( & self ) -> bool { * self == URS_A :: COUNTERONLY } } # [ doc = "Write proxy for field `URS`" ]
pub struct URS_W < 'a > { w : & 'a mut W , } impl < 'a > URS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : URS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn any_event ( self ) -> & 'a mut W { self . variant ( URS_A :: ANYEVENT ) } # [ doc = "Only counter overflow/underflow generates an update interrupt or DMA request" ]
# [ inline ( always ) ]
pub fn counter_only ( self ) -> & 'a mut W { self . variant ( URS_A :: COUNTERONLY ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "One-pulse mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPM_A { # [ doc = "0: Counter is not stopped at update event" ]
DISABLED = 0 , # [ doc = "1: Counter stops counting at the next update event (clearing the CEN bit)" ]
ENABLED = 1 } impl From < OPM_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPM`" ]
pub type OPM_R = crate :: R < bool , OPM_A > ; impl OPM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPM_A { match self . bits { false => OPM_A :: DISABLED , true => OPM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPM_A :: ENABLED } } # [ doc = "Write proxy for field `OPM`" ]
pub struct OPM_W < 'a > { w : & 'a mut W , } impl < 'a > OPM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter is not stopped at update event" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: DISABLED ) } # [ doc = "Counter stops counting at the next update event (clearing the CEN bit)" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Direction\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIR_A { # [ doc = "0: Counter used as upcounter" ]
UP = 0 , # [ doc = "1: Counter used as downcounter" ]
DOWN = 1 } impl From < DIR_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIR`" ]
pub type DIR_R = crate :: R < bool , DIR_A > ; impl DIR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIR_A { match self . bits { false => DIR_A :: UP , true => DIR_A :: DOWN } } # [ doc = "Checks if the value of the field is `UP`" ]
# [ inline ( always ) ]
pub fn is_up ( & self ) -> bool { * self == DIR_A :: UP } # [ doc = "Checks if the value of the field is `DOWN`" ]
# [ inline ( always ) ]
pub fn is_down ( & self ) -> bool { * self == DIR_A :: DOWN } } # [ doc = "Write proxy for field `DIR`" ]
pub struct DIR_W < 'a > { w : & 'a mut W , } impl < 'a > DIR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Counter used as upcounter" ]
# [ inline ( always ) ]
pub fn up ( self ) -> & 'a mut W { self . variant ( DIR_A :: UP ) } # [ doc = "Counter used as downcounter" ]
# [ inline ( always ) ]
pub fn down ( self ) -> & 'a mut W { self . variant ( DIR_A :: DOWN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Center-aligned mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CMS_A { # [ doc = "0: The counter counts up or down depending on the direction bit" ]
EDGEALIGNED = 0 , # [ doc = "1: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
CENTERALIGNED1 = 1 , # [ doc = "2: The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
CENTERALIGNED2 = 2 , # [ doc = "3: The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
CENTERALIGNED3 = 3 } impl From < CMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CMS`" ]
pub type CMS_R = crate :: R < u8 , CMS_A > ; impl CMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CMS_A { match self . bits { 0 => CMS_A :: EDGEALIGNED , 1 => CMS_A :: CENTERALIGNED1 , 2 => CMS_A :: CENTERALIGNED2 , 3 => CMS_A :: CENTERALIGNED3 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `EDGEALIGNED`" ]
# [ inline ( always ) ]
pub fn is_edge_aligned ( & self ) -> bool { * self == CMS_A :: EDGEALIGNED } # [ doc = "Checks if the value of the field is `CENTERALIGNED1`" ]
# [ inline ( always ) ]
pub fn is_center_aligned1 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED1 } # [ doc = "Checks if the value of the field is `CENTERALIGNED2`" ]
# [ inline ( always ) ]
pub fn is_center_aligned2 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED2 } # [ doc = "Checks if the value of the field is `CENTERALIGNED3`" ]
# [ inline ( always ) ]
pub fn is_center_aligned3 ( & self ) -> bool { * self == CMS_A :: CENTERALIGNED3 } } # [ doc = "Write proxy for field `CMS`" ]
pub struct CMS_W < 'a > { w : & 'a mut W , } impl < 'a > CMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The counter counts up or down depending on the direction bit" ]
# [ inline ( always ) ]
pub fn edge_aligned ( self ) -> & 'a mut W { self . variant ( CMS_A :: EDGEALIGNED ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting down." ]
# [ inline ( always ) ]
pub fn center_aligned1 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED1 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set only when the counter is counting up." ]
# [ inline ( always ) ]
pub fn center_aligned2 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED2 ) } # [ doc = "The counter counts up and down alternatively. Output compare interrupt flags are set both when the counter is counting up or down." ]
# [ inline ( always ) ]
pub fn center_aligned3 ( self ) -> & 'a mut W { self . variant ( CMS_A :: CENTERALIGNED3 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Auto-reload preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ARPE_A { # [ doc = "0: TIMx_APRR register is not buffered" ]
DISABLED = 0 , # [ doc = "1: TIMx_APRR register is buffered" ]
ENABLED = 1 } impl From < ARPE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ARPE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ARPE`" ]
pub type ARPE_R = crate :: R < bool , ARPE_A > ; impl ARPE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ARPE_A { match self . bits { false => ARPE_A :: DISABLED , true => ARPE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ARPE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ARPE_A :: ENABLED } } # [ doc = "Write proxy for field `ARPE`" ]
pub struct ARPE_W < 'a > { w : & 'a mut W , } impl < 'a > ARPE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ARPE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIMx_APRR register is not buffered" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: DISABLED ) } # [ doc = "TIMx_APRR register is buffered" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ARPE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Clock division\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKD_A { # [ doc = "0: t_DTS = t_CK_INT" ]
DIV1 = 0 , # [ doc = "1: t_DTS = 2 \u{d7} t_CK_INT" ]
DIV2 = 1 , # [ doc = "2: t_DTS = 4 \u{d7} t_CK_INT" ]
DIV4 = 2 } impl From < CKD_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKD_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKD`" ]
pub type CKD_R = crate :: R < u8 , CKD_A > ; impl CKD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CKD_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CKD_A :: DIV1 ) , 1 => Val ( CKD_A :: DIV2 ) , 2 => Val ( CKD_A :: DIV4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == CKD_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == CKD_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == CKD_A :: DIV4 } } # [ doc = "Write proxy for field `CKD`" ]
pub struct CKD_W < 'a > { w : & 'a mut W , } impl < 'a > CKD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKD_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "t_DTS = t_CK_INT" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV1 ) } # [ doc = "t_DTS = 2 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV2 ) } # [ doc = "t_DTS = 4 \u{d7} t_CK_INT" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( CKD_A :: DIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `UIFREMAP`" ]
pub type UIFREMAP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `UIFREMAP`" ]
pub struct UIFREMAP_W < 'a > { w : & 'a mut W , } impl < 'a > UIFREMAP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } impl R { # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & self ) -> CEN_R { CEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & self ) -> UDIS_R { UDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & self ) -> URS_R { URS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & self ) -> OPM_R { OPM_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & self ) -> DIR_R { DIR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & self ) -> CMS_R { CMS_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & self ) -> ARPE_R { ARPE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & self ) -> CKD_R { CKD_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - UIF status bit remapping" ]
# [ inline ( always ) ]
pub fn uifremap ( & self ) -> UIFREMAP_R { UIFREMAP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn cen ( & mut self ) -> CEN_W { CEN_W { w : self } } # [ doc = "Bit 1 - Update disable" ]
# [ inline ( always ) ]
pub fn udis ( & mut self ) -> UDIS_W { UDIS_W { w : self } } # [ doc = "Bit 2 - Update request source" ]
# [ inline ( always ) ]
pub fn urs ( & mut self ) -> URS_W { URS_W { w : self } } # [ doc = "Bit 3 - One-pulse mode" ]
# [ inline ( always ) ]
pub fn opm ( & mut self ) -> OPM_W { OPM_W { w : self } } # [ doc = "Bit 4 - Direction" ]
# [ inline ( always ) ]
pub fn dir ( & mut self ) -> DIR_W { DIR_W { w : self } } # [ doc = "Bits 5:6 - Center-aligned mode selection" ]
# [ inline ( always ) ]
pub fn cms ( & mut self ) -> CMS_W { CMS_W { w : self } } # [ doc = "Bit 7 - Auto-reload preload enable" ]
# [ inline ( always ) ]
pub fn arpe ( & mut self ) -> ARPE_W { ARPE_W { w : self } } # [ doc = "Bits 8:9 - Clock division" ]
# [ inline ( always ) ]
pub fn ckd ( & mut self ) -> CKD_W { CKD_W { w : self } } # [ doc = "Bit 11 - UIF status bit remapping" ]
# [ inline ( always ) ]
pub fn uifremap ( & mut self ) -> UIFREMAP_W { UIFREMAP_W { w : self } } } } # [ doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module" ]
pub type CR2 = crate :: Reg < u32 , _CR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR2 ; # [ doc = "`read()` method returns [cr2::R](cr2::R) reader structure" ]
impl crate :: Readable for CR2 { } # [ doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure" ]
impl crate :: Writable for CR2 { } # [ doc = "control register 2" ]
pub mod cr2 { # [ doc = "Reader of register CR2" ]
pub type R = crate :: R < u32 , super :: CR2 > ; # [ doc = "Writer for register CR2" ]
pub type W = crate :: W < u32 , super :: CR2 > ; # [ doc = "Register CR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCPC`" ]
pub type CCPC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CCPC`" ]
pub struct CCPC_W < 'a > { w : & 'a mut W , } impl < 'a > CCPC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `CCUS`" ]
pub type CCUS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CCUS`" ]
pub struct CCUS_W < 'a > { w : & 'a mut W , } impl < 'a > CCUS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare DMA selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CCDS_A { # [ doc = "0: CCx DMA request sent when CCx event occurs" ]
ONCOMPARE = 0 , # [ doc = "1: CCx DMA request sent when update event occurs" ]
ONUPDATE = 1 } impl From < CCDS_A > for bool { # [ inline ( always ) ]
fn from ( variant : CCDS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CCDS`" ]
pub type CCDS_R = crate :: R < bool , CCDS_A > ; impl CCDS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CCDS_A { match self . bits { false => CCDS_A :: ONCOMPARE , true => CCDS_A :: ONUPDATE } } # [ doc = "Checks if the value of the field is `ONCOMPARE`" ]
# [ inline ( always ) ]
pub fn is_on_compare ( & self ) -> bool { * self == CCDS_A :: ONCOMPARE } # [ doc = "Checks if the value of the field is `ONUPDATE`" ]
# [ inline ( always ) ]
pub fn is_on_update ( & self ) -> bool { * self == CCDS_A :: ONUPDATE } } # [ doc = "Write proxy for field `CCDS`" ]
pub struct CCDS_W < 'a > { w : & 'a mut W , } impl < 'a > CCDS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CCDS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request sent when CCx event occurs" ]
# [ inline ( always ) ]
pub fn on_compare ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONCOMPARE ) } # [ doc = "CCx DMA request sent when update event occurs" ]
# [ inline ( always ) ]
pub fn on_update ( self ) -> & 'a mut W { self . variant ( CCDS_A :: ONUPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Master mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MMS_A { # [ doc = "0: The UG bit from the TIMx_EGR register is used as trigger output" ]
RESET = 0 , # [ doc = "1: The counter enable signal, CNT_EN, is used as trigger output" ]
ENABLE = 1 , # [ doc = "2: The update event is selected as trigger output" ]
UPDATE = 2 , # [ doc = "3: The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
COMPAREPULSE = 3 , # [ doc = "4: OC1REF signal is used as trigger output" ]
COMPAREOC1 = 4 , # [ doc = "5: OC2REF signal is used as trigger output" ]
COMPAREOC2 = 5 , # [ doc = "6: OC3REF signal is used as trigger output" ]
COMPAREOC3 = 6 , # [ doc = "7: OC4REF signal is used as trigger output" ]
COMPAREOC4 = 7 } impl From < MMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MMS`" ]
pub type MMS_R = crate :: R < u8 , MMS_A > ; impl MMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MMS_A { match self . bits { 0 => MMS_A :: RESET , 1 => MMS_A :: ENABLE , 2 => MMS_A :: UPDATE , 3 => MMS_A :: COMPAREPULSE , 4 => MMS_A :: COMPAREOC1 , 5 => MMS_A :: COMPAREOC2 , 6 => MMS_A :: COMPAREOC3 , 7 => MMS_A :: COMPAREOC4 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `RESET`" ]
# [ inline ( always ) ]
pub fn is_reset ( & self ) -> bool { * self == MMS_A :: RESET } # [ doc = "Checks if the value of the field is `ENABLE`" ]
# [ inline ( always ) ]
pub fn is_enable ( & self ) -> bool { * self == MMS_A :: ENABLE } # [ doc = "Checks if the value of the field is `UPDATE`" ]
# [ inline ( always ) ]
pub fn is_update ( & self ) -> bool { * self == MMS_A :: UPDATE } # [ doc = "Checks if the value of the field is `COMPAREPULSE`" ]
# [ inline ( always ) ]
pub fn is_compare_pulse ( & self ) -> bool { * self == MMS_A :: COMPAREPULSE } # [ doc = "Checks if the value of the field is `COMPAREOC1`" ]
# [ inline ( always ) ]
pub fn is_compare_oc1 ( & self ) -> bool { * self == MMS_A :: COMPAREOC1 } # [ doc = "Checks if the value of the field is `COMPAREOC2`" ]
# [ inline ( always ) ]
pub fn is_compare_oc2 ( & self ) -> bool { * self == MMS_A :: COMPAREOC2 } # [ doc = "Checks if the value of the field is `COMPAREOC3`" ]
# [ inline ( always ) ]
pub fn is_compare_oc3 ( & self ) -> bool { * self == MMS_A :: COMPAREOC3 } # [ doc = "Checks if the value of the field is `COMPAREOC4`" ]
# [ inline ( always ) ]
pub fn is_compare_oc4 ( & self ) -> bool { * self == MMS_A :: COMPAREOC4 } } # [ doc = "Write proxy for field `MMS`" ]
pub struct MMS_W < 'a > { w : & 'a mut W , } impl < 'a > MMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The UG bit from the TIMx_EGR register is used as trigger output" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( MMS_A :: RESET ) } # [ doc = "The counter enable signal, CNT_EN, is used as trigger output" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( MMS_A :: ENABLE ) } # [ doc = "The update event is selected as trigger output" ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( MMS_A :: UPDATE ) } # [ doc = "The trigger output send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred" ]
# [ inline ( always ) ]
pub fn compare_pulse ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREPULSE ) } # [ doc = "OC1REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc1 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC1 ) } # [ doc = "OC2REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc2 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC2 ) } # [ doc = "OC3REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc3 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC3 ) } # [ doc = "OC4REF signal is used as trigger output" ]
# [ inline ( always ) ]
pub fn compare_oc4 ( self ) -> & 'a mut W { self . variant ( MMS_A :: COMPAREOC4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "TI1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TI1S_A { # [ doc = "0: The TIMx_CH1 pin is connected to TI1 input" ]
NORMAL = 0 , # [ doc = "1: The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
XOR = 1 } impl From < TI1S_A > for bool { # [ inline ( always ) ]
fn from ( variant : TI1S_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TI1S`" ]
pub type TI1S_R = crate :: R < bool , TI1S_A > ; impl TI1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TI1S_A { match self . bits { false => TI1S_A :: NORMAL , true => TI1S_A :: XOR } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == TI1S_A :: NORMAL } # [ doc = "Checks if the value of the field is `XOR`" ]
# [ inline ( always ) ]
pub fn is_xor ( & self ) -> bool { * self == TI1S_A :: XOR } } # [ doc = "Write proxy for field `TI1S`" ]
pub struct TI1S_W < 'a > { w : & 'a mut W , } impl < 'a > TI1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TI1S_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIMx_CH1 pin is connected to TI1 input" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( TI1S_A :: NORMAL ) } # [ doc = "The TIMx_CH1, CH2, CH3 pins are connected to TI1 input" ]
# [ inline ( always ) ]
pub fn xor ( self ) -> & 'a mut W { self . variant ( TI1S_A :: XOR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `OIS1`" ]
pub type OIS1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS1`" ]
pub struct OIS1_W < 'a > { w : & 'a mut W , } impl < 'a > OIS1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OIS1N`" ]
pub type OIS1N_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS1N`" ]
pub struct OIS1N_W < 'a > { w : & 'a mut W , } impl < 'a > OIS1N_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `OIS2`" ]
pub type OIS2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS2`" ]
pub struct OIS2_W < 'a > { w : & 'a mut W , } impl < 'a > OIS2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `OIS2N`" ]
pub type OIS2N_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS2N`" ]
pub struct OIS2N_W < 'a > { w : & 'a mut W , } impl < 'a > OIS2N_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OIS3`" ]
pub type OIS3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS3`" ]
pub struct OIS3_W < 'a > { w : & 'a mut W , } impl < 'a > OIS3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `OIS3N`" ]
pub type OIS3N_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS3N`" ]
pub struct OIS3N_W < 'a > { w : & 'a mut W , } impl < 'a > OIS3N_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `OIS4`" ]
pub type OIS4_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS4`" ]
pub struct OIS4_W < 'a > { w : & 'a mut W , } impl < 'a > OIS4_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `OIS5`" ]
pub type OIS5_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS5`" ]
pub struct OIS5_W < 'a > { w : & 'a mut W , } impl < 'a > OIS5_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `OIS6`" ]
pub type OIS6_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OIS6`" ]
pub struct OIS6_W < 'a > { w : & 'a mut W , } impl < 'a > OIS6_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `MMS2`" ]
pub type MMS2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `MMS2`" ]
pub struct MMS2_W < 'a > { w : & 'a mut W , } impl < 'a > MMS2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } impl R { # [ doc = "Bit 0 - Capture/compare preloaded control" ]
# [ inline ( always ) ]
pub fn ccpc ( & self ) -> CCPC_R { CCPC_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/compare control update selection" ]
# [ inline ( always ) ]
pub fn ccus ( & self ) -> CCUS_R { CCUS_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & self ) -> CCDS_R { CCDS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & self ) -> MMS_R { MMS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & self ) -> TI1S_R { TI1S_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1 ( & self ) -> OIS1_R { OIS1_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1n ( & self ) -> OIS1N_R { OIS1N_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output Idle state 2" ]
# [ inline ( always ) ]
pub fn ois2 ( & self ) -> OIS2_R { OIS2_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Output Idle state 2" ]
# [ inline ( always ) ]
pub fn ois2n ( & self ) -> OIS2N_R { OIS2N_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Output Idle state 3" ]
# [ inline ( always ) ]
pub fn ois3 ( & self ) -> OIS3_R { OIS3_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Output Idle state 3" ]
# [ inline ( always ) ]
pub fn ois3n ( & self ) -> OIS3N_R { OIS3N_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Output Idle state 4" ]
# [ inline ( always ) ]
pub fn ois4 ( & self ) -> OIS4_R { OIS4_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Output Idle state 5" ]
# [ inline ( always ) ]
pub fn ois5 ( & self ) -> OIS5_R { OIS5_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Output Idle state 6" ]
# [ inline ( always ) ]
pub fn ois6 ( & self ) -> OIS6_R { OIS6_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bits 20:23 - Master mode selection 2" ]
# [ inline ( always ) ]
pub fn mms2 ( & self ) -> MMS2_R { MMS2_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } } impl W { # [ doc = "Bit 0 - Capture/compare preloaded control" ]
# [ inline ( always ) ]
pub fn ccpc ( & mut self ) -> CCPC_W { CCPC_W { w : self } } # [ doc = "Bit 2 - Capture/compare control update selection" ]
# [ inline ( always ) ]
pub fn ccus ( & mut self ) -> CCUS_W { CCUS_W { w : self } } # [ doc = "Bit 3 - Capture/compare DMA selection" ]
# [ inline ( always ) ]
pub fn ccds ( & mut self ) -> CCDS_W { CCDS_W { w : self } } # [ doc = "Bits 4:6 - Master mode selection" ]
# [ inline ( always ) ]
pub fn mms ( & mut self ) -> MMS_W { MMS_W { w : self } } # [ doc = "Bit 7 - TI1 selection" ]
# [ inline ( always ) ]
pub fn ti1s ( & mut self ) -> TI1S_W { TI1S_W { w : self } } # [ doc = "Bit 8 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1 ( & mut self ) -> OIS1_W { OIS1_W { w : self } } # [ doc = "Bit 9 - Output Idle state 1" ]
# [ inline ( always ) ]
pub fn ois1n ( & mut self ) -> OIS1N_W { OIS1N_W { w : self } } # [ doc = "Bit 10 - Output Idle state 2" ]
# [ inline ( always ) ]
pub fn ois2 ( & mut self ) -> OIS2_W { OIS2_W { w : self } } # [ doc = "Bit 11 - Output Idle state 2" ]
# [ inline ( always ) ]
pub fn ois2n ( & mut self ) -> OIS2N_W { OIS2N_W { w : self } } # [ doc = "Bit 12 - Output Idle state 3" ]
# [ inline ( always ) ]
pub fn ois3 ( & mut self ) -> OIS3_W { OIS3_W { w : self } } # [ doc = "Bit 13 - Output Idle state 3" ]
# [ inline ( always ) ]
pub fn ois3n ( & mut self ) -> OIS3N_W { OIS3N_W { w : self } } # [ doc = "Bit 14 - Output Idle state 4" ]
# [ inline ( always ) ]
pub fn ois4 ( & mut self ) -> OIS4_W { OIS4_W { w : self } } # [ doc = "Bit 16 - Output Idle state 5" ]
# [ inline ( always ) ]
pub fn ois5 ( & mut self ) -> OIS5_W { OIS5_W { w : self } } # [ doc = "Bit 18 - Output Idle state 6" ]
# [ inline ( always ) ]
pub fn ois6 ( & mut self ) -> OIS6_W { OIS6_W { w : self } } # [ doc = "Bits 20:23 - Master mode selection 2" ]
# [ inline ( always ) ]
pub fn mms2 ( & mut self ) -> MMS2_W { MMS2_W { w : self } } } } # [ doc = "slave mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcr](smcr) module" ]
pub type SMCR = crate :: Reg < u32 , _SMCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMCR ; # [ doc = "`read()` method returns [smcr::R](smcr::R) reader structure" ]
impl crate :: Readable for SMCR { } # [ doc = "`write(|w| ..)` method takes [smcr::W](smcr::W) writer structure" ]
impl crate :: Writable for SMCR { } # [ doc = "slave mode control register" ]
pub mod smcr { # [ doc = "Reader of register SMCR" ]
pub type R = crate :: R < u32 , super :: SMCR > ; # [ doc = "Writer for register SMCR" ]
pub type W = crate :: W < u32 , super :: SMCR > ; # [ doc = "Register SMCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Slave mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SMS_A { # [ doc = "0: Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
DISABLED = 0 , # [ doc = "1: Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
ENCODER_MODE_1 = 1 , # [ doc = "2: Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
ENCODER_MODE_2 = 2 , # [ doc = "3: Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
ENCODER_MODE_3 = 3 , # [ doc = "4: Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
RESET_MODE = 4 , # [ doc = "5: Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
GATED_MODE = 5 , # [ doc = "6: Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
TRIGGER_MODE = 6 , # [ doc = "7: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
EXT_CLOCK_MODE = 7 } impl From < SMS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SMS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SMS`" ]
pub type SMS_R = crate :: R < u8 , SMS_A > ; impl SMS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMS_A { match self . bits { 0 => SMS_A :: DISABLED , 1 => SMS_A :: ENCODER_MODE_1 , 2 => SMS_A :: ENCODER_MODE_2 , 3 => SMS_A :: ENCODER_MODE_3 , 4 => SMS_A :: RESET_MODE , 5 => SMS_A :: GATED_MODE , 6 => SMS_A :: TRIGGER_MODE , 7 => SMS_A :: EXT_CLOCK_MODE , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == SMS_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENCODER_MODE_1`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_1 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_1 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_2`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_2 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_2 } # [ doc = "Checks if the value of the field is `ENCODER_MODE_3`" ]
# [ inline ( always ) ]
pub fn is_encoder_mode_3 ( & self ) -> bool { * self == SMS_A :: ENCODER_MODE_3 } # [ doc = "Checks if the value of the field is `RESET_MODE`" ]
# [ inline ( always ) ]
pub fn is_reset_mode ( & self ) -> bool { * self == SMS_A :: RESET_MODE } # [ doc = "Checks if the value of the field is `GATED_MODE`" ]
# [ inline ( always ) ]
pub fn is_gated_mode ( & self ) -> bool { * self == SMS_A :: GATED_MODE } # [ doc = "Checks if the value of the field is `TRIGGER_MODE`" ]
# [ inline ( always ) ]
pub fn is_trigger_mode ( & self ) -> bool { * self == SMS_A :: TRIGGER_MODE } # [ doc = "Checks if the value of the field is `EXT_CLOCK_MODE`" ]
# [ inline ( always ) ]
pub fn is_ext_clock_mode ( & self ) -> bool { * self == SMS_A :: EXT_CLOCK_MODE } } # [ doc = "Write proxy for field `SMS`" ]
pub struct SMS_W < 'a > { w : & 'a mut W , } impl < 'a > SMS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Slave mode disabled - if CEN = \u{2018}1 then the prescaler is clocked directly by the internal clock." ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( SMS_A :: DISABLED ) } # [ doc = "Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_1 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_1 ) } # [ doc = "Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level." ]
# [ inline ( always ) ]
pub fn encoder_mode_2 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_2 ) } # [ doc = "Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input." ]
# [ inline ( always ) ]
pub fn encoder_mode_3 ( self ) -> & 'a mut W { self . variant ( SMS_A :: ENCODER_MODE_3 ) } # [ doc = "Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn reset_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: RESET_MODE ) } # [ doc = "Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled." ]
# [ inline ( always ) ]
pub fn gated_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: GATED_MODE ) } # [ doc = "Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled." ]
# [ inline ( always ) ]
pub fn trigger_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: TRIGGER_MODE ) } # [ doc = "External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter." ]
# [ inline ( always ) ]
pub fn ext_clock_mode ( self ) -> & 'a mut W { self . variant ( SMS_A :: EXT_CLOCK_MODE ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } # [ doc = "Reader of field `OCCS`" ]
pub type OCCS_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OCCS`" ]
pub struct OCCS_W < 'a > { w : & 'a mut W , } impl < 'a > OCCS_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Trigger selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum TS_A { # [ doc = "0: Internal Trigger 0 (ITR0)" ]
ITR0 = 0 , # [ doc = "1: Internal Trigger 1 (ITR1)" ]
ITR1 = 1 , # [ doc = "2: Internal Trigger 2 (ITR2)" ]
ITR2 = 2 , # [ doc = "4: TI1 Edge Detector (TI1F_ED)" ]
TI1F_ED = 4 , # [ doc = "5: Filtered Timer Input 1 (TI1FP1)" ]
TI1FP1 = 5 , # [ doc = "6: Filtered Timer Input 2 (TI2FP2)" ]
TI2FP2 = 6 , # [ doc = "7: External Trigger input (ETRF)" ]
ETRF = 7 } impl From < TS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : TS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `TS`" ]
pub type TS_R = crate :: R < u8 , TS_A > ; impl TS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , TS_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( TS_A :: ITR0 ) , 1 => Val ( TS_A :: ITR1 ) , 2 => Val ( TS_A :: ITR2 ) , 4 => Val ( TS_A :: TI1F_ED ) , 5 => Val ( TS_A :: TI1FP1 ) , 6 => Val ( TS_A :: TI2FP2 ) , 7 => Val ( TS_A :: ETRF ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ITR0`" ]
# [ inline ( always ) ]
pub fn is_itr0 ( & self ) -> bool { * self == TS_A :: ITR0 } # [ doc = "Checks if the value of the field is `ITR1`" ]
# [ inline ( always ) ]
pub fn is_itr1 ( & self ) -> bool { * self == TS_A :: ITR1 } # [ doc = "Checks if the value of the field is `ITR2`" ]
# [ inline ( always ) ]
pub fn is_itr2 ( & self ) -> bool { * self == TS_A :: ITR2 } # [ doc = "Checks if the value of the field is `TI1F_ED`" ]
# [ inline ( always ) ]
pub fn is_ti1f_ed ( & self ) -> bool { * self == TS_A :: TI1F_ED } # [ doc = "Checks if the value of the field is `TI1FP1`" ]
# [ inline ( always ) ]
pub fn is_ti1fp1 ( & self ) -> bool { * self == TS_A :: TI1FP1 } # [ doc = "Checks if the value of the field is `TI2FP2`" ]
# [ inline ( always ) ]
pub fn is_ti2fp2 ( & self ) -> bool { * self == TS_A :: TI2FP2 } # [ doc = "Checks if the value of the field is `ETRF`" ]
# [ inline ( always ) ]
pub fn is_etrf ( & self ) -> bool { * self == TS_A :: ETRF } } # [ doc = "Write proxy for field `TS`" ]
pub struct TS_W < 'a > { w : & 'a mut W , } impl < 'a > TS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TS_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Internal Trigger 0 (ITR0)" ]
# [ inline ( always ) ]
pub fn itr0 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR0 ) } # [ doc = "Internal Trigger 1 (ITR1)" ]
# [ inline ( always ) ]
pub fn itr1 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR1 ) } # [ doc = "Internal Trigger 2 (ITR2)" ]
# [ inline ( always ) ]
pub fn itr2 ( self ) -> & 'a mut W { self . variant ( TS_A :: ITR2 ) } # [ doc = "TI1 Edge Detector (TI1F_ED)" ]
# [ inline ( always ) ]
pub fn ti1f_ed ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1F_ED ) } # [ doc = "Filtered Timer Input 1 (TI1FP1)" ]
# [ inline ( always ) ]
pub fn ti1fp1 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI1FP1 ) } # [ doc = "Filtered Timer Input 2 (TI2FP2)" ]
# [ inline ( always ) ]
pub fn ti2fp2 ( self ) -> & 'a mut W { self . variant ( TS_A :: TI2FP2 ) } # [ doc = "External Trigger input (ETRF)" ]
# [ inline ( always ) ]
pub fn etrf ( self ) -> & 'a mut W { self . variant ( TS_A :: ETRF ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Master/Slave mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MSM_A { # [ doc = "0: No action" ]
NOSYNC = 0 , # [ doc = "1: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
SYNC = 1 } impl From < MSM_A > for bool { # [ inline ( always ) ]
fn from ( variant : MSM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MSM`" ]
pub type MSM_R = crate :: R < bool , MSM_A > ; impl MSM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MSM_A { match self . bits { false => MSM_A :: NOSYNC , true => MSM_A :: SYNC } } # [ doc = "Checks if the value of the field is `NOSYNC`" ]
# [ inline ( always ) ]
pub fn is_no_sync ( & self ) -> bool { * self == MSM_A :: NOSYNC } # [ doc = "Checks if the value of the field is `SYNC`" ]
# [ inline ( always ) ]
pub fn is_sync ( & self ) -> bool { * self == MSM_A :: SYNC } } # [ doc = "Write proxy for field `MSM`" ]
pub struct MSM_W < 'a > { w : & 'a mut W , } impl < 'a > MSM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MSM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action" ]
# [ inline ( always ) ]
pub fn no_sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: NOSYNC ) } # [ doc = "The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event." ]
# [ inline ( always ) ]
pub fn sync ( self ) -> & 'a mut W { self . variant ( MSM_A :: SYNC ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "External trigger filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETF_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < ETF_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETF_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETF`" ]
pub type ETF_R = crate :: R < u8 , ETF_A > ; impl ETF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETF_A { match self . bits { 0 => ETF_A :: NOFILTER , 1 => ETF_A :: FCK_INT_N2 , 2 => ETF_A :: FCK_INT_N4 , 3 => ETF_A :: FCK_INT_N8 , 4 => ETF_A :: FDTS_DIV2_N6 , 5 => ETF_A :: FDTS_DIV2_N8 , 6 => ETF_A :: FDTS_DIV4_N6 , 7 => ETF_A :: FDTS_DIV4_N8 , 8 => ETF_A :: FDTS_DIV8_N6 , 9 => ETF_A :: FDTS_DIV8_N8 , 10 => ETF_A :: FDTS_DIV16_N5 , 11 => ETF_A :: FDTS_DIV16_N6 , 12 => ETF_A :: FDTS_DIV16_N8 , 13 => ETF_A :: FDTS_DIV32_N5 , 14 => ETF_A :: FDTS_DIV32_N6 , 15 => ETF_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == ETF_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == ETF_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == ETF_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `ETF`" ]
pub struct ETF_W < 'a > { w : & 'a mut W , } impl < 'a > ETF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETF_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( ETF_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( ETF_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "External trigger prescaler\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ETPS_A { # [ doc = "0: Prescaler OFF" ]
DIV1 = 0 , # [ doc = "1: ETRP frequency divided by 2" ]
DIV2 = 1 , # [ doc = "2: ETRP frequency divided by 4" ]
DIV4 = 2 , # [ doc = "3: ETRP frequency divided by 8" ]
DIV8 = 3 } impl From < ETPS_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ETPS_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ETPS`" ]
pub type ETPS_R = crate :: R < u8 , ETPS_A > ; impl ETPS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETPS_A { match self . bits { 0 => ETPS_A :: DIV1 , 1 => ETPS_A :: DIV2 , 2 => ETPS_A :: DIV4 , 3 => ETPS_A :: DIV8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DIV1`" ]
# [ inline ( always ) ]
pub fn is_div1 ( & self ) -> bool { * self == ETPS_A :: DIV1 } # [ doc = "Checks if the value of the field is `DIV2`" ]
# [ inline ( always ) ]
pub fn is_div2 ( & self ) -> bool { * self == ETPS_A :: DIV2 } # [ doc = "Checks if the value of the field is `DIV4`" ]
# [ inline ( always ) ]
pub fn is_div4 ( & self ) -> bool { * self == ETPS_A :: DIV4 } # [ doc = "Checks if the value of the field is `DIV8`" ]
# [ inline ( always ) ]
pub fn is_div8 ( & self ) -> bool { * self == ETPS_A :: DIV8 } } # [ doc = "Write proxy for field `ETPS`" ]
pub struct ETPS_W < 'a > { w : & 'a mut W , } impl < 'a > ETPS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETPS_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Prescaler OFF" ]
# [ inline ( always ) ]
pub fn div1 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV1 ) } # [ doc = "ETRP frequency divided by 2" ]
# [ inline ( always ) ]
pub fn div2 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV2 ) } # [ doc = "ETRP frequency divided by 4" ]
# [ inline ( always ) ]
pub fn div4 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV4 ) } # [ doc = "ETRP frequency divided by 8" ]
# [ inline ( always ) ]
pub fn div8 ( self ) -> & 'a mut W { self . variant ( ETPS_A :: DIV8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "External clock enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ECE_A { # [ doc = "0: External clock mode 2 disabled" ]
DISABLED = 0 , # [ doc = "1: External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
ENABLED = 1 } impl From < ECE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ECE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ECE`" ]
pub type ECE_R = crate :: R < bool , ECE_A > ; impl ECE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ECE_A { match self . bits { false => ECE_A :: DISABLED , true => ECE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ECE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ECE_A :: ENABLED } } # [ doc = "Write proxy for field `ECE`" ]
pub struct ECE_W < 'a > { w : & 'a mut W , } impl < 'a > ECE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ECE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "External clock mode 2 disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: DISABLED ) } # [ doc = "External clock mode 2 enabled. The counter is clocked by any active edge on the ETRF signal." ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ECE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "External trigger polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ETP_A { # [ doc = "0: ETR is noninverted, active at high level or rising edge" ]
NOTINVERTED = 0 , # [ doc = "1: ETR is inverted, active at low level or falling edge" ]
INVERTED = 1 } impl From < ETP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ETP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ETP`" ]
pub type ETP_R = crate :: R < bool , ETP_A > ; impl ETP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ETP_A { match self . bits { false => ETP_A :: NOTINVERTED , true => ETP_A :: INVERTED } } # [ doc = "Checks if the value of the field is `NOTINVERTED`" ]
# [ inline ( always ) ]
pub fn is_not_inverted ( & self ) -> bool { * self == ETP_A :: NOTINVERTED } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == ETP_A :: INVERTED } } # [ doc = "Write proxy for field `ETP`" ]
pub struct ETP_W < 'a > { w : & 'a mut W , } impl < 'a > ETP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ETP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ETR is noninverted, active at high level or rising edge" ]
# [ inline ( always ) ]
pub fn not_inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: NOTINVERTED ) } # [ doc = "ETR is inverted, active at low level or falling edge" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( ETP_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `SMS3`" ]
pub type SMS3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SMS3`" ]
pub struct SMS3_W < 'a > { w : & 'a mut W , } impl < 'a > SMS3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } impl R { # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & self ) -> SMS_R { SMS_R :: new ( ( self . bits & 0x07 ) as u8 ) } # [ doc = "Bit 3 - OCREF clear selection" ]
# [ inline ( always ) ]
pub fn occs ( & self ) -> OCCS_R { OCCS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & self ) -> TS_R { TS_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & self ) -> MSM_R { MSM_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & self ) -> ETF_R { ETF_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & self ) -> ETPS_R { ETPS_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & self ) -> ECE_R { ECE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & self ) -> ETP_R { ETP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Slave mode selection bit 3" ]
# [ inline ( always ) ]
pub fn sms3 ( & self ) -> SMS3_R { SMS3_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:2 - Slave mode selection" ]
# [ inline ( always ) ]
pub fn sms ( & mut self ) -> SMS_W { SMS_W { w : self } } # [ doc = "Bit 3 - OCREF clear selection" ]
# [ inline ( always ) ]
pub fn occs ( & mut self ) -> OCCS_W { OCCS_W { w : self } } # [ doc = "Bits 4:6 - Trigger selection" ]
# [ inline ( always ) ]
pub fn ts ( & mut self ) -> TS_W { TS_W { w : self } } # [ doc = "Bit 7 - Master/Slave mode" ]
# [ inline ( always ) ]
pub fn msm ( & mut self ) -> MSM_W { MSM_W { w : self } } # [ doc = "Bits 8:11 - External trigger filter" ]
# [ inline ( always ) ]
pub fn etf ( & mut self ) -> ETF_W { ETF_W { w : self } } # [ doc = "Bits 12:13 - External trigger prescaler" ]
# [ inline ( always ) ]
pub fn etps ( & mut self ) -> ETPS_W { ETPS_W { w : self } } # [ doc = "Bit 14 - External clock enable" ]
# [ inline ( always ) ]
pub fn ece ( & mut self ) -> ECE_W { ECE_W { w : self } } # [ doc = "Bit 15 - External trigger polarity" ]
# [ inline ( always ) ]
pub fn etp ( & mut self ) -> ETP_W { ETP_W { w : self } } # [ doc = "Bit 16 - Slave mode selection bit 3" ]
# [ inline ( always ) ]
pub fn sms3 ( & mut self ) -> SMS3_W { SMS3_W { w : self } } } } # [ doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module" ]
pub type DIER = crate :: Reg < u32 , _DIER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIER ; # [ doc = "`read()` method returns [dier::R](dier::R) reader structure" ]
impl crate :: Readable for DIER { } # [ doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure" ]
impl crate :: Writable for DIER { } # [ doc = "DMA/Interrupt enable register" ]
pub mod dier { # [ doc = "Reader of register DIER" ]
pub type R = crate :: R < u32 , super :: DIER > ; # [ doc = "Writer for register DIER" ]
pub type W = crate :: W < u32 , super :: DIER > ; # [ doc = "Register DIER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Trigger DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TDE_A { # [ doc = "0: Trigger DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger DMA request enabled" ]
ENABLED = 1 } impl From < TDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TDE`" ]
pub type TDE_R = crate :: R < bool , TDE_A > ; impl TDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TDE_A { match self . bits { false => TDE_A :: DISABLED , true => TDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TDE_A :: ENABLED } } # [ doc = "Write proxy for field `TDE`" ]
pub struct TDE_W < 'a > { w : & 'a mut W , } impl < 'a > TDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: DISABLED ) } # [ doc = "Trigger DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Reader of field `COMDE`" ]
pub type COMDE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMDE`" ]
pub struct COMDE_W < 'a > { w : & 'a mut W , } impl < 'a > COMDE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Capture/Compare 4 DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4DE_A { # [ doc = "0: CCx DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: CCx DMA request enabled" ]
ENABLED = 1 } impl From < CC4DE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4DE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4DE`" ]
pub type CC4DE_R = crate :: R < bool , CC4DE_A > ; impl CC4DE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4DE_A { match self . bits { false => CC4DE_A :: DISABLED , true => CC4DE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4DE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4DE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4DE`" ]
pub struct CC4DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Capture/Compare 3 DMA request enable" ]
pub type CC3DE_A = CC4DE_A ; # [ doc = "Reader of field `CC3DE`" ]
pub type CC3DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC3DE`" ]
pub struct CC3DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/Compare 2 DMA request enable" ]
pub type CC2DE_A = CC4DE_A ; # [ doc = "Reader of field `CC2DE`" ]
pub type CC2DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC2DE`" ]
pub struct CC2DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 1 DMA request enable" ]
pub type CC1DE_A = CC4DE_A ; # [ doc = "Reader of field `CC1DE`" ]
pub type CC1DE_R = crate :: R < bool , CC4DE_A > ; # [ doc = "Write proxy for field `CC1DE`" ]
pub struct CC1DE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1DE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1DE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: DISABLED ) } # [ doc = "CCx DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4DE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Update DMA request enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UDE_A { # [ doc = "0: Update DMA request disabled" ]
DISABLED = 0 , # [ doc = "1: Update DMA request enabled" ]
ENABLED = 1 } impl From < UDE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UDE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UDE`" ]
pub type UDE_R = crate :: R < bool , UDE_A > ; impl UDE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UDE_A { match self . bits { false => UDE_A :: DISABLED , true => UDE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UDE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UDE_A :: ENABLED } } # [ doc = "Write proxy for field `UDE`" ]
pub struct UDE_W < 'a > { w : & 'a mut W , } impl < 'a > UDE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UDE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update DMA request disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: DISABLED ) } # [ doc = "Update DMA request enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UDE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `BIE`" ]
pub type BIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BIE`" ]
pub struct BIE_W < 'a > { w : & 'a mut W , } impl < 'a > BIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Trigger interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIE_A { # [ doc = "0: Trigger interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger interrupt enabled" ]
ENABLED = 1 } impl From < TIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIE`" ]
pub type TIE_R = crate :: R < bool , TIE_A > ; impl TIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIE_A { match self . bits { false => TIE_A :: DISABLED , true => TIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TIE_A :: ENABLED } } # [ doc = "Write proxy for field `TIE`" ]
pub struct TIE_W < 'a > { w : & 'a mut W , } impl < 'a > TIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: DISABLED ) } # [ doc = "Trigger interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `COMIE`" ]
pub type COMIE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMIE`" ]
pub struct COMIE_W < 'a > { w : & 'a mut W , } impl < 'a > COMIE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC4IE_A { # [ doc = "0: CCx interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: CCx interrupt enabled" ]
ENABLED = 1 } impl From < CC4IE_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC4IE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC4IE`" ]
pub type CC4IE_R = crate :: R < bool , CC4IE_A > ; impl CC4IE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CC4IE_A { match self . bits { false => CC4IE_A :: DISABLED , true => CC4IE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CC4IE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CC4IE_A :: ENABLED } } # [ doc = "Write proxy for field `CC4IE`" ]
pub struct CC4IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt enable" ]
pub type CC3IE_A = CC4IE_A ; # [ doc = "Reader of field `CC3IE`" ]
pub type CC3IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC3IE`" ]
pub struct CC3IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt enable" ]
pub type CC2IE_A = CC4IE_A ; # [ doc = "Reader of field `CC2IE`" ]
pub type CC2IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC2IE`" ]
pub struct CC2IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 interrupt enable" ]
pub type CC1IE_A = CC4IE_A ; # [ doc = "Reader of field `CC1IE`" ]
pub type CC1IE_R = crate :: R < bool , CC4IE_A > ; # [ doc = "Write proxy for field `CC1IE`" ]
pub struct CC1IE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "CCx interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: DISABLED ) } # [ doc = "CCx interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CC4IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Update interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIE_A { # [ doc = "0: Update interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Update interrupt enabled" ]
ENABLED = 1 } impl From < UIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIE`" ]
pub type UIE_R = crate :: R < bool , UIE_A > ; impl UIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIE_A { match self . bits { false => UIE_A :: DISABLED , true => UIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == UIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == UIE_A :: ENABLED } } # [ doc = "Write proxy for field `UIE`" ]
pub struct UIE_W < 'a > { w : & 'a mut W , } impl < 'a > UIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Update interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: DISABLED ) } # [ doc = "Update interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( UIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & self ) -> TDE_R { TDE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - COM DMA request enable" ]
# [ inline ( always ) ]
pub fn comde ( & self ) -> COMDE_R { COMDE_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & self ) -> CC4DE_R { CC4DE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & self ) -> CC3DE_R { CC3DE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & self ) -> CC2DE_R { CC2DE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & self ) -> CC1DE_R { CC1DE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & self ) -> UDE_R { UDE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Break interrupt enable" ]
# [ inline ( always ) ]
pub fn bie ( & self ) -> BIE_R { BIE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & self ) -> TIE_R { TIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - COM interrupt enable" ]
# [ inline ( always ) ]
pub fn comie ( & self ) -> COMIE_R { COMIE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & self ) -> CC4IE_R { CC4IE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & self ) -> CC3IE_R { CC3IE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & self ) -> CC2IE_R { CC2IE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & self ) -> CC1IE_R { CC1IE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & self ) -> UIE_R { UIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 14 - Trigger DMA request enable" ]
# [ inline ( always ) ]
pub fn tde ( & mut self ) -> TDE_W { TDE_W { w : self } } # [ doc = "Bit 13 - COM DMA request enable" ]
# [ inline ( always ) ]
pub fn comde ( & mut self ) -> COMDE_W { COMDE_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc4de ( & mut self ) -> CC4DE_W { CC4DE_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc3de ( & mut self ) -> CC3DE_W { CC3DE_W { w : self } } # [ doc = "Bit 10 - Capture/Compare 2 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc2de ( & mut self ) -> CC2DE_W { CC2DE_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 DMA request enable" ]
# [ inline ( always ) ]
pub fn cc1de ( & mut self ) -> CC1DE_W { CC1DE_W { w : self } } # [ doc = "Bit 8 - Update DMA request enable" ]
# [ inline ( always ) ]
pub fn ude ( & mut self ) -> UDE_W { UDE_W { w : self } } # [ doc = "Bit 7 - Break interrupt enable" ]
# [ inline ( always ) ]
pub fn bie ( & mut self ) -> BIE_W { BIE_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt enable" ]
# [ inline ( always ) ]
pub fn tie ( & mut self ) -> TIE_W { TIE_W { w : self } } # [ doc = "Bit 5 - COM interrupt enable" ]
# [ inline ( always ) ]
pub fn comie ( & mut self ) -> COMIE_W { COMIE_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc4ie ( & mut self ) -> CC4IE_W { CC4IE_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc3ie ( & mut self ) -> CC3IE_W { CC3IE_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc2ie ( & mut self ) -> CC2IE_W { CC2IE_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 interrupt enable" ]
# [ inline ( always ) ]
pub fn cc1ie ( & mut self ) -> CC1IE_W { CC1IE_W { w : self } } # [ doc = "Bit 0 - Update interrupt enable" ]
# [ inline ( always ) ]
pub fn uie ( & mut self ) -> UIE_W { UIE_W { w : self } } } } # [ doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module" ]
pub type SR = crate :: Reg < u32 , _SR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SR ; # [ doc = "`read()` method returns [sr::R](sr::R) reader structure" ]
impl crate :: Readable for SR { } # [ doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure" ]
impl crate :: Writable for SR { } # [ doc = "status register" ]
pub mod sr { # [ doc = "Reader of register SR" ]
pub type R = crate :: R < u32 , super :: SR > ; # [ doc = "Writer for register SR" ]
pub type W = crate :: W < u32 , super :: SR > ; # [ doc = "Register SR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Update interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UIF_A { # [ doc = "0: No update occurred" ]
CLEAR = 0 , # [ doc = "1: Update interrupt pending." ]
UPDATEPENDING = 1 } impl From < UIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : UIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `UIF`" ]
pub type UIF_R = crate :: R < bool , UIF_A > ; impl UIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> UIF_A { match self . bits { false => UIF_A :: CLEAR , true => UIF_A :: UPDATEPENDING } } # [ doc = "Checks if the value of the field is `CLEAR`" ]
# [ inline ( always ) ]
pub fn is_clear ( & self ) -> bool { * self == UIF_A :: CLEAR } # [ doc = "Checks if the value of the field is `UPDATEPENDING`" ]
# [ inline ( always ) ]
pub fn is_update_pending ( & self ) -> bool { * self == UIF_A :: UPDATEPENDING } } # [ doc = "Write proxy for field `UIF`" ]
pub struct UIF_W < 'a > { w : & 'a mut W , } impl < 'a > UIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No update occurred" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( UIF_A :: CLEAR ) } # [ doc = "Update interrupt pending." ]
# [ inline ( always ) ]
pub fn update_pending ( self ) -> & 'a mut W { self . variant ( UIF_A :: UPDATEPENDING ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Capture/compare 1 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC1IF_A { # [ doc = "1: If CC1 is an output: The content of the counter TIMx_CNT matches the content of the TIMx_CCR1 register. If CC1 is an input: The counter value has been captured in TIMx_CCR1 register." ]
MATCH = 1 } impl From < CC1IF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC1IF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC1IF`" ]
pub type CC1IF_R = crate :: R < bool , CC1IF_A > ; impl CC1IF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC1IF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC1IF_A :: MATCH ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MATCH`" ]
# [ inline ( always ) ]
pub fn is_match_ ( & self ) -> bool { * self == CC1IF_A :: MATCH } } # [ doc = "Capture/compare 1 interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC1IF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC1IF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC1IF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC1IF`" ]
pub struct CC1IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_A = CC1IF_A ; # [ doc = "Reader of field `CC2IF`" ]
pub type CC2IF_R = crate :: R < bool , CC1IF_A > ; # [ doc = "Capture/Compare 2 interrupt flag" ]
pub type CC2IF_AW = CC1IF_AW ; # [ doc = "Write proxy for field `CC2IF`" ]
pub struct CC2IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_A = CC1IF_A ; # [ doc = "Reader of field `CC3IF`" ]
pub type CC3IF_R = crate :: R < bool , CC1IF_A > ; # [ doc = "Capture/Compare 3 interrupt flag" ]
pub type CC3IF_AW = CC1IF_AW ; # [ doc = "Write proxy for field `CC3IF`" ]
pub struct CC3IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/Compare 4 interrupt flag" ]
pub type CC4IF_A = CC1IF_A ; # [ doc = "Reader of field `CC4IF`" ]
pub type CC4IF_R = crate :: R < bool , CC1IF_A > ; # [ doc = "Capture/Compare 4 interrupt flag" ]
pub type CC4IF_AW = CC1IF_AW ; # [ doc = "Write proxy for field `CC4IF`" ]
pub struct CC4IF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4IF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4IF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1IF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `COMIF`" ]
pub type COMIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMIF`" ]
pub struct COMIF_W < 'a > { w : & 'a mut W , } impl < 'a > COMIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_A { # [ doc = "0: No trigger event occurred" ]
NOTRIGGER = 0 , # [ doc = "1: Trigger interrupt pending" ]
TRIGGER = 1 } impl From < TIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIF`" ]
pub type TIF_R = crate :: R < bool , TIF_A > ; impl TIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIF_A { match self . bits { false => TIF_A :: NOTRIGGER , true => TIF_A :: TRIGGER } } # [ doc = "Checks if the value of the field is `NOTRIGGER`" ]
# [ inline ( always ) ]
pub fn is_no_trigger ( & self ) -> bool { * self == TIF_A :: NOTRIGGER } # [ doc = "Checks if the value of the field is `TRIGGER`" ]
# [ inline ( always ) ]
pub fn is_trigger ( & self ) -> bool { * self == TIF_A :: TRIGGER } } # [ doc = "Trigger interrupt flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < TIF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TIF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TIF`" ]
pub struct TIF_W < 'a > { w : & 'a mut W , } impl < 'a > TIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( TIF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `BIF`" ]
pub type BIF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BIF`" ]
pub struct BIF_W < 'a > { w : & 'a mut W , } impl < 'a > BIF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `B2IF`" ]
pub type B2IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `B2IF`" ]
pub struct B2IF_W < 'a > { w : & 'a mut W , } impl < 'a > B2IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Capture/Compare 1 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC1OF_A { # [ doc = "1: The counter value has been captured in TIMx_CCRx register while CCxIF flag was already set" ]
OVERCAPTURE = 1 } impl From < CC1OF_A > for bool { # [ inline ( always ) ]
fn from ( variant : CC1OF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CC1OF`" ]
pub type CC1OF_R = crate :: R < bool , CC1OF_A > ; impl CC1OF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , CC1OF_A > { use crate :: Variant :: * ; match self . bits { true => Val ( CC1OF_A :: OVERCAPTURE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OVERCAPTURE`" ]
# [ inline ( always ) ]
pub fn is_overcapture ( & self ) -> bool { * self == CC1OF_A :: OVERCAPTURE } } # [ doc = "Capture/Compare 1 overcapture flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC1OF_AW { # [ doc = "0: Clear flag" ]
CLEAR = 0 } impl From < CC1OF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC1OF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC1OF`" ]
pub struct CC1OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC1OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_A = CC1OF_A ; # [ doc = "Reader of field `CC2OF`" ]
pub type CC2OF_R = crate :: R < bool , CC1OF_A > ; # [ doc = "Capture/compare 2 overcapture flag" ]
pub type CC2OF_AW = CC1OF_AW ; # [ doc = "Write proxy for field `CC2OF`" ]
pub struct CC2OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC2OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_A = CC1OF_A ; # [ doc = "Reader of field `CC3OF`" ]
pub type CC3OF_R = crate :: R < bool , CC1OF_A > ; # [ doc = "Capture/Compare 3 overcapture flag" ]
pub type CC3OF_AW = CC1OF_AW ; # [ doc = "Write proxy for field `CC3OF`" ]
pub struct CC3OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC3OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Capture/Compare 4 overcapture flag" ]
pub type CC4OF_A = CC1OF_A ; # [ doc = "Reader of field `CC4OF`" ]
pub type CC4OF_R = crate :: R < bool , CC1OF_A > ; # [ doc = "Capture/Compare 4 overcapture flag" ]
pub type CC4OF_AW = CC1OF_AW ; # [ doc = "Write proxy for field `CC4OF`" ]
pub struct CC4OF_W < 'a > { w : & 'a mut W , } impl < 'a > CC4OF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4OF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( CC1OF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `C5IF`" ]
pub type C5IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `C5IF`" ]
pub struct C5IF_W < 'a > { w : & 'a mut W , } impl < 'a > C5IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `C6IF`" ]
pub type C6IF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `C6IF`" ]
pub struct C6IF_W < 'a > { w : & 'a mut W , } impl < 'a > C6IF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } impl R { # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & self ) -> UIF_R { UIF_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & self ) -> CC1IF_R { CC1IF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & self ) -> CC2IF_R { CC2IF_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & self ) -> CC3IF_R { CC3IF_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & self ) -> CC4IF_R { CC4IF_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - COM interrupt flag" ]
# [ inline ( always ) ]
pub fn comif ( & self ) -> COMIF_R { COMIF_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & self ) -> TIF_R { TIF_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Break interrupt flag" ]
# [ inline ( always ) ]
pub fn bif ( & self ) -> BIF_R { BIF_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Break 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn b2if ( & self ) -> B2IF_R { B2IF_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & self ) -> CC1OF_R { CC1OF_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & self ) -> CC2OF_R { CC2OF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & self ) -> CC3OF_R { CC3OF_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & self ) -> CC4OF_R { CC4OF_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Capture/Compare 5 interrupt flag" ]
# [ inline ( always ) ]
pub fn c5if ( & self ) -> C5IF_R { C5IF_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Capture/Compare 6 interrupt flag" ]
# [ inline ( always ) ]
pub fn c6if ( & self ) -> C6IF_R { C6IF_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Update interrupt flag" ]
# [ inline ( always ) ]
pub fn uif ( & mut self ) -> UIF_W { UIF_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc1if ( & mut self ) -> CC1IF_W { CC1IF_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc2if ( & mut self ) -> CC2IF_W { CC2IF_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 3 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc3if ( & mut self ) -> CC3IF_W { CC3IF_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 4 interrupt flag" ]
# [ inline ( always ) ]
pub fn cc4if ( & mut self ) -> CC4IF_W { CC4IF_W { w : self } } # [ doc = "Bit 5 - COM interrupt flag" ]
# [ inline ( always ) ]
pub fn comif ( & mut self ) -> COMIF_W { COMIF_W { w : self } } # [ doc = "Bit 6 - Trigger interrupt flag" ]
# [ inline ( always ) ]
pub fn tif ( & mut self ) -> TIF_W { TIF_W { w : self } } # [ doc = "Bit 7 - Break interrupt flag" ]
# [ inline ( always ) ]
pub fn bif ( & mut self ) -> BIF_W { BIF_W { w : self } } # [ doc = "Bit 8 - Break 2 interrupt flag" ]
# [ inline ( always ) ]
pub fn b2if ( & mut self ) -> B2IF_W { B2IF_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 1 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc1of ( & mut self ) -> CC1OF_W { CC1OF_W { w : self } } # [ doc = "Bit 10 - Capture/compare 2 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc2of ( & mut self ) -> CC2OF_W { CC2OF_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc3of ( & mut self ) -> CC3OF_W { CC3OF_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 overcapture flag" ]
# [ inline ( always ) ]
pub fn cc4of ( & mut self ) -> CC4OF_W { CC4OF_W { w : self } } # [ doc = "Bit 16 - Capture/Compare 5 interrupt flag" ]
# [ inline ( always ) ]
pub fn c5if ( & mut self ) -> C5IF_W { C5IF_W { w : self } } # [ doc = "Bit 17 - Capture/Compare 6 interrupt flag" ]
# [ inline ( always ) ]
pub fn c6if ( & mut self ) -> C6IF_W { C6IF_W { w : self } } } } # [ doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module" ]
pub type EGR = crate :: Reg < u32 , _EGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EGR ; # [ doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure" ]
impl crate :: Writable for EGR { } # [ doc = "event generation register" ]
pub mod egr { # [ doc = "Writer for register EGR" ]
pub type W = crate :: W < u32 , super :: EGR > ; # [ doc = "Register EGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Update generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum UG_AW { # [ doc = "1: Re-initializes the timer counter and generates an update of the registers." ]
UPDATE = 1 } impl From < UG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : UG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `UG`" ]
pub struct UG_W < 'a > { w : & 'a mut W , } impl < 'a > UG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : UG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Re-initializes the timer counter and generates an update of the registers." ]
# [ inline ( always ) ]
pub fn update ( self ) -> & 'a mut W { self . variant ( UG_AW :: UPDATE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Capture/compare 1 generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CC1G_AW { # [ doc = "1: If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
TRIGGER = 1 } impl From < CC1G_AW > for bool { # [ inline ( always ) ]
fn from ( variant : CC1G_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `CC1G`" ]
pub struct CC1G_W < 'a > { w : & 'a mut W , } impl < 'a > CC1G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC1G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Capture/compare 2 generation" ]
pub type CC2G_AW = CC1G_AW ; # [ doc = "Write proxy for field `CC2G`" ]
pub struct CC2G_W < 'a > { w : & 'a mut W , } impl < 'a > CC2G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC1G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 3 generation" ]
pub type CC3G_AW = CC1G_AW ; # [ doc = "Write proxy for field `CC3G`" ]
pub struct CC3G_W < 'a > { w : & 'a mut W , } impl < 'a > CC3G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC1G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Capture/compare 4 generation" ]
pub type CC4G_AW = CC1G_AW ; # [ doc = "Write proxy for field `CC4G`" ]
pub struct CC4G_W < 'a > { w : & 'a mut W , } impl < 'a > CC4G_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4G_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "If CC1 is an output: CC1IF flag is set, Corresponding interrupt or DMA request is sent if enabled. If CC1 is an input: The current value of the counter is captured in TIMx_CCR1 register." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( CC1G_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Write proxy for field `COMG`" ]
pub struct COMG_W < 'a > { w : & 'a mut W , } impl < 'a > COMG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Trigger generation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TG_AW { # [ doc = "1: The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
TRIGGER = 1 } impl From < TG_AW > for bool { # [ inline ( always ) ]
fn from ( variant : TG_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `TG`" ]
pub struct TG_W < 'a > { w : & 'a mut W , } impl < 'a > TG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TG_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The TIF flag is set in TIMx_SR register. Related interrupt or DMA transfer can occur if enabled." ]
# [ inline ( always ) ]
pub fn trigger ( self ) -> & 'a mut W { self . variant ( TG_AW :: TRIGGER ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Write proxy for field `BG`" ]
pub struct BG_W < 'a > { w : & 'a mut W , } impl < 'a > BG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Write proxy for field `B2G`" ]
pub struct B2G_W < 'a > { w : & 'a mut W , } impl < 'a > B2G_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } impl W { # [ doc = "Bit 0 - Update generation" ]
# [ inline ( always ) ]
pub fn ug ( & mut self ) -> UG_W { UG_W { w : self } } # [ doc = "Bit 1 - Capture/compare 1 generation" ]
# [ inline ( always ) ]
pub fn cc1g ( & mut self ) -> CC1G_W { CC1G_W { w : self } } # [ doc = "Bit 2 - Capture/compare 2 generation" ]
# [ inline ( always ) ]
pub fn cc2g ( & mut self ) -> CC2G_W { CC2G_W { w : self } } # [ doc = "Bit 3 - Capture/compare 3 generation" ]
# [ inline ( always ) ]
pub fn cc3g ( & mut self ) -> CC3G_W { CC3G_W { w : self } } # [ doc = "Bit 4 - Capture/compare 4 generation" ]
# [ inline ( always ) ]
pub fn cc4g ( & mut self ) -> CC4G_W { CC4G_W { w : self } } # [ doc = "Bit 5 - Capture/Compare control update generation" ]
# [ inline ( always ) ]
pub fn comg ( & mut self ) -> COMG_W { COMG_W { w : self } } # [ doc = "Bit 6 - Trigger generation" ]
# [ inline ( always ) ]
pub fn tg ( & mut self ) -> TG_W { TG_W { w : self } } # [ doc = "Bit 7 - Break generation" ]
# [ inline ( always ) ]
pub fn bg ( & mut self ) -> BG_W { BG_W { w : self } } # [ doc = "Bit 8 - Break 2 generation" ]
# [ inline ( always ) ]
pub fn b2g ( & mut self ) -> B2G_W { B2G_W { w : self } } } } # [ doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module" ]
pub type CCMR1_OUTPUT = crate :: Reg < u32 , _CCMR1_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_OUTPUT ; # [ doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure" ]
impl crate :: Readable for CCMR1_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure" ]
impl crate :: Writable for CCMR1_OUTPUT { } # [ doc = "capture/compare mode register (output mode)" ]
pub mod ccmr1_output { # [ doc = "Reader of register CCMR1_Output" ]
pub type R = crate :: R < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Writer for register CCMR1_Output" ]
pub type W = crate :: W < u32 , super :: CCMR1_OUTPUT > ; # [ doc = "Register CCMR1_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC2CE`" ]
pub type OC2CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2CE`" ]
pub struct OC2CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output Compare 2 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC2M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC2M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC2M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC2M`" ]
pub type OC2M_R = crate :: R < u8 , OC2M_A > ; impl OC2M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2M_A { match self . bits { 0 => OC2M_A :: FROZEN , 1 => OC2M_A :: ACTIVEONMATCH , 2 => OC2M_A :: INACTIVEONMATCH , 3 => OC2M_A :: TOGGLE , 4 => OC2M_A :: FORCEINACTIVE , 5 => OC2M_A :: FORCEACTIVE , 6 => OC2M_A :: PWMMODE1 , 7 => OC2M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC2M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC2M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC2M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC2M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC2M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC2M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC2M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC2M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC2M`" ]
pub struct OC2M_W < 'a > { w : & 'a mut W , } impl < 'a > OC2M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output Compare 2 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC2PE_A { # [ doc = "0: Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC2PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC2PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC2PE`" ]
pub type OC2PE_R = crate :: R < bool , OC2PE_A > ; impl OC2PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC2PE_A { match self . bits { false => OC2PE_A :: DISABLED , true => OC2PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC2PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC2PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC2PE`" ]
pub struct OC2PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC2PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR2 disabled. New values written to CCR2 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: DISABLED ) } # [ doc = "Preload register on CCR2 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC2PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC2FE`" ]
pub type OC2FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2FE`" ]
pub struct OC2FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC2FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "0: CC2 channel is configured as output" ]
OUTPUT = 0 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC2S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC2S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC2S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC1CE`" ]
pub type OC1CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1CE`" ]
pub struct OC1CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output Compare 1 mode" ]
pub type OC1M_A = OC2M_A ; # [ doc = "Reader of field `OC1M`" ]
pub type OC1M_R = crate :: R < u8 , OC2M_A > ; # [ doc = "Write proxy for field `OC1M`" ]
pub struct OC1M_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC2M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC2M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC2M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC2M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output Compare 1 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC1PE_A { # [ doc = "0: Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC1PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC1PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC1PE`" ]
pub type OC1PE_R = crate :: R < bool , OC1PE_A > ; impl OC1PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC1PE_A { match self . bits { false => OC1PE_A :: DISABLED , true => OC1PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC1PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC1PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC1PE`" ]
pub struct OC1PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC1PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR1 disabled. New values written to CCR1 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: DISABLED ) } # [ doc = "Preload register on CCR1 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC1PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC1FE`" ]
pub type OC1FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1FE`" ]
pub struct OC1FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC1FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "0: CC1 channel is configured as output" ]
OUTPUT = 0 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC1S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC1S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC1S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } # [ doc = "Reader of field `OC1M_3`" ]
pub type OC1M_3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC1M_3`" ]
pub struct OC1M_3_W < 'a > { w : & 'a mut W , } impl < 'a > OC1M_3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `OC2M_3`" ]
pub type OC2M_3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC2M_3`" ]
pub struct OC2M_3_W < 'a > { w : & 'a mut W , } impl < 'a > OC2M_3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output Compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & self ) -> OC2CE_R { OC2CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output Compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & self ) -> OC2M_R { OC2M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output Compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & self ) -> OC2PE_R { OC2PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output Compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & self ) -> OC2FE_R { OC2FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output Compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & self ) -> OC1CE_R { OC1CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & self ) -> OC1M_R { OC1M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & self ) -> OC1PE_R { OC1PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & self ) -> OC1FE_R { OC1FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } # [ doc = "Bit 16 - Output Compare 1 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc1m_3 ( & self ) -> OC1M_3_R { OC1M_3_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Output Compare 2 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc2m_3 ( & self ) -> OC2M_3_R { OC2M_3_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Output Compare 2 clear enable" ]
# [ inline ( always ) ]
pub fn oc2ce ( & mut self ) -> OC2CE_W { OC2CE_W { w : self } } # [ doc = "Bits 12:14 - Output Compare 2 mode" ]
# [ inline ( always ) ]
pub fn oc2m ( & mut self ) -> OC2M_W { OC2M_W { w : self } } # [ doc = "Bit 11 - Output Compare 2 preload enable" ]
# [ inline ( always ) ]
pub fn oc2pe ( & mut self ) -> OC2PE_W { OC2PE_W { w : self } } # [ doc = "Bit 10 - Output Compare 2 fast enable" ]
# [ inline ( always ) ]
pub fn oc2fe ( & mut self ) -> OC2FE_W { OC2FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bit 7 - Output Compare 1 clear enable" ]
# [ inline ( always ) ]
pub fn oc1ce ( & mut self ) -> OC1CE_W { OC1CE_W { w : self } } # [ doc = "Bits 4:6 - Output Compare 1 mode" ]
# [ inline ( always ) ]
pub fn oc1m ( & mut self ) -> OC1M_W { OC1M_W { w : self } } # [ doc = "Bit 3 - Output Compare 1 preload enable" ]
# [ inline ( always ) ]
pub fn oc1pe ( & mut self ) -> OC1PE_W { OC1PE_W { w : self } } # [ doc = "Bit 2 - Output Compare 1 fast enable" ]
# [ inline ( always ) ]
pub fn oc1fe ( & mut self ) -> OC1FE_W { OC1FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } # [ doc = "Bit 16 - Output Compare 1 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc1m_3 ( & mut self ) -> OC1M_3_W { OC1M_3_W { w : self } } # [ doc = "Bit 24 - Output Compare 2 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc2m_3 ( & mut self ) -> OC2M_3_W { OC2M_3_W { w : self } } } } # [ doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module" ]
pub type CCMR1_INPUT = crate :: Reg < u32 , _CCMR1_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR1_INPUT ; # [ doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure" ]
impl crate :: Readable for CCMR1_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure" ]
impl crate :: Writable for CCMR1_INPUT { } # [ doc = "capture/compare mode register 1 (input mode)" ]
pub mod ccmr1_input { # [ doc = "Reader of register CCMR1_Input" ]
pub type R = crate :: R < u32 , super :: CCMR1_INPUT > ; # [ doc = "Writer for register CCMR1_Input" ]
pub type W = crate :: W < u32 , super :: CCMR1_INPUT > ; # [ doc = "Register CCMR1_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR1_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC2F`" ]
pub type IC2F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2F`" ]
pub struct IC2F_W < 'a > { w : & 'a mut W , } impl < 'a > IC2F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC2PSC`" ]
pub type IC2PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC2PSC`" ]
pub struct IC2PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC2PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 2 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC2S_A { # [ doc = "1: CC2 channel is configured as input, IC2 is mapped on TI2" ]
TI2 = 1 , # [ doc = "2: CC2 channel is configured as input, IC2 is mapped on TI1" ]
TI1 = 2 , # [ doc = "3: CC2 channel is configured as input, IC2 is mapped on TRC" ]
TRC = 3 } impl From < CC2S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC2S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC2S`" ]
pub type CC2S_R = crate :: R < u8 , CC2S_A > ; impl CC2S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC2S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC2S_A :: TI2 ) , 2 => Val ( CC2S_A :: TI1 ) , 3 => Val ( CC2S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC2S_A :: TI2 } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC2S_A :: TI1 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC2S_A :: TRC } } # [ doc = "Write proxy for field `CC2S`" ]
pub struct CC2S_W < 'a > { w : & 'a mut W , } impl < 'a > CC2S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC2S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI2 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TI1 ) } # [ doc = "CC2 channel is configured as input, IC2 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC2S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Input capture 1 filter\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum IC1F_A { # [ doc = "0: No filter, sampling is done at fDTS" ]
NOFILTER = 0 , # [ doc = "1: fSAMPLING=fCK_INT, N=2" ]
FCK_INT_N2 = 1 , # [ doc = "2: fSAMPLING=fCK_INT, N=4" ]
FCK_INT_N4 = 2 , # [ doc = "3: fSAMPLING=fCK_INT, N=8" ]
FCK_INT_N8 = 3 , # [ doc = "4: fSAMPLING=fDTS/2, N=6" ]
FDTS_DIV2_N6 = 4 , # [ doc = "5: fSAMPLING=fDTS/2, N=8" ]
FDTS_DIV2_N8 = 5 , # [ doc = "6: fSAMPLING=fDTS/4, N=6" ]
FDTS_DIV4_N6 = 6 , # [ doc = "7: fSAMPLING=fDTS/4, N=8" ]
FDTS_DIV4_N8 = 7 , # [ doc = "8: fSAMPLING=fDTS/8, N=6" ]
FDTS_DIV8_N6 = 8 , # [ doc = "9: fSAMPLING=fDTS/8, N=8" ]
FDTS_DIV8_N8 = 9 , # [ doc = "10: fSAMPLING=fDTS/16, N=5" ]
FDTS_DIV16_N5 = 10 , # [ doc = "11: fSAMPLING=fDTS/16, N=6" ]
FDTS_DIV16_N6 = 11 , # [ doc = "12: fSAMPLING=fDTS/16, N=8" ]
FDTS_DIV16_N8 = 12 , # [ doc = "13: fSAMPLING=fDTS/32, N=5" ]
FDTS_DIV32_N5 = 13 , # [ doc = "14: fSAMPLING=fDTS/32, N=6" ]
FDTS_DIV32_N6 = 14 , # [ doc = "15: fSAMPLING=fDTS/32, N=8" ]
FDTS_DIV32_N8 = 15 } impl From < IC1F_A > for u8 { # [ inline ( always ) ]
fn from ( variant : IC1F_A ) -> Self { variant as _ } } # [ doc = "Reader of field `IC1F`" ]
pub type IC1F_R = crate :: R < u8 , IC1F_A > ; impl IC1F_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IC1F_A { match self . bits { 0 => IC1F_A :: NOFILTER , 1 => IC1F_A :: FCK_INT_N2 , 2 => IC1F_A :: FCK_INT_N4 , 3 => IC1F_A :: FCK_INT_N8 , 4 => IC1F_A :: FDTS_DIV2_N6 , 5 => IC1F_A :: FDTS_DIV2_N8 , 6 => IC1F_A :: FDTS_DIV4_N6 , 7 => IC1F_A :: FDTS_DIV4_N8 , 8 => IC1F_A :: FDTS_DIV8_N6 , 9 => IC1F_A :: FDTS_DIV8_N8 , 10 => IC1F_A :: FDTS_DIV16_N5 , 11 => IC1F_A :: FDTS_DIV16_N6 , 12 => IC1F_A :: FDTS_DIV16_N8 , 13 => IC1F_A :: FDTS_DIV32_N5 , 14 => IC1F_A :: FDTS_DIV32_N6 , 15 => IC1F_A :: FDTS_DIV32_N8 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOFILTER`" ]
# [ inline ( always ) ]
pub fn is_no_filter ( & self ) -> bool { * self == IC1F_A :: NOFILTER } # [ doc = "Checks if the value of the field is `FCK_INT_N2`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n2 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N2 } # [ doc = "Checks if the value of the field is `FCK_INT_N4`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n4 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N4 } # [ doc = "Checks if the value of the field is `FCK_INT_N8`" ]
# [ inline ( always ) ]
pub fn is_fck_int_n8 ( & self ) -> bool { * self == IC1F_A :: FCK_INT_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV2_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div2_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV2_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV4_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div4_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV4_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV8_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div8_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV8_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV16_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div16_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV16_N8 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N5`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n5 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N5 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N6`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n6 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N6 } # [ doc = "Checks if the value of the field is `FDTS_DIV32_N8`" ]
# [ inline ( always ) ]
pub fn is_fdts_div32_n8 ( & self ) -> bool { * self == IC1F_A :: FDTS_DIV32_N8 } } # [ doc = "Write proxy for field `IC1F`" ]
pub struct IC1F_W < 'a > { w : & 'a mut W , } impl < 'a > IC1F_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : IC1F_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No filter, sampling is done at fDTS" ]
# [ inline ( always ) ]
pub fn no_filter ( self ) -> & 'a mut W { self . variant ( IC1F_A :: NOFILTER ) } # [ doc = "fSAMPLING=fCK_INT, N=2" ]
# [ inline ( always ) ]
pub fn fck_int_n2 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N2 ) } # [ doc = "fSAMPLING=fCK_INT, N=4" ]
# [ inline ( always ) ]
pub fn fck_int_n4 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N4 ) } # [ doc = "fSAMPLING=fCK_INT, N=8" ]
# [ inline ( always ) ]
pub fn fck_int_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FCK_INT_N8 ) } # [ doc = "fSAMPLING=fDTS/2, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div2_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N6 ) } # [ doc = "fSAMPLING=fDTS/2, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div2_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV2_N8 ) } # [ doc = "fSAMPLING=fDTS/4, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div4_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N6 ) } # [ doc = "fSAMPLING=fDTS/4, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div4_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV4_N8 ) } # [ doc = "fSAMPLING=fDTS/8, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div8_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N6 ) } # [ doc = "fSAMPLING=fDTS/8, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div8_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV8_N8 ) } # [ doc = "fSAMPLING=fDTS/16, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div16_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N5 ) } # [ doc = "fSAMPLING=fDTS/16, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div16_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N6 ) } # [ doc = "fSAMPLING=fDTS/16, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div16_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV16_N8 ) } # [ doc = "fSAMPLING=fDTS/32, N=5" ]
# [ inline ( always ) ]
pub fn fdts_div32_n5 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N5 ) } # [ doc = "fSAMPLING=fDTS/32, N=6" ]
# [ inline ( always ) ]
pub fn fdts_div32_n6 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N6 ) } # [ doc = "fSAMPLING=fDTS/32, N=8" ]
# [ inline ( always ) ]
pub fn fdts_div32_n8 ( self ) -> & 'a mut W { self . variant ( IC1F_A :: FDTS_DIV32_N8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC1PSC`" ]
pub type IC1PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC1PSC`" ]
pub struct IC1PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC1PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 1 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC1S_A { # [ doc = "1: CC1 channel is configured as input, IC1 is mapped on TI1" ]
TI1 = 1 , # [ doc = "2: CC1 channel is configured as input, IC1 is mapped on TI2" ]
TI2 = 2 , # [ doc = "3: CC1 channel is configured as input, IC1 is mapped on TRC" ]
TRC = 3 } impl From < CC1S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC1S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC1S`" ]
pub type CC1S_R = crate :: R < u8 , CC1S_A > ; impl CC1S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC1S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC1S_A :: TI1 ) , 2 => Val ( CC1S_A :: TI2 ) , 3 => Val ( CC1S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI1`" ]
# [ inline ( always ) ]
pub fn is_ti1 ( & self ) -> bool { * self == CC1S_A :: TI1 } # [ doc = "Checks if the value of the field is `TI2`" ]
# [ inline ( always ) ]
pub fn is_ti2 ( & self ) -> bool { * self == CC1S_A :: TI2 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC1S_A :: TRC } } # [ doc = "Write proxy for field `CC1S`" ]
pub struct CC1S_W < 'a > { w : & 'a mut W , } impl < 'a > CC1S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC1S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI1" ]
# [ inline ( always ) ]
pub fn ti1 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI1 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TI2" ]
# [ inline ( always ) ]
pub fn ti2 ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TI2 ) } # [ doc = "CC1 channel is configured as input, IC1 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC1S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & self ) -> IC2F_R { IC2F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & self ) -> IC2PSC_R { IC2PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & self ) -> CC2S_R { CC2S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & self ) -> IC1F_R { IC1F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & self ) -> IC1PSC_R { IC1PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & self ) -> CC1S_R { CC1S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 2 filter" ]
# [ inline ( always ) ]
pub fn ic2f ( & mut self ) -> IC2F_W { IC2F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 2 prescaler" ]
# [ inline ( always ) ]
pub fn ic2psc ( & mut self ) -> IC2PSC_W { IC2PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 2 selection" ]
# [ inline ( always ) ]
pub fn cc2s ( & mut self ) -> CC2S_W { CC2S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 1 filter" ]
# [ inline ( always ) ]
pub fn ic1f ( & mut self ) -> IC1F_W { IC1F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 1 prescaler" ]
# [ inline ( always ) ]
pub fn ic1psc ( & mut self ) -> IC1PSC_W { IC1PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 1 selection" ]
# [ inline ( always ) ]
pub fn cc1s ( & mut self ) -> CC1S_W { CC1S_W { w : self } } } } # [ doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_output](ccmr2_output) module" ]
pub type CCMR2_OUTPUT = crate :: Reg < u32 , _CCMR2_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_OUTPUT ; # [ doc = "`read()` method returns [ccmr2_output::R](ccmr2_output::R) reader structure" ]
impl crate :: Readable for CCMR2_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_output::W](ccmr2_output::W) writer structure" ]
impl crate :: Writable for CCMR2_OUTPUT { } # [ doc = "capture/compare mode register (output mode)" ]
pub mod ccmr2_output { # [ doc = "Reader of register CCMR2_Output" ]
pub type R = crate :: R < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Writer for register CCMR2_Output" ]
pub type W = crate :: W < u32 , super :: CCMR2_OUTPUT > ; # [ doc = "Register CCMR2_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC4CE`" ]
pub type OC4CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4CE`" ]
pub struct OC4CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Output compare 4 mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OC4M_A { # [ doc = "0: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
FROZEN = 0 , # [ doc = "1: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
ACTIVEONMATCH = 1 , # [ doc = "2: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
INACTIVEONMATCH = 2 , # [ doc = "3: OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
TOGGLE = 3 , # [ doc = "4: OCyREF is forced low" ]
FORCEINACTIVE = 4 , # [ doc = "5: OCyREF is forced high" ]
FORCEACTIVE = 5 , # [ doc = "6: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
PWMMODE1 = 6 , # [ doc = "7: Inversely to PwmMode1" ]
PWMMODE2 = 7 } impl From < OC4M_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OC4M_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OC4M`" ]
pub type OC4M_R = crate :: R < u8 , OC4M_A > ; impl OC4M_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4M_A { match self . bits { 0 => OC4M_A :: FROZEN , 1 => OC4M_A :: ACTIVEONMATCH , 2 => OC4M_A :: INACTIVEONMATCH , 3 => OC4M_A :: TOGGLE , 4 => OC4M_A :: FORCEINACTIVE , 5 => OC4M_A :: FORCEACTIVE , 6 => OC4M_A :: PWMMODE1 , 7 => OC4M_A :: PWMMODE2 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `FROZEN`" ]
# [ inline ( always ) ]
pub fn is_frozen ( & self ) -> bool { * self == OC4M_A :: FROZEN } # [ doc = "Checks if the value of the field is `ACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_active_on_match ( & self ) -> bool { * self == OC4M_A :: ACTIVEONMATCH } # [ doc = "Checks if the value of the field is `INACTIVEONMATCH`" ]
# [ inline ( always ) ]
pub fn is_inactive_on_match ( & self ) -> bool { * self == OC4M_A :: INACTIVEONMATCH } # [ doc = "Checks if the value of the field is `TOGGLE`" ]
# [ inline ( always ) ]
pub fn is_toggle ( & self ) -> bool { * self == OC4M_A :: TOGGLE } # [ doc = "Checks if the value of the field is `FORCEINACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_inactive ( & self ) -> bool { * self == OC4M_A :: FORCEINACTIVE } # [ doc = "Checks if the value of the field is `FORCEACTIVE`" ]
# [ inline ( always ) ]
pub fn is_force_active ( & self ) -> bool { * self == OC4M_A :: FORCEACTIVE } # [ doc = "Checks if the value of the field is `PWMMODE1`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode1 ( & self ) -> bool { * self == OC4M_A :: PWMMODE1 } # [ doc = "Checks if the value of the field is `PWMMODE2`" ]
# [ inline ( always ) ]
pub fn is_pwm_mode2 ( & self ) -> bool { * self == OC4M_A :: PWMMODE2 } } # [ doc = "Write proxy for field `OC4M`" ]
pub struct OC4M_W < 'a > { w : & 'a mut W , } impl < 'a > OC4M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Output compare 4 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC4PE_A { # [ doc = "0: Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC4PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC4PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC4PE`" ]
pub type OC4PE_R = crate :: R < bool , OC4PE_A > ; impl OC4PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC4PE_A { match self . bits { false => OC4PE_A :: DISABLED , true => OC4PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC4PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC4PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC4PE`" ]
pub struct OC4PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC4PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR4 disabled. New values written to CCR4 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: DISABLED ) } # [ doc = "Preload register on CCR4 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC4PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC4FE`" ]
pub type OC4FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4FE`" ]
pub struct OC4FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC4FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "0: CC4 channel is configured as output" ]
OUTPUT = 0 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC4S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC4S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC4S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `OC3CE`" ]
pub type OC3CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3CE`" ]
pub struct OC3CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Output compare 3 mode" ]
pub type OC3M_A = OC4M_A ; # [ doc = "Reader of field `OC3M`" ]
pub type OC3M_R = crate :: R < u8 , OC4M_A > ; # [ doc = "Write proxy for field `OC3M`" ]
pub struct OC3M_W < 'a > { w : & 'a mut W , } impl < 'a > OC3M_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3M_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs" ]
# [ inline ( always ) ]
pub fn frozen ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FROZEN ) } # [ doc = "Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn active_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: ACTIVEONMATCH ) } # [ doc = "Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register" ]
# [ inline ( always ) ]
pub fn inactive_on_match ( self ) -> & 'a mut W { self . variant ( OC4M_A :: INACTIVEONMATCH ) } # [ doc = "OCyREF toggles when TIMx_CNT=TIMx_CCRy" ]
# [ inline ( always ) ]
pub fn toggle ( self ) -> & 'a mut W { self . variant ( OC4M_A :: TOGGLE ) } # [ doc = "OCyREF is forced low" ]
# [ inline ( always ) ]
pub fn force_inactive ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEINACTIVE ) } # [ doc = "OCyREF is forced high" ]
# [ inline ( always ) ]
pub fn force_active ( self ) -> & 'a mut W { self . variant ( OC4M_A :: FORCEACTIVE ) } # [ doc = "In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active" ]
# [ inline ( always ) ]
pub fn pwm_mode1 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE1 ) } # [ doc = "Inversely to PwmMode1" ]
# [ inline ( always ) ]
pub fn pwm_mode2 ( self ) -> & 'a mut W { self . variant ( OC4M_A :: PWMMODE2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Output compare 3 preload enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OC3PE_A { # [ doc = "0: Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
DISABLED = 0 , # [ doc = "1: Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
ENABLED = 1 } impl From < OC3PE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OC3PE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OC3PE`" ]
pub type OC3PE_R = crate :: R < bool , OC3PE_A > ; impl OC3PE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OC3PE_A { match self . bits { false => OC3PE_A :: DISABLED , true => OC3PE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OC3PE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OC3PE_A :: ENABLED } } # [ doc = "Write proxy for field `OC3PE`" ]
pub struct OC3PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3PE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OC3PE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preload register on CCR3 disabled. New values written to CCR3 are taken into account immediately" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: DISABLED ) } # [ doc = "Preload register on CCR3 enabled. Preload value is loaded into active register on each update event" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OC3PE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC3FE`" ]
pub type OC3FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3FE`" ]
pub struct OC3FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC3FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Capture/Compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "0: CC3 channel is configured as output" ]
OUTPUT = 0 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( CC3S_A :: OUTPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == CC3S_A :: OUTPUT } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( CC3S_A :: OUTPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } # [ doc = "Reader of field `OC3M_3`" ]
pub type OC3M_3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC3M_3`" ]
pub struct OC3M_3_W < 'a > { w : & 'a mut W , } impl < 'a > OC3M_3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `OC4M_3`" ]
pub type OC4M_3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC4M_3`" ]
pub struct OC4M_3_W < 'a > { w : & 'a mut W , } impl < 'a > OC4M_3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } impl R { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & self ) -> OC4CE_R { OC4CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & self ) -> OC4M_R { OC4M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & self ) -> OC4PE_R { OC4PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & self ) -> OC4FE_R { OC4FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & self ) -> OC3CE_R { OC3CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & self ) -> OC3M_R { OC3M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & self ) -> OC3PE_R { OC3PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & self ) -> OC3FE_R { OC3FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } # [ doc = "Bit 16 - Output Compare 3 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc3m_3 ( & self ) -> OC3M_3_R { OC3M_3_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Output Compare 4 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc4m_3 ( & self ) -> OC4M_3_R { OC4M_3_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Output compare 4 clear enable" ]
# [ inline ( always ) ]
pub fn oc4ce ( & mut self ) -> OC4CE_W { OC4CE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 4 mode" ]
# [ inline ( always ) ]
pub fn oc4m ( & mut self ) -> OC4M_W { OC4M_W { w : self } } # [ doc = "Bit 11 - Output compare 4 preload enable" ]
# [ inline ( always ) ]
pub fn oc4pe ( & mut self ) -> OC4PE_W { OC4PE_W { w : self } } # [ doc = "Bit 10 - Output compare 4 fast enable" ]
# [ inline ( always ) ]
pub fn oc4fe ( & mut self ) -> OC4FE_W { OC4FE_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bit 7 - Output compare 3 clear enable" ]
# [ inline ( always ) ]
pub fn oc3ce ( & mut self ) -> OC3CE_W { OC3CE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 3 mode" ]
# [ inline ( always ) ]
pub fn oc3m ( & mut self ) -> OC3M_W { OC3M_W { w : self } } # [ doc = "Bit 3 - Output compare 3 preload enable" ]
# [ inline ( always ) ]
pub fn oc3pe ( & mut self ) -> OC3PE_W { OC3PE_W { w : self } } # [ doc = "Bit 2 - Output compare 3 fast enable" ]
# [ inline ( always ) ]
pub fn oc3fe ( & mut self ) -> OC3FE_W { OC3FE_W { w : self } } # [ doc = "Bits 0:1 - Capture/Compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } # [ doc = "Bit 16 - Output Compare 3 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc3m_3 ( & mut self ) -> OC3M_3_W { OC3M_3_W { w : self } } # [ doc = "Bit 24 - Output Compare 4 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc4m_3 ( & mut self ) -> OC4M_3_W { OC4M_3_W { w : self } } } } # [ doc = "capture/compare mode register 2 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr2_input](ccmr2_input) module" ]
pub type CCMR2_INPUT = crate :: Reg < u32 , _CCMR2_INPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR2_INPUT ; # [ doc = "`read()` method returns [ccmr2_input::R](ccmr2_input::R) reader structure" ]
impl crate :: Readable for CCMR2_INPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr2_input::W](ccmr2_input::W) writer structure" ]
impl crate :: Writable for CCMR2_INPUT { } # [ doc = "capture/compare mode register 2 (input mode)" ]
pub mod ccmr2_input { # [ doc = "Reader of register CCMR2_Input" ]
pub type R = crate :: R < u32 , super :: CCMR2_INPUT > ; # [ doc = "Writer for register CCMR2_Input" ]
pub type W = crate :: W < u32 , super :: CCMR2_INPUT > ; # [ doc = "Register CCMR2_Input `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR2_INPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IC4F`" ]
pub type IC4F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4F`" ]
pub struct IC4F_W < 'a > { w : & 'a mut W , } impl < 'a > IC4F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Reader of field `IC4PSC`" ]
pub type IC4PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC4PSC`" ]
pub struct IC4PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC4PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Capture/Compare 4 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC4S_A { # [ doc = "1: CC4 channel is configured as input, IC4 is mapped on TI4" ]
TI4 = 1 , # [ doc = "2: CC4 channel is configured as input, IC4 is mapped on TI3" ]
TI3 = 2 , # [ doc = "3: CC4 channel is configured as input, IC4 is mapped on TRC" ]
TRC = 3 } impl From < CC4S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC4S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC4S`" ]
pub type CC4S_R = crate :: R < u8 , CC4S_A > ; impl CC4S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC4S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC4S_A :: TI4 ) , 2 => Val ( CC4S_A :: TI3 ) , 3 => Val ( CC4S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC4S_A :: TI4 } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC4S_A :: TI3 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC4S_A :: TRC } } # [ doc = "Write proxy for field `CC4S`" ]
pub struct CC4S_W < 'a > { w : & 'a mut W , } impl < 'a > CC4S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC4S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI4 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TI3 ) } # [ doc = "CC4 channel is configured as input, IC4 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC4S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Reader of field `IC3F`" ]
pub type IC3F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3F`" ]
pub struct IC3F_W < 'a > { w : & 'a mut W , } impl < 'a > IC3F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Reader of field `IC3PSC`" ]
pub type IC3PSC_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `IC3PSC`" ]
pub struct IC3PSC_W < 'a > { w : & 'a mut W , } impl < 'a > IC3PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Capture/compare 3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CC3S_A { # [ doc = "1: CC3 channel is configured as input, IC3 is mapped on TI3" ]
TI3 = 1 , # [ doc = "2: CC3 channel is configured as input, IC3 is mapped on TI4" ]
TI4 = 2 , # [ doc = "3: CC3 channel is configured as input, IC3 is mapped on TRC" ]
TRC = 3 } impl From < CC3S_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CC3S_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CC3S`" ]
pub type CC3S_R = crate :: R < u8 , CC3S_A > ; impl CC3S_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , CC3S_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( CC3S_A :: TI3 ) , 2 => Val ( CC3S_A :: TI4 ) , 3 => Val ( CC3S_A :: TRC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `TI3`" ]
# [ inline ( always ) ]
pub fn is_ti3 ( & self ) -> bool { * self == CC3S_A :: TI3 } # [ doc = "Checks if the value of the field is `TI4`" ]
# [ inline ( always ) ]
pub fn is_ti4 ( & self ) -> bool { * self == CC3S_A :: TI4 } # [ doc = "Checks if the value of the field is `TRC`" ]
# [ inline ( always ) ]
pub fn is_trc ( & self ) -> bool { * self == CC3S_A :: TRC } } # [ doc = "Write proxy for field `CC3S`" ]
pub struct CC3S_W < 'a > { w : & 'a mut W , } impl < 'a > CC3S_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CC3S_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI3" ]
# [ inline ( always ) ]
pub fn ti3 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI3 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TI4" ]
# [ inline ( always ) ]
pub fn ti4 ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TI4 ) } # [ doc = "CC3 channel is configured as input, IC3 is mapped on TRC" ]
# [ inline ( always ) ]
pub fn trc ( self ) -> & 'a mut W { self . variant ( CC3S_A :: TRC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & self ) -> IC4F_R { IC4F_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & self ) -> IC4PSC_R { IC4PSC_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & self ) -> CC4S_R { CC4S_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & self ) -> IC3F_R { IC3F_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & self ) -> IC3PSC_R { IC3PSC_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Capture/compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & self ) -> CC3S_R { CC3S_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - Input capture 4 filter" ]
# [ inline ( always ) ]
pub fn ic4f ( & mut self ) -> IC4F_W { IC4F_W { w : self } } # [ doc = "Bits 10:11 - Input capture 4 prescaler" ]
# [ inline ( always ) ]
pub fn ic4psc ( & mut self ) -> IC4PSC_W { IC4PSC_W { w : self } } # [ doc = "Bits 8:9 - Capture/Compare 4 selection" ]
# [ inline ( always ) ]
pub fn cc4s ( & mut self ) -> CC4S_W { CC4S_W { w : self } } # [ doc = "Bits 4:7 - Input capture 3 filter" ]
# [ inline ( always ) ]
pub fn ic3f ( & mut self ) -> IC3F_W { IC3F_W { w : self } } # [ doc = "Bits 2:3 - Input capture 3 prescaler" ]
# [ inline ( always ) ]
pub fn ic3psc ( & mut self ) -> IC3PSC_W { IC3PSC_W { w : self } } # [ doc = "Bits 0:1 - Capture/compare 3 selection" ]
# [ inline ( always ) ]
pub fn cc3s ( & mut self ) -> CC3S_W { CC3S_W { w : self } } } } # [ doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module" ]
pub type CCER = crate :: Reg < u32 , _CCER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCER ; # [ doc = "`read()` method returns [ccer::R](ccer::R) reader structure" ]
impl crate :: Readable for CCER { } # [ doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure" ]
impl crate :: Writable for CCER { } # [ doc = "capture/compare enable register" ]
pub mod ccer { # [ doc = "Reader of register CCER" ]
pub type R = crate :: R < u32 , super :: CCER > ; # [ doc = "Writer for register CCER" ]
pub type W = crate :: W < u32 , super :: CCER > ; # [ doc = "Register CCER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CC1E`" ]
pub type CC1E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1E`" ]
pub struct CC1E_W < 'a > { w : & 'a mut W , } impl < 'a > CC1E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `CC1P`" ]
pub type CC1P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1P`" ]
pub struct CC1P_W < 'a > { w : & 'a mut W , } impl < 'a > CC1P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CC1NE`" ]
pub type CC1NE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NE`" ]
pub struct CC1NE_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `CC1NP`" ]
pub type CC1NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC1NP`" ]
pub struct CC1NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC1NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `CC2E`" ]
pub type CC2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2E`" ]
pub struct CC2E_W < 'a > { w : & 'a mut W , } impl < 'a > CC2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `CC2P`" ]
pub type CC2P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2P`" ]
pub struct CC2P_W < 'a > { w : & 'a mut W , } impl < 'a > CC2P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `CC2NE`" ]
pub type CC2NE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2NE`" ]
pub struct CC2NE_W < 'a > { w : & 'a mut W , } impl < 'a > CC2NE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `CC2NP`" ]
pub type CC2NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC2NP`" ]
pub struct CC2NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC2NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `CC3E`" ]
pub type CC3E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3E`" ]
pub struct CC3E_W < 'a > { w : & 'a mut W , } impl < 'a > CC3E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `CC3P`" ]
pub type CC3P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3P`" ]
pub struct CC3P_W < 'a > { w : & 'a mut W , } impl < 'a > CC3P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CC3NE`" ]
pub type CC3NE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3NE`" ]
pub struct CC3NE_W < 'a > { w : & 'a mut W , } impl < 'a > CC3NE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `CC3NP`" ]
pub type CC3NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC3NP`" ]
pub struct CC3NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC3NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `CC4E`" ]
pub type CC4E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4E`" ]
pub struct CC4E_W < 'a > { w : & 'a mut W , } impl < 'a > CC4E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `CC4P`" ]
pub type CC4P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4P`" ]
pub struct CC4P_W < 'a > { w : & 'a mut W , } impl < 'a > CC4P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `CC4NP`" ]
pub type CC4NP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC4NP`" ]
pub struct CC4NP_W < 'a > { w : & 'a mut W , } impl < 'a > CC4NP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `CC5E`" ]
pub type CC5E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC5E`" ]
pub struct CC5E_W < 'a > { w : & 'a mut W , } impl < 'a > CC5E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `CC5P`" ]
pub type CC5P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC5P`" ]
pub struct CC5P_W < 'a > { w : & 'a mut W , } impl < 'a > CC5P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Reader of field `CC6E`" ]
pub type CC6E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC6E`" ]
pub struct CC6E_W < 'a > { w : & 'a mut W , } impl < 'a > CC6E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `CC6P`" ]
pub type CC6P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CC6P`" ]
pub struct CC6P_W < 'a > { w : & 'a mut W , } impl < 'a > CC6P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } impl R { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & self ) -> CC1E_R { CC1E_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & self ) -> CC1P_R { CC1P_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Capture/Compare 1 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc1ne ( & self ) -> CC1NE_R { CC1NE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & self ) -> CC1NP_R { CC1NP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & self ) -> CC2E_R { CC2E_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & self ) -> CC2P_R { CC2P_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Capture/Compare 2 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc2ne ( & self ) -> CC2NE_R { CC2NE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & self ) -> CC2NP_R { CC2NP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & self ) -> CC3E_R { CC3E_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & self ) -> CC3P_R { CC3P_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Capture/Compare 3 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc3ne ( & self ) -> CC3NE_R { CC3NE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & self ) -> CC3NP_R { CC3NP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & self ) -> CC4E_R { CC4E_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & self ) -> CC4P_R { CC4P_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Capture/Compare 4 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & self ) -> CC4NP_R { CC4NP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Capture/Compare 5 output enable" ]
# [ inline ( always ) ]
pub fn cc5e ( & self ) -> CC5E_R { CC5E_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Capture/Compare 5 output Polarity" ]
# [ inline ( always ) ]
pub fn cc5p ( & self ) -> CC5P_R { CC5P_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Capture/Compare 6 output enable" ]
# [ inline ( always ) ]
pub fn cc6e ( & self ) -> CC6E_R { CC6E_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - Capture/Compare 6 output Polarity" ]
# [ inline ( always ) ]
pub fn cc6p ( & self ) -> CC6P_R { CC6P_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Capture/Compare 1 output enable" ]
# [ inline ( always ) ]
pub fn cc1e ( & mut self ) -> CC1E_W { CC1E_W { w : self } } # [ doc = "Bit 1 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1p ( & mut self ) -> CC1P_W { CC1P_W { w : self } } # [ doc = "Bit 2 - Capture/Compare 1 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc1ne ( & mut self ) -> CC1NE_W { CC1NE_W { w : self } } # [ doc = "Bit 3 - Capture/Compare 1 output Polarity" ]
# [ inline ( always ) ]
pub fn cc1np ( & mut self ) -> CC1NP_W { CC1NP_W { w : self } } # [ doc = "Bit 4 - Capture/Compare 2 output enable" ]
# [ inline ( always ) ]
pub fn cc2e ( & mut self ) -> CC2E_W { CC2E_W { w : self } } # [ doc = "Bit 5 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2p ( & mut self ) -> CC2P_W { CC2P_W { w : self } } # [ doc = "Bit 6 - Capture/Compare 2 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc2ne ( & mut self ) -> CC2NE_W { CC2NE_W { w : self } } # [ doc = "Bit 7 - Capture/Compare 2 output Polarity" ]
# [ inline ( always ) ]
pub fn cc2np ( & mut self ) -> CC2NP_W { CC2NP_W { w : self } } # [ doc = "Bit 8 - Capture/Compare 3 output enable" ]
# [ inline ( always ) ]
pub fn cc3e ( & mut self ) -> CC3E_W { CC3E_W { w : self } } # [ doc = "Bit 9 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3p ( & mut self ) -> CC3P_W { CC3P_W { w : self } } # [ doc = "Bit 10 - Capture/Compare 3 complementary output enable" ]
# [ inline ( always ) ]
pub fn cc3ne ( & mut self ) -> CC3NE_W { CC3NE_W { w : self } } # [ doc = "Bit 11 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc3np ( & mut self ) -> CC3NP_W { CC3NP_W { w : self } } # [ doc = "Bit 12 - Capture/Compare 4 output enable" ]
# [ inline ( always ) ]
pub fn cc4e ( & mut self ) -> CC4E_W { CC4E_W { w : self } } # [ doc = "Bit 13 - Capture/Compare 3 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4p ( & mut self ) -> CC4P_W { CC4P_W { w : self } } # [ doc = "Bit 15 - Capture/Compare 4 output Polarity" ]
# [ inline ( always ) ]
pub fn cc4np ( & mut self ) -> CC4NP_W { CC4NP_W { w : self } } # [ doc = "Bit 16 - Capture/Compare 5 output enable" ]
# [ inline ( always ) ]
pub fn cc5e ( & mut self ) -> CC5E_W { CC5E_W { w : self } } # [ doc = "Bit 17 - Capture/Compare 5 output Polarity" ]
# [ inline ( always ) ]
pub fn cc5p ( & mut self ) -> CC5P_W { CC5P_W { w : self } } # [ doc = "Bit 20 - Capture/Compare 6 output enable" ]
# [ inline ( always ) ]
pub fn cc6e ( & mut self ) -> CC6E_W { CC6E_W { w : self } } # [ doc = "Bit 21 - Capture/Compare 6 output Polarity" ]
# [ inline ( always ) ]
pub fn cc6p ( & mut self ) -> CC6P_W { CC6P_W { w : self } } } } # [ doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module" ]
pub type CNT = crate :: Reg < u32 , _CNT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CNT ; # [ doc = "`read()` method returns [cnt::R](cnt::R) reader structure" ]
impl crate :: Readable for CNT { } # [ doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure" ]
impl crate :: Writable for CNT { } # [ doc = "counter" ]
pub mod cnt { # [ doc = "Reader of register CNT" ]
pub type R = crate :: R < u32 , super :: CNT > ; # [ doc = "Writer for register CNT" ]
pub type W = crate :: W < u32 , super :: CNT > ; # [ doc = "Register CNT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CNT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CNT`" ]
pub type CNT_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CNT`" ]
pub struct CNT_W < 'a > { w : & 'a mut W , } impl < 'a > CNT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } # [ doc = "Reader of field `UIFCPY`" ]
pub type UIFCPY_R = crate :: R < bool , bool > ; impl R { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & self ) -> CNT_R { CNT_R :: new ( ( self . bits & 0xffff ) as u16 ) } # [ doc = "Bit 31 - UIF copy" ]
# [ inline ( always ) ]
pub fn uifcpy ( & self ) -> UIFCPY_R { UIFCPY_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:15 - counter value" ]
# [ inline ( always ) ]
pub fn cnt ( & mut self ) -> CNT_W { CNT_W { w : self } } } } # [ doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module" ]
pub type PSC = crate :: Reg < u32 , _PSC > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PSC ; # [ doc = "`read()` method returns [psc::R](psc::R) reader structure" ]
impl crate :: Readable for PSC { } # [ doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure" ]
impl crate :: Writable for PSC { } # [ doc = "prescaler" ]
pub mod psc { # [ doc = "Reader of register PSC" ]
pub type R = crate :: R < u32 , super :: PSC > ; # [ doc = "Writer for register PSC" ]
pub type W = crate :: W < u32 , super :: PSC > ; # [ doc = "Register PSC `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PSC { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `PSC`" ]
pub type PSC_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `PSC`" ]
pub struct PSC_W < 'a > { w : & 'a mut W , } impl < 'a > PSC_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & self ) -> PSC_R { PSC_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Prescaler value" ]
# [ inline ( always ) ]
pub fn psc ( & mut self ) -> PSC_W { PSC_W { w : self } } } } # [ doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module" ]
pub type ARR = crate :: Reg < u32 , _ARR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ARR ; # [ doc = "`read()` method returns [arr::R](arr::R) reader structure" ]
impl crate :: Readable for ARR { } # [ doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure" ]
impl crate :: Writable for ARR { } # [ doc = "auto-reload register" ]
pub mod arr { # [ doc = "Reader of register ARR" ]
pub type R = crate :: R < u32 , super :: ARR > ; # [ doc = "Writer for register ARR" ]
pub type W = crate :: W < u32 , super :: ARR > ; # [ doc = "Register ARR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ARR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ARR`" ]
pub type ARR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `ARR`" ]
pub struct ARR_W < 'a > { w : & 'a mut W , } impl < 'a > ARR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & self ) -> ARR_R { ARR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Auto-reload value" ]
# [ inline ( always ) ]
pub fn arr ( & mut self ) -> ARR_W { ARR_W { w : self } } } } # [ doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcr](rcr) module" ]
pub type RCR = crate :: Reg < u32 , _RCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RCR ; # [ doc = "`read()` method returns [rcr::R](rcr::R) reader structure" ]
impl crate :: Readable for RCR { } # [ doc = "`write(|w| ..)` method takes [rcr::W](rcr::W) writer structure" ]
impl crate :: Writable for RCR { } # [ doc = "repetition counter register" ]
pub mod rcr { # [ doc = "Reader of register RCR" ]
pub type R = crate :: R < u32 , super :: RCR > ; # [ doc = "Writer for register RCR" ]
pub type W = crate :: W < u32 , super :: RCR > ; # [ doc = "Register RCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `REP`" ]
pub type REP_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `REP`" ]
pub struct REP_W < 'a > { w : & 'a mut W , } impl < 'a > REP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Repetition counter value" ]
# [ inline ( always ) ]
pub fn rep ( & self ) -> REP_R { REP_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Repetition counter value" ]
# [ inline ( always ) ]
pub fn rep ( & mut self ) -> REP_W { REP_W { w : self } } } } # [ doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module" ]
pub type CCR = crate :: Reg < u32 , _CCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR ; # [ doc = "`read()` method returns [ccr::R](ccr::R) reader structure" ]
impl crate :: Readable for CCR { } # [ doc = "`write(|w| ..)` method takes [ccr::W](ccr::W) writer structure" ]
impl crate :: Writable for CCR { } # [ doc = "capture/compare register 1" ]
pub mod ccr { # [ doc = "Reader of register CCR%s" ]
pub type R = crate :: R < u32 , super :: CCR > ; # [ doc = "Writer for register CCR%s" ]
pub type W = crate :: W < u32 , super :: CCR > ; # [ doc = "Register CCR%s `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 1 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } } } # [ doc = "break and dead-time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdtr](bdtr) module" ]
pub type BDTR = crate :: Reg < u32 , _BDTR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BDTR ; # [ doc = "`read()` method returns [bdtr::R](bdtr::R) reader structure" ]
impl crate :: Readable for BDTR { } # [ doc = "`write(|w| ..)` method takes [bdtr::W](bdtr::W) writer structure" ]
impl crate :: Writable for BDTR { } # [ doc = "break and dead-time register" ]
pub mod bdtr { # [ doc = "Reader of register BDTR" ]
pub type R = crate :: R < u32 , super :: BDTR > ; # [ doc = "Writer for register BDTR" ]
pub type W = crate :: W < u32 , super :: BDTR > ; # [ doc = "Register BDTR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BDTR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DTG`" ]
pub type DTG_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DTG`" ]
pub struct DTG_W < 'a > { w : & 'a mut W , } impl < 'a > DTG_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Off-state selection for Idle mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OSSI_A { # [ doc = "0: When inactive, OC/OCN outputs are disabled" ]
DISABLED = 0 , # [ doc = "1: When inactive, OC/OCN outputs are forced to idle level" ]
IDLELEVEL = 1 } impl From < OSSI_A > for bool { # [ inline ( always ) ]
fn from ( variant : OSSI_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OSSI`" ]
pub type OSSI_R = crate :: R < bool , OSSI_A > ; impl OSSI_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OSSI_A { match self . bits { false => OSSI_A :: DISABLED , true => OSSI_A :: IDLELEVEL } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OSSI_A :: DISABLED } # [ doc = "Checks if the value of the field is `IDLELEVEL`" ]
# [ inline ( always ) ]
pub fn is_idle_level ( & self ) -> bool { * self == OSSI_A :: IDLELEVEL } } # [ doc = "Write proxy for field `OSSI`" ]
pub struct OSSI_W < 'a > { w : & 'a mut W , } impl < 'a > OSSI_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSSI_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "When inactive, OC/OCN outputs are disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OSSI_A :: DISABLED ) } # [ doc = "When inactive, OC/OCN outputs are forced to idle level" ]
# [ inline ( always ) ]
pub fn idle_level ( self ) -> & 'a mut W { self . variant ( OSSI_A :: IDLELEVEL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Off-state selection for Run mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OSSR_A { # [ doc = "0: When inactive, OC/OCN outputs are disabled" ]
DISABLED = 0 , # [ doc = "1: When inactive, OC/OCN outputs are enabled with their inactive level" ]
IDLELEVEL = 1 } impl From < OSSR_A > for bool { # [ inline ( always ) ]
fn from ( variant : OSSR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OSSR`" ]
pub type OSSR_R = crate :: R < bool , OSSR_A > ; impl OSSR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OSSR_A { match self . bits { false => OSSR_A :: DISABLED , true => OSSR_A :: IDLELEVEL } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OSSR_A :: DISABLED } # [ doc = "Checks if the value of the field is `IDLELEVEL`" ]
# [ inline ( always ) ]
pub fn is_idle_level ( & self ) -> bool { * self == OSSR_A :: IDLELEVEL } } # [ doc = "Write proxy for field `OSSR`" ]
pub struct OSSR_W < 'a > { w : & 'a mut W , } impl < 'a > OSSR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSSR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "When inactive, OC/OCN outputs are disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OSSR_A :: DISABLED ) } # [ doc = "When inactive, OC/OCN outputs are enabled with their inactive level" ]
# [ inline ( always ) ]
pub fn idle_level ( self ) -> & 'a mut W { self . variant ( OSSR_A :: IDLELEVEL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `BKE`" ]
pub type BKE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BKE`" ]
pub struct BKE_W < 'a > { w : & 'a mut W , } impl < 'a > BKE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Reader of field `BKP`" ]
pub type BKP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BKP`" ]
pub struct BKP_W < 'a > { w : & 'a mut W , } impl < 'a > BKP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Reader of field `AOE`" ]
pub type AOE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `AOE`" ]
pub struct AOE_W < 'a > { w : & 'a mut W , } impl < 'a > AOE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Main output enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum MOE_A { # [ doc = "0: OC/OCN are disabled or forced idle depending on OSSI" ]
DISABLEDIDLE = 0 , # [ doc = "1: OC/OCN are enabled if CCxE/CCxNE are set" ]
ENABLED = 1 } impl From < MOE_A > for bool { # [ inline ( always ) ]
fn from ( variant : MOE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `MOE`" ]
pub type MOE_R = crate :: R < bool , MOE_A > ; impl MOE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MOE_A { match self . bits { false => MOE_A :: DISABLEDIDLE , true => MOE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLEDIDLE`" ]
# [ inline ( always ) ]
pub fn is_disabled_idle ( & self ) -> bool { * self == MOE_A :: DISABLEDIDLE } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == MOE_A :: ENABLED } } # [ doc = "Write proxy for field `MOE`" ]
pub struct MOE_W < 'a > { w : & 'a mut W , } impl < 'a > MOE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MOE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "OC/OCN are disabled or forced idle depending on OSSI" ]
# [ inline ( always ) ]
pub fn disabled_idle ( self ) -> & 'a mut W { self . variant ( MOE_A :: DISABLEDIDLE ) } # [ doc = "OC/OCN are enabled if CCxE/CCxNE are set" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( MOE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `BKF`" ]
pub type BKF_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BKF`" ]
pub struct BKF_W < 'a > { w : & 'a mut W , } impl < 'a > BKF_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Reader of field `BK2F`" ]
pub type BK2F_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `BK2F`" ]
pub struct BK2F_W < 'a > { w : & 'a mut W , } impl < 'a > BK2F_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Reader of field `BK2E`" ]
pub type BK2E_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BK2E`" ]
pub struct BK2E_W < 'a > { w : & 'a mut W , } impl < 'a > BK2E_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `BK2P`" ]
pub type BK2P_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BK2P`" ]
pub struct BK2P_W < 'a > { w : & 'a mut W , } impl < 'a > BK2P_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } impl R { # [ doc = "Bits 0:7 - Dead-time generator setup" ]
# [ inline ( always ) ]
pub fn dtg ( & self ) -> DTG_R { DTG_R :: new ( ( self . bits & 0xff ) as u8 ) } # [ doc = "Bits 8:9 - Lock configuration" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bit 10 - Off-state selection for Idle mode" ]
# [ inline ( always ) ]
pub fn ossi ( & self ) -> OSSI_R { OSSI_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Off-state selection for Run mode" ]
# [ inline ( always ) ]
pub fn ossr ( & self ) -> OSSR_R { OSSR_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Break enable" ]
# [ inline ( always ) ]
pub fn bke ( & self ) -> BKE_R { BKE_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Break polarity" ]
# [ inline ( always ) ]
pub fn bkp ( & self ) -> BKP_R { BKP_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Automatic output enable" ]
# [ inline ( always ) ]
pub fn aoe ( & self ) -> AOE_R { AOE_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Main output enable" ]
# [ inline ( always ) ]
pub fn moe ( & self ) -> MOE_R { MOE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:19 - Break filter" ]
# [ inline ( always ) ]
pub fn bkf ( & self ) -> BKF_R { BKF_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Break 2 filter" ]
# [ inline ( always ) ]
pub fn bk2f ( & self ) -> BK2F_R { BK2F_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bit 24 - Break 2 enable" ]
# [ inline ( always ) ]
pub fn bk2e ( & self ) -> BK2E_R { BK2E_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Break 2 polarity" ]
# [ inline ( always ) ]
pub fn bk2p ( & self ) -> BK2P_R { BK2P_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:7 - Dead-time generator setup" ]
# [ inline ( always ) ]
pub fn dtg ( & mut self ) -> DTG_W { DTG_W { w : self } } # [ doc = "Bits 8:9 - Lock configuration" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } # [ doc = "Bit 10 - Off-state selection for Idle mode" ]
# [ inline ( always ) ]
pub fn ossi ( & mut self ) -> OSSI_W { OSSI_W { w : self } } # [ doc = "Bit 11 - Off-state selection for Run mode" ]
# [ inline ( always ) ]
pub fn ossr ( & mut self ) -> OSSR_W { OSSR_W { w : self } } # [ doc = "Bit 12 - Break enable" ]
# [ inline ( always ) ]
pub fn bke ( & mut self ) -> BKE_W { BKE_W { w : self } } # [ doc = "Bit 13 - Break polarity" ]
# [ inline ( always ) ]
pub fn bkp ( & mut self ) -> BKP_W { BKP_W { w : self } } # [ doc = "Bit 14 - Automatic output enable" ]
# [ inline ( always ) ]
pub fn aoe ( & mut self ) -> AOE_W { AOE_W { w : self } } # [ doc = "Bit 15 - Main output enable" ]
# [ inline ( always ) ]
pub fn moe ( & mut self ) -> MOE_W { MOE_W { w : self } } # [ doc = "Bits 16:19 - Break filter" ]
# [ inline ( always ) ]
pub fn bkf ( & mut self ) -> BKF_W { BKF_W { w : self } } # [ doc = "Bits 20:23 - Break 2 filter" ]
# [ inline ( always ) ]
pub fn bk2f ( & mut self ) -> BK2F_W { BK2F_W { w : self } } # [ doc = "Bit 24 - Break 2 enable" ]
# [ inline ( always ) ]
pub fn bk2e ( & mut self ) -> BK2E_W { BK2E_W { w : self } } # [ doc = "Bit 25 - Break 2 polarity" ]
# [ inline ( always ) ]
pub fn bk2p ( & mut self ) -> BK2P_W { BK2P_W { w : self } } } } # [ doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module" ]
pub type DCR = crate :: Reg < u32 , _DCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DCR ; # [ doc = "`read()` method returns [dcr::R](dcr::R) reader structure" ]
impl crate :: Readable for DCR { } # [ doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure" ]
impl crate :: Writable for DCR { } # [ doc = "DMA control register" ]
pub mod dcr { # [ doc = "Reader of register DCR" ]
pub type R = crate :: R < u32 , super :: DCR > ; # [ doc = "Writer for register DCR" ]
pub type W = crate :: W < u32 , super :: DCR > ; # [ doc = "Register DCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DBL`" ]
pub type DBL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBL`" ]
pub struct DBL_W < 'a > { w : & 'a mut W , } impl < 'a > DBL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 8 ) ) | ( ( ( value as u32 ) & 0x1f ) << 8 ) ; self . w } } # [ doc = "Reader of field `DBA`" ]
pub type DBA_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DBA`" ]
pub struct DBA_W < 'a > { w : & 'a mut W , } impl < 'a > DBA_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & self ) -> DBL_R { DBL_R :: new ( ( ( self . bits >> 8 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & self ) -> DBA_R { DBA_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 8:12 - DMA burst length" ]
# [ inline ( always ) ]
pub fn dbl ( & mut self ) -> DBL_W { DBL_W { w : self } } # [ doc = "Bits 0:4 - DMA base address" ]
# [ inline ( always ) ]
pub fn dba ( & mut self ) -> DBA_W { DBA_W { w : self } } } } # [ doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module" ]
pub type DMAR = crate :: Reg < u32 , _DMAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DMAR ; # [ doc = "`read()` method returns [dmar::R](dmar::R) reader structure" ]
impl crate :: Readable for DMAR { } # [ doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure" ]
impl crate :: Writable for DMAR { } # [ doc = "DMA address for full transfer" ]
pub mod dmar { # [ doc = "Reader of register DMAR" ]
pub type R = crate :: R < u32 , super :: DMAR > ; # [ doc = "Writer for register DMAR" ]
pub type W = crate :: W < u32 , super :: DMAR > ; # [ doc = "Register DMAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DMAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DMAB`" ]
pub type DMAB_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `DMAB`" ]
pub struct DMAB_W < 'a > { w : & 'a mut W , } impl < 'a > DMAB_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & self ) -> DMAB_R { DMAB_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - DMA register for burst accesses" ]
# [ inline ( always ) ]
pub fn dmab ( & mut self ) -> DMAB_W { DMAB_W { w : self } } } } # [ doc = "capture/compare mode register 3 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr3_output](ccmr3_output) module" ]
pub type CCMR3_OUTPUT = crate :: Reg < u32 , _CCMR3_OUTPUT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCMR3_OUTPUT ; # [ doc = "`read()` method returns [ccmr3_output::R](ccmr3_output::R) reader structure" ]
impl crate :: Readable for CCMR3_OUTPUT { } # [ doc = "`write(|w| ..)` method takes [ccmr3_output::W](ccmr3_output::W) writer structure" ]
impl crate :: Writable for CCMR3_OUTPUT { } # [ doc = "capture/compare mode register 3 (output mode)" ]
pub mod ccmr3_output { # [ doc = "Reader of register CCMR3_Output" ]
pub type R = crate :: R < u32 , super :: CCMR3_OUTPUT > ; # [ doc = "Writer for register CCMR3_Output" ]
pub type W = crate :: W < u32 , super :: CCMR3_OUTPUT > ; # [ doc = "Register CCMR3_Output `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCMR3_OUTPUT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OC5FE`" ]
pub type OC5FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC5FE`" ]
pub struct OC5FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC5FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `OC5PE`" ]
pub type OC5PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC5PE`" ]
pub struct OC5PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC5PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `OC5M`" ]
pub type OC5M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC5M`" ]
pub struct OC5M_W < 'a > { w : & 'a mut W , } impl < 'a > OC5M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `OC5CE`" ]
pub type OC5CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC5CE`" ]
pub struct OC5CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC5CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `OC6FE`" ]
pub type OC6FE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC6FE`" ]
pub struct OC6FE_W < 'a > { w : & 'a mut W , } impl < 'a > OC6FE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Reader of field `OC6PE`" ]
pub type OC6PE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC6PE`" ]
pub struct OC6PE_W < 'a > { w : & 'a mut W , } impl < 'a > OC6PE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `OC6M`" ]
pub type OC6M_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OC6M`" ]
pub struct OC6M_W < 'a > { w : & 'a mut W , } impl < 'a > OC6M_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "Reader of field `OC6CE`" ]
pub type OC6CE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC6CE`" ]
pub struct OC6CE_W < 'a > { w : & 'a mut W , } impl < 'a > OC6CE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `OC5M_3`" ]
pub type OC5M_3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC5M_3`" ]
pub struct OC5M_3_W < 'a > { w : & 'a mut W , } impl < 'a > OC5M_3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Reader of field `OC6M_3`" ]
pub type OC6M_3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OC6M_3`" ]
pub struct OC6M_3_W < 'a > { w : & 'a mut W , } impl < 'a > OC6M_3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } impl R { # [ doc = "Bit 2 - Output compare 5 fast enable" ]
# [ inline ( always ) ]
pub fn oc5fe ( & self ) -> OC5FE_R { OC5FE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Output compare 5 preload enable" ]
# [ inline ( always ) ]
pub fn oc5pe ( & self ) -> OC5PE_R { OC5PE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Output compare 5 mode" ]
# [ inline ( always ) ]
pub fn oc5m ( & self ) -> OC5M_R { OC5M_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 7 - Output compare 5 clear enable" ]
# [ inline ( always ) ]
pub fn oc5ce ( & self ) -> OC5CE_R { OC5CE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Output compare 6 fast enable" ]
# [ inline ( always ) ]
pub fn oc6fe ( & self ) -> OC6FE_R { OC6FE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Output compare 6 preload enable" ]
# [ inline ( always ) ]
pub fn oc6pe ( & self ) -> OC6PE_R { OC6PE_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:14 - Output compare 6 mode" ]
# [ inline ( always ) ]
pub fn oc6m ( & self ) -> OC6M_R { OC6M_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bit 15 - Output compare 6 clear enable" ]
# [ inline ( always ) ]
pub fn oc6ce ( & self ) -> OC6CE_R { OC6CE_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Outout Compare 5 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc5m_3 ( & self ) -> OC5M_3_R { OC5M_3_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Outout Compare 6 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc6m_3 ( & self ) -> OC6M_3_R { OC6M_3_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 2 - Output compare 5 fast enable" ]
# [ inline ( always ) ]
pub fn oc5fe ( & mut self ) -> OC5FE_W { OC5FE_W { w : self } } # [ doc = "Bit 3 - Output compare 5 preload enable" ]
# [ inline ( always ) ]
pub fn oc5pe ( & mut self ) -> OC5PE_W { OC5PE_W { w : self } } # [ doc = "Bits 4:6 - Output compare 5 mode" ]
# [ inline ( always ) ]
pub fn oc5m ( & mut self ) -> OC5M_W { OC5M_W { w : self } } # [ doc = "Bit 7 - Output compare 5 clear enable" ]
# [ inline ( always ) ]
pub fn oc5ce ( & mut self ) -> OC5CE_W { OC5CE_W { w : self } } # [ doc = "Bit 10 - Output compare 6 fast enable" ]
# [ inline ( always ) ]
pub fn oc6fe ( & mut self ) -> OC6FE_W { OC6FE_W { w : self } } # [ doc = "Bit 11 - Output compare 6 preload enable" ]
# [ inline ( always ) ]
pub fn oc6pe ( & mut self ) -> OC6PE_W { OC6PE_W { w : self } } # [ doc = "Bits 12:14 - Output compare 6 mode" ]
# [ inline ( always ) ]
pub fn oc6m ( & mut self ) -> OC6M_W { OC6M_W { w : self } } # [ doc = "Bit 15 - Output compare 6 clear enable" ]
# [ inline ( always ) ]
pub fn oc6ce ( & mut self ) -> OC6CE_W { OC6CE_W { w : self } } # [ doc = "Bit 16 - Outout Compare 5 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc5m_3 ( & mut self ) -> OC5M_3_W { OC5M_3_W { w : self } } # [ doc = "Bit 24 - Outout Compare 6 mode bit 3" ]
# [ inline ( always ) ]
pub fn oc6m_3 ( & mut self ) -> OC6M_3_W { OC6M_3_W { w : self } } } } # [ doc = "capture/compare register 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr5](ccr5) module" ]
pub type CCR5 = crate :: Reg < u32 , _CCR5 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR5 ; # [ doc = "`read()` method returns [ccr5::R](ccr5::R) reader structure" ]
impl crate :: Readable for CCR5 { } # [ doc = "`write(|w| ..)` method takes [ccr5::W](ccr5::W) writer structure" ]
impl crate :: Writable for CCR5 { } # [ doc = "capture/compare register 5" ]
pub mod ccr5 { # [ doc = "Reader of register CCR5" ]
pub type R = crate :: R < u32 , super :: CCR5 > ; # [ doc = "Writer for register CCR5" ]
pub type W = crate :: W < u32 , super :: CCR5 > ; # [ doc = "Register CCR5 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR5 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } # [ doc = "Reader of field `GC5C1`" ]
pub type GC5C1_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `GC5C1`" ]
pub struct GC5C1_W < 'a > { w : & 'a mut W , } impl < 'a > GC5C1_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `GC5C2`" ]
pub type GC5C2_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `GC5C2`" ]
pub struct GC5C2_W < 'a > { w : & 'a mut W , } impl < 'a > GC5C2_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `GC5C3`" ]
pub type GC5C3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `GC5C3`" ]
pub struct GC5C3_W < 'a > { w : & 'a mut W , } impl < 'a > GC5C3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 5 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff ) as u16 ) } # [ doc = "Bit 29 - Group Channel 5 and Channel 1" ]
# [ inline ( always ) ]
pub fn gc5c1 ( & self ) -> GC5C1_R { GC5C1_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Group Channel 5 and Channel 2" ]
# [ inline ( always ) ]
pub fn gc5c2 ( & self ) -> GC5C2_R { GC5C2_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Group Channel 5 and Channel 3" ]
# [ inline ( always ) ]
pub fn gc5c3 ( & self ) -> GC5C3_R { GC5C3_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 5 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } # [ doc = "Bit 29 - Group Channel 5 and Channel 1" ]
# [ inline ( always ) ]
pub fn gc5c1 ( & mut self ) -> GC5C1_W { GC5C1_W { w : self } } # [ doc = "Bit 30 - Group Channel 5 and Channel 2" ]
# [ inline ( always ) ]
pub fn gc5c2 ( & mut self ) -> GC5C2_W { GC5C2_W { w : self } } # [ doc = "Bit 31 - Group Channel 5 and Channel 3" ]
# [ inline ( always ) ]
pub fn gc5c3 ( & mut self ) -> GC5C3_W { GC5C3_W { w : self } } } } # [ doc = "capture/compare register 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr6](ccr6) module" ]
pub type CCR6 = crate :: Reg < u32 , _CCR6 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR6 ; # [ doc = "`read()` method returns [ccr6::R](ccr6::R) reader structure" ]
impl crate :: Readable for CCR6 { } # [ doc = "`write(|w| ..)` method takes [ccr6::W](ccr6::W) writer structure" ]
impl crate :: Writable for CCR6 { } # [ doc = "capture/compare register 6" ]
pub mod ccr6 { # [ doc = "Reader of register CCR6" ]
pub type R = crate :: R < u32 , super :: CCR6 > ; # [ doc = "Writer for register CCR6" ]
pub type W = crate :: W < u32 , super :: CCR6 > ; # [ doc = "Register CCR6 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR6 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CCR`" ]
pub type CCR_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `CCR`" ]
pub struct CCR_W < 'a > { w : & 'a mut W , } impl < 'a > CCR_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xffff ) | ( ( value as u32 ) & 0xffff ) ; self . w } } impl R { # [ doc = "Bits 0:15 - Capture/Compare 6 value" ]
# [ inline ( always ) ]
pub fn ccr ( & self ) -> CCR_R { CCR_R :: new ( ( self . bits & 0xffff ) as u16 ) } } impl W { # [ doc = "Bits 0:15 - Capture/Compare 6 value" ]
# [ inline ( always ) ]
pub fn ccr ( & mut self ) -> CCR_W { CCR_W { w : self } } } } # [ doc = "option registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [or](or) module" ]
pub type OR = crate :: Reg < u32 , _OR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OR ; # [ doc = "`read()` method returns [or::R](or::R) reader structure" ]
impl crate :: Readable for OR { } # [ doc = "`write(|w| ..)` method takes [or::W](or::W) writer structure" ]
impl crate :: Writable for OR { } # [ doc = "option registers" ]
pub mod or { # [ doc = "Reader of register OR" ]
pub type R = crate :: R < u32 , super :: OR > ; # [ doc = "Writer for register OR" ]
pub type W = crate :: W < u32 , super :: OR > ; # [ doc = "Register OR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TIM1_ETR_ADC1_RMP`" ]
pub type TIM1_ETR_ADC1_RMP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TIM1_ETR_ADC1_RMP`" ]
pub struct TIM1_ETR_ADC1_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > TIM1_ETR_ADC1_RMP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } # [ doc = "Reader of field `TIM1_ETR_ADC4_RMP`" ]
pub type TIM1_ETR_ADC4_RMP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TIM1_ETR_ADC4_RMP`" ]
pub struct TIM1_ETR_ADC4_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > TIM1_ETR_ADC4_RMP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } impl R { # [ doc = "Bits 0:1 - TIM1_ETR_ADC1 remapping capability" ]
# [ inline ( always ) ]
pub fn tim1_etr_adc1_rmp ( & self ) -> TIM1_ETR_ADC1_RMP_R { TIM1_ETR_ADC1_RMP_R :: new ( ( self . bits & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - TIM1_ETR_ADC4 remapping capability" ]
# [ inline ( always ) ]
pub fn tim1_etr_adc4_rmp ( & self ) -> TIM1_ETR_ADC4_RMP_R { TIM1_ETR_ADC4_RMP_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 0:1 - TIM1_ETR_ADC1 remapping capability" ]
# [ inline ( always ) ]
pub fn tim1_etr_adc1_rmp ( & mut self ) -> TIM1_ETR_ADC1_RMP_W { TIM1_ETR_ADC1_RMP_W { w : self } } # [ doc = "Bits 2:3 - TIM1_ETR_ADC4 remapping capability" ]
# [ inline ( always ) ]
pub fn tim1_etr_adc4_rmp ( & mut self ) -> TIM1_ETR_ADC4_RMP_W { TIM1_ETR_ADC4_RMP_W { w : self } } } } } # [ doc = "Advanced timer" ]
pub struct TIM8 { _marker : PhantomData < * const ( ) > } unsafe impl Send for TIM8 { } impl TIM8 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const tim1 :: RegisterBlock { 0x4001_3400 as * const _ } } impl Deref for TIM8 { type Target = tim1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * TIM8 :: ptr ( ) } } } # [ doc = "System configuration controller" ]
pub struct SYSCFG { _marker : PhantomData < * const ( ) > } unsafe impl Send for SYSCFG { } impl SYSCFG { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const syscfg :: RegisterBlock { 0x4001_0000 as * const _ } } impl Deref for SYSCFG { type Target = syscfg :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SYSCFG :: ptr ( ) } } } # [ doc = "System configuration controller" ]
pub mod syscfg { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - configuration register 1" ]
pub cfgr1 : CFGR1 , # [ doc = "0x04 - CCM SRAM protection register" ]
pub rcr : RCR , # [ doc = "0x08 - external interrupt configuration register 1" ]
pub exticr1 : EXTICR1 , # [ doc = "0x0c - external interrupt configuration register 2" ]
pub exticr2 : EXTICR2 , # [ doc = "0x10 - external interrupt configuration register 3" ]
pub exticr3 : EXTICR3 , # [ doc = "0x14 - external interrupt configuration register 4" ]
pub exticr4 : EXTICR4 , # [ doc = "0x18 - configuration register 2" ]
pub cfgr2 : CFGR2 , _reserved7 : [ u8 ; 44usize ]
, # [ doc = "0x48 - configuration register 4" ]
pub cfgr4 : CFGR4 , _reserved8 : [ u8 ; 4usize ]
, # [ doc = "0x50 - configuration register 3" ]
pub cfgr3 : CFGR3 , } # [ doc = "configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr1](cfgr1) module" ]
pub type CFGR1 = crate :: Reg < u32 , _CFGR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR1 ; # [ doc = "`read()` method returns [cfgr1::R](cfgr1::R) reader structure" ]
impl crate :: Readable for CFGR1 { } # [ doc = "`write(|w| ..)` method takes [cfgr1::W](cfgr1::W) writer structure" ]
impl crate :: Writable for CFGR1 { } # [ doc = "configuration register 1" ]
pub mod cfgr1 { # [ doc = "Reader of register CFGR1" ]
pub type R = crate :: R < u32 , super :: CFGR1 > ; # [ doc = "Writer for register CFGR1" ]
pub type W = crate :: W < u32 , super :: CFGR1 > ; # [ doc = "Register CFGR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Memory mapping selection bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MEM_MODE_A { # [ doc = "0: Main Flash memory mapped at 0x0000_0000" ]
MAINFLASH = 0 , # [ doc = "1: System Flash memory mapped at 0x0000_0000" ]
SYSTEMFLASH = 1 , # [ doc = "3: Embedded SRAM mapped at 0x0000_0000" ]
SRAM = 3 , # [ doc = "4: FMC Bank (Only the first  two banks) (Available on STM32F303xD/E only)" ]
FMC = 4 } impl From < MEM_MODE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MEM_MODE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MEM_MODE`" ]
pub type MEM_MODE_R = crate :: R < u8 , MEM_MODE_A > ; impl MEM_MODE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , MEM_MODE_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( MEM_MODE_A :: MAINFLASH ) , 1 => Val ( MEM_MODE_A :: SYSTEMFLASH ) , 3 => Val ( MEM_MODE_A :: SRAM ) , 4 => Val ( MEM_MODE_A :: FMC ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MAINFLASH`" ]
# [ inline ( always ) ]
pub fn is_main_flash ( & self ) -> bool { * self == MEM_MODE_A :: MAINFLASH } # [ doc = "Checks if the value of the field is `SYSTEMFLASH`" ]
# [ inline ( always ) ]
pub fn is_system_flash ( & self ) -> bool { * self == MEM_MODE_A :: SYSTEMFLASH } # [ doc = "Checks if the value of the field is `SRAM`" ]
# [ inline ( always ) ]
pub fn is_sram ( & self ) -> bool { * self == MEM_MODE_A :: SRAM } # [ doc = "Checks if the value of the field is `FMC`" ]
# [ inline ( always ) ]
pub fn is_fmc ( & self ) -> bool { * self == MEM_MODE_A :: FMC } } # [ doc = "Write proxy for field `MEM_MODE`" ]
pub struct MEM_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > MEM_MODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MEM_MODE_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Main Flash memory mapped at 0x0000_0000" ]
# [ inline ( always ) ]
pub fn main_flash ( self ) -> & 'a mut W { self . variant ( MEM_MODE_A :: MAINFLASH ) } # [ doc = "System Flash memory mapped at 0x0000_0000" ]
# [ inline ( always ) ]
pub fn system_flash ( self ) -> & 'a mut W { self . variant ( MEM_MODE_A :: SYSTEMFLASH ) } # [ doc = "Embedded SRAM mapped at 0x0000_0000" ]
# [ inline ( always ) ]
pub fn sram ( self ) -> & 'a mut W { self . variant ( MEM_MODE_A :: SRAM ) } # [ doc = "FMC Bank (Only the first two banks) (Available on STM32F303xD/E only)" ]
# [ inline ( always ) ]
pub fn fmc ( self ) -> & 'a mut W { self . variant ( MEM_MODE_A :: FMC ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } # [ doc = "USB interrupt remap\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum USB_IT_RMP_A { # [ doc = "0: USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt lines 19, 20 and 42 respectively" ]
NOTREMAPPED = 0 , # [ doc = "1: USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt lines 74, 75 and 76 respectively" ]
REMAPPED = 1 } impl From < USB_IT_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : USB_IT_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `USB_IT_RMP`" ]
pub type USB_IT_RMP_R = crate :: R < bool , USB_IT_RMP_A > ; impl USB_IT_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> USB_IT_RMP_A { match self . bits { false => USB_IT_RMP_A :: NOTREMAPPED , true => USB_IT_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == USB_IT_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == USB_IT_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `USB_IT_RMP`" ]
pub struct USB_IT_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > USB_IT_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USB_IT_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt lines 19, 20 and 42 respectively" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( USB_IT_RMP_A :: NOTREMAPPED ) } # [ doc = "USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt lines 74, 75 and 76 respectively" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( USB_IT_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Timer 1 ITR3 selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM1_ITR3_RMP_A { # [ doc = "0: TIM1_ITR3 = TIM4_TRGO in STM32F303xB/C and STM32F358xC devices" ]
NOTREMAPPED = 0 , # [ doc = "1: TIM1_ITR3 = TIM17_OC" ]
REMAPPED = 1 } impl From < TIM1_ITR3_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM1_ITR3_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM1_ITR3_RMP`" ]
pub type TIM1_ITR3_RMP_R = crate :: R < bool , TIM1_ITR3_RMP_A > ; impl TIM1_ITR3_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIM1_ITR3_RMP_A { match self . bits { false => TIM1_ITR3_RMP_A :: NOTREMAPPED , true => TIM1_ITR3_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == TIM1_ITR3_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == TIM1_ITR3_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `TIM1_ITR3_RMP`" ]
pub struct TIM1_ITR3_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > TIM1_ITR3_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM1_ITR3_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIM1_ITR3 = TIM4_TRGO in STM32F303xB/C and STM32F358xC devices" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( TIM1_ITR3_RMP_A :: NOTREMAPPED ) } # [ doc = "TIM1_ITR3 = TIM17_OC" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( TIM1_ITR3_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "DAC trigger remap (when TSEL = 001)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DAC1_TRIG_RMP_A { # [ doc = "0: DAC trigger is TIM8_TRGO in STM32F303xB/C and STM32F358xC devices" ]
NOTREMAPPED = 0 , # [ doc = "1: DAC trigger is TIM3_TRGO" ]
REMAPPED = 1 } impl From < DAC1_TRIG_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : DAC1_TRIG_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DAC1_TRIG_RMP`" ]
pub type DAC1_TRIG_RMP_R = crate :: R < bool , DAC1_TRIG_RMP_A > ; impl DAC1_TRIG_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DAC1_TRIG_RMP_A { match self . bits { false => DAC1_TRIG_RMP_A :: NOTREMAPPED , true => DAC1_TRIG_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == DAC1_TRIG_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == DAC1_TRIG_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `DAC1_TRIG_RMP`" ]
pub struct DAC1_TRIG_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > DAC1_TRIG_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DAC1_TRIG_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DAC trigger is TIM8_TRGO in STM32F303xB/C and STM32F358xC devices" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( DAC1_TRIG_RMP_A :: NOTREMAPPED ) } # [ doc = "DAC trigger is TIM3_TRGO" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( DAC1_TRIG_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "ADC24 DMA remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC2_DMA_RMP_A { # [ doc = "0: ADC24 DMA requests mapped on DMA2 channels 1 and 2" ]
NOTREMAPPED = 0 , # [ doc = "1: ADC24 DMA requests mapped on DMA2 channels 3 and 4" ]
REMAPPED = 1 } impl From < ADC2_DMA_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC2_DMA_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC2_DMA_RMP`" ]
pub type ADC2_DMA_RMP_R = crate :: R < bool , ADC2_DMA_RMP_A > ; impl ADC2_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC2_DMA_RMP_A { match self . bits { false => ADC2_DMA_RMP_A :: NOTREMAPPED , true => ADC2_DMA_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == ADC2_DMA_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == ADC2_DMA_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `ADC2_DMA_RMP`" ]
pub struct ADC2_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC2_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC2_DMA_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ADC24 DMA requests mapped on DMA2 channels 1 and 2" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( ADC2_DMA_RMP_A :: NOTREMAPPED ) } # [ doc = "ADC24 DMA requests mapped on DMA2 channels 3 and 4" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( ADC2_DMA_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "TIM16 DMA request remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM16_DMA_RMP_A { # [ doc = "0: TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 3" ]
NOTREMAPPED = 0 , # [ doc = "1: TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 4" ]
REMAPPED = 1 } impl From < TIM16_DMA_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM16_DMA_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM16_DMA_RMP`" ]
pub type TIM16_DMA_RMP_R = crate :: R < bool , TIM16_DMA_RMP_A > ; impl TIM16_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIM16_DMA_RMP_A { match self . bits { false => TIM16_DMA_RMP_A :: NOTREMAPPED , true => TIM16_DMA_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == TIM16_DMA_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == TIM16_DMA_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `TIM16_DMA_RMP`" ]
pub struct TIM16_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > TIM16_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM16_DMA_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 3" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( TIM16_DMA_RMP_A :: NOTREMAPPED ) } # [ doc = "TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 4" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( TIM16_DMA_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "TIM17 DMA request remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM17_DMA_RMP_A { # [ doc = "0: TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 1" ]
NOTREMAPPED = 0 , # [ doc = "1: TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 2" ]
REMAPPED = 1 } impl From < TIM17_DMA_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM17_DMA_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM17_DMA_RMP`" ]
pub type TIM17_DMA_RMP_R = crate :: R < bool , TIM17_DMA_RMP_A > ; impl TIM17_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIM17_DMA_RMP_A { match self . bits { false => TIM17_DMA_RMP_A :: NOTREMAPPED , true => TIM17_DMA_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == TIM17_DMA_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == TIM17_DMA_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `TIM17_DMA_RMP`" ]
pub struct TIM17_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > TIM17_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM17_DMA_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 1" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( TIM17_DMA_RMP_A :: NOTREMAPPED ) } # [ doc = "TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 2" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( TIM17_DMA_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "TIM6 and DAC1 DMA request remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM6_DAC1_CH1_DMA_RMP_A { # [ doc = "0: TIM6_UP and DAC_CH1 DMA requests mapped on DMA2 channel 3 in STM32F303xB/C and STM32F358xC" ]
NOTREMAPPED = 0 , # [ doc = "1: TIM6_UP and DAC_CH1 DMA requests mapped on DMA1 channel 3" ]
REMAPPED = 1 } impl From < TIM6_DAC1_CH1_DMA_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM6_DAC1_CH1_DMA_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM6_DAC1_CH1_DMA_RMP`" ]
pub type TIM6_DAC1_CH1_DMA_RMP_R = crate :: R < bool , TIM6_DAC1_CH1_DMA_RMP_A > ; impl TIM6_DAC1_CH1_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIM6_DAC1_CH1_DMA_RMP_A { match self . bits { false => TIM6_DAC1_CH1_DMA_RMP_A :: NOTREMAPPED , true => TIM6_DAC1_CH1_DMA_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == TIM6_DAC1_CH1_DMA_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == TIM6_DAC1_CH1_DMA_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `TIM6_DAC1_CH1_DMA_RMP`" ]
pub struct TIM6_DAC1_CH1_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > TIM6_DAC1_CH1_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM6_DAC1_CH1_DMA_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIM6_UP and DAC_CH1 DMA requests mapped on DMA2 channel 3 in STM32F303xB/C and STM32F358xC" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( TIM6_DAC1_CH1_DMA_RMP_A :: NOTREMAPPED ) } # [ doc = "TIM6_UP and DAC_CH1 DMA requests mapped on DMA1 channel 3" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( TIM6_DAC1_CH1_DMA_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "TIM7 and DAC2 DMA request remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TIM7_DAC1_CH2_DMA_RMP_A { # [ doc = "0: TIM7_UP and DAC_CH2 DMA requests mapped on DMA2 channel 4 in STM32F303xB/C and STM32F358xC devices" ]
NOTREMAPPED = 0 , # [ doc = "1: TIM7_UP and DAC_CH2 DMA requests mapped on DMA1 channel 4" ]
REMAPPED = 1 } impl From < TIM7_DAC1_CH2_DMA_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : TIM7_DAC1_CH2_DMA_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TIM7_DAC1_CH2_DMA_RMP`" ]
pub type TIM7_DAC1_CH2_DMA_RMP_R = crate :: R < bool , TIM7_DAC1_CH2_DMA_RMP_A > ; impl TIM7_DAC1_CH2_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TIM7_DAC1_CH2_DMA_RMP_A { match self . bits { false => TIM7_DAC1_CH2_DMA_RMP_A :: NOTREMAPPED , true => TIM7_DAC1_CH2_DMA_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == TIM7_DAC1_CH2_DMA_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == TIM7_DAC1_CH2_DMA_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `TIM7_DAC1_CH2_DMA_RMP`" ]
pub struct TIM7_DAC1_CH2_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > TIM7_DAC1_CH2_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TIM7_DAC1_CH2_DMA_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "TIM7_UP and DAC_CH2 DMA requests mapped on DMA2 channel 4 in STM32F303xB/C and STM32F358xC devices" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( TIM7_DAC1_CH2_DMA_RMP_A :: NOTREMAPPED ) } # [ doc = "TIM7_UP and DAC_CH2 DMA requests mapped on DMA1 channel 4" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( TIM7_DAC1_CH2_DMA_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Fast Mode Plus (FM+) driving capability activation bits.\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C_PB6_FMP_A { # [ doc = "0: PB6 pin operate in standard mode" ]
STANDARD = 0 , # [ doc = "1: I2C FM+ mode enabled on PB6 and the Speed control is bypassed" ]
FMP = 1 } impl From < I2C_PB6_FMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C_PB6_FMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C_PB6_FMP`" ]
pub type I2C_PB6_FMP_R = crate :: R < bool , I2C_PB6_FMP_A > ; impl I2C_PB6_FMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C_PB6_FMP_A { match self . bits { false => I2C_PB6_FMP_A :: STANDARD , true => I2C_PB6_FMP_A :: FMP } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == I2C_PB6_FMP_A :: STANDARD } # [ doc = "Checks if the value of the field is `FMP`" ]
# [ inline ( always ) ]
pub fn is_fmp ( & self ) -> bool { * self == I2C_PB6_FMP_A :: FMP } } # [ doc = "Write proxy for field `I2C_PB6_FMP`" ]
pub struct I2C_PB6_FMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C_PB6_FMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C_PB6_FMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PB6 pin operate in standard mode" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( I2C_PB6_FMP_A :: STANDARD ) } # [ doc = "I2C FM+ mode enabled on PB6 and the Speed control is bypassed" ]
# [ inline ( always ) ]
pub fn fmp ( self ) -> & 'a mut W { self . variant ( I2C_PB6_FMP_A :: FMP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Fast Mode Plus (FM+) driving capability activation bits.\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C_PB7_FMP_A { # [ doc = "0: PB7 pin operate in standard mode" ]
STANDARD = 0 , # [ doc = "1: I2C FM+ mode enabled on PB7 and the Speed control is bypassed" ]
FMP = 1 } impl From < I2C_PB7_FMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C_PB7_FMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C_PB7_FMP`" ]
pub type I2C_PB7_FMP_R = crate :: R < bool , I2C_PB7_FMP_A > ; impl I2C_PB7_FMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C_PB7_FMP_A { match self . bits { false => I2C_PB7_FMP_A :: STANDARD , true => I2C_PB7_FMP_A :: FMP } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == I2C_PB7_FMP_A :: STANDARD } # [ doc = "Checks if the value of the field is `FMP`" ]
# [ inline ( always ) ]
pub fn is_fmp ( & self ) -> bool { * self == I2C_PB7_FMP_A :: FMP } } # [ doc = "Write proxy for field `I2C_PB7_FMP`" ]
pub struct I2C_PB7_FMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C_PB7_FMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C_PB7_FMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PB7 pin operate in standard mode" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( I2C_PB7_FMP_A :: STANDARD ) } # [ doc = "I2C FM+ mode enabled on PB7 and the Speed control is bypassed" ]
# [ inline ( always ) ]
pub fn fmp ( self ) -> & 'a mut W { self . variant ( I2C_PB7_FMP_A :: FMP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Fast Mode Plus (FM+) driving capability activation bits.\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C_PB8_FMP_A { # [ doc = "0: PB8 pin operate in standard mode" ]
STANDARD = 0 , # [ doc = "1: I2C FM+ mode enabled on PB8 and the Speed control is bypassed" ]
FMP = 1 } impl From < I2C_PB8_FMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C_PB8_FMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C_PB8_FMP`" ]
pub type I2C_PB8_FMP_R = crate :: R < bool , I2C_PB8_FMP_A > ; impl I2C_PB8_FMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C_PB8_FMP_A { match self . bits { false => I2C_PB8_FMP_A :: STANDARD , true => I2C_PB8_FMP_A :: FMP } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == I2C_PB8_FMP_A :: STANDARD } # [ doc = "Checks if the value of the field is `FMP`" ]
# [ inline ( always ) ]
pub fn is_fmp ( & self ) -> bool { * self == I2C_PB8_FMP_A :: FMP } } # [ doc = "Write proxy for field `I2C_PB8_FMP`" ]
pub struct I2C_PB8_FMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C_PB8_FMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C_PB8_FMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PB8 pin operate in standard mode" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( I2C_PB8_FMP_A :: STANDARD ) } # [ doc = "I2C FM+ mode enabled on PB8 and the Speed control is bypassed" ]
# [ inline ( always ) ]
pub fn fmp ( self ) -> & 'a mut W { self . variant ( I2C_PB8_FMP_A :: FMP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Fast Mode Plus (FM+) driving capability activation bits.\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C_PB9_FMP_A { # [ doc = "0: PB9 pin operate in standard mode" ]
STANDARD = 0 , # [ doc = "1: I2C FM+ mode enabled on PB9 and the Speed control is bypassed" ]
FMP = 1 } impl From < I2C_PB9_FMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C_PB9_FMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C_PB9_FMP`" ]
pub type I2C_PB9_FMP_R = crate :: R < bool , I2C_PB9_FMP_A > ; impl I2C_PB9_FMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C_PB9_FMP_A { match self . bits { false => I2C_PB9_FMP_A :: STANDARD , true => I2C_PB9_FMP_A :: FMP } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == I2C_PB9_FMP_A :: STANDARD } # [ doc = "Checks if the value of the field is `FMP`" ]
# [ inline ( always ) ]
pub fn is_fmp ( & self ) -> bool { * self == I2C_PB9_FMP_A :: FMP } } # [ doc = "Write proxy for field `I2C_PB9_FMP`" ]
pub struct I2C_PB9_FMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C_PB9_FMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C_PB9_FMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PB9 pin operate in standard mode" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( I2C_PB9_FMP_A :: STANDARD ) } # [ doc = "I2C FM+ mode enabled on PB9 and the Speed control is bypassed" ]
# [ inline ( always ) ]
pub fn fmp ( self ) -> & 'a mut W { self . variant ( I2C_PB9_FMP_A :: FMP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "I2C1 Fast Mode Plus\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C1_FMP_A { # [ doc = "0: FM+ mode is controlled by I2C_Pxx_FMP bits only" ]
STANDARD = 0 , # [ doc = "1: FM+ mode is enabled on all I2C1 pins selected through selection through IOPORT control registers AF selection bits" ]
FMP = 1 } impl From < I2C1_FMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C1_FMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C1_FMP`" ]
pub type I2C1_FMP_R = crate :: R < bool , I2C1_FMP_A > ; impl I2C1_FMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C1_FMP_A { match self . bits { false => I2C1_FMP_A :: STANDARD , true => I2C1_FMP_A :: FMP } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == I2C1_FMP_A :: STANDARD } # [ doc = "Checks if the value of the field is `FMP`" ]
# [ inline ( always ) ]
pub fn is_fmp ( & self ) -> bool { * self == I2C1_FMP_A :: FMP } } # [ doc = "Write proxy for field `I2C1_FMP`" ]
pub struct I2C1_FMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C1_FMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C1_FMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "FM+ mode is controlled by I2C_Pxx_FMP bits only" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( I2C1_FMP_A :: STANDARD ) } # [ doc = "FM+ mode is enabled on all I2C1 pins selected through selection through IOPORT control registers AF selection bits" ]
# [ inline ( always ) ]
pub fn fmp ( self ) -> & 'a mut W { self . variant ( I2C1_FMP_A :: FMP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "I2C2 Fast Mode Plus\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C2_FMP_A { # [ doc = "0: FM+ mode is controlled by I2C_Pxx_FMP bits only" ]
STANDARD = 0 , # [ doc = "1: FM+ mode is enabled on all I2C2 pins selected through selection through IOPORT control registers AF selection bits" ]
FMP = 1 } impl From < I2C2_FMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C2_FMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C2_FMP`" ]
pub type I2C2_FMP_R = crate :: R < bool , I2C2_FMP_A > ; impl I2C2_FMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C2_FMP_A { match self . bits { false => I2C2_FMP_A :: STANDARD , true => I2C2_FMP_A :: FMP } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == I2C2_FMP_A :: STANDARD } # [ doc = "Checks if the value of the field is `FMP`" ]
# [ inline ( always ) ]
pub fn is_fmp ( & self ) -> bool { * self == I2C2_FMP_A :: FMP } } # [ doc = "Write proxy for field `I2C2_FMP`" ]
pub struct I2C2_FMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C2_FMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C2_FMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "FM+ mode is controlled by I2C_Pxx_FMP bits only" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( I2C2_FMP_A :: STANDARD ) } # [ doc = "FM+ mode is enabled on all I2C2 pins selected through selection through IOPORT control registers AF selection bits" ]
# [ inline ( always ) ]
pub fn fmp ( self ) -> & 'a mut W { self . variant ( I2C2_FMP_A :: FMP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Encoder mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ENCODER_MODE_A { # [ doc = "0: No redirection" ]
NOREDIRECTION = 0 , # [ doc = "1: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively" ]
MAPTIM2TIM15 = 1 , # [ doc = "2: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively" ]
MAPTIM3TIM15 = 2 , # [ doc = "3: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively (STM32F303xB/C and STM32F358xC devices only)" ]
MAPTIM4TIM15 = 3 } impl From < ENCODER_MODE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ENCODER_MODE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ENCODER_MODE`" ]
pub type ENCODER_MODE_R = crate :: R < u8 , ENCODER_MODE_A > ; impl ENCODER_MODE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ENCODER_MODE_A { match self . bits { 0 => ENCODER_MODE_A :: NOREDIRECTION , 1 => ENCODER_MODE_A :: MAPTIM2TIM15 , 2 => ENCODER_MODE_A :: MAPTIM3TIM15 , 3 => ENCODER_MODE_A :: MAPTIM4TIM15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `NOREDIRECTION`" ]
# [ inline ( always ) ]
pub fn is_no_redirection ( & self ) -> bool { * self == ENCODER_MODE_A :: NOREDIRECTION } # [ doc = "Checks if the value of the field is `MAPTIM2TIM15`" ]
# [ inline ( always ) ]
pub fn is_map_tim2tim15 ( & self ) -> bool { * self == ENCODER_MODE_A :: MAPTIM2TIM15 } # [ doc = "Checks if the value of the field is `MAPTIM3TIM15`" ]
# [ inline ( always ) ]
pub fn is_map_tim3tim15 ( & self ) -> bool { * self == ENCODER_MODE_A :: MAPTIM3TIM15 } # [ doc = "Checks if the value of the field is `MAPTIM4TIM15`" ]
# [ inline ( always ) ]
pub fn is_map_tim4tim15 ( & self ) -> bool { * self == ENCODER_MODE_A :: MAPTIM4TIM15 } } # [ doc = "Write proxy for field `ENCODER_MODE`" ]
pub struct ENCODER_MODE_W < 'a > { w : & 'a mut W , } impl < 'a > ENCODER_MODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ENCODER_MODE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "No redirection" ]
# [ inline ( always ) ]
pub fn no_redirection ( self ) -> & 'a mut W { self . variant ( ENCODER_MODE_A :: NOREDIRECTION ) } # [ doc = "TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively" ]
# [ inline ( always ) ]
pub fn map_tim2tim15 ( self ) -> & 'a mut W { self . variant ( ENCODER_MODE_A :: MAPTIM2TIM15 ) } # [ doc = "TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively" ]
# [ inline ( always ) ]
pub fn map_tim3tim15 ( self ) -> & 'a mut W { self . variant ( ENCODER_MODE_A :: MAPTIM3TIM15 ) } # [ doc = "TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively (STM32F303xB/C and STM32F358xC devices only)" ]
# [ inline ( always ) ]
pub fn map_tim4tim15 ( self ) -> & 'a mut W { self . variant ( ENCODER_MODE_A :: MAPTIM4TIM15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Inexact interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FPU_IE5_A { # [ doc = "0: Inexact interrupt disable" ]
DISABLED = 0 , # [ doc = "1: Inexact interrupt enable" ]
ENABLED = 1 } impl From < FPU_IE5_A > for bool { # [ inline ( always ) ]
fn from ( variant : FPU_IE5_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FPU_IE5`" ]
pub type FPU_IE5_R = crate :: R < bool , FPU_IE5_A > ; impl FPU_IE5_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FPU_IE5_A { match self . bits { false => FPU_IE5_A :: DISABLED , true => FPU_IE5_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FPU_IE5_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FPU_IE5_A :: ENABLED } } # [ doc = "Write proxy for field `FPU_IE5`" ]
pub struct FPU_IE5_W < 'a > { w : & 'a mut W , } impl < 'a > FPU_IE5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FPU_IE5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Inexact interrupt disable" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FPU_IE5_A :: DISABLED ) } # [ doc = "Inexact interrupt enable" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FPU_IE5_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Input denormal interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FPU_IE4_A { # [ doc = "0: Input denormal interrupt disable" ]
DISABLED = 0 , # [ doc = "1: Input denormal interrupt enable" ]
ENABLED = 1 } impl From < FPU_IE4_A > for bool { # [ inline ( always ) ]
fn from ( variant : FPU_IE4_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FPU_IE4`" ]
pub type FPU_IE4_R = crate :: R < bool , FPU_IE4_A > ; impl FPU_IE4_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FPU_IE4_A { match self . bits { false => FPU_IE4_A :: DISABLED , true => FPU_IE4_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FPU_IE4_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FPU_IE4_A :: ENABLED } } # [ doc = "Write proxy for field `FPU_IE4`" ]
pub struct FPU_IE4_W < 'a > { w : & 'a mut W , } impl < 'a > FPU_IE4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FPU_IE4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input denormal interrupt disable" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FPU_IE4_A :: DISABLED ) } # [ doc = "Input denormal interrupt enable" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FPU_IE4_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Overflow interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FPU_IE3_A { # [ doc = "0: Overflow interrupt disable" ]
DISABLED = 0 , # [ doc = "1: Overflow interrupt enable" ]
ENABLED = 1 } impl From < FPU_IE3_A > for bool { # [ inline ( always ) ]
fn from ( variant : FPU_IE3_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FPU_IE3`" ]
pub type FPU_IE3_R = crate :: R < bool , FPU_IE3_A > ; impl FPU_IE3_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FPU_IE3_A { match self . bits { false => FPU_IE3_A :: DISABLED , true => FPU_IE3_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FPU_IE3_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FPU_IE3_A :: ENABLED } } # [ doc = "Write proxy for field `FPU_IE3`" ]
pub struct FPU_IE3_W < 'a > { w : & 'a mut W , } impl < 'a > FPU_IE3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FPU_IE3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Overflow interrupt disable" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FPU_IE3_A :: DISABLED ) } # [ doc = "Overflow interrupt enable" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FPU_IE3_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Underflow interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FPU_IE2_A { # [ doc = "0: Underflow interrupt disable" ]
DISABLED = 0 , # [ doc = "1: Underflow interrupt enable" ]
ENABLED = 1 } impl From < FPU_IE2_A > for bool { # [ inline ( always ) ]
fn from ( variant : FPU_IE2_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FPU_IE2`" ]
pub type FPU_IE2_R = crate :: R < bool , FPU_IE2_A > ; impl FPU_IE2_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FPU_IE2_A { match self . bits { false => FPU_IE2_A :: DISABLED , true => FPU_IE2_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FPU_IE2_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FPU_IE2_A :: ENABLED } } # [ doc = "Write proxy for field `FPU_IE2`" ]
pub struct FPU_IE2_W < 'a > { w : & 'a mut W , } impl < 'a > FPU_IE2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FPU_IE2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Underflow interrupt disable" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FPU_IE2_A :: DISABLED ) } # [ doc = "Underflow interrupt enable" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FPU_IE2_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Devide-by-zero interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FPU_IE1_A { # [ doc = "0: Devide-by-zero interrupt disable" ]
DISABLED = 0 , # [ doc = "1: Devide-by-zero interrupt enable" ]
ENABLED = 1 } impl From < FPU_IE1_A > for bool { # [ inline ( always ) ]
fn from ( variant : FPU_IE1_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FPU_IE1`" ]
pub type FPU_IE1_R = crate :: R < bool , FPU_IE1_A > ; impl FPU_IE1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FPU_IE1_A { match self . bits { false => FPU_IE1_A :: DISABLED , true => FPU_IE1_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FPU_IE1_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FPU_IE1_A :: ENABLED } } # [ doc = "Write proxy for field `FPU_IE1`" ]
pub struct FPU_IE1_W < 'a > { w : & 'a mut W , } impl < 'a > FPU_IE1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FPU_IE1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Devide-by-zero interrupt disable" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FPU_IE1_A :: DISABLED ) } # [ doc = "Devide-by-zero interrupt enable" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FPU_IE1_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Invalid operation interrupt enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FPU_IE0_A { # [ doc = "0: Invalid operation interrupt disable" ]
DISABLED = 0 , # [ doc = "1: Invalid operation interrupt enable" ]
ENABLED = 1 } impl From < FPU_IE0_A > for bool { # [ inline ( always ) ]
fn from ( variant : FPU_IE0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FPU_IE0`" ]
pub type FPU_IE0_R = crate :: R < bool , FPU_IE0_A > ; impl FPU_IE0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FPU_IE0_A { match self . bits { false => FPU_IE0_A :: DISABLED , true => FPU_IE0_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == FPU_IE0_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == FPU_IE0_A :: ENABLED } } # [ doc = "Write proxy for field `FPU_IE0`" ]
pub struct FPU_IE0_W < 'a > { w : & 'a mut W , } impl < 'a > FPU_IE0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FPU_IE0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Invalid operation interrupt disable" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( FPU_IE0_A :: DISABLED ) } # [ doc = "Invalid operation interrupt enable" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( FPU_IE0_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "DAC2 channel1 DMA remap\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DAC2_CH1_DMA_RMP_A { # [ doc = "0: Not remapped" ]
NOTREMAPPED = 0 , # [ doc = "1: DAC2_CH1 DMA requests mapped on DMA1 channel 5" ]
REMAPPED = 1 } impl From < DAC2_CH1_DMA_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : DAC2_CH1_DMA_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DAC2_CH1_DMA_RMP`" ]
pub type DAC2_CH1_DMA_RMP_R = crate :: R < bool , DAC2_CH1_DMA_RMP_A > ; impl DAC2_CH1_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DAC2_CH1_DMA_RMP_A { match self . bits { false => DAC2_CH1_DMA_RMP_A :: NOTREMAPPED , true => DAC2_CH1_DMA_RMP_A :: REMAPPED } } # [ doc = "Checks if the value of the field is `NOTREMAPPED`" ]
# [ inline ( always ) ]
pub fn is_not_remapped ( & self ) -> bool { * self == DAC2_CH1_DMA_RMP_A :: NOTREMAPPED } # [ doc = "Checks if the value of the field is `REMAPPED`" ]
# [ inline ( always ) ]
pub fn is_remapped ( & self ) -> bool { * self == DAC2_CH1_DMA_RMP_A :: REMAPPED } } # [ doc = "Write proxy for field `DAC2_CH1_DMA_RMP`" ]
pub struct DAC2_CH1_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > DAC2_CH1_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DAC2_CH1_DMA_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Not remapped" ]
# [ inline ( always ) ]
pub fn not_remapped ( self ) -> & 'a mut W { self . variant ( DAC2_CH1_DMA_RMP_A :: NOTREMAPPED ) } # [ doc = "DAC2_CH1 DMA requests mapped on DMA1 channel 5" ]
# [ inline ( always ) ]
pub fn remapped ( self ) -> & 'a mut W { self . variant ( DAC2_CH1_DMA_RMP_A :: REMAPPED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "I2C3 Fast Mode Plus\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum I2C3_FMP_A { # [ doc = "0: FM+ mode is controlled by I2C_Pxx_FMP bits only" ]
STANDARD = 0 , # [ doc = "1: FM+ mode is enabled on all I2C3 pins selected through selection through IOPORT control registers AF selection bits" ]
FMP = 1 } impl From < I2C3_FMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : I2C3_FMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `I2C3_FMP`" ]
pub type I2C3_FMP_R = crate :: R < bool , I2C3_FMP_A > ; impl I2C3_FMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> I2C3_FMP_A { match self . bits { false => I2C3_FMP_A :: STANDARD , true => I2C3_FMP_A :: FMP } } # [ doc = "Checks if the value of the field is `STANDARD`" ]
# [ inline ( always ) ]
pub fn is_standard ( & self ) -> bool { * self == I2C3_FMP_A :: STANDARD } # [ doc = "Checks if the value of the field is `FMP`" ]
# [ inline ( always ) ]
pub fn is_fmp ( & self ) -> bool { * self == I2C3_FMP_A :: FMP } } # [ doc = "Write proxy for field `I2C3_FMP`" ]
pub struct I2C3_FMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C3_FMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C3_FMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "FM+ mode is controlled by I2C_Pxx_FMP bits only" ]
# [ inline ( always ) ]
pub fn standard ( self ) -> & 'a mut W { self . variant ( I2C3_FMP_A :: STANDARD ) } # [ doc = "FM+ mode is enabled on all I2C3 pins selected through selection through IOPORT control registers AF selection bits" ]
# [ inline ( always ) ]
pub fn fmp ( self ) -> & 'a mut W { self . variant ( I2C3_FMP_A :: FMP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } impl R { # [ doc = "Bits 0:2 - Memory mapping selection bits" ]
# [ inline ( always ) ]
pub fn mem_mode ( & self ) -> MEM_MODE_R { MEM_MODE_R :: new ( ( self . bits & 0x07 ) as u8 ) } # [ doc = "Bit 5 - USB interrupt remap" ]
# [ inline ( always ) ]
pub fn usb_it_rmp ( & self ) -> USB_IT_RMP_R { USB_IT_RMP_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Timer 1 ITR3 selection" ]
# [ inline ( always ) ]
pub fn tim1_itr3_rmp ( & self ) -> TIM1_ITR3_RMP_R { TIM1_ITR3_RMP_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - DAC trigger remap (when TSEL = 001)" ]
# [ inline ( always ) ]
pub fn dac1_trig_rmp ( & self ) -> DAC1_TRIG_RMP_R { DAC1_TRIG_RMP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - ADC24 DMA remapping bit" ]
# [ inline ( always ) ]
pub fn adc2_dma_rmp ( & self ) -> ADC2_DMA_RMP_R { ADC2_DMA_RMP_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - TIM16 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim16_dma_rmp ( & self ) -> TIM16_DMA_RMP_R { TIM16_DMA_RMP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - TIM17 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim17_dma_rmp ( & self ) -> TIM17_DMA_RMP_R { TIM17_DMA_RMP_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - TIM6 and DAC1 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim6_dac1_ch1_dma_rmp ( & self ) -> TIM6_DAC1_CH1_DMA_RMP_R { TIM6_DAC1_CH1_DMA_RMP_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - TIM7 and DAC2 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim7_dac1_ch2_dma_rmp ( & self ) -> TIM7_DAC1_CH2_DMA_RMP_R { TIM7_DAC1_CH2_DMA_RMP_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb6_fmp ( & self ) -> I2C_PB6_FMP_R { I2C_PB6_FMP_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb7_fmp ( & self ) -> I2C_PB7_FMP_R { I2C_PB7_FMP_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb8_fmp ( & self ) -> I2C_PB8_FMP_R { I2C_PB8_FMP_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb9_fmp ( & self ) -> I2C_PB9_FMP_R { I2C_PB9_FMP_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - I2C1 Fast Mode Plus" ]
# [ inline ( always ) ]
pub fn i2c1_fmp ( & self ) -> I2C1_FMP_R { I2C1_FMP_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - I2C2 Fast Mode Plus" ]
# [ inline ( always ) ]
pub fn i2c2_fmp ( & self ) -> I2C2_FMP_R { I2C2_FMP_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bits 22:23 - Encoder mode" ]
# [ inline ( always ) ]
pub fn encoder_mode ( & self ) -> ENCODER_MODE_R { ENCODER_MODE_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bit 31 - Inexact interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie5 ( & self ) -> FPU_IE5_R { FPU_IE5_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Input denormal interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie4 ( & self ) -> FPU_IE4_R { FPU_IE4_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - Overflow interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie3 ( & self ) -> FPU_IE3_R { FPU_IE3_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Underflow interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie2 ( & self ) -> FPU_IE2_R { FPU_IE2_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 27 - Devide-by-zero interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie1 ( & self ) -> FPU_IE1_R { FPU_IE1_R :: new ( ( ( self . bits >> 27 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Invalid operation interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie0 ( & self ) -> FPU_IE0_R { FPU_IE0_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - DAC2 channel1 DMA remap" ]
# [ inline ( always ) ]
pub fn dac2_ch1_dma_rmp ( & self ) -> DAC2_CH1_DMA_RMP_R { DAC2_CH1_DMA_RMP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - I2C3 Fast Mode Plus" ]
# [ inline ( always ) ]
pub fn i2c3_fmp ( & self ) -> I2C3_FMP_R { I2C3_FMP_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:2 - Memory mapping selection bits" ]
# [ inline ( always ) ]
pub fn mem_mode ( & mut self ) -> MEM_MODE_W { MEM_MODE_W { w : self } } # [ doc = "Bit 5 - USB interrupt remap" ]
# [ inline ( always ) ]
pub fn usb_it_rmp ( & mut self ) -> USB_IT_RMP_W { USB_IT_RMP_W { w : self } } # [ doc = "Bit 6 - Timer 1 ITR3 selection" ]
# [ inline ( always ) ]
pub fn tim1_itr3_rmp ( & mut self ) -> TIM1_ITR3_RMP_W { TIM1_ITR3_RMP_W { w : self } } # [ doc = "Bit 7 - DAC trigger remap (when TSEL = 001)" ]
# [ inline ( always ) ]
pub fn dac1_trig_rmp ( & mut self ) -> DAC1_TRIG_RMP_W { DAC1_TRIG_RMP_W { w : self } } # [ doc = "Bit 8 - ADC24 DMA remapping bit" ]
# [ inline ( always ) ]
pub fn adc2_dma_rmp ( & mut self ) -> ADC2_DMA_RMP_W { ADC2_DMA_RMP_W { w : self } } # [ doc = "Bit 11 - TIM16 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim16_dma_rmp ( & mut self ) -> TIM16_DMA_RMP_W { TIM16_DMA_RMP_W { w : self } } # [ doc = "Bit 12 - TIM17 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim17_dma_rmp ( & mut self ) -> TIM17_DMA_RMP_W { TIM17_DMA_RMP_W { w : self } } # [ doc = "Bit 13 - TIM6 and DAC1 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim6_dac1_ch1_dma_rmp ( & mut self ) -> TIM6_DAC1_CH1_DMA_RMP_W { TIM6_DAC1_CH1_DMA_RMP_W { w : self } } # [ doc = "Bit 14 - TIM7 and DAC2 DMA request remapping bit" ]
# [ inline ( always ) ]
pub fn tim7_dac1_ch2_dma_rmp ( & mut self ) -> TIM7_DAC1_CH2_DMA_RMP_W { TIM7_DAC1_CH2_DMA_RMP_W { w : self } } # [ doc = "Bit 16 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb6_fmp ( & mut self ) -> I2C_PB6_FMP_W { I2C_PB6_FMP_W { w : self } } # [ doc = "Bit 17 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb7_fmp ( & mut self ) -> I2C_PB7_FMP_W { I2C_PB7_FMP_W { w : self } } # [ doc = "Bit 18 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb8_fmp ( & mut self ) -> I2C_PB8_FMP_W { I2C_PB8_FMP_W { w : self } } # [ doc = "Bit 19 - Fast Mode Plus (FM+) driving capability activation bits." ]
# [ inline ( always ) ]
pub fn i2c_pb9_fmp ( & mut self ) -> I2C_PB9_FMP_W { I2C_PB9_FMP_W { w : self } } # [ doc = "Bit 20 - I2C1 Fast Mode Plus" ]
# [ inline ( always ) ]
pub fn i2c1_fmp ( & mut self ) -> I2C1_FMP_W { I2C1_FMP_W { w : self } } # [ doc = "Bit 21 - I2C2 Fast Mode Plus" ]
# [ inline ( always ) ]
pub fn i2c2_fmp ( & mut self ) -> I2C2_FMP_W { I2C2_FMP_W { w : self } } # [ doc = "Bits 22:23 - Encoder mode" ]
# [ inline ( always ) ]
pub fn encoder_mode ( & mut self ) -> ENCODER_MODE_W { ENCODER_MODE_W { w : self } } # [ doc = "Bit 31 - Inexact interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie5 ( & mut self ) -> FPU_IE5_W { FPU_IE5_W { w : self } } # [ doc = "Bit 30 - Input denormal interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie4 ( & mut self ) -> FPU_IE4_W { FPU_IE4_W { w : self } } # [ doc = "Bit 29 - Overflow interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie3 ( & mut self ) -> FPU_IE3_W { FPU_IE3_W { w : self } } # [ doc = "Bit 28 - Underflow interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie2 ( & mut self ) -> FPU_IE2_W { FPU_IE2_W { w : self } } # [ doc = "Bit 27 - Devide-by-zero interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie1 ( & mut self ) -> FPU_IE1_W { FPU_IE1_W { w : self } } # [ doc = "Bit 26 - Invalid operation interrupt enable" ]
# [ inline ( always ) ]
pub fn fpu_ie0 ( & mut self ) -> FPU_IE0_W { FPU_IE0_W { w : self } } # [ doc = "Bit 15 - DAC2 channel1 DMA remap" ]
# [ inline ( always ) ]
pub fn dac2_ch1_dma_rmp ( & mut self ) -> DAC2_CH1_DMA_RMP_W { DAC2_CH1_DMA_RMP_W { w : self } } # [ doc = "Bit 24 - I2C3 Fast Mode Plus" ]
# [ inline ( always ) ]
pub fn i2c3_fmp ( & mut self ) -> I2C3_FMP_W { I2C3_FMP_W { w : self } } } } # [ doc = "external interrupt configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr1](exticr1) module" ]
pub type EXTICR1 = crate :: Reg < u32 , _EXTICR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EXTICR1 ; # [ doc = "`read()` method returns [exticr1::R](exticr1::R) reader structure" ]
impl crate :: Readable for EXTICR1 { } # [ doc = "`write(|w| ..)` method takes [exticr1::W](exticr1::W) writer structure" ]
impl crate :: Writable for EXTICR1 { } # [ doc = "external interrupt configuration register 1" ]
pub mod exticr1 { # [ doc = "Reader of register EXTICR1" ]
pub type R = crate :: R < u32 , super :: EXTICR1 > ; # [ doc = "Writer for register EXTICR1" ]
pub type W = crate :: W < u32 , super :: EXTICR1 > ; # [ doc = "Register EXTICR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EXTICR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "EXTI 3 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI3_A { # [ doc = "0: Select PA3 as the source input for the EXTI3 external interrupt" ]
PA3 = 0 , # [ doc = "1: Select PB3 as the source input for the EXTI3 external interrupt" ]
PB3 = 1 , # [ doc = "2: Select PC3 as the source input for the EXTI3 external interrupt" ]
PC3 = 2 , # [ doc = "3: Select PD3 as the source input for the EXTI3 external interrupt" ]
PD3 = 3 , # [ doc = "4: Select PE3 as the source input for the EXTI3 external interrupt" ]
PE3 = 4 , # [ doc = "5: Select PF3 as the source input for the EXTI3 external interrupt" ]
PF3 = 5 , # [ doc = "6: Select PG3 as the source input for the EXTI3 external interrupt" ]
PG3 = 6 } impl From < EXTI3_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI3_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI3`" ]
pub type EXTI3_R = crate :: R < u8 , EXTI3_A > ; impl EXTI3_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI3_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI3_A :: PA3 ) , 1 => Val ( EXTI3_A :: PB3 ) , 2 => Val ( EXTI3_A :: PC3 ) , 3 => Val ( EXTI3_A :: PD3 ) , 4 => Val ( EXTI3_A :: PE3 ) , 5 => Val ( EXTI3_A :: PF3 ) , 6 => Val ( EXTI3_A :: PG3 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA3`" ]
# [ inline ( always ) ]
pub fn is_pa3 ( & self ) -> bool { * self == EXTI3_A :: PA3 } # [ doc = "Checks if the value of the field is `PB3`" ]
# [ inline ( always ) ]
pub fn is_pb3 ( & self ) -> bool { * self == EXTI3_A :: PB3 } # [ doc = "Checks if the value of the field is `PC3`" ]
# [ inline ( always ) ]
pub fn is_pc3 ( & self ) -> bool { * self == EXTI3_A :: PC3 } # [ doc = "Checks if the value of the field is `PD3`" ]
# [ inline ( always ) ]
pub fn is_pd3 ( & self ) -> bool { * self == EXTI3_A :: PD3 } # [ doc = "Checks if the value of the field is `PE3`" ]
# [ inline ( always ) ]
pub fn is_pe3 ( & self ) -> bool { * self == EXTI3_A :: PE3 } # [ doc = "Checks if the value of the field is `PF3`" ]
# [ inline ( always ) ]
pub fn is_pf3 ( & self ) -> bool { * self == EXTI3_A :: PF3 } # [ doc = "Checks if the value of the field is `PG3`" ]
# [ inline ( always ) ]
pub fn is_pg3 ( & self ) -> bool { * self == EXTI3_A :: PG3 } } # [ doc = "Write proxy for field `EXTI3`" ]
pub struct EXTI3_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI3_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA3 as the source input for the EXTI3 external interrupt" ]
# [ inline ( always ) ]
pub fn pa3 ( self ) -> & 'a mut W { self . variant ( EXTI3_A :: PA3 ) } # [ doc = "Select PB3 as the source input for the EXTI3 external interrupt" ]
# [ inline ( always ) ]
pub fn pb3 ( self ) -> & 'a mut W { self . variant ( EXTI3_A :: PB3 ) } # [ doc = "Select PC3 as the source input for the EXTI3 external interrupt" ]
# [ inline ( always ) ]
pub fn pc3 ( self ) -> & 'a mut W { self . variant ( EXTI3_A :: PC3 ) } # [ doc = "Select PD3 as the source input for the EXTI3 external interrupt" ]
# [ inline ( always ) ]
pub fn pd3 ( self ) -> & 'a mut W { self . variant ( EXTI3_A :: PD3 ) } # [ doc = "Select PE3 as the source input for the EXTI3 external interrupt" ]
# [ inline ( always ) ]
pub fn pe3 ( self ) -> & 'a mut W { self . variant ( EXTI3_A :: PE3 ) } # [ doc = "Select PF3 as the source input for the EXTI3 external interrupt" ]
# [ inline ( always ) ]
pub fn pf3 ( self ) -> & 'a mut W { self . variant ( EXTI3_A :: PF3 ) } # [ doc = "Select PG3 as the source input for the EXTI3 external interrupt" ]
# [ inline ( always ) ]
pub fn pg3 ( self ) -> & 'a mut W { self . variant ( EXTI3_A :: PG3 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "EXTI 2 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI2_A { # [ doc = "0: Select PA2 as the source input for the EXTI2 external interrupt" ]
PA2 = 0 , # [ doc = "1: Select PB2 as the source input for the EXTI2 external interrupt" ]
PB2 = 1 , # [ doc = "2: Select PC2 as the source input for the EXTI2 external interrupt" ]
PC2 = 2 , # [ doc = "3: Select PD2 as the source input for the EXTI2 external interrupt" ]
PD2 = 3 , # [ doc = "4: Select PE2 as the source input for the EXTI2 external interrupt" ]
PE2 = 4 , # [ doc = "5: Select PF2 as the source input for the EXTI2 external interrupt" ]
PF2 = 5 , # [ doc = "6: Select PG2 as the source input for the EXTI2 external interrupt" ]
PG2 = 6 , # [ doc = "7: Select PH2 as the source input for the EXTI2 external interrupt" ]
PH2 = 7 } impl From < EXTI2_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI2_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI2`" ]
pub type EXTI2_R = crate :: R < u8 , EXTI2_A > ; impl EXTI2_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI2_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI2_A :: PA2 ) , 1 => Val ( EXTI2_A :: PB2 ) , 2 => Val ( EXTI2_A :: PC2 ) , 3 => Val ( EXTI2_A :: PD2 ) , 4 => Val ( EXTI2_A :: PE2 ) , 5 => Val ( EXTI2_A :: PF2 ) , 6 => Val ( EXTI2_A :: PG2 ) , 7 => Val ( EXTI2_A :: PH2 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA2`" ]
# [ inline ( always ) ]
pub fn is_pa2 ( & self ) -> bool { * self == EXTI2_A :: PA2 } # [ doc = "Checks if the value of the field is `PB2`" ]
# [ inline ( always ) ]
pub fn is_pb2 ( & self ) -> bool { * self == EXTI2_A :: PB2 } # [ doc = "Checks if the value of the field is `PC2`" ]
# [ inline ( always ) ]
pub fn is_pc2 ( & self ) -> bool { * self == EXTI2_A :: PC2 } # [ doc = "Checks if the value of the field is `PD2`" ]
# [ inline ( always ) ]
pub fn is_pd2 ( & self ) -> bool { * self == EXTI2_A :: PD2 } # [ doc = "Checks if the value of the field is `PE2`" ]
# [ inline ( always ) ]
pub fn is_pe2 ( & self ) -> bool { * self == EXTI2_A :: PE2 } # [ doc = "Checks if the value of the field is `PF2`" ]
# [ inline ( always ) ]
pub fn is_pf2 ( & self ) -> bool { * self == EXTI2_A :: PF2 } # [ doc = "Checks if the value of the field is `PG2`" ]
# [ inline ( always ) ]
pub fn is_pg2 ( & self ) -> bool { * self == EXTI2_A :: PG2 } # [ doc = "Checks if the value of the field is `PH2`" ]
# [ inline ( always ) ]
pub fn is_ph2 ( & self ) -> bool { * self == EXTI2_A :: PH2 } } # [ doc = "Write proxy for field `EXTI2`" ]
pub struct EXTI2_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI2_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn pa2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PA2 ) } # [ doc = "Select PB2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn pb2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PB2 ) } # [ doc = "Select PC2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn pc2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PC2 ) } # [ doc = "Select PD2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn pd2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PD2 ) } # [ doc = "Select PE2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn pe2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PE2 ) } # [ doc = "Select PF2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn pf2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PF2 ) } # [ doc = "Select PG2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn pg2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PG2 ) } # [ doc = "Select PH2 as the source input for the EXTI2 external interrupt" ]
# [ inline ( always ) ]
pub fn ph2 ( self ) -> & 'a mut W { self . variant ( EXTI2_A :: PH2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "EXTI 1 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI1_A { # [ doc = "0: Select PA1 as the source input for the EXTI1 external interrupt" ]
PA1 = 0 , # [ doc = "1: Select PB1 as the source input for the EXTI1 external interrupt" ]
PB1 = 1 , # [ doc = "2: Select PC1 as the source input for the EXTI1 external interrupt" ]
PC1 = 2 , # [ doc = "3: Select PD1 as the source input for the EXTI1 external interrupt" ]
PD1 = 3 , # [ doc = "4: Select PE1 as the source input for the EXTI1 external interrupt" ]
PE1 = 4 , # [ doc = "5: Select PF1 as the source input for the EXTI1 external interrupt" ]
PF1 = 5 , # [ doc = "6: Select PG1 as the source input for the EXTI1 external interrupt" ]
PG1 = 6 , # [ doc = "7: Select PH1 as the source input for the EXTI1 external interrupt" ]
PH1 = 7 } impl From < EXTI1_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI1_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI1`" ]
pub type EXTI1_R = crate :: R < u8 , EXTI1_A > ; impl EXTI1_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI1_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI1_A :: PA1 ) , 1 => Val ( EXTI1_A :: PB1 ) , 2 => Val ( EXTI1_A :: PC1 ) , 3 => Val ( EXTI1_A :: PD1 ) , 4 => Val ( EXTI1_A :: PE1 ) , 5 => Val ( EXTI1_A :: PF1 ) , 6 => Val ( EXTI1_A :: PG1 ) , 7 => Val ( EXTI1_A :: PH1 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA1`" ]
# [ inline ( always ) ]
pub fn is_pa1 ( & self ) -> bool { * self == EXTI1_A :: PA1 } # [ doc = "Checks if the value of the field is `PB1`" ]
# [ inline ( always ) ]
pub fn is_pb1 ( & self ) -> bool { * self == EXTI1_A :: PB1 } # [ doc = "Checks if the value of the field is `PC1`" ]
# [ inline ( always ) ]
pub fn is_pc1 ( & self ) -> bool { * self == EXTI1_A :: PC1 } # [ doc = "Checks if the value of the field is `PD1`" ]
# [ inline ( always ) ]
pub fn is_pd1 ( & self ) -> bool { * self == EXTI1_A :: PD1 } # [ doc = "Checks if the value of the field is `PE1`" ]
# [ inline ( always ) ]
pub fn is_pe1 ( & self ) -> bool { * self == EXTI1_A :: PE1 } # [ doc = "Checks if the value of the field is `PF1`" ]
# [ inline ( always ) ]
pub fn is_pf1 ( & self ) -> bool { * self == EXTI1_A :: PF1 } # [ doc = "Checks if the value of the field is `PG1`" ]
# [ inline ( always ) ]
pub fn is_pg1 ( & self ) -> bool { * self == EXTI1_A :: PG1 } # [ doc = "Checks if the value of the field is `PH1`" ]
# [ inline ( always ) ]
pub fn is_ph1 ( & self ) -> bool { * self == EXTI1_A :: PH1 } } # [ doc = "Write proxy for field `EXTI1`" ]
pub struct EXTI1_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI1_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn pa1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PA1 ) } # [ doc = "Select PB1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn pb1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PB1 ) } # [ doc = "Select PC1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn pc1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PC1 ) } # [ doc = "Select PD1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn pd1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PD1 ) } # [ doc = "Select PE1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn pe1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PE1 ) } # [ doc = "Select PF1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn pf1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PF1 ) } # [ doc = "Select PG1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn pg1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PG1 ) } # [ doc = "Select PH1 as the source input for the EXTI1 external interrupt" ]
# [ inline ( always ) ]
pub fn ph1 ( self ) -> & 'a mut W { self . variant ( EXTI1_A :: PH1 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "EXTI 0 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI0_A { # [ doc = "0: Select PA0 as the source input for the EXTI0 external interrupt" ]
PA0 = 0 , # [ doc = "1: Select PB0 as the source input for the EXTI0 external interrupt" ]
PB0 = 1 , # [ doc = "2: Select PC0 as the source input for the EXTI0 external interrupt" ]
PC0 = 2 , # [ doc = "3: Select PD0 as the source input for the EXTI0 external interrupt" ]
PD0 = 3 , # [ doc = "4: Select PE0 as the source input for the EXTI0 external interrupt" ]
PE0 = 4 , # [ doc = "5: Select PF0 as the source input for the EXTI0 external interrupt" ]
PF0 = 5 , # [ doc = "6: Select PG0 as the source input for the EXTI0 external interrupt" ]
PG0 = 6 , # [ doc = "7: Select PH0 as the source input for the EXTI0 external interrupt" ]
PH0 = 7 } impl From < EXTI0_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI0_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI0`" ]
pub type EXTI0_R = crate :: R < u8 , EXTI0_A > ; impl EXTI0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI0_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI0_A :: PA0 ) , 1 => Val ( EXTI0_A :: PB0 ) , 2 => Val ( EXTI0_A :: PC0 ) , 3 => Val ( EXTI0_A :: PD0 ) , 4 => Val ( EXTI0_A :: PE0 ) , 5 => Val ( EXTI0_A :: PF0 ) , 6 => Val ( EXTI0_A :: PG0 ) , 7 => Val ( EXTI0_A :: PH0 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA0`" ]
# [ inline ( always ) ]
pub fn is_pa0 ( & self ) -> bool { * self == EXTI0_A :: PA0 } # [ doc = "Checks if the value of the field is `PB0`" ]
# [ inline ( always ) ]
pub fn is_pb0 ( & self ) -> bool { * self == EXTI0_A :: PB0 } # [ doc = "Checks if the value of the field is `PC0`" ]
# [ inline ( always ) ]
pub fn is_pc0 ( & self ) -> bool { * self == EXTI0_A :: PC0 } # [ doc = "Checks if the value of the field is `PD0`" ]
# [ inline ( always ) ]
pub fn is_pd0 ( & self ) -> bool { * self == EXTI0_A :: PD0 } # [ doc = "Checks if the value of the field is `PE0`" ]
# [ inline ( always ) ]
pub fn is_pe0 ( & self ) -> bool { * self == EXTI0_A :: PE0 } # [ doc = "Checks if the value of the field is `PF0`" ]
# [ inline ( always ) ]
pub fn is_pf0 ( & self ) -> bool { * self == EXTI0_A :: PF0 } # [ doc = "Checks if the value of the field is `PG0`" ]
# [ inline ( always ) ]
pub fn is_pg0 ( & self ) -> bool { * self == EXTI0_A :: PG0 } # [ doc = "Checks if the value of the field is `PH0`" ]
# [ inline ( always ) ]
pub fn is_ph0 ( & self ) -> bool { * self == EXTI0_A :: PH0 } } # [ doc = "Write proxy for field `EXTI0`" ]
pub struct EXTI0_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI0_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn pa0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PA0 ) } # [ doc = "Select PB0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn pb0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PB0 ) } # [ doc = "Select PC0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn pc0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PC0 ) } # [ doc = "Select PD0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn pd0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PD0 ) } # [ doc = "Select PE0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn pe0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PE0 ) } # [ doc = "Select PF0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn pf0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PF0 ) } # [ doc = "Select PG0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn pg0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PG0 ) } # [ doc = "Select PH0 as the source input for the EXTI0 external interrupt" ]
# [ inline ( always ) ]
pub fn ph0 ( self ) -> & 'a mut W { self . variant ( EXTI0_A :: PH0 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 12:15 - EXTI 3 configuration bits" ]
# [ inline ( always ) ]
pub fn exti3 ( & self ) -> EXTI3_R { EXTI3_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - EXTI 2 configuration bits" ]
# [ inline ( always ) ]
pub fn exti2 ( & self ) -> EXTI2_R { EXTI2_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - EXTI 1 configuration bits" ]
# [ inline ( always ) ]
pub fn exti1 ( & self ) -> EXTI1_R { EXTI1_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - EXTI 0 configuration bits" ]
# [ inline ( always ) ]
pub fn exti0 ( & self ) -> EXTI0_R { EXTI0_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - EXTI 3 configuration bits" ]
# [ inline ( always ) ]
pub fn exti3 ( & mut self ) -> EXTI3_W { EXTI3_W { w : self } } # [ doc = "Bits 8:11 - EXTI 2 configuration bits" ]
# [ inline ( always ) ]
pub fn exti2 ( & mut self ) -> EXTI2_W { EXTI2_W { w : self } } # [ doc = "Bits 4:7 - EXTI 1 configuration bits" ]
# [ inline ( always ) ]
pub fn exti1 ( & mut self ) -> EXTI1_W { EXTI1_W { w : self } } # [ doc = "Bits 0:3 - EXTI 0 configuration bits" ]
# [ inline ( always ) ]
pub fn exti0 ( & mut self ) -> EXTI0_W { EXTI0_W { w : self } } } } # [ doc = "external interrupt configuration register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr2](exticr2) module" ]
pub type EXTICR2 = crate :: Reg < u32 , _EXTICR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EXTICR2 ; # [ doc = "`read()` method returns [exticr2::R](exticr2::R) reader structure" ]
impl crate :: Readable for EXTICR2 { } # [ doc = "`write(|w| ..)` method takes [exticr2::W](exticr2::W) writer structure" ]
impl crate :: Writable for EXTICR2 { } # [ doc = "external interrupt configuration register 2" ]
pub mod exticr2 { # [ doc = "Reader of register EXTICR2" ]
pub type R = crate :: R < u32 , super :: EXTICR2 > ; # [ doc = "Writer for register EXTICR2" ]
pub type W = crate :: W < u32 , super :: EXTICR2 > ; # [ doc = "Register EXTICR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EXTICR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "EXTI 7 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI7_A { # [ doc = "0: Select PA7 as the source input for the EXTI7 external interrupt" ]
PA7 = 0 , # [ doc = "1: Select PB7 as the source input for the EXTI7 external interrupt" ]
PB7 = 1 , # [ doc = "2: Select PC7 as the source input for the EXTI7 external interrupt" ]
PC7 = 2 , # [ doc = "3: Select PD7 as the source input for the EXTI7 external interrupt" ]
PD7 = 3 , # [ doc = "4: Select PE7 as the source input for the EXTI7 external interrupt" ]
PE7 = 4 , # [ doc = "5: Select PF7 as the source input for the EXTI7 external interrupt" ]
PF7 = 5 , # [ doc = "6: Select PG7 as the source input for the EXTI7 external interrupt" ]
PG7 = 6 } impl From < EXTI7_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI7_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI7`" ]
pub type EXTI7_R = crate :: R < u8 , EXTI7_A > ; impl EXTI7_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI7_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI7_A :: PA7 ) , 1 => Val ( EXTI7_A :: PB7 ) , 2 => Val ( EXTI7_A :: PC7 ) , 3 => Val ( EXTI7_A :: PD7 ) , 4 => Val ( EXTI7_A :: PE7 ) , 5 => Val ( EXTI7_A :: PF7 ) , 6 => Val ( EXTI7_A :: PG7 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA7`" ]
# [ inline ( always ) ]
pub fn is_pa7 ( & self ) -> bool { * self == EXTI7_A :: PA7 } # [ doc = "Checks if the value of the field is `PB7`" ]
# [ inline ( always ) ]
pub fn is_pb7 ( & self ) -> bool { * self == EXTI7_A :: PB7 } # [ doc = "Checks if the value of the field is `PC7`" ]
# [ inline ( always ) ]
pub fn is_pc7 ( & self ) -> bool { * self == EXTI7_A :: PC7 } # [ doc = "Checks if the value of the field is `PD7`" ]
# [ inline ( always ) ]
pub fn is_pd7 ( & self ) -> bool { * self == EXTI7_A :: PD7 } # [ doc = "Checks if the value of the field is `PE7`" ]
# [ inline ( always ) ]
pub fn is_pe7 ( & self ) -> bool { * self == EXTI7_A :: PE7 } # [ doc = "Checks if the value of the field is `PF7`" ]
# [ inline ( always ) ]
pub fn is_pf7 ( & self ) -> bool { * self == EXTI7_A :: PF7 } # [ doc = "Checks if the value of the field is `PG7`" ]
# [ inline ( always ) ]
pub fn is_pg7 ( & self ) -> bool { * self == EXTI7_A :: PG7 } } # [ doc = "Write proxy for field `EXTI7`" ]
pub struct EXTI7_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI7_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA7 as the source input for the EXTI7 external interrupt" ]
# [ inline ( always ) ]
pub fn pa7 ( self ) -> & 'a mut W { self . variant ( EXTI7_A :: PA7 ) } # [ doc = "Select PB7 as the source input for the EXTI7 external interrupt" ]
# [ inline ( always ) ]
pub fn pb7 ( self ) -> & 'a mut W { self . variant ( EXTI7_A :: PB7 ) } # [ doc = "Select PC7 as the source input for the EXTI7 external interrupt" ]
# [ inline ( always ) ]
pub fn pc7 ( self ) -> & 'a mut W { self . variant ( EXTI7_A :: PC7 ) } # [ doc = "Select PD7 as the source input for the EXTI7 external interrupt" ]
# [ inline ( always ) ]
pub fn pd7 ( self ) -> & 'a mut W { self . variant ( EXTI7_A :: PD7 ) } # [ doc = "Select PE7 as the source input for the EXTI7 external interrupt" ]
# [ inline ( always ) ]
pub fn pe7 ( self ) -> & 'a mut W { self . variant ( EXTI7_A :: PE7 ) } # [ doc = "Select PF7 as the source input for the EXTI7 external interrupt" ]
# [ inline ( always ) ]
pub fn pf7 ( self ) -> & 'a mut W { self . variant ( EXTI7_A :: PF7 ) } # [ doc = "Select PG7 as the source input for the EXTI7 external interrupt" ]
# [ inline ( always ) ]
pub fn pg7 ( self ) -> & 'a mut W { self . variant ( EXTI7_A :: PG7 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "EXTI 6 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI6_A { # [ doc = "0: Select PA6 as the source input for the EXTI6 external interrupt" ]
PA6 = 0 , # [ doc = "1: Select PB6 as the source input for the EXTI6 external interrupt" ]
PB6 = 1 , # [ doc = "2: Select PC6 as the source input for the EXTI6 external interrupt" ]
PC6 = 2 , # [ doc = "3: Select PD6 as the source input for the EXTI6 external interrupt" ]
PD6 = 3 , # [ doc = "4: Select PE6 as the source input for the EXTI6 external interrupt" ]
PE6 = 4 , # [ doc = "5: Select PF6 as the source input for the EXTI6 external interrupt" ]
PF6 = 5 , # [ doc = "6: Select PG6 as the source input for the EXTI6 external interrupt" ]
PG6 = 6 } impl From < EXTI6_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI6_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI6`" ]
pub type EXTI6_R = crate :: R < u8 , EXTI6_A > ; impl EXTI6_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI6_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI6_A :: PA6 ) , 1 => Val ( EXTI6_A :: PB6 ) , 2 => Val ( EXTI6_A :: PC6 ) , 3 => Val ( EXTI6_A :: PD6 ) , 4 => Val ( EXTI6_A :: PE6 ) , 5 => Val ( EXTI6_A :: PF6 ) , 6 => Val ( EXTI6_A :: PG6 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA6`" ]
# [ inline ( always ) ]
pub fn is_pa6 ( & self ) -> bool { * self == EXTI6_A :: PA6 } # [ doc = "Checks if the value of the field is `PB6`" ]
# [ inline ( always ) ]
pub fn is_pb6 ( & self ) -> bool { * self == EXTI6_A :: PB6 } # [ doc = "Checks if the value of the field is `PC6`" ]
# [ inline ( always ) ]
pub fn is_pc6 ( & self ) -> bool { * self == EXTI6_A :: PC6 } # [ doc = "Checks if the value of the field is `PD6`" ]
# [ inline ( always ) ]
pub fn is_pd6 ( & self ) -> bool { * self == EXTI6_A :: PD6 } # [ doc = "Checks if the value of the field is `PE6`" ]
# [ inline ( always ) ]
pub fn is_pe6 ( & self ) -> bool { * self == EXTI6_A :: PE6 } # [ doc = "Checks if the value of the field is `PF6`" ]
# [ inline ( always ) ]
pub fn is_pf6 ( & self ) -> bool { * self == EXTI6_A :: PF6 } # [ doc = "Checks if the value of the field is `PG6`" ]
# [ inline ( always ) ]
pub fn is_pg6 ( & self ) -> bool { * self == EXTI6_A :: PG6 } } # [ doc = "Write proxy for field `EXTI6`" ]
pub struct EXTI6_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI6_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA6 as the source input for the EXTI6 external interrupt" ]
# [ inline ( always ) ]
pub fn pa6 ( self ) -> & 'a mut W { self . variant ( EXTI6_A :: PA6 ) } # [ doc = "Select PB6 as the source input for the EXTI6 external interrupt" ]
# [ inline ( always ) ]
pub fn pb6 ( self ) -> & 'a mut W { self . variant ( EXTI6_A :: PB6 ) } # [ doc = "Select PC6 as the source input for the EXTI6 external interrupt" ]
# [ inline ( always ) ]
pub fn pc6 ( self ) -> & 'a mut W { self . variant ( EXTI6_A :: PC6 ) } # [ doc = "Select PD6 as the source input for the EXTI6 external interrupt" ]
# [ inline ( always ) ]
pub fn pd6 ( self ) -> & 'a mut W { self . variant ( EXTI6_A :: PD6 ) } # [ doc = "Select PE6 as the source input for the EXTI6 external interrupt" ]
# [ inline ( always ) ]
pub fn pe6 ( self ) -> & 'a mut W { self . variant ( EXTI6_A :: PE6 ) } # [ doc = "Select PF6 as the source input for the EXTI6 external interrupt" ]
# [ inline ( always ) ]
pub fn pf6 ( self ) -> & 'a mut W { self . variant ( EXTI6_A :: PF6 ) } # [ doc = "Select PG6 as the source input for the EXTI6 external interrupt" ]
# [ inline ( always ) ]
pub fn pg6 ( self ) -> & 'a mut W { self . variant ( EXTI6_A :: PG6 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "EXTI 5 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI5_A { # [ doc = "0: Select PA5 as the source input for the EXTI5 external interrupt" ]
PA5 = 0 , # [ doc = "1: Select PB5 as the source input for the EXTI5 external interrupt" ]
PB5 = 1 , # [ doc = "2: Select PC5 as the source input for the EXTI5 external interrupt" ]
PC5 = 2 , # [ doc = "3: Select PD5 as the source input for the EXTI5 external interrupt" ]
PD5 = 3 , # [ doc = "4: Select PE5 as the source input for the EXTI5 external interrupt" ]
PE5 = 4 , # [ doc = "5: Select PF5 as the source input for the EXTI5 external interrupt" ]
PF5 = 5 , # [ doc = "6: Select PG5 as the source input for the EXTI5 external interrupt" ]
PG5 = 6 } impl From < EXTI5_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI5_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI5`" ]
pub type EXTI5_R = crate :: R < u8 , EXTI5_A > ; impl EXTI5_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI5_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI5_A :: PA5 ) , 1 => Val ( EXTI5_A :: PB5 ) , 2 => Val ( EXTI5_A :: PC5 ) , 3 => Val ( EXTI5_A :: PD5 ) , 4 => Val ( EXTI5_A :: PE5 ) , 5 => Val ( EXTI5_A :: PF5 ) , 6 => Val ( EXTI5_A :: PG5 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA5`" ]
# [ inline ( always ) ]
pub fn is_pa5 ( & self ) -> bool { * self == EXTI5_A :: PA5 } # [ doc = "Checks if the value of the field is `PB5`" ]
# [ inline ( always ) ]
pub fn is_pb5 ( & self ) -> bool { * self == EXTI5_A :: PB5 } # [ doc = "Checks if the value of the field is `PC5`" ]
# [ inline ( always ) ]
pub fn is_pc5 ( & self ) -> bool { * self == EXTI5_A :: PC5 } # [ doc = "Checks if the value of the field is `PD5`" ]
# [ inline ( always ) ]
pub fn is_pd5 ( & self ) -> bool { * self == EXTI5_A :: PD5 } # [ doc = "Checks if the value of the field is `PE5`" ]
# [ inline ( always ) ]
pub fn is_pe5 ( & self ) -> bool { * self == EXTI5_A :: PE5 } # [ doc = "Checks if the value of the field is `PF5`" ]
# [ inline ( always ) ]
pub fn is_pf5 ( & self ) -> bool { * self == EXTI5_A :: PF5 } # [ doc = "Checks if the value of the field is `PG5`" ]
# [ inline ( always ) ]
pub fn is_pg5 ( & self ) -> bool { * self == EXTI5_A :: PG5 } } # [ doc = "Write proxy for field `EXTI5`" ]
pub struct EXTI5_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI5_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA5 as the source input for the EXTI5 external interrupt" ]
# [ inline ( always ) ]
pub fn pa5 ( self ) -> & 'a mut W { self . variant ( EXTI5_A :: PA5 ) } # [ doc = "Select PB5 as the source input for the EXTI5 external interrupt" ]
# [ inline ( always ) ]
pub fn pb5 ( self ) -> & 'a mut W { self . variant ( EXTI5_A :: PB5 ) } # [ doc = "Select PC5 as the source input for the EXTI5 external interrupt" ]
# [ inline ( always ) ]
pub fn pc5 ( self ) -> & 'a mut W { self . variant ( EXTI5_A :: PC5 ) } # [ doc = "Select PD5 as the source input for the EXTI5 external interrupt" ]
# [ inline ( always ) ]
pub fn pd5 ( self ) -> & 'a mut W { self . variant ( EXTI5_A :: PD5 ) } # [ doc = "Select PE5 as the source input for the EXTI5 external interrupt" ]
# [ inline ( always ) ]
pub fn pe5 ( self ) -> & 'a mut W { self . variant ( EXTI5_A :: PE5 ) } # [ doc = "Select PF5 as the source input for the EXTI5 external interrupt" ]
# [ inline ( always ) ]
pub fn pf5 ( self ) -> & 'a mut W { self . variant ( EXTI5_A :: PF5 ) } # [ doc = "Select PG5 as the source input for the EXTI5 external interrupt" ]
# [ inline ( always ) ]
pub fn pg5 ( self ) -> & 'a mut W { self . variant ( EXTI5_A :: PG5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "EXTI 4 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI4_A { # [ doc = "0: Select PA4 as the source input for the EXTI4 external interrupt" ]
PA4 = 0 , # [ doc = "1: Select PB4 as the source input for the EXTI4 external interrupt" ]
PB4 = 1 , # [ doc = "2: Select PC4 as the source input for the EXTI4 external interrupt" ]
PC4 = 2 , # [ doc = "3: Select PD4 as the source input for the EXTI4 external interrupt" ]
PD4 = 3 , # [ doc = "4: Select PE4 as the source input for the EXTI4 external interrupt" ]
PE4 = 4 , # [ doc = "5: Select PF4 as the source input for the EXTI4 external interrupt" ]
PF4 = 5 , # [ doc = "6: Select PG4 as the source input for the EXTI4 external interrupt" ]
PG4 = 6 } impl From < EXTI4_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI4_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI4`" ]
pub type EXTI4_R = crate :: R < u8 , EXTI4_A > ; impl EXTI4_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI4_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI4_A :: PA4 ) , 1 => Val ( EXTI4_A :: PB4 ) , 2 => Val ( EXTI4_A :: PC4 ) , 3 => Val ( EXTI4_A :: PD4 ) , 4 => Val ( EXTI4_A :: PE4 ) , 5 => Val ( EXTI4_A :: PF4 ) , 6 => Val ( EXTI4_A :: PG4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA4`" ]
# [ inline ( always ) ]
pub fn is_pa4 ( & self ) -> bool { * self == EXTI4_A :: PA4 } # [ doc = "Checks if the value of the field is `PB4`" ]
# [ inline ( always ) ]
pub fn is_pb4 ( & self ) -> bool { * self == EXTI4_A :: PB4 } # [ doc = "Checks if the value of the field is `PC4`" ]
# [ inline ( always ) ]
pub fn is_pc4 ( & self ) -> bool { * self == EXTI4_A :: PC4 } # [ doc = "Checks if the value of the field is `PD4`" ]
# [ inline ( always ) ]
pub fn is_pd4 ( & self ) -> bool { * self == EXTI4_A :: PD4 } # [ doc = "Checks if the value of the field is `PE4`" ]
# [ inline ( always ) ]
pub fn is_pe4 ( & self ) -> bool { * self == EXTI4_A :: PE4 } # [ doc = "Checks if the value of the field is `PF4`" ]
# [ inline ( always ) ]
pub fn is_pf4 ( & self ) -> bool { * self == EXTI4_A :: PF4 } # [ doc = "Checks if the value of the field is `PG4`" ]
# [ inline ( always ) ]
pub fn is_pg4 ( & self ) -> bool { * self == EXTI4_A :: PG4 } } # [ doc = "Write proxy for field `EXTI4`" ]
pub struct EXTI4_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI4_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA4 as the source input for the EXTI4 external interrupt" ]
# [ inline ( always ) ]
pub fn pa4 ( self ) -> & 'a mut W { self . variant ( EXTI4_A :: PA4 ) } # [ doc = "Select PB4 as the source input for the EXTI4 external interrupt" ]
# [ inline ( always ) ]
pub fn pb4 ( self ) -> & 'a mut W { self . variant ( EXTI4_A :: PB4 ) } # [ doc = "Select PC4 as the source input for the EXTI4 external interrupt" ]
# [ inline ( always ) ]
pub fn pc4 ( self ) -> & 'a mut W { self . variant ( EXTI4_A :: PC4 ) } # [ doc = "Select PD4 as the source input for the EXTI4 external interrupt" ]
# [ inline ( always ) ]
pub fn pd4 ( self ) -> & 'a mut W { self . variant ( EXTI4_A :: PD4 ) } # [ doc = "Select PE4 as the source input for the EXTI4 external interrupt" ]
# [ inline ( always ) ]
pub fn pe4 ( self ) -> & 'a mut W { self . variant ( EXTI4_A :: PE4 ) } # [ doc = "Select PF4 as the source input for the EXTI4 external interrupt" ]
# [ inline ( always ) ]
pub fn pf4 ( self ) -> & 'a mut W { self . variant ( EXTI4_A :: PF4 ) } # [ doc = "Select PG4 as the source input for the EXTI4 external interrupt" ]
# [ inline ( always ) ]
pub fn pg4 ( self ) -> & 'a mut W { self . variant ( EXTI4_A :: PG4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 12:15 - EXTI 7 configuration bits" ]
# [ inline ( always ) ]
pub fn exti7 ( & self ) -> EXTI7_R { EXTI7_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - EXTI 6 configuration bits" ]
# [ inline ( always ) ]
pub fn exti6 ( & self ) -> EXTI6_R { EXTI6_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - EXTI 5 configuration bits" ]
# [ inline ( always ) ]
pub fn exti5 ( & self ) -> EXTI5_R { EXTI5_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - EXTI 4 configuration bits" ]
# [ inline ( always ) ]
pub fn exti4 ( & self ) -> EXTI4_R { EXTI4_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - EXTI 7 configuration bits" ]
# [ inline ( always ) ]
pub fn exti7 ( & mut self ) -> EXTI7_W { EXTI7_W { w : self } } # [ doc = "Bits 8:11 - EXTI 6 configuration bits" ]
# [ inline ( always ) ]
pub fn exti6 ( & mut self ) -> EXTI6_W { EXTI6_W { w : self } } # [ doc = "Bits 4:7 - EXTI 5 configuration bits" ]
# [ inline ( always ) ]
pub fn exti5 ( & mut self ) -> EXTI5_W { EXTI5_W { w : self } } # [ doc = "Bits 0:3 - EXTI 4 configuration bits" ]
# [ inline ( always ) ]
pub fn exti4 ( & mut self ) -> EXTI4_W { EXTI4_W { w : self } } } } # [ doc = "external interrupt configuration register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr3](exticr3) module" ]
pub type EXTICR3 = crate :: Reg < u32 , _EXTICR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EXTICR3 ; # [ doc = "`read()` method returns [exticr3::R](exticr3::R) reader structure" ]
impl crate :: Readable for EXTICR3 { } # [ doc = "`write(|w| ..)` method takes [exticr3::W](exticr3::W) writer structure" ]
impl crate :: Writable for EXTICR3 { } # [ doc = "external interrupt configuration register 3" ]
pub mod exticr3 { # [ doc = "Reader of register EXTICR3" ]
pub type R = crate :: R < u32 , super :: EXTICR3 > ; # [ doc = "Writer for register EXTICR3" ]
pub type W = crate :: W < u32 , super :: EXTICR3 > ; # [ doc = "Register EXTICR3 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EXTICR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "EXTI 11 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI11_A { # [ doc = "0: Select PA11 as the source input for the EXTI11 external interrupt" ]
PA11 = 0 , # [ doc = "1: Select PB11 as the source input for the EXTI11 external interrupt" ]
PB11 = 1 , # [ doc = "2: Select PC11 as the source input for the EXTI11 external interrupt" ]
PC11 = 2 , # [ doc = "3: Select PD11 as the source input for the EXTI11 external interrupt" ]
PD11 = 3 , # [ doc = "4: Select PE11 as the source input for the EXTI11 external interrupt" ]
PE11 = 4 , # [ doc = "5: Select PF11 as the source input for the EXTI11 external interrupt" ]
PF11 = 5 , # [ doc = "6: Select PG11 as the source input for the EXTI11 external interrupt" ]
PG11 = 6 } impl From < EXTI11_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI11_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI11`" ]
pub type EXTI11_R = crate :: R < u8 , EXTI11_A > ; impl EXTI11_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI11_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI11_A :: PA11 ) , 1 => Val ( EXTI11_A :: PB11 ) , 2 => Val ( EXTI11_A :: PC11 ) , 3 => Val ( EXTI11_A :: PD11 ) , 4 => Val ( EXTI11_A :: PE11 ) , 5 => Val ( EXTI11_A :: PF11 ) , 6 => Val ( EXTI11_A :: PG11 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA11`" ]
# [ inline ( always ) ]
pub fn is_pa11 ( & self ) -> bool { * self == EXTI11_A :: PA11 } # [ doc = "Checks if the value of the field is `PB11`" ]
# [ inline ( always ) ]
pub fn is_pb11 ( & self ) -> bool { * self == EXTI11_A :: PB11 } # [ doc = "Checks if the value of the field is `PC11`" ]
# [ inline ( always ) ]
pub fn is_pc11 ( & self ) -> bool { * self == EXTI11_A :: PC11 } # [ doc = "Checks if the value of the field is `PD11`" ]
# [ inline ( always ) ]
pub fn is_pd11 ( & self ) -> bool { * self == EXTI11_A :: PD11 } # [ doc = "Checks if the value of the field is `PE11`" ]
# [ inline ( always ) ]
pub fn is_pe11 ( & self ) -> bool { * self == EXTI11_A :: PE11 } # [ doc = "Checks if the value of the field is `PF11`" ]
# [ inline ( always ) ]
pub fn is_pf11 ( & self ) -> bool { * self == EXTI11_A :: PF11 } # [ doc = "Checks if the value of the field is `PG11`" ]
# [ inline ( always ) ]
pub fn is_pg11 ( & self ) -> bool { * self == EXTI11_A :: PG11 } } # [ doc = "Write proxy for field `EXTI11`" ]
pub struct EXTI11_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI11_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA11 as the source input for the EXTI11 external interrupt" ]
# [ inline ( always ) ]
pub fn pa11 ( self ) -> & 'a mut W { self . variant ( EXTI11_A :: PA11 ) } # [ doc = "Select PB11 as the source input for the EXTI11 external interrupt" ]
# [ inline ( always ) ]
pub fn pb11 ( self ) -> & 'a mut W { self . variant ( EXTI11_A :: PB11 ) } # [ doc = "Select PC11 as the source input for the EXTI11 external interrupt" ]
# [ inline ( always ) ]
pub fn pc11 ( self ) -> & 'a mut W { self . variant ( EXTI11_A :: PC11 ) } # [ doc = "Select PD11 as the source input for the EXTI11 external interrupt" ]
# [ inline ( always ) ]
pub fn pd11 ( self ) -> & 'a mut W { self . variant ( EXTI11_A :: PD11 ) } # [ doc = "Select PE11 as the source input for the EXTI11 external interrupt" ]
# [ inline ( always ) ]
pub fn pe11 ( self ) -> & 'a mut W { self . variant ( EXTI11_A :: PE11 ) } # [ doc = "Select PF11 as the source input for the EXTI11 external interrupt" ]
# [ inline ( always ) ]
pub fn pf11 ( self ) -> & 'a mut W { self . variant ( EXTI11_A :: PF11 ) } # [ doc = "Select PG11 as the source input for the EXTI11 external interrupt" ]
# [ inline ( always ) ]
pub fn pg11 ( self ) -> & 'a mut W { self . variant ( EXTI11_A :: PG11 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "EXTI 10 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI10_A { # [ doc = "0: Select PA10 as the source input for the EXTI10 external interrupt" ]
PA10 = 0 , # [ doc = "1: Select PB10 as the source input for the EXTI10 external interrupt" ]
PB10 = 1 , # [ doc = "2: Select PC10 as the source input for the EXTI10 external interrupt" ]
PC10 = 2 , # [ doc = "3: Select PD10 as the source input for the EXTI10 external interrupt" ]
PD10 = 3 , # [ doc = "4: Select PE10 as the source input for the EXTI10 external interrupt" ]
PE10 = 4 , # [ doc = "5: Select PF10 as the source input for the EXTI10 external interrupt" ]
PF10 = 5 , # [ doc = "6: Select PG10 as the source input for the EXTI10 external interrupt" ]
PG10 = 6 } impl From < EXTI10_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI10_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI10`" ]
pub type EXTI10_R = crate :: R < u8 , EXTI10_A > ; impl EXTI10_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI10_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI10_A :: PA10 ) , 1 => Val ( EXTI10_A :: PB10 ) , 2 => Val ( EXTI10_A :: PC10 ) , 3 => Val ( EXTI10_A :: PD10 ) , 4 => Val ( EXTI10_A :: PE10 ) , 5 => Val ( EXTI10_A :: PF10 ) , 6 => Val ( EXTI10_A :: PG10 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA10`" ]
# [ inline ( always ) ]
pub fn is_pa10 ( & self ) -> bool { * self == EXTI10_A :: PA10 } # [ doc = "Checks if the value of the field is `PB10`" ]
# [ inline ( always ) ]
pub fn is_pb10 ( & self ) -> bool { * self == EXTI10_A :: PB10 } # [ doc = "Checks if the value of the field is `PC10`" ]
# [ inline ( always ) ]
pub fn is_pc10 ( & self ) -> bool { * self == EXTI10_A :: PC10 } # [ doc = "Checks if the value of the field is `PD10`" ]
# [ inline ( always ) ]
pub fn is_pd10 ( & self ) -> bool { * self == EXTI10_A :: PD10 } # [ doc = "Checks if the value of the field is `PE10`" ]
# [ inline ( always ) ]
pub fn is_pe10 ( & self ) -> bool { * self == EXTI10_A :: PE10 } # [ doc = "Checks if the value of the field is `PF10`" ]
# [ inline ( always ) ]
pub fn is_pf10 ( & self ) -> bool { * self == EXTI10_A :: PF10 } # [ doc = "Checks if the value of the field is `PG10`" ]
# [ inline ( always ) ]
pub fn is_pg10 ( & self ) -> bool { * self == EXTI10_A :: PG10 } } # [ doc = "Write proxy for field `EXTI10`" ]
pub struct EXTI10_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI10_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA10 as the source input for the EXTI10 external interrupt" ]
# [ inline ( always ) ]
pub fn pa10 ( self ) -> & 'a mut W { self . variant ( EXTI10_A :: PA10 ) } # [ doc = "Select PB10 as the source input for the EXTI10 external interrupt" ]
# [ inline ( always ) ]
pub fn pb10 ( self ) -> & 'a mut W { self . variant ( EXTI10_A :: PB10 ) } # [ doc = "Select PC10 as the source input for the EXTI10 external interrupt" ]
# [ inline ( always ) ]
pub fn pc10 ( self ) -> & 'a mut W { self . variant ( EXTI10_A :: PC10 ) } # [ doc = "Select PD10 as the source input for the EXTI10 external interrupt" ]
# [ inline ( always ) ]
pub fn pd10 ( self ) -> & 'a mut W { self . variant ( EXTI10_A :: PD10 ) } # [ doc = "Select PE10 as the source input for the EXTI10 external interrupt" ]
# [ inline ( always ) ]
pub fn pe10 ( self ) -> & 'a mut W { self . variant ( EXTI10_A :: PE10 ) } # [ doc = "Select PF10 as the source input for the EXTI10 external interrupt" ]
# [ inline ( always ) ]
pub fn pf10 ( self ) -> & 'a mut W { self . variant ( EXTI10_A :: PF10 ) } # [ doc = "Select PG10 as the source input for the EXTI10 external interrupt" ]
# [ inline ( always ) ]
pub fn pg10 ( self ) -> & 'a mut W { self . variant ( EXTI10_A :: PG10 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "EXTI 9 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI9_A { # [ doc = "0: Select PA9 as the source input for the EXTI9 external interrupt" ]
PA9 = 0 , # [ doc = "1: Select PB9 as the source input for the EXTI9 external interrupt" ]
PB9 = 1 , # [ doc = "2: Select PC9 as the source input for the EXTI9 external interrupt" ]
PC9 = 2 , # [ doc = "3: Select PD9 as the source input for the EXTI9 external interrupt" ]
PD9 = 3 , # [ doc = "4: Select PE9 as the source input for the EXTI9 external interrupt" ]
PE9 = 4 , # [ doc = "5: Select PF9 as the source input for the EXTI9 external interrupt" ]
PF9 = 5 , # [ doc = "6: Select PG9 as the source input for the EXTI9 external interrupt" ]
PG9 = 6 } impl From < EXTI9_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI9_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI9`" ]
pub type EXTI9_R = crate :: R < u8 , EXTI9_A > ; impl EXTI9_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI9_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI9_A :: PA9 ) , 1 => Val ( EXTI9_A :: PB9 ) , 2 => Val ( EXTI9_A :: PC9 ) , 3 => Val ( EXTI9_A :: PD9 ) , 4 => Val ( EXTI9_A :: PE9 ) , 5 => Val ( EXTI9_A :: PF9 ) , 6 => Val ( EXTI9_A :: PG9 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA9`" ]
# [ inline ( always ) ]
pub fn is_pa9 ( & self ) -> bool { * self == EXTI9_A :: PA9 } # [ doc = "Checks if the value of the field is `PB9`" ]
# [ inline ( always ) ]
pub fn is_pb9 ( & self ) -> bool { * self == EXTI9_A :: PB9 } # [ doc = "Checks if the value of the field is `PC9`" ]
# [ inline ( always ) ]
pub fn is_pc9 ( & self ) -> bool { * self == EXTI9_A :: PC9 } # [ doc = "Checks if the value of the field is `PD9`" ]
# [ inline ( always ) ]
pub fn is_pd9 ( & self ) -> bool { * self == EXTI9_A :: PD9 } # [ doc = "Checks if the value of the field is `PE9`" ]
# [ inline ( always ) ]
pub fn is_pe9 ( & self ) -> bool { * self == EXTI9_A :: PE9 } # [ doc = "Checks if the value of the field is `PF9`" ]
# [ inline ( always ) ]
pub fn is_pf9 ( & self ) -> bool { * self == EXTI9_A :: PF9 } # [ doc = "Checks if the value of the field is `PG9`" ]
# [ inline ( always ) ]
pub fn is_pg9 ( & self ) -> bool { * self == EXTI9_A :: PG9 } } # [ doc = "Write proxy for field `EXTI9`" ]
pub struct EXTI9_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI9_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA9 as the source input for the EXTI9 external interrupt" ]
# [ inline ( always ) ]
pub fn pa9 ( self ) -> & 'a mut W { self . variant ( EXTI9_A :: PA9 ) } # [ doc = "Select PB9 as the source input for the EXTI9 external interrupt" ]
# [ inline ( always ) ]
pub fn pb9 ( self ) -> & 'a mut W { self . variant ( EXTI9_A :: PB9 ) } # [ doc = "Select PC9 as the source input for the EXTI9 external interrupt" ]
# [ inline ( always ) ]
pub fn pc9 ( self ) -> & 'a mut W { self . variant ( EXTI9_A :: PC9 ) } # [ doc = "Select PD9 as the source input for the EXTI9 external interrupt" ]
# [ inline ( always ) ]
pub fn pd9 ( self ) -> & 'a mut W { self . variant ( EXTI9_A :: PD9 ) } # [ doc = "Select PE9 as the source input for the EXTI9 external interrupt" ]
# [ inline ( always ) ]
pub fn pe9 ( self ) -> & 'a mut W { self . variant ( EXTI9_A :: PE9 ) } # [ doc = "Select PF9 as the source input for the EXTI9 external interrupt" ]
# [ inline ( always ) ]
pub fn pf9 ( self ) -> & 'a mut W { self . variant ( EXTI9_A :: PF9 ) } # [ doc = "Select PG9 as the source input for the EXTI9 external interrupt" ]
# [ inline ( always ) ]
pub fn pg9 ( self ) -> & 'a mut W { self . variant ( EXTI9_A :: PG9 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "EXTI 8 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI8_A { # [ doc = "0: Select PA8 as the source input for the EXTI8 external interrupt" ]
PA8 = 0 , # [ doc = "1: Select PB8 as the source input for the EXTI8 external interrupt" ]
PB8 = 1 , # [ doc = "2: Select PC8 as the source input for the EXTI8 external interrupt" ]
PC8 = 2 , # [ doc = "3: Select PD8 as the source input for the EXTI8 external interrupt" ]
PD8 = 3 , # [ doc = "4: Select PE8 as the source input for the EXTI8 external interrupt" ]
PE8 = 4 , # [ doc = "5: Select PF8 as the source input for the EXTI8 external interrupt" ]
PF8 = 5 , # [ doc = "6: Select PG8 as the source input for the EXTI8 external interrupt" ]
PG8 = 6 } impl From < EXTI8_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI8_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI8`" ]
pub type EXTI8_R = crate :: R < u8 , EXTI8_A > ; impl EXTI8_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI8_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI8_A :: PA8 ) , 1 => Val ( EXTI8_A :: PB8 ) , 2 => Val ( EXTI8_A :: PC8 ) , 3 => Val ( EXTI8_A :: PD8 ) , 4 => Val ( EXTI8_A :: PE8 ) , 5 => Val ( EXTI8_A :: PF8 ) , 6 => Val ( EXTI8_A :: PG8 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA8`" ]
# [ inline ( always ) ]
pub fn is_pa8 ( & self ) -> bool { * self == EXTI8_A :: PA8 } # [ doc = "Checks if the value of the field is `PB8`" ]
# [ inline ( always ) ]
pub fn is_pb8 ( & self ) -> bool { * self == EXTI8_A :: PB8 } # [ doc = "Checks if the value of the field is `PC8`" ]
# [ inline ( always ) ]
pub fn is_pc8 ( & self ) -> bool { * self == EXTI8_A :: PC8 } # [ doc = "Checks if the value of the field is `PD8`" ]
# [ inline ( always ) ]
pub fn is_pd8 ( & self ) -> bool { * self == EXTI8_A :: PD8 } # [ doc = "Checks if the value of the field is `PE8`" ]
# [ inline ( always ) ]
pub fn is_pe8 ( & self ) -> bool { * self == EXTI8_A :: PE8 } # [ doc = "Checks if the value of the field is `PF8`" ]
# [ inline ( always ) ]
pub fn is_pf8 ( & self ) -> bool { * self == EXTI8_A :: PF8 } # [ doc = "Checks if the value of the field is `PG8`" ]
# [ inline ( always ) ]
pub fn is_pg8 ( & self ) -> bool { * self == EXTI8_A :: PG8 } } # [ doc = "Write proxy for field `EXTI8`" ]
pub struct EXTI8_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI8_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA8 as the source input for the EXTI8 external interrupt" ]
# [ inline ( always ) ]
pub fn pa8 ( self ) -> & 'a mut W { self . variant ( EXTI8_A :: PA8 ) } # [ doc = "Select PB8 as the source input for the EXTI8 external interrupt" ]
# [ inline ( always ) ]
pub fn pb8 ( self ) -> & 'a mut W { self . variant ( EXTI8_A :: PB8 ) } # [ doc = "Select PC8 as the source input for the EXTI8 external interrupt" ]
# [ inline ( always ) ]
pub fn pc8 ( self ) -> & 'a mut W { self . variant ( EXTI8_A :: PC8 ) } # [ doc = "Select PD8 as the source input for the EXTI8 external interrupt" ]
# [ inline ( always ) ]
pub fn pd8 ( self ) -> & 'a mut W { self . variant ( EXTI8_A :: PD8 ) } # [ doc = "Select PE8 as the source input for the EXTI8 external interrupt" ]
# [ inline ( always ) ]
pub fn pe8 ( self ) -> & 'a mut W { self . variant ( EXTI8_A :: PE8 ) } # [ doc = "Select PF8 as the source input for the EXTI8 external interrupt" ]
# [ inline ( always ) ]
pub fn pf8 ( self ) -> & 'a mut W { self . variant ( EXTI8_A :: PF8 ) } # [ doc = "Select PG8 as the source input for the EXTI8 external interrupt" ]
# [ inline ( always ) ]
pub fn pg8 ( self ) -> & 'a mut W { self . variant ( EXTI8_A :: PG8 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 12:15 - EXTI 11 configuration bits" ]
# [ inline ( always ) ]
pub fn exti11 ( & self ) -> EXTI11_R { EXTI11_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - EXTI 10 configuration bits" ]
# [ inline ( always ) ]
pub fn exti10 ( & self ) -> EXTI10_R { EXTI10_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - EXTI 9 configuration bits" ]
# [ inline ( always ) ]
pub fn exti9 ( & self ) -> EXTI9_R { EXTI9_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - EXTI 8 configuration bits" ]
# [ inline ( always ) ]
pub fn exti8 ( & self ) -> EXTI8_R { EXTI8_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - EXTI 11 configuration bits" ]
# [ inline ( always ) ]
pub fn exti11 ( & mut self ) -> EXTI11_W { EXTI11_W { w : self } } # [ doc = "Bits 8:11 - EXTI 10 configuration bits" ]
# [ inline ( always ) ]
pub fn exti10 ( & mut self ) -> EXTI10_W { EXTI10_W { w : self } } # [ doc = "Bits 4:7 - EXTI 9 configuration bits" ]
# [ inline ( always ) ]
pub fn exti9 ( & mut self ) -> EXTI9_W { EXTI9_W { w : self } } # [ doc = "Bits 0:3 - EXTI 8 configuration bits" ]
# [ inline ( always ) ]
pub fn exti8 ( & mut self ) -> EXTI8_W { EXTI8_W { w : self } } } } # [ doc = "external interrupt configuration register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr4](exticr4) module" ]
pub type EXTICR4 = crate :: Reg < u32 , _EXTICR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _EXTICR4 ; # [ doc = "`read()` method returns [exticr4::R](exticr4::R) reader structure" ]
impl crate :: Readable for EXTICR4 { } # [ doc = "`write(|w| ..)` method takes [exticr4::W](exticr4::W) writer structure" ]
impl crate :: Writable for EXTICR4 { } # [ doc = "external interrupt configuration register 4" ]
pub mod exticr4 { # [ doc = "Reader of register EXTICR4" ]
pub type R = crate :: R < u32 , super :: EXTICR4 > ; # [ doc = "Writer for register EXTICR4" ]
pub type W = crate :: W < u32 , super :: EXTICR4 > ; # [ doc = "Register EXTICR4 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: EXTICR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "EXTI 15 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI15_A { # [ doc = "0: Select PA15 as the source input for the EXTI15 external interrupt" ]
PA15 = 0 , # [ doc = "1: Select PB15 as the source input for the EXTI15 external interrupt" ]
PB15 = 1 , # [ doc = "2: Select PC15 as the source input for the EXTI15 external interrupt" ]
PC15 = 2 , # [ doc = "3: Select PD15 as the source input for the EXTI15 external interrupt" ]
PD15 = 3 , # [ doc = "4: Select PE15 as the source input for the EXTI15 external interrupt" ]
PE15 = 4 , # [ doc = "5: Select PF15 as the source input for the EXTI15 external interrupt" ]
PF15 = 5 , # [ doc = "6: Select PG15 as the source input for the EXTI15 external interrupt" ]
PG15 = 6 } impl From < EXTI15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI15`" ]
pub type EXTI15_R = crate :: R < u8 , EXTI15_A > ; impl EXTI15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI15_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI15_A :: PA15 ) , 1 => Val ( EXTI15_A :: PB15 ) , 2 => Val ( EXTI15_A :: PC15 ) , 3 => Val ( EXTI15_A :: PD15 ) , 4 => Val ( EXTI15_A :: PE15 ) , 5 => Val ( EXTI15_A :: PF15 ) , 6 => Val ( EXTI15_A :: PG15 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA15`" ]
# [ inline ( always ) ]
pub fn is_pa15 ( & self ) -> bool { * self == EXTI15_A :: PA15 } # [ doc = "Checks if the value of the field is `PB15`" ]
# [ inline ( always ) ]
pub fn is_pb15 ( & self ) -> bool { * self == EXTI15_A :: PB15 } # [ doc = "Checks if the value of the field is `PC15`" ]
# [ inline ( always ) ]
pub fn is_pc15 ( & self ) -> bool { * self == EXTI15_A :: PC15 } # [ doc = "Checks if the value of the field is `PD15`" ]
# [ inline ( always ) ]
pub fn is_pd15 ( & self ) -> bool { * self == EXTI15_A :: PD15 } # [ doc = "Checks if the value of the field is `PE15`" ]
# [ inline ( always ) ]
pub fn is_pe15 ( & self ) -> bool { * self == EXTI15_A :: PE15 } # [ doc = "Checks if the value of the field is `PF15`" ]
# [ inline ( always ) ]
pub fn is_pf15 ( & self ) -> bool { * self == EXTI15_A :: PF15 } # [ doc = "Checks if the value of the field is `PG15`" ]
# [ inline ( always ) ]
pub fn is_pg15 ( & self ) -> bool { * self == EXTI15_A :: PG15 } } # [ doc = "Write proxy for field `EXTI15`" ]
pub struct EXTI15_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI15_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA15 as the source input for the EXTI15 external interrupt" ]
# [ inline ( always ) ]
pub fn pa15 ( self ) -> & 'a mut W { self . variant ( EXTI15_A :: PA15 ) } # [ doc = "Select PB15 as the source input for the EXTI15 external interrupt" ]
# [ inline ( always ) ]
pub fn pb15 ( self ) -> & 'a mut W { self . variant ( EXTI15_A :: PB15 ) } # [ doc = "Select PC15 as the source input for the EXTI15 external interrupt" ]
# [ inline ( always ) ]
pub fn pc15 ( self ) -> & 'a mut W { self . variant ( EXTI15_A :: PC15 ) } # [ doc = "Select PD15 as the source input for the EXTI15 external interrupt" ]
# [ inline ( always ) ]
pub fn pd15 ( self ) -> & 'a mut W { self . variant ( EXTI15_A :: PD15 ) } # [ doc = "Select PE15 as the source input for the EXTI15 external interrupt" ]
# [ inline ( always ) ]
pub fn pe15 ( self ) -> & 'a mut W { self . variant ( EXTI15_A :: PE15 ) } # [ doc = "Select PF15 as the source input for the EXTI15 external interrupt" ]
# [ inline ( always ) ]
pub fn pf15 ( self ) -> & 'a mut W { self . variant ( EXTI15_A :: PF15 ) } # [ doc = "Select PG15 as the source input for the EXTI15 external interrupt" ]
# [ inline ( always ) ]
pub fn pg15 ( self ) -> & 'a mut W { self . variant ( EXTI15_A :: PG15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "EXTI 14 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI14_A { # [ doc = "0: Select PA14 as the source input for the EXTI14 external interrupt" ]
PA14 = 0 , # [ doc = "1: Select PB14 as the source input for the EXTI14 external interrupt" ]
PB14 = 1 , # [ doc = "2: Select PC14 as the source input for the EXTI14 external interrupt" ]
PC14 = 2 , # [ doc = "3: Select PD14 as the source input for the EXTI14 external interrupt" ]
PD14 = 3 , # [ doc = "4: Select PE14 as the source input for the EXTI14 external interrupt" ]
PE14 = 4 , # [ doc = "5: Select PF14 as the source input for the EXTI14 external interrupt" ]
PF14 = 5 , # [ doc = "6: Select PG14 as the source input for the EXTI14 external interrupt" ]
PG14 = 6 } impl From < EXTI14_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI14_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI14`" ]
pub type EXTI14_R = crate :: R < u8 , EXTI14_A > ; impl EXTI14_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI14_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI14_A :: PA14 ) , 1 => Val ( EXTI14_A :: PB14 ) , 2 => Val ( EXTI14_A :: PC14 ) , 3 => Val ( EXTI14_A :: PD14 ) , 4 => Val ( EXTI14_A :: PE14 ) , 5 => Val ( EXTI14_A :: PF14 ) , 6 => Val ( EXTI14_A :: PG14 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA14`" ]
# [ inline ( always ) ]
pub fn is_pa14 ( & self ) -> bool { * self == EXTI14_A :: PA14 } # [ doc = "Checks if the value of the field is `PB14`" ]
# [ inline ( always ) ]
pub fn is_pb14 ( & self ) -> bool { * self == EXTI14_A :: PB14 } # [ doc = "Checks if the value of the field is `PC14`" ]
# [ inline ( always ) ]
pub fn is_pc14 ( & self ) -> bool { * self == EXTI14_A :: PC14 } # [ doc = "Checks if the value of the field is `PD14`" ]
# [ inline ( always ) ]
pub fn is_pd14 ( & self ) -> bool { * self == EXTI14_A :: PD14 } # [ doc = "Checks if the value of the field is `PE14`" ]
# [ inline ( always ) ]
pub fn is_pe14 ( & self ) -> bool { * self == EXTI14_A :: PE14 } # [ doc = "Checks if the value of the field is `PF14`" ]
# [ inline ( always ) ]
pub fn is_pf14 ( & self ) -> bool { * self == EXTI14_A :: PF14 } # [ doc = "Checks if the value of the field is `PG14`" ]
# [ inline ( always ) ]
pub fn is_pg14 ( & self ) -> bool { * self == EXTI14_A :: PG14 } } # [ doc = "Write proxy for field `EXTI14`" ]
pub struct EXTI14_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI14_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA14 as the source input for the EXTI14 external interrupt" ]
# [ inline ( always ) ]
pub fn pa14 ( self ) -> & 'a mut W { self . variant ( EXTI14_A :: PA14 ) } # [ doc = "Select PB14 as the source input for the EXTI14 external interrupt" ]
# [ inline ( always ) ]
pub fn pb14 ( self ) -> & 'a mut W { self . variant ( EXTI14_A :: PB14 ) } # [ doc = "Select PC14 as the source input for the EXTI14 external interrupt" ]
# [ inline ( always ) ]
pub fn pc14 ( self ) -> & 'a mut W { self . variant ( EXTI14_A :: PC14 ) } # [ doc = "Select PD14 as the source input for the EXTI14 external interrupt" ]
# [ inline ( always ) ]
pub fn pd14 ( self ) -> & 'a mut W { self . variant ( EXTI14_A :: PD14 ) } # [ doc = "Select PE14 as the source input for the EXTI14 external interrupt" ]
# [ inline ( always ) ]
pub fn pe14 ( self ) -> & 'a mut W { self . variant ( EXTI14_A :: PE14 ) } # [ doc = "Select PF14 as the source input for the EXTI14 external interrupt" ]
# [ inline ( always ) ]
pub fn pf14 ( self ) -> & 'a mut W { self . variant ( EXTI14_A :: PF14 ) } # [ doc = "Select PG14 as the source input for the EXTI14 external interrupt" ]
# [ inline ( always ) ]
pub fn pg14 ( self ) -> & 'a mut W { self . variant ( EXTI14_A :: PG14 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "EXTI 13 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI13_A { # [ doc = "0: Select PA13 as the source input for the EXTI13 external interrupt" ]
PA13 = 0 , # [ doc = "1: Select PB13 as the source input for the EXTI13 external interrupt" ]
PB13 = 1 , # [ doc = "2: Select PC13 as the source input for the EXTI13 external interrupt" ]
PC13 = 2 , # [ doc = "3: Select PD13 as the source input for the EXTI13 external interrupt" ]
PD13 = 3 , # [ doc = "4: Select PE13 as the source input for the EXTI13 external interrupt" ]
PE13 = 4 , # [ doc = "5: Select PF13 as the source input for the EXTI13 external interrupt" ]
PF13 = 5 , # [ doc = "6: Select PG13 as the source input for the EXTI13 external interrupt" ]
PG13 = 6 } impl From < EXTI13_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI13_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI13`" ]
pub type EXTI13_R = crate :: R < u8 , EXTI13_A > ; impl EXTI13_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI13_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI13_A :: PA13 ) , 1 => Val ( EXTI13_A :: PB13 ) , 2 => Val ( EXTI13_A :: PC13 ) , 3 => Val ( EXTI13_A :: PD13 ) , 4 => Val ( EXTI13_A :: PE13 ) , 5 => Val ( EXTI13_A :: PF13 ) , 6 => Val ( EXTI13_A :: PG13 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA13`" ]
# [ inline ( always ) ]
pub fn is_pa13 ( & self ) -> bool { * self == EXTI13_A :: PA13 } # [ doc = "Checks if the value of the field is `PB13`" ]
# [ inline ( always ) ]
pub fn is_pb13 ( & self ) -> bool { * self == EXTI13_A :: PB13 } # [ doc = "Checks if the value of the field is `PC13`" ]
# [ inline ( always ) ]
pub fn is_pc13 ( & self ) -> bool { * self == EXTI13_A :: PC13 } # [ doc = "Checks if the value of the field is `PD13`" ]
# [ inline ( always ) ]
pub fn is_pd13 ( & self ) -> bool { * self == EXTI13_A :: PD13 } # [ doc = "Checks if the value of the field is `PE13`" ]
# [ inline ( always ) ]
pub fn is_pe13 ( & self ) -> bool { * self == EXTI13_A :: PE13 } # [ doc = "Checks if the value of the field is `PF13`" ]
# [ inline ( always ) ]
pub fn is_pf13 ( & self ) -> bool { * self == EXTI13_A :: PF13 } # [ doc = "Checks if the value of the field is `PG13`" ]
# [ inline ( always ) ]
pub fn is_pg13 ( & self ) -> bool { * self == EXTI13_A :: PG13 } } # [ doc = "Write proxy for field `EXTI13`" ]
pub struct EXTI13_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI13_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA13 as the source input for the EXTI13 external interrupt" ]
# [ inline ( always ) ]
pub fn pa13 ( self ) -> & 'a mut W { self . variant ( EXTI13_A :: PA13 ) } # [ doc = "Select PB13 as the source input for the EXTI13 external interrupt" ]
# [ inline ( always ) ]
pub fn pb13 ( self ) -> & 'a mut W { self . variant ( EXTI13_A :: PB13 ) } # [ doc = "Select PC13 as the source input for the EXTI13 external interrupt" ]
# [ inline ( always ) ]
pub fn pc13 ( self ) -> & 'a mut W { self . variant ( EXTI13_A :: PC13 ) } # [ doc = "Select PD13 as the source input for the EXTI13 external interrupt" ]
# [ inline ( always ) ]
pub fn pd13 ( self ) -> & 'a mut W { self . variant ( EXTI13_A :: PD13 ) } # [ doc = "Select PE13 as the source input for the EXTI13 external interrupt" ]
# [ inline ( always ) ]
pub fn pe13 ( self ) -> & 'a mut W { self . variant ( EXTI13_A :: PE13 ) } # [ doc = "Select PF13 as the source input for the EXTI13 external interrupt" ]
# [ inline ( always ) ]
pub fn pf13 ( self ) -> & 'a mut W { self . variant ( EXTI13_A :: PF13 ) } # [ doc = "Select PG13 as the source input for the EXTI13 external interrupt" ]
# [ inline ( always ) ]
pub fn pg13 ( self ) -> & 'a mut W { self . variant ( EXTI13_A :: PG13 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "EXTI 12 configuration bits\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTI12_A { # [ doc = "0: Select PA12 as the source input for the EXTI12 external interrupt" ]
PA12 = 0 , # [ doc = "1: Select PB12 as the source input for the EXTI12 external interrupt" ]
PB12 = 1 , # [ doc = "2: Select PC12 as the source input for the EXTI12 external interrupt" ]
PC12 = 2 , # [ doc = "3: Select PD12 as the source input for the EXTI12 external interrupt" ]
PD12 = 3 , # [ doc = "4: Select PE12 as the source input for the EXTI12 external interrupt" ]
PE12 = 4 , # [ doc = "5: Select PF12 as the source input for the EXTI12 external interrupt" ]
PF12 = 5 , # [ doc = "6: Select PG12 as the source input for the EXTI12 external interrupt" ]
PG12 = 6 } impl From < EXTI12_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTI12_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTI12`" ]
pub type EXTI12_R = crate :: R < u8 , EXTI12_A > ; impl EXTI12_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTI12_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( EXTI12_A :: PA12 ) , 1 => Val ( EXTI12_A :: PB12 ) , 2 => Val ( EXTI12_A :: PC12 ) , 3 => Val ( EXTI12_A :: PD12 ) , 4 => Val ( EXTI12_A :: PE12 ) , 5 => Val ( EXTI12_A :: PF12 ) , 6 => Val ( EXTI12_A :: PG12 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PA12`" ]
# [ inline ( always ) ]
pub fn is_pa12 ( & self ) -> bool { * self == EXTI12_A :: PA12 } # [ doc = "Checks if the value of the field is `PB12`" ]
# [ inline ( always ) ]
pub fn is_pb12 ( & self ) -> bool { * self == EXTI12_A :: PB12 } # [ doc = "Checks if the value of the field is `PC12`" ]
# [ inline ( always ) ]
pub fn is_pc12 ( & self ) -> bool { * self == EXTI12_A :: PC12 } # [ doc = "Checks if the value of the field is `PD12`" ]
# [ inline ( always ) ]
pub fn is_pd12 ( & self ) -> bool { * self == EXTI12_A :: PD12 } # [ doc = "Checks if the value of the field is `PE12`" ]
# [ inline ( always ) ]
pub fn is_pe12 ( & self ) -> bool { * self == EXTI12_A :: PE12 } # [ doc = "Checks if the value of the field is `PF12`" ]
# [ inline ( always ) ]
pub fn is_pf12 ( & self ) -> bool { * self == EXTI12_A :: PF12 } # [ doc = "Checks if the value of the field is `PG12`" ]
# [ inline ( always ) ]
pub fn is_pg12 ( & self ) -> bool { * self == EXTI12_A :: PG12 } } # [ doc = "Write proxy for field `EXTI12`" ]
pub struct EXTI12_W < 'a > { w : & 'a mut W , } impl < 'a > EXTI12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTI12_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Select PA12 as the source input for the EXTI12 external interrupt" ]
# [ inline ( always ) ]
pub fn pa12 ( self ) -> & 'a mut W { self . variant ( EXTI12_A :: PA12 ) } # [ doc = "Select PB12 as the source input for the EXTI12 external interrupt" ]
# [ inline ( always ) ]
pub fn pb12 ( self ) -> & 'a mut W { self . variant ( EXTI12_A :: PB12 ) } # [ doc = "Select PC12 as the source input for the EXTI12 external interrupt" ]
# [ inline ( always ) ]
pub fn pc12 ( self ) -> & 'a mut W { self . variant ( EXTI12_A :: PC12 ) } # [ doc = "Select PD12 as the source input for the EXTI12 external interrupt" ]
# [ inline ( always ) ]
pub fn pd12 ( self ) -> & 'a mut W { self . variant ( EXTI12_A :: PD12 ) } # [ doc = "Select PE12 as the source input for the EXTI12 external interrupt" ]
# [ inline ( always ) ]
pub fn pe12 ( self ) -> & 'a mut W { self . variant ( EXTI12_A :: PE12 ) } # [ doc = "Select PF12 as the source input for the EXTI12 external interrupt" ]
# [ inline ( always ) ]
pub fn pf12 ( self ) -> & 'a mut W { self . variant ( EXTI12_A :: PF12 ) } # [ doc = "Select PG12 as the source input for the EXTI12 external interrupt" ]
# [ inline ( always ) ]
pub fn pg12 ( self ) -> & 'a mut W { self . variant ( EXTI12_A :: PG12 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 12:15 - EXTI 15 configuration bits" ]
# [ inline ( always ) ]
pub fn exti15 ( & self ) -> EXTI15_R { EXTI15_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - EXTI 14 configuration bits" ]
# [ inline ( always ) ]
pub fn exti14 ( & self ) -> EXTI14_R { EXTI14_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - EXTI 13 configuration bits" ]
# [ inline ( always ) ]
pub fn exti13 ( & self ) -> EXTI13_R { EXTI13_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - EXTI 12 configuration bits" ]
# [ inline ( always ) ]
pub fn exti12 ( & self ) -> EXTI12_R { EXTI12_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 12:15 - EXTI 15 configuration bits" ]
# [ inline ( always ) ]
pub fn exti15 ( & mut self ) -> EXTI15_W { EXTI15_W { w : self } } # [ doc = "Bits 8:11 - EXTI 14 configuration bits" ]
# [ inline ( always ) ]
pub fn exti14 ( & mut self ) -> EXTI14_W { EXTI14_W { w : self } } # [ doc = "Bits 4:7 - EXTI 13 configuration bits" ]
# [ inline ( always ) ]
pub fn exti13 ( & mut self ) -> EXTI13_W { EXTI13_W { w : self } } # [ doc = "Bits 0:3 - EXTI 12 configuration bits" ]
# [ inline ( always ) ]
pub fn exti12 ( & mut self ) -> EXTI12_W { EXTI12_W { w : self } } } } # [ doc = "configuration register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr2](cfgr2) module" ]
pub type CFGR2 = crate :: Reg < u32 , _CFGR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR2 ; # [ doc = "`read()` method returns [cfgr2::R](cfgr2::R) reader structure" ]
impl crate :: Readable for CFGR2 { } # [ doc = "`write(|w| ..)` method takes [cfgr2::W](cfgr2::W) writer structure" ]
impl crate :: Writable for CFGR2 { } # [ doc = "configuration register 2" ]
pub mod cfgr2 { # [ doc = "Reader of register CFGR2" ]
pub type R = crate :: R < u32 , super :: CFGR2 > ; # [ doc = "Writer for register CFGR2" ]
pub type W = crate :: W < u32 , super :: CFGR2 > ; # [ doc = "Register CFGR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Cortex-M0 LOCKUP bit enable bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LOCKUP_LOCK_A { # [ doc = "0: Cortex-M4F LOCKUP output disconnected from TIM1/15/16/17 Break input" ]
DISCONNECTED = 0 , # [ doc = "1: Cortex-M4F LOCKUP output connected to TIM1/15/16/17 Break input" ]
CONNECTED = 1 } impl From < LOCKUP_LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : LOCKUP_LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LOCKUP_LOCK`" ]
pub type LOCKUP_LOCK_R = crate :: R < bool , LOCKUP_LOCK_A > ; impl LOCKUP_LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LOCKUP_LOCK_A { match self . bits { false => LOCKUP_LOCK_A :: DISCONNECTED , true => LOCKUP_LOCK_A :: CONNECTED } } # [ doc = "Checks if the value of the field is `DISCONNECTED`" ]
# [ inline ( always ) ]
pub fn is_disconnected ( & self ) -> bool { * self == LOCKUP_LOCK_A :: DISCONNECTED } # [ doc = "Checks if the value of the field is `CONNECTED`" ]
# [ inline ( always ) ]
pub fn is_connected ( & self ) -> bool { * self == LOCKUP_LOCK_A :: CONNECTED } } # [ doc = "Write proxy for field `LOCKUP_LOCK`" ]
pub struct LOCKUP_LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCKUP_LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LOCKUP_LOCK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Cortex-M4F LOCKUP output disconnected from TIM1/15/16/17 Break input" ]
# [ inline ( always ) ]
pub fn disconnected ( self ) -> & 'a mut W { self . variant ( LOCKUP_LOCK_A :: DISCONNECTED ) } # [ doc = "Cortex-M4F LOCKUP output connected to TIM1/15/16/17 Break input" ]
# [ inline ( always ) ]
pub fn connected ( self ) -> & 'a mut W { self . variant ( LOCKUP_LOCK_A :: CONNECTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "SRAM parity lock bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SRAM_PARITY_LOCK_A { # [ doc = "0: SRAM parity error disconnected from TIM1/15/16/17 Break input" ]
DISCONNECTED = 0 , # [ doc = "1: SRAM parity error connected to TIM1/15/16/17 Break input" ]
CONNECTED = 1 } impl From < SRAM_PARITY_LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : SRAM_PARITY_LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SRAM_PARITY_LOCK`" ]
pub type SRAM_PARITY_LOCK_R = crate :: R < bool , SRAM_PARITY_LOCK_A > ; impl SRAM_PARITY_LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SRAM_PARITY_LOCK_A { match self . bits { false => SRAM_PARITY_LOCK_A :: DISCONNECTED , true => SRAM_PARITY_LOCK_A :: CONNECTED } } # [ doc = "Checks if the value of the field is `DISCONNECTED`" ]
# [ inline ( always ) ]
pub fn is_disconnected ( & self ) -> bool { * self == SRAM_PARITY_LOCK_A :: DISCONNECTED } # [ doc = "Checks if the value of the field is `CONNECTED`" ]
# [ inline ( always ) ]
pub fn is_connected ( & self ) -> bool { * self == SRAM_PARITY_LOCK_A :: CONNECTED } } # [ doc = "Write proxy for field `SRAM_PARITY_LOCK`" ]
pub struct SRAM_PARITY_LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > SRAM_PARITY_LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SRAM_PARITY_LOCK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "SRAM parity error disconnected from TIM1/15/16/17 Break input" ]
# [ inline ( always ) ]
pub fn disconnected ( self ) -> & 'a mut W { self . variant ( SRAM_PARITY_LOCK_A :: DISCONNECTED ) } # [ doc = "SRAM parity error connected to TIM1/15/16/17 Break input" ]
# [ inline ( always ) ]
pub fn connected ( self ) -> & 'a mut W { self . variant ( SRAM_PARITY_LOCK_A :: CONNECTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "PVD lock enable bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PVD_LOCK_A { # [ doc = "0: PVD interrupt disconnected from TIM15/16/17 Break input" ]
DISCONNECTED = 0 , # [ doc = "1: PVD interrupt connected to TIM15/16/17 Break input" ]
CONNECTED = 1 } impl From < PVD_LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : PVD_LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PVD_LOCK`" ]
pub type PVD_LOCK_R = crate :: R < bool , PVD_LOCK_A > ; impl PVD_LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PVD_LOCK_A { match self . bits { false => PVD_LOCK_A :: DISCONNECTED , true => PVD_LOCK_A :: CONNECTED } } # [ doc = "Checks if the value of the field is `DISCONNECTED`" ]
# [ inline ( always ) ]
pub fn is_disconnected ( & self ) -> bool { * self == PVD_LOCK_A :: DISCONNECTED } # [ doc = "Checks if the value of the field is `CONNECTED`" ]
# [ inline ( always ) ]
pub fn is_connected ( & self ) -> bool { * self == PVD_LOCK_A :: CONNECTED } } # [ doc = "Write proxy for field `PVD_LOCK`" ]
pub struct PVD_LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > PVD_LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PVD_LOCK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PVD interrupt disconnected from TIM15/16/17 Break input" ]
# [ inline ( always ) ]
pub fn disconnected ( self ) -> & 'a mut W { self . variant ( PVD_LOCK_A :: DISCONNECTED ) } # [ doc = "PVD interrupt connected to TIM15/16/17 Break input" ]
# [ inline ( always ) ]
pub fn connected ( self ) -> & 'a mut W { self . variant ( PVD_LOCK_A :: CONNECTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Bypass address bit 29 in parity calculation\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BYP_ADDR_PAR_A { # [ doc = "0: The ramload operation is performed taking into consideration bit 29 of the address when the parity is calculated" ]
NOBYPASS = 0 , # [ doc = "1: The ramload operation is performed without taking into consideration bit 29 of the address when the parity is calculated" ]
BYPASS = 1 } impl From < BYP_ADDR_PAR_A > for bool { # [ inline ( always ) ]
fn from ( variant : BYP_ADDR_PAR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `BYP_ADDR_PAR`" ]
pub type BYP_ADDR_PAR_R = crate :: R < bool , BYP_ADDR_PAR_A > ; impl BYP_ADDR_PAR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> BYP_ADDR_PAR_A { match self . bits { false => BYP_ADDR_PAR_A :: NOBYPASS , true => BYP_ADDR_PAR_A :: BYPASS } } # [ doc = "Checks if the value of the field is `NOBYPASS`" ]
# [ inline ( always ) ]
pub fn is_no_bypass ( & self ) -> bool { * self == BYP_ADDR_PAR_A :: NOBYPASS } # [ doc = "Checks if the value of the field is `BYPASS`" ]
# [ inline ( always ) ]
pub fn is_bypass ( & self ) -> bool { * self == BYP_ADDR_PAR_A :: BYPASS } } # [ doc = "Write proxy for field `BYP_ADDR_PAR`" ]
pub struct BYP_ADDR_PAR_W < 'a > { w : & 'a mut W , } impl < 'a > BYP_ADDR_PAR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BYP_ADDR_PAR_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "The ramload operation is performed taking into consideration bit 29 of the address when the parity is calculated" ]
# [ inline ( always ) ]
pub fn no_bypass ( self ) -> & 'a mut W { self . variant ( BYP_ADDR_PAR_A :: NOBYPASS ) } # [ doc = "The ramload operation is performed without taking into consideration bit 29 of the address when the parity is calculated" ]
# [ inline ( always ) ]
pub fn bypass ( self ) -> & 'a mut W { self . variant ( BYP_ADDR_PAR_A :: BYPASS ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "SRAM parity flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SRAM_PEF_A { # [ doc = "0: No SRAM parity error detected" ]
NOPARITYERROR = 0 , # [ doc = "1: SRAM parity error detected" ]
PARITYERRORDETECTED = 1 } impl From < SRAM_PEF_A > for bool { # [ inline ( always ) ]
fn from ( variant : SRAM_PEF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `SRAM_PEF`" ]
pub type SRAM_PEF_R = crate :: R < bool , SRAM_PEF_A > ; impl SRAM_PEF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SRAM_PEF_A { match self . bits { false => SRAM_PEF_A :: NOPARITYERROR , true => SRAM_PEF_A :: PARITYERRORDETECTED } } # [ doc = "Checks if the value of the field is `NOPARITYERROR`" ]
# [ inline ( always ) ]
pub fn is_no_parity_error ( & self ) -> bool { * self == SRAM_PEF_A :: NOPARITYERROR } # [ doc = "Checks if the value of the field is `PARITYERRORDETECTED`" ]
# [ inline ( always ) ]
pub fn is_parity_error_detected ( & self ) -> bool { * self == SRAM_PEF_A :: PARITYERRORDETECTED } } # [ doc = "SRAM parity flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum SRAM_PEF_AW { # [ doc = "1: Clear SRAM parity error flag" ]
CLEAR = 1 } impl From < SRAM_PEF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : SRAM_PEF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `SRAM_PEF`" ]
pub struct SRAM_PEF_W < 'a > { w : & 'a mut W , } impl < 'a > SRAM_PEF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SRAM_PEF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear SRAM parity error flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( SRAM_PEF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } impl R { # [ doc = "Bit 0 - Cortex-M0 LOCKUP bit enable bit" ]
# [ inline ( always ) ]
pub fn lockup_lock ( & self ) -> LOCKUP_LOCK_R { LOCKUP_LOCK_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - SRAM parity lock bit" ]
# [ inline ( always ) ]
pub fn sram_parity_lock ( & self ) -> SRAM_PARITY_LOCK_R { SRAM_PARITY_LOCK_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - PVD lock enable bit" ]
# [ inline ( always ) ]
pub fn pvd_lock ( & self ) -> PVD_LOCK_R { PVD_LOCK_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Bypass address bit 29 in parity calculation" ]
# [ inline ( always ) ]
pub fn byp_addr_par ( & self ) -> BYP_ADDR_PAR_R { BYP_ADDR_PAR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - SRAM parity flag" ]
# [ inline ( always ) ]
pub fn sram_pef ( & self ) -> SRAM_PEF_R { SRAM_PEF_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Cortex-M0 LOCKUP bit enable bit" ]
# [ inline ( always ) ]
pub fn lockup_lock ( & mut self ) -> LOCKUP_LOCK_W { LOCKUP_LOCK_W { w : self } } # [ doc = "Bit 1 - SRAM parity lock bit" ]
# [ inline ( always ) ]
pub fn sram_parity_lock ( & mut self ) -> SRAM_PARITY_LOCK_W { SRAM_PARITY_LOCK_W { w : self } } # [ doc = "Bit 2 - PVD lock enable bit" ]
# [ inline ( always ) ]
pub fn pvd_lock ( & mut self ) -> PVD_LOCK_W { PVD_LOCK_W { w : self } } # [ doc = "Bit 4 - Bypass address bit 29 in parity calculation" ]
# [ inline ( always ) ]
pub fn byp_addr_par ( & mut self ) -> BYP_ADDR_PAR_W { BYP_ADDR_PAR_W { w : self } } # [ doc = "Bit 8 - SRAM parity flag" ]
# [ inline ( always ) ]
pub fn sram_pef ( & mut self ) -> SRAM_PEF_W { SRAM_PEF_W { w : self } } } } # [ doc = "CCM SRAM protection register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcr](rcr) module" ]
pub type RCR = crate :: Reg < u32 , _RCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _RCR ; # [ doc = "`read()` method returns [rcr::R](rcr::R) reader structure" ]
impl crate :: Readable for RCR { } # [ doc = "`write(|w| ..)` method takes [rcr::W](rcr::W) writer structure" ]
impl crate :: Writable for RCR { } # [ doc = "CCM SRAM protection register" ]
pub mod rcr { # [ doc = "Reader of register RCR" ]
pub type R = crate :: R < u32 , super :: RCR > ; # [ doc = "Writer for register RCR" ]
pub type W = crate :: W < u32 , super :: RCR > ; # [ doc = "Register RCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: RCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "CCM SRAM page write protection bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum PAGE0_WP_A { # [ doc = "0: Write protection of pagex is disabled" ]
DISABLED = 0 , # [ doc = "1: Write protection of pagex is enabled" ]
ENABLED = 1 } impl From < PAGE0_WP_A > for bool { # [ inline ( always ) ]
fn from ( variant : PAGE0_WP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `PAGE0_WP`" ]
pub type PAGE0_WP_R = crate :: R < bool , PAGE0_WP_A > ; impl PAGE0_WP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> PAGE0_WP_A { match self . bits { false => PAGE0_WP_A :: DISABLED , true => PAGE0_WP_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == PAGE0_WP_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == PAGE0_WP_A :: ENABLED } } # [ doc = "Write proxy for field `PAGE0_WP`" ]
pub struct PAGE0_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE0_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE0_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE1_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE1_WP`" ]
pub type PAGE1_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE1_WP`" ]
pub struct PAGE1_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE1_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE1_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE2_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE2_WP`" ]
pub type PAGE2_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE2_WP`" ]
pub struct PAGE2_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE2_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE2_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE3_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE3_WP`" ]
pub type PAGE3_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE3_WP`" ]
pub struct PAGE3_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE3_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE3_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE4_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE4_WP`" ]
pub type PAGE4_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE4_WP`" ]
pub struct PAGE4_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE4_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE4_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE5_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE5_WP`" ]
pub type PAGE5_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE5_WP`" ]
pub struct PAGE5_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE5_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE5_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE6_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE6_WP`" ]
pub type PAGE6_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE6_WP`" ]
pub struct PAGE6_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE6_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE6_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE7_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE7_WP`" ]
pub type PAGE7_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE7_WP`" ]
pub struct PAGE7_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE7_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE7_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE8_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE8_WP`" ]
pub type PAGE8_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE8_WP`" ]
pub struct PAGE8_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE8_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE8_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE9_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE9_WP`" ]
pub type PAGE9_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE9_WP`" ]
pub struct PAGE9_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE9_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE9_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE10_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE10_WP`" ]
pub type PAGE10_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE10_WP`" ]
pub struct PAGE10_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE10_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE10_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE11_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE11_WP`" ]
pub type PAGE11_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE11_WP`" ]
pub struct PAGE11_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE11_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE11_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE12_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE12_WP`" ]
pub type PAGE12_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE12_WP`" ]
pub struct PAGE12_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE12_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE12_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE13_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE13_WP`" ]
pub type PAGE13_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE13_WP`" ]
pub struct PAGE13_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE13_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE13_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE14_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE14_WP`" ]
pub type PAGE14_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE14_WP`" ]
pub struct PAGE14_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE14_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE14_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "CCM SRAM page write protection bit" ]
pub type PAGE15_WP_A = PAGE0_WP_A ; # [ doc = "Reader of field `PAGE15_WP`" ]
pub type PAGE15_WP_R = crate :: R < bool , PAGE0_WP_A > ; # [ doc = "Write proxy for field `PAGE15_WP`" ]
pub struct PAGE15_WP_W < 'a > { w : & 'a mut W , } impl < 'a > PAGE15_WP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PAGE15_WP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Write protection of pagex is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: DISABLED ) } # [ doc = "Write protection of pagex is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( PAGE0_WP_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl R { # [ doc = "Bit 0 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page0_wp ( & self ) -> PAGE0_WP_R { PAGE0_WP_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page1_wp ( & self ) -> PAGE1_WP_R { PAGE1_WP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page2_wp ( & self ) -> PAGE2_WP_R { PAGE2_WP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page3_wp ( & self ) -> PAGE3_WP_R { PAGE3_WP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page4_wp ( & self ) -> PAGE4_WP_R { PAGE4_WP_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page5_wp ( & self ) -> PAGE5_WP_R { PAGE5_WP_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page6_wp ( & self ) -> PAGE6_WP_R { PAGE6_WP_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page7_wp ( & self ) -> PAGE7_WP_R { PAGE7_WP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page8_wp ( & self ) -> PAGE8_WP_R { PAGE8_WP_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page9_wp ( & self ) -> PAGE9_WP_R { PAGE9_WP_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page10_wp ( & self ) -> PAGE10_WP_R { PAGE10_WP_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page11_wp ( & self ) -> PAGE11_WP_R { PAGE11_WP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page12_wp ( & self ) -> PAGE12_WP_R { PAGE12_WP_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page13_wp ( & self ) -> PAGE13_WP_R { PAGE13_WP_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page14_wp ( & self ) -> PAGE14_WP_R { PAGE14_WP_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page15_wp ( & self ) -> PAGE15_WP_R { PAGE15_WP_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page0_wp ( & mut self ) -> PAGE0_WP_W { PAGE0_WP_W { w : self } } # [ doc = "Bit 1 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page1_wp ( & mut self ) -> PAGE1_WP_W { PAGE1_WP_W { w : self } } # [ doc = "Bit 2 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page2_wp ( & mut self ) -> PAGE2_WP_W { PAGE2_WP_W { w : self } } # [ doc = "Bit 3 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page3_wp ( & mut self ) -> PAGE3_WP_W { PAGE3_WP_W { w : self } } # [ doc = "Bit 4 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page4_wp ( & mut self ) -> PAGE4_WP_W { PAGE4_WP_W { w : self } } # [ doc = "Bit 5 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page5_wp ( & mut self ) -> PAGE5_WP_W { PAGE5_WP_W { w : self } } # [ doc = "Bit 6 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page6_wp ( & mut self ) -> PAGE6_WP_W { PAGE6_WP_W { w : self } } # [ doc = "Bit 7 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page7_wp ( & mut self ) -> PAGE7_WP_W { PAGE7_WP_W { w : self } } # [ doc = "Bit 8 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page8_wp ( & mut self ) -> PAGE8_WP_W { PAGE8_WP_W { w : self } } # [ doc = "Bit 9 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page9_wp ( & mut self ) -> PAGE9_WP_W { PAGE9_WP_W { w : self } } # [ doc = "Bit 10 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page10_wp ( & mut self ) -> PAGE10_WP_W { PAGE10_WP_W { w : self } } # [ doc = "Bit 11 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page11_wp ( & mut self ) -> PAGE11_WP_W { PAGE11_WP_W { w : self } } # [ doc = "Bit 12 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page12_wp ( & mut self ) -> PAGE12_WP_W { PAGE12_WP_W { w : self } } # [ doc = "Bit 13 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page13_wp ( & mut self ) -> PAGE13_WP_W { PAGE13_WP_W { w : self } } # [ doc = "Bit 14 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page14_wp ( & mut self ) -> PAGE14_WP_W { PAGE14_WP_W { w : self } } # [ doc = "Bit 15 - CCM SRAM page write protection bit" ]
# [ inline ( always ) ]
pub fn page15_wp ( & mut self ) -> PAGE15_WP_W { PAGE15_WP_W { w : self } } } } # [ doc = "configuration register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr3](cfgr3) module" ]
pub type CFGR3 = crate :: Reg < u32 , _CFGR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR3 ; # [ doc = "`read()` method returns [cfgr3::R](cfgr3::R) reader structure" ]
impl crate :: Readable for CFGR3 { } # [ doc = "`write(|w| ..)` method takes [cfgr3::W](cfgr3::W) writer structure" ]
impl crate :: Writable for CFGR3 { } # [ doc = "configuration register 3" ]
pub mod cfgr3 { # [ doc = "Reader of register CFGR3" ]
pub type R = crate :: R < u32 , super :: CFGR3 > ; # [ doc = "Writer for register CFGR3" ]
pub type W = crate :: W < u32 , super :: CFGR3 > ; # [ doc = "Register CFGR3 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "I2C1_RX DMA remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum I2C1_RX_DMA_RMP_A { # [ doc = "0: I2C1_RX mapped on DMA1 CH7" ]
MAPDMA1CH7 = 0 , # [ doc = "1: I2C1_RX mapped on DMA1 CH3" ]
MAPDMA1CH3 = 1 , # [ doc = "2: I2C1_RX mapped on DMA1 CH5" ]
MAPDMA1CH5 = 2 } impl From < I2C1_RX_DMA_RMP_A > for u8 { # [ inline ( always ) ]
fn from ( variant : I2C1_RX_DMA_RMP_A ) -> Self { variant as _ } } # [ doc = "Reader of field `I2C1_RX_DMA_RMP`" ]
pub type I2C1_RX_DMA_RMP_R = crate :: R < u8 , I2C1_RX_DMA_RMP_A > ; impl I2C1_RX_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , I2C1_RX_DMA_RMP_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( I2C1_RX_DMA_RMP_A :: MAPDMA1CH7 ) , 1 => Val ( I2C1_RX_DMA_RMP_A :: MAPDMA1CH3 ) , 2 => Val ( I2C1_RX_DMA_RMP_A :: MAPDMA1CH5 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MAPDMA1CH7`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch7 ( & self ) -> bool { * self == I2C1_RX_DMA_RMP_A :: MAPDMA1CH7 } # [ doc = "Checks if the value of the field is `MAPDMA1CH3`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch3 ( & self ) -> bool { * self == I2C1_RX_DMA_RMP_A :: MAPDMA1CH3 } # [ doc = "Checks if the value of the field is `MAPDMA1CH5`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch5 ( & self ) -> bool { * self == I2C1_RX_DMA_RMP_A :: MAPDMA1CH5 } } # [ doc = "Write proxy for field `I2C1_RX_DMA_RMP`" ]
pub struct I2C1_RX_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C1_RX_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C1_RX_DMA_RMP_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "I2C1_RX mapped on DMA1 CH7" ]
# [ inline ( always ) ]
pub fn map_dma1ch7 ( self ) -> & 'a mut W { self . variant ( I2C1_RX_DMA_RMP_A :: MAPDMA1CH7 ) } # [ doc = "I2C1_RX mapped on DMA1 CH3" ]
# [ inline ( always ) ]
pub fn map_dma1ch3 ( self ) -> & 'a mut W { self . variant ( I2C1_RX_DMA_RMP_A :: MAPDMA1CH3 ) } # [ doc = "I2C1_RX mapped on DMA1 CH5" ]
# [ inline ( always ) ]
pub fn map_dma1ch5 ( self ) -> & 'a mut W { self . variant ( I2C1_RX_DMA_RMP_A :: MAPDMA1CH5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "SPI1_TX DMA remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SPI1_TX_DMA_RMP_A { # [ doc = "0: SPI1_TX mapped on DMA1 CH3" ]
MAPDMA1CH3 = 0 , # [ doc = "1: SPI1_TX mapped on DMA1 CH5" ]
MAPDMA1CH5 = 1 , # [ doc = "2: SPI1_TX mapped on DMA1 CH7" ]
MAPDMA1CH7 = 2 } impl From < SPI1_TX_DMA_RMP_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SPI1_TX_DMA_RMP_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SPI1_TX_DMA_RMP`" ]
pub type SPI1_TX_DMA_RMP_R = crate :: R < u8 , SPI1_TX_DMA_RMP_A > ; impl SPI1_TX_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , SPI1_TX_DMA_RMP_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( SPI1_TX_DMA_RMP_A :: MAPDMA1CH3 ) , 1 => Val ( SPI1_TX_DMA_RMP_A :: MAPDMA1CH5 ) , 2 => Val ( SPI1_TX_DMA_RMP_A :: MAPDMA1CH7 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MAPDMA1CH3`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch3 ( & self ) -> bool { * self == SPI1_TX_DMA_RMP_A :: MAPDMA1CH3 } # [ doc = "Checks if the value of the field is `MAPDMA1CH5`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch5 ( & self ) -> bool { * self == SPI1_TX_DMA_RMP_A :: MAPDMA1CH5 } # [ doc = "Checks if the value of the field is `MAPDMA1CH7`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch7 ( & self ) -> bool { * self == SPI1_TX_DMA_RMP_A :: MAPDMA1CH7 } } # [ doc = "Write proxy for field `SPI1_TX_DMA_RMP`" ]
pub struct SPI1_TX_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > SPI1_TX_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI1_TX_DMA_RMP_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "SPI1_TX mapped on DMA1 CH3" ]
# [ inline ( always ) ]
pub fn map_dma1ch3 ( self ) -> & 'a mut W { self . variant ( SPI1_TX_DMA_RMP_A :: MAPDMA1CH3 ) } # [ doc = "SPI1_TX mapped on DMA1 CH5" ]
# [ inline ( always ) ]
pub fn map_dma1ch5 ( self ) -> & 'a mut W { self . variant ( SPI1_TX_DMA_RMP_A :: MAPDMA1CH5 ) } # [ doc = "SPI1_TX mapped on DMA1 CH7" ]
# [ inline ( always ) ]
pub fn map_dma1ch7 ( self ) -> & 'a mut W { self . variant ( SPI1_TX_DMA_RMP_A :: MAPDMA1CH7 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "SPI1_RX DMA remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SPI1_RX_DMA_RMP_A { # [ doc = "0: SPI1_RX mapped on DMA1 CH2" ]
MAPDMA1CH3 = 0 , # [ doc = "1: SPI1_RX mapped on DMA1 CH4" ]
MAPDMA1CH5 = 1 , # [ doc = "2: SPI1_RX mapped on DMA1 CH6" ]
MAPDMA1CH7 = 2 } impl From < SPI1_RX_DMA_RMP_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SPI1_RX_DMA_RMP_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SPI1_RX_DMA_RMP`" ]
pub type SPI1_RX_DMA_RMP_R = crate :: R < u8 , SPI1_RX_DMA_RMP_A > ; impl SPI1_RX_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , SPI1_RX_DMA_RMP_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( SPI1_RX_DMA_RMP_A :: MAPDMA1CH3 ) , 1 => Val ( SPI1_RX_DMA_RMP_A :: MAPDMA1CH5 ) , 2 => Val ( SPI1_RX_DMA_RMP_A :: MAPDMA1CH7 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MAPDMA1CH3`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch3 ( & self ) -> bool { * self == SPI1_RX_DMA_RMP_A :: MAPDMA1CH3 } # [ doc = "Checks if the value of the field is `MAPDMA1CH5`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch5 ( & self ) -> bool { * self == SPI1_RX_DMA_RMP_A :: MAPDMA1CH5 } # [ doc = "Checks if the value of the field is `MAPDMA1CH7`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch7 ( & self ) -> bool { * self == SPI1_RX_DMA_RMP_A :: MAPDMA1CH7 } } # [ doc = "Write proxy for field `SPI1_RX_DMA_RMP`" ]
pub struct SPI1_RX_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > SPI1_RX_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SPI1_RX_DMA_RMP_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "SPI1_RX mapped on DMA1 CH2" ]
# [ inline ( always ) ]
pub fn map_dma1ch3 ( self ) -> & 'a mut W { self . variant ( SPI1_RX_DMA_RMP_A :: MAPDMA1CH3 ) } # [ doc = "SPI1_RX mapped on DMA1 CH4" ]
# [ inline ( always ) ]
pub fn map_dma1ch5 ( self ) -> & 'a mut W { self . variant ( SPI1_RX_DMA_RMP_A :: MAPDMA1CH5 ) } # [ doc = "SPI1_RX mapped on DMA1 CH6" ]
# [ inline ( always ) ]
pub fn map_dma1ch7 ( self ) -> & 'a mut W { self . variant ( SPI1_RX_DMA_RMP_A :: MAPDMA1CH7 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } # [ doc = "I2C1_TX DMA remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum I2C1_TX_DMA_RMP_A { # [ doc = "0: I2C1_TX mapped on DMA1 CH6" ]
MAPDMA1CH6 = 0 , # [ doc = "1: I2C1_TX mapped on DMA1 CH2" ]
MAPDMA1CH2 = 1 , # [ doc = "2: I2C1_TX mapped on DMA1 CH4" ]
MAPDMA1CH4 = 2 } impl From < I2C1_TX_DMA_RMP_A > for u8 { # [ inline ( always ) ]
fn from ( variant : I2C1_TX_DMA_RMP_A ) -> Self { variant as _ } } # [ doc = "Reader of field `I2C1_TX_DMA_RMP`" ]
pub type I2C1_TX_DMA_RMP_R = crate :: R < u8 , I2C1_TX_DMA_RMP_A > ; impl I2C1_TX_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , I2C1_TX_DMA_RMP_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( I2C1_TX_DMA_RMP_A :: MAPDMA1CH6 ) , 1 => Val ( I2C1_TX_DMA_RMP_A :: MAPDMA1CH2 ) , 2 => Val ( I2C1_TX_DMA_RMP_A :: MAPDMA1CH4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MAPDMA1CH6`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch6 ( & self ) -> bool { * self == I2C1_TX_DMA_RMP_A :: MAPDMA1CH6 } # [ doc = "Checks if the value of the field is `MAPDMA1CH2`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch2 ( & self ) -> bool { * self == I2C1_TX_DMA_RMP_A :: MAPDMA1CH2 } # [ doc = "Checks if the value of the field is `MAPDMA1CH4`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch4 ( & self ) -> bool { * self == I2C1_TX_DMA_RMP_A :: MAPDMA1CH4 } } # [ doc = "Write proxy for field `I2C1_TX_DMA_RMP`" ]
pub struct I2C1_TX_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > I2C1_TX_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : I2C1_TX_DMA_RMP_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "I2C1_TX mapped on DMA1 CH6" ]
# [ inline ( always ) ]
pub fn map_dma1ch6 ( self ) -> & 'a mut W { self . variant ( I2C1_TX_DMA_RMP_A :: MAPDMA1CH6 ) } # [ doc = "I2C1_TX mapped on DMA1 CH2" ]
# [ inline ( always ) ]
pub fn map_dma1ch2 ( self ) -> & 'a mut W { self . variant ( I2C1_TX_DMA_RMP_A :: MAPDMA1CH2 ) } # [ doc = "I2C1_TX mapped on DMA1 CH4" ]
# [ inline ( always ) ]
pub fn map_dma1ch4 ( self ) -> & 'a mut W { self . variant ( I2C1_TX_DMA_RMP_A :: MAPDMA1CH4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "ADC2 DMA remapping bit\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ADC2_DMA_RMP_A { # [ doc = "0: ADC2 mapped on DMA2" ]
MAPDMA2 = 0 , # [ doc = "3: ADC2 mapped on DMA1 channel 2" ]
MAPDMA1CH2 = 3 , # [ doc = "4: DC2 mapped on DMA1 channel 4" ]
MAPDMA1CH4 = 4 } impl From < ADC2_DMA_RMP_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ADC2_DMA_RMP_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ADC2_DMA_RMP`" ]
pub type ADC2_DMA_RMP_R = crate :: R < u8 , ADC2_DMA_RMP_A > ; impl ADC2_DMA_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , ADC2_DMA_RMP_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( ADC2_DMA_RMP_A :: MAPDMA2 ) , 3 => Val ( ADC2_DMA_RMP_A :: MAPDMA1CH2 ) , 4 => Val ( ADC2_DMA_RMP_A :: MAPDMA1CH4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `MAPDMA2`" ]
# [ inline ( always ) ]
pub fn is_map_dma2 ( & self ) -> bool { * self == ADC2_DMA_RMP_A :: MAPDMA2 } # [ doc = "Checks if the value of the field is `MAPDMA1CH2`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch2 ( & self ) -> bool { * self == ADC2_DMA_RMP_A :: MAPDMA1CH2 } # [ doc = "Checks if the value of the field is `MAPDMA1CH4`" ]
# [ inline ( always ) ]
pub fn is_map_dma1ch4 ( & self ) -> bool { * self == ADC2_DMA_RMP_A :: MAPDMA1CH4 } } # [ doc = "Write proxy for field `ADC2_DMA_RMP`" ]
pub struct ADC2_DMA_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC2_DMA_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC2_DMA_RMP_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "ADC2 mapped on DMA2" ]
# [ inline ( always ) ]
pub fn map_dma2 ( self ) -> & 'a mut W { self . variant ( ADC2_DMA_RMP_A :: MAPDMA2 ) } # [ doc = "ADC2 mapped on DMA1 channel 2" ]
# [ inline ( always ) ]
pub fn map_dma1ch2 ( self ) -> & 'a mut W { self . variant ( ADC2_DMA_RMP_A :: MAPDMA1CH2 ) } # [ doc = "DC2 mapped on DMA1 channel 4" ]
# [ inline ( always ) ]
pub fn map_dma1ch4 ( self ) -> & 'a mut W { self . variant ( ADC2_DMA_RMP_A :: MAPDMA1CH4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } impl R { # [ doc = "Bits 4:5 - I2C1_RX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn i2c1_rx_dma_rmp ( & self ) -> I2C1_RX_DMA_RMP_R { I2C1_RX_DMA_RMP_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - SPI1_TX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn spi1_tx_dma_rmp ( & self ) -> SPI1_TX_DMA_RMP_R { SPI1_TX_DMA_RMP_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - SPI1_RX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn spi1_rx_dma_rmp ( & self ) -> SPI1_RX_DMA_RMP_R { SPI1_RX_DMA_RMP_R :: new ( ( self . bits & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - I2C1_TX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn i2c1_tx_dma_rmp ( & self ) -> I2C1_TX_DMA_RMP_R { I2C1_TX_DMA_RMP_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - ADC2 DMA remapping bit" ]
# [ inline ( always ) ]
pub fn adc2_dma_rmp ( & self ) -> ADC2_DMA_RMP_R { ADC2_DMA_RMP_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 4:5 - I2C1_RX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn i2c1_rx_dma_rmp ( & mut self ) -> I2C1_RX_DMA_RMP_W { I2C1_RX_DMA_RMP_W { w : self } } # [ doc = "Bits 2:3 - SPI1_TX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn spi1_tx_dma_rmp ( & mut self ) -> SPI1_TX_DMA_RMP_W { SPI1_TX_DMA_RMP_W { w : self } } # [ doc = "Bits 0:1 - SPI1_RX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn spi1_rx_dma_rmp ( & mut self ) -> SPI1_RX_DMA_RMP_W { SPI1_RX_DMA_RMP_W { w : self } } # [ doc = "Bits 6:7 - I2C1_TX DMA remapping bit" ]
# [ inline ( always ) ]
pub fn i2c1_tx_dma_rmp ( & mut self ) -> I2C1_TX_DMA_RMP_W { I2C1_TX_DMA_RMP_W { w : self } } # [ doc = "Bits 8:9 - ADC2 DMA remapping bit" ]
# [ inline ( always ) ]
pub fn adc2_dma_rmp ( & mut self ) -> ADC2_DMA_RMP_W { ADC2_DMA_RMP_W { w : self } } } } # [ doc = "configuration register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr4](cfgr4) module" ]
pub type CFGR4 = crate :: Reg < u32 , _CFGR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR4 ; # [ doc = "`read()` method returns [cfgr4::R](cfgr4::R) reader structure" ]
impl crate :: Readable for CFGR4 { } # [ doc = "`write(|w| ..)` method takes [cfgr4::W](cfgr4::W) writer structure" ]
impl crate :: Writable for CFGR4 { } # [ doc = "configuration register 4" ]
pub mod cfgr4 { # [ doc = "Reader of register CFGR4" ]
pub type R = crate :: R < u32 , super :: CFGR4 > ; # [ doc = "Writer for register CFGR4" ]
pub type W = crate :: W < u32 , super :: CFGR4 > ; # [ doc = "Register CFGR4 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Controls the Input trigger of ADC12 regular channel EXT2\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_EXT2_RMP_A { # [ doc = "0: Trigger source is TIM3_CC3" ]
TIM1 = 0 , # [ doc = "1: rigger source is TIM20_TRGO" ]
TIM20 = 1 } impl From < ADC12_EXT2_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_EXT2_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_EXT2_RMP`" ]
pub type ADC12_EXT2_RMP_R = crate :: R < bool , ADC12_EXT2_RMP_A > ; impl ADC12_EXT2_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_EXT2_RMP_A { match self . bits { false => ADC12_EXT2_RMP_A :: TIM1 , true => ADC12_EXT2_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM1`" ]
# [ inline ( always ) ]
pub fn is_tim1 ( & self ) -> bool { * self == ADC12_EXT2_RMP_A :: TIM1 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_EXT2_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_EXT2_RMP`" ]
pub struct ADC12_EXT2_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_EXT2_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_EXT2_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM3_CC3" ]
# [ inline ( always ) ]
pub fn tim1 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT2_RMP_A :: TIM1 ) } # [ doc = "rigger source is TIM20_TRGO" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT2_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC12 regular channel EXT3\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_EXT3_RMP_A { # [ doc = "0: Trigger source is TIM2_CC2" ]
TIM2 = 0 , # [ doc = "1: rigger source is TIM20_TRGO2" ]
TIM20 = 1 } impl From < ADC12_EXT3_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_EXT3_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_EXT3_RMP`" ]
pub type ADC12_EXT3_RMP_R = crate :: R < bool , ADC12_EXT3_RMP_A > ; impl ADC12_EXT3_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_EXT3_RMP_A { match self . bits { false => ADC12_EXT3_RMP_A :: TIM2 , true => ADC12_EXT3_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM2`" ]
# [ inline ( always ) ]
pub fn is_tim2 ( & self ) -> bool { * self == ADC12_EXT3_RMP_A :: TIM2 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_EXT3_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_EXT3_RMP`" ]
pub struct ADC12_EXT3_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_EXT3_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_EXT3_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM2_CC2" ]
# [ inline ( always ) ]
pub fn tim2 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT3_RMP_A :: TIM2 ) } # [ doc = "rigger source is TIM20_TRGO2" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT3_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC12 regular channel EXT5\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_EXT5_RMP_A { # [ doc = "0: Trigger source is TIM4_CC4" ]
TIM4 = 0 , # [ doc = "1: Trigger source is TIM20_CC1" ]
TIM20 = 1 } impl From < ADC12_EXT5_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_EXT5_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_EXT5_RMP`" ]
pub type ADC12_EXT5_RMP_R = crate :: R < bool , ADC12_EXT5_RMP_A > ; impl ADC12_EXT5_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_EXT5_RMP_A { match self . bits { false => ADC12_EXT5_RMP_A :: TIM4 , true => ADC12_EXT5_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM4`" ]
# [ inline ( always ) ]
pub fn is_tim4 ( & self ) -> bool { * self == ADC12_EXT5_RMP_A :: TIM4 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_EXT5_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_EXT5_RMP`" ]
pub struct ADC12_EXT5_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_EXT5_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_EXT5_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM4_CC4" ]
# [ inline ( always ) ]
pub fn tim4 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT5_RMP_A :: TIM4 ) } # [ doc = "Trigger source is TIM20_CC1" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT5_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC12 regular channel EXT13\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_EXT13_RMP_A { # [ doc = "0: Trigger source is TIM6_TRGO" ]
TIM6 = 0 , # [ doc = "1: Trigger source is TIM20_CC2" ]
TIM20 = 1 } impl From < ADC12_EXT13_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_EXT13_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_EXT13_RMP`" ]
pub type ADC12_EXT13_RMP_R = crate :: R < bool , ADC12_EXT13_RMP_A > ; impl ADC12_EXT13_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_EXT13_RMP_A { match self . bits { false => ADC12_EXT13_RMP_A :: TIM6 , true => ADC12_EXT13_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM6`" ]
# [ inline ( always ) ]
pub fn is_tim6 ( & self ) -> bool { * self == ADC12_EXT13_RMP_A :: TIM6 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_EXT13_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_EXT13_RMP`" ]
pub struct ADC12_EXT13_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_EXT13_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_EXT13_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM6_TRGO" ]
# [ inline ( always ) ]
pub fn tim6 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT13_RMP_A :: TIM6 ) } # [ doc = "Trigger source is TIM20_CC2" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT13_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC12 regular channel EXT15\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_EXT15_RMP_A { # [ doc = "0: Trigger source is TIM3_CC4" ]
TIM3 = 0 , # [ doc = "1: Trigger source is TIM20_CC3" ]
TIM20 = 1 } impl From < ADC12_EXT15_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_EXT15_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_EXT15_RMP`" ]
pub type ADC12_EXT15_RMP_R = crate :: R < bool , ADC12_EXT15_RMP_A > ; impl ADC12_EXT15_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_EXT15_RMP_A { match self . bits { false => ADC12_EXT15_RMP_A :: TIM3 , true => ADC12_EXT15_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM3`" ]
# [ inline ( always ) ]
pub fn is_tim3 ( & self ) -> bool { * self == ADC12_EXT15_RMP_A :: TIM3 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_EXT15_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_EXT15_RMP`" ]
pub struct ADC12_EXT15_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_EXT15_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_EXT15_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM3_CC4" ]
# [ inline ( always ) ]
pub fn tim3 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT15_RMP_A :: TIM3 ) } # [ doc = "Trigger source is TIM20_CC3" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_EXT15_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC12 injected channel JEXT3\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_JEXT3_RMP_A { # [ doc = "0: Trigger source is TIM2_CC1" ]
TIM2 = 0 , # [ doc = "1: Trigger source is TIM20_TRGO" ]
TIM20 = 1 } impl From < ADC12_JEXT3_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_JEXT3_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_JEXT3_RMP`" ]
pub type ADC12_JEXT3_RMP_R = crate :: R < bool , ADC12_JEXT3_RMP_A > ; impl ADC12_JEXT3_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_JEXT3_RMP_A { match self . bits { false => ADC12_JEXT3_RMP_A :: TIM2 , true => ADC12_JEXT3_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM2`" ]
# [ inline ( always ) ]
pub fn is_tim2 ( & self ) -> bool { * self == ADC12_JEXT3_RMP_A :: TIM2 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_JEXT3_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_JEXT3_RMP`" ]
pub struct ADC12_JEXT3_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_JEXT3_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_JEXT3_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM2_CC1" ]
# [ inline ( always ) ]
pub fn tim2 ( self ) -> & 'a mut W { self . variant ( ADC12_JEXT3_RMP_A :: TIM2 ) } # [ doc = "Trigger source is TIM20_TRGO" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_JEXT3_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC12 injected channel JEXT6\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_JEXT6_RMP_A { # [ doc = "0: Trigger source is EXTI line 15" ]
EXTI15 = 0 , # [ doc = "1: Trigger source is TIM20_TRGO2" ]
TIM20 = 1 } impl From < ADC12_JEXT6_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_JEXT6_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_JEXT6_RMP`" ]
pub type ADC12_JEXT6_RMP_R = crate :: R < bool , ADC12_JEXT6_RMP_A > ; impl ADC12_JEXT6_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_JEXT6_RMP_A { match self . bits { false => ADC12_JEXT6_RMP_A :: EXTI15 , true => ADC12_JEXT6_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `EXTI15`" ]
# [ inline ( always ) ]
pub fn is_exti15 ( & self ) -> bool { * self == ADC12_JEXT6_RMP_A :: EXTI15 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_JEXT6_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_JEXT6_RMP`" ]
pub struct ADC12_JEXT6_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_JEXT6_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_JEXT6_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is EXTI line 15" ]
# [ inline ( always ) ]
pub fn exti15 ( self ) -> & 'a mut W { self . variant ( ADC12_JEXT6_RMP_A :: EXTI15 ) } # [ doc = "Trigger source is TIM20_TRGO2" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_JEXT6_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC12 injected channel JEXT13\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC12_JEXT13_RMP_A { # [ doc = "0: Trigger source is TIM3_CC1" ]
TIM3 = 0 , # [ doc = "1: Trigger source is TIM20_CC4" ]
TIM20 = 1 } impl From < ADC12_JEXT13_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC12_JEXT13_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC12_JEXT13_RMP`" ]
pub type ADC12_JEXT13_RMP_R = crate :: R < bool , ADC12_JEXT13_RMP_A > ; impl ADC12_JEXT13_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC12_JEXT13_RMP_A { match self . bits { false => ADC12_JEXT13_RMP_A :: TIM3 , true => ADC12_JEXT13_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM3`" ]
# [ inline ( always ) ]
pub fn is_tim3 ( & self ) -> bool { * self == ADC12_JEXT13_RMP_A :: TIM3 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC12_JEXT13_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC12_JEXT13_RMP`" ]
pub struct ADC12_JEXT13_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC12_JEXT13_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC12_JEXT13_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM3_CC1" ]
# [ inline ( always ) ]
pub fn tim3 ( self ) -> & 'a mut W { self . variant ( ADC12_JEXT13_RMP_A :: TIM3 ) } # [ doc = "Trigger source is TIM20_CC4" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC12_JEXT13_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC34 regular channel EXT5\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC34_EXT5_RMP_A { # [ doc = "0: Trigger source is EXTI line 2 when reset at 0" ]
EXTI2 = 0 , # [ doc = "1: Trigger source is TIM20_TRGO" ]
TIM20 = 1 } impl From < ADC34_EXT5_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC34_EXT5_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC34_EXT5_RMP`" ]
pub type ADC34_EXT5_RMP_R = crate :: R < bool , ADC34_EXT5_RMP_A > ; impl ADC34_EXT5_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC34_EXT5_RMP_A { match self . bits { false => ADC34_EXT5_RMP_A :: EXTI2 , true => ADC34_EXT5_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `EXTI2`" ]
# [ inline ( always ) ]
pub fn is_exti2 ( & self ) -> bool { * self == ADC34_EXT5_RMP_A :: EXTI2 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC34_EXT5_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC34_EXT5_RMP`" ]
pub struct ADC34_EXT5_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34_EXT5_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34_EXT5_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is EXTI line 2 when reset at 0" ]
# [ inline ( always ) ]
pub fn exti2 ( self ) -> & 'a mut W { self . variant ( ADC34_EXT5_RMP_A :: EXTI2 ) } # [ doc = "Trigger source is TIM20_TRGO" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC34_EXT5_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC34 regular channel EXT6\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC34_EXT6_RMP_A { # [ doc = "0: Trigger source is TIM4_CC1" ]
TIM4 = 0 , # [ doc = "1: Trigger source is TIM20_TRGO2" ]
TIM20 = 1 } impl From < ADC34_EXT6_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC34_EXT6_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC34_EXT6_RMP`" ]
pub type ADC34_EXT6_RMP_R = crate :: R < bool , ADC34_EXT6_RMP_A > ; impl ADC34_EXT6_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC34_EXT6_RMP_A { match self . bits { false => ADC34_EXT6_RMP_A :: TIM4 , true => ADC34_EXT6_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM4`" ]
# [ inline ( always ) ]
pub fn is_tim4 ( & self ) -> bool { * self == ADC34_EXT6_RMP_A :: TIM4 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC34_EXT6_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC34_EXT6_RMP`" ]
pub struct ADC34_EXT6_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34_EXT6_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34_EXT6_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM4_CC1" ]
# [ inline ( always ) ]
pub fn tim4 ( self ) -> & 'a mut W { self . variant ( ADC34_EXT6_RMP_A :: TIM4 ) } # [ doc = "Trigger source is TIM20_TRGO2" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC34_EXT6_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC34 regular channel EXT15\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC34_EXT15_RMP_A { # [ doc = "0: Trigger source is TIM2_CC1" ]
TIM2 = 0 , # [ doc = "1: Trigger source is TIM20_CC1" ]
TIM20 = 1 } impl From < ADC34_EXT15_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC34_EXT15_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC34_EXT15_RMP`" ]
pub type ADC34_EXT15_RMP_R = crate :: R < bool , ADC34_EXT15_RMP_A > ; impl ADC34_EXT15_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC34_EXT15_RMP_A { match self . bits { false => ADC34_EXT15_RMP_A :: TIM2 , true => ADC34_EXT15_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM2`" ]
# [ inline ( always ) ]
pub fn is_tim2 ( & self ) -> bool { * self == ADC34_EXT15_RMP_A :: TIM2 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC34_EXT15_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC34_EXT15_RMP`" ]
pub struct ADC34_EXT15_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34_EXT15_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34_EXT15_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM2_CC1" ]
# [ inline ( always ) ]
pub fn tim2 ( self ) -> & 'a mut W { self . variant ( ADC34_EXT15_RMP_A :: TIM2 ) } # [ doc = "Trigger source is TIM20_CC1" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC34_EXT15_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC34 injected channel JEXT5\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC34_JEXT5_RMP_A { # [ doc = "0: Trigger source is TIM4_CC3" ]
TIM4 = 0 , # [ doc = "1: Trigger source is TIM20_TRGO" ]
TIM20 = 1 } impl From < ADC34_JEXT5_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC34_JEXT5_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC34_JEXT5_RMP`" ]
pub type ADC34_JEXT5_RMP_R = crate :: R < bool , ADC34_JEXT5_RMP_A > ; impl ADC34_JEXT5_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC34_JEXT5_RMP_A { match self . bits { false => ADC34_JEXT5_RMP_A :: TIM4 , true => ADC34_JEXT5_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM4`" ]
# [ inline ( always ) ]
pub fn is_tim4 ( & self ) -> bool { * self == ADC34_JEXT5_RMP_A :: TIM4 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC34_JEXT5_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC34_JEXT5_RMP`" ]
pub struct ADC34_JEXT5_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34_JEXT5_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34_JEXT5_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM4_CC3" ]
# [ inline ( always ) ]
pub fn tim4 ( self ) -> & 'a mut W { self . variant ( ADC34_JEXT5_RMP_A :: TIM4 ) } # [ doc = "Trigger source is TIM20_TRGO" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC34_JEXT5_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC34 injected channel JEXT11\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC34_JEXT11_RMP_A { # [ doc = "0: Trigger source is TIM1_CC3" ]
TIM1 = 0 , # [ doc = "1: Trigger source is TIM20_TRGO2" ]
TIM20 = 1 } impl From < ADC34_JEXT11_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC34_JEXT11_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC34_JEXT11_RMP`" ]
pub type ADC34_JEXT11_RMP_R = crate :: R < bool , ADC34_JEXT11_RMP_A > ; impl ADC34_JEXT11_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC34_JEXT11_RMP_A { match self . bits { false => ADC34_JEXT11_RMP_A :: TIM1 , true => ADC34_JEXT11_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM1`" ]
# [ inline ( always ) ]
pub fn is_tim1 ( & self ) -> bool { * self == ADC34_JEXT11_RMP_A :: TIM1 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC34_JEXT11_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC34_JEXT11_RMP`" ]
pub struct ADC34_JEXT11_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34_JEXT11_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34_JEXT11_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM1_CC3" ]
# [ inline ( always ) ]
pub fn tim1 ( self ) -> & 'a mut W { self . variant ( ADC34_JEXT11_RMP_A :: TIM1 ) } # [ doc = "Trigger source is TIM20_TRGO2" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC34_JEXT11_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Controls the Input trigger of ADC34 injected channel JEXT14\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADC34_JEXT14_RMP_A { # [ doc = "0: Trigger source is TIM7_TRGO" ]
TIM7 = 0 , # [ doc = "1: Trigger source is TIM20_CC2" ]
TIM20 = 1 } impl From < ADC34_JEXT14_RMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADC34_JEXT14_RMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADC34_JEXT14_RMP`" ]
pub type ADC34_JEXT14_RMP_R = crate :: R < bool , ADC34_JEXT14_RMP_A > ; impl ADC34_JEXT14_RMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADC34_JEXT14_RMP_A { match self . bits { false => ADC34_JEXT14_RMP_A :: TIM7 , true => ADC34_JEXT14_RMP_A :: TIM20 } } # [ doc = "Checks if the value of the field is `TIM7`" ]
# [ inline ( always ) ]
pub fn is_tim7 ( & self ) -> bool { * self == ADC34_JEXT14_RMP_A :: TIM7 } # [ doc = "Checks if the value of the field is `TIM20`" ]
# [ inline ( always ) ]
pub fn is_tim20 ( & self ) -> bool { * self == ADC34_JEXT14_RMP_A :: TIM20 } } # [ doc = "Write proxy for field `ADC34_JEXT14_RMP`" ]
pub struct ADC34_JEXT14_RMP_W < 'a > { w : & 'a mut W , } impl < 'a > ADC34_JEXT14_RMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADC34_JEXT14_RMP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Trigger source is TIM7_TRGO" ]
# [ inline ( always ) ]
pub fn tim7 ( self ) -> & 'a mut W { self . variant ( ADC34_JEXT14_RMP_A :: TIM7 ) } # [ doc = "Trigger source is TIM20_CC2" ]
# [ inline ( always ) ]
pub fn tim20 ( self ) -> & 'a mut W { self . variant ( ADC34_JEXT14_RMP_A :: TIM20 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } impl R { # [ doc = "Bit 0 - Controls the Input trigger of ADC12 regular channel EXT2" ]
# [ inline ( always ) ]
pub fn adc12_ext2_rmp ( & self ) -> ADC12_EXT2_RMP_R { ADC12_EXT2_RMP_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Controls the Input trigger of ADC12 regular channel EXT3" ]
# [ inline ( always ) ]
pub fn adc12_ext3_rmp ( & self ) -> ADC12_EXT3_RMP_R { ADC12_EXT3_RMP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Controls the Input trigger of ADC12 regular channel EXT5" ]
# [ inline ( always ) ]
pub fn adc12_ext5_rmp ( & self ) -> ADC12_EXT5_RMP_R { ADC12_EXT5_RMP_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Controls the Input trigger of ADC12 regular channel EXT13" ]
# [ inline ( always ) ]
pub fn adc12_ext13_rmp ( & self ) -> ADC12_EXT13_RMP_R { ADC12_EXT13_RMP_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Controls the Input trigger of ADC12 regular channel EXT15" ]
# [ inline ( always ) ]
pub fn adc12_ext15_rmp ( & self ) -> ADC12_EXT15_RMP_R { ADC12_EXT15_RMP_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Controls the Input trigger of ADC12 injected channel JEXT3" ]
# [ inline ( always ) ]
pub fn adc12_jext3_rmp ( & self ) -> ADC12_JEXT3_RMP_R { ADC12_JEXT3_RMP_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Controls the Input trigger of ADC12 injected channel JEXT6" ]
# [ inline ( always ) ]
pub fn adc12_jext6_rmp ( & self ) -> ADC12_JEXT6_RMP_R { ADC12_JEXT6_RMP_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Controls the Input trigger of ADC12 injected channel JEXT13" ]
# [ inline ( always ) ]
pub fn adc12_jext13_rmp ( & self ) -> ADC12_JEXT13_RMP_R { ADC12_JEXT13_RMP_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Controls the Input trigger of ADC34 regular channel EXT5" ]
# [ inline ( always ) ]
pub fn adc34_ext5_rmp ( & self ) -> ADC34_EXT5_RMP_R { ADC34_EXT5_RMP_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Controls the Input trigger of ADC34 regular channel EXT6" ]
# [ inline ( always ) ]
pub fn adc34_ext6_rmp ( & self ) -> ADC34_EXT6_RMP_R { ADC34_EXT6_RMP_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Controls the Input trigger of ADC34 regular channel EXT15" ]
# [ inline ( always ) ]
pub fn adc34_ext15_rmp ( & self ) -> ADC34_EXT15_RMP_R { ADC34_EXT15_RMP_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Controls the Input trigger of ADC34 injected channel JEXT5" ]
# [ inline ( always ) ]
pub fn adc34_jext5_rmp ( & self ) -> ADC34_JEXT5_RMP_R { ADC34_JEXT5_RMP_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Controls the Input trigger of ADC34 injected channel JEXT11" ]
# [ inline ( always ) ]
pub fn adc34_jext11_rmp ( & self ) -> ADC34_JEXT11_RMP_R { ADC34_JEXT11_RMP_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Controls the Input trigger of ADC34 injected channel JEXT14" ]
# [ inline ( always ) ]
pub fn adc34_jext14_rmp ( & self ) -> ADC34_JEXT14_RMP_R { ADC34_JEXT14_RMP_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Controls the Input trigger of ADC12 regular channel EXT2" ]
# [ inline ( always ) ]
pub fn adc12_ext2_rmp ( & mut self ) -> ADC12_EXT2_RMP_W { ADC12_EXT2_RMP_W { w : self } } # [ doc = "Bit 1 - Controls the Input trigger of ADC12 regular channel EXT3" ]
# [ inline ( always ) ]
pub fn adc12_ext3_rmp ( & mut self ) -> ADC12_EXT3_RMP_W { ADC12_EXT3_RMP_W { w : self } } # [ doc = "Bit 2 - Controls the Input trigger of ADC12 regular channel EXT5" ]
# [ inline ( always ) ]
pub fn adc12_ext5_rmp ( & mut self ) -> ADC12_EXT5_RMP_W { ADC12_EXT5_RMP_W { w : self } } # [ doc = "Bit 3 - Controls the Input trigger of ADC12 regular channel EXT13" ]
# [ inline ( always ) ]
pub fn adc12_ext13_rmp ( & mut self ) -> ADC12_EXT13_RMP_W { ADC12_EXT13_RMP_W { w : self } } # [ doc = "Bit 4 - Controls the Input trigger of ADC12 regular channel EXT15" ]
# [ inline ( always ) ]
pub fn adc12_ext15_rmp ( & mut self ) -> ADC12_EXT15_RMP_W { ADC12_EXT15_RMP_W { w : self } } # [ doc = "Bit 5 - Controls the Input trigger of ADC12 injected channel JEXT3" ]
# [ inline ( always ) ]
pub fn adc12_jext3_rmp ( & mut self ) -> ADC12_JEXT3_RMP_W { ADC12_JEXT3_RMP_W { w : self } } # [ doc = "Bit 6 - Controls the Input trigger of ADC12 injected channel JEXT6" ]
# [ inline ( always ) ]
pub fn adc12_jext6_rmp ( & mut self ) -> ADC12_JEXT6_RMP_W { ADC12_JEXT6_RMP_W { w : self } } # [ doc = "Bit 7 - Controls the Input trigger of ADC12 injected channel JEXT13" ]
# [ inline ( always ) ]
pub fn adc12_jext13_rmp ( & mut self ) -> ADC12_JEXT13_RMP_W { ADC12_JEXT13_RMP_W { w : self } } # [ doc = "Bit 8 - Controls the Input trigger of ADC34 regular channel EXT5" ]
# [ inline ( always ) ]
pub fn adc34_ext5_rmp ( & mut self ) -> ADC34_EXT5_RMP_W { ADC34_EXT5_RMP_W { w : self } } # [ doc = "Bit 9 - Controls the Input trigger of ADC34 regular channel EXT6" ]
# [ inline ( always ) ]
pub fn adc34_ext6_rmp ( & mut self ) -> ADC34_EXT6_RMP_W { ADC34_EXT6_RMP_W { w : self } } # [ doc = "Bit 10 - Controls the Input trigger of ADC34 regular channel EXT15" ]
# [ inline ( always ) ]
pub fn adc34_ext15_rmp ( & mut self ) -> ADC34_EXT15_RMP_W { ADC34_EXT15_RMP_W { w : self } } # [ doc = "Bit 11 - Controls the Input trigger of ADC34 injected channel JEXT5" ]
# [ inline ( always ) ]
pub fn adc34_jext5_rmp ( & mut self ) -> ADC34_JEXT5_RMP_W { ADC34_JEXT5_RMP_W { w : self } } # [ doc = "Bit 12 - Controls the Input trigger of ADC34 injected channel JEXT11" ]
# [ inline ( always ) ]
pub fn adc34_jext11_rmp ( & mut self ) -> ADC34_JEXT11_RMP_W { ADC34_JEXT11_RMP_W { w : self } } # [ doc = "Bit 13 - Controls the Input trigger of ADC34 injected channel JEXT14" ]
# [ inline ( always ) ]
pub fn adc34_jext14_rmp ( & mut self ) -> ADC34_JEXT14_RMP_W { ADC34_JEXT14_RMP_W { w : self } } } } } # [ doc = "Floting point unit" ]
pub struct FPU { _marker : PhantomData < * const ( ) > } unsafe impl Send for FPU { } impl FPU { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const fpu :: RegisterBlock { 0xe000_ef34 as * const _ } } impl Deref for FPU { type Target = fpu :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * FPU :: ptr ( ) } } } # [ doc = "Floting point unit" ]
pub mod fpu { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Floating-point context control register" ]
pub fpccr : FPCCR , # [ doc = "0x04 - Floating-point context address register" ]
pub fpcar : FPCAR , # [ doc = "0x08 - Floating-point status control register" ]
pub fpscr : FPSCR , } # [ doc = "Floating-point context control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fpccr](fpccr) module" ]
pub type FPCCR = crate :: Reg < u32 , _FPCCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FPCCR ; # [ doc = "`read()` method returns [fpccr::R](fpccr::R) reader structure" ]
impl crate :: Readable for FPCCR { } # [ doc = "`write(|w| ..)` method takes [fpccr::W](fpccr::W) writer structure" ]
impl crate :: Writable for FPCCR { } # [ doc = "Floating-point context control register" ]
pub mod fpccr { # [ doc = "Reader of register FPCCR" ]
pub type R = crate :: R < u32 , super :: FPCCR > ; # [ doc = "Writer for register FPCCR" ]
pub type W = crate :: W < u32 , super :: FPCCR > ; # [ doc = "Register FPCCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FPCCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `LSPACT`" ]
pub type LSPACT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `LSPACT`" ]
pub struct LSPACT_W < 'a > { w : & 'a mut W , } impl < 'a > LSPACT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `USER`" ]
pub type USER_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `USER`" ]
pub struct USER_W < 'a > { w : & 'a mut W , } impl < 'a > USER_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `THREAD`" ]
pub type THREAD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `THREAD`" ]
pub struct THREAD_W < 'a > { w : & 'a mut W , } impl < 'a > THREAD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `HFRDY`" ]
pub type HFRDY_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `HFRDY`" ]
pub struct HFRDY_W < 'a > { w : & 'a mut W , } impl < 'a > HFRDY_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `MMRDY`" ]
pub type MMRDY_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MMRDY`" ]
pub struct MMRDY_W < 'a > { w : & 'a mut W , } impl < 'a > MMRDY_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Reader of field `BFRDY`" ]
pub type BFRDY_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `BFRDY`" ]
pub struct BFRDY_W < 'a > { w : & 'a mut W , } impl < 'a > BFRDY_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Reader of field `MONRDY`" ]
pub type MONRDY_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `MONRDY`" ]
pub struct MONRDY_W < 'a > { w : & 'a mut W , } impl < 'a > MONRDY_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `LSPEN`" ]
pub type LSPEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `LSPEN`" ]
pub struct LSPEN_W < 'a > { w : & 'a mut W , } impl < 'a > LSPEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `ASPEN`" ]
pub type ASPEN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ASPEN`" ]
pub struct ASPEN_W < 'a > { w : & 'a mut W , } impl < 'a > ASPEN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - LSPACT" ]
# [ inline ( always ) ]
pub fn lspact ( & self ) -> LSPACT_R { LSPACT_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - USER" ]
# [ inline ( always ) ]
pub fn user ( & self ) -> USER_R { USER_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - THREAD" ]
# [ inline ( always ) ]
pub fn thread ( & self ) -> THREAD_R { THREAD_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - HFRDY" ]
# [ inline ( always ) ]
pub fn hfrdy ( & self ) -> HFRDY_R { HFRDY_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - MMRDY" ]
# [ inline ( always ) ]
pub fn mmrdy ( & self ) -> MMRDY_R { MMRDY_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - BFRDY" ]
# [ inline ( always ) ]
pub fn bfrdy ( & self ) -> BFRDY_R { BFRDY_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - MONRDY" ]
# [ inline ( always ) ]
pub fn monrdy ( & self ) -> MONRDY_R { MONRDY_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - LSPEN" ]
# [ inline ( always ) ]
pub fn lspen ( & self ) -> LSPEN_R { LSPEN_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - ASPEN" ]
# [ inline ( always ) ]
pub fn aspen ( & self ) -> ASPEN_R { ASPEN_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - LSPACT" ]
# [ inline ( always ) ]
pub fn lspact ( & mut self ) -> LSPACT_W { LSPACT_W { w : self } } # [ doc = "Bit 1 - USER" ]
# [ inline ( always ) ]
pub fn user ( & mut self ) -> USER_W { USER_W { w : self } } # [ doc = "Bit 3 - THREAD" ]
# [ inline ( always ) ]
pub fn thread ( & mut self ) -> THREAD_W { THREAD_W { w : self } } # [ doc = "Bit 4 - HFRDY" ]
# [ inline ( always ) ]
pub fn hfrdy ( & mut self ) -> HFRDY_W { HFRDY_W { w : self } } # [ doc = "Bit 5 - MMRDY" ]
# [ inline ( always ) ]
pub fn mmrdy ( & mut self ) -> MMRDY_W { MMRDY_W { w : self } } # [ doc = "Bit 6 - BFRDY" ]
# [ inline ( always ) ]
pub fn bfrdy ( & mut self ) -> BFRDY_W { BFRDY_W { w : self } } # [ doc = "Bit 8 - MONRDY" ]
# [ inline ( always ) ]
pub fn monrdy ( & mut self ) -> MONRDY_W { MONRDY_W { w : self } } # [ doc = "Bit 30 - LSPEN" ]
# [ inline ( always ) ]
pub fn lspen ( & mut self ) -> LSPEN_W { LSPEN_W { w : self } } # [ doc = "Bit 31 - ASPEN" ]
# [ inline ( always ) ]
pub fn aspen ( & mut self ) -> ASPEN_W { ASPEN_W { w : self } } } } # [ doc = "Floating-point context address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fpcar](fpcar) module" ]
pub type FPCAR = crate :: Reg < u32 , _FPCAR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FPCAR ; # [ doc = "`read()` method returns [fpcar::R](fpcar::R) reader structure" ]
impl crate :: Readable for FPCAR { } # [ doc = "`write(|w| ..)` method takes [fpcar::W](fpcar::W) writer structure" ]
impl crate :: Writable for FPCAR { } # [ doc = "Floating-point context address register" ]
pub mod fpcar { # [ doc = "Reader of register FPCAR" ]
pub type R = crate :: R < u32 , super :: FPCAR > ; # [ doc = "Writer for register FPCAR" ]
pub type W = crate :: W < u32 , super :: FPCAR > ; # [ doc = "Register FPCAR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FPCAR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ADDRESS`" ]
pub type ADDRESS_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `ADDRESS`" ]
pub struct ADDRESS_W < 'a > { w : & 'a mut W , } impl < 'a > ADDRESS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1fff_ffff << 3 ) ) | ( ( ( value as u32 ) & 0x1fff_ffff ) << 3 ) ; self . w } } impl R { # [ doc = "Bits 3:31 - Location of unpopulated floating-point" ]
# [ inline ( always ) ]
pub fn address ( & self ) -> ADDRESS_R { ADDRESS_R :: new ( ( ( self . bits >> 3 ) & 0x1fff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 3:31 - Location of unpopulated floating-point" ]
# [ inline ( always ) ]
pub fn address ( & mut self ) -> ADDRESS_W { ADDRESS_W { w : self } } } } # [ doc = "Floating-point status control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fpscr](fpscr) module" ]
pub type FPSCR = crate :: Reg < u32 , _FPSCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _FPSCR ; # [ doc = "`read()` method returns [fpscr::R](fpscr::R) reader structure" ]
impl crate :: Readable for FPSCR { } # [ doc = "`write(|w| ..)` method takes [fpscr::W](fpscr::W) writer structure" ]
impl crate :: Writable for FPSCR { } # [ doc = "Floating-point status control register" ]
pub mod fpscr { # [ doc = "Reader of register FPSCR" ]
pub type R = crate :: R < u32 , super :: FPSCR > ; # [ doc = "Writer for register FPSCR" ]
pub type W = crate :: W < u32 , super :: FPSCR > ; # [ doc = "Register FPSCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: FPSCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `IOC`" ]
pub type IOC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IOC`" ]
pub struct IOC_W < 'a > { w : & 'a mut W , } impl < 'a > IOC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `DZC`" ]
pub type DZC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DZC`" ]
pub struct DZC_W < 'a > { w : & 'a mut W , } impl < 'a > DZC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `OFC`" ]
pub type OFC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OFC`" ]
pub struct OFC_W < 'a > { w : & 'a mut W , } impl < 'a > OFC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `UFC`" ]
pub type UFC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `UFC`" ]
pub struct UFC_W < 'a > { w : & 'a mut W , } impl < 'a > UFC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Reader of field `IXC`" ]
pub type IXC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IXC`" ]
pub struct IXC_W < 'a > { w : & 'a mut W , } impl < 'a > IXC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Reader of field `IDC`" ]
pub type IDC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `IDC`" ]
pub struct IDC_W < 'a > { w : & 'a mut W , } impl < 'a > IDC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `RMode`" ]
pub type RMODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `RMode`" ]
pub struct RMODE_W < 'a > { w : & 'a mut W , } impl < 'a > RMODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Reader of field `FZ`" ]
pub type FZ_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FZ`" ]
pub struct FZ_W < 'a > { w : & 'a mut W , } impl < 'a > FZ_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Reader of field `DN`" ]
pub type DN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DN`" ]
pub struct DN_W < 'a > { w : & 'a mut W , } impl < 'a > DN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Reader of field `AHP`" ]
pub type AHP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `AHP`" ]
pub struct AHP_W < 'a > { w : & 'a mut W , } impl < 'a > AHP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Reader of field `V`" ]
pub type V_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `V`" ]
pub struct V_W < 'a > { w : & 'a mut W , } impl < 'a > V_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Reader of field `C`" ]
pub type C_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `C`" ]
pub struct C_W < 'a > { w : & 'a mut W , } impl < 'a > C_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `Z`" ]
pub type Z_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `Z`" ]
pub struct Z_W < 'a > { w : & 'a mut W , } impl < 'a > Z_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `N`" ]
pub type N_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `N`" ]
pub struct N_W < 'a > { w : & 'a mut W , } impl < 'a > N_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - Invalid operation cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ioc ( & self ) -> IOC_R { IOC_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Division by zero cumulative exception bit." ]
# [ inline ( always ) ]
pub fn dzc ( & self ) -> DZC_R { DZC_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Overflow cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ofc ( & self ) -> OFC_R { OFC_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Underflow cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ufc ( & self ) -> UFC_R { UFC_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Inexact cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ixc ( & self ) -> IXC_R { IXC_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Input denormal cumulative exception bit." ]
# [ inline ( always ) ]
pub fn idc ( & self ) -> IDC_R { IDC_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 22:23 - Rounding Mode control field" ]
# [ inline ( always ) ]
pub fn rmode ( & self ) -> RMODE_R { RMODE_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bit 24 - Flush-to-zero mode control bit:" ]
# [ inline ( always ) ]
pub fn fz ( & self ) -> FZ_R { FZ_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Default NaN mode control bit" ]
# [ inline ( always ) ]
pub fn dn ( & self ) -> DN_R { DN_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Alternative half-precision control bit" ]
# [ inline ( always ) ]
pub fn ahp ( & self ) -> AHP_R { AHP_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } # [ doc = "Bit 28 - Overflow condition code flag" ]
# [ inline ( always ) ]
pub fn v ( & self ) -> V_R { V_R :: new ( ( ( self . bits >> 28 ) & 0x01 ) != 0 ) } # [ doc = "Bit 29 - Carry condition code flag" ]
# [ inline ( always ) ]
pub fn c ( & self ) -> C_R { C_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - Zero condition code flag" ]
# [ inline ( always ) ]
pub fn z ( & self ) -> Z_R { Z_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Negative condition code flag" ]
# [ inline ( always ) ]
pub fn n ( & self ) -> N_R { N_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Invalid operation cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ioc ( & mut self ) -> IOC_W { IOC_W { w : self } } # [ doc = "Bit 1 - Division by zero cumulative exception bit." ]
# [ inline ( always ) ]
pub fn dzc ( & mut self ) -> DZC_W { DZC_W { w : self } } # [ doc = "Bit 2 - Overflow cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ofc ( & mut self ) -> OFC_W { OFC_W { w : self } } # [ doc = "Bit 3 - Underflow cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ufc ( & mut self ) -> UFC_W { UFC_W { w : self } } # [ doc = "Bit 4 - Inexact cumulative exception bit" ]
# [ inline ( always ) ]
pub fn ixc ( & mut self ) -> IXC_W { IXC_W { w : self } } # [ doc = "Bit 7 - Input denormal cumulative exception bit." ]
# [ inline ( always ) ]
pub fn idc ( & mut self ) -> IDC_W { IDC_W { w : self } } # [ doc = "Bits 22:23 - Rounding Mode control field" ]
# [ inline ( always ) ]
pub fn rmode ( & mut self ) -> RMODE_W { RMODE_W { w : self } } # [ doc = "Bit 24 - Flush-to-zero mode control bit:" ]
# [ inline ( always ) ]
pub fn fz ( & mut self ) -> FZ_W { FZ_W { w : self } } # [ doc = "Bit 25 - Default NaN mode control bit" ]
# [ inline ( always ) ]
pub fn dn ( & mut self ) -> DN_W { DN_W { w : self } } # [ doc = "Bit 26 - Alternative half-precision control bit" ]
# [ inline ( always ) ]
pub fn ahp ( & mut self ) -> AHP_W { AHP_W { w : self } } # [ doc = "Bit 28 - Overflow condition code flag" ]
# [ inline ( always ) ]
pub fn v ( & mut self ) -> V_W { V_W { w : self } } # [ doc = "Bit 29 - Carry condition code flag" ]
# [ inline ( always ) ]
pub fn c ( & mut self ) -> C_W { C_W { w : self } } # [ doc = "Bit 30 - Zero condition code flag" ]
# [ inline ( always ) ]
pub fn z ( & mut self ) -> Z_W { Z_W { w : self } } # [ doc = "Bit 31 - Negative condition code flag" ]
# [ inline ( always ) ]
pub fn n ( & mut self ) -> N_W { N_W { w : self } } } } } # [ doc = "SysTick timer" ]
pub struct STK { _marker : PhantomData < * const ( ) > } unsafe impl Send for STK { } impl STK { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const stk :: RegisterBlock { 0xe000_e010 as * const _ } } impl Deref for STK { type Target = stk :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * STK :: ptr ( ) } } } # [ doc = "SysTick timer" ]
pub mod stk { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - SysTick control and status register" ]
pub ctrl : CTRL , # [ doc = "0x04 - SysTick reload value register" ]
pub load : LOAD , # [ doc = "0x08 - SysTick current value register" ]
pub val : VAL , # [ doc = "0x0c - SysTick calibration value register" ]
pub calib : CALIB , } # [ doc = "SysTick control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](ctrl) module" ]
pub type CTRL = crate :: Reg < u32 , _CTRL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CTRL ; # [ doc = "`read()` method returns [ctrl::R](ctrl::R) reader structure" ]
impl crate :: Readable for CTRL { } # [ doc = "`write(|w| ..)` method takes [ctrl::W](ctrl::W) writer structure" ]
impl crate :: Writable for CTRL { } # [ doc = "SysTick control and status register" ]
pub mod ctrl { # [ doc = "Reader of register CTRL" ]
pub type R = crate :: R < u32 , super :: CTRL > ; # [ doc = "Writer for register CTRL" ]
pub type W = crate :: W < u32 , super :: CTRL > ; # [ doc = "Register CTRL `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CTRL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `ENABLE`" ]
pub type ENABLE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `ENABLE`" ]
pub struct ENABLE_W < 'a > { w : & 'a mut W , } impl < 'a > ENABLE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `TICKINT`" ]
pub type TICKINT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TICKINT`" ]
pub struct TICKINT_W < 'a > { w : & 'a mut W , } impl < 'a > TICKINT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `CLKSOURCE`" ]
pub type CLKSOURCE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CLKSOURCE`" ]
pub struct CLKSOURCE_W < 'a > { w : & 'a mut W , } impl < 'a > CLKSOURCE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COUNTFLAG`" ]
pub type COUNTFLAG_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COUNTFLAG`" ]
pub struct COUNTFLAG_W < 'a > { w : & 'a mut W , } impl < 'a > COUNTFLAG_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } impl R { # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn enable ( & self ) -> ENABLE_R { ENABLE_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - SysTick exception request enable" ]
# [ inline ( always ) ]
pub fn tickint ( & self ) -> TICKINT_R { TICKINT_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Clock source selection" ]
# [ inline ( always ) ]
pub fn clksource ( & self ) -> CLKSOURCE_R { CLKSOURCE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - COUNTFLAG" ]
# [ inline ( always ) ]
pub fn countflag ( & self ) -> COUNTFLAG_R { COUNTFLAG_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Counter enable" ]
# [ inline ( always ) ]
pub fn enable ( & mut self ) -> ENABLE_W { ENABLE_W { w : self } } # [ doc = "Bit 1 - SysTick exception request enable" ]
# [ inline ( always ) ]
pub fn tickint ( & mut self ) -> TICKINT_W { TICKINT_W { w : self } } # [ doc = "Bit 2 - Clock source selection" ]
# [ inline ( always ) ]
pub fn clksource ( & mut self ) -> CLKSOURCE_W { CLKSOURCE_W { w : self } } # [ doc = "Bit 16 - COUNTFLAG" ]
# [ inline ( always ) ]
pub fn countflag ( & mut self ) -> COUNTFLAG_W { COUNTFLAG_W { w : self } } } } # [ doc = "SysTick reload value register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [load](load) module" ]
pub type LOAD = crate :: Reg < u32 , _LOAD > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _LOAD ; # [ doc = "`read()` method returns [load::R](load::R) reader structure" ]
impl crate :: Readable for LOAD { } # [ doc = "`write(|w| ..)` method takes [load::W](load::W) writer structure" ]
impl crate :: Writable for LOAD { } # [ doc = "SysTick reload value register" ]
pub mod load { # [ doc = "Reader of register LOAD" ]
pub type R = crate :: R < u32 , super :: LOAD > ; # [ doc = "Writer for register LOAD" ]
pub type W = crate :: W < u32 , super :: LOAD > ; # [ doc = "Register LOAD `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: LOAD { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `RELOAD`" ]
pub type RELOAD_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `RELOAD`" ]
pub struct RELOAD_W < 'a > { w : & 'a mut W , } impl < 'a > RELOAD_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x00ff_ffff ) | ( ( value as u32 ) & 0x00ff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:23 - RELOAD value" ]
# [ inline ( always ) ]
pub fn reload ( & self ) -> RELOAD_R { RELOAD_R :: new ( ( self . bits & 0x00ff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:23 - RELOAD value" ]
# [ inline ( always ) ]
pub fn reload ( & mut self ) -> RELOAD_W { RELOAD_W { w : self } } } } # [ doc = "SysTick current value register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [val](val) module" ]
pub type VAL = crate :: Reg < u32 , _VAL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _VAL ; # [ doc = "`read()` method returns [val::R](val::R) reader structure" ]
impl crate :: Readable for VAL { } # [ doc = "`write(|w| ..)` method takes [val::W](val::W) writer structure" ]
impl crate :: Writable for VAL { } # [ doc = "SysTick current value register" ]
pub mod val { # [ doc = "Reader of register VAL" ]
pub type R = crate :: R < u32 , super :: VAL > ; # [ doc = "Writer for register VAL" ]
pub type W = crate :: W < u32 , super :: VAL > ; # [ doc = "Register VAL `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: VAL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CURRENT`" ]
pub type CURRENT_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `CURRENT`" ]
pub struct CURRENT_W < 'a > { w : & 'a mut W , } impl < 'a > CURRENT_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x00ff_ffff ) | ( ( value as u32 ) & 0x00ff_ffff ) ; self . w } } impl R { # [ doc = "Bits 0:23 - Current counter value" ]
# [ inline ( always ) ]
pub fn current ( & self ) -> CURRENT_R { CURRENT_R :: new ( ( self . bits & 0x00ff_ffff ) as u32 ) } } impl W { # [ doc = "Bits 0:23 - Current counter value" ]
# [ inline ( always ) ]
pub fn current ( & mut self ) -> CURRENT_W { CURRENT_W { w : self } } } } # [ doc = "SysTick calibration value register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calib](calib) module" ]
pub type CALIB = crate :: Reg < u32 , _CALIB > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CALIB ; # [ doc = "`read()` method returns [calib::R](calib::R) reader structure" ]
impl crate :: Readable for CALIB { } # [ doc = "`write(|w| ..)` method takes [calib::W](calib::W) writer structure" ]
impl crate :: Writable for CALIB { } # [ doc = "SysTick calibration value register" ]
pub mod calib { # [ doc = "Reader of register CALIB" ]
pub type R = crate :: R < u32 , super :: CALIB > ; # [ doc = "Writer for register CALIB" ]
pub type W = crate :: W < u32 , super :: CALIB > ; # [ doc = "Register CALIB `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CALIB { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `TENMS`" ]
pub type TENMS_R = crate :: R < u32 , u32 > ; # [ doc = "Write proxy for field `TENMS`" ]
pub struct TENMS_W < 'a > { w : & 'a mut W , } impl < 'a > TENMS_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u32 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x00ff_ffff ) | ( ( value as u32 ) & 0x00ff_ffff ) ; self . w } } # [ doc = "Reader of field `SKEW`" ]
pub type SKEW_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `SKEW`" ]
pub struct SKEW_W < 'a > { w : & 'a mut W , } impl < 'a > SKEW_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Reader of field `NOREF`" ]
pub type NOREF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `NOREF`" ]
pub struct NOREF_W < 'a > { w : & 'a mut W , } impl < 'a > NOREF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bits 0:23 - Calibration value" ]
# [ inline ( always ) ]
pub fn tenms ( & self ) -> TENMS_R { TENMS_R :: new ( ( self . bits & 0x00ff_ffff ) as u32 ) } # [ doc = "Bit 30 - SKEW flag: Indicates whether the TENMS value is exact" ]
# [ inline ( always ) ]
pub fn skew ( & self ) -> SKEW_R { SKEW_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - NOREF flag. Reads as zero" ]
# [ inline ( always ) ]
pub fn noref ( & self ) -> NOREF_R { NOREF_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:23 - Calibration value" ]
# [ inline ( always ) ]
pub fn tenms ( & mut self ) -> TENMS_W { TENMS_W { w : self } } # [ doc = "Bit 30 - SKEW flag: Indicates whether the TENMS value is exact" ]
# [ inline ( always ) ]
pub fn skew ( & mut self ) -> SKEW_W { SKEW_W { w : self } } # [ doc = "Bit 31 - NOREF flag. Reads as zero" ]
# [ inline ( always ) ]
pub fn noref ( & mut self ) -> NOREF_W { NOREF_W { w : self } } } } } # [ doc = "Nested vectored interrupt controller" ]
pub struct NVIC_STIR { _marker : PhantomData < * const ( ) > } unsafe impl Send for NVIC_STIR { } impl NVIC_STIR { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const nvic_stir :: RegisterBlock { 0xe000_ef00 as * const _ } } impl Deref for NVIC_STIR { type Target = nvic_stir :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * NVIC_STIR :: ptr ( ) } } } # [ doc = "Nested vectored interrupt controller" ]
pub mod nvic_stir { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Software trigger interrupt register" ]
pub stir : STIR , } # [ doc = "Software trigger interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stir](stir) module" ]
pub type STIR = crate :: Reg < u32 , _STIR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _STIR ; # [ doc = "`read()` method returns [stir::R](stir::R) reader structure" ]
impl crate :: Readable for STIR { } # [ doc = "`write(|w| ..)` method takes [stir::W](stir::W) writer structure" ]
impl crate :: Writable for STIR { } # [ doc = "Software trigger interrupt register" ]
pub mod stir { # [ doc = "Reader of register STIR" ]
pub type R = crate :: R < u32 , super :: STIR > ; # [ doc = "Writer for register STIR" ]
pub type W = crate :: W < u32 , super :: STIR > ; # [ doc = "Register STIR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: STIR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `INTID`" ]
pub type INTID_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `INTID`" ]
pub struct INTID_W < 'a > { w : & 'a mut W , } impl < 'a > INTID_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01ff ) | ( ( value as u32 ) & 0x01ff ) ; self . w } } impl R { # [ doc = "Bits 0:8 - Software generated interrupt ID" ]
# [ inline ( always ) ]
pub fn intid ( & self ) -> INTID_R { INTID_R :: new ( ( self . bits & 0x01ff ) as u16 ) } } impl W { # [ doc = "Bits 0:8 - Software generated interrupt ID" ]
# [ inline ( always ) ]
pub fn intid ( & mut self ) -> INTID_W { INTID_W { w : self } } } } } # [ doc = "Floating point unit CPACR" ]
pub struct FPU_CPACR { _marker : PhantomData < * const ( ) > } unsafe impl Send for FPU_CPACR { } impl FPU_CPACR { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const fpu_cpacr :: RegisterBlock { 0xe000_ed88 as * const _ } } impl Deref for FPU_CPACR { type Target = fpu_cpacr :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * FPU_CPACR :: ptr ( ) } } } # [ doc = "Floating point unit CPACR" ]
pub mod fpu_cpacr { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Coprocessor access control register" ]
pub cpacr : CPACR , } # [ doc = "Coprocessor access control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpacr](cpacr) module" ]
pub type CPACR = crate :: Reg < u32 , _CPACR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CPACR ; # [ doc = "`read()` method returns [cpacr::R](cpacr::R) reader structure" ]
impl crate :: Readable for CPACR { } # [ doc = "`write(|w| ..)` method takes [cpacr::W](cpacr::W) writer structure" ]
impl crate :: Writable for CPACR { } # [ doc = "Coprocessor access control register" ]
pub mod cpacr { # [ doc = "Reader of register CPACR" ]
pub type R = crate :: R < u32 , super :: CPACR > ; # [ doc = "Writer for register CPACR" ]
pub type W = crate :: W < u32 , super :: CPACR > ; # [ doc = "Register CPACR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CPACR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CP`" ]
pub type CP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CP`" ]
pub struct CP_W < 'a > { w : & 'a mut W , } impl < 'a > CP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } impl R { # [ doc = "Bits 20:23 - CP" ]
# [ inline ( always ) ]
pub fn cp ( & self ) -> CP_R { CP_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 20:23 - CP" ]
# [ inline ( always ) ]
pub fn cp ( & mut self ) -> CP_W { CP_W { w : self } } } } } # [ doc = "System control block ACTLR" ]
pub struct SCB_ACTRL { _marker : PhantomData < * const ( ) > } unsafe impl Send for SCB_ACTRL { } impl SCB_ACTRL { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const scb_actrl :: RegisterBlock { 0xe000_e008 as * const _ } } impl Deref for SCB_ACTRL { type Target = scb_actrl :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * SCB_ACTRL :: ptr ( ) } } } # [ doc = "System control block ACTLR" ]
pub mod scb_actrl { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - Auxiliary control register" ]
pub actrl : ACTRL , } # [ doc = "Auxiliary control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [actrl](actrl) module" ]
pub type ACTRL = crate :: Reg < u32 , _ACTRL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ACTRL ; # [ doc = "`read()` method returns [actrl::R](actrl::R) reader structure" ]
impl crate :: Readable for ACTRL { } # [ doc = "`write(|w| ..)` method takes [actrl::W](actrl::W) writer structure" ]
impl crate :: Writable for ACTRL { } # [ doc = "Auxiliary control register" ]
pub mod actrl { # [ doc = "Reader of register ACTRL" ]
pub type R = crate :: R < u32 , super :: ACTRL > ; # [ doc = "Writer for register ACTRL" ]
pub type W = crate :: W < u32 , super :: ACTRL > ; # [ doc = "Register ACTRL `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ACTRL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `DISMCYCINT`" ]
pub type DISMCYCINT_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DISMCYCINT`" ]
pub struct DISMCYCINT_W < 'a > { w : & 'a mut W , } impl < 'a > DISMCYCINT_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `DISDEFWBUF`" ]
pub type DISDEFWBUF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DISDEFWBUF`" ]
pub struct DISDEFWBUF_W < 'a > { w : & 'a mut W , } impl < 'a > DISDEFWBUF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `DISFOLD`" ]
pub type DISFOLD_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DISFOLD`" ]
pub struct DISFOLD_W < 'a > { w : & 'a mut W , } impl < 'a > DISFOLD_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Reader of field `DISFPCA`" ]
pub type DISFPCA_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DISFPCA`" ]
pub struct DISFPCA_W < 'a > { w : & 'a mut W , } impl < 'a > DISFPCA_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `DISOOFP`" ]
pub type DISOOFP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `DISOOFP`" ]
pub struct DISOOFP_W < 'a > { w : & 'a mut W , } impl < 'a > DISOOFP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } impl R { # [ doc = "Bit 0 - DISMCYCINT" ]
# [ inline ( always ) ]
pub fn dismcycint ( & self ) -> DISMCYCINT_R { DISMCYCINT_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - DISDEFWBUF" ]
# [ inline ( always ) ]
pub fn disdefwbuf ( & self ) -> DISDEFWBUF_R { DISDEFWBUF_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - DISFOLD" ]
# [ inline ( always ) ]
pub fn disfold ( & self ) -> DISFOLD_R { DISFOLD_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - DISFPCA" ]
# [ inline ( always ) ]
pub fn disfpca ( & self ) -> DISFPCA_R { DISFPCA_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - DISOOFP" ]
# [ inline ( always ) ]
pub fn disoofp ( & self ) -> DISOOFP_R { DISOOFP_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - DISMCYCINT" ]
# [ inline ( always ) ]
pub fn dismcycint ( & mut self ) -> DISMCYCINT_W { DISMCYCINT_W { w : self } } # [ doc = "Bit 1 - DISDEFWBUF" ]
# [ inline ( always ) ]
pub fn disdefwbuf ( & mut self ) -> DISDEFWBUF_W { DISDEFWBUF_W { w : self } } # [ doc = "Bit 2 - DISFOLD" ]
# [ inline ( always ) ]
pub fn disfold ( & mut self ) -> DISFOLD_W { DISFOLD_W { w : self } } # [ doc = "Bit 8 - DISFPCA" ]
# [ inline ( always ) ]
pub fn disfpca ( & mut self ) -> DISFPCA_W { DISFPCA_W { w : self } } # [ doc = "Bit 9 - DISOOFP" ]
# [ inline ( always ) ]
pub fn disoofp ( & mut self ) -> DISOOFP_W { DISOOFP_W { w : self } } } } } # [ doc = "Analog-to-Digital Converter" ]
pub struct ADC1 { _marker : PhantomData < * const ( ) > } unsafe impl Send for ADC1 { } impl ADC1 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const adc1 :: RegisterBlock { 0x5000_0000 as * const _ } } impl Deref for ADC1 { type Target = adc1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * ADC1 :: ptr ( ) } } } # [ doc = "Analog-to-Digital Converter" ]
pub mod adc1 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - interrupt and status register" ]
pub isr : ISR , # [ doc = "0x04 - interrupt enable register" ]
pub ier : IER , # [ doc = "0x08 - control register" ]
pub cr : CR , # [ doc = "0x0c - configuration register" ]
pub cfgr : CFGR , _reserved4 : [ u8 ; 4usize ]
, # [ doc = "0x14 - sample time register 1" ]
pub smpr1 : SMPR1 , # [ doc = "0x18 - sample time register 2" ]
pub smpr2 : SMPR2 , _reserved6 : [ u8 ; 4usize ]
, # [ doc = "0x20 - watchdog threshold register 1" ]
pub tr1 : TR1 , # [ doc = "0x24 - watchdog threshold register" ]
pub tr2 : TR2 , # [ doc = "0x28 - watchdog threshold register 3" ]
pub tr3 : TR3 , _reserved9 : [ u8 ; 4usize ]
, # [ doc = "0x30 - regular sequence register 1" ]
pub sqr1 : SQR1 , # [ doc = "0x34 - regular sequence register 2" ]
pub sqr2 : SQR2 , # [ doc = "0x38 - regular sequence register 3" ]
pub sqr3 : SQR3 , # [ doc = "0x3c - regular sequence register 4" ]
pub sqr4 : SQR4 , # [ doc = "0x40 - regular Data Register" ]
pub dr : DR , _reserved14 : [ u8 ; 8usize ]
, # [ doc = "0x4c - injected sequence register" ]
pub jsqr : JSQR , _reserved15 : [ u8 ; 16usize ]
, # [ doc = "0x60 - offset register 1" ]
pub ofr1 : OFR1 , # [ doc = "0x64 - offset register 2" ]
pub ofr2 : OFR2 , # [ doc = "0x68 - offset register 3" ]
pub ofr3 : OFR3 , # [ doc = "0x6c - offset register 4" ]
pub ofr4 : OFR4 , _reserved19 : [ u8 ; 16usize ]
, # [ doc = "0x80 - injected data register 1" ]
pub jdr1 : JDR1 , # [ doc = "0x84 - injected data register 2" ]
pub jdr2 : JDR2 , # [ doc = "0x88 - injected data register 3" ]
pub jdr3 : JDR3 , # [ doc = "0x8c - injected data register 4" ]
pub jdr4 : JDR4 , _reserved23 : [ u8 ; 16usize ]
, # [ doc = "0xa0 - Analog Watchdog 2 Configuration Register" ]
pub awd2cr : AWD2CR , # [ doc = "0xa4 - Analog Watchdog 3 Configuration Register" ]
pub awd3cr : AWD3CR , _reserved25 : [ u8 ; 8usize ]
, # [ doc = "0xb0 - Differential Mode Selection Register 2" ]
pub difsel : DIFSEL , # [ doc = "0xb4 - Calibration Factors" ]
pub calfact : CALFACT , } # [ doc = "interrupt and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module" ]
pub type ISR = crate :: Reg < u32 , _ISR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ISR ; # [ doc = "`read()` method returns [isr::R](isr::R) reader structure" ]
impl crate :: Readable for ISR { } # [ doc = "`write(|w| ..)` method takes [isr::W](isr::W) writer structure" ]
impl crate :: Writable for ISR { } # [ doc = "interrupt and status register" ]
pub mod isr { # [ doc = "Reader of register ISR" ]
pub type R = crate :: R < u32 , super :: ISR > ; # [ doc = "Writer for register ISR" ]
pub type W = crate :: W < u32 , super :: ISR > ; # [ doc = "Register ISR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ISR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "JQOVF\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JQOVF_A { # [ doc = "0: No injected context queue overflow has occurred" ]
NOOVERFLOW = 0 , # [ doc = "1: Injected context queue overflow has occurred" ]
OVERFLOW = 1 } impl From < JQOVF_A > for bool { # [ inline ( always ) ]
fn from ( variant : JQOVF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JQOVF`" ]
pub type JQOVF_R = crate :: R < bool , JQOVF_A > ; impl JQOVF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JQOVF_A { match self . bits { false => JQOVF_A :: NOOVERFLOW , true => JQOVF_A :: OVERFLOW } } # [ doc = "Checks if the value of the field is `NOOVERFLOW`" ]
# [ inline ( always ) ]
pub fn is_no_overflow ( & self ) -> bool { * self == JQOVF_A :: NOOVERFLOW } # [ doc = "Checks if the value of the field is `OVERFLOW`" ]
# [ inline ( always ) ]
pub fn is_overflow ( & self ) -> bool { * self == JQOVF_A :: OVERFLOW } } # [ doc = "JQOVF\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JQOVF_AW { # [ doc = "1: Clear injected context queue overflow flag" ]
CLEAR = 1 } impl From < JQOVF_AW > for bool { # [ inline ( always ) ]
fn from ( variant : JQOVF_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `JQOVF`" ]
pub struct JQOVF_W < 'a > { w : & 'a mut W , } impl < 'a > JQOVF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JQOVF_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear injected context queue overflow flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( JQOVF_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "AWD3\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD3_A { # [ doc = "0: No analog watchdog event occurred" ]
NOEVENT = 0 , # [ doc = "1: Analog watchdog event occurred" ]
EVENT = 1 } impl From < AWD3_A > for bool { # [ inline ( always ) ]
fn from ( variant : AWD3_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AWD3`" ]
pub type AWD3_R = crate :: R < bool , AWD3_A > ; impl AWD3_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AWD3_A { match self . bits { false => AWD3_A :: NOEVENT , true => AWD3_A :: EVENT } } # [ doc = "Checks if the value of the field is `NOEVENT`" ]
# [ inline ( always ) ]
pub fn is_no_event ( & self ) -> bool { * self == AWD3_A :: NOEVENT } # [ doc = "Checks if the value of the field is `EVENT`" ]
# [ inline ( always ) ]
pub fn is_event ( & self ) -> bool { * self == AWD3_A :: EVENT } } # [ doc = "AWD3\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD3_AW { # [ doc = "1: Clear analog watchdog event occurred flag" ]
CLEAR = 1 } impl From < AWD3_AW > for bool { # [ inline ( always ) ]
fn from ( variant : AWD3_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `AWD3`" ]
pub struct AWD3_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear analog watchdog event occurred flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( AWD3_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "AWD2" ]
pub type AWD2_A = AWD3_A ; # [ doc = "Reader of field `AWD2`" ]
pub type AWD2_R = crate :: R < bool , AWD3_A > ; # [ doc = "AWD2" ]
pub type AWD2_AW = AWD3_AW ; # [ doc = "Write proxy for field `AWD2`" ]
pub struct AWD2_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear analog watchdog event occurred flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( AWD3_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "AWD1" ]
pub type AWD1_A = AWD3_A ; # [ doc = "Reader of field `AWD1`" ]
pub type AWD1_R = crate :: R < bool , AWD3_A > ; # [ doc = "AWD1" ]
pub type AWD1_AW = AWD3_AW ; # [ doc = "Write proxy for field `AWD1`" ]
pub struct AWD1_W < 'a > { w : & 'a mut W , } impl < 'a > AWD1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear analog watchdog event occurred flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( AWD3_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "JEOS\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOS_A { # [ doc = "0: Injected sequence is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Injected sequence complete" ]
COMPLETE = 1 } impl From < JEOS_A > for bool { # [ inline ( always ) ]
fn from ( variant : JEOS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JEOS`" ]
pub type JEOS_R = crate :: R < bool , JEOS_A > ; impl JEOS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JEOS_A { match self . bits { false => JEOS_A :: NOTCOMPLETE , true => JEOS_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == JEOS_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == JEOS_A :: COMPLETE } } # [ doc = "JEOS\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOS_AW { # [ doc = "1: Clear Injected sequence complete flag" ]
CLEAR = 1 } impl From < JEOS_AW > for bool { # [ inline ( always ) ]
fn from ( variant : JEOS_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `JEOS`" ]
pub struct JEOS_W < 'a > { w : & 'a mut W , } impl < 'a > JEOS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JEOS_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear Injected sequence complete flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( JEOS_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "JEOC\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOC_A { # [ doc = "0: Injected conversion is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Injected conversion complete" ]
COMPLETE = 1 } impl From < JEOC_A > for bool { # [ inline ( always ) ]
fn from ( variant : JEOC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JEOC`" ]
pub type JEOC_R = crate :: R < bool , JEOC_A > ; impl JEOC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JEOC_A { match self . bits { false => JEOC_A :: NOTCOMPLETE , true => JEOC_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == JEOC_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == JEOC_A :: COMPLETE } } # [ doc = "JEOC\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOC_AW { # [ doc = "1: Clear injected conversion complete flag" ]
CLEAR = 1 } impl From < JEOC_AW > for bool { # [ inline ( always ) ]
fn from ( variant : JEOC_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `JEOC`" ]
pub struct JEOC_W < 'a > { w : & 'a mut W , } impl < 'a > JEOC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JEOC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear injected conversion complete flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( JEOC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "OVR\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVR_A { # [ doc = "0: No overrun occurred" ]
NOOVERRUN = 0 , # [ doc = "1: Overrun occurred" ]
OVERRUN = 1 } impl From < OVR_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVR_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVR`" ]
pub type OVR_R = crate :: R < bool , OVR_A > ; impl OVR_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVR_A { match self . bits { false => OVR_A :: NOOVERRUN , true => OVR_A :: OVERRUN } } # [ doc = "Checks if the value of the field is `NOOVERRUN`" ]
# [ inline ( always ) ]
pub fn is_no_overrun ( & self ) -> bool { * self == OVR_A :: NOOVERRUN } # [ doc = "Checks if the value of the field is `OVERRUN`" ]
# [ inline ( always ) ]
pub fn is_overrun ( & self ) -> bool { * self == OVR_A :: OVERRUN } } # [ doc = "OVR\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVR_AW { # [ doc = "1: Clear overrun occurred flag" ]
CLEAR = 1 } impl From < OVR_AW > for bool { # [ inline ( always ) ]
fn from ( variant : OVR_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `OVR`" ]
pub struct OVR_W < 'a > { w : & 'a mut W , } impl < 'a > OVR_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OVR_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear overrun occurred flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( OVR_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "EOS\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOS_A { # [ doc = "0: Regular sequence is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Regular sequence complete" ]
COMPLETE = 1 } impl From < EOS_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOS`" ]
pub type EOS_R = crate :: R < bool , EOS_A > ; impl EOS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOS_A { match self . bits { false => EOS_A :: NOTCOMPLETE , true => EOS_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == EOS_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == EOS_A :: COMPLETE } } # [ doc = "EOS\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOS_AW { # [ doc = "1: Clear regular sequence complete flag" ]
CLEAR = 1 } impl From < EOS_AW > for bool { # [ inline ( always ) ]
fn from ( variant : EOS_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `EOS`" ]
pub struct EOS_W < 'a > { w : & 'a mut W , } impl < 'a > EOS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOS_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear regular sequence complete flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( EOS_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "EOC\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOC_A { # [ doc = "0: Regular conversion is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Regular conversion complete" ]
COMPLETE = 1 } impl From < EOC_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOC_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOC`" ]
pub type EOC_R = crate :: R < bool , EOC_A > ; impl EOC_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOC_A { match self . bits { false => EOC_A :: NOTCOMPLETE , true => EOC_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == EOC_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == EOC_A :: COMPLETE } } # [ doc = "EOC\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOC_AW { # [ doc = "1: Clear regular conversion complete flag" ]
CLEAR = 1 } impl From < EOC_AW > for bool { # [ inline ( always ) ]
fn from ( variant : EOC_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `EOC`" ]
pub struct EOC_W < 'a > { w : & 'a mut W , } impl < 'a > EOC_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOC_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear regular conversion complete flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( EOC_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "EOSMP\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOSMP_A { # [ doc = "0: End of sampling phase no yet reached" ]
NOTENDED = 0 , # [ doc = "1: End of sampling phase reached" ]
ENDED = 1 } impl From < EOSMP_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOSMP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOSMP`" ]
pub type EOSMP_R = crate :: R < bool , EOSMP_A > ; impl EOSMP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOSMP_A { match self . bits { false => EOSMP_A :: NOTENDED , true => EOSMP_A :: ENDED } } # [ doc = "Checks if the value of the field is `NOTENDED`" ]
# [ inline ( always ) ]
pub fn is_not_ended ( & self ) -> bool { * self == EOSMP_A :: NOTENDED } # [ doc = "Checks if the value of the field is `ENDED`" ]
# [ inline ( always ) ]
pub fn is_ended ( & self ) -> bool { * self == EOSMP_A :: ENDED } } # [ doc = "EOSMP\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOSMP_AW { # [ doc = "1: Clear end of sampling phase reached flag" ]
CLEAR = 1 } impl From < EOSMP_AW > for bool { # [ inline ( always ) ]
fn from ( variant : EOSMP_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `EOSMP`" ]
pub struct EOSMP_W < 'a > { w : & 'a mut W , } impl < 'a > EOSMP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOSMP_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear end of sampling phase reached flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( EOSMP_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "ADRDY\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADRDY_A { # [ doc = "0: ADC is not ready to start conversion" ]
NOTREADY = 0 , # [ doc = "1: ADC is ready to start conversion" ]
READY = 1 } impl From < ADRDY_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADRDY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADRDY`" ]
pub type ADRDY_R = crate :: R < bool , ADRDY_A > ; impl ADRDY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADRDY_A { match self . bits { false => ADRDY_A :: NOTREADY , true => ADRDY_A :: READY } } # [ doc = "Checks if the value of the field is `NOTREADY`" ]
# [ inline ( always ) ]
pub fn is_not_ready ( & self ) -> bool { * self == ADRDY_A :: NOTREADY } # [ doc = "Checks if the value of the field is `READY`" ]
# [ inline ( always ) ]
pub fn is_ready ( & self ) -> bool { * self == ADRDY_A :: READY } } # [ doc = "ADRDY\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADRDY_AW { # [ doc = "1: Clear ADC is ready to start conversion flag" ]
CLEAR = 1 } impl From < ADRDY_AW > for bool { # [ inline ( always ) ]
fn from ( variant : ADRDY_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `ADRDY`" ]
pub struct ADRDY_W < 'a > { w : & 'a mut W , } impl < 'a > ADRDY_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADRDY_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Clear ADC is ready to start conversion flag" ]
# [ inline ( always ) ]
pub fn clear ( self ) -> & 'a mut W { self . variant ( ADRDY_AW :: CLEAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 10 - JQOVF" ]
# [ inline ( always ) ]
pub fn jqovf ( & self ) -> JQOVF_R { JQOVF_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - AWD3" ]
# [ inline ( always ) ]
pub fn awd3 ( & self ) -> AWD3_R { AWD3_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - AWD2" ]
# [ inline ( always ) ]
pub fn awd2 ( & self ) -> AWD2_R { AWD2_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - AWD1" ]
# [ inline ( always ) ]
pub fn awd1 ( & self ) -> AWD1_R { AWD1_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - JEOS" ]
# [ inline ( always ) ]
pub fn jeos ( & self ) -> JEOS_R { JEOS_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - JEOC" ]
# [ inline ( always ) ]
pub fn jeoc ( & self ) -> JEOC_R { JEOC_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - OVR" ]
# [ inline ( always ) ]
pub fn ovr ( & self ) -> OVR_R { OVR_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - EOS" ]
# [ inline ( always ) ]
pub fn eos ( & self ) -> EOS_R { EOS_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - EOC" ]
# [ inline ( always ) ]
pub fn eoc ( & self ) -> EOC_R { EOC_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - EOSMP" ]
# [ inline ( always ) ]
pub fn eosmp ( & self ) -> EOSMP_R { EOSMP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - ADRDY" ]
# [ inline ( always ) ]
pub fn adrdy ( & self ) -> ADRDY_R { ADRDY_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 10 - JQOVF" ]
# [ inline ( always ) ]
pub fn jqovf ( & mut self ) -> JQOVF_W { JQOVF_W { w : self } } # [ doc = "Bit 9 - AWD3" ]
# [ inline ( always ) ]
pub fn awd3 ( & mut self ) -> AWD3_W { AWD3_W { w : self } } # [ doc = "Bit 8 - AWD2" ]
# [ inline ( always ) ]
pub fn awd2 ( & mut self ) -> AWD2_W { AWD2_W { w : self } } # [ doc = "Bit 7 - AWD1" ]
# [ inline ( always ) ]
pub fn awd1 ( & mut self ) -> AWD1_W { AWD1_W { w : self } } # [ doc = "Bit 6 - JEOS" ]
# [ inline ( always ) ]
pub fn jeos ( & mut self ) -> JEOS_W { JEOS_W { w : self } } # [ doc = "Bit 5 - JEOC" ]
# [ inline ( always ) ]
pub fn jeoc ( & mut self ) -> JEOC_W { JEOC_W { w : self } } # [ doc = "Bit 4 - OVR" ]
# [ inline ( always ) ]
pub fn ovr ( & mut self ) -> OVR_W { OVR_W { w : self } } # [ doc = "Bit 3 - EOS" ]
# [ inline ( always ) ]
pub fn eos ( & mut self ) -> EOS_W { EOS_W { w : self } } # [ doc = "Bit 2 - EOC" ]
# [ inline ( always ) ]
pub fn eoc ( & mut self ) -> EOC_W { EOC_W { w : self } } # [ doc = "Bit 1 - EOSMP" ]
# [ inline ( always ) ]
pub fn eosmp ( & mut self ) -> EOSMP_W { EOSMP_W { w : self } } # [ doc = "Bit 0 - ADRDY" ]
# [ inline ( always ) ]
pub fn adrdy ( & mut self ) -> ADRDY_W { ADRDY_W { w : self } } } } # [ doc = "interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](ier) module" ]
pub type IER = crate :: Reg < u32 , _IER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IER ; # [ doc = "`read()` method returns [ier::R](ier::R) reader structure" ]
impl crate :: Readable for IER { } # [ doc = "`write(|w| ..)` method takes [ier::W](ier::W) writer structure" ]
impl crate :: Writable for IER { } # [ doc = "interrupt enable register" ]
pub mod ier { # [ doc = "Reader of register IER" ]
pub type R = crate :: R < u32 , super :: IER > ; # [ doc = "Writer for register IER" ]
pub type W = crate :: W < u32 , super :: IER > ; # [ doc = "Register IER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: IER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "JQOVFIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JQOVFIE_A { # [ doc = "0: Injected context queue overflow interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Injected context queue overflow interrupt enabled" ]
ENABLED = 1 } impl From < JQOVFIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : JQOVFIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JQOVFIE`" ]
pub type JQOVFIE_R = crate :: R < bool , JQOVFIE_A > ; impl JQOVFIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JQOVFIE_A { match self . bits { false => JQOVFIE_A :: DISABLED , true => JQOVFIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == JQOVFIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == JQOVFIE_A :: ENABLED } } # [ doc = "Write proxy for field `JQOVFIE`" ]
pub struct JQOVFIE_W < 'a > { w : & 'a mut W , } impl < 'a > JQOVFIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JQOVFIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Injected context queue overflow interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( JQOVFIE_A :: DISABLED ) } # [ doc = "Injected context queue overflow interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( JQOVFIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "AWD3IE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD3IE_A { # [ doc = "0: Analog watchdog interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Analog watchdog interrupt enabled" ]
ENABLED = 1 } impl From < AWD3IE_A > for bool { # [ inline ( always ) ]
fn from ( variant : AWD3IE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AWD3IE`" ]
pub type AWD3IE_R = crate :: R < bool , AWD3IE_A > ; impl AWD3IE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AWD3IE_A { match self . bits { false => AWD3IE_A :: DISABLED , true => AWD3IE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == AWD3IE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == AWD3IE_A :: ENABLED } } # [ doc = "Write proxy for field `AWD3IE`" ]
pub struct AWD3IE_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Analog watchdog interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( AWD3IE_A :: DISABLED ) } # [ doc = "Analog watchdog interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( AWD3IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "AWD2IE" ]
pub type AWD2IE_A = AWD3IE_A ; # [ doc = "Reader of field `AWD2IE`" ]
pub type AWD2IE_R = crate :: R < bool , AWD3IE_A > ; # [ doc = "Write proxy for field `AWD2IE`" ]
pub struct AWD2IE_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Analog watchdog interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( AWD3IE_A :: DISABLED ) } # [ doc = "Analog watchdog interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( AWD3IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "AWD1IE" ]
pub type AWD1IE_A = AWD3IE_A ; # [ doc = "Reader of field `AWD1IE`" ]
pub type AWD1IE_R = crate :: R < bool , AWD3IE_A > ; # [ doc = "Write proxy for field `AWD1IE`" ]
pub struct AWD1IE_W < 'a > { w : & 'a mut W , } impl < 'a > AWD1IE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD1IE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Analog watchdog interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( AWD3IE_A :: DISABLED ) } # [ doc = "Analog watchdog interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( AWD3IE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "JEOSIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOSIE_A { # [ doc = "0: End of injected sequence interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: End of injected sequence interrupt enabled" ]
ENABLED = 1 } impl From < JEOSIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : JEOSIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JEOSIE`" ]
pub type JEOSIE_R = crate :: R < bool , JEOSIE_A > ; impl JEOSIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JEOSIE_A { match self . bits { false => JEOSIE_A :: DISABLED , true => JEOSIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == JEOSIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == JEOSIE_A :: ENABLED } } # [ doc = "Write proxy for field `JEOSIE`" ]
pub struct JEOSIE_W < 'a > { w : & 'a mut W , } impl < 'a > JEOSIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JEOSIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "End of injected sequence interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( JEOSIE_A :: DISABLED ) } # [ doc = "End of injected sequence interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( JEOSIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "JEOCIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOCIE_A { # [ doc = "0: End of injected conversion interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: End of injected conversion interrupt enabled" ]
ENABLED = 1 } impl From < JEOCIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : JEOCIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JEOCIE`" ]
pub type JEOCIE_R = crate :: R < bool , JEOCIE_A > ; impl JEOCIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JEOCIE_A { match self . bits { false => JEOCIE_A :: DISABLED , true => JEOCIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == JEOCIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == JEOCIE_A :: ENABLED } } # [ doc = "Write proxy for field `JEOCIE`" ]
pub struct JEOCIE_W < 'a > { w : & 'a mut W , } impl < 'a > JEOCIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JEOCIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "End of injected conversion interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( JEOCIE_A :: DISABLED ) } # [ doc = "End of injected conversion interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( JEOCIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "OVRIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVRIE_A { # [ doc = "0: Overrun interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: Overrun interrupt enabled" ]
ENABLED = 1 } impl From < OVRIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVRIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVRIE`" ]
pub type OVRIE_R = crate :: R < bool , OVRIE_A > ; impl OVRIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVRIE_A { match self . bits { false => OVRIE_A :: DISABLED , true => OVRIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OVRIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OVRIE_A :: ENABLED } } # [ doc = "Write proxy for field `OVRIE`" ]
pub struct OVRIE_W < 'a > { w : & 'a mut W , } impl < 'a > OVRIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OVRIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Overrun interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OVRIE_A :: DISABLED ) } # [ doc = "Overrun interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OVRIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "EOSIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOSIE_A { # [ doc = "0: End of regular sequence interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: End of regular sequence interrupt enabled" ]
ENABLED = 1 } impl From < EOSIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOSIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOSIE`" ]
pub type EOSIE_R = crate :: R < bool , EOSIE_A > ; impl EOSIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOSIE_A { match self . bits { false => EOSIE_A :: DISABLED , true => EOSIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EOSIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EOSIE_A :: ENABLED } } # [ doc = "Write proxy for field `EOSIE`" ]
pub struct EOSIE_W < 'a > { w : & 'a mut W , } impl < 'a > EOSIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOSIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "End of regular sequence interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EOSIE_A :: DISABLED ) } # [ doc = "End of regular sequence interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EOSIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "EOCIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOCIE_A { # [ doc = "0: End of regular conversion interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: End of regular conversion interrupt enabled" ]
ENABLED = 1 } impl From < EOCIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOCIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOCIE`" ]
pub type EOCIE_R = crate :: R < bool , EOCIE_A > ; impl EOCIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOCIE_A { match self . bits { false => EOCIE_A :: DISABLED , true => EOCIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EOCIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EOCIE_A :: ENABLED } } # [ doc = "Write proxy for field `EOCIE`" ]
pub struct EOCIE_W < 'a > { w : & 'a mut W , } impl < 'a > EOCIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOCIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "End of regular conversion interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EOCIE_A :: DISABLED ) } # [ doc = "End of regular conversion interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EOCIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "EOSMPIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOSMPIE_A { # [ doc = "0: End of regular conversion sampling phase interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: End of regular conversion sampling phase interrupt enabled" ]
ENABLED = 1 } impl From < EOSMPIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOSMPIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOSMPIE`" ]
pub type EOSMPIE_R = crate :: R < bool , EOSMPIE_A > ; impl EOSMPIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOSMPIE_A { match self . bits { false => EOSMPIE_A :: DISABLED , true => EOSMPIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EOSMPIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == EOSMPIE_A :: ENABLED } } # [ doc = "Write proxy for field `EOSMPIE`" ]
pub struct EOSMPIE_W < 'a > { w : & 'a mut W , } impl < 'a > EOSMPIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EOSMPIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "End of regular conversion sampling phase interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EOSMPIE_A :: DISABLED ) } # [ doc = "End of regular conversion sampling phase interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( EOSMPIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "ADRDYIE\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADRDYIE_A { # [ doc = "0: ADC ready interrupt disabled" ]
DISABLED = 0 , # [ doc = "1: ADC ready interrupt enabled" ]
ENABLED = 1 } impl From < ADRDYIE_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADRDYIE_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADRDYIE`" ]
pub type ADRDYIE_R = crate :: R < bool , ADRDYIE_A > ; impl ADRDYIE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADRDYIE_A { match self . bits { false => ADRDYIE_A :: DISABLED , true => ADRDYIE_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ADRDYIE_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ADRDYIE_A :: ENABLED } } # [ doc = "Write proxy for field `ADRDYIE`" ]
pub struct ADRDYIE_W < 'a > { w : & 'a mut W , } impl < 'a > ADRDYIE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADRDYIE_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "ADC ready interrupt disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ADRDYIE_A :: DISABLED ) } # [ doc = "ADC ready interrupt enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ADRDYIE_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 10 - JQOVFIE" ]
# [ inline ( always ) ]
pub fn jqovfie ( & self ) -> JQOVFIE_R { JQOVFIE_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - AWD3IE" ]
# [ inline ( always ) ]
pub fn awd3ie ( & self ) -> AWD3IE_R { AWD3IE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - AWD2IE" ]
# [ inline ( always ) ]
pub fn awd2ie ( & self ) -> AWD2IE_R { AWD2IE_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - AWD1IE" ]
# [ inline ( always ) ]
pub fn awd1ie ( & self ) -> AWD1IE_R { AWD1IE_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - JEOSIE" ]
# [ inline ( always ) ]
pub fn jeosie ( & self ) -> JEOSIE_R { JEOSIE_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - JEOCIE" ]
# [ inline ( always ) ]
pub fn jeocie ( & self ) -> JEOCIE_R { JEOCIE_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - OVRIE" ]
# [ inline ( always ) ]
pub fn ovrie ( & self ) -> OVRIE_R { OVRIE_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - EOSIE" ]
# [ inline ( always ) ]
pub fn eosie ( & self ) -> EOSIE_R { EOSIE_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - EOCIE" ]
# [ inline ( always ) ]
pub fn eocie ( & self ) -> EOCIE_R { EOCIE_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - EOSMPIE" ]
# [ inline ( always ) ]
pub fn eosmpie ( & self ) -> EOSMPIE_R { EOSMPIE_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - ADRDYIE" ]
# [ inline ( always ) ]
pub fn adrdyie ( & self ) -> ADRDYIE_R { ADRDYIE_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 10 - JQOVFIE" ]
# [ inline ( always ) ]
pub fn jqovfie ( & mut self ) -> JQOVFIE_W { JQOVFIE_W { w : self } } # [ doc = "Bit 9 - AWD3IE" ]
# [ inline ( always ) ]
pub fn awd3ie ( & mut self ) -> AWD3IE_W { AWD3IE_W { w : self } } # [ doc = "Bit 8 - AWD2IE" ]
# [ inline ( always ) ]
pub fn awd2ie ( & mut self ) -> AWD2IE_W { AWD2IE_W { w : self } } # [ doc = "Bit 7 - AWD1IE" ]
# [ inline ( always ) ]
pub fn awd1ie ( & mut self ) -> AWD1IE_W { AWD1IE_W { w : self } } # [ doc = "Bit 6 - JEOSIE" ]
# [ inline ( always ) ]
pub fn jeosie ( & mut self ) -> JEOSIE_W { JEOSIE_W { w : self } } # [ doc = "Bit 5 - JEOCIE" ]
# [ inline ( always ) ]
pub fn jeocie ( & mut self ) -> JEOCIE_W { JEOCIE_W { w : self } } # [ doc = "Bit 4 - OVRIE" ]
# [ inline ( always ) ]
pub fn ovrie ( & mut self ) -> OVRIE_W { OVRIE_W { w : self } } # [ doc = "Bit 3 - EOSIE" ]
# [ inline ( always ) ]
pub fn eosie ( & mut self ) -> EOSIE_W { EOSIE_W { w : self } } # [ doc = "Bit 2 - EOCIE" ]
# [ inline ( always ) ]
pub fn eocie ( & mut self ) -> EOCIE_W { EOCIE_W { w : self } } # [ doc = "Bit 1 - EOSMPIE" ]
# [ inline ( always ) ]
pub fn eosmpie ( & mut self ) -> EOSMPIE_W { EOSMPIE_W { w : self } } # [ doc = "Bit 0 - ADRDYIE" ]
# [ inline ( always ) ]
pub fn adrdyie ( & mut self ) -> ADRDYIE_W { ADRDYIE_W { w : self } } } } # [ doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module" ]
pub type CR = crate :: Reg < u32 , _CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CR ; # [ doc = "`read()` method returns [cr::R](cr::R) reader structure" ]
impl crate :: Readable for CR { } # [ doc = "`write(|w| ..)` method takes [cr::W](cr::W) writer structure" ]
impl crate :: Writable for CR { } # [ doc = "control register" ]
pub mod cr { # [ doc = "Reader of register CR" ]
pub type R = crate :: R < u32 , super :: CR > ; # [ doc = "Writer for register CR" ]
pub type W = crate :: W < u32 , super :: CR > ; # [ doc = "Register CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "ADCAL\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADCAL_A { # [ doc = "0: Calibration complete" ]
COMPLETE = 0 , # [ doc = "1: Start the calibration of the ADC" ]
CALIBRATION = 1 } impl From < ADCAL_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADCAL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADCAL`" ]
pub type ADCAL_R = crate :: R < bool , ADCAL_A > ; impl ADCAL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADCAL_A { match self . bits { false => ADCAL_A :: COMPLETE , true => ADCAL_A :: CALIBRATION } } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == ADCAL_A :: COMPLETE } # [ doc = "Checks if the value of the field is `CALIBRATION`" ]
# [ inline ( always ) ]
pub fn is_calibration ( & self ) -> bool { * self == ADCAL_A :: CALIBRATION } } # [ doc = "Write proxy for field `ADCAL`" ]
pub struct ADCAL_W < 'a > { w : & 'a mut W , } impl < 'a > ADCAL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADCAL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Calibration complete" ]
# [ inline ( always ) ]
pub fn complete ( self ) -> & 'a mut W { self . variant ( ADCAL_A :: COMPLETE ) } # [ doc = "Start the calibration of the ADC" ]
# [ inline ( always ) ]
pub fn calibration ( self ) -> & 'a mut W { self . variant ( ADCAL_A :: CALIBRATION ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "ADCALDIF\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADCALDIF_A { # [ doc = "0: Calibration for single-ended mode" ]
SINGLEENDED = 0 , # [ doc = "1: Calibration for differential mode" ]
DIFFERENTIAL = 1 } impl From < ADCALDIF_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADCALDIF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADCALDIF`" ]
pub type ADCALDIF_R = crate :: R < bool , ADCALDIF_A > ; impl ADCALDIF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADCALDIF_A { match self . bits { false => ADCALDIF_A :: SINGLEENDED , true => ADCALDIF_A :: DIFFERENTIAL } } # [ doc = "Checks if the value of the field is `SINGLEENDED`" ]
# [ inline ( always ) ]
pub fn is_single_ended ( & self ) -> bool { * self == ADCALDIF_A :: SINGLEENDED } # [ doc = "Checks if the value of the field is `DIFFERENTIAL`" ]
# [ inline ( always ) ]
pub fn is_differential ( & self ) -> bool { * self == ADCALDIF_A :: DIFFERENTIAL } } # [ doc = "Write proxy for field `ADCALDIF`" ]
pub struct ADCALDIF_W < 'a > { w : & 'a mut W , } impl < 'a > ADCALDIF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADCALDIF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Calibration for single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( ADCALDIF_A :: SINGLEENDED ) } # [ doc = "Calibration for differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( ADCALDIF_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "ADVREGEN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum ADVREGEN_A { # [ doc = "0: Intermediate state required when moving the ADC voltage regulator between states" ]
INTERMEDIATE = 0 , # [ doc = "1: ADC voltage regulator enabled" ]
ENABLED = 1 , # [ doc = "2: ADC voltage regulator disabled" ]
DISABLED = 2 } impl From < ADVREGEN_A > for u8 { # [ inline ( always ) ]
fn from ( variant : ADVREGEN_A ) -> Self { variant as _ } } # [ doc = "Reader of field `ADVREGEN`" ]
pub type ADVREGEN_R = crate :: R < u8 , ADVREGEN_A > ; impl ADVREGEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , ADVREGEN_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( ADVREGEN_A :: INTERMEDIATE ) , 1 => Val ( ADVREGEN_A :: ENABLED ) , 2 => Val ( ADVREGEN_A :: DISABLED ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `INTERMEDIATE`" ]
# [ inline ( always ) ]
pub fn is_intermediate ( & self ) -> bool { * self == ADVREGEN_A :: INTERMEDIATE } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == ADVREGEN_A :: ENABLED } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == ADVREGEN_A :: DISABLED } } # [ doc = "Write proxy for field `ADVREGEN`" ]
pub struct ADVREGEN_W < 'a > { w : & 'a mut W , } impl < 'a > ADVREGEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADVREGEN_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Intermediate state required when moving the ADC voltage regulator between states" ]
# [ inline ( always ) ]
pub fn intermediate ( self ) -> & 'a mut W { self . variant ( ADVREGEN_A :: INTERMEDIATE ) } # [ doc = "ADC voltage regulator enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( ADVREGEN_A :: ENABLED ) } # [ doc = "ADC voltage regulator disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( ADVREGEN_A :: DISABLED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "JADSTP\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JADSTP_A { # [ doc = "1: Stop conversion of channel" ]
STOP = 1 } impl From < JADSTP_A > for bool { # [ inline ( always ) ]
fn from ( variant : JADSTP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JADSTP`" ]
pub type JADSTP_R = crate :: R < bool , JADSTP_A > ; impl JADSTP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , JADSTP_A > { use crate :: Variant :: * ; match self . bits { true => Val ( JADSTP_A :: STOP ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `STOP`" ]
# [ inline ( always ) ]
pub fn is_stop ( & self ) -> bool { * self == JADSTP_A :: STOP } } # [ doc = "Write proxy for field `JADSTP`" ]
pub struct JADSTP_W < 'a > { w : & 'a mut W , } impl < 'a > JADSTP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JADSTP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Stop conversion of channel" ]
# [ inline ( always ) ]
pub fn stop ( self ) -> & 'a mut W { self . variant ( JADSTP_A :: STOP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "ADSTP" ]
pub type ADSTP_A = JADSTP_A ; # [ doc = "Reader of field `ADSTP`" ]
pub type ADSTP_R = crate :: R < bool , JADSTP_A > ; # [ doc = "Write proxy for field `ADSTP`" ]
pub struct ADSTP_W < 'a > { w : & 'a mut W , } impl < 'a > ADSTP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADSTP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Stop conversion of channel" ]
# [ inline ( always ) ]
pub fn stop ( self ) -> & 'a mut W { self . variant ( JADSTP_A :: STOP ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "JADSTART\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JADSTART_A { # [ doc = "1: Starts conversion of channel" ]
START = 1 } impl From < JADSTART_A > for bool { # [ inline ( always ) ]
fn from ( variant : JADSTART_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JADSTART`" ]
pub type JADSTART_R = crate :: R < bool , JADSTART_A > ; impl JADSTART_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , JADSTART_A > { use crate :: Variant :: * ; match self . bits { true => Val ( JADSTART_A :: START ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `START`" ]
# [ inline ( always ) ]
pub fn is_start ( & self ) -> bool { * self == JADSTART_A :: START } } # [ doc = "Write proxy for field `JADSTART`" ]
pub struct JADSTART_W < 'a > { w : & 'a mut W , } impl < 'a > JADSTART_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JADSTART_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Starts conversion of channel" ]
# [ inline ( always ) ]
pub fn start ( self ) -> & 'a mut W { self . variant ( JADSTART_A :: START ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "ADSTART" ]
pub type ADSTART_A = JADSTART_A ; # [ doc = "Reader of field `ADSTART`" ]
pub type ADSTART_R = crate :: R < bool , JADSTART_A > ; # [ doc = "Write proxy for field `ADSTART`" ]
pub struct ADSTART_W < 'a > { w : & 'a mut W , } impl < 'a > ADSTART_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADSTART_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Starts conversion of channel" ]
# [ inline ( always ) ]
pub fn start ( self ) -> & 'a mut W { self . variant ( JADSTART_A :: START ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "ADDIS\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADDIS_A { # [ doc = "0: Disable ADC conversion and go to power down mode" ]
DISABLE = 0 } impl From < ADDIS_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADDIS_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADDIS`" ]
pub type ADDIS_R = crate :: R < bool , ADDIS_A > ; impl ADDIS_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ADDIS_A > { use crate :: Variant :: * ; match self . bits { false => Val ( ADDIS_A :: DISABLE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DISABLE`" ]
# [ inline ( always ) ]
pub fn is_disable ( & self ) -> bool { * self == ADDIS_A :: DISABLE } } # [ doc = "Write proxy for field `ADDIS`" ]
pub struct ADDIS_W < 'a > { w : & 'a mut W , } impl < 'a > ADDIS_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADDIS_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Disable ADC conversion and go to power down mode" ]
# [ inline ( always ) ]
pub fn disable ( self ) -> & 'a mut W { self . variant ( ADDIS_A :: DISABLE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "ADEN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADEN_A { # [ doc = "1: Enable ADC" ]
ENABLE = 1 } impl From < ADEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADEN`" ]
pub type ADEN_R = crate :: R < bool , ADEN_A > ; impl ADEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < bool , ADEN_A > { use crate :: Variant :: * ; match self . bits { true => Val ( ADEN_A :: ENABLE ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ENABLE`" ]
# [ inline ( always ) ]
pub fn is_enable ( & self ) -> bool { * self == ADEN_A :: ENABLE } } # [ doc = "Write proxy for field `ADEN`" ]
pub struct ADEN_W < 'a > { w : & 'a mut W , } impl < 'a > ADEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ADEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Enable ADC" ]
# [ inline ( always ) ]
pub fn enable ( self ) -> & 'a mut W { self . variant ( ADEN_A :: ENABLE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 31 - ADCAL" ]
# [ inline ( always ) ]
pub fn adcal ( & self ) -> ADCAL_R { ADCAL_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - ADCALDIF" ]
# [ inline ( always ) ]
pub fn adcaldif ( & self ) -> ADCALDIF_R { ADCALDIF_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bits 28:29 - ADVREGEN" ]
# [ inline ( always ) ]
pub fn advregen ( & self ) -> ADVREGEN_R { ADVREGEN_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bit 5 - JADSTP" ]
# [ inline ( always ) ]
pub fn jadstp ( & self ) -> JADSTP_R { JADSTP_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - ADSTP" ]
# [ inline ( always ) ]
pub fn adstp ( & self ) -> ADSTP_R { ADSTP_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - JADSTART" ]
# [ inline ( always ) ]
pub fn jadstart ( & self ) -> JADSTART_R { JADSTART_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - ADSTART" ]
# [ inline ( always ) ]
pub fn adstart ( & self ) -> ADSTART_R { ADSTART_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - ADDIS" ]
# [ inline ( always ) ]
pub fn addis ( & self ) -> ADDIS_R { ADDIS_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - ADEN" ]
# [ inline ( always ) ]
pub fn aden ( & self ) -> ADEN_R { ADEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 31 - ADCAL" ]
# [ inline ( always ) ]
pub fn adcal ( & mut self ) -> ADCAL_W { ADCAL_W { w : self } } # [ doc = "Bit 30 - ADCALDIF" ]
# [ inline ( always ) ]
pub fn adcaldif ( & mut self ) -> ADCALDIF_W { ADCALDIF_W { w : self } } # [ doc = "Bits 28:29 - ADVREGEN" ]
# [ inline ( always ) ]
pub fn advregen ( & mut self ) -> ADVREGEN_W { ADVREGEN_W { w : self } } # [ doc = "Bit 5 - JADSTP" ]
# [ inline ( always ) ]
pub fn jadstp ( & mut self ) -> JADSTP_W { JADSTP_W { w : self } } # [ doc = "Bit 4 - ADSTP" ]
# [ inline ( always ) ]
pub fn adstp ( & mut self ) -> ADSTP_W { ADSTP_W { w : self } } # [ doc = "Bit 3 - JADSTART" ]
# [ inline ( always ) ]
pub fn jadstart ( & mut self ) -> JADSTART_W { JADSTART_W { w : self } } # [ doc = "Bit 2 - ADSTART" ]
# [ inline ( always ) ]
pub fn adstart ( & mut self ) -> ADSTART_W { ADSTART_W { w : self } } # [ doc = "Bit 1 - ADDIS" ]
# [ inline ( always ) ]
pub fn addis ( & mut self ) -> ADDIS_W { ADDIS_W { w : self } } # [ doc = "Bit 0 - ADEN" ]
# [ inline ( always ) ]
pub fn aden ( & mut self ) -> ADEN_W { ADEN_W { w : self } } } } # [ doc = "configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr](cfgr) module" ]
pub type CFGR = crate :: Reg < u32 , _CFGR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CFGR ; # [ doc = "`read()` method returns [cfgr::R](cfgr::R) reader structure" ]
impl crate :: Readable for CFGR { } # [ doc = "`write(|w| ..)` method takes [cfgr::W](cfgr::W) writer structure" ]
impl crate :: Writable for CFGR { } # [ doc = "configuration register" ]
pub mod cfgr { # [ doc = "Reader of register CFGR" ]
pub type R = crate :: R < u32 , super :: CFGR > ; # [ doc = "Writer for register CFGR" ]
pub type W = crate :: W < u32 , super :: CFGR > ; # [ doc = "Register CFGR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CFGR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `AWD1CH`" ]
pub type AWD1CH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `AWD1CH`" ]
pub struct AWD1CH_W < 'a > { w : & 'a mut W , } impl < 'a > AWD1CH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 26 ) ) | ( ( ( value as u32 ) & 0x1f ) << 26 ) ; self . w } } # [ doc = "JAUTO\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JAUTO_A { # [ doc = "0: Automatic injected group conversion disabled" ]
DISABLED = 0 , # [ doc = "1: Automatic injected group conversion enabled" ]
ENABLED = 1 } impl From < JAUTO_A > for bool { # [ inline ( always ) ]
fn from ( variant : JAUTO_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JAUTO`" ]
pub type JAUTO_R = crate :: R < bool , JAUTO_A > ; impl JAUTO_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JAUTO_A { match self . bits { false => JAUTO_A :: DISABLED , true => JAUTO_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == JAUTO_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == JAUTO_A :: ENABLED } } # [ doc = "Write proxy for field `JAUTO`" ]
pub struct JAUTO_W < 'a > { w : & 'a mut W , } impl < 'a > JAUTO_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JAUTO_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Automatic injected group conversion disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( JAUTO_A :: DISABLED ) } # [ doc = "Automatic injected group conversion enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( JAUTO_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "JAWD1EN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JAWD1EN_A { # [ doc = "0: Analog watchdog 1 disabled on injected channels" ]
DISABLED = 0 , # [ doc = "1: Analog watchdog 1 enabled on injected channels" ]
ENABLED = 1 } impl From < JAWD1EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : JAWD1EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JAWD1EN`" ]
pub type JAWD1EN_R = crate :: R < bool , JAWD1EN_A > ; impl JAWD1EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JAWD1EN_A { match self . bits { false => JAWD1EN_A :: DISABLED , true => JAWD1EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == JAWD1EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == JAWD1EN_A :: ENABLED } } # [ doc = "Write proxy for field `JAWD1EN`" ]
pub struct JAWD1EN_W < 'a > { w : & 'a mut W , } impl < 'a > JAWD1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JAWD1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Analog watchdog 1 disabled on injected channels" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( JAWD1EN_A :: DISABLED ) } # [ doc = "Analog watchdog 1 enabled on injected channels" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( JAWD1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "AWD1EN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD1EN_A { # [ doc = "0: Analog watchdog 1 disabled on regular channels" ]
DISABLED = 0 , # [ doc = "1: Analog watchdog 1 enabled on regular channels" ]
ENABLED = 1 } impl From < AWD1EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : AWD1EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AWD1EN`" ]
pub type AWD1EN_R = crate :: R < bool , AWD1EN_A > ; impl AWD1EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AWD1EN_A { match self . bits { false => AWD1EN_A :: DISABLED , true => AWD1EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == AWD1EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == AWD1EN_A :: ENABLED } } # [ doc = "Write proxy for field `AWD1EN`" ]
pub struct AWD1EN_W < 'a > { w : & 'a mut W , } impl < 'a > AWD1EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD1EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Analog watchdog 1 disabled on regular channels" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( AWD1EN_A :: DISABLED ) } # [ doc = "Analog watchdog 1 enabled on regular channels" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( AWD1EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "AWD1SGL\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD1SGL_A { # [ doc = "0: Analog watchdog 1 enabled on all channels" ]
ALL = 0 , # [ doc = "1: Analog watchdog 1 enabled on single channel selected in AWD1CH" ]
SINGLE = 1 } impl From < AWD1SGL_A > for bool { # [ inline ( always ) ]
fn from ( variant : AWD1SGL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AWD1SGL`" ]
pub type AWD1SGL_R = crate :: R < bool , AWD1SGL_A > ; impl AWD1SGL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AWD1SGL_A { match self . bits { false => AWD1SGL_A :: ALL , true => AWD1SGL_A :: SINGLE } } # [ doc = "Checks if the value of the field is `ALL`" ]
# [ inline ( always ) ]
pub fn is_all ( & self ) -> bool { * self == AWD1SGL_A :: ALL } # [ doc = "Checks if the value of the field is `SINGLE`" ]
# [ inline ( always ) ]
pub fn is_single ( & self ) -> bool { * self == AWD1SGL_A :: SINGLE } } # [ doc = "Write proxy for field `AWD1SGL`" ]
pub struct AWD1SGL_W < 'a > { w : & 'a mut W , } impl < 'a > AWD1SGL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD1SGL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Analog watchdog 1 enabled on all channels" ]
# [ inline ( always ) ]
pub fn all ( self ) -> & 'a mut W { self . variant ( AWD1SGL_A :: ALL ) } # [ doc = "Analog watchdog 1 enabled on single channel selected in AWD1CH" ]
# [ inline ( always ) ]
pub fn single ( self ) -> & 'a mut W { self . variant ( AWD1SGL_A :: SINGLE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "JQM\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JQM_A { # [ doc = "0: JSQR Mode 0: Queue maintains the last written configuration into JSQR" ]
MODE0 = 0 , # [ doc = "1: JSQR Mode 1: An empty queue disables software and hardware triggers of the injected sequence" ]
MODE1 = 1 } impl From < JQM_A > for bool { # [ inline ( always ) ]
fn from ( variant : JQM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JQM`" ]
pub type JQM_R = crate :: R < bool , JQM_A > ; impl JQM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JQM_A { match self . bits { false => JQM_A :: MODE0 , true => JQM_A :: MODE1 } } # [ doc = "Checks if the value of the field is `MODE0`" ]
# [ inline ( always ) ]
pub fn is_mode0 ( & self ) -> bool { * self == JQM_A :: MODE0 } # [ doc = "Checks if the value of the field is `MODE1`" ]
# [ inline ( always ) ]
pub fn is_mode1 ( & self ) -> bool { * self == JQM_A :: MODE1 } } # [ doc = "Write proxy for field `JQM`" ]
pub struct JQM_W < 'a > { w : & 'a mut W , } impl < 'a > JQM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JQM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "JSQR Mode 0: Queue maintains the last written configuration into JSQR" ]
# [ inline ( always ) ]
pub fn mode0 ( self ) -> & 'a mut W { self . variant ( JQM_A :: MODE0 ) } # [ doc = "JSQR Mode 1: An empty queue disables software and hardware triggers of the injected sequence" ]
# [ inline ( always ) ]
pub fn mode1 ( self ) -> & 'a mut W { self . variant ( JQM_A :: MODE1 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "JDISCEN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JDISCEN_A { # [ doc = "0: Discontinuous mode on injected channels disabled" ]
DISABLED = 0 , # [ doc = "1: Discontinuous mode on injected channels enabled" ]
ENABLED = 1 } impl From < JDISCEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : JDISCEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JDISCEN`" ]
pub type JDISCEN_R = crate :: R < bool , JDISCEN_A > ; impl JDISCEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JDISCEN_A { match self . bits { false => JDISCEN_A :: DISABLED , true => JDISCEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == JDISCEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == JDISCEN_A :: ENABLED } } # [ doc = "Write proxy for field `JDISCEN`" ]
pub struct JDISCEN_W < 'a > { w : & 'a mut W , } impl < 'a > JDISCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JDISCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Discontinuous mode on injected channels disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( JDISCEN_A :: DISABLED ) } # [ doc = "Discontinuous mode on injected channels enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( JDISCEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Reader of field `DISCNUM`" ]
pub type DISCNUM_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DISCNUM`" ]
pub struct DISCNUM_W < 'a > { w : & 'a mut W , } impl < 'a > DISCNUM_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 17 ) ) | ( ( ( value as u32 ) & 0x07 ) << 17 ) ; self . w } } # [ doc = "DISCEN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DISCEN_A { # [ doc = "0: Discontinuous mode on regular channels disabled" ]
DISABLED = 0 , # [ doc = "1: Discontinuous mode on regular channels enabled" ]
ENABLED = 1 } impl From < DISCEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : DISCEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DISCEN`" ]
pub type DISCEN_R = crate :: R < bool , DISCEN_A > ; impl DISCEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DISCEN_A { match self . bits { false => DISCEN_A :: DISABLED , true => DISCEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == DISCEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == DISCEN_A :: ENABLED } } # [ doc = "Write proxy for field `DISCEN`" ]
pub struct DISCEN_W < 'a > { w : & 'a mut W , } impl < 'a > DISCEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DISCEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Discontinuous mode on regular channels disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DISCEN_A :: DISABLED ) } # [ doc = "Discontinuous mode on regular channels enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DISCEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "AUTDLY\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AUTDLY_A { # [ doc = "0: Auto delayed conversion mode off" ]
OFF = 0 , # [ doc = "1: Auto delayed conversion mode on" ]
ON = 1 } impl From < AUTDLY_A > for bool { # [ inline ( always ) ]
fn from ( variant : AUTDLY_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AUTDLY`" ]
pub type AUTDLY_R = crate :: R < bool , AUTDLY_A > ; impl AUTDLY_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AUTDLY_A { match self . bits { false => AUTDLY_A :: OFF , true => AUTDLY_A :: ON } } # [ doc = "Checks if the value of the field is `OFF`" ]
# [ inline ( always ) ]
pub fn is_off ( & self ) -> bool { * self == AUTDLY_A :: OFF } # [ doc = "Checks if the value of the field is `ON`" ]
# [ inline ( always ) ]
pub fn is_on ( & self ) -> bool { * self == AUTDLY_A :: ON } } # [ doc = "Write proxy for field `AUTDLY`" ]
pub struct AUTDLY_W < 'a > { w : & 'a mut W , } impl < 'a > AUTDLY_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AUTDLY_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Auto delayed conversion mode off" ]
# [ inline ( always ) ]
pub fn off ( self ) -> & 'a mut W { self . variant ( AUTDLY_A :: OFF ) } # [ doc = "Auto delayed conversion mode on" ]
# [ inline ( always ) ]
pub fn on ( self ) -> & 'a mut W { self . variant ( AUTDLY_A :: ON ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "CONT\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CONT_A { # [ doc = "0: Single conversion mode" ]
SINGLE = 0 , # [ doc = "1: Continuous conversion mode" ]
CONTINUOUS = 1 } impl From < CONT_A > for bool { # [ inline ( always ) ]
fn from ( variant : CONT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CONT`" ]
pub type CONT_R = crate :: R < bool , CONT_A > ; impl CONT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CONT_A { match self . bits { false => CONT_A :: SINGLE , true => CONT_A :: CONTINUOUS } } # [ doc = "Checks if the value of the field is `SINGLE`" ]
# [ inline ( always ) ]
pub fn is_single ( & self ) -> bool { * self == CONT_A :: SINGLE } # [ doc = "Checks if the value of the field is `CONTINUOUS`" ]
# [ inline ( always ) ]
pub fn is_continuous ( & self ) -> bool { * self == CONT_A :: CONTINUOUS } } # [ doc = "Write proxy for field `CONT`" ]
pub struct CONT_W < 'a > { w : & 'a mut W , } impl < 'a > CONT_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CONT_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Single conversion mode" ]
# [ inline ( always ) ]
pub fn single ( self ) -> & 'a mut W { self . variant ( CONT_A :: SINGLE ) } # [ doc = "Continuous conversion mode" ]
# [ inline ( always ) ]
pub fn continuous ( self ) -> & 'a mut W { self . variant ( CONT_A :: CONTINUOUS ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "OVRMOD\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVRMOD_A { # [ doc = "0: Preserve DR register when an overrun is detected" ]
PRESERVE = 0 , # [ doc = "1: Overwrite DR register when an overrun is detected" ]
OVERWRITE = 1 } impl From < OVRMOD_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVRMOD_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVRMOD`" ]
pub type OVRMOD_R = crate :: R < bool , OVRMOD_A > ; impl OVRMOD_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVRMOD_A { match self . bits { false => OVRMOD_A :: PRESERVE , true => OVRMOD_A :: OVERWRITE } } # [ doc = "Checks if the value of the field is `PRESERVE`" ]
# [ inline ( always ) ]
pub fn is_preserve ( & self ) -> bool { * self == OVRMOD_A :: PRESERVE } # [ doc = "Checks if the value of the field is `OVERWRITE`" ]
# [ inline ( always ) ]
pub fn is_overwrite ( & self ) -> bool { * self == OVRMOD_A :: OVERWRITE } } # [ doc = "Write proxy for field `OVRMOD`" ]
pub struct OVRMOD_W < 'a > { w : & 'a mut W , } impl < 'a > OVRMOD_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OVRMOD_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Preserve DR register when an overrun is detected" ]
# [ inline ( always ) ]
pub fn preserve ( self ) -> & 'a mut W { self . variant ( OVRMOD_A :: PRESERVE ) } # [ doc = "Overwrite DR register when an overrun is detected" ]
# [ inline ( always ) ]
pub fn overwrite ( self ) -> & 'a mut W { self . variant ( OVRMOD_A :: OVERWRITE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "EXTEN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTEN_A { # [ doc = "0: Trigger detection disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger detection on the rising edge" ]
RISINGEDGE = 1 , # [ doc = "2: Trigger detection on the falling edge" ]
FALLINGEDGE = 2 , # [ doc = "3: Trigger detection on both the rising and falling edges" ]
BOTHEDGES = 3 } impl From < EXTEN_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTEN_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTEN`" ]
pub type EXTEN_R = crate :: R < u8 , EXTEN_A > ; impl EXTEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EXTEN_A { match self . bits { 0 => EXTEN_A :: DISABLED , 1 => EXTEN_A :: RISINGEDGE , 2 => EXTEN_A :: FALLINGEDGE , 3 => EXTEN_A :: BOTHEDGES , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == EXTEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `RISINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_rising_edge ( & self ) -> bool { * self == EXTEN_A :: RISINGEDGE } # [ doc = "Checks if the value of the field is `FALLINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_falling_edge ( & self ) -> bool { * self == EXTEN_A :: FALLINGEDGE } # [ doc = "Checks if the value of the field is `BOTHEDGES`" ]
# [ inline ( always ) ]
pub fn is_both_edges ( & self ) -> bool { * self == EXTEN_A :: BOTHEDGES } } # [ doc = "Write proxy for field `EXTEN`" ]
pub struct EXTEN_W < 'a > { w : & 'a mut W , } impl < 'a > EXTEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTEN_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Trigger detection disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( EXTEN_A :: DISABLED ) } # [ doc = "Trigger detection on the rising edge" ]
# [ inline ( always ) ]
pub fn rising_edge ( self ) -> & 'a mut W { self . variant ( EXTEN_A :: RISINGEDGE ) } # [ doc = "Trigger detection on the falling edge" ]
# [ inline ( always ) ]
pub fn falling_edge ( self ) -> & 'a mut W { self . variant ( EXTEN_A :: FALLINGEDGE ) } # [ doc = "Trigger detection on both the rising and falling edges" ]
# [ inline ( always ) ]
pub fn both_edges ( self ) -> & 'a mut W { self . variant ( EXTEN_A :: BOTHEDGES ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "EXTSEL\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum EXTSEL_A { # [ doc = "7: HRTIM_ADCTRG1 event" ]
HRTIM_ADCTRG1 = 7 , # [ doc = "8: HRTIM_ADCTRG3 event" ]
HRTIM_ADCTRG3 = 8 , # [ doc = "0: Timer 1 CC1 event" ]
TIM1_CC1 = 0 , # [ doc = "1: Timer 1 CC2 event" ]
TIM1_CC2 = 1 , # [ doc = "2: Timer 1 CC3 event" ]
TIM1_CC3 = 2 , # [ doc = "3: Timer 2 CC2 event" ]
TIM2_CC2 = 3 , # [ doc = "4: Timer 3 TRGO event" ]
TIM3_TRGO = 4 , # [ doc = "6: EXTI line 11" ]
EXTI11 = 6 , # [ doc = "9: Timer 1 TRGO event" ]
TIM1_TRGO = 9 , # [ doc = "10: Timer 1 TRGO2 event" ]
TIM1_TRGO2 = 10 , # [ doc = "11: Timer 2 TRGO event" ]
TIM2_TRGO = 11 , # [ doc = "13: Timer 6 TRGO event" ]
TIM6_TRGO = 13 , # [ doc = "14: Timer 15 TRGO event" ]
TIM15_TRGO = 14 , # [ doc = "15: Timer 3 CC4 event" ]
TIM3_CC4 = 15 } impl From < EXTSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : EXTSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `EXTSEL`" ]
pub type EXTSEL_R = crate :: R < u8 , EXTSEL_A > ; impl EXTSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , EXTSEL_A > { use crate :: Variant :: * ; match self . bits { 7 => Val ( EXTSEL_A :: HRTIM_ADCTRG1 ) , 8 => Val ( EXTSEL_A :: HRTIM_ADCTRG3 ) , 0 => Val ( EXTSEL_A :: TIM1_CC1 ) , 1 => Val ( EXTSEL_A :: TIM1_CC2 ) , 2 => Val ( EXTSEL_A :: TIM1_CC3 ) , 3 => Val ( EXTSEL_A :: TIM2_CC2 ) , 4 => Val ( EXTSEL_A :: TIM3_TRGO ) , 6 => Val ( EXTSEL_A :: EXTI11 ) , 9 => Val ( EXTSEL_A :: TIM1_TRGO ) , 10 => Val ( EXTSEL_A :: TIM1_TRGO2 ) , 11 => Val ( EXTSEL_A :: TIM2_TRGO ) , 13 => Val ( EXTSEL_A :: TIM6_TRGO ) , 14 => Val ( EXTSEL_A :: TIM15_TRGO ) , 15 => Val ( EXTSEL_A :: TIM3_CC4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `HRTIM_ADCTRG1`" ]
# [ inline ( always ) ]
pub fn is_hrtim_adctrg1 ( & self ) -> bool { * self == EXTSEL_A :: HRTIM_ADCTRG1 } # [ doc = "Checks if the value of the field is `HRTIM_ADCTRG3`" ]
# [ inline ( always ) ]
pub fn is_hrtim_adctrg3 ( & self ) -> bool { * self == EXTSEL_A :: HRTIM_ADCTRG3 } # [ doc = "Checks if the value of the field is `TIM1_CC1`" ]
# [ inline ( always ) ]
pub fn is_tim1_cc1 ( & self ) -> bool { * self == EXTSEL_A :: TIM1_CC1 } # [ doc = "Checks if the value of the field is `TIM1_CC2`" ]
# [ inline ( always ) ]
pub fn is_tim1_cc2 ( & self ) -> bool { * self == EXTSEL_A :: TIM1_CC2 } # [ doc = "Checks if the value of the field is `TIM1_CC3`" ]
# [ inline ( always ) ]
pub fn is_tim1_cc3 ( & self ) -> bool { * self == EXTSEL_A :: TIM1_CC3 } # [ doc = "Checks if the value of the field is `TIM2_CC2`" ]
# [ inline ( always ) ]
pub fn is_tim2_cc2 ( & self ) -> bool { * self == EXTSEL_A :: TIM2_CC2 } # [ doc = "Checks if the value of the field is `TIM3_TRGO`" ]
# [ inline ( always ) ]
pub fn is_tim3_trgo ( & self ) -> bool { * self == EXTSEL_A :: TIM3_TRGO } # [ doc = "Checks if the value of the field is `EXTI11`" ]
# [ inline ( always ) ]
pub fn is_exti11 ( & self ) -> bool { * self == EXTSEL_A :: EXTI11 } # [ doc = "Checks if the value of the field is `TIM1_TRGO`" ]
# [ inline ( always ) ]
pub fn is_tim1_trgo ( & self ) -> bool { * self == EXTSEL_A :: TIM1_TRGO } # [ doc = "Checks if the value of the field is `TIM1_TRGO2`" ]
# [ inline ( always ) ]
pub fn is_tim1_trgo2 ( & self ) -> bool { * self == EXTSEL_A :: TIM1_TRGO2 } # [ doc = "Checks if the value of the field is `TIM2_TRGO`" ]
# [ inline ( always ) ]
pub fn is_tim2_trgo ( & self ) -> bool { * self == EXTSEL_A :: TIM2_TRGO } # [ doc = "Checks if the value of the field is `TIM6_TRGO`" ]
# [ inline ( always ) ]
pub fn is_tim6_trgo ( & self ) -> bool { * self == EXTSEL_A :: TIM6_TRGO } # [ doc = "Checks if the value of the field is `TIM15_TRGO`" ]
# [ inline ( always ) ]
pub fn is_tim15_trgo ( & self ) -> bool { * self == EXTSEL_A :: TIM15_TRGO } # [ doc = "Checks if the value of the field is `TIM3_CC4`" ]
# [ inline ( always ) ]
pub fn is_tim3_cc4 ( & self ) -> bool { * self == EXTSEL_A :: TIM3_CC4 } } # [ doc = "Write proxy for field `EXTSEL`" ]
pub struct EXTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > EXTSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : EXTSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "HRTIM_ADCTRG1 event" ]
# [ inline ( always ) ]
pub fn hrtim_adctrg1 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: HRTIM_ADCTRG1 ) } # [ doc = "HRTIM_ADCTRG3 event" ]
# [ inline ( always ) ]
pub fn hrtim_adctrg3 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: HRTIM_ADCTRG3 ) } # [ doc = "Timer 1 CC1 event" ]
# [ inline ( always ) ]
pub fn tim1_cc1 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM1_CC1 ) } # [ doc = "Timer 1 CC2 event" ]
# [ inline ( always ) ]
pub fn tim1_cc2 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM1_CC2 ) } # [ doc = "Timer 1 CC3 event" ]
# [ inline ( always ) ]
pub fn tim1_cc3 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM1_CC3 ) } # [ doc = "Timer 2 CC2 event" ]
# [ inline ( always ) ]
pub fn tim2_cc2 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM2_CC2 ) } # [ doc = "Timer 3 TRGO event" ]
# [ inline ( always ) ]
pub fn tim3_trgo ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM3_TRGO ) } # [ doc = "EXTI line 11" ]
# [ inline ( always ) ]
pub fn exti11 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: EXTI11 ) } # [ doc = "Timer 1 TRGO event" ]
# [ inline ( always ) ]
pub fn tim1_trgo ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM1_TRGO ) } # [ doc = "Timer 1 TRGO2 event" ]
# [ inline ( always ) ]
pub fn tim1_trgo2 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM1_TRGO2 ) } # [ doc = "Timer 2 TRGO event" ]
# [ inline ( always ) ]
pub fn tim2_trgo ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM2_TRGO ) } # [ doc = "Timer 6 TRGO event" ]
# [ inline ( always ) ]
pub fn tim6_trgo ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM6_TRGO ) } # [ doc = "Timer 15 TRGO event" ]
# [ inline ( always ) ]
pub fn tim15_trgo ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM15_TRGO ) } # [ doc = "Timer 3 CC4 event" ]
# [ inline ( always ) ]
pub fn tim3_cc4 ( self ) -> & 'a mut W { self . variant ( EXTSEL_A :: TIM3_CC4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 6 ) ) | ( ( ( value as u32 ) & 0x0f ) << 6 ) ; self . w } } # [ doc = "ALIGN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ALIGN_A { # [ doc = "0: Right alignment" ]
RIGHT = 0 , # [ doc = "1: Left alignment" ]
LEFT = 1 } impl From < ALIGN_A > for bool { # [ inline ( always ) ]
fn from ( variant : ALIGN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ALIGN`" ]
pub type ALIGN_R = crate :: R < bool , ALIGN_A > ; impl ALIGN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ALIGN_A { match self . bits { false => ALIGN_A :: RIGHT , true => ALIGN_A :: LEFT } } # [ doc = "Checks if the value of the field is `RIGHT`" ]
# [ inline ( always ) ]
pub fn is_right ( & self ) -> bool { * self == ALIGN_A :: RIGHT } # [ doc = "Checks if the value of the field is `LEFT`" ]
# [ inline ( always ) ]
pub fn is_left ( & self ) -> bool { * self == ALIGN_A :: LEFT } } # [ doc = "Write proxy for field `ALIGN`" ]
pub struct ALIGN_W < 'a > { w : & 'a mut W , } impl < 'a > ALIGN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ALIGN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Right alignment" ]
# [ inline ( always ) ]
pub fn right ( self ) -> & 'a mut W { self . variant ( ALIGN_A :: RIGHT ) } # [ doc = "Left alignment" ]
# [ inline ( always ) ]
pub fn left ( self ) -> & 'a mut W { self . variant ( ALIGN_A :: LEFT ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "RES\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum RES_A { # [ doc = "0: 12-bit" ]
BITS12 = 0 , # [ doc = "1: 10-bit" ]
BITS10 = 1 , # [ doc = "2: 8-bit" ]
BITS8 = 2 , # [ doc = "3: 6-bit" ]
BITS6 = 3 } impl From < RES_A > for u8 { # [ inline ( always ) ]
fn from ( variant : RES_A ) -> Self { variant as _ } } # [ doc = "Reader of field `RES`" ]
pub type RES_R = crate :: R < u8 , RES_A > ; impl RES_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> RES_A { match self . bits { 0 => RES_A :: BITS12 , 1 => RES_A :: BITS10 , 2 => RES_A :: BITS8 , 3 => RES_A :: BITS6 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `BITS12`" ]
# [ inline ( always ) ]
pub fn is_bits12 ( & self ) -> bool { * self == RES_A :: BITS12 } # [ doc = "Checks if the value of the field is `BITS10`" ]
# [ inline ( always ) ]
pub fn is_bits10 ( & self ) -> bool { * self == RES_A :: BITS10 } # [ doc = "Checks if the value of the field is `BITS8`" ]
# [ inline ( always ) ]
pub fn is_bits8 ( & self ) -> bool { * self == RES_A :: BITS8 } # [ doc = "Checks if the value of the field is `BITS6`" ]
# [ inline ( always ) ]
pub fn is_bits6 ( & self ) -> bool { * self == RES_A :: BITS6 } } # [ doc = "Write proxy for field `RES`" ]
pub struct RES_W < 'a > { w : & 'a mut W , } impl < 'a > RES_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : RES_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "12-bit" ]
# [ inline ( always ) ]
pub fn bits12 ( self ) -> & 'a mut W { self . variant ( RES_A :: BITS12 ) } # [ doc = "10-bit" ]
# [ inline ( always ) ]
pub fn bits10 ( self ) -> & 'a mut W { self . variant ( RES_A :: BITS10 ) } # [ doc = "8-bit" ]
# [ inline ( always ) ]
pub fn bits8 ( self ) -> & 'a mut W { self . variant ( RES_A :: BITS8 ) } # [ doc = "6-bit" ]
# [ inline ( always ) ]
pub fn bits6 ( self ) -> & 'a mut W { self . variant ( RES_A :: BITS6 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 3 ) ) | ( ( ( value as u32 ) & 0x03 ) << 3 ) ; self . w } } # [ doc = "DMACFG\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DMACFG_A { # [ doc = "0: DMA One Shot Mode selected" ]
ONESHOT = 0 , # [ doc = "1: DMA circular mode selected" ]
CIRCULAR = 1 } impl From < DMACFG_A > for bool { # [ inline ( always ) ]
fn from ( variant : DMACFG_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DMACFG`" ]
pub type DMACFG_R = crate :: R < bool , DMACFG_A > ; impl DMACFG_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DMACFG_A { match self . bits { false => DMACFG_A :: ONESHOT , true => DMACFG_A :: CIRCULAR } } # [ doc = "Checks if the value of the field is `ONESHOT`" ]
# [ inline ( always ) ]
pub fn is_one_shot ( & self ) -> bool { * self == DMACFG_A :: ONESHOT } # [ doc = "Checks if the value of the field is `CIRCULAR`" ]
# [ inline ( always ) ]
pub fn is_circular ( & self ) -> bool { * self == DMACFG_A :: CIRCULAR } } # [ doc = "Write proxy for field `DMACFG`" ]
pub struct DMACFG_W < 'a > { w : & 'a mut W , } impl < 'a > DMACFG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DMACFG_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA One Shot Mode selected" ]
# [ inline ( always ) ]
pub fn one_shot ( self ) -> & 'a mut W { self . variant ( DMACFG_A :: ONESHOT ) } # [ doc = "DMA circular mode selected" ]
# [ inline ( always ) ]
pub fn circular ( self ) -> & 'a mut W { self . variant ( DMACFG_A :: CIRCULAR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "DMAEN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DMAEN_A { # [ doc = "0: DMA disabled" ]
DISABLED = 0 , # [ doc = "1: DMA enabled" ]
ENABLED = 1 } impl From < DMAEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : DMAEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DMAEN`" ]
pub type DMAEN_R = crate :: R < bool , DMAEN_A > ; impl DMAEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DMAEN_A { match self . bits { false => DMAEN_A :: DISABLED , true => DMAEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == DMAEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == DMAEN_A :: ENABLED } } # [ doc = "Write proxy for field `DMAEN`" ]
pub struct DMAEN_W < 'a > { w : & 'a mut W , } impl < 'a > DMAEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DMAEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( DMAEN_A :: DISABLED ) } # [ doc = "DMA enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( DMAEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bits 26:30 - AWDCH1CH" ]
# [ inline ( always ) ]
pub fn awd1ch ( & self ) -> AWD1CH_R { AWD1CH_R :: new ( ( ( self . bits >> 26 ) & 0x1f ) as u8 ) } # [ doc = "Bit 25 - JAUTO" ]
# [ inline ( always ) ]
pub fn jauto ( & self ) -> JAUTO_R { JAUTO_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - JAWD1EN" ]
# [ inline ( always ) ]
pub fn jawd1en ( & self ) -> JAWD1EN_R { JAWD1EN_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - AWD1EN" ]
# [ inline ( always ) ]
pub fn awd1en ( & self ) -> AWD1EN_R { AWD1EN_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - AWD1SGL" ]
# [ inline ( always ) ]
pub fn awd1sgl ( & self ) -> AWD1SGL_R { AWD1SGL_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - JQM" ]
# [ inline ( always ) ]
pub fn jqm ( & self ) -> JQM_R { JQM_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - JDISCEN" ]
# [ inline ( always ) ]
pub fn jdiscen ( & self ) -> JDISCEN_R { JDISCEN_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bits 17:19 - DISCNUM" ]
# [ inline ( always ) ]
pub fn discnum ( & self ) -> DISCNUM_R { DISCNUM_R :: new ( ( ( self . bits >> 17 ) & 0x07 ) as u8 ) } # [ doc = "Bit 16 - DISCEN" ]
# [ inline ( always ) ]
pub fn discen ( & self ) -> DISCEN_R { DISCEN_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - AUTDLY" ]
# [ inline ( always ) ]
pub fn autdly ( & self ) -> AUTDLY_R { AUTDLY_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - CONT" ]
# [ inline ( always ) ]
pub fn cont ( & self ) -> CONT_R { CONT_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - OVRMOD" ]
# [ inline ( always ) ]
pub fn ovrmod ( & self ) -> OVRMOD_R { OVRMOD_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bits 10:11 - EXTEN" ]
# [ inline ( always ) ]
pub fn exten ( & self ) -> EXTEN_R { EXTEN_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:9 - EXTSEL" ]
# [ inline ( always ) ]
pub fn extsel ( & self ) -> EXTSEL_R { EXTSEL_R :: new ( ( ( self . bits >> 6 ) & 0x0f ) as u8 ) } # [ doc = "Bit 5 - ALIGN" ]
# [ inline ( always ) ]
pub fn align ( & self ) -> ALIGN_R { ALIGN_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bits 3:4 - RES" ]
# [ inline ( always ) ]
pub fn res ( & self ) -> RES_R { RES_R :: new ( ( ( self . bits >> 3 ) & 0x03 ) as u8 ) } # [ doc = "Bit 1 - DMACFG" ]
# [ inline ( always ) ]
pub fn dmacfg ( & self ) -> DMACFG_R { DMACFG_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - DMAEN" ]
# [ inline ( always ) ]
pub fn dmaen ( & self ) -> DMAEN_R { DMAEN_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 26:30 - AWDCH1CH" ]
# [ inline ( always ) ]
pub fn awd1ch ( & mut self ) -> AWD1CH_W { AWD1CH_W { w : self } } # [ doc = "Bit 25 - JAUTO" ]
# [ inline ( always ) ]
pub fn jauto ( & mut self ) -> JAUTO_W { JAUTO_W { w : self } } # [ doc = "Bit 24 - JAWD1EN" ]
# [ inline ( always ) ]
pub fn jawd1en ( & mut self ) -> JAWD1EN_W { JAWD1EN_W { w : self } } # [ doc = "Bit 23 - AWD1EN" ]
# [ inline ( always ) ]
pub fn awd1en ( & mut self ) -> AWD1EN_W { AWD1EN_W { w : self } } # [ doc = "Bit 22 - AWD1SGL" ]
# [ inline ( always ) ]
pub fn awd1sgl ( & mut self ) -> AWD1SGL_W { AWD1SGL_W { w : self } } # [ doc = "Bit 21 - JQM" ]
# [ inline ( always ) ]
pub fn jqm ( & mut self ) -> JQM_W { JQM_W { w : self } } # [ doc = "Bit 20 - JDISCEN" ]
# [ inline ( always ) ]
pub fn jdiscen ( & mut self ) -> JDISCEN_W { JDISCEN_W { w : self } } # [ doc = "Bits 17:19 - DISCNUM" ]
# [ inline ( always ) ]
pub fn discnum ( & mut self ) -> DISCNUM_W { DISCNUM_W { w : self } } # [ doc = "Bit 16 - DISCEN" ]
# [ inline ( always ) ]
pub fn discen ( & mut self ) -> DISCEN_W { DISCEN_W { w : self } } # [ doc = "Bit 14 - AUTDLY" ]
# [ inline ( always ) ]
pub fn autdly ( & mut self ) -> AUTDLY_W { AUTDLY_W { w : self } } # [ doc = "Bit 13 - CONT" ]
# [ inline ( always ) ]
pub fn cont ( & mut self ) -> CONT_W { CONT_W { w : self } } # [ doc = "Bit 12 - OVRMOD" ]
# [ inline ( always ) ]
pub fn ovrmod ( & mut self ) -> OVRMOD_W { OVRMOD_W { w : self } } # [ doc = "Bits 10:11 - EXTEN" ]
# [ inline ( always ) ]
pub fn exten ( & mut self ) -> EXTEN_W { EXTEN_W { w : self } } # [ doc = "Bits 6:9 - EXTSEL" ]
# [ inline ( always ) ]
pub fn extsel ( & mut self ) -> EXTSEL_W { EXTSEL_W { w : self } } # [ doc = "Bit 5 - ALIGN" ]
# [ inline ( always ) ]
pub fn align ( & mut self ) -> ALIGN_W { ALIGN_W { w : self } } # [ doc = "Bits 3:4 - RES" ]
# [ inline ( always ) ]
pub fn res ( & mut self ) -> RES_W { RES_W { w : self } } # [ doc = "Bit 1 - DMACFG" ]
# [ inline ( always ) ]
pub fn dmacfg ( & mut self ) -> DMACFG_W { DMACFG_W { w : self } } # [ doc = "Bit 0 - DMAEN" ]
# [ inline ( always ) ]
pub fn dmaen ( & mut self ) -> DMAEN_W { DMAEN_W { w : self } } } } # [ doc = "sample time register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smpr1](smpr1) module" ]
pub type SMPR1 = crate :: Reg < u32 , _SMPR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMPR1 ; # [ doc = "`read()` method returns [smpr1::R](smpr1::R) reader structure" ]
impl crate :: Readable for SMPR1 { } # [ doc = "`write(|w| ..)` method takes [smpr1::W](smpr1::W) writer structure" ]
impl crate :: Writable for SMPR1 { } # [ doc = "sample time register 1" ]
pub mod smpr1 { # [ doc = "Reader of register SMPR1" ]
pub type R = crate :: R < u32 , super :: SMPR1 > ; # [ doc = "Writer for register SMPR1" ]
pub type W = crate :: W < u32 , super :: SMPR1 > ; # [ doc = "Register SMPR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMPR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "SMP9\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SMP9_A { # [ doc = "0: 1.5 ADC clock cycles" ]
CYCLES1_5 = 0 , # [ doc = "1: 2.5 ADC clock cycles" ]
CYCLES2_5 = 1 , # [ doc = "2: 4.5 ADC clock cycles" ]
CYCLES4_5 = 2 , # [ doc = "3: 7.5 ADC clock cycles" ]
CYCLES7_5 = 3 , # [ doc = "4: 19.5 ADC clock cycles" ]
CYCLES19_5 = 4 , # [ doc = "5: 61.5 ADC clock cycles" ]
CYCLES61_5 = 5 , # [ doc = "6: 181.5 ADC clock cycles" ]
CYCLES181_5 = 6 , # [ doc = "7: 601.5 ADC clock cycles" ]
CYCLES601_5 = 7 } impl From < SMP9_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SMP9_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SMP9`" ]
pub type SMP9_R = crate :: R < u8 , SMP9_A > ; impl SMP9_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMP9_A { match self . bits { 0 => SMP9_A :: CYCLES1_5 , 1 => SMP9_A :: CYCLES2_5 , 2 => SMP9_A :: CYCLES4_5 , 3 => SMP9_A :: CYCLES7_5 , 4 => SMP9_A :: CYCLES19_5 , 5 => SMP9_A :: CYCLES61_5 , 6 => SMP9_A :: CYCLES181_5 , 7 => SMP9_A :: CYCLES601_5 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `CYCLES1_5`" ]
# [ inline ( always ) ]
pub fn is_cycles1_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES1_5 } # [ doc = "Checks if the value of the field is `CYCLES2_5`" ]
# [ inline ( always ) ]
pub fn is_cycles2_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES2_5 } # [ doc = "Checks if the value of the field is `CYCLES4_5`" ]
# [ inline ( always ) ]
pub fn is_cycles4_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES4_5 } # [ doc = "Checks if the value of the field is `CYCLES7_5`" ]
# [ inline ( always ) ]
pub fn is_cycles7_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES7_5 } # [ doc = "Checks if the value of the field is `CYCLES19_5`" ]
# [ inline ( always ) ]
pub fn is_cycles19_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES19_5 } # [ doc = "Checks if the value of the field is `CYCLES61_5`" ]
# [ inline ( always ) ]
pub fn is_cycles61_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES61_5 } # [ doc = "Checks if the value of the field is `CYCLES181_5`" ]
# [ inline ( always ) ]
pub fn is_cycles181_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES181_5 } # [ doc = "Checks if the value of the field is `CYCLES601_5`" ]
# [ inline ( always ) ]
pub fn is_cycles601_5 ( & self ) -> bool { * self == SMP9_A :: CYCLES601_5 } } # [ doc = "Write proxy for field `SMP9`" ]
pub struct SMP9_W < 'a > { w : & 'a mut W , } impl < 'a > SMP9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 27 ) ) | ( ( ( value as u32 ) & 0x07 ) << 27 ) ; self . w } } # [ doc = "SMP8" ]
pub type SMP8_A = SMP9_A ; # [ doc = "Reader of field `SMP8`" ]
pub type SMP8_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP8`" ]
pub struct SMP8_W < 'a > { w : & 'a mut W , } impl < 'a > SMP8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 24 ) ) | ( ( ( value as u32 ) & 0x07 ) << 24 ) ; self . w } } # [ doc = "SMP7" ]
pub type SMP7_A = SMP9_A ; # [ doc = "Reader of field `SMP7`" ]
pub type SMP7_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP7`" ]
pub struct SMP7_W < 'a > { w : & 'a mut W , } impl < 'a > SMP7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 21 ) ) | ( ( ( value as u32 ) & 0x07 ) << 21 ) ; self . w } } # [ doc = "SMP6" ]
pub type SMP6_A = SMP9_A ; # [ doc = "Reader of field `SMP6`" ]
pub type SMP6_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP6`" ]
pub struct SMP6_W < 'a > { w : & 'a mut W , } impl < 'a > SMP6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "SMP5" ]
pub type SMP5_A = SMP9_A ; # [ doc = "Reader of field `SMP5`" ]
pub type SMP5_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP5`" ]
pub struct SMP5_W < 'a > { w : & 'a mut W , } impl < 'a > SMP5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 15 ) ) | ( ( ( value as u32 ) & 0x07 ) << 15 ) ; self . w } } # [ doc = "SMP4" ]
pub type SMP4_A = SMP9_A ; # [ doc = "Reader of field `SMP4`" ]
pub type SMP4_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP4`" ]
pub struct SMP4_W < 'a > { w : & 'a mut W , } impl < 'a > SMP4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "SMP3" ]
pub type SMP3_A = SMP9_A ; # [ doc = "Reader of field `SMP3`" ]
pub type SMP3_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP3`" ]
pub struct SMP3_W < 'a > { w : & 'a mut W , } impl < 'a > SMP3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 9 ) ) | ( ( ( value as u32 ) & 0x07 ) << 9 ) ; self . w } } # [ doc = "SMP2" ]
pub type SMP2_A = SMP9_A ; # [ doc = "Reader of field `SMP2`" ]
pub type SMP2_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP2`" ]
pub struct SMP2_W < 'a > { w : & 'a mut W , } impl < 'a > SMP2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 6 ) ) | ( ( ( value as u32 ) & 0x07 ) << 6 ) ; self . w } } # [ doc = "SMP1" ]
pub type SMP1_A = SMP9_A ; # [ doc = "Reader of field `SMP1`" ]
pub type SMP1_R = crate :: R < u8 , SMP9_A > ; # [ doc = "Write proxy for field `SMP1`" ]
pub struct SMP1_W < 'a > { w : & 'a mut W , } impl < 'a > SMP1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP9_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 3 ) ) | ( ( ( value as u32 ) & 0x07 ) << 3 ) ; self . w } } impl R { # [ doc = "Bits 27:29 - SMP9" ]
# [ inline ( always ) ]
pub fn smp9 ( & self ) -> SMP9_R { SMP9_R :: new ( ( ( self . bits >> 27 ) & 0x07 ) as u8 ) } # [ doc = "Bits 24:26 - SMP8" ]
# [ inline ( always ) ]
pub fn smp8 ( & self ) -> SMP8_R { SMP8_R :: new ( ( ( self . bits >> 24 ) & 0x07 ) as u8 ) } # [ doc = "Bits 21:23 - SMP7" ]
# [ inline ( always ) ]
pub fn smp7 ( & self ) -> SMP7_R { SMP7_R :: new ( ( ( self . bits >> 21 ) & 0x07 ) as u8 ) } # [ doc = "Bits 18:20 - SMP6" ]
# [ inline ( always ) ]
pub fn smp6 ( & self ) -> SMP6_R { SMP6_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bits 15:17 - SMP5" ]
# [ inline ( always ) ]
pub fn smp5 ( & self ) -> SMP5_R { SMP5_R :: new ( ( ( self . bits >> 15 ) & 0x07 ) as u8 ) } # [ doc = "Bits 12:14 - SMP4" ]
# [ inline ( always ) ]
pub fn smp4 ( & self ) -> SMP4_R { SMP4_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bits 9:11 - SMP3" ]
# [ inline ( always ) ]
pub fn smp3 ( & self ) -> SMP3_R { SMP3_R :: new ( ( ( self . bits >> 9 ) & 0x07 ) as u8 ) } # [ doc = "Bits 6:8 - SMP2" ]
# [ inline ( always ) ]
pub fn smp2 ( & self ) -> SMP2_R { SMP2_R :: new ( ( ( self . bits >> 6 ) & 0x07 ) as u8 ) } # [ doc = "Bits 3:5 - SMP1" ]
# [ inline ( always ) ]
pub fn smp1 ( & self ) -> SMP1_R { SMP1_R :: new ( ( ( self . bits >> 3 ) & 0x07 ) as u8 ) } } impl W { # [ doc = "Bits 27:29 - SMP9" ]
# [ inline ( always ) ]
pub fn smp9 ( & mut self ) -> SMP9_W { SMP9_W { w : self } } # [ doc = "Bits 24:26 - SMP8" ]
# [ inline ( always ) ]
pub fn smp8 ( & mut self ) -> SMP8_W { SMP8_W { w : self } } # [ doc = "Bits 21:23 - SMP7" ]
# [ inline ( always ) ]
pub fn smp7 ( & mut self ) -> SMP7_W { SMP7_W { w : self } } # [ doc = "Bits 18:20 - SMP6" ]
# [ inline ( always ) ]
pub fn smp6 ( & mut self ) -> SMP6_W { SMP6_W { w : self } } # [ doc = "Bits 15:17 - SMP5" ]
# [ inline ( always ) ]
pub fn smp5 ( & mut self ) -> SMP5_W { SMP5_W { w : self } } # [ doc = "Bits 12:14 - SMP4" ]
# [ inline ( always ) ]
pub fn smp4 ( & mut self ) -> SMP4_W { SMP4_W { w : self } } # [ doc = "Bits 9:11 - SMP3" ]
# [ inline ( always ) ]
pub fn smp3 ( & mut self ) -> SMP3_W { SMP3_W { w : self } } # [ doc = "Bits 6:8 - SMP2" ]
# [ inline ( always ) ]
pub fn smp2 ( & mut self ) -> SMP2_W { SMP2_W { w : self } } # [ doc = "Bits 3:5 - SMP1" ]
# [ inline ( always ) ]
pub fn smp1 ( & mut self ) -> SMP1_W { SMP1_W { w : self } } } } # [ doc = "sample time register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smpr2](smpr2) module" ]
pub type SMPR2 = crate :: Reg < u32 , _SMPR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SMPR2 ; # [ doc = "`read()` method returns [smpr2::R](smpr2::R) reader structure" ]
impl crate :: Readable for SMPR2 { } # [ doc = "`write(|w| ..)` method takes [smpr2::W](smpr2::W) writer structure" ]
impl crate :: Writable for SMPR2 { } # [ doc = "sample time register 2" ]
pub mod smpr2 { # [ doc = "Reader of register SMPR2" ]
pub type R = crate :: R < u32 , super :: SMPR2 > ; # [ doc = "Writer for register SMPR2" ]
pub type W = crate :: W < u32 , super :: SMPR2 > ; # [ doc = "Register SMPR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SMPR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "SMP18\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum SMP18_A { # [ doc = "0: 1.5 ADC clock cycles" ]
CYCLES1_5 = 0 , # [ doc = "1: 2.5 ADC clock cycles" ]
CYCLES2_5 = 1 , # [ doc = "2: 4.5 ADC clock cycles" ]
CYCLES4_5 = 2 , # [ doc = "3: 7.5 ADC clock cycles" ]
CYCLES7_5 = 3 , # [ doc = "4: 19.5 ADC clock cycles" ]
CYCLES19_5 = 4 , # [ doc = "5: 61.5 ADC clock cycles" ]
CYCLES61_5 = 5 , # [ doc = "6: 181.5 ADC clock cycles" ]
CYCLES181_5 = 6 , # [ doc = "7: 601.5 ADC clock cycles" ]
CYCLES601_5 = 7 } impl From < SMP18_A > for u8 { # [ inline ( always ) ]
fn from ( variant : SMP18_A ) -> Self { variant as _ } } # [ doc = "Reader of field `SMP18`" ]
pub type SMP18_R = crate :: R < u8 , SMP18_A > ; impl SMP18_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> SMP18_A { match self . bits { 0 => SMP18_A :: CYCLES1_5 , 1 => SMP18_A :: CYCLES2_5 , 2 => SMP18_A :: CYCLES4_5 , 3 => SMP18_A :: CYCLES7_5 , 4 => SMP18_A :: CYCLES19_5 , 5 => SMP18_A :: CYCLES61_5 , 6 => SMP18_A :: CYCLES181_5 , 7 => SMP18_A :: CYCLES601_5 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `CYCLES1_5`" ]
# [ inline ( always ) ]
pub fn is_cycles1_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES1_5 } # [ doc = "Checks if the value of the field is `CYCLES2_5`" ]
# [ inline ( always ) ]
pub fn is_cycles2_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES2_5 } # [ doc = "Checks if the value of the field is `CYCLES4_5`" ]
# [ inline ( always ) ]
pub fn is_cycles4_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES4_5 } # [ doc = "Checks if the value of the field is `CYCLES7_5`" ]
# [ inline ( always ) ]
pub fn is_cycles7_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES7_5 } # [ doc = "Checks if the value of the field is `CYCLES19_5`" ]
# [ inline ( always ) ]
pub fn is_cycles19_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES19_5 } # [ doc = "Checks if the value of the field is `CYCLES61_5`" ]
# [ inline ( always ) ]
pub fn is_cycles61_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES61_5 } # [ doc = "Checks if the value of the field is `CYCLES181_5`" ]
# [ inline ( always ) ]
pub fn is_cycles181_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES181_5 } # [ doc = "Checks if the value of the field is `CYCLES601_5`" ]
# [ inline ( always ) ]
pub fn is_cycles601_5 ( & self ) -> bool { * self == SMP18_A :: CYCLES601_5 } } # [ doc = "Write proxy for field `SMP18`" ]
pub struct SMP18_W < 'a > { w : & 'a mut W , } impl < 'a > SMP18_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP18_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 24 ) ) | ( ( ( value as u32 ) & 0x07 ) << 24 ) ; self . w } } # [ doc = "SMP17" ]
pub type SMP17_A = SMP18_A ; # [ doc = "Reader of field `SMP17`" ]
pub type SMP17_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP17`" ]
pub struct SMP17_W < 'a > { w : & 'a mut W , } impl < 'a > SMP17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP17_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 21 ) ) | ( ( ( value as u32 ) & 0x07 ) << 21 ) ; self . w } } # [ doc = "SMP16" ]
pub type SMP16_A = SMP18_A ; # [ doc = "Reader of field `SMP16`" ]
pub type SMP16_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP16`" ]
pub struct SMP16_W < 'a > { w : & 'a mut W , } impl < 'a > SMP16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP16_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "SMP15" ]
pub type SMP15_A = SMP18_A ; # [ doc = "Reader of field `SMP15`" ]
pub type SMP15_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP15`" ]
pub struct SMP15_W < 'a > { w : & 'a mut W , } impl < 'a > SMP15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 15 ) ) | ( ( ( value as u32 ) & 0x07 ) << 15 ) ; self . w } } # [ doc = "SMP14" ]
pub type SMP14_A = SMP18_A ; # [ doc = "Reader of field `SMP14`" ]
pub type SMP14_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP14`" ]
pub struct SMP14_W < 'a > { w : & 'a mut W , } impl < 'a > SMP14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 12 ) ) | ( ( ( value as u32 ) & 0x07 ) << 12 ) ; self . w } } # [ doc = "SMP13" ]
pub type SMP13_A = SMP18_A ; # [ doc = "Reader of field `SMP13`" ]
pub type SMP13_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP13`" ]
pub struct SMP13_W < 'a > { w : & 'a mut W , } impl < 'a > SMP13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 9 ) ) | ( ( ( value as u32 ) & 0x07 ) << 9 ) ; self . w } } # [ doc = "SMP12" ]
pub type SMP12_A = SMP18_A ; # [ doc = "Reader of field `SMP12`" ]
pub type SMP12_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP12`" ]
pub struct SMP12_W < 'a > { w : & 'a mut W , } impl < 'a > SMP12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 6 ) ) | ( ( ( value as u32 ) & 0x07 ) << 6 ) ; self . w } } # [ doc = "SMP11" ]
pub type SMP11_A = SMP18_A ; # [ doc = "Reader of field `SMP11`" ]
pub type SMP11_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP11`" ]
pub struct SMP11_W < 'a > { w : & 'a mut W , } impl < 'a > SMP11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 3 ) ) | ( ( ( value as u32 ) & 0x07 ) << 3 ) ; self . w } } # [ doc = "SMP10" ]
pub type SMP10_A = SMP18_A ; # [ doc = "Reader of field `SMP10`" ]
pub type SMP10_R = crate :: R < u8 , SMP18_A > ; # [ doc = "Write proxy for field `SMP10`" ]
pub struct SMP10_W < 'a > { w : & 'a mut W , } impl < 'a > SMP10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : SMP10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "1.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles1_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES1_5 ) } # [ doc = "2.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles2_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES2_5 ) } # [ doc = "4.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles4_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES4_5 ) } # [ doc = "7.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles7_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES7_5 ) } # [ doc = "19.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles19_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES19_5 ) } # [ doc = "61.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles61_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES61_5 ) } # [ doc = "181.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles181_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES181_5 ) } # [ doc = "601.5 ADC clock cycles" ]
# [ inline ( always ) ]
pub fn cycles601_5 ( self ) -> & 'a mut W { self . variant ( SMP18_A :: CYCLES601_5 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x07 ) | ( ( value as u32 ) & 0x07 ) ; self . w } } impl R { # [ doc = "Bits 24:26 - SMP18" ]
# [ inline ( always ) ]
pub fn smp18 ( & self ) -> SMP18_R { SMP18_R :: new ( ( ( self . bits >> 24 ) & 0x07 ) as u8 ) } # [ doc = "Bits 21:23 - SMP17" ]
# [ inline ( always ) ]
pub fn smp17 ( & self ) -> SMP17_R { SMP17_R :: new ( ( ( self . bits >> 21 ) & 0x07 ) as u8 ) } # [ doc = "Bits 18:20 - SMP16" ]
# [ inline ( always ) ]
pub fn smp16 ( & self ) -> SMP16_R { SMP16_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bits 15:17 - SMP15" ]
# [ inline ( always ) ]
pub fn smp15 ( & self ) -> SMP15_R { SMP15_R :: new ( ( ( self . bits >> 15 ) & 0x07 ) as u8 ) } # [ doc = "Bits 12:14 - SMP14" ]
# [ inline ( always ) ]
pub fn smp14 ( & self ) -> SMP14_R { SMP14_R :: new ( ( ( self . bits >> 12 ) & 0x07 ) as u8 ) } # [ doc = "Bits 9:11 - SMP13" ]
# [ inline ( always ) ]
pub fn smp13 ( & self ) -> SMP13_R { SMP13_R :: new ( ( ( self . bits >> 9 ) & 0x07 ) as u8 ) } # [ doc = "Bits 6:8 - SMP12" ]
# [ inline ( always ) ]
pub fn smp12 ( & self ) -> SMP12_R { SMP12_R :: new ( ( ( self . bits >> 6 ) & 0x07 ) as u8 ) } # [ doc = "Bits 3:5 - SMP11" ]
# [ inline ( always ) ]
pub fn smp11 ( & self ) -> SMP11_R { SMP11_R :: new ( ( ( self . bits >> 3 ) & 0x07 ) as u8 ) } # [ doc = "Bits 0:2 - SMP10" ]
# [ inline ( always ) ]
pub fn smp10 ( & self ) -> SMP10_R { SMP10_R :: new ( ( self . bits & 0x07 ) as u8 ) } } impl W { # [ doc = "Bits 24:26 - SMP18" ]
# [ inline ( always ) ]
pub fn smp18 ( & mut self ) -> SMP18_W { SMP18_W { w : self } } # [ doc = "Bits 21:23 - SMP17" ]
# [ inline ( always ) ]
pub fn smp17 ( & mut self ) -> SMP17_W { SMP17_W { w : self } } # [ doc = "Bits 18:20 - SMP16" ]
# [ inline ( always ) ]
pub fn smp16 ( & mut self ) -> SMP16_W { SMP16_W { w : self } } # [ doc = "Bits 15:17 - SMP15" ]
# [ inline ( always ) ]
pub fn smp15 ( & mut self ) -> SMP15_W { SMP15_W { w : self } } # [ doc = "Bits 12:14 - SMP14" ]
# [ inline ( always ) ]
pub fn smp14 ( & mut self ) -> SMP14_W { SMP14_W { w : self } } # [ doc = "Bits 9:11 - SMP13" ]
# [ inline ( always ) ]
pub fn smp13 ( & mut self ) -> SMP13_W { SMP13_W { w : self } } # [ doc = "Bits 6:8 - SMP12" ]
# [ inline ( always ) ]
pub fn smp12 ( & mut self ) -> SMP12_W { SMP12_W { w : self } } # [ doc = "Bits 3:5 - SMP11" ]
# [ inline ( always ) ]
pub fn smp11 ( & mut self ) -> SMP11_W { SMP11_W { w : self } } # [ doc = "Bits 0:2 - SMP10" ]
# [ inline ( always ) ]
pub fn smp10 ( & mut self ) -> SMP10_W { SMP10_W { w : self } } } } # [ doc = "watchdog threshold register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tr1](tr1) module" ]
pub type TR1 = crate :: Reg < u32 , _TR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TR1 ; # [ doc = "`read()` method returns [tr1::R](tr1::R) reader structure" ]
impl crate :: Readable for TR1 { } # [ doc = "`write(|w| ..)` method takes [tr1::W](tr1::W) writer structure" ]
impl crate :: Writable for TR1 { } # [ doc = "watchdog threshold register 1" ]
pub mod tr1 { # [ doc = "Reader of register TR1" ]
pub type R = crate :: R < u32 , super :: TR1 > ; # [ doc = "Writer for register TR1" ]
pub type W = crate :: W < u32 , super :: TR1 > ; # [ doc = "Register TR1 `reset()`'s with value 0x0fff_0000" ]
impl crate :: ResetValue for super :: TR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff_0000 } } # [ doc = "Reader of field `HT1`" ]
pub type HT1_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `HT1`" ]
pub struct HT1_W < 'a > { w : & 'a mut W , } impl < 'a > HT1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0fff << 16 ) ) | ( ( ( value as u32 ) & 0x0fff ) << 16 ) ; self . w } } # [ doc = "Reader of field `LT1`" ]
pub type LT1_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `LT1`" ]
pub struct LT1_W < 'a > { w : & 'a mut W , } impl < 'a > LT1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bits 16:27 - HT1" ]
# [ inline ( always ) ]
pub fn ht1 ( & self ) -> HT1_R { HT1_R :: new ( ( ( self . bits >> 16 ) & 0x0fff ) as u16 ) } # [ doc = "Bits 0:11 - LT1" ]
# [ inline ( always ) ]
pub fn lt1 ( & self ) -> LT1_R { LT1_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bits 16:27 - HT1" ]
# [ inline ( always ) ]
pub fn ht1 ( & mut self ) -> HT1_W { HT1_W { w : self } } # [ doc = "Bits 0:11 - LT1" ]
# [ inline ( always ) ]
pub fn lt1 ( & mut self ) -> LT1_W { LT1_W { w : self } } } } # [ doc = "watchdog threshold register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tr2](tr2) module" ]
pub type TR2 = crate :: Reg < u32 , _TR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TR2 ; # [ doc = "`read()` method returns [tr2::R](tr2::R) reader structure" ]
impl crate :: Readable for TR2 { } # [ doc = "`write(|w| ..)` method takes [tr2::W](tr2::W) writer structure" ]
impl crate :: Writable for TR2 { } # [ doc = "watchdog threshold register" ]
pub mod tr2 { # [ doc = "Reader of register TR2" ]
pub type R = crate :: R < u32 , super :: TR2 > ; # [ doc = "Writer for register TR2" ]
pub type W = crate :: W < u32 , super :: TR2 > ; # [ doc = "Register TR2 `reset()`'s with value 0x0fff_0000" ]
impl crate :: ResetValue for super :: TR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff_0000 } } # [ doc = "Reader of field `HT2`" ]
pub type HT2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HT2`" ]
pub struct HT2_W < 'a > { w : & 'a mut W , } impl < 'a > HT2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `LT2`" ]
pub type LT2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `LT2`" ]
pub struct LT2_W < 'a > { w : & 'a mut W , } impl < 'a > LT2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 16:23 - HT2" ]
# [ inline ( always ) ]
pub fn ht2 ( & self ) -> HT2_R { HT2_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - LT2" ]
# [ inline ( always ) ]
pub fn lt2 ( & self ) -> LT2_R { LT2_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 16:23 - HT2" ]
# [ inline ( always ) ]
pub fn ht2 ( & mut self ) -> HT2_W { HT2_W { w : self } } # [ doc = "Bits 0:7 - LT2" ]
# [ inline ( always ) ]
pub fn lt2 ( & mut self ) -> LT2_W { LT2_W { w : self } } } } # [ doc = "watchdog threshold register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tr3](tr3) module" ]
pub type TR3 = crate :: Reg < u32 , _TR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _TR3 ; # [ doc = "`read()` method returns [tr3::R](tr3::R) reader structure" ]
impl crate :: Readable for TR3 { } # [ doc = "`write(|w| ..)` method takes [tr3::W](tr3::W) writer structure" ]
impl crate :: Writable for TR3 { } # [ doc = "watchdog threshold register 3" ]
pub mod tr3 { # [ doc = "Reader of register TR3" ]
pub type R = crate :: R < u32 , super :: TR3 > ; # [ doc = "Writer for register TR3" ]
pub type W = crate :: W < u32 , super :: TR3 > ; # [ doc = "Register TR3 `reset()`'s with value 0x0fff_0000" ]
impl crate :: ResetValue for super :: TR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0x0fff_0000 } } # [ doc = "Reader of field `HT3`" ]
pub type HT3_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `HT3`" ]
pub struct HT3_W < 'a > { w : & 'a mut W , } impl < 'a > HT3_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0xff << 16 ) ) | ( ( ( value as u32 ) & 0xff ) << 16 ) ; self . w } } # [ doc = "Reader of field `LT3`" ]
pub type LT3_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `LT3`" ]
pub struct LT3_W < 'a > { w : & 'a mut W , } impl < 'a > LT3_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0xff ) | ( ( value as u32 ) & 0xff ) ; self . w } } impl R { # [ doc = "Bits 16:23 - HT3" ]
# [ inline ( always ) ]
pub fn ht3 ( & self ) -> HT3_R { HT3_R :: new ( ( ( self . bits >> 16 ) & 0xff ) as u8 ) } # [ doc = "Bits 0:7 - LT3" ]
# [ inline ( always ) ]
pub fn lt3 ( & self ) -> LT3_R { LT3_R :: new ( ( self . bits & 0xff ) as u8 ) } } impl W { # [ doc = "Bits 16:23 - HT3" ]
# [ inline ( always ) ]
pub fn ht3 ( & mut self ) -> HT3_W { HT3_W { w : self } } # [ doc = "Bits 0:7 - LT3" ]
# [ inline ( always ) ]
pub fn lt3 ( & mut self ) -> LT3_W { LT3_W { w : self } } } } # [ doc = "regular sequence register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sqr1](sqr1) module" ]
pub type SQR1 = crate :: Reg < u32 , _SQR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SQR1 ; # [ doc = "`read()` method returns [sqr1::R](sqr1::R) reader structure" ]
impl crate :: Readable for SQR1 { } # [ doc = "`write(|w| ..)` method takes [sqr1::W](sqr1::W) writer structure" ]
impl crate :: Writable for SQR1 { } # [ doc = "regular sequence register 1" ]
pub mod sqr1 { # [ doc = "Reader of register SQR1" ]
pub type R = crate :: R < u32 , super :: SQR1 > ; # [ doc = "Writer for register SQR1" ]
pub type W = crate :: W < u32 , super :: SQR1 > ; # [ doc = "Register SQR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SQR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `SQ4`" ]
pub type SQ4_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ4`" ]
pub struct SQ4_W < 'a > { w : & 'a mut W , } impl < 'a > SQ4_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 24 ) ) | ( ( ( value as u32 ) & 0x1f ) << 24 ) ; self . w } } # [ doc = "Reader of field `SQ3`" ]
pub type SQ3_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ3`" ]
pub struct SQ3_W < 'a > { w : & 'a mut W , } impl < 'a > SQ3_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 18 ) ) | ( ( ( value as u32 ) & 0x1f ) << 18 ) ; self . w } } # [ doc = "Reader of field `SQ2`" ]
pub type SQ2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ2`" ]
pub struct SQ2_W < 'a > { w : & 'a mut W , } impl < 'a > SQ2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 12 ) ) | ( ( ( value as u32 ) & 0x1f ) << 12 ) ; self . w } } # [ doc = "Reader of field `SQ1`" ]
pub type SQ1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ1`" ]
pub struct SQ1_W < 'a > { w : & 'a mut W , } impl < 'a > SQ1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 6 ) ) | ( ( ( value as u32 ) & 0x1f ) << 6 ) ; self . w } } # [ doc = "Reader of field `L`" ]
pub type L_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `L`" ]
pub struct L_W < 'a > { w : & 'a mut W , } impl < 'a > L_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 24:28 - SQ4" ]
# [ inline ( always ) ]
pub fn sq4 ( & self ) -> SQ4_R { SQ4_R :: new ( ( ( self . bits >> 24 ) & 0x1f ) as u8 ) } # [ doc = "Bits 18:22 - SQ3" ]
# [ inline ( always ) ]
pub fn sq3 ( & self ) -> SQ3_R { SQ3_R :: new ( ( ( self . bits >> 18 ) & 0x1f ) as u8 ) } # [ doc = "Bits 12:16 - SQ2" ]
# [ inline ( always ) ]
pub fn sq2 ( & self ) -> SQ2_R { SQ2_R :: new ( ( ( self . bits >> 12 ) & 0x1f ) as u8 ) } # [ doc = "Bits 6:10 - SQ1" ]
# [ inline ( always ) ]
pub fn sq1 ( & self ) -> SQ1_R { SQ1_R :: new ( ( ( self . bits >> 6 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:3 - L3" ]
# [ inline ( always ) ]
pub fn l ( & self ) -> L_R { L_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 24:28 - SQ4" ]
# [ inline ( always ) ]
pub fn sq4 ( & mut self ) -> SQ4_W { SQ4_W { w : self } } # [ doc = "Bits 18:22 - SQ3" ]
# [ inline ( always ) ]
pub fn sq3 ( & mut self ) -> SQ3_W { SQ3_W { w : self } } # [ doc = "Bits 12:16 - SQ2" ]
# [ inline ( always ) ]
pub fn sq2 ( & mut self ) -> SQ2_W { SQ2_W { w : self } } # [ doc = "Bits 6:10 - SQ1" ]
# [ inline ( always ) ]
pub fn sq1 ( & mut self ) -> SQ1_W { SQ1_W { w : self } } # [ doc = "Bits 0:3 - L3" ]
# [ inline ( always ) ]
pub fn l ( & mut self ) -> L_W { L_W { w : self } } } } # [ doc = "regular sequence register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sqr2](sqr2) module" ]
pub type SQR2 = crate :: Reg < u32 , _SQR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SQR2 ; # [ doc = "`read()` method returns [sqr2::R](sqr2::R) reader structure" ]
impl crate :: Readable for SQR2 { } # [ doc = "`write(|w| ..)` method takes [sqr2::W](sqr2::W) writer structure" ]
impl crate :: Writable for SQR2 { } # [ doc = "regular sequence register 2" ]
pub mod sqr2 { # [ doc = "Reader of register SQR2" ]
pub type R = crate :: R < u32 , super :: SQR2 > ; # [ doc = "Writer for register SQR2" ]
pub type W = crate :: W < u32 , super :: SQR2 > ; # [ doc = "Register SQR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SQR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `SQ9`" ]
pub type SQ9_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ9`" ]
pub struct SQ9_W < 'a > { w : & 'a mut W , } impl < 'a > SQ9_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 24 ) ) | ( ( ( value as u32 ) & 0x1f ) << 24 ) ; self . w } } # [ doc = "Reader of field `SQ8`" ]
pub type SQ8_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ8`" ]
pub struct SQ8_W < 'a > { w : & 'a mut W , } impl < 'a > SQ8_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 18 ) ) | ( ( ( value as u32 ) & 0x1f ) << 18 ) ; self . w } } # [ doc = "Reader of field `SQ7`" ]
pub type SQ7_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ7`" ]
pub struct SQ7_W < 'a > { w : & 'a mut W , } impl < 'a > SQ7_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 12 ) ) | ( ( ( value as u32 ) & 0x1f ) << 12 ) ; self . w } } # [ doc = "Reader of field `SQ6`" ]
pub type SQ6_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ6`" ]
pub struct SQ6_W < 'a > { w : & 'a mut W , } impl < 'a > SQ6_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 6 ) ) | ( ( ( value as u32 ) & 0x1f ) << 6 ) ; self . w } } # [ doc = "Reader of field `SQ5`" ]
pub type SQ5_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ5`" ]
pub struct SQ5_W < 'a > { w : & 'a mut W , } impl < 'a > SQ5_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 24:28 - SQ9" ]
# [ inline ( always ) ]
pub fn sq9 ( & self ) -> SQ9_R { SQ9_R :: new ( ( ( self . bits >> 24 ) & 0x1f ) as u8 ) } # [ doc = "Bits 18:22 - SQ8" ]
# [ inline ( always ) ]
pub fn sq8 ( & self ) -> SQ8_R { SQ8_R :: new ( ( ( self . bits >> 18 ) & 0x1f ) as u8 ) } # [ doc = "Bits 12:16 - SQ7" ]
# [ inline ( always ) ]
pub fn sq7 ( & self ) -> SQ7_R { SQ7_R :: new ( ( ( self . bits >> 12 ) & 0x1f ) as u8 ) } # [ doc = "Bits 6:10 - SQ6" ]
# [ inline ( always ) ]
pub fn sq6 ( & self ) -> SQ6_R { SQ6_R :: new ( ( ( self . bits >> 6 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - SQ5" ]
# [ inline ( always ) ]
pub fn sq5 ( & self ) -> SQ5_R { SQ5_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 24:28 - SQ9" ]
# [ inline ( always ) ]
pub fn sq9 ( & mut self ) -> SQ9_W { SQ9_W { w : self } } # [ doc = "Bits 18:22 - SQ8" ]
# [ inline ( always ) ]
pub fn sq8 ( & mut self ) -> SQ8_W { SQ8_W { w : self } } # [ doc = "Bits 12:16 - SQ7" ]
# [ inline ( always ) ]
pub fn sq7 ( & mut self ) -> SQ7_W { SQ7_W { w : self } } # [ doc = "Bits 6:10 - SQ6" ]
# [ inline ( always ) ]
pub fn sq6 ( & mut self ) -> SQ6_W { SQ6_W { w : self } } # [ doc = "Bits 0:4 - SQ5" ]
# [ inline ( always ) ]
pub fn sq5 ( & mut self ) -> SQ5_W { SQ5_W { w : self } } } } # [ doc = "regular sequence register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sqr3](sqr3) module" ]
pub type SQR3 = crate :: Reg < u32 , _SQR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SQR3 ; # [ doc = "`read()` method returns [sqr3::R](sqr3::R) reader structure" ]
impl crate :: Readable for SQR3 { } # [ doc = "`write(|w| ..)` method takes [sqr3::W](sqr3::W) writer structure" ]
impl crate :: Writable for SQR3 { } # [ doc = "regular sequence register 3" ]
pub mod sqr3 { # [ doc = "Reader of register SQR3" ]
pub type R = crate :: R < u32 , super :: SQR3 > ; # [ doc = "Writer for register SQR3" ]
pub type W = crate :: W < u32 , super :: SQR3 > ; # [ doc = "Register SQR3 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SQR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `SQ14`" ]
pub type SQ14_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ14`" ]
pub struct SQ14_W < 'a > { w : & 'a mut W , } impl < 'a > SQ14_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 24 ) ) | ( ( ( value as u32 ) & 0x1f ) << 24 ) ; self . w } } # [ doc = "Reader of field `SQ13`" ]
pub type SQ13_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ13`" ]
pub struct SQ13_W < 'a > { w : & 'a mut W , } impl < 'a > SQ13_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 18 ) ) | ( ( ( value as u32 ) & 0x1f ) << 18 ) ; self . w } } # [ doc = "Reader of field `SQ12`" ]
pub type SQ12_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ12`" ]
pub struct SQ12_W < 'a > { w : & 'a mut W , } impl < 'a > SQ12_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 12 ) ) | ( ( ( value as u32 ) & 0x1f ) << 12 ) ; self . w } } # [ doc = "Reader of field `SQ11`" ]
pub type SQ11_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ11`" ]
pub struct SQ11_W < 'a > { w : & 'a mut W , } impl < 'a > SQ11_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 6 ) ) | ( ( ( value as u32 ) & 0x1f ) << 6 ) ; self . w } } # [ doc = "Reader of field `SQ10`" ]
pub type SQ10_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ10`" ]
pub struct SQ10_W < 'a > { w : & 'a mut W , } impl < 'a > SQ10_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 24:28 - SQ14" ]
# [ inline ( always ) ]
pub fn sq14 ( & self ) -> SQ14_R { SQ14_R :: new ( ( ( self . bits >> 24 ) & 0x1f ) as u8 ) } # [ doc = "Bits 18:22 - SQ13" ]
# [ inline ( always ) ]
pub fn sq13 ( & self ) -> SQ13_R { SQ13_R :: new ( ( ( self . bits >> 18 ) & 0x1f ) as u8 ) } # [ doc = "Bits 12:16 - SQ12" ]
# [ inline ( always ) ]
pub fn sq12 ( & self ) -> SQ12_R { SQ12_R :: new ( ( ( self . bits >> 12 ) & 0x1f ) as u8 ) } # [ doc = "Bits 6:10 - SQ11" ]
# [ inline ( always ) ]
pub fn sq11 ( & self ) -> SQ11_R { SQ11_R :: new ( ( ( self . bits >> 6 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - SQ10" ]
# [ inline ( always ) ]
pub fn sq10 ( & self ) -> SQ10_R { SQ10_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 24:28 - SQ14" ]
# [ inline ( always ) ]
pub fn sq14 ( & mut self ) -> SQ14_W { SQ14_W { w : self } } # [ doc = "Bits 18:22 - SQ13" ]
# [ inline ( always ) ]
pub fn sq13 ( & mut self ) -> SQ13_W { SQ13_W { w : self } } # [ doc = "Bits 12:16 - SQ12" ]
# [ inline ( always ) ]
pub fn sq12 ( & mut self ) -> SQ12_W { SQ12_W { w : self } } # [ doc = "Bits 6:10 - SQ11" ]
# [ inline ( always ) ]
pub fn sq11 ( & mut self ) -> SQ11_W { SQ11_W { w : self } } # [ doc = "Bits 0:4 - SQ10" ]
# [ inline ( always ) ]
pub fn sq10 ( & mut self ) -> SQ10_W { SQ10_W { w : self } } } } # [ doc = "regular sequence register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sqr4](sqr4) module" ]
pub type SQR4 = crate :: Reg < u32 , _SQR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _SQR4 ; # [ doc = "`read()` method returns [sqr4::R](sqr4::R) reader structure" ]
impl crate :: Readable for SQR4 { } # [ doc = "`write(|w| ..)` method takes [sqr4::W](sqr4::W) writer structure" ]
impl crate :: Writable for SQR4 { } # [ doc = "regular sequence register 4" ]
pub mod sqr4 { # [ doc = "Reader of register SQR4" ]
pub type R = crate :: R < u32 , super :: SQR4 > ; # [ doc = "Writer for register SQR4" ]
pub type W = crate :: W < u32 , super :: SQR4 > ; # [ doc = "Register SQR4 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: SQR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `SQ16`" ]
pub type SQ16_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ16`" ]
pub struct SQ16_W < 'a > { w : & 'a mut W , } impl < 'a > SQ16_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 6 ) ) | ( ( ( value as u32 ) & 0x1f ) << 6 ) ; self . w } } # [ doc = "Reader of field `SQ15`" ]
pub type SQ15_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `SQ15`" ]
pub struct SQ15_W < 'a > { w : & 'a mut W , } impl < 'a > SQ15_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } impl R { # [ doc = "Bits 6:10 - SQ16" ]
# [ inline ( always ) ]
pub fn sq16 ( & self ) -> SQ16_R { SQ16_R :: new ( ( ( self . bits >> 6 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:4 - SQ15" ]
# [ inline ( always ) ]
pub fn sq15 ( & self ) -> SQ15_R { SQ15_R :: new ( ( self . bits & 0x1f ) as u8 ) } } impl W { # [ doc = "Bits 6:10 - SQ16" ]
# [ inline ( always ) ]
pub fn sq16 ( & mut self ) -> SQ16_W { SQ16_W { w : self } } # [ doc = "Bits 0:4 - SQ15" ]
# [ inline ( always ) ]
pub fn sq15 ( & mut self ) -> SQ15_W { SQ15_W { w : self } } } } # [ doc = "regular Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr](dr) module" ]
pub type DR = crate :: Reg < u32 , _DR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DR ; # [ doc = "`read()` method returns [dr::R](dr::R) reader structure" ]
impl crate :: Readable for DR { } # [ doc = "regular Data Register" ]
pub mod dr { # [ doc = "Reader of register DR" ]
pub type R = crate :: R < u32 , super :: DR > ; # [ doc = "Reader of field `RDATA`" ]
pub type RDATA_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - regularDATA" ]
# [ inline ( always ) ]
pub fn rdata ( & self ) -> RDATA_R { RDATA_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "injected sequence register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jsqr](jsqr) module" ]
pub type JSQR = crate :: Reg < u32 , _JSQR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JSQR ; # [ doc = "`read()` method returns [jsqr::R](jsqr::R) reader structure" ]
impl crate :: Readable for JSQR { } # [ doc = "`write(|w| ..)` method takes [jsqr::W](jsqr::W) writer structure" ]
impl crate :: Writable for JSQR { } # [ doc = "injected sequence register" ]
pub mod jsqr { # [ doc = "Reader of register JSQR" ]
pub type R = crate :: R < u32 , super :: JSQR > ; # [ doc = "Writer for register JSQR" ]
pub type W = crate :: W < u32 , super :: JSQR > ; # [ doc = "Register JSQR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: JSQR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `JSQ4`" ]
pub type JSQ4_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `JSQ4`" ]
pub struct JSQ4_W < 'a > { w : & 'a mut W , } impl < 'a > JSQ4_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 26 ) ) | ( ( ( value as u32 ) & 0x1f ) << 26 ) ; self . w } } # [ doc = "Reader of field `JSQ3`" ]
pub type JSQ3_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `JSQ3`" ]
pub struct JSQ3_W < 'a > { w : & 'a mut W , } impl < 'a > JSQ3_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 20 ) ) | ( ( ( value as u32 ) & 0x1f ) << 20 ) ; self . w } } # [ doc = "Reader of field `JSQ2`" ]
pub type JSQ2_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `JSQ2`" ]
pub struct JSQ2_W < 'a > { w : & 'a mut W , } impl < 'a > JSQ2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 14 ) ) | ( ( ( value as u32 ) & 0x1f ) << 14 ) ; self . w } } # [ doc = "Reader of field `JSQ1`" ]
pub type JSQ1_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `JSQ1`" ]
pub struct JSQ1_W < 'a > { w : & 'a mut W , } impl < 'a > JSQ1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 8 ) ) | ( ( ( value as u32 ) & 0x1f ) << 8 ) ; self . w } } # [ doc = "JEXTEN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum JEXTEN_A { # [ doc = "0: Trigger detection disabled" ]
DISABLED = 0 , # [ doc = "1: Trigger detection on the rising edge" ]
RISINGEDGE = 1 , # [ doc = "2: Trigger detection on the falling edge" ]
FALLINGEDGE = 2 , # [ doc = "3: Trigger detection on both the rising and falling edges" ]
BOTHEDGES = 3 } impl From < JEXTEN_A > for u8 { # [ inline ( always ) ]
fn from ( variant : JEXTEN_A ) -> Self { variant as _ } } # [ doc = "Reader of field `JEXTEN`" ]
pub type JEXTEN_R = crate :: R < u8 , JEXTEN_A > ; impl JEXTEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JEXTEN_A { match self . bits { 0 => JEXTEN_A :: DISABLED , 1 => JEXTEN_A :: RISINGEDGE , 2 => JEXTEN_A :: FALLINGEDGE , 3 => JEXTEN_A :: BOTHEDGES , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == JEXTEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `RISINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_rising_edge ( & self ) -> bool { * self == JEXTEN_A :: RISINGEDGE } # [ doc = "Checks if the value of the field is `FALLINGEDGE`" ]
# [ inline ( always ) ]
pub fn is_falling_edge ( & self ) -> bool { * self == JEXTEN_A :: FALLINGEDGE } # [ doc = "Checks if the value of the field is `BOTHEDGES`" ]
# [ inline ( always ) ]
pub fn is_both_edges ( & self ) -> bool { * self == JEXTEN_A :: BOTHEDGES } } # [ doc = "Write proxy for field `JEXTEN`" ]
pub struct JEXTEN_W < 'a > { w : & 'a mut W , } impl < 'a > JEXTEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JEXTEN_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Trigger detection disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( JEXTEN_A :: DISABLED ) } # [ doc = "Trigger detection on the rising edge" ]
# [ inline ( always ) ]
pub fn rising_edge ( self ) -> & 'a mut W { self . variant ( JEXTEN_A :: RISINGEDGE ) } # [ doc = "Trigger detection on the falling edge" ]
# [ inline ( always ) ]
pub fn falling_edge ( self ) -> & 'a mut W { self . variant ( JEXTEN_A :: FALLINGEDGE ) } # [ doc = "Trigger detection on both the rising and falling edges" ]
# [ inline ( always ) ]
pub fn both_edges ( self ) -> & 'a mut W { self . variant ( JEXTEN_A :: BOTHEDGES ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "JEXTSEL\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum JEXTSEL_A { # [ doc = "9: HRTIM_ADCTRG2 event" ]
HRTIM_ADCTRG2 = 9 , # [ doc = "10: HRTIM_ADCTRG4 event" ]
HRTIM_ADCTRG4 = 10 } impl From < JEXTSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : JEXTSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `JEXTSEL`" ]
pub type JEXTSEL_R = crate :: R < u8 , JEXTSEL_A > ; impl JEXTSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , JEXTSEL_A > { use crate :: Variant :: * ; match self . bits { 9 => Val ( JEXTSEL_A :: HRTIM_ADCTRG2 ) , 10 => Val ( JEXTSEL_A :: HRTIM_ADCTRG4 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `HRTIM_ADCTRG2`" ]
# [ inline ( always ) ]
pub fn is_hrtim_adctrg2 ( & self ) -> bool { * self == JEXTSEL_A :: HRTIM_ADCTRG2 } # [ doc = "Checks if the value of the field is `HRTIM_ADCTRG4`" ]
# [ inline ( always ) ]
pub fn is_hrtim_adctrg4 ( & self ) -> bool { * self == JEXTSEL_A :: HRTIM_ADCTRG4 } } # [ doc = "Write proxy for field `JEXTSEL`" ]
pub struct JEXTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > JEXTSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : JEXTSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "HRTIM_ADCTRG2 event" ]
# [ inline ( always ) ]
pub fn hrtim_adctrg2 ( self ) -> & 'a mut W { self . variant ( JEXTSEL_A :: HRTIM_ADCTRG2 ) } # [ doc = "HRTIM_ADCTRG4 event" ]
# [ inline ( always ) ]
pub fn hrtim_adctrg4 ( self ) -> & 'a mut W { self . variant ( JEXTSEL_A :: HRTIM_ADCTRG4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 2 ) ) | ( ( ( value as u32 ) & 0x0f ) << 2 ) ; self . w } } # [ doc = "Reader of field `JL`" ]
pub type JL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `JL`" ]
pub struct JL_W < 'a > { w : & 'a mut W , } impl < 'a > JL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 26:30 - JSQ4" ]
# [ inline ( always ) ]
pub fn jsq4 ( & self ) -> JSQ4_R { JSQ4_R :: new ( ( ( self . bits >> 26 ) & 0x1f ) as u8 ) } # [ doc = "Bits 20:24 - JSQ3" ]
# [ inline ( always ) ]
pub fn jsq3 ( & self ) -> JSQ3_R { JSQ3_R :: new ( ( ( self . bits >> 20 ) & 0x1f ) as u8 ) } # [ doc = "Bits 14:18 - JSQ2" ]
# [ inline ( always ) ]
pub fn jsq2 ( & self ) -> JSQ2_R { JSQ2_R :: new ( ( ( self . bits >> 14 ) & 0x1f ) as u8 ) } # [ doc = "Bits 8:12 - JSQ1" ]
# [ inline ( always ) ]
pub fn jsq1 ( & self ) -> JSQ1_R { JSQ1_R :: new ( ( ( self . bits >> 8 ) & 0x1f ) as u8 ) } # [ doc = "Bits 6:7 - JEXTEN" ]
# [ inline ( always ) ]
pub fn jexten ( & self ) -> JEXTEN_R { JEXTEN_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:5 - JEXTSEL" ]
# [ inline ( always ) ]
pub fn jextsel ( & self ) -> JEXTSEL_R { JEXTSEL_R :: new ( ( ( self . bits >> 2 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:1 - JL" ]
# [ inline ( always ) ]
pub fn jl ( & self ) -> JL_R { JL_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 26:30 - JSQ4" ]
# [ inline ( always ) ]
pub fn jsq4 ( & mut self ) -> JSQ4_W { JSQ4_W { w : self } } # [ doc = "Bits 20:24 - JSQ3" ]
# [ inline ( always ) ]
pub fn jsq3 ( & mut self ) -> JSQ3_W { JSQ3_W { w : self } } # [ doc = "Bits 14:18 - JSQ2" ]
# [ inline ( always ) ]
pub fn jsq2 ( & mut self ) -> JSQ2_W { JSQ2_W { w : self } } # [ doc = "Bits 8:12 - JSQ1" ]
# [ inline ( always ) ]
pub fn jsq1 ( & mut self ) -> JSQ1_W { JSQ1_W { w : self } } # [ doc = "Bits 6:7 - JEXTEN" ]
# [ inline ( always ) ]
pub fn jexten ( & mut self ) -> JEXTEN_W { JEXTEN_W { w : self } } # [ doc = "Bits 2:5 - JEXTSEL" ]
# [ inline ( always ) ]
pub fn jextsel ( & mut self ) -> JEXTSEL_W { JEXTSEL_W { w : self } } # [ doc = "Bits 0:1 - JL" ]
# [ inline ( always ) ]
pub fn jl ( & mut self ) -> JL_W { JL_W { w : self } } } } # [ doc = "offset register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ofr1](ofr1) module" ]
pub type OFR1 = crate :: Reg < u32 , _OFR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OFR1 ; # [ doc = "`read()` method returns [ofr1::R](ofr1::R) reader structure" ]
impl crate :: Readable for OFR1 { } # [ doc = "`write(|w| ..)` method takes [ofr1::W](ofr1::W) writer structure" ]
impl crate :: Writable for OFR1 { } # [ doc = "offset register 1" ]
pub mod ofr1 { # [ doc = "Reader of register OFR1" ]
pub type R = crate :: R < u32 , super :: OFR1 > ; # [ doc = "Writer for register OFR1" ]
pub type W = crate :: W < u32 , super :: OFR1 > ; # [ doc = "Register OFR1 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OFR1 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "OFFSET1_EN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OFFSET1_EN_A { # [ doc = "0: Offset disabled" ]
DISABLED = 0 , # [ doc = "1: Offset enabled" ]
ENABLED = 1 } impl From < OFFSET1_EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : OFFSET1_EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OFFSET1_EN`" ]
pub type OFFSET1_EN_R = crate :: R < bool , OFFSET1_EN_A > ; impl OFFSET1_EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OFFSET1_EN_A { match self . bits { false => OFFSET1_EN_A :: DISABLED , true => OFFSET1_EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OFFSET1_EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OFFSET1_EN_A :: ENABLED } } # [ doc = "Write proxy for field `OFFSET1_EN`" ]
pub struct OFFSET1_EN_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET1_EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OFFSET1_EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Offset disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OFFSET1_EN_A :: DISABLED ) } # [ doc = "Offset enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OFFSET1_EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reader of field `OFFSET1_CH`" ]
pub type OFFSET1_CH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OFFSET1_CH`" ]
pub struct OFFSET1_CH_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET1_CH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 26 ) ) | ( ( ( value as u32 ) & 0x1f ) << 26 ) ; self . w } } # [ doc = "Reader of field `OFFSET1`" ]
pub type OFFSET1_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OFFSET1`" ]
pub struct OFFSET1_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET1_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bit 31 - OFFSET1_EN" ]
# [ inline ( always ) ]
pub fn offset1_en ( & self ) -> OFFSET1_EN_R { OFFSET1_EN_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bits 26:30 - OFFSET1_CH" ]
# [ inline ( always ) ]
pub fn offset1_ch ( & self ) -> OFFSET1_CH_R { OFFSET1_CH_R :: new ( ( ( self . bits >> 26 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:11 - OFFSET1" ]
# [ inline ( always ) ]
pub fn offset1 ( & self ) -> OFFSET1_R { OFFSET1_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bit 31 - OFFSET1_EN" ]
# [ inline ( always ) ]
pub fn offset1_en ( & mut self ) -> OFFSET1_EN_W { OFFSET1_EN_W { w : self } } # [ doc = "Bits 26:30 - OFFSET1_CH" ]
# [ inline ( always ) ]
pub fn offset1_ch ( & mut self ) -> OFFSET1_CH_W { OFFSET1_CH_W { w : self } } # [ doc = "Bits 0:11 - OFFSET1" ]
# [ inline ( always ) ]
pub fn offset1 ( & mut self ) -> OFFSET1_W { OFFSET1_W { w : self } } } } # [ doc = "offset register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ofr2](ofr2) module" ]
pub type OFR2 = crate :: Reg < u32 , _OFR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OFR2 ; # [ doc = "`read()` method returns [ofr2::R](ofr2::R) reader structure" ]
impl crate :: Readable for OFR2 { } # [ doc = "`write(|w| ..)` method takes [ofr2::W](ofr2::W) writer structure" ]
impl crate :: Writable for OFR2 { } # [ doc = "offset register 2" ]
pub mod ofr2 { # [ doc = "Reader of register OFR2" ]
pub type R = crate :: R < u32 , super :: OFR2 > ; # [ doc = "Writer for register OFR2" ]
pub type W = crate :: W < u32 , super :: OFR2 > ; # [ doc = "Register OFR2 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OFR2 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "OFFSET2_EN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OFFSET2_EN_A { # [ doc = "0: Offset disabled" ]
DISABLED = 0 , # [ doc = "1: Offset enabled" ]
ENABLED = 1 } impl From < OFFSET2_EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : OFFSET2_EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OFFSET2_EN`" ]
pub type OFFSET2_EN_R = crate :: R < bool , OFFSET2_EN_A > ; impl OFFSET2_EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OFFSET2_EN_A { match self . bits { false => OFFSET2_EN_A :: DISABLED , true => OFFSET2_EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OFFSET2_EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OFFSET2_EN_A :: ENABLED } } # [ doc = "Write proxy for field `OFFSET2_EN`" ]
pub struct OFFSET2_EN_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET2_EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OFFSET2_EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Offset disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OFFSET2_EN_A :: DISABLED ) } # [ doc = "Offset enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OFFSET2_EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reader of field `OFFSET2_CH`" ]
pub type OFFSET2_CH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OFFSET2_CH`" ]
pub struct OFFSET2_CH_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET2_CH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 26 ) ) | ( ( ( value as u32 ) & 0x1f ) << 26 ) ; self . w } } # [ doc = "Reader of field `OFFSET2`" ]
pub type OFFSET2_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OFFSET2`" ]
pub struct OFFSET2_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET2_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bit 31 - OFFSET2_EN" ]
# [ inline ( always ) ]
pub fn offset2_en ( & self ) -> OFFSET2_EN_R { OFFSET2_EN_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bits 26:30 - OFFSET2_CH" ]
# [ inline ( always ) ]
pub fn offset2_ch ( & self ) -> OFFSET2_CH_R { OFFSET2_CH_R :: new ( ( ( self . bits >> 26 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:11 - OFFSET2" ]
# [ inline ( always ) ]
pub fn offset2 ( & self ) -> OFFSET2_R { OFFSET2_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bit 31 - OFFSET2_EN" ]
# [ inline ( always ) ]
pub fn offset2_en ( & mut self ) -> OFFSET2_EN_W { OFFSET2_EN_W { w : self } } # [ doc = "Bits 26:30 - OFFSET2_CH" ]
# [ inline ( always ) ]
pub fn offset2_ch ( & mut self ) -> OFFSET2_CH_W { OFFSET2_CH_W { w : self } } # [ doc = "Bits 0:11 - OFFSET2" ]
# [ inline ( always ) ]
pub fn offset2 ( & mut self ) -> OFFSET2_W { OFFSET2_W { w : self } } } } # [ doc = "offset register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ofr3](ofr3) module" ]
pub type OFR3 = crate :: Reg < u32 , _OFR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OFR3 ; # [ doc = "`read()` method returns [ofr3::R](ofr3::R) reader structure" ]
impl crate :: Readable for OFR3 { } # [ doc = "`write(|w| ..)` method takes [ofr3::W](ofr3::W) writer structure" ]
impl crate :: Writable for OFR3 { } # [ doc = "offset register 3" ]
pub mod ofr3 { # [ doc = "Reader of register OFR3" ]
pub type R = crate :: R < u32 , super :: OFR3 > ; # [ doc = "Writer for register OFR3" ]
pub type W = crate :: W < u32 , super :: OFR3 > ; # [ doc = "Register OFR3 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OFR3 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "OFFSET3_EN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OFFSET3_EN_A { # [ doc = "0: Offset disabled" ]
DISABLED = 0 , # [ doc = "1: Offset enabled" ]
ENABLED = 1 } impl From < OFFSET3_EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : OFFSET3_EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OFFSET3_EN`" ]
pub type OFFSET3_EN_R = crate :: R < bool , OFFSET3_EN_A > ; impl OFFSET3_EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OFFSET3_EN_A { match self . bits { false => OFFSET3_EN_A :: DISABLED , true => OFFSET3_EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OFFSET3_EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OFFSET3_EN_A :: ENABLED } } # [ doc = "Write proxy for field `OFFSET3_EN`" ]
pub struct OFFSET3_EN_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET3_EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OFFSET3_EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Offset disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OFFSET3_EN_A :: DISABLED ) } # [ doc = "Offset enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OFFSET3_EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reader of field `OFFSET3_CH`" ]
pub type OFFSET3_CH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OFFSET3_CH`" ]
pub struct OFFSET3_CH_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET3_CH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 26 ) ) | ( ( ( value as u32 ) & 0x1f ) << 26 ) ; self . w } } # [ doc = "Reader of field `OFFSET3`" ]
pub type OFFSET3_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OFFSET3`" ]
pub struct OFFSET3_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET3_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bit 31 - OFFSET3_EN" ]
# [ inline ( always ) ]
pub fn offset3_en ( & self ) -> OFFSET3_EN_R { OFFSET3_EN_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bits 26:30 - OFFSET3_CH" ]
# [ inline ( always ) ]
pub fn offset3_ch ( & self ) -> OFFSET3_CH_R { OFFSET3_CH_R :: new ( ( ( self . bits >> 26 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:11 - OFFSET3" ]
# [ inline ( always ) ]
pub fn offset3 ( & self ) -> OFFSET3_R { OFFSET3_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bit 31 - OFFSET3_EN" ]
# [ inline ( always ) ]
pub fn offset3_en ( & mut self ) -> OFFSET3_EN_W { OFFSET3_EN_W { w : self } } # [ doc = "Bits 26:30 - OFFSET3_CH" ]
# [ inline ( always ) ]
pub fn offset3_ch ( & mut self ) -> OFFSET3_CH_W { OFFSET3_CH_W { w : self } } # [ doc = "Bits 0:11 - OFFSET3" ]
# [ inline ( always ) ]
pub fn offset3 ( & mut self ) -> OFFSET3_W { OFFSET3_W { w : self } } } } # [ doc = "offset register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ofr4](ofr4) module" ]
pub type OFR4 = crate :: Reg < u32 , _OFR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OFR4 ; # [ doc = "`read()` method returns [ofr4::R](ofr4::R) reader structure" ]
impl crate :: Readable for OFR4 { } # [ doc = "`write(|w| ..)` method takes [ofr4::W](ofr4::W) writer structure" ]
impl crate :: Writable for OFR4 { } # [ doc = "offset register 4" ]
pub mod ofr4 { # [ doc = "Reader of register OFR4" ]
pub type R = crate :: R < u32 , super :: OFR4 > ; # [ doc = "Writer for register OFR4" ]
pub type W = crate :: W < u32 , super :: OFR4 > ; # [ doc = "Register OFR4 `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OFR4 { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "OFFSET4_EN\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OFFSET4_EN_A { # [ doc = "0: Offset disabled" ]
DISABLED = 0 , # [ doc = "1: Offset enabled" ]
ENABLED = 1 } impl From < OFFSET4_EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : OFFSET4_EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OFFSET4_EN`" ]
pub type OFFSET4_EN_R = crate :: R < bool , OFFSET4_EN_A > ; impl OFFSET4_EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OFFSET4_EN_A { match self . bits { false => OFFSET4_EN_A :: DISABLED , true => OFFSET4_EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OFFSET4_EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OFFSET4_EN_A :: ENABLED } } # [ doc = "Write proxy for field `OFFSET4_EN`" ]
pub struct OFFSET4_EN_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET4_EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OFFSET4_EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Offset disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OFFSET4_EN_A :: DISABLED ) } # [ doc = "Offset enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OFFSET4_EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reader of field `OFFSET4_CH`" ]
pub type OFFSET4_CH_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `OFFSET4_CH`" ]
pub struct OFFSET4_CH_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET4_CH_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 26 ) ) | ( ( ( value as u32 ) & 0x1f ) << 26 ) ; self . w } } # [ doc = "Reader of field `OFFSET4`" ]
pub type OFFSET4_R = crate :: R < u16 , u16 > ; # [ doc = "Write proxy for field `OFFSET4`" ]
pub struct OFFSET4_W < 'a > { w : & 'a mut W , } impl < 'a > OFFSET4_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u16 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0fff ) | ( ( value as u32 ) & 0x0fff ) ; self . w } } impl R { # [ doc = "Bit 31 - OFFSET4_EN" ]
# [ inline ( always ) ]
pub fn offset4_en ( & self ) -> OFFSET4_EN_R { OFFSET4_EN_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bits 26:30 - OFFSET4_CH" ]
# [ inline ( always ) ]
pub fn offset4_ch ( & self ) -> OFFSET4_CH_R { OFFSET4_CH_R :: new ( ( ( self . bits >> 26 ) & 0x1f ) as u8 ) } # [ doc = "Bits 0:11 - OFFSET4" ]
# [ inline ( always ) ]
pub fn offset4 ( & self ) -> OFFSET4_R { OFFSET4_R :: new ( ( self . bits & 0x0fff ) as u16 ) } } impl W { # [ doc = "Bit 31 - OFFSET4_EN" ]
# [ inline ( always ) ]
pub fn offset4_en ( & mut self ) -> OFFSET4_EN_W { OFFSET4_EN_W { w : self } } # [ doc = "Bits 26:30 - OFFSET4_CH" ]
# [ inline ( always ) ]
pub fn offset4_ch ( & mut self ) -> OFFSET4_CH_W { OFFSET4_CH_W { w : self } } # [ doc = "Bits 0:11 - OFFSET4" ]
# [ inline ( always ) ]
pub fn offset4 ( & mut self ) -> OFFSET4_W { OFFSET4_W { w : self } } } } # [ doc = "injected data register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jdr1](jdr1) module" ]
pub type JDR1 = crate :: Reg < u32 , _JDR1 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JDR1 ; # [ doc = "`read()` method returns [jdr1::R](jdr1::R) reader structure" ]
impl crate :: Readable for JDR1 { } # [ doc = "injected data register 1" ]
pub mod jdr1 { # [ doc = "Reader of register JDR1" ]
pub type R = crate :: R < u32 , super :: JDR1 > ; # [ doc = "Reader of field `JDATA1`" ]
pub type JDATA1_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - JDATA1" ]
# [ inline ( always ) ]
pub fn jdata1 ( & self ) -> JDATA1_R { JDATA1_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "injected data register 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jdr2](jdr2) module" ]
pub type JDR2 = crate :: Reg < u32 , _JDR2 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JDR2 ; # [ doc = "`read()` method returns [jdr2::R](jdr2::R) reader structure" ]
impl crate :: Readable for JDR2 { } # [ doc = "injected data register 2" ]
pub mod jdr2 { # [ doc = "Reader of register JDR2" ]
pub type R = crate :: R < u32 , super :: JDR2 > ; # [ doc = "Reader of field `JDATA2`" ]
pub type JDATA2_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - JDATA2" ]
# [ inline ( always ) ]
pub fn jdata2 ( & self ) -> JDATA2_R { JDATA2_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "injected data register 3\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jdr3](jdr3) module" ]
pub type JDR3 = crate :: Reg < u32 , _JDR3 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JDR3 ; # [ doc = "`read()` method returns [jdr3::R](jdr3::R) reader structure" ]
impl crate :: Readable for JDR3 { } # [ doc = "injected data register 3" ]
pub mod jdr3 { # [ doc = "Reader of register JDR3" ]
pub type R = crate :: R < u32 , super :: JDR3 > ; # [ doc = "Reader of field `JDATA3`" ]
pub type JDATA3_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - JDATA3" ]
# [ inline ( always ) ]
pub fn jdata3 ( & self ) -> JDATA3_R { JDATA3_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "injected data register 4\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [jdr4](jdr4) module" ]
pub type JDR4 = crate :: Reg < u32 , _JDR4 > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _JDR4 ; # [ doc = "`read()` method returns [jdr4::R](jdr4::R) reader structure" ]
impl crate :: Readable for JDR4 { } # [ doc = "injected data register 4" ]
pub mod jdr4 { # [ doc = "Reader of register JDR4" ]
pub type R = crate :: R < u32 , super :: JDR4 > ; # [ doc = "Reader of field `JDATA4`" ]
pub type JDATA4_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 0:15 - JDATA4" ]
# [ inline ( always ) ]
pub fn jdata4 ( & self ) -> JDATA4_R { JDATA4_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } # [ doc = "Analog Watchdog 2 Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [awd2cr](awd2cr) module" ]
pub type AWD2CR = crate :: Reg < u32 , _AWD2CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AWD2CR ; # [ doc = "`read()` method returns [awd2cr::R](awd2cr::R) reader structure" ]
impl crate :: Readable for AWD2CR { } # [ doc = "`write(|w| ..)` method takes [awd2cr::W](awd2cr::W) writer structure" ]
impl crate :: Writable for AWD2CR { } # [ doc = "Analog Watchdog 2 Configuration Register" ]
pub mod awd2cr { # [ doc = "Reader of register AWD2CR" ]
pub type R = crate :: R < u32 , super :: AWD2CR > ; # [ doc = "Writer for register AWD2CR" ]
pub type W = crate :: W < u32 , super :: AWD2CR > ; # [ doc = "Register AWD2CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AWD2CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "AWD2CH\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD2CH0_A { # [ doc = "0: Input channel not monitored by AWDx" ]
NOTMONITORED = 0 , # [ doc = "1: Input channel monitored by AWDx" ]
MONITORED = 1 } impl From < AWD2CH0_A > for bool { # [ inline ( always ) ]
fn from ( variant : AWD2CH0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AWD2CH0`" ]
pub type AWD2CH0_R = crate :: R < bool , AWD2CH0_A > ; impl AWD2CH0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AWD2CH0_A { match self . bits { false => AWD2CH0_A :: NOTMONITORED , true => AWD2CH0_A :: MONITORED } } # [ doc = "Checks if the value of the field is `NOTMONITORED`" ]
# [ inline ( always ) ]
pub fn is_not_monitored ( & self ) -> bool { * self == AWD2CH0_A :: NOTMONITORED } # [ doc = "Checks if the value of the field is `MONITORED`" ]
# [ inline ( always ) ]
pub fn is_monitored ( & self ) -> bool { * self == AWD2CH0_A :: MONITORED } } # [ doc = "Write proxy for field `AWD2CH0`" ]
pub struct AWD2CH0_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH1_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH1`" ]
pub type AWD2CH1_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH1`" ]
pub struct AWD2CH1_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH2_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH2`" ]
pub type AWD2CH2_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH2`" ]
pub struct AWD2CH2_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH3_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH3`" ]
pub type AWD2CH3_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH3`" ]
pub struct AWD2CH3_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH4_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH4`" ]
pub type AWD2CH4_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH4`" ]
pub struct AWD2CH4_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH5_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH5`" ]
pub type AWD2CH5_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH5`" ]
pub struct AWD2CH5_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH6_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH6`" ]
pub type AWD2CH6_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH6`" ]
pub struct AWD2CH6_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH7_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH7`" ]
pub type AWD2CH7_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH7`" ]
pub struct AWD2CH7_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH8_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH8`" ]
pub type AWD2CH8_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH8`" ]
pub struct AWD2CH8_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH9_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH9`" ]
pub type AWD2CH9_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH9`" ]
pub struct AWD2CH9_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH10_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH10`" ]
pub type AWD2CH10_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH10`" ]
pub struct AWD2CH10_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH11_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH11`" ]
pub type AWD2CH11_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH11`" ]
pub struct AWD2CH11_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH12_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH12`" ]
pub type AWD2CH12_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH12`" ]
pub struct AWD2CH12_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH13_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH13`" ]
pub type AWD2CH13_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH13`" ]
pub struct AWD2CH13_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH14_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH14`" ]
pub type AWD2CH14_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH14`" ]
pub struct AWD2CH14_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH15_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH15`" ]
pub type AWD2CH15_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH15`" ]
pub struct AWD2CH15_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH16_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH16`" ]
pub type AWD2CH16_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH16`" ]
pub struct AWD2CH16_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "AWD2CH" ]
pub type AWD2CH17_A = AWD2CH0_A ; # [ doc = "Reader of field `AWD2CH17`" ]
pub type AWD2CH17_R = crate :: R < bool , AWD2CH0_A > ; # [ doc = "Write proxy for field `AWD2CH17`" ]
pub struct AWD2CH17_W < 'a > { w : & 'a mut W , } impl < 'a > AWD2CH17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD2CH17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD2CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } impl R { # [ doc = "Bit 0 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch0 ( & self ) -> AWD2CH0_R { AWD2CH0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch1 ( & self ) -> AWD2CH1_R { AWD2CH1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch2 ( & self ) -> AWD2CH2_R { AWD2CH2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch3 ( & self ) -> AWD2CH3_R { AWD2CH3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch4 ( & self ) -> AWD2CH4_R { AWD2CH4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch5 ( & self ) -> AWD2CH5_R { AWD2CH5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch6 ( & self ) -> AWD2CH6_R { AWD2CH6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch7 ( & self ) -> AWD2CH7_R { AWD2CH7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch8 ( & self ) -> AWD2CH8_R { AWD2CH8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch9 ( & self ) -> AWD2CH9_R { AWD2CH9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch10 ( & self ) -> AWD2CH10_R { AWD2CH10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch11 ( & self ) -> AWD2CH11_R { AWD2CH11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch12 ( & self ) -> AWD2CH12_R { AWD2CH12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch13 ( & self ) -> AWD2CH13_R { AWD2CH13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch14 ( & self ) -> AWD2CH14_R { AWD2CH14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch15 ( & self ) -> AWD2CH15_R { AWD2CH15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch16 ( & self ) -> AWD2CH16_R { AWD2CH16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch17 ( & self ) -> AWD2CH17_R { AWD2CH17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch0 ( & mut self ) -> AWD2CH0_W { AWD2CH0_W { w : self } } # [ doc = "Bit 1 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch1 ( & mut self ) -> AWD2CH1_W { AWD2CH1_W { w : self } } # [ doc = "Bit 2 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch2 ( & mut self ) -> AWD2CH2_W { AWD2CH2_W { w : self } } # [ doc = "Bit 3 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch3 ( & mut self ) -> AWD2CH3_W { AWD2CH3_W { w : self } } # [ doc = "Bit 4 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch4 ( & mut self ) -> AWD2CH4_W { AWD2CH4_W { w : self } } # [ doc = "Bit 5 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch5 ( & mut self ) -> AWD2CH5_W { AWD2CH5_W { w : self } } # [ doc = "Bit 6 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch6 ( & mut self ) -> AWD2CH6_W { AWD2CH6_W { w : self } } # [ doc = "Bit 7 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch7 ( & mut self ) -> AWD2CH7_W { AWD2CH7_W { w : self } } # [ doc = "Bit 8 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch8 ( & mut self ) -> AWD2CH8_W { AWD2CH8_W { w : self } } # [ doc = "Bit 9 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch9 ( & mut self ) -> AWD2CH9_W { AWD2CH9_W { w : self } } # [ doc = "Bit 10 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch10 ( & mut self ) -> AWD2CH10_W { AWD2CH10_W { w : self } } # [ doc = "Bit 11 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch11 ( & mut self ) -> AWD2CH11_W { AWD2CH11_W { w : self } } # [ doc = "Bit 12 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch12 ( & mut self ) -> AWD2CH12_W { AWD2CH12_W { w : self } } # [ doc = "Bit 13 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch13 ( & mut self ) -> AWD2CH13_W { AWD2CH13_W { w : self } } # [ doc = "Bit 14 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch14 ( & mut self ) -> AWD2CH14_W { AWD2CH14_W { w : self } } # [ doc = "Bit 15 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch15 ( & mut self ) -> AWD2CH15_W { AWD2CH15_W { w : self } } # [ doc = "Bit 16 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch16 ( & mut self ) -> AWD2CH16_W { AWD2CH16_W { w : self } } # [ doc = "Bit 17 - AWD2CH" ]
# [ inline ( always ) ]
pub fn awd2ch17 ( & mut self ) -> AWD2CH17_W { AWD2CH17_W { w : self } } } } # [ doc = "Analog Watchdog 3 Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [awd3cr](awd3cr) module" ]
pub type AWD3CR = crate :: Reg < u32 , _AWD3CR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AWD3CR ; # [ doc = "`read()` method returns [awd3cr::R](awd3cr::R) reader structure" ]
impl crate :: Readable for AWD3CR { } # [ doc = "`write(|w| ..)` method takes [awd3cr::W](awd3cr::W) writer structure" ]
impl crate :: Writable for AWD3CR { } # [ doc = "Analog Watchdog 3 Configuration Register" ]
pub mod awd3cr { # [ doc = "Reader of register AWD3CR" ]
pub type R = crate :: R < u32 , super :: AWD3CR > ; # [ doc = "Writer for register AWD3CR" ]
pub type W = crate :: W < u32 , super :: AWD3CR > ; # [ doc = "Register AWD3CR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AWD3CR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "AWD3CH\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD3CH0_A { # [ doc = "0: Input channel not monitored by AWDx" ]
NOTMONITORED = 0 , # [ doc = "1: Input channel monitored by AWDx" ]
MONITORED = 1 } impl From < AWD3CH0_A > for bool { # [ inline ( always ) ]
fn from ( variant : AWD3CH0_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AWD3CH0`" ]
pub type AWD3CH0_R = crate :: R < bool , AWD3CH0_A > ; impl AWD3CH0_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AWD3CH0_A { match self . bits { false => AWD3CH0_A :: NOTMONITORED , true => AWD3CH0_A :: MONITORED } } # [ doc = "Checks if the value of the field is `NOTMONITORED`" ]
# [ inline ( always ) ]
pub fn is_not_monitored ( & self ) -> bool { * self == AWD3CH0_A :: NOTMONITORED } # [ doc = "Checks if the value of the field is `MONITORED`" ]
# [ inline ( always ) ]
pub fn is_monitored ( & self ) -> bool { * self == AWD3CH0_A :: MONITORED } } # [ doc = "Write proxy for field `AWD3CH0`" ]
pub struct AWD3CH0_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH1_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH1`" ]
pub type AWD3CH1_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH1`" ]
pub struct AWD3CH1_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH2_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH2`" ]
pub type AWD3CH2_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH2`" ]
pub struct AWD3CH2_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH3_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH3`" ]
pub type AWD3CH3_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH3`" ]
pub struct AWD3CH3_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH4_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH4`" ]
pub type AWD3CH4_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH4`" ]
pub struct AWD3CH4_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH5_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH5`" ]
pub type AWD3CH5_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH5`" ]
pub struct AWD3CH5_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH6_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH6`" ]
pub type AWD3CH6_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH6`" ]
pub struct AWD3CH6_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH7_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH7`" ]
pub type AWD3CH7_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH7`" ]
pub struct AWD3CH7_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH8_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH8`" ]
pub type AWD3CH8_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH8`" ]
pub struct AWD3CH8_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH9_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH9`" ]
pub type AWD3CH9_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH9`" ]
pub struct AWD3CH9_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH10_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH10`" ]
pub type AWD3CH10_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH10`" ]
pub struct AWD3CH10_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH11_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH11`" ]
pub type AWD3CH11_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH11`" ]
pub struct AWD3CH11_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH12_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH12`" ]
pub type AWD3CH12_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH12`" ]
pub struct AWD3CH12_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH13_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH13`" ]
pub type AWD3CH13_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH13`" ]
pub struct AWD3CH13_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH14_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH14`" ]
pub type AWD3CH14_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH14`" ]
pub struct AWD3CH14_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH15_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH15`" ]
pub type AWD3CH15_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH15`" ]
pub struct AWD3CH15_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH16_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH16`" ]
pub type AWD3CH16_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH16`" ]
pub struct AWD3CH16_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "AWD3CH" ]
pub type AWD3CH17_A = AWD3CH0_A ; # [ doc = "Reader of field `AWD3CH17`" ]
pub type AWD3CH17_R = crate :: R < bool , AWD3CH0_A > ; # [ doc = "Write proxy for field `AWD3CH17`" ]
pub struct AWD3CH17_W < 'a > { w : & 'a mut W , } impl < 'a > AWD3CH17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AWD3CH17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel not monitored by AWDx" ]
# [ inline ( always ) ]
pub fn not_monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: NOTMONITORED ) } # [ doc = "Input channel monitored by AWDx" ]
# [ inline ( always ) ]
pub fn monitored ( self ) -> & 'a mut W { self . variant ( AWD3CH0_A :: MONITORED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } impl R { # [ doc = "Bit 0 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch0 ( & self ) -> AWD3CH0_R { AWD3CH0_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch1 ( & self ) -> AWD3CH1_R { AWD3CH1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch2 ( & self ) -> AWD3CH2_R { AWD3CH2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch3 ( & self ) -> AWD3CH3_R { AWD3CH3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch4 ( & self ) -> AWD3CH4_R { AWD3CH4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch5 ( & self ) -> AWD3CH5_R { AWD3CH5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch6 ( & self ) -> AWD3CH6_R { AWD3CH6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch7 ( & self ) -> AWD3CH7_R { AWD3CH7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch8 ( & self ) -> AWD3CH8_R { AWD3CH8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch9 ( & self ) -> AWD3CH9_R { AWD3CH9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch10 ( & self ) -> AWD3CH10_R { AWD3CH10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch11 ( & self ) -> AWD3CH11_R { AWD3CH11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch12 ( & self ) -> AWD3CH12_R { AWD3CH12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch13 ( & self ) -> AWD3CH13_R { AWD3CH13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch14 ( & self ) -> AWD3CH14_R { AWD3CH14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch15 ( & self ) -> AWD3CH15_R { AWD3CH15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch16 ( & self ) -> AWD3CH16_R { AWD3CH16_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch17 ( & self ) -> AWD3CH17_R { AWD3CH17_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch0 ( & mut self ) -> AWD3CH0_W { AWD3CH0_W { w : self } } # [ doc = "Bit 1 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch1 ( & mut self ) -> AWD3CH1_W { AWD3CH1_W { w : self } } # [ doc = "Bit 2 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch2 ( & mut self ) -> AWD3CH2_W { AWD3CH2_W { w : self } } # [ doc = "Bit 3 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch3 ( & mut self ) -> AWD3CH3_W { AWD3CH3_W { w : self } } # [ doc = "Bit 4 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch4 ( & mut self ) -> AWD3CH4_W { AWD3CH4_W { w : self } } # [ doc = "Bit 5 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch5 ( & mut self ) -> AWD3CH5_W { AWD3CH5_W { w : self } } # [ doc = "Bit 6 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch6 ( & mut self ) -> AWD3CH6_W { AWD3CH6_W { w : self } } # [ doc = "Bit 7 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch7 ( & mut self ) -> AWD3CH7_W { AWD3CH7_W { w : self } } # [ doc = "Bit 8 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch8 ( & mut self ) -> AWD3CH8_W { AWD3CH8_W { w : self } } # [ doc = "Bit 9 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch9 ( & mut self ) -> AWD3CH9_W { AWD3CH9_W { w : self } } # [ doc = "Bit 10 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch10 ( & mut self ) -> AWD3CH10_W { AWD3CH10_W { w : self } } # [ doc = "Bit 11 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch11 ( & mut self ) -> AWD3CH11_W { AWD3CH11_W { w : self } } # [ doc = "Bit 12 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch12 ( & mut self ) -> AWD3CH12_W { AWD3CH12_W { w : self } } # [ doc = "Bit 13 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch13 ( & mut self ) -> AWD3CH13_W { AWD3CH13_W { w : self } } # [ doc = "Bit 14 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch14 ( & mut self ) -> AWD3CH14_W { AWD3CH14_W { w : self } } # [ doc = "Bit 15 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch15 ( & mut self ) -> AWD3CH15_W { AWD3CH15_W { w : self } } # [ doc = "Bit 16 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch16 ( & mut self ) -> AWD3CH16_W { AWD3CH16_W { w : self } } # [ doc = "Bit 17 - AWD3CH" ]
# [ inline ( always ) ]
pub fn awd3ch17 ( & mut self ) -> AWD3CH17_W { AWD3CH17_W { w : self } } } } # [ doc = "Differential Mode Selection Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [difsel](difsel) module" ]
pub type DIFSEL = crate :: Reg < u32 , _DIFSEL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _DIFSEL ; # [ doc = "`read()` method returns [difsel::R](difsel::R) reader structure" ]
impl crate :: Readable for DIFSEL { } # [ doc = "`write(|w| ..)` method takes [difsel::W](difsel::W) writer structure" ]
impl crate :: Writable for DIFSEL { } # [ doc = "Differential Mode Selection Register 2" ]
pub mod difsel { # [ doc = "Reader of register DIFSEL" ]
pub type R = crate :: R < u32 , super :: DIFSEL > ; # [ doc = "Writer for register DIFSEL" ]
pub type W = crate :: W < u32 , super :: DIFSEL > ; # [ doc = "Register DIFSEL `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: DIFSEL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Differential mode for channels 15 to 1\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DIFSEL_10_A { # [ doc = "0: Input channel is configured in single-ended mode" ]
SINGLEENDED = 0 , # [ doc = "1: Input channel is configured in differential mode" ]
DIFFERENTIAL = 1 } impl From < DIFSEL_10_A > for bool { # [ inline ( always ) ]
fn from ( variant : DIFSEL_10_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DIFSEL_10`" ]
pub type DIFSEL_10_R = crate :: R < bool , DIFSEL_10_A > ; impl DIFSEL_10_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DIFSEL_10_A { match self . bits { false => DIFSEL_10_A :: SINGLEENDED , true => DIFSEL_10_A :: DIFFERENTIAL } } # [ doc = "Checks if the value of the field is `SINGLEENDED`" ]
# [ inline ( always ) ]
pub fn is_single_ended ( & self ) -> bool { * self == DIFSEL_10_A :: SINGLEENDED } # [ doc = "Checks if the value of the field is `DIFFERENTIAL`" ]
# [ inline ( always ) ]
pub fn is_differential ( & self ) -> bool { * self == DIFSEL_10_A :: DIFFERENTIAL } } # [ doc = "Write proxy for field `DIFSEL_10`" ]
pub struct DIFSEL_10_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_11_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_11`" ]
pub type DIFSEL_11_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_11`" ]
pub struct DIFSEL_11_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_12_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_12`" ]
pub type DIFSEL_12_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_12`" ]
pub struct DIFSEL_12_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_13_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_13`" ]
pub type DIFSEL_13_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_13`" ]
pub struct DIFSEL_13_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_14_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_14`" ]
pub type DIFSEL_14_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_14`" ]
pub struct DIFSEL_14_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_15_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_15`" ]
pub type DIFSEL_15_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_15`" ]
pub struct DIFSEL_15_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_16_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_16`" ]
pub type DIFSEL_16_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_16`" ]
pub struct DIFSEL_16_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_16_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_16_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_17_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_17`" ]
pub type DIFSEL_17_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_17`" ]
pub struct DIFSEL_17_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_17_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_17_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_18_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_18`" ]
pub type DIFSEL_18_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_18`" ]
pub struct DIFSEL_18_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_18_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_18_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_19_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_19`" ]
pub type DIFSEL_19_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_19`" ]
pub struct DIFSEL_19_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_19_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_19_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_110_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_110`" ]
pub type DIFSEL_110_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_110`" ]
pub struct DIFSEL_110_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_110_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_110_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_111_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_111`" ]
pub type DIFSEL_111_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_111`" ]
pub struct DIFSEL_111_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_111_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_111_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_112_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_112`" ]
pub type DIFSEL_112_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_112`" ]
pub struct DIFSEL_112_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_112_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_112_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_113_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_113`" ]
pub type DIFSEL_113_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_113`" ]
pub struct DIFSEL_113_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_113_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_113_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_114_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_114`" ]
pub type DIFSEL_114_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_114`" ]
pub struct DIFSEL_114_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_114_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_114_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_115_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_115`" ]
pub type DIFSEL_115_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_115`" ]
pub struct DIFSEL_115_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_115_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_115_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_116_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_116`" ]
pub type DIFSEL_116_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_116`" ]
pub struct DIFSEL_116_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_116_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_116_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Differential mode for channels 15 to 1" ]
pub type DIFSEL_117_A = DIFSEL_10_A ; # [ doc = "Reader of field `DIFSEL_117`" ]
pub type DIFSEL_117_R = crate :: R < bool , DIFSEL_10_A > ; # [ doc = "Write proxy for field `DIFSEL_117`" ]
pub struct DIFSEL_117_W < 'a > { w : & 'a mut W , } impl < 'a > DIFSEL_117_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DIFSEL_117_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Input channel is configured in single-ended mode" ]
# [ inline ( always ) ]
pub fn single_ended ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: SINGLEENDED ) } # [ doc = "Input channel is configured in differential mode" ]
# [ inline ( always ) ]
pub fn differential ( self ) -> & 'a mut W { self . variant ( DIFSEL_10_A :: DIFFERENTIAL ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } impl R { # [ doc = "Bit 0 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_10 ( & self ) -> DIFSEL_10_R { DIFSEL_10_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_11 ( & self ) -> DIFSEL_11_R { DIFSEL_11_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_12 ( & self ) -> DIFSEL_12_R { DIFSEL_12_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_13 ( & self ) -> DIFSEL_13_R { DIFSEL_13_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_14 ( & self ) -> DIFSEL_14_R { DIFSEL_14_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_15 ( & self ) -> DIFSEL_15_R { DIFSEL_15_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_16 ( & self ) -> DIFSEL_16_R { DIFSEL_16_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_17 ( & self ) -> DIFSEL_17_R { DIFSEL_17_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_18 ( & self ) -> DIFSEL_18_R { DIFSEL_18_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_19 ( & self ) -> DIFSEL_19_R { DIFSEL_19_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_110 ( & self ) -> DIFSEL_110_R { DIFSEL_110_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_111 ( & self ) -> DIFSEL_111_R { DIFSEL_111_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_112 ( & self ) -> DIFSEL_112_R { DIFSEL_112_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_113 ( & self ) -> DIFSEL_113_R { DIFSEL_113_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_114 ( & self ) -> DIFSEL_114_R { DIFSEL_114_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_115 ( & self ) -> DIFSEL_115_R { DIFSEL_115_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_116 ( & self ) -> DIFSEL_116_R { DIFSEL_116_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_117 ( & self ) -> DIFSEL_117_R { DIFSEL_117_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_10 ( & mut self ) -> DIFSEL_10_W { DIFSEL_10_W { w : self } } # [ doc = "Bit 1 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_11 ( & mut self ) -> DIFSEL_11_W { DIFSEL_11_W { w : self } } # [ doc = "Bit 2 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_12 ( & mut self ) -> DIFSEL_12_W { DIFSEL_12_W { w : self } } # [ doc = "Bit 3 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_13 ( & mut self ) -> DIFSEL_13_W { DIFSEL_13_W { w : self } } # [ doc = "Bit 4 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_14 ( & mut self ) -> DIFSEL_14_W { DIFSEL_14_W { w : self } } # [ doc = "Bit 5 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_15 ( & mut self ) -> DIFSEL_15_W { DIFSEL_15_W { w : self } } # [ doc = "Bit 6 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_16 ( & mut self ) -> DIFSEL_16_W { DIFSEL_16_W { w : self } } # [ doc = "Bit 7 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_17 ( & mut self ) -> DIFSEL_17_W { DIFSEL_17_W { w : self } } # [ doc = "Bit 8 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_18 ( & mut self ) -> DIFSEL_18_W { DIFSEL_18_W { w : self } } # [ doc = "Bit 9 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_19 ( & mut self ) -> DIFSEL_19_W { DIFSEL_19_W { w : self } } # [ doc = "Bit 10 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_110 ( & mut self ) -> DIFSEL_110_W { DIFSEL_110_W { w : self } } # [ doc = "Bit 11 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_111 ( & mut self ) -> DIFSEL_111_W { DIFSEL_111_W { w : self } } # [ doc = "Bit 12 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_112 ( & mut self ) -> DIFSEL_112_W { DIFSEL_112_W { w : self } } # [ doc = "Bit 13 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_113 ( & mut self ) -> DIFSEL_113_W { DIFSEL_113_W { w : self } } # [ doc = "Bit 14 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_114 ( & mut self ) -> DIFSEL_114_W { DIFSEL_114_W { w : self } } # [ doc = "Bit 15 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_115 ( & mut self ) -> DIFSEL_115_W { DIFSEL_115_W { w : self } } # [ doc = "Bit 16 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_116 ( & mut self ) -> DIFSEL_116_W { DIFSEL_116_W { w : self } } # [ doc = "Bit 17 - Differential mode for channels 15 to 1" ]
# [ inline ( always ) ]
pub fn difsel_117 ( & mut self ) -> DIFSEL_117_W { DIFSEL_117_W { w : self } } } } # [ doc = "Calibration Factors\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [calfact](calfact) module" ]
pub type CALFACT = crate :: Reg < u32 , _CALFACT > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CALFACT ; # [ doc = "`read()` method returns [calfact::R](calfact::R) reader structure" ]
impl crate :: Readable for CALFACT { } # [ doc = "`write(|w| ..)` method takes [calfact::W](calfact::W) writer structure" ]
impl crate :: Writable for CALFACT { } # [ doc = "Calibration Factors" ]
pub mod calfact { # [ doc = "Reader of register CALFACT" ]
pub type R = crate :: R < u32 , super :: CALFACT > ; # [ doc = "Writer for register CALFACT" ]
pub type W = crate :: W < u32 , super :: CALFACT > ; # [ doc = "Register CALFACT `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CALFACT { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `CALFACT_D`" ]
pub type CALFACT_D_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CALFACT_D`" ]
pub struct CALFACT_D_W < 'a > { w : & 'a mut W , } impl < 'a > CALFACT_D_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x7f << 16 ) ) | ( ( ( value as u32 ) & 0x7f ) << 16 ) ; self . w } } # [ doc = "Reader of field `CALFACT_S`" ]
pub type CALFACT_S_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CALFACT_S`" ]
pub struct CALFACT_S_W < 'a > { w : & 'a mut W , } impl < 'a > CALFACT_S_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x7f ) | ( ( value as u32 ) & 0x7f ) ; self . w } } impl R { # [ doc = "Bits 16:22 - CALFACT_D" ]
# [ inline ( always ) ]
pub fn calfact_d ( & self ) -> CALFACT_D_R { CALFACT_D_R :: new ( ( ( self . bits >> 16 ) & 0x7f ) as u8 ) } # [ doc = "Bits 0:6 - CALFACT_S" ]
# [ inline ( always ) ]
pub fn calfact_s ( & self ) -> CALFACT_S_R { CALFACT_S_R :: new ( ( self . bits & 0x7f ) as u8 ) } } impl W { # [ doc = "Bits 16:22 - CALFACT_D" ]
# [ inline ( always ) ]
pub fn calfact_d ( & mut self ) -> CALFACT_D_W { CALFACT_D_W { w : self } } # [ doc = "Bits 0:6 - CALFACT_S" ]
# [ inline ( always ) ]
pub fn calfact_s ( & mut self ) -> CALFACT_S_W { CALFACT_S_W { w : self } } } } } # [ doc = "Analog-to-Digital Converter" ]
pub struct ADC2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for ADC2 { } impl ADC2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const adc1 :: RegisterBlock { 0x5000_0100 as * const _ } } impl Deref for ADC2 { type Target = adc1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * ADC2 :: ptr ( ) } } } # [ doc = "Analog-to-Digital Converter" ]
pub struct ADC3 { _marker : PhantomData < * const ( ) > } unsafe impl Send for ADC3 { } impl ADC3 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const adc1 :: RegisterBlock { 0x5000_0400 as * const _ } } impl Deref for ADC3 { type Target = adc1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * ADC3 :: ptr ( ) } } } # [ doc = "Analog-to-Digital Converter" ]
pub struct ADC4 { _marker : PhantomData < * const ( ) > } unsafe impl Send for ADC4 { } impl ADC4 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const adc1 :: RegisterBlock { 0x5000_0500 as * const _ } } impl Deref for ADC4 { type Target = adc1 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * ADC4 :: ptr ( ) } } } # [ doc = "Analog-to-Digital Converter" ]
pub struct ADC1_2 { _marker : PhantomData < * const ( ) > } unsafe impl Send for ADC1_2 { } impl ADC1_2 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const adc1_2 :: RegisterBlock { 0x5000_0300 as * const _ } } impl Deref for ADC1_2 { type Target = adc1_2 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * ADC1_2 :: ptr ( ) } } } # [ doc = "Analog-to-Digital Converter" ]
pub mod adc1_2 { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - ADC Common status register" ]
pub csr : CSR , _reserved1 : [ u8 ; 4usize ]
, # [ doc = "0x08 - ADC common control register" ]
pub ccr : CCR , # [ doc = "0x0c - ADC common regular data register for dual and triple modes" ]
pub cdr : CDR , } # [ doc = "ADC Common status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csr](csr) module" ]
pub type CSR = crate :: Reg < u32 , _CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CSR ; # [ doc = "`read()` method returns [csr::R](csr::R) reader structure" ]
impl crate :: Readable for CSR { } # [ doc = "ADC Common status register" ]
pub mod csr { # [ doc = "Reader of register CSR" ]
pub type R = crate :: R < u32 , super :: CSR > ; # [ doc = "Reader of field `ADDRDY_MST`" ]
pub type ADDRDY_MST_R = crate :: R < bool , bool > ; # [ doc = "EOSMP_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOSMP_MST_A { # [ doc = "0: End of sampling phase no yet reached" ]
NOTENDED = 0 , # [ doc = "1: End of sampling phase reached" ]
ENDED = 1 } impl From < EOSMP_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOSMP_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOSMP_MST`" ]
pub type EOSMP_MST_R = crate :: R < bool , EOSMP_MST_A > ; impl EOSMP_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOSMP_MST_A { match self . bits { false => EOSMP_MST_A :: NOTENDED , true => EOSMP_MST_A :: ENDED } } # [ doc = "Checks if the value of the field is `NOTENDED`" ]
# [ inline ( always ) ]
pub fn is_not_ended ( & self ) -> bool { * self == EOSMP_MST_A :: NOTENDED } # [ doc = "Checks if the value of the field is `ENDED`" ]
# [ inline ( always ) ]
pub fn is_ended ( & self ) -> bool { * self == EOSMP_MST_A :: ENDED } } # [ doc = "EOC_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOC_MST_A { # [ doc = "0: Regular conversion is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Regular conversion complete" ]
COMPLETE = 1 } impl From < EOC_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOC_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOC_MST`" ]
pub type EOC_MST_R = crate :: R < bool , EOC_MST_A > ; impl EOC_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOC_MST_A { match self . bits { false => EOC_MST_A :: NOTCOMPLETE , true => EOC_MST_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == EOC_MST_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == EOC_MST_A :: COMPLETE } } # [ doc = "EOS_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum EOS_MST_A { # [ doc = "0: Regular sequence is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Regular sequence complete" ]
COMPLETE = 1 } impl From < EOS_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : EOS_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `EOS_MST`" ]
pub type EOS_MST_R = crate :: R < bool , EOS_MST_A > ; impl EOS_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> EOS_MST_A { match self . bits { false => EOS_MST_A :: NOTCOMPLETE , true => EOS_MST_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == EOS_MST_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == EOS_MST_A :: COMPLETE } } # [ doc = "OVR_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OVR_MST_A { # [ doc = "0: No overrun occurred" ]
NOOVERRUN = 0 , # [ doc = "1: Overrun occurred" ]
OVERRUN = 1 } impl From < OVR_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : OVR_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OVR_MST`" ]
pub type OVR_MST_R = crate :: R < bool , OVR_MST_A > ; impl OVR_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OVR_MST_A { match self . bits { false => OVR_MST_A :: NOOVERRUN , true => OVR_MST_A :: OVERRUN } } # [ doc = "Checks if the value of the field is `NOOVERRUN`" ]
# [ inline ( always ) ]
pub fn is_no_overrun ( & self ) -> bool { * self == OVR_MST_A :: NOOVERRUN } # [ doc = "Checks if the value of the field is `OVERRUN`" ]
# [ inline ( always ) ]
pub fn is_overrun ( & self ) -> bool { * self == OVR_MST_A :: OVERRUN } } # [ doc = "JEOC_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOC_MST_A { # [ doc = "0: Injected conversion is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Injected conversion complete" ]
COMPLETE = 1 } impl From < JEOC_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : JEOC_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JEOC_MST`" ]
pub type JEOC_MST_R = crate :: R < bool , JEOC_MST_A > ; impl JEOC_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JEOC_MST_A { match self . bits { false => JEOC_MST_A :: NOTCOMPLETE , true => JEOC_MST_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == JEOC_MST_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == JEOC_MST_A :: COMPLETE } } # [ doc = "JEOS_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JEOS_MST_A { # [ doc = "0: Injected sequence is not complete" ]
NOTCOMPLETE = 0 , # [ doc = "1: Injected sequence complete" ]
COMPLETE = 1 } impl From < JEOS_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : JEOS_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JEOS_MST`" ]
pub type JEOS_MST_R = crate :: R < bool , JEOS_MST_A > ; impl JEOS_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JEOS_MST_A { match self . bits { false => JEOS_MST_A :: NOTCOMPLETE , true => JEOS_MST_A :: COMPLETE } } # [ doc = "Checks if the value of the field is `NOTCOMPLETE`" ]
# [ inline ( always ) ]
pub fn is_not_complete ( & self ) -> bool { * self == JEOS_MST_A :: NOTCOMPLETE } # [ doc = "Checks if the value of the field is `COMPLETE`" ]
# [ inline ( always ) ]
pub fn is_complete ( & self ) -> bool { * self == JEOS_MST_A :: COMPLETE } } # [ doc = "AWD1_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum AWD1_MST_A { # [ doc = "0: No analog watchdog event occurred" ]
NOEVENT = 0 , # [ doc = "1: Analog watchdog event occurred" ]
EVENT = 1 } impl From < AWD1_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : AWD1_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `AWD1_MST`" ]
pub type AWD1_MST_R = crate :: R < bool , AWD1_MST_A > ; impl AWD1_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AWD1_MST_A { match self . bits { false => AWD1_MST_A :: NOEVENT , true => AWD1_MST_A :: EVENT } } # [ doc = "Checks if the value of the field is `NOEVENT`" ]
# [ inline ( always ) ]
pub fn is_no_event ( & self ) -> bool { * self == AWD1_MST_A :: NOEVENT } # [ doc = "Checks if the value of the field is `EVENT`" ]
# [ inline ( always ) ]
pub fn is_event ( & self ) -> bool { * self == AWD1_MST_A :: EVENT } } # [ doc = "AWD2_MST" ]
pub type AWD2_MST_A = AWD1_MST_A ; # [ doc = "Reader of field `AWD2_MST`" ]
pub type AWD2_MST_R = crate :: R < bool , AWD1_MST_A > ; # [ doc = "AWD3_MST" ]
pub type AWD3_MST_A = AWD1_MST_A ; # [ doc = "Reader of field `AWD3_MST`" ]
pub type AWD3_MST_R = crate :: R < bool , AWD1_MST_A > ; # [ doc = "JQOVF_MST\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum JQOVF_MST_A { # [ doc = "0: No injected context queue overflow has occurred" ]
NOOVERFLOW = 0 , # [ doc = "1: Injected context queue overflow has occurred" ]
OVERFLOW = 1 } impl From < JQOVF_MST_A > for bool { # [ inline ( always ) ]
fn from ( variant : JQOVF_MST_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `JQOVF_MST`" ]
pub type JQOVF_MST_R = crate :: R < bool , JQOVF_MST_A > ; impl JQOVF_MST_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> JQOVF_MST_A { match self . bits { false => JQOVF_MST_A :: NOOVERFLOW , true => JQOVF_MST_A :: OVERFLOW } } # [ doc = "Checks if the value of the field is `NOOVERFLOW`" ]
# [ inline ( always ) ]
pub fn is_no_overflow ( & self ) -> bool { * self == JQOVF_MST_A :: NOOVERFLOW } # [ doc = "Checks if the value of the field is `OVERFLOW`" ]
# [ inline ( always ) ]
pub fn is_overflow ( & self ) -> bool { * self == JQOVF_MST_A :: OVERFLOW } } # [ doc = "ADRDY_SLV\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ADRDY_SLV_A { # [ doc = "0: ADC is not ready to start conversion" ]
NOTREADY = 0 , # [ doc = "1: ADC is ready to start conversion" ]
READY = 1 } impl From < ADRDY_SLV_A > for bool { # [ inline ( always ) ]
fn from ( variant : ADRDY_SLV_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ADRDY_SLV`" ]
pub type ADRDY_SLV_R = crate :: R < bool , ADRDY_SLV_A > ; impl ADRDY_SLV_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ADRDY_SLV_A { match self . bits { false => ADRDY_SLV_A :: NOTREADY , true => ADRDY_SLV_A :: READY } } # [ doc = "Checks if the value of the field is `NOTREADY`" ]
# [ inline ( always ) ]
pub fn is_not_ready ( & self ) -> bool { * self == ADRDY_SLV_A :: NOTREADY } # [ doc = "Checks if the value of the field is `READY`" ]
# [ inline ( always ) ]
pub fn is_ready ( & self ) -> bool { * self == ADRDY_SLV_A :: READY } } # [ doc = "EOSMP_SLV" ]
pub type EOSMP_SLV_A = EOSMP_MST_A ; # [ doc = "Reader of field `EOSMP_SLV`" ]
pub type EOSMP_SLV_R = crate :: R < bool , EOSMP_MST_A > ; # [ doc = "End of regular conversion of the slave ADC" ]
pub type EOC_SLV_A = EOC_MST_A ; # [ doc = "Reader of field `EOC_SLV`" ]
pub type EOC_SLV_R = crate :: R < bool , EOC_MST_A > ; # [ doc = "End of regular sequence flag of the slave ADC" ]
pub type EOS_SLV_A = EOS_MST_A ; # [ doc = "Reader of field `EOS_SLV`" ]
pub type EOS_SLV_R = crate :: R < bool , EOS_MST_A > ; # [ doc = "Overrun flag of the slave ADC" ]
pub type OVR_SLV_A = OVR_MST_A ; # [ doc = "Reader of field `OVR_SLV`" ]
pub type OVR_SLV_R = crate :: R < bool , OVR_MST_A > ; # [ doc = "End of injected conversion flag of the slave ADC" ]
pub type JEOC_SLV_A = JEOC_MST_A ; # [ doc = "Reader of field `JEOC_SLV`" ]
pub type JEOC_SLV_R = crate :: R < bool , JEOC_MST_A > ; # [ doc = "End of injected sequence flag of the slave ADC" ]
pub type JEOS_SLV_A = JEOS_MST_A ; # [ doc = "Reader of field `JEOS_SLV`" ]
pub type JEOS_SLV_R = crate :: R < bool , JEOS_MST_A > ; # [ doc = "Analog watchdog 1 flag of the slave ADC" ]
pub type AWD1_SLV_A = AWD1_MST_A ; # [ doc = "Reader of field `AWD1_SLV`" ]
pub type AWD1_SLV_R = crate :: R < bool , AWD1_MST_A > ; # [ doc = "Analog watchdog 2 flag of the slave ADC" ]
pub type AWD2_SLV_A = AWD1_MST_A ; # [ doc = "Reader of field `AWD2_SLV`" ]
pub type AWD2_SLV_R = crate :: R < bool , AWD1_MST_A > ; # [ doc = "Analog watchdog 3 flag of the slave ADC" ]
pub type AWD3_SLV_A = AWD1_MST_A ; # [ doc = "Reader of field `AWD3_SLV`" ]
pub type AWD3_SLV_R = crate :: R < bool , AWD1_MST_A > ; # [ doc = "Injected Context Queue Overflow flag of the slave ADC" ]
pub type JQOVF_SLV_A = JQOVF_MST_A ; # [ doc = "Reader of field `JQOVF_SLV`" ]
pub type JQOVF_SLV_R = crate :: R < bool , JQOVF_MST_A > ; impl R { # [ doc = "Bit 0 - ADDRDY_MST" ]
# [ inline ( always ) ]
pub fn addrdy_mst ( & self ) -> ADDRDY_MST_R { ADDRDY_MST_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - EOSMP_MST" ]
# [ inline ( always ) ]
pub fn eosmp_mst ( & self ) -> EOSMP_MST_R { EOSMP_MST_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - EOC_MST" ]
# [ inline ( always ) ]
pub fn eoc_mst ( & self ) -> EOC_MST_R { EOC_MST_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - EOS_MST" ]
# [ inline ( always ) ]
pub fn eos_mst ( & self ) -> EOS_MST_R { EOS_MST_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - OVR_MST" ]
# [ inline ( always ) ]
pub fn ovr_mst ( & self ) -> OVR_MST_R { OVR_MST_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - JEOC_MST" ]
# [ inline ( always ) ]
pub fn jeoc_mst ( & self ) -> JEOC_MST_R { JEOC_MST_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - JEOS_MST" ]
# [ inline ( always ) ]
pub fn jeos_mst ( & self ) -> JEOS_MST_R { JEOS_MST_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - AWD1_MST" ]
# [ inline ( always ) ]
pub fn awd1_mst ( & self ) -> AWD1_MST_R { AWD1_MST_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - AWD2_MST" ]
# [ inline ( always ) ]
pub fn awd2_mst ( & self ) -> AWD2_MST_R { AWD2_MST_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - AWD3_MST" ]
# [ inline ( always ) ]
pub fn awd3_mst ( & self ) -> AWD3_MST_R { AWD3_MST_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - JQOVF_MST" ]
# [ inline ( always ) ]
pub fn jqovf_mst ( & self ) -> JQOVF_MST_R { JQOVF_MST_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 16 - ADRDY_SLV" ]
# [ inline ( always ) ]
pub fn adrdy_slv ( & self ) -> ADRDY_SLV_R { ADRDY_SLV_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 17 - EOSMP_SLV" ]
# [ inline ( always ) ]
pub fn eosmp_slv ( & self ) -> EOSMP_SLV_R { EOSMP_SLV_R :: new ( ( ( self . bits >> 17 ) & 0x01 ) != 0 ) } # [ doc = "Bit 18 - End of regular conversion of the slave ADC" ]
# [ inline ( always ) ]
pub fn eoc_slv ( & self ) -> EOC_SLV_R { EOC_SLV_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bit 19 - End of regular sequence flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn eos_slv ( & self ) -> EOS_SLV_R { EOS_SLV_R :: new ( ( ( self . bits >> 19 ) & 0x01 ) != 0 ) } # [ doc = "Bit 20 - Overrun flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn ovr_slv ( & self ) -> OVR_SLV_R { OVR_SLV_R :: new ( ( ( self . bits >> 20 ) & 0x01 ) != 0 ) } # [ doc = "Bit 21 - End of injected conversion flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn jeoc_slv ( & self ) -> JEOC_SLV_R { JEOC_SLV_R :: new ( ( ( self . bits >> 21 ) & 0x01 ) != 0 ) } # [ doc = "Bit 22 - End of injected sequence flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn jeos_slv ( & self ) -> JEOS_SLV_R { JEOS_SLV_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Analog watchdog 1 flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn awd1_slv ( & self ) -> AWD1_SLV_R { AWD1_SLV_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - Analog watchdog 2 flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn awd2_slv ( & self ) -> AWD2_SLV_R { AWD2_SLV_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } # [ doc = "Bit 25 - Analog watchdog 3 flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn awd3_slv ( & self ) -> AWD3_SLV_R { AWD3_SLV_R :: new ( ( ( self . bits >> 25 ) & 0x01 ) != 0 ) } # [ doc = "Bit 26 - Injected Context Queue Overflow flag of the slave ADC" ]
# [ inline ( always ) ]
pub fn jqovf_slv ( & self ) -> JQOVF_SLV_R { JQOVF_SLV_R :: new ( ( ( self . bits >> 26 ) & 0x01 ) != 0 ) } } } # [ doc = "ADC common control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module" ]
pub type CCR = crate :: Reg < u32 , _CCR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CCR ; # [ doc = "`read()` method returns [ccr::R](ccr::R) reader structure" ]
impl crate :: Readable for CCR { } # [ doc = "`write(|w| ..)` method takes [ccr::W](ccr::W) writer structure" ]
impl crate :: Writable for CCR { } # [ doc = "ADC common control register" ]
pub mod ccr { # [ doc = "Reader of register CCR" ]
pub type R = crate :: R < u32 , super :: CCR > ; # [ doc = "Writer for register CCR" ]
pub type W = crate :: W < u32 , super :: CCR > ; # [ doc = "Register CCR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: CCR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Dual ADC mode selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum DUAL_A { # [ doc = "0: Independent mode" ]
INDEPENDENT = 0 , # [ doc = "1: Dual, combined regular simultaneous + injected simultaneous mode" ]
DUALRJ = 1 , # [ doc = "2: Dual, combined regular simultaneous + alternate trigger mode" ]
DUALRA = 2 , # [ doc = "3: Dual, combined interleaved mode + injected simultaneous mode" ]
DUALIJ = 3 , # [ doc = "5: Dual, injected simultaneous mode only" ]
DUALJ = 5 , # [ doc = "6: Dual, regular simultaneous mode only" ]
DUALR = 6 , # [ doc = "7: Dual, interleaved mode only" ]
DUALI = 7 , # [ doc = "9: Dual, alternate trigger mode only" ]
DUALA = 9 } impl From < DUAL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : DUAL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `DUAL`" ]
pub type DUAL_R = crate :: R < u8 , DUAL_A > ; impl DUAL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , DUAL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( DUAL_A :: INDEPENDENT ) , 1 => Val ( DUAL_A :: DUALRJ ) , 2 => Val ( DUAL_A :: DUALRA ) , 3 => Val ( DUAL_A :: DUALIJ ) , 5 => Val ( DUAL_A :: DUALJ ) , 6 => Val ( DUAL_A :: DUALR ) , 7 => Val ( DUAL_A :: DUALI ) , 9 => Val ( DUAL_A :: DUALA ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `INDEPENDENT`" ]
# [ inline ( always ) ]
pub fn is_independent ( & self ) -> bool { * self == DUAL_A :: INDEPENDENT } # [ doc = "Checks if the value of the field is `DUALRJ`" ]
# [ inline ( always ) ]
pub fn is_dual_rj ( & self ) -> bool { * self == DUAL_A :: DUALRJ } # [ doc = "Checks if the value of the field is `DUALRA`" ]
# [ inline ( always ) ]
pub fn is_dual_ra ( & self ) -> bool { * self == DUAL_A :: DUALRA } # [ doc = "Checks if the value of the field is `DUALIJ`" ]
# [ inline ( always ) ]
pub fn is_dual_ij ( & self ) -> bool { * self == DUAL_A :: DUALIJ } # [ doc = "Checks if the value of the field is `DUALJ`" ]
# [ inline ( always ) ]
pub fn is_dual_j ( & self ) -> bool { * self == DUAL_A :: DUALJ } # [ doc = "Checks if the value of the field is `DUALR`" ]
# [ inline ( always ) ]
pub fn is_dual_r ( & self ) -> bool { * self == DUAL_A :: DUALR } # [ doc = "Checks if the value of the field is `DUALI`" ]
# [ inline ( always ) ]
pub fn is_dual_i ( & self ) -> bool { * self == DUAL_A :: DUALI } # [ doc = "Checks if the value of the field is `DUALA`" ]
# [ inline ( always ) ]
pub fn is_dual_a ( & self ) -> bool { * self == DUAL_A :: DUALA } } # [ doc = "Write proxy for field `DUAL`" ]
pub struct DUAL_W < 'a > { w : & 'a mut W , } impl < 'a > DUAL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DUAL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Independent mode" ]
# [ inline ( always ) ]
pub fn independent ( self ) -> & 'a mut W { self . variant ( DUAL_A :: INDEPENDENT ) } # [ doc = "Dual, combined regular simultaneous + injected simultaneous mode" ]
# [ inline ( always ) ]
pub fn dual_rj ( self ) -> & 'a mut W { self . variant ( DUAL_A :: DUALRJ ) } # [ doc = "Dual, combined regular simultaneous + alternate trigger mode" ]
# [ inline ( always ) ]
pub fn dual_ra ( self ) -> & 'a mut W { self . variant ( DUAL_A :: DUALRA ) } # [ doc = "Dual, combined interleaved mode + injected simultaneous mode" ]
# [ inline ( always ) ]
pub fn dual_ij ( self ) -> & 'a mut W { self . variant ( DUAL_A :: DUALIJ ) } # [ doc = "Dual, injected simultaneous mode only" ]
# [ inline ( always ) ]
pub fn dual_j ( self ) -> & 'a mut W { self . variant ( DUAL_A :: DUALJ ) } # [ doc = "Dual, regular simultaneous mode only" ]
# [ inline ( always ) ]
pub fn dual_r ( self ) -> & 'a mut W { self . variant ( DUAL_A :: DUALR ) } # [ doc = "Dual, interleaved mode only" ]
# [ inline ( always ) ]
pub fn dual_i ( self ) -> & 'a mut W { self . variant ( DUAL_A :: DUALI ) } # [ doc = "Dual, alternate trigger mode only" ]
# [ inline ( always ) ]
pub fn dual_a ( self ) -> & 'a mut W { self . variant ( DUAL_A :: DUALA ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x1f ) | ( ( value as u32 ) & 0x1f ) ; self . w } } # [ doc = "Reader of field `DELAY`" ]
pub type DELAY_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `DELAY`" ]
pub struct DELAY_W < 'a > { w : & 'a mut W , } impl < 'a > DELAY_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "DMA configuration (for multi-ADC mode)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum DMACFG_A { # [ doc = "0: DMA one shot mode selected" ]
ONESHOT = 0 , # [ doc = "1: DMA circular mode selected" ]
CIRCULATOR = 1 } impl From < DMACFG_A > for bool { # [ inline ( always ) ]
fn from ( variant : DMACFG_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `DMACFG`" ]
pub type DMACFG_R = crate :: R < bool , DMACFG_A > ; impl DMACFG_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> DMACFG_A { match self . bits { false => DMACFG_A :: ONESHOT , true => DMACFG_A :: CIRCULATOR } } # [ doc = "Checks if the value of the field is `ONESHOT`" ]
# [ inline ( always ) ]
pub fn is_one_shot ( & self ) -> bool { * self == DMACFG_A :: ONESHOT } # [ doc = "Checks if the value of the field is `CIRCULATOR`" ]
# [ inline ( always ) ]
pub fn is_circulator ( & self ) -> bool { * self == DMACFG_A :: CIRCULATOR } } # [ doc = "Write proxy for field `DMACFG`" ]
pub struct DMACFG_W < 'a > { w : & 'a mut W , } impl < 'a > DMACFG_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : DMACFG_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "DMA one shot mode selected" ]
# [ inline ( always ) ]
pub fn one_shot ( self ) -> & 'a mut W { self . variant ( DMACFG_A :: ONESHOT ) } # [ doc = "DMA circular mode selected" ]
# [ inline ( always ) ]
pub fn circulator ( self ) -> & 'a mut W { self . variant ( DMACFG_A :: CIRCULATOR ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Direct memory access mode for multi ADC mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MDMA_A { # [ doc = "0: MDMA mode disabled" ]
DISABLED = 0 , # [ doc = "2: MDMA mode enabled for 12 and 10-bit resolution" ]
BITS12_10 = 2 , # [ doc = "3: MDMA mode enabled for 8 and 6-bit resolution" ]
BITS8_6 = 3 } impl From < MDMA_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MDMA_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MDMA`" ]
pub type MDMA_R = crate :: R < u8 , MDMA_A > ; impl MDMA_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , MDMA_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( MDMA_A :: DISABLED ) , 2 => Val ( MDMA_A :: BITS12_10 ) , 3 => Val ( MDMA_A :: BITS8_6 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == MDMA_A :: DISABLED } # [ doc = "Checks if the value of the field is `BITS12_10`" ]
# [ inline ( always ) ]
pub fn is_bits12_10 ( & self ) -> bool { * self == MDMA_A :: BITS12_10 } # [ doc = "Checks if the value of the field is `BITS8_6`" ]
# [ inline ( always ) ]
pub fn is_bits8_6 ( & self ) -> bool { * self == MDMA_A :: BITS8_6 } } # [ doc = "Write proxy for field `MDMA`" ]
pub struct MDMA_W < 'a > { w : & 'a mut W , } impl < 'a > MDMA_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MDMA_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "MDMA mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( MDMA_A :: DISABLED ) } # [ doc = "MDMA mode enabled for 12 and 10-bit resolution" ]
# [ inline ( always ) ]
pub fn bits12_10 ( self ) -> & 'a mut W { self . variant ( MDMA_A :: BITS12_10 ) } # [ doc = "MDMA mode enabled for 8 and 6-bit resolution" ]
# [ inline ( always ) ]
pub fn bits8_6 ( self ) -> & 'a mut W { self . variant ( MDMA_A :: BITS8_6 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "ADC clock mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CKMODE_A { # [ doc = "0: Use Kernel Clock adc_ker_ck_input divided by PRESC. Asynchronous to AHB clock" ]
ASYNCHRONOUS = 0 , # [ doc = "1: Use AHB clock rcc_hclk3. In this case rcc_hclk must equal sys_d1cpre_ck" ]
SYNCDIV1 = 1 , # [ doc = "2: Use AHB clock rcc_hclk3 divided by 2" ]
SYNCDIV2 = 2 , # [ doc = "3: Use AHB clock rcc_hclk3 divided by 4" ]
SYNCDIV4 = 3 } impl From < CKMODE_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CKMODE_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CKMODE`" ]
pub type CKMODE_R = crate :: R < u8 , CKMODE_A > ; impl CKMODE_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CKMODE_A { match self . bits { 0 => CKMODE_A :: ASYNCHRONOUS , 1 => CKMODE_A :: SYNCDIV1 , 2 => CKMODE_A :: SYNCDIV2 , 3 => CKMODE_A :: SYNCDIV4 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `ASYNCHRONOUS`" ]
# [ inline ( always ) ]
pub fn is_asynchronous ( & self ) -> bool { * self == CKMODE_A :: ASYNCHRONOUS } # [ doc = "Checks if the value of the field is `SYNCDIV1`" ]
# [ inline ( always ) ]
pub fn is_sync_div1 ( & self ) -> bool { * self == CKMODE_A :: SYNCDIV1 } # [ doc = "Checks if the value of the field is `SYNCDIV2`" ]
# [ inline ( always ) ]
pub fn is_sync_div2 ( & self ) -> bool { * self == CKMODE_A :: SYNCDIV2 } # [ doc = "Checks if the value of the field is `SYNCDIV4`" ]
# [ inline ( always ) ]
pub fn is_sync_div4 ( & self ) -> bool { * self == CKMODE_A :: SYNCDIV4 } } # [ doc = "Write proxy for field `CKMODE`" ]
pub struct CKMODE_W < 'a > { w : & 'a mut W , } impl < 'a > CKMODE_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CKMODE_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Use Kernel Clock adc_ker_ck_input divided by PRESC. Asynchronous to AHB clock" ]
# [ inline ( always ) ]
pub fn asynchronous ( self ) -> & 'a mut W { self . variant ( CKMODE_A :: ASYNCHRONOUS ) } # [ doc = "Use AHB clock rcc_hclk3. In this case rcc_hclk must equal sys_d1cpre_ck" ]
# [ inline ( always ) ]
pub fn sync_div1 ( self ) -> & 'a mut W { self . variant ( CKMODE_A :: SYNCDIV1 ) } # [ doc = "Use AHB clock rcc_hclk3 divided by 2" ]
# [ inline ( always ) ]
pub fn sync_div2 ( self ) -> & 'a mut W { self . variant ( CKMODE_A :: SYNCDIV2 ) } # [ doc = "Use AHB clock rcc_hclk3 divided by 4" ]
# [ inline ( always ) ]
pub fn sync_div4 ( self ) -> & 'a mut W { self . variant ( CKMODE_A :: SYNCDIV4 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "VREFINT enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum VREFEN_A { # [ doc = "0: V_REFINT channel disabled" ]
DISABLED = 0 , # [ doc = "1: V_REFINT channel enabled" ]
ENABLED = 1 } impl From < VREFEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : VREFEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `VREFEN`" ]
pub type VREFEN_R = crate :: R < bool , VREFEN_A > ; impl VREFEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> VREFEN_A { match self . bits { false => VREFEN_A :: DISABLED , true => VREFEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == VREFEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == VREFEN_A :: ENABLED } } # [ doc = "Write proxy for field `VREFEN`" ]
pub struct VREFEN_W < 'a > { w : & 'a mut W , } impl < 'a > VREFEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : VREFEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "V_REFINT channel disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( VREFEN_A :: DISABLED ) } # [ doc = "V_REFINT channel enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( VREFEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Temperature sensor enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSEN_A { # [ doc = "0: Temperature sensor channel disabled" ]
DISABLED = 0 , # [ doc = "1: Temperature sensor channel enabled" ]
ENABLED = 1 } impl From < TSEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : TSEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TSEN`" ]
pub type TSEN_R = crate :: R < bool , TSEN_A > ; impl TSEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TSEN_A { match self . bits { false => TSEN_A :: DISABLED , true => TSEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TSEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TSEN_A :: ENABLED } } # [ doc = "Write proxy for field `TSEN`" ]
pub struct TSEN_W < 'a > { w : & 'a mut W , } impl < 'a > TSEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Temperature sensor channel disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TSEN_A :: DISABLED ) } # [ doc = "Temperature sensor channel enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TSEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "VBAT enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum VBATEN_A { # [ doc = "0: V_BAT channel disabled" ]
DISABLED = 0 , # [ doc = "1: V_BAT channel enabled" ]
ENABLED = 1 } impl From < VBATEN_A > for bool { # [ inline ( always ) ]
fn from ( variant : VBATEN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `VBATEN`" ]
pub type VBATEN_R = crate :: R < bool , VBATEN_A > ; impl VBATEN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> VBATEN_A { match self . bits { false => VBATEN_A :: DISABLED , true => VBATEN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == VBATEN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == VBATEN_A :: ENABLED } } # [ doc = "Write proxy for field `VBATEN`" ]
pub struct VBATEN_W < 'a > { w : & 'a mut W , } impl < 'a > VBATEN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : VBATEN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "V_BAT channel disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( VBATEN_A :: DISABLED ) } # [ doc = "V_BAT channel enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( VBATEN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } impl R { # [ doc = "Bits 0:4 - Dual ADC mode selection" ]
# [ inline ( always ) ]
pub fn dual ( & self ) -> DUAL_R { DUAL_R :: new ( ( self . bits & 0x1f ) as u8 ) } # [ doc = "Bits 8:11 - Delay between 2 sampling phases" ]
# [ inline ( always ) ]
pub fn delay ( & self ) -> DELAY_R { DELAY_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bit 13 - DMA configuration (for multi-ADC mode)" ]
# [ inline ( always ) ]
pub fn dmacfg ( & self ) -> DMACFG_R { DMACFG_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bits 14:15 - Direct memory access mode for multi ADC mode" ]
# [ inline ( always ) ]
pub fn mdma ( & self ) -> MDMA_R { MDMA_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - ADC clock mode" ]
# [ inline ( always ) ]
pub fn ckmode ( & self ) -> CKMODE_R { CKMODE_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bit 22 - VREFINT enable" ]
# [ inline ( always ) ]
pub fn vrefen ( & self ) -> VREFEN_R { VREFEN_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } # [ doc = "Bit 23 - Temperature sensor enable" ]
# [ inline ( always ) ]
pub fn tsen ( & self ) -> TSEN_R { TSEN_R :: new ( ( ( self . bits >> 23 ) & 0x01 ) != 0 ) } # [ doc = "Bit 24 - VBAT enable" ]
# [ inline ( always ) ]
pub fn vbaten ( & self ) -> VBATEN_R { VBATEN_R :: new ( ( ( self . bits >> 24 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bits 0:4 - Dual ADC mode selection" ]
# [ inline ( always ) ]
pub fn dual ( & mut self ) -> DUAL_W { DUAL_W { w : self } } # [ doc = "Bits 8:11 - Delay between 2 sampling phases" ]
# [ inline ( always ) ]
pub fn delay ( & mut self ) -> DELAY_W { DELAY_W { w : self } } # [ doc = "Bit 13 - DMA configuration (for multi-ADC mode)" ]
# [ inline ( always ) ]
pub fn dmacfg ( & mut self ) -> DMACFG_W { DMACFG_W { w : self } } # [ doc = "Bits 14:15 - Direct memory access mode for multi ADC mode" ]
# [ inline ( always ) ]
pub fn mdma ( & mut self ) -> MDMA_W { MDMA_W { w : self } } # [ doc = "Bits 16:17 - ADC clock mode" ]
# [ inline ( always ) ]
pub fn ckmode ( & mut self ) -> CKMODE_W { CKMODE_W { w : self } } # [ doc = "Bit 22 - VREFINT enable" ]
# [ inline ( always ) ]
pub fn vrefen ( & mut self ) -> VREFEN_W { VREFEN_W { w : self } } # [ doc = "Bit 23 - Temperature sensor enable" ]
# [ inline ( always ) ]
pub fn tsen ( & mut self ) -> TSEN_W { TSEN_W { w : self } } # [ doc = "Bit 24 - VBAT enable" ]
# [ inline ( always ) ]
pub fn vbaten ( & mut self ) -> VBATEN_W { VBATEN_W { w : self } } } } # [ doc = "ADC common regular data register for dual and triple modes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cdr](cdr) module" ]
pub type CDR = crate :: Reg < u32 , _CDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _CDR ; # [ doc = "`read()` method returns [cdr::R](cdr::R) reader structure" ]
impl crate :: Readable for CDR { } # [ doc = "ADC common regular data register for dual and triple modes" ]
pub mod cdr { # [ doc = "Reader of register CDR" ]
pub type R = crate :: R < u32 , super :: CDR > ; # [ doc = "Reader of field `RDATA_SLV`" ]
pub type RDATA_SLV_R = crate :: R < u16 , u16 > ; # [ doc = "Reader of field `RDATA_MST`" ]
pub type RDATA_MST_R = crate :: R < u16 , u16 > ; impl R { # [ doc = "Bits 16:31 - Regular data of the slave ADC" ]
# [ inline ( always ) ]
pub fn rdata_slv ( & self ) -> RDATA_SLV_R { RDATA_SLV_R :: new ( ( ( self . bits >> 16 ) & 0xffff ) as u16 ) } # [ doc = "Bits 0:15 - Regular data of the master ADC" ]
# [ inline ( always ) ]
pub fn rdata_mst ( & self ) -> RDATA_MST_R { RDATA_MST_R :: new ( ( self . bits & 0xffff ) as u16 ) } } } } # [ doc = "Analog-to-Digital Converter" ]
pub struct ADC3_4 { _marker : PhantomData < * const ( ) > } unsafe impl Send for ADC3_4 { } impl ADC3_4 { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const adc1_2 :: RegisterBlock { 0x5000_0700 as * const _ } } impl Deref for ADC3_4 { type Target = adc1_2 :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * ADC3_4 :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub struct GPIOC { _marker : PhantomData < * const ( ) > } unsafe impl Send for GPIOC { } impl GPIOC { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const gpioc :: RegisterBlock { 0x4800_0800 as * const _ } } impl Deref for GPIOC { type Target = gpioc :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * GPIOC :: ptr ( ) } } } # [ doc = "General-purpose I/Os" ]
pub mod gpioc { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { # [ doc = "0x00 - GPIO port mode register" ]
pub moder : MODER , # [ doc = "0x04 - GPIO port output type register" ]
pub otyper : OTYPER , # [ doc = "0x08 - GPIO port output speed register" ]
pub ospeedr : OSPEEDR , # [ doc = "0x0c - GPIO port pull-up/pull-down register" ]
pub pupdr : PUPDR , # [ doc = "0x10 - GPIO port input data register" ]
pub idr : IDR , # [ doc = "0x14 - GPIO port output data register" ]
pub odr : ODR , # [ doc = "0x18 - GPIO port bit set/reset register" ]
pub bsrr : BSRR , # [ doc = "0x1c - GPIO port configuration lock register" ]
pub lckr : LCKR , # [ doc = "0x20 - GPIO alternate function low register" ]
pub afrl : AFRL , # [ doc = "0x24 - GPIO alternate function high register" ]
pub afrh : AFRH , # [ doc = "0x28 - Port bit reset register" ]
pub brr : BRR , } # [ doc = "GPIO port mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [moder](moder) module" ]
pub type MODER = crate :: Reg < u32 , _MODER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _MODER ; # [ doc = "`read()` method returns [moder::R](moder::R) reader structure" ]
impl crate :: Readable for MODER { } # [ doc = "`write(|w| ..)` method takes [moder::W](moder::W) writer structure" ]
impl crate :: Writable for MODER { } # [ doc = "GPIO port mode register" ]
pub mod moder { # [ doc = "Reader of register MODER" ]
pub type R = crate :: R < u32 , super :: MODER > ; # [ doc = "Writer for register MODER" ]
pub type W = crate :: W < u32 , super :: MODER > ; # [ doc = "Register MODER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: MODER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum MODER15_A { # [ doc = "0: Input mode (reset state)" ]
INPUT = 0 , # [ doc = "1: General purpose output mode" ]
OUTPUT = 1 , # [ doc = "2: Alternate function mode" ]
ALTERNATE = 2 , # [ doc = "3: Analog mode" ]
ANALOG = 3 } impl From < MODER15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : MODER15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `MODER15`" ]
pub type MODER15_R = crate :: R < u8 , MODER15_A > ; impl MODER15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> MODER15_A { match self . bits { 0 => MODER15_A :: INPUT , 1 => MODER15_A :: OUTPUT , 2 => MODER15_A :: ALTERNATE , 3 => MODER15_A :: ANALOG , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `INPUT`" ]
# [ inline ( always ) ]
pub fn is_input ( & self ) -> bool { * self == MODER15_A :: INPUT } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == MODER15_A :: OUTPUT } # [ doc = "Checks if the value of the field is `ALTERNATE`" ]
# [ inline ( always ) ]
pub fn is_alternate ( & self ) -> bool { * self == MODER15_A :: ALTERNATE } # [ doc = "Checks if the value of the field is `ANALOG`" ]
# [ inline ( always ) ]
pub fn is_analog ( & self ) -> bool { * self == MODER15_A :: ANALOG } } # [ doc = "Write proxy for field `MODER15`" ]
pub struct MODER15_W < 'a > { w : & 'a mut W , } impl < 'a > MODER15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER14_A = MODER15_A ; # [ doc = "Reader of field `MODER14`" ]
pub type MODER14_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER14`" ]
pub struct MODER14_W < 'a > { w : & 'a mut W , } impl < 'a > MODER14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER13_A = MODER15_A ; # [ doc = "Reader of field `MODER13`" ]
pub type MODER13_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER13`" ]
pub struct MODER13_W < 'a > { w : & 'a mut W , } impl < 'a > MODER13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER12_A = MODER15_A ; # [ doc = "Reader of field `MODER12`" ]
pub type MODER12_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER12`" ]
pub struct MODER12_W < 'a > { w : & 'a mut W , } impl < 'a > MODER12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER11_A = MODER15_A ; # [ doc = "Reader of field `MODER11`" ]
pub type MODER11_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER11`" ]
pub struct MODER11_W < 'a > { w : & 'a mut W , } impl < 'a > MODER11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER10_A = MODER15_A ; # [ doc = "Reader of field `MODER10`" ]
pub type MODER10_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER10`" ]
pub struct MODER10_W < 'a > { w : & 'a mut W , } impl < 'a > MODER10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER9_A = MODER15_A ; # [ doc = "Reader of field `MODER9`" ]
pub type MODER9_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER9`" ]
pub struct MODER9_W < 'a > { w : & 'a mut W , } impl < 'a > MODER9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER8_A = MODER15_A ; # [ doc = "Reader of field `MODER8`" ]
pub type MODER8_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER8`" ]
pub struct MODER8_W < 'a > { w : & 'a mut W , } impl < 'a > MODER8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER7_A = MODER15_A ; # [ doc = "Reader of field `MODER7`" ]
pub type MODER7_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER7`" ]
pub struct MODER7_W < 'a > { w : & 'a mut W , } impl < 'a > MODER7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER6_A = MODER15_A ; # [ doc = "Reader of field `MODER6`" ]
pub type MODER6_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER6`" ]
pub struct MODER6_W < 'a > { w : & 'a mut W , } impl < 'a > MODER6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER5_A = MODER15_A ; # [ doc = "Reader of field `MODER5`" ]
pub type MODER5_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER5`" ]
pub struct MODER5_W < 'a > { w : & 'a mut W , } impl < 'a > MODER5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER4_A = MODER15_A ; # [ doc = "Reader of field `MODER4`" ]
pub type MODER4_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER4`" ]
pub struct MODER4_W < 'a > { w : & 'a mut W , } impl < 'a > MODER4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER3_A = MODER15_A ; # [ doc = "Reader of field `MODER3`" ]
pub type MODER3_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER3`" ]
pub struct MODER3_W < 'a > { w : & 'a mut W , } impl < 'a > MODER3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER2_A = MODER15_A ; # [ doc = "Reader of field `MODER2`" ]
pub type MODER2_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER2`" ]
pub struct MODER2_W < 'a > { w : & 'a mut W , } impl < 'a > MODER2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER1_A = MODER15_A ; # [ doc = "Reader of field `MODER1`" ]
pub type MODER1_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER1`" ]
pub struct MODER1_W < 'a > { w : & 'a mut W , } impl < 'a > MODER1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type MODER0_A = MODER15_A ; # [ doc = "Reader of field `MODER0`" ]
pub type MODER0_R = crate :: R < u8 , MODER15_A > ; # [ doc = "Write proxy for field `MODER0`" ]
pub struct MODER0_W < 'a > { w : & 'a mut W , } impl < 'a > MODER0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : MODER0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Input mode (reset state)" ]
# [ inline ( always ) ]
pub fn input ( self ) -> & 'a mut W { self . variant ( MODER15_A :: INPUT ) } # [ doc = "General purpose output mode" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( MODER15_A :: OUTPUT ) } # [ doc = "Alternate function mode" ]
# [ inline ( always ) ]
pub fn alternate ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ALTERNATE ) } # [ doc = "Analog mode" ]
# [ inline ( always ) ]
pub fn analog ( self ) -> & 'a mut W { self . variant ( MODER15_A :: ANALOG ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder15 ( & self ) -> MODER15_R { MODER15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder14 ( & self ) -> MODER14_R { MODER14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder13 ( & self ) -> MODER13_R { MODER13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder12 ( & self ) -> MODER12_R { MODER12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder11 ( & self ) -> MODER11_R { MODER11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder10 ( & self ) -> MODER10_R { MODER10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder9 ( & self ) -> MODER9_R { MODER9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder8 ( & self ) -> MODER8_R { MODER8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder7 ( & self ) -> MODER7_R { MODER7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder6 ( & self ) -> MODER6_R { MODER6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder5 ( & self ) -> MODER5_R { MODER5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder4 ( & self ) -> MODER4_R { MODER4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder3 ( & self ) -> MODER3_R { MODER3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder2 ( & self ) -> MODER2_R { MODER2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder1 ( & self ) -> MODER1_R { MODER1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder0 ( & self ) -> MODER0_R { MODER0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder15 ( & mut self ) -> MODER15_W { MODER15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder14 ( & mut self ) -> MODER14_W { MODER14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder13 ( & mut self ) -> MODER13_W { MODER13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder12 ( & mut self ) -> MODER12_W { MODER12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder11 ( & mut self ) -> MODER11_W { MODER11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder10 ( & mut self ) -> MODER10_W { MODER10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder9 ( & mut self ) -> MODER9_W { MODER9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder8 ( & mut self ) -> MODER8_W { MODER8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder7 ( & mut self ) -> MODER7_W { MODER7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder6 ( & mut self ) -> MODER6_W { MODER6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder5 ( & mut self ) -> MODER5_W { MODER5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder4 ( & mut self ) -> MODER4_W { MODER4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder3 ( & mut self ) -> MODER3_W { MODER3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder2 ( & mut self ) -> MODER2_W { MODER2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder1 ( & mut self ) -> MODER1_W { MODER1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn moder0 ( & mut self ) -> MODER0_W { MODER0_W { w : self } } } } # [ doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [otyper](otyper) module" ]
pub type OTYPER = crate :: Reg < u32 , _OTYPER > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OTYPER ; # [ doc = "`read()` method returns [otyper::R](otyper::R) reader structure" ]
impl crate :: Readable for OTYPER { } # [ doc = "`write(|w| ..)` method takes [otyper::W](otyper::W) writer structure" ]
impl crate :: Writable for OTYPER { } # [ doc = "GPIO port output type register" ]
pub mod otyper { # [ doc = "Reader of register OTYPER" ]
pub type R = crate :: R < u32 , super :: OTYPER > ; # [ doc = "Writer for register OTYPER" ]
pub type W = crate :: W < u32 , super :: OTYPER > ; # [ doc = "Register OTYPER `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OTYPER { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OT15_A { # [ doc = "0: Output push-pull (reset state)" ]
PUSHPULL = 0 , # [ doc = "1: Output open-drain" ]
OPENDRAIN = 1 } impl From < OT15_A > for bool { # [ inline ( always ) ]
fn from ( variant : OT15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OT15`" ]
pub type OT15_R = crate :: R < bool , OT15_A > ; impl OT15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OT15_A { match self . bits { false => OT15_A :: PUSHPULL , true => OT15_A :: OPENDRAIN } } # [ doc = "Checks if the value of the field is `PUSHPULL`" ]
# [ inline ( always ) ]
pub fn is_push_pull ( & self ) -> bool { * self == OT15_A :: PUSHPULL } # [ doc = "Checks if the value of the field is `OPENDRAIN`" ]
# [ inline ( always ) ]
pub fn is_open_drain ( & self ) -> bool { * self == OT15_A :: OPENDRAIN } } # [ doc = "Write proxy for field `OT15`" ]
pub struct OT15_W < 'a > { w : & 'a mut W , } impl < 'a > OT15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT14_A = OT15_A ; # [ doc = "Reader of field `OT14`" ]
pub type OT14_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT14`" ]
pub struct OT14_W < 'a > { w : & 'a mut W , } impl < 'a > OT14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT13_A = OT15_A ; # [ doc = "Reader of field `OT13`" ]
pub type OT13_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT13`" ]
pub struct OT13_W < 'a > { w : & 'a mut W , } impl < 'a > OT13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT12_A = OT15_A ; # [ doc = "Reader of field `OT12`" ]
pub type OT12_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT12`" ]
pub struct OT12_W < 'a > { w : & 'a mut W , } impl < 'a > OT12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT11_A = OT15_A ; # [ doc = "Reader of field `OT11`" ]
pub type OT11_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT11`" ]
pub struct OT11_W < 'a > { w : & 'a mut W , } impl < 'a > OT11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT10_A = OT15_A ; # [ doc = "Reader of field `OT10`" ]
pub type OT10_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT10`" ]
pub struct OT10_W < 'a > { w : & 'a mut W , } impl < 'a > OT10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT9_A = OT15_A ; # [ doc = "Reader of field `OT9`" ]
pub type OT9_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT9`" ]
pub struct OT9_W < 'a > { w : & 'a mut W , } impl < 'a > OT9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT8_A = OT15_A ; # [ doc = "Reader of field `OT8`" ]
pub type OT8_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT8`" ]
pub struct OT8_W < 'a > { w : & 'a mut W , } impl < 'a > OT8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT7_A = OT15_A ; # [ doc = "Reader of field `OT7`" ]
pub type OT7_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT7`" ]
pub struct OT7_W < 'a > { w : & 'a mut W , } impl < 'a > OT7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT6_A = OT15_A ; # [ doc = "Reader of field `OT6`" ]
pub type OT6_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT6`" ]
pub struct OT6_W < 'a > { w : & 'a mut W , } impl < 'a > OT6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT5_A = OT15_A ; # [ doc = "Reader of field `OT5`" ]
pub type OT5_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT5`" ]
pub struct OT5_W < 'a > { w : & 'a mut W , } impl < 'a > OT5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT4_A = OT15_A ; # [ doc = "Reader of field `OT4`" ]
pub type OT4_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT4`" ]
pub struct OT4_W < 'a > { w : & 'a mut W , } impl < 'a > OT4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT3_A = OT15_A ; # [ doc = "Reader of field `OT3`" ]
pub type OT3_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT3`" ]
pub struct OT3_W < 'a > { w : & 'a mut W , } impl < 'a > OT3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT2_A = OT15_A ; # [ doc = "Reader of field `OT2`" ]
pub type OT2_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT2`" ]
pub struct OT2_W < 'a > { w : & 'a mut W , } impl < 'a > OT2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT1_A = OT15_A ; # [ doc = "Reader of field `OT1`" ]
pub type OT1_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT1`" ]
pub struct OT1_W < 'a > { w : & 'a mut W , } impl < 'a > OT1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OT0_A = OT15_A ; # [ doc = "Reader of field `OT0`" ]
pub type OT0_R = crate :: R < bool , OT15_A > ; # [ doc = "Write proxy for field `OT0`" ]
pub struct OT0_W < 'a > { w : & 'a mut W , } impl < 'a > OT0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OT0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output push-pull (reset state)" ]
# [ inline ( always ) ]
pub fn push_pull ( self ) -> & 'a mut W { self . variant ( OT15_A :: PUSHPULL ) } # [ doc = "Output open-drain" ]
# [ inline ( always ) ]
pub fn open_drain ( self ) -> & 'a mut W { self . variant ( OT15_A :: OPENDRAIN ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot15 ( & self ) -> OT15_R { OT15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot14 ( & self ) -> OT14_R { OT14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot13 ( & self ) -> OT13_R { OT13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot12 ( & self ) -> OT12_R { OT12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot11 ( & self ) -> OT11_R { OT11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot10 ( & self ) -> OT10_R { OT10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot9 ( & self ) -> OT9_R { OT9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot8 ( & self ) -> OT8_R { OT8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot7 ( & self ) -> OT7_R { OT7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot6 ( & self ) -> OT6_R { OT6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot5 ( & self ) -> OT5_R { OT5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot4 ( & self ) -> OT4_R { OT4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot3 ( & self ) -> OT3_R { OT3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot2 ( & self ) -> OT2_R { OT2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot1 ( & self ) -> OT1_R { OT1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot0 ( & self ) -> OT0_R { OT0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot15 ( & mut self ) -> OT15_W { OT15_W { w : self } } # [ doc = "Bit 14 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot14 ( & mut self ) -> OT14_W { OT14_W { w : self } } # [ doc = "Bit 13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot13 ( & mut self ) -> OT13_W { OT13_W { w : self } } # [ doc = "Bit 12 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot12 ( & mut self ) -> OT12_W { OT12_W { w : self } } # [ doc = "Bit 11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot11 ( & mut self ) -> OT11_W { OT11_W { w : self } } # [ doc = "Bit 10 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot10 ( & mut self ) -> OT10_W { OT10_W { w : self } } # [ doc = "Bit 9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot9 ( & mut self ) -> OT9_W { OT9_W { w : self } } # [ doc = "Bit 8 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot8 ( & mut self ) -> OT8_W { OT8_W { w : self } } # [ doc = "Bit 7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot7 ( & mut self ) -> OT7_W { OT7_W { w : self } } # [ doc = "Bit 6 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot6 ( & mut self ) -> OT6_W { OT6_W { w : self } } # [ doc = "Bit 5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot5 ( & mut self ) -> OT5_W { OT5_W { w : self } } # [ doc = "Bit 4 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot4 ( & mut self ) -> OT4_W { OT4_W { w : self } } # [ doc = "Bit 3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot3 ( & mut self ) -> OT3_W { OT3_W { w : self } } # [ doc = "Bit 2 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot2 ( & mut self ) -> OT2_W { OT2_W { w : self } } # [ doc = "Bit 1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot1 ( & mut self ) -> OT1_W { OT1_W { w : self } } # [ doc = "Bit 0 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ot0 ( & mut self ) -> OT0_W { OT0_W { w : self } } } } # [ doc = "GPIO port output speed register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospeedr](ospeedr) module" ]
pub type OSPEEDR = crate :: Reg < u32 , _OSPEEDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OSPEEDR ; # [ doc = "`read()` method returns [ospeedr::R](ospeedr::R) reader structure" ]
impl crate :: Readable for OSPEEDR { } # [ doc = "`write(|w| ..)` method takes [ospeedr::W](ospeedr::W) writer structure" ]
impl crate :: Writable for OSPEEDR { } # [ doc = "GPIO port output speed register" ]
pub mod ospeedr { # [ doc = "Reader of register OSPEEDR" ]
pub type R = crate :: R < u32 , super :: OSPEEDR > ; # [ doc = "Writer for register OSPEEDR" ]
pub type W = crate :: W < u32 , super :: OSPEEDR > ; # [ doc = "Register OSPEEDR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OSPEEDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum OSPEEDR15_A { # [ doc = "0: Low speed" ]
LOWSPEED = 0 , # [ doc = "1: Medium speed" ]
MEDIUMSPEED = 1 , # [ doc = "2: High speed" ]
HIGHSPEED = 2 , # [ doc = "3: Very high speed" ]
VERYHIGHSPEED = 3 } impl From < OSPEEDR15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : OSPEEDR15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `OSPEEDR15`" ]
pub type OSPEEDR15_R = crate :: R < u8 , OSPEEDR15_A > ; impl OSPEEDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OSPEEDR15_A { match self . bits { 0 => OSPEEDR15_A :: LOWSPEED , 1 => OSPEEDR15_A :: MEDIUMSPEED , 2 => OSPEEDR15_A :: HIGHSPEED , 3 => OSPEEDR15_A :: VERYHIGHSPEED , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `LOWSPEED`" ]
# [ inline ( always ) ]
pub fn is_low_speed ( & self ) -> bool { * self == OSPEEDR15_A :: LOWSPEED } # [ doc = "Checks if the value of the field is `MEDIUMSPEED`" ]
# [ inline ( always ) ]
pub fn is_medium_speed ( & self ) -> bool { * self == OSPEEDR15_A :: MEDIUMSPEED } # [ doc = "Checks if the value of the field is `HIGHSPEED`" ]
# [ inline ( always ) ]
pub fn is_high_speed ( & self ) -> bool { * self == OSPEEDR15_A :: HIGHSPEED } # [ doc = "Checks if the value of the field is `VERYHIGHSPEED`" ]
# [ inline ( always ) ]
pub fn is_very_high_speed ( & self ) -> bool { * self == OSPEEDR15_A :: VERYHIGHSPEED } } # [ doc = "Write proxy for field `OSPEEDR15`" ]
pub struct OSPEEDR15_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR14_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR14`" ]
pub type OSPEEDR14_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR14`" ]
pub struct OSPEEDR14_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR13_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR13`" ]
pub type OSPEEDR13_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR13`" ]
pub struct OSPEEDR13_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR12_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR12`" ]
pub type OSPEEDR12_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR12`" ]
pub struct OSPEEDR12_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR11_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR11`" ]
pub type OSPEEDR11_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR11`" ]
pub struct OSPEEDR11_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR10_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR10`" ]
pub type OSPEEDR10_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR10`" ]
pub struct OSPEEDR10_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR9_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR9`" ]
pub type OSPEEDR9_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR9`" ]
pub struct OSPEEDR9_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR8_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR8`" ]
pub type OSPEEDR8_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR8`" ]
pub struct OSPEEDR8_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR7_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR7`" ]
pub type OSPEEDR7_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR7`" ]
pub struct OSPEEDR7_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR6_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR6`" ]
pub type OSPEEDR6_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR6`" ]
pub struct OSPEEDR6_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR5_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR5`" ]
pub type OSPEEDR5_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR5`" ]
pub struct OSPEEDR5_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR4_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR4`" ]
pub type OSPEEDR4_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR4`" ]
pub struct OSPEEDR4_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR3_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR3`" ]
pub type OSPEEDR3_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR3`" ]
pub struct OSPEEDR3_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR2_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR2`" ]
pub type OSPEEDR2_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR2`" ]
pub struct OSPEEDR2_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR1_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR1`" ]
pub type OSPEEDR1_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR1`" ]
pub struct OSPEEDR1_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type OSPEEDR0_A = OSPEEDR15_A ; # [ doc = "Reader of field `OSPEEDR0`" ]
pub type OSPEEDR0_R = crate :: R < u8 , OSPEEDR15_A > ; # [ doc = "Write proxy for field `OSPEEDR0`" ]
pub struct OSPEEDR0_W < 'a > { w : & 'a mut W , } impl < 'a > OSPEEDR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OSPEEDR0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "Low speed" ]
# [ inline ( always ) ]
pub fn low_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: LOWSPEED ) } # [ doc = "Medium speed" ]
# [ inline ( always ) ]
pub fn medium_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: MEDIUMSPEED ) } # [ doc = "High speed" ]
# [ inline ( always ) ]
pub fn high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: HIGHSPEED ) } # [ doc = "Very high speed" ]
# [ inline ( always ) ]
pub fn very_high_speed ( self ) -> & 'a mut W { self . variant ( OSPEEDR15_A :: VERYHIGHSPEED ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr15 ( & self ) -> OSPEEDR15_R { OSPEEDR15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr14 ( & self ) -> OSPEEDR14_R { OSPEEDR14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr13 ( & self ) -> OSPEEDR13_R { OSPEEDR13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr12 ( & self ) -> OSPEEDR12_R { OSPEEDR12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr11 ( & self ) -> OSPEEDR11_R { OSPEEDR11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr10 ( & self ) -> OSPEEDR10_R { OSPEEDR10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr9 ( & self ) -> OSPEEDR9_R { OSPEEDR9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr8 ( & self ) -> OSPEEDR8_R { OSPEEDR8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr7 ( & self ) -> OSPEEDR7_R { OSPEEDR7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr6 ( & self ) -> OSPEEDR6_R { OSPEEDR6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr5 ( & self ) -> OSPEEDR5_R { OSPEEDR5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr4 ( & self ) -> OSPEEDR4_R { OSPEEDR4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr3 ( & self ) -> OSPEEDR3_R { OSPEEDR3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr2 ( & self ) -> OSPEEDR2_R { OSPEEDR2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr1 ( & self ) -> OSPEEDR1_R { OSPEEDR1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr0 ( & self ) -> OSPEEDR0_R { OSPEEDR0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr15 ( & mut self ) -> OSPEEDR15_W { OSPEEDR15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr14 ( & mut self ) -> OSPEEDR14_W { OSPEEDR14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr13 ( & mut self ) -> OSPEEDR13_W { OSPEEDR13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr12 ( & mut self ) -> OSPEEDR12_W { OSPEEDR12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr11 ( & mut self ) -> OSPEEDR11_W { OSPEEDR11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr10 ( & mut self ) -> OSPEEDR10_W { OSPEEDR10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr9 ( & mut self ) -> OSPEEDR9_W { OSPEEDR9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr8 ( & mut self ) -> OSPEEDR8_W { OSPEEDR8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr7 ( & mut self ) -> OSPEEDR7_W { OSPEEDR7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr6 ( & mut self ) -> OSPEEDR6_W { OSPEEDR6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr5 ( & mut self ) -> OSPEEDR5_W { OSPEEDR5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr4 ( & mut self ) -> OSPEEDR4_W { OSPEEDR4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr3 ( & mut self ) -> OSPEEDR3_W { OSPEEDR3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr2 ( & mut self ) -> OSPEEDR2_W { OSPEEDR2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr1 ( & mut self ) -> OSPEEDR1_W { OSPEEDR1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn ospeedr0 ( & mut self ) -> OSPEEDR0_W { OSPEEDR0_W { w : self } } } } # [ doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pupdr](pupdr) module" ]
pub type PUPDR = crate :: Reg < u32 , _PUPDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _PUPDR ; # [ doc = "`read()` method returns [pupdr::R](pupdr::R) reader structure" ]
impl crate :: Readable for PUPDR { } # [ doc = "`write(|w| ..)` method takes [pupdr::W](pupdr::W) writer structure" ]
impl crate :: Writable for PUPDR { } # [ doc = "GPIO port pull-up/pull-down register" ]
pub mod pupdr { # [ doc = "Reader of register PUPDR" ]
pub type R = crate :: R < u32 , super :: PUPDR > ; # [ doc = "Writer for register PUPDR" ]
pub type W = crate :: W < u32 , super :: PUPDR > ; # [ doc = "Register PUPDR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: PUPDR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x configuration bits (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PUPDR15_A { # [ doc = "0: No pull-up, pull-down" ]
FLOATING = 0 , # [ doc = "1: Pull-up" ]
PULLUP = 1 , # [ doc = "2: Pull-down" ]
PULLDOWN = 2 } impl From < PUPDR15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PUPDR15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PUPDR15`" ]
pub type PUPDR15_R = crate :: R < u8 , PUPDR15_A > ; impl PUPDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , PUPDR15_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( PUPDR15_A :: FLOATING ) , 1 => Val ( PUPDR15_A :: PULLUP ) , 2 => Val ( PUPDR15_A :: PULLDOWN ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `FLOATING`" ]
# [ inline ( always ) ]
pub fn is_floating ( & self ) -> bool { * self == PUPDR15_A :: FLOATING } # [ doc = "Checks if the value of the field is `PULLUP`" ]
# [ inline ( always ) ]
pub fn is_pull_up ( & self ) -> bool { * self == PUPDR15_A :: PULLUP } # [ doc = "Checks if the value of the field is `PULLDOWN`" ]
# [ inline ( always ) ]
pub fn is_pull_down ( & self ) -> bool { * self == PUPDR15_A :: PULLDOWN } } # [ doc = "Write proxy for field `PUPDR15`" ]
pub struct PUPDR15_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR15_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 30 ) ) | ( ( ( value as u32 ) & 0x03 ) << 30 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR14_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR14`" ]
pub type PUPDR14_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR14`" ]
pub struct PUPDR14_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR14_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 28 ) ) | ( ( ( value as u32 ) & 0x03 ) << 28 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR13_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR13`" ]
pub type PUPDR13_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR13`" ]
pub struct PUPDR13_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR13_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 26 ) ) | ( ( ( value as u32 ) & 0x03 ) << 26 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR12_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR12`" ]
pub type PUPDR12_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR12`" ]
pub struct PUPDR12_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR12_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 24 ) ) | ( ( ( value as u32 ) & 0x03 ) << 24 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR11_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR11`" ]
pub type PUPDR11_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR11`" ]
pub struct PUPDR11_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR11_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 22 ) ) | ( ( ( value as u32 ) & 0x03 ) << 22 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR10_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR10`" ]
pub type PUPDR10_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR10`" ]
pub struct PUPDR10_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR10_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 20 ) ) | ( ( ( value as u32 ) & 0x03 ) << 20 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR9_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR9`" ]
pub type PUPDR9_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR9`" ]
pub struct PUPDR9_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR9_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 18 ) ) | ( ( ( value as u32 ) & 0x03 ) << 18 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR8_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR8`" ]
pub type PUPDR8_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR8`" ]
pub struct PUPDR8_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR8_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR7_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR7`" ]
pub type PUPDR7_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR7`" ]
pub struct PUPDR7_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR7_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 14 ) ) | ( ( ( value as u32 ) & 0x03 ) << 14 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR6_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR6`" ]
pub type PUPDR6_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR6`" ]
pub struct PUPDR6_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR6_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR5_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR5`" ]
pub type PUPDR5_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR5`" ]
pub struct PUPDR5_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR5_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 10 ) ) | ( ( ( value as u32 ) & 0x03 ) << 10 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR4_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR4`" ]
pub type PUPDR4_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR4`" ]
pub struct PUPDR4_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR4_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 8 ) ) | ( ( ( value as u32 ) & 0x03 ) << 8 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR3_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR3`" ]
pub type PUPDR3_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR3`" ]
pub struct PUPDR3_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR3_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 6 ) ) | ( ( ( value as u32 ) & 0x03 ) << 6 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR2_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR2`" ]
pub type PUPDR2_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR2`" ]
pub struct PUPDR2_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR2_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 4 ) ) | ( ( ( value as u32 ) & 0x03 ) << 4 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR1_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR1`" ]
pub type PUPDR1_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR1`" ]
pub struct PUPDR1_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR1_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Port x configuration bits (y = 0..15)" ]
pub type PUPDR0_A = PUPDR15_A ; # [ doc = "Reader of field `PUPDR0`" ]
pub type PUPDR0_R = crate :: R < u8 , PUPDR15_A > ; # [ doc = "Write proxy for field `PUPDR0`" ]
pub struct PUPDR0_W < 'a > { w : & 'a mut W , } impl < 'a > PUPDR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PUPDR0_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No pull-up, pull-down" ]
# [ inline ( always ) ]
pub fn floating ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: FLOATING ) } # [ doc = "Pull-up" ]
# [ inline ( always ) ]
pub fn pull_up ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLUP ) } # [ doc = "Pull-down" ]
# [ inline ( always ) ]
pub fn pull_down ( self ) -> & 'a mut W { self . variant ( PUPDR15_A :: PULLDOWN ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x03 ) | ( ( value as u32 ) & 0x03 ) ; self . w } } impl R { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr15 ( & self ) -> PUPDR15_R { PUPDR15_R :: new ( ( ( self . bits >> 30 ) & 0x03 ) as u8 ) } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr14 ( & self ) -> PUPDR14_R { PUPDR14_R :: new ( ( ( self . bits >> 28 ) & 0x03 ) as u8 ) } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr13 ( & self ) -> PUPDR13_R { PUPDR13_R :: new ( ( ( self . bits >> 26 ) & 0x03 ) as u8 ) } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr12 ( & self ) -> PUPDR12_R { PUPDR12_R :: new ( ( ( self . bits >> 24 ) & 0x03 ) as u8 ) } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr11 ( & self ) -> PUPDR11_R { PUPDR11_R :: new ( ( ( self . bits >> 22 ) & 0x03 ) as u8 ) } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr10 ( & self ) -> PUPDR10_R { PUPDR10_R :: new ( ( ( self . bits >> 20 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr9 ( & self ) -> PUPDR9_R { PUPDR9_R :: new ( ( ( self . bits >> 18 ) & 0x03 ) as u8 ) } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr8 ( & self ) -> PUPDR8_R { PUPDR8_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr7 ( & self ) -> PUPDR7_R { PUPDR7_R :: new ( ( ( self . bits >> 14 ) & 0x03 ) as u8 ) } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr6 ( & self ) -> PUPDR6_R { PUPDR6_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr5 ( & self ) -> PUPDR5_R { PUPDR5_R :: new ( ( ( self . bits >> 10 ) & 0x03 ) as u8 ) } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr4 ( & self ) -> PUPDR4_R { PUPDR4_R :: new ( ( ( self . bits >> 8 ) & 0x03 ) as u8 ) } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr3 ( & self ) -> PUPDR3_R { PUPDR3_R :: new ( ( ( self . bits >> 6 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr2 ( & self ) -> PUPDR2_R { PUPDR2_R :: new ( ( ( self . bits >> 4 ) & 0x03 ) as u8 ) } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr1 ( & self ) -> PUPDR1_R { PUPDR1_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr0 ( & self ) -> PUPDR0_R { PUPDR0_R :: new ( ( self . bits & 0x03 ) as u8 ) } } impl W { # [ doc = "Bits 30:31 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr15 ( & mut self ) -> PUPDR15_W { PUPDR15_W { w : self } } # [ doc = "Bits 28:29 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr14 ( & mut self ) -> PUPDR14_W { PUPDR14_W { w : self } } # [ doc = "Bits 26:27 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr13 ( & mut self ) -> PUPDR13_W { PUPDR13_W { w : self } } # [ doc = "Bits 24:25 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr12 ( & mut self ) -> PUPDR12_W { PUPDR12_W { w : self } } # [ doc = "Bits 22:23 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr11 ( & mut self ) -> PUPDR11_W { PUPDR11_W { w : self } } # [ doc = "Bits 20:21 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr10 ( & mut self ) -> PUPDR10_W { PUPDR10_W { w : self } } # [ doc = "Bits 18:19 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr9 ( & mut self ) -> PUPDR9_W { PUPDR9_W { w : self } } # [ doc = "Bits 16:17 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr8 ( & mut self ) -> PUPDR8_W { PUPDR8_W { w : self } } # [ doc = "Bits 14:15 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr7 ( & mut self ) -> PUPDR7_W { PUPDR7_W { w : self } } # [ doc = "Bits 12:13 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr6 ( & mut self ) -> PUPDR6_W { PUPDR6_W { w : self } } # [ doc = "Bits 10:11 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr5 ( & mut self ) -> PUPDR5_W { PUPDR5_W { w : self } } # [ doc = "Bits 8:9 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr4 ( & mut self ) -> PUPDR4_W { PUPDR4_W { w : self } } # [ doc = "Bits 6:7 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr3 ( & mut self ) -> PUPDR3_W { PUPDR3_W { w : self } } # [ doc = "Bits 4:5 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr2 ( & mut self ) -> PUPDR2_W { PUPDR2_W { w : self } } # [ doc = "Bits 2:3 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr1 ( & mut self ) -> PUPDR1_W { PUPDR1_W { w : self } } # [ doc = "Bits 0:1 - Port x configuration bits (y = 0..15)" ]
# [ inline ( always ) ]
pub fn pupdr0 ( & mut self ) -> PUPDR0_W { PUPDR0_W { w : self } } } } # [ doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](idr) module" ]
pub type IDR = crate :: Reg < u32 , _IDR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _IDR ; # [ doc = "`read()` method returns [idr::R](idr::R) reader structure" ]
impl crate :: Readable for IDR { } # [ doc = "GPIO port input data register" ]
pub mod idr { # [ doc = "Reader of register IDR" ]
pub type R = crate :: R < u32 , super :: IDR > ; # [ doc = "Port input data (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum IDR15_A { # [ doc = "1: Input is logic high" ]
HIGH = 1 , # [ doc = "0: Input is logic low" ]
LOW = 0 } impl From < IDR15_A > for bool { # [ inline ( always ) ]
fn from ( variant : IDR15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `IDR15`" ]
pub type IDR15_R = crate :: R < bool , IDR15_A > ; impl IDR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> IDR15_A { match self . bits { true => IDR15_A :: HIGH , false => IDR15_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == IDR15_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == IDR15_A :: LOW } } # [ doc = "Port input data (y = 0..15)" ]
pub type IDR14_A = IDR15_A ; # [ doc = "Reader of field `IDR14`" ]
pub type IDR14_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR13_A = IDR15_A ; # [ doc = "Reader of field `IDR13`" ]
pub type IDR13_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR12_A = IDR15_A ; # [ doc = "Reader of field `IDR12`" ]
pub type IDR12_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR11_A = IDR15_A ; # [ doc = "Reader of field `IDR11`" ]
pub type IDR11_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR10_A = IDR15_A ; # [ doc = "Reader of field `IDR10`" ]
pub type IDR10_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR9_A = IDR15_A ; # [ doc = "Reader of field `IDR9`" ]
pub type IDR9_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR8_A = IDR15_A ; # [ doc = "Reader of field `IDR8`" ]
pub type IDR8_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR7_A = IDR15_A ; # [ doc = "Reader of field `IDR7`" ]
pub type IDR7_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR6_A = IDR15_A ; # [ doc = "Reader of field `IDR6`" ]
pub type IDR6_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR5_A = IDR15_A ; # [ doc = "Reader of field `IDR5`" ]
pub type IDR5_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR4_A = IDR15_A ; # [ doc = "Reader of field `IDR4`" ]
pub type IDR4_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR3_A = IDR15_A ; # [ doc = "Reader of field `IDR3`" ]
pub type IDR3_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR2_A = IDR15_A ; # [ doc = "Reader of field `IDR2`" ]
pub type IDR2_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR1_A = IDR15_A ; # [ doc = "Reader of field `IDR1`" ]
pub type IDR1_R = crate :: R < bool , IDR15_A > ; # [ doc = "Port input data (y = 0..15)" ]
pub type IDR0_A = IDR15_A ; # [ doc = "Reader of field `IDR0`" ]
pub type IDR0_R = crate :: R < bool , IDR15_A > ; impl R { # [ doc = "Bit 15 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr15 ( & self ) -> IDR15_R { IDR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr14 ( & self ) -> IDR14_R { IDR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr13 ( & self ) -> IDR13_R { IDR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr12 ( & self ) -> IDR12_R { IDR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr11 ( & self ) -> IDR11_R { IDR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr10 ( & self ) -> IDR10_R { IDR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr9 ( & self ) -> IDR9_R { IDR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr8 ( & self ) -> IDR8_R { IDR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr7 ( & self ) -> IDR7_R { IDR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr6 ( & self ) -> IDR6_R { IDR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr5 ( & self ) -> IDR5_R { IDR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr4 ( & self ) -> IDR4_R { IDR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr3 ( & self ) -> IDR3_R { IDR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr2 ( & self ) -> IDR2_R { IDR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr1 ( & self ) -> IDR1_R { IDR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port input data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn idr0 ( & self ) -> IDR0_R { IDR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } } # [ doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [odr](odr) module" ]
pub type ODR = crate :: Reg < u32 , _ODR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _ODR ; # [ doc = "`read()` method returns [odr::R](odr::R) reader structure" ]
impl crate :: Readable for ODR { } # [ doc = "`write(|w| ..)` method takes [odr::W](odr::W) writer structure" ]
impl crate :: Writable for ODR { } # [ doc = "GPIO port output data register" ]
pub mod odr { # [ doc = "Reader of register ODR" ]
pub type R = crate :: R < u32 , super :: ODR > ; # [ doc = "Writer for register ODR" ]
pub type W = crate :: W < u32 , super :: ODR > ; # [ doc = "Register ODR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: ODR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port output data (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum ODR15_A { # [ doc = "1: Set output to logic high" ]
HIGH = 1 , # [ doc = "0: Set output to logic low" ]
LOW = 0 } impl From < ODR15_A > for bool { # [ inline ( always ) ]
fn from ( variant : ODR15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `ODR15`" ]
pub type ODR15_R = crate :: R < bool , ODR15_A > ; impl ODR15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> ODR15_A { match self . bits { true => ODR15_A :: HIGH , false => ODR15_A :: LOW } } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == ODR15_A :: HIGH } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == ODR15_A :: LOW } } # [ doc = "Write proxy for field `ODR15`" ]
pub struct ODR15_W < 'a > { w : & 'a mut W , } impl < 'a > ODR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR14_A = ODR15_A ; # [ doc = "Reader of field `ODR14`" ]
pub type ODR14_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR14`" ]
pub struct ODR14_W < 'a > { w : & 'a mut W , } impl < 'a > ODR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR13_A = ODR15_A ; # [ doc = "Reader of field `ODR13`" ]
pub type ODR13_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR13`" ]
pub struct ODR13_W < 'a > { w : & 'a mut W , } impl < 'a > ODR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR12_A = ODR15_A ; # [ doc = "Reader of field `ODR12`" ]
pub type ODR12_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR12`" ]
pub struct ODR12_W < 'a > { w : & 'a mut W , } impl < 'a > ODR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR11_A = ODR15_A ; # [ doc = "Reader of field `ODR11`" ]
pub type ODR11_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR11`" ]
pub struct ODR11_W < 'a > { w : & 'a mut W , } impl < 'a > ODR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR10_A = ODR15_A ; # [ doc = "Reader of field `ODR10`" ]
pub type ODR10_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR10`" ]
pub struct ODR10_W < 'a > { w : & 'a mut W , } impl < 'a > ODR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR9_A = ODR15_A ; # [ doc = "Reader of field `ODR9`" ]
pub type ODR9_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR9`" ]
pub struct ODR9_W < 'a > { w : & 'a mut W , } impl < 'a > ODR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR8_A = ODR15_A ; # [ doc = "Reader of field `ODR8`" ]
pub type ODR8_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR8`" ]
pub struct ODR8_W < 'a > { w : & 'a mut W , } impl < 'a > ODR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR7_A = ODR15_A ; # [ doc = "Reader of field `ODR7`" ]
pub type ODR7_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR7`" ]
pub struct ODR7_W < 'a > { w : & 'a mut W , } impl < 'a > ODR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR6_A = ODR15_A ; # [ doc = "Reader of field `ODR6`" ]
pub type ODR6_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR6`" ]
pub struct ODR6_W < 'a > { w : & 'a mut W , } impl < 'a > ODR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR5_A = ODR15_A ; # [ doc = "Reader of field `ODR5`" ]
pub type ODR5_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR5`" ]
pub struct ODR5_W < 'a > { w : & 'a mut W , } impl < 'a > ODR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR4_A = ODR15_A ; # [ doc = "Reader of field `ODR4`" ]
pub type ODR4_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR4`" ]
pub struct ODR4_W < 'a > { w : & 'a mut W , } impl < 'a > ODR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR3_A = ODR15_A ; # [ doc = "Reader of field `ODR3`" ]
pub type ODR3_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR3`" ]
pub struct ODR3_W < 'a > { w : & 'a mut W , } impl < 'a > ODR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR2_A = ODR15_A ; # [ doc = "Reader of field `ODR2`" ]
pub type ODR2_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR2`" ]
pub struct ODR2_W < 'a > { w : & 'a mut W , } impl < 'a > ODR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR1_A = ODR15_A ; # [ doc = "Reader of field `ODR1`" ]
pub type ODR1_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR1`" ]
pub struct ODR1_W < 'a > { w : & 'a mut W , } impl < 'a > ODR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port output data (y = 0..15)" ]
pub type ODR0_A = ODR15_A ; # [ doc = "Reader of field `ODR0`" ]
pub type ODR0_R = crate :: R < bool , ODR15_A > ; # [ doc = "Write proxy for field `ODR0`" ]
pub struct ODR0_W < 'a > { w : & 'a mut W , } impl < 'a > ODR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : ODR0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Set output to logic high" ]
# [ inline ( always ) ]
pub fn high ( self ) -> & 'a mut W { self . variant ( ODR15_A :: HIGH ) } # [ doc = "Set output to logic low" ]
# [ inline ( always ) ]
pub fn low ( self ) -> & 'a mut W { self . variant ( ODR15_A :: LOW ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 15 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr15 ( & self ) -> ODR15_R { ODR15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr14 ( & self ) -> ODR14_R { ODR14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr13 ( & self ) -> ODR13_R { ODR13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr12 ( & self ) -> ODR12_R { ODR12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr11 ( & self ) -> ODR11_R { ODR11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr10 ( & self ) -> ODR10_R { ODR10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr9 ( & self ) -> ODR9_R { ODR9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr8 ( & self ) -> ODR8_R { ODR8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr7 ( & self ) -> ODR7_R { ODR7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr6 ( & self ) -> ODR6_R { ODR6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr5 ( & self ) -> ODR5_R { ODR5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr4 ( & self ) -> ODR4_R { ODR4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr3 ( & self ) -> ODR3_R { ODR3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr2 ( & self ) -> ODR2_R { ODR2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr1 ( & self ) -> ODR1_R { ODR1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr0 ( & self ) -> ODR0_R { ODR0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 15 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr15 ( & mut self ) -> ODR15_W { ODR15_W { w : self } } # [ doc = "Bit 14 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr14 ( & mut self ) -> ODR14_W { ODR14_W { w : self } } # [ doc = "Bit 13 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr13 ( & mut self ) -> ODR13_W { ODR13_W { w : self } } # [ doc = "Bit 12 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr12 ( & mut self ) -> ODR12_W { ODR12_W { w : self } } # [ doc = "Bit 11 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr11 ( & mut self ) -> ODR11_W { ODR11_W { w : self } } # [ doc = "Bit 10 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr10 ( & mut self ) -> ODR10_W { ODR10_W { w : self } } # [ doc = "Bit 9 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr9 ( & mut self ) -> ODR9_W { ODR9_W { w : self } } # [ doc = "Bit 8 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr8 ( & mut self ) -> ODR8_W { ODR8_W { w : self } } # [ doc = "Bit 7 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr7 ( & mut self ) -> ODR7_W { ODR7_W { w : self } } # [ doc = "Bit 6 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr6 ( & mut self ) -> ODR6_W { ODR6_W { w : self } } # [ doc = "Bit 5 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr5 ( & mut self ) -> ODR5_W { ODR5_W { w : self } } # [ doc = "Bit 4 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr4 ( & mut self ) -> ODR4_W { ODR4_W { w : self } } # [ doc = "Bit 3 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr3 ( & mut self ) -> ODR3_W { ODR3_W { w : self } } # [ doc = "Bit 2 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr2 ( & mut self ) -> ODR2_W { ODR2_W { w : self } } # [ doc = "Bit 1 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr1 ( & mut self ) -> ODR1_W { ODR1_W { w : self } } # [ doc = "Bit 0 - Port output data (y = 0..15)" ]
# [ inline ( always ) ]
pub fn odr0 ( & mut self ) -> ODR0_W { ODR0_W { w : self } } } } # [ doc = "GPIO port bit set/reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bsrr](bsrr) module" ]
pub type BSRR = crate :: Reg < u32 , _BSRR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BSRR ; # [ doc = "`write(|w| ..)` method takes [bsrr::W](bsrr::W) writer structure" ]
impl crate :: Writable for BSRR { } # [ doc = "GPIO port bit set/reset register" ]
pub mod bsrr { # [ doc = "Writer for register BSRR" ]
pub type W = crate :: W < u32 , super :: BSRR > ; # [ doc = "Register BSRR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BSRR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x reset bit y (y = 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR15_AW { # [ doc = "1: Resets the corresponding ODRx bit" ]
RESET = 1 } impl From < BR15_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR15_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR15`" ]
pub struct BR15_W < 'a > { w : & 'a mut W , } impl < 'a > BR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR14_AW = BR15_AW ; # [ doc = "Write proxy for field `BR14`" ]
pub struct BR14_W < 'a > { w : & 'a mut W , } impl < 'a > BR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 30 ) ) | ( ( ( value as u32 ) & 0x01 ) << 30 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR13_AW = BR15_AW ; # [ doc = "Write proxy for field `BR13`" ]
pub struct BR13_W < 'a > { w : & 'a mut W , } impl < 'a > BR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR12_AW = BR15_AW ; # [ doc = "Write proxy for field `BR12`" ]
pub struct BR12_W < 'a > { w : & 'a mut W , } impl < 'a > BR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 28 ) ) | ( ( ( value as u32 ) & 0x01 ) << 28 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR11_AW = BR15_AW ; # [ doc = "Write proxy for field `BR11`" ]
pub struct BR11_W < 'a > { w : & 'a mut W , } impl < 'a > BR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 27 ) ) | ( ( ( value as u32 ) & 0x01 ) << 27 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR10_AW = BR15_AW ; # [ doc = "Write proxy for field `BR10`" ]
pub struct BR10_W < 'a > { w : & 'a mut W , } impl < 'a > BR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 26 ) ) | ( ( ( value as u32 ) & 0x01 ) << 26 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR9_AW = BR15_AW ; # [ doc = "Write proxy for field `BR9`" ]
pub struct BR9_W < 'a > { w : & 'a mut W , } impl < 'a > BR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 25 ) ) | ( ( ( value as u32 ) & 0x01 ) << 25 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR8_AW = BR15_AW ; # [ doc = "Write proxy for field `BR8`" ]
pub struct BR8_W < 'a > { w : & 'a mut W , } impl < 'a > BR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 24 ) ) | ( ( ( value as u32 ) & 0x01 ) << 24 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR7_AW = BR15_AW ; # [ doc = "Write proxy for field `BR7`" ]
pub struct BR7_W < 'a > { w : & 'a mut W , } impl < 'a > BR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 23 ) ) | ( ( ( value as u32 ) & 0x01 ) << 23 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR6_AW = BR15_AW ; # [ doc = "Write proxy for field `BR6`" ]
pub struct BR6_W < 'a > { w : & 'a mut W , } impl < 'a > BR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR5_AW = BR15_AW ; # [ doc = "Write proxy for field `BR5`" ]
pub struct BR5_W < 'a > { w : & 'a mut W , } impl < 'a > BR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 21 ) ) | ( ( ( value as u32 ) & 0x01 ) << 21 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR4_AW = BR15_AW ; # [ doc = "Write proxy for field `BR4`" ]
pub struct BR4_W < 'a > { w : & 'a mut W , } impl < 'a > BR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 20 ) ) | ( ( ( value as u32 ) & 0x01 ) << 20 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR3_AW = BR15_AW ; # [ doc = "Write proxy for field `BR3`" ]
pub struct BR3_W < 'a > { w : & 'a mut W , } impl < 'a > BR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 19 ) ) | ( ( ( value as u32 ) & 0x01 ) << 19 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR2_AW = BR15_AW ; # [ doc = "Write proxy for field `BR2`" ]
pub struct BR2_W < 'a > { w : & 'a mut W , } impl < 'a > BR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Port x reset bit y (y = 0..15)" ]
pub type BR1_AW = BR15_AW ; # [ doc = "Write proxy for field `BR1`" ]
pub struct BR1_W < 'a > { w : & 'a mut W , } impl < 'a > BR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 17 ) ) | ( ( ( value as u32 ) & 0x01 ) << 17 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BR0_AW = BR15_AW ; # [ doc = "Write proxy for field `BR0`" ]
pub struct BR0_W < 'a > { w : & 'a mut W , } impl < 'a > BR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Resets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR15_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BS15_AW { # [ doc = "1: Sets the corresponding ODRx bit" ]
SET = 1 } impl From < BS15_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BS15_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BS15`" ]
pub struct BS15_W < 'a > { w : & 'a mut W , } impl < 'a > BS15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS14_AW = BS15_AW ; # [ doc = "Write proxy for field `BS14`" ]
pub struct BS14_W < 'a > { w : & 'a mut W , } impl < 'a > BS14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS13_AW = BS15_AW ; # [ doc = "Write proxy for field `BS13`" ]
pub struct BS13_W < 'a > { w : & 'a mut W , } impl < 'a > BS13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS12_AW = BS15_AW ; # [ doc = "Write proxy for field `BS12`" ]
pub struct BS12_W < 'a > { w : & 'a mut W , } impl < 'a > BS12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS11_AW = BS15_AW ; # [ doc = "Write proxy for field `BS11`" ]
pub struct BS11_W < 'a > { w : & 'a mut W , } impl < 'a > BS11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS10_AW = BS15_AW ; # [ doc = "Write proxy for field `BS10`" ]
pub struct BS10_W < 'a > { w : & 'a mut W , } impl < 'a > BS10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS9_AW = BS15_AW ; # [ doc = "Write proxy for field `BS9`" ]
pub struct BS9_W < 'a > { w : & 'a mut W , } impl < 'a > BS9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS8_AW = BS15_AW ; # [ doc = "Write proxy for field `BS8`" ]
pub struct BS8_W < 'a > { w : & 'a mut W , } impl < 'a > BS8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS7_AW = BS15_AW ; # [ doc = "Write proxy for field `BS7`" ]
pub struct BS7_W < 'a > { w : & 'a mut W , } impl < 'a > BS7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS6_AW = BS15_AW ; # [ doc = "Write proxy for field `BS6`" ]
pub struct BS6_W < 'a > { w : & 'a mut W , } impl < 'a > BS6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS5_AW = BS15_AW ; # [ doc = "Write proxy for field `BS5`" ]
pub struct BS5_W < 'a > { w : & 'a mut W , } impl < 'a > BS5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS4_AW = BS15_AW ; # [ doc = "Write proxy for field `BS4`" ]
pub struct BS4_W < 'a > { w : & 'a mut W , } impl < 'a > BS4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS3_AW = BS15_AW ; # [ doc = "Write proxy for field `BS3`" ]
pub struct BS3_W < 'a > { w : & 'a mut W , } impl < 'a > BS3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS2_AW = BS15_AW ; # [ doc = "Write proxy for field `BS2`" ]
pub struct BS2_W < 'a > { w : & 'a mut W , } impl < 'a > BS2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS1_AW = BS15_AW ; # [ doc = "Write proxy for field `BS1`" ]
pub struct BS1_W < 'a > { w : & 'a mut W , } impl < 'a > BS1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x set bit y (y= 0..15)" ]
pub type BS0_AW = BS15_AW ; # [ doc = "Write proxy for field `BS0`" ]
pub struct BS0_W < 'a > { w : & 'a mut W , } impl < 'a > BS0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BS0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Sets the corresponding ODRx bit" ]
# [ inline ( always ) ]
pub fn set ( self ) -> & 'a mut W { self . variant ( BS15_AW :: SET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl W { # [ doc = "Bit 31 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br15 ( & mut self ) -> BR15_W { BR15_W { w : self } } # [ doc = "Bit 30 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br14 ( & mut self ) -> BR14_W { BR14_W { w : self } } # [ doc = "Bit 29 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br13 ( & mut self ) -> BR13_W { BR13_W { w : self } } # [ doc = "Bit 28 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br12 ( & mut self ) -> BR12_W { BR12_W { w : self } } # [ doc = "Bit 27 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br11 ( & mut self ) -> BR11_W { BR11_W { w : self } } # [ doc = "Bit 26 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br10 ( & mut self ) -> BR10_W { BR10_W { w : self } } # [ doc = "Bit 25 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br9 ( & mut self ) -> BR9_W { BR9_W { w : self } } # [ doc = "Bit 24 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br8 ( & mut self ) -> BR8_W { BR8_W { w : self } } # [ doc = "Bit 23 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br7 ( & mut self ) -> BR7_W { BR7_W { w : self } } # [ doc = "Bit 22 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br6 ( & mut self ) -> BR6_W { BR6_W { w : self } } # [ doc = "Bit 21 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br5 ( & mut self ) -> BR5_W { BR5_W { w : self } } # [ doc = "Bit 20 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br4 ( & mut self ) -> BR4_W { BR4_W { w : self } } # [ doc = "Bit 19 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br3 ( & mut self ) -> BR3_W { BR3_W { w : self } } # [ doc = "Bit 18 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br2 ( & mut self ) -> BR2_W { BR2_W { w : self } } # [ doc = "Bit 17 - Port x reset bit y (y = 0..15)" ]
# [ inline ( always ) ]
pub fn br1 ( & mut self ) -> BR1_W { BR1_W { w : self } } # [ doc = "Bit 16 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn br0 ( & mut self ) -> BR0_W { BR0_W { w : self } } # [ doc = "Bit 15 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs15 ( & mut self ) -> BS15_W { BS15_W { w : self } } # [ doc = "Bit 14 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs14 ( & mut self ) -> BS14_W { BS14_W { w : self } } # [ doc = "Bit 13 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs13 ( & mut self ) -> BS13_W { BS13_W { w : self } } # [ doc = "Bit 12 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs12 ( & mut self ) -> BS12_W { BS12_W { w : self } } # [ doc = "Bit 11 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs11 ( & mut self ) -> BS11_W { BS11_W { w : self } } # [ doc = "Bit 10 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs10 ( & mut self ) -> BS10_W { BS10_W { w : self } } # [ doc = "Bit 9 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs9 ( & mut self ) -> BS9_W { BS9_W { w : self } } # [ doc = "Bit 8 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs8 ( & mut self ) -> BS8_W { BS8_W { w : self } } # [ doc = "Bit 7 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs7 ( & mut self ) -> BS7_W { BS7_W { w : self } } # [ doc = "Bit 6 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs6 ( & mut self ) -> BS6_W { BS6_W { w : self } } # [ doc = "Bit 5 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs5 ( & mut self ) -> BS5_W { BS5_W { w : self } } # [ doc = "Bit 4 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs4 ( & mut self ) -> BS4_W { BS4_W { w : self } } # [ doc = "Bit 3 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs3 ( & mut self ) -> BS3_W { BS3_W { w : self } } # [ doc = "Bit 2 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs2 ( & mut self ) -> BS2_W { BS2_W { w : self } } # [ doc = "Bit 1 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs1 ( & mut self ) -> BS1_W { BS1_W { w : self } } # [ doc = "Bit 0 - Port x set bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn bs0 ( & mut self ) -> BS0_W { BS0_W { w : self } } } } # [ doc = "GPIO port configuration lock register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lckr](lckr) module" ]
pub type LCKR = crate :: Reg < u32 , _LCKR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _LCKR ; # [ doc = "`read()` method returns [lckr::R](lckr::R) reader structure" ]
impl crate :: Readable for LCKR { } # [ doc = "`write(|w| ..)` method takes [lckr::W](lckr::W) writer structure" ]
impl crate :: Writable for LCKR { } # [ doc = "GPIO port configuration lock register" ]
pub mod lckr { # [ doc = "Reader of register LCKR" ]
pub type R = crate :: R < u32 , super :: LCKR > ; # [ doc = "Writer for register LCKR" ]
pub type W = crate :: W < u32 , super :: LCKR > ; # [ doc = "Register LCKR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: LCKR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Lok Key\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCKK_A { # [ doc = "0: Port configuration lock key not active" ]
NOTACTIVE = 0 , # [ doc = "1: Port configuration lock key active" ]
ACTIVE = 1 } impl From < LCKK_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCKK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCKK`" ]
pub type LCKK_R = crate :: R < bool , LCKK_A > ; impl LCKK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCKK_A { match self . bits { false => LCKK_A :: NOTACTIVE , true => LCKK_A :: ACTIVE } } # [ doc = "Checks if the value of the field is `NOTACTIVE`" ]
# [ inline ( always ) ]
pub fn is_not_active ( & self ) -> bool { * self == LCKK_A :: NOTACTIVE } # [ doc = "Checks if the value of the field is `ACTIVE`" ]
# [ inline ( always ) ]
pub fn is_active ( & self ) -> bool { * self == LCKK_A :: ACTIVE } } # [ doc = "Write proxy for field `LCKK`" ]
pub struct LCKK_W < 'a > { w : & 'a mut W , } impl < 'a > LCKK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCKK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration lock key not active" ]
# [ inline ( always ) ]
pub fn not_active ( self ) -> & 'a mut W { self . variant ( LCKK_A :: NOTACTIVE ) } # [ doc = "Port configuration lock key active" ]
# [ inline ( always ) ]
pub fn active ( self ) -> & 'a mut W { self . variant ( LCKK_A :: ACTIVE ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 16 ) ) | ( ( ( value as u32 ) & 0x01 ) << 16 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCK15_A { # [ doc = "0: Port configuration not locked" ]
UNLOCKED = 0 , # [ doc = "1: Port configuration locked" ]
LOCKED = 1 } impl From < LCK15_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCK15_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCK15`" ]
pub type LCK15_R = crate :: R < bool , LCK15_A > ; impl LCK15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCK15_A { match self . bits { false => LCK15_A :: UNLOCKED , true => LCK15_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LCK15_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LCK15_A :: LOCKED } } # [ doc = "Write proxy for field `LCK15`" ]
pub struct LCK15_W < 'a > { w : & 'a mut W , } impl < 'a > LCK15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK15_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK14_A = LCK15_A ; # [ doc = "Reader of field `LCK14`" ]
pub type LCK14_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK14`" ]
pub struct LCK14_W < 'a > { w : & 'a mut W , } impl < 'a > LCK14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK14_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK13_A = LCK15_A ; # [ doc = "Reader of field `LCK13`" ]
pub type LCK13_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK13`" ]
pub struct LCK13_W < 'a > { w : & 'a mut W , } impl < 'a > LCK13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK13_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK12_A = LCK15_A ; # [ doc = "Reader of field `LCK12`" ]
pub type LCK12_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK12`" ]
pub struct LCK12_W < 'a > { w : & 'a mut W , } impl < 'a > LCK12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK12_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK11_A = LCK15_A ; # [ doc = "Reader of field `LCK11`" ]
pub type LCK11_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK11`" ]
pub struct LCK11_W < 'a > { w : & 'a mut W , } impl < 'a > LCK11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK11_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK10_A = LCK15_A ; # [ doc = "Reader of field `LCK10`" ]
pub type LCK10_R = crate :: R < bool , LCK15_A > ; # [ doc = "Write proxy for field `LCK10`" ]
pub struct LCK10_W < 'a > { w : & 'a mut W , } impl < 'a > LCK10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK10_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK15_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LCK9_A { # [ doc = "0: Port configuration not locked" ]
UNLOCKED = 0 , # [ doc = "1: Port configuration locked" ]
LOCKED = 1 } impl From < LCK9_A > for bool { # [ inline ( always ) ]
fn from ( variant : LCK9_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LCK9`" ]
pub type LCK9_R = crate :: R < bool , LCK9_A > ; impl LCK9_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LCK9_A { match self . bits { false => LCK9_A :: UNLOCKED , true => LCK9_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LCK9_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LCK9_A :: LOCKED } } # [ doc = "Write proxy for field `LCK9`" ]
pub struct LCK9_W < 'a > { w : & 'a mut W , } impl < 'a > LCK9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK9_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK8_A = LCK9_A ; # [ doc = "Reader of field `LCK8`" ]
pub type LCK8_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK8`" ]
pub struct LCK8_W < 'a > { w : & 'a mut W , } impl < 'a > LCK8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK8_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK7_A = LCK9_A ; # [ doc = "Reader of field `LCK7`" ]
pub type LCK7_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK7`" ]
pub struct LCK7_W < 'a > { w : & 'a mut W , } impl < 'a > LCK7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK7_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK6_A = LCK9_A ; # [ doc = "Reader of field `LCK6`" ]
pub type LCK6_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK6`" ]
pub struct LCK6_W < 'a > { w : & 'a mut W , } impl < 'a > LCK6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK6_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK5_A = LCK9_A ; # [ doc = "Reader of field `LCK5`" ]
pub type LCK5_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK5`" ]
pub struct LCK5_W < 'a > { w : & 'a mut W , } impl < 'a > LCK5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK5_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK4_A = LCK9_A ; # [ doc = "Reader of field `LCK4`" ]
pub type LCK4_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK4`" ]
pub struct LCK4_W < 'a > { w : & 'a mut W , } impl < 'a > LCK4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK4_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK3_A = LCK9_A ; # [ doc = "Reader of field `LCK3`" ]
pub type LCK3_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK3`" ]
pub struct LCK3_W < 'a > { w : & 'a mut W , } impl < 'a > LCK3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK3_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK2_A = LCK9_A ; # [ doc = "Reader of field `LCK2`" ]
pub type LCK2_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK2`" ]
pub struct LCK2_W < 'a > { w : & 'a mut W , } impl < 'a > LCK2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK2_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK1_A = LCK9_A ; # [ doc = "Reader of field `LCK1`" ]
pub type LCK1_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK1`" ]
pub struct LCK1_W < 'a > { w : & 'a mut W , } impl < 'a > LCK1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK1_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x lock bit y (y= 0..15)" ]
pub type LCK0_A = LCK9_A ; # [ doc = "Reader of field `LCK0`" ]
pub type LCK0_R = crate :: R < bool , LCK9_A > ; # [ doc = "Write proxy for field `LCK0`" ]
pub struct LCK0_W < 'a > { w : & 'a mut W , } impl < 'a > LCK0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LCK0_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Port configuration not locked" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: UNLOCKED ) } # [ doc = "Port configuration locked" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LCK9_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } impl R { # [ doc = "Bit 16 - Lok Key" ]
# [ inline ( always ) ]
pub fn lckk ( & self ) -> LCKK_R { LCKK_R :: new ( ( ( self . bits >> 16 ) & 0x01 ) != 0 ) } # [ doc = "Bit 15 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck15 ( & self ) -> LCK15_R { LCK15_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bit 14 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck14 ( & self ) -> LCK14_R { LCK14_R :: new ( ( ( self . bits >> 14 ) & 0x01 ) != 0 ) } # [ doc = "Bit 13 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck13 ( & self ) -> LCK13_R { LCK13_R :: new ( ( ( self . bits >> 13 ) & 0x01 ) != 0 ) } # [ doc = "Bit 12 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck12 ( & self ) -> LCK12_R { LCK12_R :: new ( ( ( self . bits >> 12 ) & 0x01 ) != 0 ) } # [ doc = "Bit 11 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck11 ( & self ) -> LCK11_R { LCK11_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bit 10 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck10 ( & self ) -> LCK10_R { LCK10_R :: new ( ( ( self . bits >> 10 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck9 ( & self ) -> LCK9_R { LCK9_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck8 ( & self ) -> LCK8_R { LCK8_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bit 7 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck7 ( & self ) -> LCK7_R { LCK7_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 6 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck6 ( & self ) -> LCK6_R { LCK6_R :: new ( ( ( self . bits >> 6 ) & 0x01 ) != 0 ) } # [ doc = "Bit 5 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck5 ( & self ) -> LCK5_R { LCK5_R :: new ( ( ( self . bits >> 5 ) & 0x01 ) != 0 ) } # [ doc = "Bit 4 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck4 ( & self ) -> LCK4_R { LCK4_R :: new ( ( ( self . bits >> 4 ) & 0x01 ) != 0 ) } # [ doc = "Bit 3 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck3 ( & self ) -> LCK3_R { LCK3_R :: new ( ( ( self . bits >> 3 ) & 0x01 ) != 0 ) } # [ doc = "Bit 2 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck2 ( & self ) -> LCK2_R { LCK2_R :: new ( ( ( self . bits >> 2 ) & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck1 ( & self ) -> LCK1_R { LCK1_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bit 0 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck0 ( & self ) -> LCK0_R { LCK0_R :: new ( ( self . bits & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 16 - Lok Key" ]
# [ inline ( always ) ]
pub fn lckk ( & mut self ) -> LCKK_W { LCKK_W { w : self } } # [ doc = "Bit 15 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck15 ( & mut self ) -> LCK15_W { LCK15_W { w : self } } # [ doc = "Bit 14 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck14 ( & mut self ) -> LCK14_W { LCK14_W { w : self } } # [ doc = "Bit 13 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck13 ( & mut self ) -> LCK13_W { LCK13_W { w : self } } # [ doc = "Bit 12 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck12 ( & mut self ) -> LCK12_W { LCK12_W { w : self } } # [ doc = "Bit 11 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck11 ( & mut self ) -> LCK11_W { LCK11_W { w : self } } # [ doc = "Bit 10 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck10 ( & mut self ) -> LCK10_W { LCK10_W { w : self } } # [ doc = "Bit 9 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck9 ( & mut self ) -> LCK9_W { LCK9_W { w : self } } # [ doc = "Bit 8 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck8 ( & mut self ) -> LCK8_W { LCK8_W { w : self } } # [ doc = "Bit 7 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck7 ( & mut self ) -> LCK7_W { LCK7_W { w : self } } # [ doc = "Bit 6 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck6 ( & mut self ) -> LCK6_W { LCK6_W { w : self } } # [ doc = "Bit 5 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck5 ( & mut self ) -> LCK5_W { LCK5_W { w : self } } # [ doc = "Bit 4 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck4 ( & mut self ) -> LCK4_W { LCK4_W { w : self } } # [ doc = "Bit 3 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck3 ( & mut self ) -> LCK3_W { LCK3_W { w : self } } # [ doc = "Bit 2 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck2 ( & mut self ) -> LCK2_W { LCK2_W { w : self } } # [ doc = "Bit 1 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck1 ( & mut self ) -> LCK1_W { LCK1_W { w : self } } # [ doc = "Bit 0 - Port x lock bit y (y= 0..15)" ]
# [ inline ( always ) ]
pub fn lck0 ( & mut self ) -> LCK0_W { LCK0_W { w : self } } } } # [ doc = "GPIO alternate function low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afrl](afrl) module" ]
pub type AFRL = crate :: Reg < u32 , _AFRL > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AFRL ; # [ doc = "`read()` method returns [afrl::R](afrl::R) reader structure" ]
impl crate :: Readable for AFRL { } # [ doc = "`write(|w| ..)` method takes [afrl::W](afrl::W) writer structure" ]
impl crate :: Writable for AFRL { } # [ doc = "GPIO alternate function low register" ]
pub mod afrl { # [ doc = "Reader of register AFRL" ]
pub type R = crate :: R < u32 , super :: AFRL > ; # [ doc = "Writer for register AFRL" ]
pub type W = crate :: W < u32 , super :: AFRL > ; # [ doc = "Register AFRL `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AFRL { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum AFRL7_A { # [ doc = "0: AF0" ]
AF0 = 0 , # [ doc = "1: AF1" ]
AF1 = 1 , # [ doc = "2: AF2" ]
AF2 = 2 , # [ doc = "3: AF3" ]
AF3 = 3 , # [ doc = "4: AF4" ]
AF4 = 4 , # [ doc = "5: AF5" ]
AF5 = 5 , # [ doc = "6: AF6" ]
AF6 = 6 , # [ doc = "7: AF7" ]
AF7 = 7 , # [ doc = "8: AF8" ]
AF8 = 8 , # [ doc = "9: AF9" ]
AF9 = 9 , # [ doc = "10: AF10" ]
AF10 = 10 , # [ doc = "11: AF11" ]
AF11 = 11 , # [ doc = "12: AF12" ]
AF12 = 12 , # [ doc = "13: AF13" ]
AF13 = 13 , # [ doc = "14: AF14" ]
AF14 = 14 , # [ doc = "15: AF15" ]
AF15 = 15 } impl From < AFRL7_A > for u8 { # [ inline ( always ) ]
fn from ( variant : AFRL7_A ) -> Self { variant as _ } } # [ doc = "Reader of field `AFRL7`" ]
pub type AFRL7_R = crate :: R < u8 , AFRL7_A > ; impl AFRL7_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AFRL7_A { match self . bits { 0 => AFRL7_A :: AF0 , 1 => AFRL7_A :: AF1 , 2 => AFRL7_A :: AF2 , 3 => AFRL7_A :: AF3 , 4 => AFRL7_A :: AF4 , 5 => AFRL7_A :: AF5 , 6 => AFRL7_A :: AF6 , 7 => AFRL7_A :: AF7 , 8 => AFRL7_A :: AF8 , 9 => AFRL7_A :: AF9 , 10 => AFRL7_A :: AF10 , 11 => AFRL7_A :: AF11 , 12 => AFRL7_A :: AF12 , 13 => AFRL7_A :: AF13 , 14 => AFRL7_A :: AF14 , 15 => AFRL7_A :: AF15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `AF0`" ]
# [ inline ( always ) ]
pub fn is_af0 ( & self ) -> bool { * self == AFRL7_A :: AF0 } # [ doc = "Checks if the value of the field is `AF1`" ]
# [ inline ( always ) ]
pub fn is_af1 ( & self ) -> bool { * self == AFRL7_A :: AF1 } # [ doc = "Checks if the value of the field is `AF2`" ]
# [ inline ( always ) ]
pub fn is_af2 ( & self ) -> bool { * self == AFRL7_A :: AF2 } # [ doc = "Checks if the value of the field is `AF3`" ]
# [ inline ( always ) ]
pub fn is_af3 ( & self ) -> bool { * self == AFRL7_A :: AF3 } # [ doc = "Checks if the value of the field is `AF4`" ]
# [ inline ( always ) ]
pub fn is_af4 ( & self ) -> bool { * self == AFRL7_A :: AF4 } # [ doc = "Checks if the value of the field is `AF5`" ]
# [ inline ( always ) ]
pub fn is_af5 ( & self ) -> bool { * self == AFRL7_A :: AF5 } # [ doc = "Checks if the value of the field is `AF6`" ]
# [ inline ( always ) ]
pub fn is_af6 ( & self ) -> bool { * self == AFRL7_A :: AF6 } # [ doc = "Checks if the value of the field is `AF7`" ]
# [ inline ( always ) ]
pub fn is_af7 ( & self ) -> bool { * self == AFRL7_A :: AF7 } # [ doc = "Checks if the value of the field is `AF8`" ]
# [ inline ( always ) ]
pub fn is_af8 ( & self ) -> bool { * self == AFRL7_A :: AF8 } # [ doc = "Checks if the value of the field is `AF9`" ]
# [ inline ( always ) ]
pub fn is_af9 ( & self ) -> bool { * self == AFRL7_A :: AF9 } # [ doc = "Checks if the value of the field is `AF10`" ]
# [ inline ( always ) ]
pub fn is_af10 ( & self ) -> bool { * self == AFRL7_A :: AF10 } # [ doc = "Checks if the value of the field is `AF11`" ]
# [ inline ( always ) ]
pub fn is_af11 ( & self ) -> bool { * self == AFRL7_A :: AF11 } # [ doc = "Checks if the value of the field is `AF12`" ]
# [ inline ( always ) ]
pub fn is_af12 ( & self ) -> bool { * self == AFRL7_A :: AF12 } # [ doc = "Checks if the value of the field is `AF13`" ]
# [ inline ( always ) ]
pub fn is_af13 ( & self ) -> bool { * self == AFRL7_A :: AF13 } # [ doc = "Checks if the value of the field is `AF14`" ]
# [ inline ( always ) ]
pub fn is_af14 ( & self ) -> bool { * self == AFRL7_A :: AF14 } # [ doc = "Checks if the value of the field is `AF15`" ]
# [ inline ( always ) ]
pub fn is_af15 ( & self ) -> bool { * self == AFRL7_A :: AF15 } } # [ doc = "Write proxy for field `AFRL7`" ]
pub struct AFRL7_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL7_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL6_A = AFRL7_A ; # [ doc = "Reader of field `AFRL6`" ]
pub type AFRL6_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL6`" ]
pub struct AFRL6_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL6_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL5_A = AFRL7_A ; # [ doc = "Reader of field `AFRL5`" ]
pub type AFRL5_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL5`" ]
pub struct AFRL5_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL5_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL4_A = AFRL7_A ; # [ doc = "Reader of field `AFRL4`" ]
pub type AFRL4_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL4`" ]
pub struct AFRL4_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL4_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL3_A = AFRL7_A ; # [ doc = "Reader of field `AFRL3`" ]
pub type AFRL3_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL3`" ]
pub struct AFRL3_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL3_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL2_A = AFRL7_A ; # [ doc = "Reader of field `AFRL2`" ]
pub type AFRL2_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL2`" ]
pub struct AFRL2_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL2_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL1_A = AFRL7_A ; # [ doc = "Reader of field `AFRL1`" ]
pub type AFRL1_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL1`" ]
pub struct AFRL1_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL1_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 0..7)" ]
pub type AFRL0_A = AFRL7_A ; # [ doc = "Reader of field `AFRL0`" ]
pub type AFRL0_R = crate :: R < u8 , AFRL7_A > ; # [ doc = "Write proxy for field `AFRL0`" ]
pub struct AFRL0_W < 'a > { w : & 'a mut W , } impl < 'a > AFRL0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRL0_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRL7_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl7 ( & self ) -> AFRL7_R { AFRL7_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl6 ( & self ) -> AFRL6_R { AFRL6_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl5 ( & self ) -> AFRL5_R { AFRL5_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl4 ( & self ) -> AFRL4_R { AFRL4_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl3 ( & self ) -> AFRL3_R { AFRL3_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl2 ( & self ) -> AFRL2_R { AFRL2_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl1 ( & self ) -> AFRL1_R { AFRL1_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl0 ( & self ) -> AFRL0_R { AFRL0_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl7 ( & mut self ) -> AFRL7_W { AFRL7_W { w : self } } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl6 ( & mut self ) -> AFRL6_W { AFRL6_W { w : self } } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl5 ( & mut self ) -> AFRL5_W { AFRL5_W { w : self } } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl4 ( & mut self ) -> AFRL4_W { AFRL4_W { w : self } } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl3 ( & mut self ) -> AFRL3_W { AFRL3_W { w : self } } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl2 ( & mut self ) -> AFRL2_W { AFRL2_W { w : self } } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl1 ( & mut self ) -> AFRL1_W { AFRL1_W { w : self } } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)" ]
# [ inline ( always ) ]
pub fn afrl0 ( & mut self ) -> AFRL0_W { AFRL0_W { w : self } } } } # [ doc = "GPIO alternate function high register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afrh](afrh) module" ]
pub type AFRH = crate :: Reg < u32 , _AFRH > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _AFRH ; # [ doc = "`read()` method returns [afrh::R](afrh::R) reader structure" ]
impl crate :: Readable for AFRH { } # [ doc = "`write(|w| ..)` method takes [afrh::W](afrh::W) writer structure" ]
impl crate :: Writable for AFRH { } # [ doc = "GPIO alternate function high register" ]
pub mod afrh { # [ doc = "Reader of register AFRH" ]
pub type R = crate :: R < u32 , super :: AFRH > ; # [ doc = "Writer for register AFRH" ]
pub type W = crate :: W < u32 , super :: AFRH > ; # [ doc = "Register AFRH `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: AFRH { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum AFRH15_A { # [ doc = "0: AF0" ]
AF0 = 0 , # [ doc = "1: AF1" ]
AF1 = 1 , # [ doc = "2: AF2" ]
AF2 = 2 , # [ doc = "3: AF3" ]
AF3 = 3 , # [ doc = "4: AF4" ]
AF4 = 4 , # [ doc = "5: AF5" ]
AF5 = 5 , # [ doc = "6: AF6" ]
AF6 = 6 , # [ doc = "7: AF7" ]
AF7 = 7 , # [ doc = "8: AF8" ]
AF8 = 8 , # [ doc = "9: AF9" ]
AF9 = 9 , # [ doc = "10: AF10" ]
AF10 = 10 , # [ doc = "11: AF11" ]
AF11 = 11 , # [ doc = "12: AF12" ]
AF12 = 12 , # [ doc = "13: AF13" ]
AF13 = 13 , # [ doc = "14: AF14" ]
AF14 = 14 , # [ doc = "15: AF15" ]
AF15 = 15 } impl From < AFRH15_A > for u8 { # [ inline ( always ) ]
fn from ( variant : AFRH15_A ) -> Self { variant as _ } } # [ doc = "Reader of field `AFRH15`" ]
pub type AFRH15_R = crate :: R < u8 , AFRH15_A > ; impl AFRH15_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> AFRH15_A { match self . bits { 0 => AFRH15_A :: AF0 , 1 => AFRH15_A :: AF1 , 2 => AFRH15_A :: AF2 , 3 => AFRH15_A :: AF3 , 4 => AFRH15_A :: AF4 , 5 => AFRH15_A :: AF5 , 6 => AFRH15_A :: AF6 , 7 => AFRH15_A :: AF7 , 8 => AFRH15_A :: AF8 , 9 => AFRH15_A :: AF9 , 10 => AFRH15_A :: AF10 , 11 => AFRH15_A :: AF11 , 12 => AFRH15_A :: AF12 , 13 => AFRH15_A :: AF13 , 14 => AFRH15_A :: AF14 , 15 => AFRH15_A :: AF15 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `AF0`" ]
# [ inline ( always ) ]
pub fn is_af0 ( & self ) -> bool { * self == AFRH15_A :: AF0 } # [ doc = "Checks if the value of the field is `AF1`" ]
# [ inline ( always ) ]
pub fn is_af1 ( & self ) -> bool { * self == AFRH15_A :: AF1 } # [ doc = "Checks if the value of the field is `AF2`" ]
# [ inline ( always ) ]
pub fn is_af2 ( & self ) -> bool { * self == AFRH15_A :: AF2 } # [ doc = "Checks if the value of the field is `AF3`" ]
# [ inline ( always ) ]
pub fn is_af3 ( & self ) -> bool { * self == AFRH15_A :: AF3 } # [ doc = "Checks if the value of the field is `AF4`" ]
# [ inline ( always ) ]
pub fn is_af4 ( & self ) -> bool { * self == AFRH15_A :: AF4 } # [ doc = "Checks if the value of the field is `AF5`" ]
# [ inline ( always ) ]
pub fn is_af5 ( & self ) -> bool { * self == AFRH15_A :: AF5 } # [ doc = "Checks if the value of the field is `AF6`" ]
# [ inline ( always ) ]
pub fn is_af6 ( & self ) -> bool { * self == AFRH15_A :: AF6 } # [ doc = "Checks if the value of the field is `AF7`" ]
# [ inline ( always ) ]
pub fn is_af7 ( & self ) -> bool { * self == AFRH15_A :: AF7 } # [ doc = "Checks if the value of the field is `AF8`" ]
# [ inline ( always ) ]
pub fn is_af8 ( & self ) -> bool { * self == AFRH15_A :: AF8 } # [ doc = "Checks if the value of the field is `AF9`" ]
# [ inline ( always ) ]
pub fn is_af9 ( & self ) -> bool { * self == AFRH15_A :: AF9 } # [ doc = "Checks if the value of the field is `AF10`" ]
# [ inline ( always ) ]
pub fn is_af10 ( & self ) -> bool { * self == AFRH15_A :: AF10 } # [ doc = "Checks if the value of the field is `AF11`" ]
# [ inline ( always ) ]
pub fn is_af11 ( & self ) -> bool { * self == AFRH15_A :: AF11 } # [ doc = "Checks if the value of the field is `AF12`" ]
# [ inline ( always ) ]
pub fn is_af12 ( & self ) -> bool { * self == AFRH15_A :: AF12 } # [ doc = "Checks if the value of the field is `AF13`" ]
# [ inline ( always ) ]
pub fn is_af13 ( & self ) -> bool { * self == AFRH15_A :: AF13 } # [ doc = "Checks if the value of the field is `AF14`" ]
# [ inline ( always ) ]
pub fn is_af14 ( & self ) -> bool { * self == AFRH15_A :: AF14 } # [ doc = "Checks if the value of the field is `AF15`" ]
# [ inline ( always ) ]
pub fn is_af15 ( & self ) -> bool { * self == AFRH15_A :: AF15 } } # [ doc = "Write proxy for field `AFRH15`" ]
pub struct AFRH15_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH15_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 28 ) ) | ( ( ( value as u32 ) & 0x0f ) << 28 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH14_A = AFRH15_A ; # [ doc = "Reader of field `AFRH14`" ]
pub type AFRH14_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH14`" ]
pub struct AFRH14_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH14_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 24 ) ) | ( ( ( value as u32 ) & 0x0f ) << 24 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH13_A = AFRH15_A ; # [ doc = "Reader of field `AFRH13`" ]
pub type AFRH13_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH13`" ]
pub struct AFRH13_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH13_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 20 ) ) | ( ( ( value as u32 ) & 0x0f ) << 20 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH12_A = AFRH15_A ; # [ doc = "Reader of field `AFRH12`" ]
pub type AFRH12_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH12`" ]
pub struct AFRH12_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH12_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 16 ) ) | ( ( ( value as u32 ) & 0x0f ) << 16 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH11_A = AFRH15_A ; # [ doc = "Reader of field `AFRH11`" ]
pub type AFRH11_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH11`" ]
pub struct AFRH11_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH11_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 12 ) ) | ( ( ( value as u32 ) & 0x0f ) << 12 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH10_A = AFRH15_A ; # [ doc = "Reader of field `AFRH10`" ]
pub type AFRH10_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH10`" ]
pub struct AFRH10_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH10_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 8 ) ) | ( ( ( value as u32 ) & 0x0f ) << 8 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH9_A = AFRH15_A ; # [ doc = "Reader of field `AFRH9`" ]
pub type AFRH9_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH9`" ]
pub struct AFRH9_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH9_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 4 ) ) | ( ( ( value as u32 ) & 0x0f ) << 4 ) ; self . w } } # [ doc = "Alternate function selection for port x bit y (y = 8..15)" ]
pub type AFRH8_A = AFRH15_A ; # [ doc = "Reader of field `AFRH8`" ]
pub type AFRH8_R = crate :: R < u8 , AFRH15_A > ; # [ doc = "Write proxy for field `AFRH8`" ]
pub struct AFRH8_W < 'a > { w : & 'a mut W , } impl < 'a > AFRH8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : AFRH8_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "AF0" ]
# [ inline ( always ) ]
pub fn af0 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF0 ) } # [ doc = "AF1" ]
# [ inline ( always ) ]
pub fn af1 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF1 ) } # [ doc = "AF2" ]
# [ inline ( always ) ]
pub fn af2 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF2 ) } # [ doc = "AF3" ]
# [ inline ( always ) ]
pub fn af3 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF3 ) } # [ doc = "AF4" ]
# [ inline ( always ) ]
pub fn af4 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF4 ) } # [ doc = "AF5" ]
# [ inline ( always ) ]
pub fn af5 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF5 ) } # [ doc = "AF6" ]
# [ inline ( always ) ]
pub fn af6 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF6 ) } # [ doc = "AF7" ]
# [ inline ( always ) ]
pub fn af7 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF7 ) } # [ doc = "AF8" ]
# [ inline ( always ) ]
pub fn af8 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF8 ) } # [ doc = "AF9" ]
# [ inline ( always ) ]
pub fn af9 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF9 ) } # [ doc = "AF10" ]
# [ inline ( always ) ]
pub fn af10 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF10 ) } # [ doc = "AF11" ]
# [ inline ( always ) ]
pub fn af11 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF11 ) } # [ doc = "AF12" ]
# [ inline ( always ) ]
pub fn af12 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF12 ) } # [ doc = "AF13" ]
# [ inline ( always ) ]
pub fn af13 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF13 ) } # [ doc = "AF14" ]
# [ inline ( always ) ]
pub fn af14 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF14 ) } # [ doc = "AF15" ]
# [ inline ( always ) ]
pub fn af15 ( self ) -> & 'a mut W { self . variant ( AFRH15_A :: AF15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x0f ) | ( ( value as u32 ) & 0x0f ) ; self . w } } impl R { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh15 ( & self ) -> AFRH15_R { AFRH15_R :: new ( ( ( self . bits >> 28 ) & 0x0f ) as u8 ) } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh14 ( & self ) -> AFRH14_R { AFRH14_R :: new ( ( ( self . bits >> 24 ) & 0x0f ) as u8 ) } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh13 ( & self ) -> AFRH13_R { AFRH13_R :: new ( ( ( self . bits >> 20 ) & 0x0f ) as u8 ) } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh12 ( & self ) -> AFRH12_R { AFRH12_R :: new ( ( ( self . bits >> 16 ) & 0x0f ) as u8 ) } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh11 ( & self ) -> AFRH11_R { AFRH11_R :: new ( ( ( self . bits >> 12 ) & 0x0f ) as u8 ) } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh10 ( & self ) -> AFRH10_R { AFRH10_R :: new ( ( ( self . bits >> 8 ) & 0x0f ) as u8 ) } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh9 ( & self ) -> AFRH9_R { AFRH9_R :: new ( ( ( self . bits >> 4 ) & 0x0f ) as u8 ) } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh8 ( & self ) -> AFRH8_R { AFRH8_R :: new ( ( self . bits & 0x0f ) as u8 ) } } impl W { # [ doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh15 ( & mut self ) -> AFRH15_W { AFRH15_W { w : self } } # [ doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh14 ( & mut self ) -> AFRH14_W { AFRH14_W { w : self } } # [ doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh13 ( & mut self ) -> AFRH13_W { AFRH13_W { w : self } } # [ doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh12 ( & mut self ) -> AFRH12_W { AFRH12_W { w : self } } # [ doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh11 ( & mut self ) -> AFRH11_W { AFRH11_W { w : self } } # [ doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh10 ( & mut self ) -> AFRH10_W { AFRH10_W { w : self } } # [ doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh9 ( & mut self ) -> AFRH9_W { AFRH9_W { w : self } } # [ doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)" ]
# [ inline ( always ) ]
pub fn afrh8 ( & mut self ) -> AFRH8_W { AFRH8_W { w : self } } } } # [ doc = "Port bit reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [brr](brr) module" ]
pub type BRR = crate :: Reg < u32 , _BRR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _BRR ; # [ doc = "`write(|w| ..)` method takes [brr::W](brr::W) writer structure" ]
impl crate :: Writable for BRR { } # [ doc = "Port bit reset register" ]
pub mod brr { # [ doc = "Writer for register BRR" ]
pub type W = crate :: W < u32 , super :: BRR > ; # [ doc = "Register BRR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: BRR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Port x Reset bit y\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR0_AW { # [ doc = "0: No action on the corresponding ODx bit" ]
NOACTION = 0 , # [ doc = "1: Reset the ODx bit" ]
RESET = 1 } impl From < BR0_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR0_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR0`" ]
pub struct BR0_W < 'a > { w : & 'a mut W , } impl < 'a > BR0_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR0_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR1_AW = BR0_AW ; # [ doc = "Write proxy for field `BR1`" ]
pub struct BR1_W < 'a > { w : & 'a mut W , } impl < 'a > BR1_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR1_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR2_AW = BR0_AW ; # [ doc = "Write proxy for field `BR2`" ]
pub struct BR2_W < 'a > { w : & 'a mut W , } impl < 'a > BR2_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR2_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 2 ) ) | ( ( ( value as u32 ) & 0x01 ) << 2 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR3_AW = BR0_AW ; # [ doc = "Write proxy for field `BR3`" ]
pub struct BR3_W < 'a > { w : & 'a mut W , } impl < 'a > BR3_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR3_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 3 ) ) | ( ( ( value as u32 ) & 0x01 ) << 3 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR4_AW = BR0_AW ; # [ doc = "Write proxy for field `BR4`" ]
pub struct BR4_W < 'a > { w : & 'a mut W , } impl < 'a > BR4_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR4_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 4 ) ) | ( ( ( value as u32 ) & 0x01 ) << 4 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR5_AW = BR0_AW ; # [ doc = "Write proxy for field `BR5`" ]
pub struct BR5_W < 'a > { w : & 'a mut W , } impl < 'a > BR5_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR5_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 5 ) ) | ( ( ( value as u32 ) & 0x01 ) << 5 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR6_AW = BR0_AW ; # [ doc = "Write proxy for field `BR6`" ]
pub struct BR6_W < 'a > { w : & 'a mut W , } impl < 'a > BR6_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR6_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 6 ) ) | ( ( ( value as u32 ) & 0x01 ) << 6 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR7_AW = BR0_AW ; # [ doc = "Write proxy for field `BR7`" ]
pub struct BR7_W < 'a > { w : & 'a mut W , } impl < 'a > BR7_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR7_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR8_AW = BR0_AW ; # [ doc = "Write proxy for field `BR8`" ]
pub struct BR8_W < 'a > { w : & 'a mut W , } impl < 'a > BR8_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR8_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR9_AW = BR0_AW ; # [ doc = "Write proxy for field `BR9`" ]
pub struct BR9_W < 'a > { w : & 'a mut W , } impl < 'a > BR9_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR9_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR0_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR0_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Port x Reset bit y\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum BR10_AW { # [ doc = "0: No action on the corresponding ODx bit" ]
NOACTION = 0 , # [ doc = "1: Reset the ODx bit" ]
RESET = 1 } impl From < BR10_AW > for bool { # [ inline ( always ) ]
fn from ( variant : BR10_AW ) -> Self { variant as u8 != 0 } } # [ doc = "Write proxy for field `BR10`" ]
pub struct BR10_W < 'a > { w : & 'a mut W , } impl < 'a > BR10_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR10_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 10 ) ) | ( ( ( value as u32 ) & 0x01 ) << 10 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR11_AW = BR10_AW ; # [ doc = "Write proxy for field `BR11`" ]
pub struct BR11_W < 'a > { w : & 'a mut W , } impl < 'a > BR11_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR11_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR12_AW = BR10_AW ; # [ doc = "Write proxy for field `BR12`" ]
pub struct BR12_W < 'a > { w : & 'a mut W , } impl < 'a > BR12_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR12_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 12 ) ) | ( ( ( value as u32 ) & 0x01 ) << 12 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR13_AW = BR10_AW ; # [ doc = "Write proxy for field `BR13`" ]
pub struct BR13_W < 'a > { w : & 'a mut W , } impl < 'a > BR13_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR13_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 13 ) ) | ( ( ( value as u32 ) & 0x01 ) << 13 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR14_AW = BR10_AW ; # [ doc = "Write proxy for field `BR14`" ]
pub struct BR14_W < 'a > { w : & 'a mut W , } impl < 'a > BR14_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR14_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 14 ) ) | ( ( ( value as u32 ) & 0x01 ) << 14 ) ; self . w } } # [ doc = "Port x Reset bit y" ]
pub type BR15_AW = BR10_AW ; # [ doc = "Write proxy for field `BR15`" ]
pub struct BR15_W < 'a > { w : & 'a mut W , } impl < 'a > BR15_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : BR15_AW ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "No action on the corresponding ODx bit" ]
# [ inline ( always ) ]
pub fn no_action ( self ) -> & 'a mut W { self . variant ( BR10_AW :: NOACTION ) } # [ doc = "Reset the ODx bit" ]
# [ inline ( always ) ]
pub fn reset ( self ) -> & 'a mut W { self . variant ( BR10_AW :: RESET ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } impl W { # [ doc = "Bit 0 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br0 ( & mut self ) -> BR0_W { BR0_W { w : self } } # [ doc = "Bit 1 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br1 ( & mut self ) -> BR1_W { BR1_W { w : self } } # [ doc = "Bit 2 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br2 ( & mut self ) -> BR2_W { BR2_W { w : self } } # [ doc = "Bit 3 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br3 ( & mut self ) -> BR3_W { BR3_W { w : self } } # [ doc = "Bit 4 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br4 ( & mut self ) -> BR4_W { BR4_W { w : self } } # [ doc = "Bit 5 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br5 ( & mut self ) -> BR5_W { BR5_W { w : self } } # [ doc = "Bit 6 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br6 ( & mut self ) -> BR6_W { BR6_W { w : self } } # [ doc = "Bit 7 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br7 ( & mut self ) -> BR7_W { BR7_W { w : self } } # [ doc = "Bit 8 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br8 ( & mut self ) -> BR8_W { BR8_W { w : self } } # [ doc = "Bit 9 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br9 ( & mut self ) -> BR9_W { BR9_W { w : self } } # [ doc = "Bit 10 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br10 ( & mut self ) -> BR10_W { BR10_W { w : self } } # [ doc = "Bit 11 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br11 ( & mut self ) -> BR11_W { BR11_W { w : self } } # [ doc = "Bit 12 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br12 ( & mut self ) -> BR12_W { BR12_W { w : self } } # [ doc = "Bit 13 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br13 ( & mut self ) -> BR13_W { BR13_W { w : self } } # [ doc = "Bit 14 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br14 ( & mut self ) -> BR14_W { BR14_W { w : self } } # [ doc = "Bit 15 - Port x Reset bit y" ]
# [ inline ( always ) ]
pub fn br15 ( & mut self ) -> BR15_W { BR15_W { w : self } } } } } # [ doc = "Operational Amplifier" ]
pub struct OPAMP { _marker : PhantomData < * const ( ) > } unsafe impl Send for OPAMP { } impl OPAMP { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const opamp :: RegisterBlock { 0x4001_0000 as * const _ } } impl Deref for OPAMP { type Target = opamp :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * OPAMP :: ptr ( ) } } } # [ doc = "Operational Amplifier" ]
pub mod opamp { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { _reserved0 : [ u8 ; 56usize ]
, # [ doc = "0x38 - OPAMP1 control register" ]
pub opamp1_csr : OPAMP1_CSR , # [ doc = "0x3c - OPAMP2 control register" ]
pub opamp2_csr : OPAMP2_CSR , # [ doc = "0x40 - OPAMP3 control register" ]
pub opamp3_csr : OPAMP3_CSR , # [ doc = "0x44 - OPAMP4 control register" ]
pub opamp4_csr : OPAMP4_CSR , } # [ doc = "OPAMP2 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opamp2_csr](opamp2_csr) module" ]
pub type OPAMP2_CSR = crate :: Reg < u32 , _OPAMP2_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OPAMP2_CSR ; # [ doc = "`read()` method returns [opamp2_csr::R](opamp2_csr::R) reader structure" ]
impl crate :: Readable for OPAMP2_CSR { } # [ doc = "`write(|w| ..)` method takes [opamp2_csr::W](opamp2_csr::W) writer structure" ]
impl crate :: Writable for OPAMP2_CSR { } # [ doc = "OPAMP2 control register" ]
pub mod opamp2_csr { # [ doc = "Reader of register OPAMP2_CSR" ]
pub type R = crate :: R < u32 , super :: OPAMP2_CSR > ; # [ doc = "Writer for register OPAMP2_CSR" ]
pub type W = crate :: W < u32 , super :: OPAMP2_CSR > ; # [ doc = "Register OPAMP2_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OPAMP2_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "OPAMP2 enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OPAMP2EN_A { # [ doc = "0: OPAMP2 is disabled" ]
DISABLED = 0 , # [ doc = "1: OPAMP2 is enabled" ]
ENABLED = 1 } impl From < OPAMP2EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : OPAMP2EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OPAMP2EN`" ]
pub type OPAMP2EN_R = crate :: R < bool , OPAMP2EN_A > ; impl OPAMP2EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OPAMP2EN_A { match self . bits { false => OPAMP2EN_A :: DISABLED , true => OPAMP2EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == OPAMP2EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == OPAMP2EN_A :: ENABLED } } # [ doc = "Write proxy for field `OPAMP2EN`" ]
pub struct OPAMP2EN_W < 'a > { w : & 'a mut W , } impl < 'a > OPAMP2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : OPAMP2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "OPAMP2 is disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( OPAMP2EN_A :: DISABLED ) } # [ doc = "OPAMP2 is enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( OPAMP2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "FORCE_VP\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum FORCE_VP_A { # [ doc = "0: Normal operating mode" ]
NORMAL = 0 , # [ doc = "1: Calibration mode. Non-inverting input connected to calibration reference" ]
CALIBRATION = 1 } impl From < FORCE_VP_A > for bool { # [ inline ( always ) ]
fn from ( variant : FORCE_VP_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `FORCE_VP`" ]
pub type FORCE_VP_R = crate :: R < bool , FORCE_VP_A > ; impl FORCE_VP_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> FORCE_VP_A { match self . bits { false => FORCE_VP_A :: NORMAL , true => FORCE_VP_A :: CALIBRATION } } # [ doc = "Checks if the value of the field is `NORMAL`" ]
# [ inline ( always ) ]
pub fn is_normal ( & self ) -> bool { * self == FORCE_VP_A :: NORMAL } # [ doc = "Checks if the value of the field is `CALIBRATION`" ]
# [ inline ( always ) ]
pub fn is_calibration ( & self ) -> bool { * self == FORCE_VP_A :: CALIBRATION } } # [ doc = "Write proxy for field `FORCE_VP`" ]
pub struct FORCE_VP_W < 'a > { w : & 'a mut W , } impl < 'a > FORCE_VP_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : FORCE_VP_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Normal operating mode" ]
# [ inline ( always ) ]
pub fn normal ( self ) -> & 'a mut W { self . variant ( FORCE_VP_A :: NORMAL ) } # [ doc = "Calibration mode. Non-inverting input connected to calibration reference" ]
# [ inline ( always ) ]
pub fn calibration ( self ) -> & 'a mut W { self . variant ( FORCE_VP_A :: CALIBRATION ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "OPAMP Non inverting input selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum VP_SEL_A { # [ doc = "1: PB14 used as OPAMP2 non-inverting input" ]
PB14 = 1 , # [ doc = "2: PB0 used as OPAMP2 non-inverting input" ]
PB0 = 2 , # [ doc = "3: PA7 used as OPAMP2 non-inverting input" ]
PA7 = 3 } impl From < VP_SEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : VP_SEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `VP_SEL`" ]
pub type VP_SEL_R = crate :: R < u8 , VP_SEL_A > ; impl VP_SEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , VP_SEL_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( VP_SEL_A :: PB14 ) , 2 => Val ( VP_SEL_A :: PB0 ) , 3 => Val ( VP_SEL_A :: PA7 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PB14`" ]
# [ inline ( always ) ]
pub fn is_pb14 ( & self ) -> bool { * self == VP_SEL_A :: PB14 } # [ doc = "Checks if the value of the field is `PB0`" ]
# [ inline ( always ) ]
pub fn is_pb0 ( & self ) -> bool { * self == VP_SEL_A :: PB0 } # [ doc = "Checks if the value of the field is `PA7`" ]
# [ inline ( always ) ]
pub fn is_pa7 ( & self ) -> bool { * self == VP_SEL_A :: PA7 } } # [ doc = "Write proxy for field `VP_SEL`" ]
pub struct VP_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VP_SEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : VP_SEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "PB14 used as OPAMP2 non-inverting input" ]
# [ inline ( always ) ]
pub fn pb14 ( self ) -> & 'a mut W { self . variant ( VP_SEL_A :: PB14 ) } # [ doc = "PB0 used as OPAMP2 non-inverting input" ]
# [ inline ( always ) ]
pub fn pb0 ( self ) -> & 'a mut W { self . variant ( VP_SEL_A :: PB0 ) } # [ doc = "PA7 used as OPAMP2 non-inverting input" ]
# [ inline ( always ) ]
pub fn pa7 ( self ) -> & 'a mut W { self . variant ( VP_SEL_A :: PA7 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "OPAMP inverting input selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum VM_SEL_A { # [ doc = "0: PC5 (VM0) used as OPAMP2 inverting input" ]
PC5 = 0 , # [ doc = "1: PA5 (VM1) used as OPAMP2 inverting input" ]
PA5 = 1 , # [ doc = "2: Resistor feedback output (PGA mode)" ]
PGA = 2 , # [ doc = "3: Follower mode" ]
FOLLOWER = 3 } impl From < VM_SEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : VM_SEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `VM_SEL`" ]
pub type VM_SEL_R = crate :: R < u8 , VM_SEL_A > ; impl VM_SEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> VM_SEL_A { match self . bits { 0 => VM_SEL_A :: PC5 , 1 => VM_SEL_A :: PA5 , 2 => VM_SEL_A :: PGA , 3 => VM_SEL_A :: FOLLOWER , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `PC5`" ]
# [ inline ( always ) ]
pub fn is_pc5 ( & self ) -> bool { * self == VM_SEL_A :: PC5 } # [ doc = "Checks if the value of the field is `PA5`" ]
# [ inline ( always ) ]
pub fn is_pa5 ( & self ) -> bool { * self == VM_SEL_A :: PA5 } # [ doc = "Checks if the value of the field is `PGA`" ]
# [ inline ( always ) ]
pub fn is_pga ( & self ) -> bool { * self == VM_SEL_A :: PGA } # [ doc = "Checks if the value of the field is `FOLLOWER`" ]
# [ inline ( always ) ]
pub fn is_follower ( & self ) -> bool { * self == VM_SEL_A :: FOLLOWER } } # [ doc = "Write proxy for field `VM_SEL`" ]
pub struct VM_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VM_SEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : VM_SEL_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "PC5 (VM0) used as OPAMP2 inverting input" ]
# [ inline ( always ) ]
pub fn pc5 ( self ) -> & 'a mut W { self . variant ( VM_SEL_A :: PC5 ) } # [ doc = "PA5 (VM1) used as OPAMP2 inverting input" ]
# [ inline ( always ) ]
pub fn pa5 ( self ) -> & 'a mut W { self . variant ( VM_SEL_A :: PA5 ) } # [ doc = "Resistor feedback output (PGA mode)" ]
# [ inline ( always ) ]
pub fn pga ( self ) -> & 'a mut W { self . variant ( VM_SEL_A :: PGA ) } # [ doc = "Follower mode" ]
# [ inline ( always ) ]
pub fn follower ( self ) -> & 'a mut W { self . variant ( VM_SEL_A :: FOLLOWER ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Timer controlled Mux mode enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TCM_EN_A { # [ doc = "0: Timer controlled mux disabled" ]
DISABLED = 0 , # [ doc = "1: Timer controlled mux enabled" ]
ENABLED = 1 } impl From < TCM_EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : TCM_EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TCM_EN`" ]
pub type TCM_EN_R = crate :: R < bool , TCM_EN_A > ; impl TCM_EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TCM_EN_A { match self . bits { false => TCM_EN_A :: DISABLED , true => TCM_EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == TCM_EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == TCM_EN_A :: ENABLED } } # [ doc = "Write proxy for field `TCM_EN`" ]
pub struct TCM_EN_W < 'a > { w : & 'a mut W , } impl < 'a > TCM_EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TCM_EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Timer controlled mux disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( TCM_EN_A :: DISABLED ) } # [ doc = "Timer controlled mux enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( TCM_EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "OPAMP inverting input secondary selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum VMS_SEL_A { # [ doc = "0: PC5 (VM0) used as OPAMP2 inverting input when TCM_EN=1" ]
PC5 = 0 , # [ doc = "1: PA5 (VM1) used as OPAMP2 inverting input when TCM_EN=1" ]
PA5 = 1 } impl From < VMS_SEL_A > for bool { # [ inline ( always ) ]
fn from ( variant : VMS_SEL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `VMS_SEL`" ]
pub type VMS_SEL_R = crate :: R < bool , VMS_SEL_A > ; impl VMS_SEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> VMS_SEL_A { match self . bits { false => VMS_SEL_A :: PC5 , true => VMS_SEL_A :: PA5 } } # [ doc = "Checks if the value of the field is `PC5`" ]
# [ inline ( always ) ]
pub fn is_pc5 ( & self ) -> bool { * self == VMS_SEL_A :: PC5 } # [ doc = "Checks if the value of the field is `PA5`" ]
# [ inline ( always ) ]
pub fn is_pa5 ( & self ) -> bool { * self == VMS_SEL_A :: PA5 } } # [ doc = "Write proxy for field `VMS_SEL`" ]
pub struct VMS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VMS_SEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : VMS_SEL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "PC5 (VM0) used as OPAMP2 inverting input when TCM_EN=1" ]
# [ inline ( always ) ]
pub fn pc5 ( self ) -> & 'a mut W { self . variant ( VMS_SEL_A :: PC5 ) } # [ doc = "PA5 (VM1) used as OPAMP2 inverting input when TCM_EN=1" ]
# [ inline ( always ) ]
pub fn pa5 ( self ) -> & 'a mut W { self . variant ( VMS_SEL_A :: PA5 ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "OPAMP Non inverting input secondary selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum VPS_SEL_A { # [ doc = "1: PB14 used as OPAMP2 non-inverting input when TCM_EN=1" ]
PB14 = 1 , # [ doc = "2: PB0 used as OPAMP2 non-inverting input when TCM_EN=1" ]
PB0 = 2 , # [ doc = "3: PA7 used as OPAMP2 non-inverting input when TCM_EN=1" ]
PA7 = 3 } impl From < VPS_SEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : VPS_SEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `VPS_SEL`" ]
pub type VPS_SEL_R = crate :: R < u8 , VPS_SEL_A > ; impl VPS_SEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , VPS_SEL_A > { use crate :: Variant :: * ; match self . bits { 1 => Val ( VPS_SEL_A :: PB14 ) , 2 => Val ( VPS_SEL_A :: PB0 ) , 3 => Val ( VPS_SEL_A :: PA7 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `PB14`" ]
# [ inline ( always ) ]
pub fn is_pb14 ( & self ) -> bool { * self == VPS_SEL_A :: PB14 } # [ doc = "Checks if the value of the field is `PB0`" ]
# [ inline ( always ) ]
pub fn is_pb0 ( & self ) -> bool { * self == VPS_SEL_A :: PB0 } # [ doc = "Checks if the value of the field is `PA7`" ]
# [ inline ( always ) ]
pub fn is_pa7 ( & self ) -> bool { * self == VPS_SEL_A :: PA7 } } # [ doc = "Write proxy for field `VPS_SEL`" ]
pub struct VPS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VPS_SEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : VPS_SEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "PB14 used as OPAMP2 non-inverting input when TCM_EN=1" ]
# [ inline ( always ) ]
pub fn pb14 ( self ) -> & 'a mut W { self . variant ( VPS_SEL_A :: PB14 ) } # [ doc = "PB0 used as OPAMP2 non-inverting input when TCM_EN=1" ]
# [ inline ( always ) ]
pub fn pb0 ( self ) -> & 'a mut W { self . variant ( VPS_SEL_A :: PB0 ) } # [ doc = "PA7 used as OPAMP2 non-inverting input when TCM_EN=1" ]
# [ inline ( always ) ]
pub fn pa7 ( self ) -> & 'a mut W { self . variant ( VPS_SEL_A :: PA7 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Calibration mode enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum CALON_A { # [ doc = "0: Calibration mode disabled" ]
DISABLED = 0 , # [ doc = "1: Calibration mode enabled" ]
ENABLED = 1 } impl From < CALON_A > for bool { # [ inline ( always ) ]
fn from ( variant : CALON_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `CALON`" ]
pub type CALON_R = crate :: R < bool , CALON_A > ; impl CALON_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CALON_A { match self . bits { false => CALON_A :: DISABLED , true => CALON_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == CALON_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == CALON_A :: ENABLED } } # [ doc = "Write proxy for field `CALON`" ]
pub struct CALON_W < 'a > { w : & 'a mut W , } impl < 'a > CALON_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CALON_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Calibration mode disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( CALON_A :: DISABLED ) } # [ doc = "Calibration mode enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( CALON_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Calibration selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum CALSEL_A { # [ doc = "0: VREFOPAMP=3.3% VDDA" ]
PERCENT3_3 = 0 , # [ doc = "1: VREFOPAMP=10% VDDA" ]
PERCENT10 = 1 , # [ doc = "2: VREFOPAMP=50% VDDA" ]
PERCENT50 = 2 , # [ doc = "3: VREFOPAMP=90% VDDA" ]
PERCENT90 = 3 } impl From < CALSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : CALSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `CALSEL`" ]
pub type CALSEL_R = crate :: R < u8 , CALSEL_A > ; impl CALSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> CALSEL_A { match self . bits { 0 => CALSEL_A :: PERCENT3_3 , 1 => CALSEL_A :: PERCENT10 , 2 => CALSEL_A :: PERCENT50 , 3 => CALSEL_A :: PERCENT90 , _ => unreachable ! ( ) } } # [ doc = "Checks if the value of the field is `PERCENT3_3`" ]
# [ inline ( always ) ]
pub fn is_percent3_3 ( & self ) -> bool { * self == CALSEL_A :: PERCENT3_3 } # [ doc = "Checks if the value of the field is `PERCENT10`" ]
# [ inline ( always ) ]
pub fn is_percent10 ( & self ) -> bool { * self == CALSEL_A :: PERCENT10 } # [ doc = "Checks if the value of the field is `PERCENT50`" ]
# [ inline ( always ) ]
pub fn is_percent50 ( & self ) -> bool { * self == CALSEL_A :: PERCENT50 } # [ doc = "Checks if the value of the field is `PERCENT90`" ]
# [ inline ( always ) ]
pub fn is_percent90 ( & self ) -> bool { * self == CALSEL_A :: PERCENT90 } } # [ doc = "Write proxy for field `CALSEL`" ]
pub struct CALSEL_W < 'a > { w : & 'a mut W , } impl < 'a > CALSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : CALSEL_A ) -> & 'a mut W { { self . bits ( variant . into ( ) ) } } # [ doc = "VREFOPAMP=3.3% VDDA" ]
# [ inline ( always ) ]
pub fn percent3_3 ( self ) -> & 'a mut W { self . variant ( CALSEL_A :: PERCENT3_3 ) } # [ doc = "VREFOPAMP=10% VDDA" ]
# [ inline ( always ) ]
pub fn percent10 ( self ) -> & 'a mut W { self . variant ( CALSEL_A :: PERCENT10 ) } # [ doc = "VREFOPAMP=50% VDDA" ]
# [ inline ( always ) ]
pub fn percent50 ( self ) -> & 'a mut W { self . variant ( CALSEL_A :: PERCENT50 ) } # [ doc = "VREFOPAMP=90% VDDA" ]
# [ inline ( always ) ]
pub fn percent90 ( self ) -> & 'a mut W { self . variant ( CALSEL_A :: PERCENT90 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Gain in PGA mode\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum PGA_GAIN_A { # [ doc = "0: Gain 2" ]
GAIN2 = 0 , # [ doc = "1: Gain 4" ]
GAIN4 = 1 , # [ doc = "2: Gain 8" ]
GAIN8 = 2 , # [ doc = "4: Gain 16" ]
GAIN16 = 4 , # [ doc = "8: Gain 2, feedback connected to VM0" ]
GAIN2_VM0 = 8 , # [ doc = "9: Gain 4, feedback connected to VM0" ]
GAIN4_VM0 = 9 , # [ doc = "10: Gain 8, feedback connected to VM0" ]
GAIN8_VM0 = 10 , # [ doc = "11: Gain 16, feedback connected to VM0" ]
GAIN16_VM0 = 11 , # [ doc = "12: Gain 2, feedback connected to VM1" ]
GAIN2_VM1 = 12 , # [ doc = "13: Gain 4, feedback connected to VM1" ]
GAIN4_VM1 = 13 , # [ doc = "14: Gain 8, feedback connected to VM1" ]
GAIN8_VM1 = 14 , # [ doc = "15: Gain 16, feedback connected to VM1" ]
GAIN16_VM1 = 15 } impl From < PGA_GAIN_A > for u8 { # [ inline ( always ) ]
fn from ( variant : PGA_GAIN_A ) -> Self { variant as _ } } # [ doc = "Reader of field `PGA_GAIN`" ]
pub type PGA_GAIN_R = crate :: R < u8 , PGA_GAIN_A > ; impl PGA_GAIN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , PGA_GAIN_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( PGA_GAIN_A :: GAIN2 ) , 1 => Val ( PGA_GAIN_A :: GAIN4 ) , 2 => Val ( PGA_GAIN_A :: GAIN8 ) , 4 => Val ( PGA_GAIN_A :: GAIN16 ) , 8 => Val ( PGA_GAIN_A :: GAIN2_VM0 ) , 9 => Val ( PGA_GAIN_A :: GAIN4_VM0 ) , 10 => Val ( PGA_GAIN_A :: GAIN8_VM0 ) , 11 => Val ( PGA_GAIN_A :: GAIN16_VM0 ) , 12 => Val ( PGA_GAIN_A :: GAIN2_VM1 ) , 13 => Val ( PGA_GAIN_A :: GAIN4_VM1 ) , 14 => Val ( PGA_GAIN_A :: GAIN8_VM1 ) , 15 => Val ( PGA_GAIN_A :: GAIN16_VM1 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `GAIN2`" ]
# [ inline ( always ) ]
pub fn is_gain2 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN2 } # [ doc = "Checks if the value of the field is `GAIN4`" ]
# [ inline ( always ) ]
pub fn is_gain4 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN4 } # [ doc = "Checks if the value of the field is `GAIN8`" ]
# [ inline ( always ) ]
pub fn is_gain8 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN8 } # [ doc = "Checks if the value of the field is `GAIN16`" ]
# [ inline ( always ) ]
pub fn is_gain16 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN16 } # [ doc = "Checks if the value of the field is `GAIN2_VM0`" ]
# [ inline ( always ) ]
pub fn is_gain2_vm0 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN2_VM0 } # [ doc = "Checks if the value of the field is `GAIN4_VM0`" ]
# [ inline ( always ) ]
pub fn is_gain4_vm0 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN4_VM0 } # [ doc = "Checks if the value of the field is `GAIN8_VM0`" ]
# [ inline ( always ) ]
pub fn is_gain8_vm0 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN8_VM0 } # [ doc = "Checks if the value of the field is `GAIN16_VM0`" ]
# [ inline ( always ) ]
pub fn is_gain16_vm0 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN16_VM0 } # [ doc = "Checks if the value of the field is `GAIN2_VM1`" ]
# [ inline ( always ) ]
pub fn is_gain2_vm1 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN2_VM1 } # [ doc = "Checks if the value of the field is `GAIN4_VM1`" ]
# [ inline ( always ) ]
pub fn is_gain4_vm1 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN4_VM1 } # [ doc = "Checks if the value of the field is `GAIN8_VM1`" ]
# [ inline ( always ) ]
pub fn is_gain8_vm1 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN8_VM1 } # [ doc = "Checks if the value of the field is `GAIN16_VM1`" ]
# [ inline ( always ) ]
pub fn is_gain16_vm1 ( & self ) -> bool { * self == PGA_GAIN_A :: GAIN16_VM1 } } # [ doc = "Write proxy for field `PGA_GAIN`" ]
pub struct PGA_GAIN_W < 'a > { w : & 'a mut W , } impl < 'a > PGA_GAIN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : PGA_GAIN_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "Gain 2" ]
# [ inline ( always ) ]
pub fn gain2 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN2 ) } # [ doc = "Gain 4" ]
# [ inline ( always ) ]
pub fn gain4 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN4 ) } # [ doc = "Gain 8" ]
# [ inline ( always ) ]
pub fn gain8 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN8 ) } # [ doc = "Gain 16" ]
# [ inline ( always ) ]
pub fn gain16 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN16 ) } # [ doc = "Gain 2, feedback connected to VM0" ]
# [ inline ( always ) ]
pub fn gain2_vm0 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN2_VM0 ) } # [ doc = "Gain 4, feedback connected to VM0" ]
# [ inline ( always ) ]
pub fn gain4_vm0 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN4_VM0 ) } # [ doc = "Gain 8, feedback connected to VM0" ]
# [ inline ( always ) ]
pub fn gain8_vm0 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN8_VM0 ) } # [ doc = "Gain 16, feedback connected to VM0" ]
# [ inline ( always ) ]
pub fn gain16_vm0 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN16_VM0 ) } # [ doc = "Gain 2, feedback connected to VM1" ]
# [ inline ( always ) ]
pub fn gain2_vm1 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN2_VM1 ) } # [ doc = "Gain 4, feedback connected to VM1" ]
# [ inline ( always ) ]
pub fn gain4_vm1 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN4_VM1 ) } # [ doc = "Gain 8, feedback connected to VM1" ]
# [ inline ( always ) ]
pub fn gain8_vm1 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN8_VM1 ) } # [ doc = "Gain 16, feedback connected to VM1" ]
# [ inline ( always ) ]
pub fn gain16_vm1 ( self ) -> & 'a mut W { self . variant ( PGA_GAIN_A :: GAIN16_VM1 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 14 ) ) | ( ( ( value as u32 ) & 0x0f ) << 14 ) ; self . w } } # [ doc = "User trimming enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum USER_TRIM_A { # [ doc = "0: User trimming disabled" ]
DISABLED = 0 , # [ doc = "1: User trimming enabled" ]
ENABLED = 1 } impl From < USER_TRIM_A > for bool { # [ inline ( always ) ]
fn from ( variant : USER_TRIM_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `USER_TRIM`" ]
pub type USER_TRIM_R = crate :: R < bool , USER_TRIM_A > ; impl USER_TRIM_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> USER_TRIM_A { match self . bits { false => USER_TRIM_A :: DISABLED , true => USER_TRIM_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == USER_TRIM_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == USER_TRIM_A :: ENABLED } } # [ doc = "Write proxy for field `USER_TRIM`" ]
pub struct USER_TRIM_W < 'a > { w : & 'a mut W , } impl < 'a > USER_TRIM_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : USER_TRIM_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "User trimming disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( USER_TRIM_A :: DISABLED ) } # [ doc = "User trimming enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( USER_TRIM_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETP`" ]
pub type TRIMOFFSETP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETP`" ]
pub struct TRIMOFFSETP_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 19 ) ) | ( ( ( value as u32 ) & 0x1f ) << 19 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETN`" ]
pub type TRIMOFFSETN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETN`" ]
pub struct TRIMOFFSETN_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 24 ) ) | ( ( ( value as u32 ) & 0x1f ) << 24 ) ; self . w } } # [ doc = "TSTREF\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum TSTREF_A { # [ doc = "0: VREFOPAMP2 is output" ]
OUTPUT = 0 , # [ doc = "1: VREFOPAMP2 is not output" ]
NOTOUTPUT = 1 } impl From < TSTREF_A > for bool { # [ inline ( always ) ]
fn from ( variant : TSTREF_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `TSTREF`" ]
pub type TSTREF_R = crate :: R < bool , TSTREF_A > ; impl TSTREF_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> TSTREF_A { match self . bits { false => TSTREF_A :: OUTPUT , true => TSTREF_A :: NOTOUTPUT } } # [ doc = "Checks if the value of the field is `OUTPUT`" ]
# [ inline ( always ) ]
pub fn is_output ( & self ) -> bool { * self == TSTREF_A :: OUTPUT } # [ doc = "Checks if the value of the field is `NOTOUTPUT`" ]
# [ inline ( always ) ]
pub fn is_not_output ( & self ) -> bool { * self == TSTREF_A :: NOTOUTPUT } } # [ doc = "Write proxy for field `TSTREF`" ]
pub struct TSTREF_W < 'a > { w : & 'a mut W , } impl < 'a > TSTREF_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : TSTREF_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "VREFOPAMP2 is output" ]
# [ inline ( always ) ]
pub fn output ( self ) -> & 'a mut W { self . variant ( TSTREF_A :: OUTPUT ) } # [ doc = "VREFOPAMP2 is not output" ]
# [ inline ( always ) ]
pub fn not_output ( self ) -> & 'a mut W { self . variant ( TSTREF_A :: NOTOUTPUT ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "OPAMP ouput status flag\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum OUTCAL_A { # [ doc = "0: Non-inverting < inverting" ]
LOW = 0 , # [ doc = "1: Non-inverting > inverting" ]
HIGH = 1 } impl From < OUTCAL_A > for bool { # [ inline ( always ) ]
fn from ( variant : OUTCAL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `OUTCAL`" ]
pub type OUTCAL_R = crate :: R < bool , OUTCAL_A > ; impl OUTCAL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> OUTCAL_A { match self . bits { false => OUTCAL_A :: LOW , true => OUTCAL_A :: HIGH } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == OUTCAL_A :: LOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == OUTCAL_A :: HIGH } } # [ doc = "OPAMP lock\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum LOCK_A { # [ doc = "0: Comparator CSR bits are read-write" ]
UNLOCKED = 0 , # [ doc = "1: Comparator CSR bits are read-only" ]
LOCKED = 1 } impl From < LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < bool , LOCK_A > ; impl LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> LOCK_A { match self . bits { false => LOCK_A :: UNLOCKED , true => LOCK_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == LOCK_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == LOCK_A :: LOCKED } } # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : LOCK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Comparator CSR bits are read-write" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( LOCK_A :: UNLOCKED ) } # [ doc = "Comparator CSR bits are read-only" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( LOCK_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - OPAMP2 enable" ]
# [ inline ( always ) ]
pub fn opamp2en ( & self ) -> OPAMP2EN_R { OPAMP2EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & self ) -> FORCE_VP_R { FORCE_VP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & self ) -> VP_SEL_R { VP_SEL_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & self ) -> VM_SEL_R { VM_SEL_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & self ) -> TCM_EN_R { TCM_EN_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & self ) -> VMS_SEL_R { VMS_SEL_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & self ) -> VPS_SEL_R { VPS_SEL_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & self ) -> CALON_R { CALON_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & self ) -> CALSEL_R { CALSEL_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & self ) -> PGA_GAIN_R { PGA_GAIN_R :: new ( ( ( self . bits >> 14 ) & 0x0f ) as u8 ) } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & self ) -> USER_TRIM_R { USER_TRIM_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & self ) -> TRIMOFFSETP_R { TRIMOFFSETP_R :: new ( ( ( self . bits >> 19 ) & 0x1f ) as u8 ) } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & self ) -> TRIMOFFSETN_R { TRIMOFFSETN_R :: new ( ( ( self . bits >> 24 ) & 0x1f ) as u8 ) } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & self ) -> TSTREF_R { TSTREF_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - OPAMP ouput status flag" ]
# [ inline ( always ) ]
pub fn outcal ( & self ) -> OUTCAL_R { OUTCAL_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - OPAMP2 enable" ]
# [ inline ( always ) ]
pub fn opamp2en ( & mut self ) -> OPAMP2EN_W { OPAMP2EN_W { w : self } } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & mut self ) -> FORCE_VP_W { FORCE_VP_W { w : self } } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & mut self ) -> VP_SEL_W { VP_SEL_W { w : self } } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & mut self ) -> VM_SEL_W { VM_SEL_W { w : self } } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & mut self ) -> TCM_EN_W { TCM_EN_W { w : self } } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & mut self ) -> VMS_SEL_W { VMS_SEL_W { w : self } } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & mut self ) -> VPS_SEL_W { VPS_SEL_W { w : self } } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & mut self ) -> CALON_W { CALON_W { w : self } } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & mut self ) -> CALSEL_W { CALSEL_W { w : self } } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & mut self ) -> PGA_GAIN_W { PGA_GAIN_W { w : self } } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & mut self ) -> USER_TRIM_W { USER_TRIM_W { w : self } } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & mut self ) -> TRIMOFFSETP_W { TRIMOFFSETP_W { w : self } } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & mut self ) -> TRIMOFFSETN_W { TRIMOFFSETN_W { w : self } } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & mut self ) -> TSTREF_W { TSTREF_W { w : self } } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } } } # [ doc = "OPAMP3 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opamp3_csr](opamp3_csr) module" ]
pub type OPAMP3_CSR = crate :: Reg < u32 , _OPAMP3_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OPAMP3_CSR ; # [ doc = "`read()` method returns [opamp3_csr::R](opamp3_csr::R) reader structure" ]
impl crate :: Readable for OPAMP3_CSR { } # [ doc = "`write(|w| ..)` method takes [opamp3_csr::W](opamp3_csr::W) writer structure" ]
impl crate :: Writable for OPAMP3_CSR { } # [ doc = "OPAMP3 control register" ]
pub mod opamp3_csr { # [ doc = "Reader of register OPAMP3_CSR" ]
pub type R = crate :: R < u32 , super :: OPAMP3_CSR > ; # [ doc = "Writer for register OPAMP3_CSR" ]
pub type W = crate :: W < u32 , super :: OPAMP3_CSR > ; # [ doc = "Register OPAMP3_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OPAMP3_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OPAMP3EN`" ]
pub type OPAMP3EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OPAMP3EN`" ]
pub struct OPAMP3EN_W < 'a > { w : & 'a mut W , } impl < 'a > OPAMP3EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FORCE_VP`" ]
pub type FORCE_VP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FORCE_VP`" ]
pub struct FORCE_VP_W < 'a > { w : & 'a mut W , } impl < 'a > FORCE_VP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `VP_SEL`" ]
pub type VP_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VP_SEL`" ]
pub struct VP_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VP_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `VM_SEL`" ]
pub type VM_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VM_SEL`" ]
pub struct VM_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VM_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Reader of field `TCM_EN`" ]
pub type TCM_EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TCM_EN`" ]
pub struct TCM_EN_W < 'a > { w : & 'a mut W , } impl < 'a > TCM_EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `VMS_SEL`" ]
pub type VMS_SEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `VMS_SEL`" ]
pub struct VMS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VMS_SEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `VPS_SEL`" ]
pub type VPS_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VPS_SEL`" ]
pub struct VPS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VPS_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CALON`" ]
pub type CALON_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CALON`" ]
pub struct CALON_W < 'a > { w : & 'a mut W , } impl < 'a > CALON_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `CALSEL`" ]
pub type CALSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CALSEL`" ]
pub struct CALSEL_W < 'a > { w : & 'a mut W , } impl < 'a > CALSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `PGA_GAIN`" ]
pub type PGA_GAIN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PGA_GAIN`" ]
pub struct PGA_GAIN_W < 'a > { w : & 'a mut W , } impl < 'a > PGA_GAIN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 14 ) ) | ( ( ( value as u32 ) & 0x0f ) << 14 ) ; self . w } } # [ doc = "Reader of field `USER_TRIM`" ]
pub type USER_TRIM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `USER_TRIM`" ]
pub struct USER_TRIM_W < 'a > { w : & 'a mut W , } impl < 'a > USER_TRIM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETP`" ]
pub type TRIMOFFSETP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETP`" ]
pub struct TRIMOFFSETP_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 19 ) ) | ( ( ( value as u32 ) & 0x1f ) << 19 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETN`" ]
pub type TRIMOFFSETN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETN`" ]
pub struct TRIMOFFSETN_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 24 ) ) | ( ( ( value as u32 ) & 0x1f ) << 24 ) ; self . w } } # [ doc = "Reader of field `TSTREF`" ]
pub type TSTREF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TSTREF`" ]
pub struct TSTREF_W < 'a > { w : & 'a mut W , } impl < 'a > TSTREF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `OUTCAL`" ]
pub type OUTCAL_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - OPAMP3 enable" ]
# [ inline ( always ) ]
pub fn opamp3en ( & self ) -> OPAMP3EN_R { OPAMP3EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & self ) -> FORCE_VP_R { FORCE_VP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & self ) -> VP_SEL_R { VP_SEL_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & self ) -> VM_SEL_R { VM_SEL_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & self ) -> TCM_EN_R { TCM_EN_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & self ) -> VMS_SEL_R { VMS_SEL_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & self ) -> VPS_SEL_R { VPS_SEL_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & self ) -> CALON_R { CALON_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & self ) -> CALSEL_R { CALSEL_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & self ) -> PGA_GAIN_R { PGA_GAIN_R :: new ( ( ( self . bits >> 14 ) & 0x0f ) as u8 ) } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & self ) -> USER_TRIM_R { USER_TRIM_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & self ) -> TRIMOFFSETP_R { TRIMOFFSETP_R :: new ( ( ( self . bits >> 19 ) & 0x1f ) as u8 ) } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & self ) -> TRIMOFFSETN_R { TRIMOFFSETN_R :: new ( ( ( self . bits >> 24 ) & 0x1f ) as u8 ) } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & self ) -> TSTREF_R { TSTREF_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - OPAMP ouput status flag" ]
# [ inline ( always ) ]
pub fn outcal ( & self ) -> OUTCAL_R { OUTCAL_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - OPAMP3 enable" ]
# [ inline ( always ) ]
pub fn opamp3en ( & mut self ) -> OPAMP3EN_W { OPAMP3EN_W { w : self } } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & mut self ) -> FORCE_VP_W { FORCE_VP_W { w : self } } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & mut self ) -> VP_SEL_W { VP_SEL_W { w : self } } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & mut self ) -> VM_SEL_W { VM_SEL_W { w : self } } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & mut self ) -> TCM_EN_W { TCM_EN_W { w : self } } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & mut self ) -> VMS_SEL_W { VMS_SEL_W { w : self } } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & mut self ) -> VPS_SEL_W { VPS_SEL_W { w : self } } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & mut self ) -> CALON_W { CALON_W { w : self } } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & mut self ) -> CALSEL_W { CALSEL_W { w : self } } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & mut self ) -> PGA_GAIN_W { PGA_GAIN_W { w : self } } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & mut self ) -> USER_TRIM_W { USER_TRIM_W { w : self } } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & mut self ) -> TRIMOFFSETP_W { TRIMOFFSETP_W { w : self } } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & mut self ) -> TRIMOFFSETN_W { TRIMOFFSETN_W { w : self } } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & mut self ) -> TSTREF_W { TSTREF_W { w : self } } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } } } # [ doc = "OPAMP4 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opamp4_csr](opamp4_csr) module" ]
pub type OPAMP4_CSR = crate :: Reg < u32 , _OPAMP4_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OPAMP4_CSR ; # [ doc = "`read()` method returns [opamp4_csr::R](opamp4_csr::R) reader structure" ]
impl crate :: Readable for OPAMP4_CSR { } # [ doc = "`write(|w| ..)` method takes [opamp4_csr::W](opamp4_csr::W) writer structure" ]
impl crate :: Writable for OPAMP4_CSR { } # [ doc = "OPAMP4 control register" ]
pub mod opamp4_csr { # [ doc = "Reader of register OPAMP4_CSR" ]
pub type R = crate :: R < u32 , super :: OPAMP4_CSR > ; # [ doc = "Writer for register OPAMP4_CSR" ]
pub type W = crate :: W < u32 , super :: OPAMP4_CSR > ; # [ doc = "Register OPAMP4_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OPAMP4_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OPAMP4EN`" ]
pub type OPAMP4EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OPAMP4EN`" ]
pub struct OPAMP4EN_W < 'a > { w : & 'a mut W , } impl < 'a > OPAMP4EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FORCE_VP`" ]
pub type FORCE_VP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FORCE_VP`" ]
pub struct FORCE_VP_W < 'a > { w : & 'a mut W , } impl < 'a > FORCE_VP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `VP_SEL`" ]
pub type VP_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VP_SEL`" ]
pub struct VP_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VP_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `VM_SEL`" ]
pub type VM_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VM_SEL`" ]
pub struct VM_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VM_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Reader of field `TCM_EN`" ]
pub type TCM_EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TCM_EN`" ]
pub struct TCM_EN_W < 'a > { w : & 'a mut W , } impl < 'a > TCM_EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `VMS_SEL`" ]
pub type VMS_SEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `VMS_SEL`" ]
pub struct VMS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VMS_SEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `VPS_SEL`" ]
pub type VPS_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VPS_SEL`" ]
pub struct VPS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VPS_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CALON`" ]
pub type CALON_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CALON`" ]
pub struct CALON_W < 'a > { w : & 'a mut W , } impl < 'a > CALON_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `CALSEL`" ]
pub type CALSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CALSEL`" ]
pub struct CALSEL_W < 'a > { w : & 'a mut W , } impl < 'a > CALSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `PGA_GAIN`" ]
pub type PGA_GAIN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PGA_GAIN`" ]
pub struct PGA_GAIN_W < 'a > { w : & 'a mut W , } impl < 'a > PGA_GAIN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 14 ) ) | ( ( ( value as u32 ) & 0x0f ) << 14 ) ; self . w } } # [ doc = "Reader of field `USER_TRIM`" ]
pub type USER_TRIM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `USER_TRIM`" ]
pub struct USER_TRIM_W < 'a > { w : & 'a mut W , } impl < 'a > USER_TRIM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETP`" ]
pub type TRIMOFFSETP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETP`" ]
pub struct TRIMOFFSETP_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 19 ) ) | ( ( ( value as u32 ) & 0x1f ) << 19 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETN`" ]
pub type TRIMOFFSETN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETN`" ]
pub struct TRIMOFFSETN_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 24 ) ) | ( ( ( value as u32 ) & 0x1f ) << 24 ) ; self . w } } # [ doc = "Reader of field `TSTREF`" ]
pub type TSTREF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TSTREF`" ]
pub struct TSTREF_W < 'a > { w : & 'a mut W , } impl < 'a > TSTREF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `OUTCAL`" ]
pub type OUTCAL_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - OPAMP4 enable" ]
# [ inline ( always ) ]
pub fn opamp4en ( & self ) -> OPAMP4EN_R { OPAMP4EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & self ) -> FORCE_VP_R { FORCE_VP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & self ) -> VP_SEL_R { VP_SEL_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & self ) -> VM_SEL_R { VM_SEL_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & self ) -> TCM_EN_R { TCM_EN_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & self ) -> VMS_SEL_R { VMS_SEL_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & self ) -> VPS_SEL_R { VPS_SEL_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & self ) -> CALON_R { CALON_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & self ) -> CALSEL_R { CALSEL_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & self ) -> PGA_GAIN_R { PGA_GAIN_R :: new ( ( ( self . bits >> 14 ) & 0x0f ) as u8 ) } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & self ) -> USER_TRIM_R { USER_TRIM_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & self ) -> TRIMOFFSETP_R { TRIMOFFSETP_R :: new ( ( ( self . bits >> 19 ) & 0x1f ) as u8 ) } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & self ) -> TRIMOFFSETN_R { TRIMOFFSETN_R :: new ( ( ( self . bits >> 24 ) & 0x1f ) as u8 ) } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & self ) -> TSTREF_R { TSTREF_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - OPAMP ouput status flag" ]
# [ inline ( always ) ]
pub fn outcal ( & self ) -> OUTCAL_R { OUTCAL_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - OPAMP4 enable" ]
# [ inline ( always ) ]
pub fn opamp4en ( & mut self ) -> OPAMP4EN_W { OPAMP4EN_W { w : self } } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & mut self ) -> FORCE_VP_W { FORCE_VP_W { w : self } } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & mut self ) -> VP_SEL_W { VP_SEL_W { w : self } } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & mut self ) -> VM_SEL_W { VM_SEL_W { w : self } } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & mut self ) -> TCM_EN_W { TCM_EN_W { w : self } } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & mut self ) -> VMS_SEL_W { VMS_SEL_W { w : self } } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & mut self ) -> VPS_SEL_W { VPS_SEL_W { w : self } } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & mut self ) -> CALON_W { CALON_W { w : self } } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & mut self ) -> CALSEL_W { CALSEL_W { w : self } } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & mut self ) -> PGA_GAIN_W { PGA_GAIN_W { w : self } } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & mut self ) -> USER_TRIM_W { USER_TRIM_W { w : self } } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & mut self ) -> TRIMOFFSETP_W { TRIMOFFSETP_W { w : self } } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & mut self ) -> TRIMOFFSETN_W { TRIMOFFSETN_W { w : self } } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & mut self ) -> TSTREF_W { TSTREF_W { w : self } } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } } } # [ doc = "OPAMP1 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opamp1_csr](opamp1_csr) module" ]
pub type OPAMP1_CSR = crate :: Reg < u32 , _OPAMP1_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _OPAMP1_CSR ; # [ doc = "`read()` method returns [opamp1_csr::R](opamp1_csr::R) reader structure" ]
impl crate :: Readable for OPAMP1_CSR { } # [ doc = "`write(|w| ..)` method takes [opamp1_csr::W](opamp1_csr::W) writer structure" ]
impl crate :: Writable for OPAMP1_CSR { } # [ doc = "OPAMP1 control register" ]
pub mod opamp1_csr { # [ doc = "Reader of register OPAMP1_CSR" ]
pub type R = crate :: R < u32 , super :: OPAMP1_CSR > ; # [ doc = "Writer for register OPAMP1_CSR" ]
pub type W = crate :: W < u32 , super :: OPAMP1_CSR > ; # [ doc = "Register OPAMP1_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: OPAMP1_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `OPAMP1EN`" ]
pub type OPAMP1EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `OPAMP1EN`" ]
pub struct OPAMP1EN_W < 'a > { w : & 'a mut W , } impl < 'a > OPAMP1EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `FORCE_VP`" ]
pub type FORCE_VP_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `FORCE_VP`" ]
pub struct FORCE_VP_W < 'a > { w : & 'a mut W , } impl < 'a > FORCE_VP_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `VP_SEL`" ]
pub type VP_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VP_SEL`" ]
pub struct VP_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VP_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `VM_SEL`" ]
pub type VM_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VM_SEL`" ]
pub struct VM_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VM_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 5 ) ) | ( ( ( value as u32 ) & 0x03 ) << 5 ) ; self . w } } # [ doc = "Reader of field `TCM_EN`" ]
pub type TCM_EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TCM_EN`" ]
pub struct TCM_EN_W < 'a > { w : & 'a mut W , } impl < 'a > TCM_EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `VMS_SEL`" ]
pub type VMS_SEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `VMS_SEL`" ]
pub struct VMS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VMS_SEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 8 ) ) | ( ( ( value as u32 ) & 0x01 ) << 8 ) ; self . w } } # [ doc = "Reader of field `VPS_SEL`" ]
pub type VPS_SEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `VPS_SEL`" ]
pub struct VPS_SEL_W < 'a > { w : & 'a mut W , } impl < 'a > VPS_SEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 9 ) ) | ( ( ( value as u32 ) & 0x03 ) << 9 ) ; self . w } } # [ doc = "Reader of field `CALON`" ]
pub type CALON_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `CALON`" ]
pub struct CALON_W < 'a > { w : & 'a mut W , } impl < 'a > CALON_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 11 ) ) | ( ( ( value as u32 ) & 0x01 ) << 11 ) ; self . w } } # [ doc = "Reader of field `CALSEL`" ]
pub type CALSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `CALSEL`" ]
pub struct CALSEL_W < 'a > { w : & 'a mut W , } impl < 'a > CALSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 12 ) ) | ( ( ( value as u32 ) & 0x03 ) << 12 ) ; self . w } } # [ doc = "Reader of field `PGA_GAIN`" ]
pub type PGA_GAIN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `PGA_GAIN`" ]
pub struct PGA_GAIN_W < 'a > { w : & 'a mut W , } impl < 'a > PGA_GAIN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 14 ) ) | ( ( ( value as u32 ) & 0x0f ) << 14 ) ; self . w } } # [ doc = "Reader of field `USER_TRIM`" ]
pub type USER_TRIM_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `USER_TRIM`" ]
pub struct USER_TRIM_W < 'a > { w : & 'a mut W , } impl < 'a > USER_TRIM_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 18 ) ) | ( ( ( value as u32 ) & 0x01 ) << 18 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETP`" ]
pub type TRIMOFFSETP_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETP`" ]
pub struct TRIMOFFSETP_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETP_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 19 ) ) | ( ( ( value as u32 ) & 0x1f ) << 19 ) ; self . w } } # [ doc = "Reader of field `TRIMOFFSETN`" ]
pub type TRIMOFFSETN_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `TRIMOFFSETN`" ]
pub struct TRIMOFFSETN_W < 'a > { w : & 'a mut W , } impl < 'a > TRIMOFFSETN_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x1f << 24 ) ) | ( ( ( value as u32 ) & 0x1f ) << 24 ) ; self . w } } # [ doc = "Reader of field `TSTREF`" ]
pub type TSTREF_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `TSTREF`" ]
pub struct TSTREF_W < 'a > { w : & 'a mut W , } impl < 'a > TSTREF_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 29 ) ) | ( ( ( value as u32 ) & 0x01 ) << 29 ) ; self . w } } # [ doc = "Reader of field `OUTCAL`" ]
pub type OUTCAL_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `LOCK`" ]
pub type LOCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `LOCK`" ]
pub struct LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > LOCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - OPAMP1 enable" ]
# [ inline ( always ) ]
pub fn opamp1en ( & self ) -> OPAMP1EN_R { OPAMP1EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & self ) -> FORCE_VP_R { FORCE_VP_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & self ) -> VP_SEL_R { VP_SEL_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & self ) -> VM_SEL_R { VM_SEL_R :: new ( ( ( self . bits >> 5 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & self ) -> TCM_EN_R { TCM_EN_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & self ) -> VMS_SEL_R { VMS_SEL_R :: new ( ( ( self . bits >> 8 ) & 0x01 ) != 0 ) } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & self ) -> VPS_SEL_R { VPS_SEL_R :: new ( ( ( self . bits >> 9 ) & 0x03 ) as u8 ) } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & self ) -> CALON_R { CALON_R :: new ( ( ( self . bits >> 11 ) & 0x01 ) != 0 ) } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & self ) -> CALSEL_R { CALSEL_R :: new ( ( ( self . bits >> 12 ) & 0x03 ) as u8 ) } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & self ) -> PGA_GAIN_R { PGA_GAIN_R :: new ( ( ( self . bits >> 14 ) & 0x0f ) as u8 ) } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & self ) -> USER_TRIM_R { USER_TRIM_R :: new ( ( ( self . bits >> 18 ) & 0x01 ) != 0 ) } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & self ) -> TRIMOFFSETP_R { TRIMOFFSETP_R :: new ( ( ( self . bits >> 19 ) & 0x1f ) as u8 ) } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & self ) -> TRIMOFFSETN_R { TRIMOFFSETN_R :: new ( ( ( self . bits >> 24 ) & 0x1f ) as u8 ) } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & self ) -> TSTREF_R { TSTREF_R :: new ( ( ( self . bits >> 29 ) & 0x01 ) != 0 ) } # [ doc = "Bit 30 - OPAMP ouput status flag" ]
# [ inline ( always ) ]
pub fn outcal ( & self ) -> OUTCAL_R { OUTCAL_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & self ) -> LOCK_R { LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - OPAMP1 enable" ]
# [ inline ( always ) ]
pub fn opamp1en ( & mut self ) -> OPAMP1EN_W { OPAMP1EN_W { w : self } } # [ doc = "Bit 1 - FORCE_VP" ]
# [ inline ( always ) ]
pub fn force_vp ( & mut self ) -> FORCE_VP_W { FORCE_VP_W { w : self } } # [ doc = "Bits 2:3 - OPAMP Non inverting input selection" ]
# [ inline ( always ) ]
pub fn vp_sel ( & mut self ) -> VP_SEL_W { VP_SEL_W { w : self } } # [ doc = "Bits 5:6 - OPAMP inverting input selection" ]
# [ inline ( always ) ]
pub fn vm_sel ( & mut self ) -> VM_SEL_W { VM_SEL_W { w : self } } # [ doc = "Bit 7 - Timer controlled Mux mode enable" ]
# [ inline ( always ) ]
pub fn tcm_en ( & mut self ) -> TCM_EN_W { TCM_EN_W { w : self } } # [ doc = "Bit 8 - OPAMP inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vms_sel ( & mut self ) -> VMS_SEL_W { VMS_SEL_W { w : self } } # [ doc = "Bits 9:10 - OPAMP Non inverting input secondary selection" ]
# [ inline ( always ) ]
pub fn vps_sel ( & mut self ) -> VPS_SEL_W { VPS_SEL_W { w : self } } # [ doc = "Bit 11 - Calibration mode enable" ]
# [ inline ( always ) ]
pub fn calon ( & mut self ) -> CALON_W { CALON_W { w : self } } # [ doc = "Bits 12:13 - Calibration selection" ]
# [ inline ( always ) ]
pub fn calsel ( & mut self ) -> CALSEL_W { CALSEL_W { w : self } } # [ doc = "Bits 14:17 - Gain in PGA mode" ]
# [ inline ( always ) ]
pub fn pga_gain ( & mut self ) -> PGA_GAIN_W { PGA_GAIN_W { w : self } } # [ doc = "Bit 18 - User trimming enable" ]
# [ inline ( always ) ]
pub fn user_trim ( & mut self ) -> USER_TRIM_W { USER_TRIM_W { w : self } } # [ doc = "Bits 19:23 - Offset trimming value (PMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetp ( & mut self ) -> TRIMOFFSETP_W { TRIMOFFSETP_W { w : self } } # [ doc = "Bits 24:28 - Offset trimming value (NMOS)" ]
# [ inline ( always ) ]
pub fn trimoffsetn ( & mut self ) -> TRIMOFFSETN_W { TRIMOFFSETN_W { w : self } } # [ doc = "Bit 29 - TSTREF" ]
# [ inline ( always ) ]
pub fn tstref ( & mut self ) -> TSTREF_W { TSTREF_W { w : self } } # [ doc = "Bit 31 - OPAMP lock" ]
# [ inline ( always ) ]
pub fn lock ( & mut self ) -> LOCK_W { LOCK_W { w : self } } } } } # [ doc = "General purpose comparators" ]
pub struct COMP { _marker : PhantomData < * const ( ) > } unsafe impl Send for COMP { } impl COMP { # [ doc = r"Returns a pointer to the register block" ]
# [ inline ( always ) ]
pub const fn ptr ( ) -> * const comp :: RegisterBlock { 0x4001_0000 as * const _ } } impl Deref for COMP { type Target = comp :: RegisterBlock ; # [ inline ( always ) ]
fn deref ( & self ) -> & Self :: Target { unsafe { & * COMP :: ptr ( ) } } } # [ doc = "General purpose comparators" ]
pub mod comp { # [ doc = r"Register block" ]
# [ repr ( C ) ]
pub struct RegisterBlock { _reserved0 : [ u8 ; 28usize ]
, # [ doc = "0x1c - control and status register" ]
pub comp1_csr : COMP1_CSR , # [ doc = "0x20 - control and status register" ]
pub comp2_csr : COMP2_CSR , # [ doc = "0x24 - control and status register" ]
pub comp3_csr : COMP3_CSR , # [ doc = "0x28 - control and status register" ]
pub comp4_csr : COMP4_CSR , # [ doc = "0x2c - control and status register" ]
pub comp5_csr : COMP5_CSR , # [ doc = "0x30 - control and status register" ]
pub comp6_csr : COMP6_CSR , # [ doc = "0x34 - control and status register" ]
pub comp7_csr : COMP7_CSR , } # [ doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp2_csr](comp2_csr) module" ]
pub type COMP2_CSR = crate :: Reg < u32 , _COMP2_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _COMP2_CSR ; # [ doc = "`read()` method returns [comp2_csr::R](comp2_csr::R) reader structure" ]
impl crate :: Readable for COMP2_CSR { } # [ doc = "`write(|w| ..)` method takes [comp2_csr::W](comp2_csr::W) writer structure" ]
impl crate :: Writable for COMP2_CSR { } # [ doc = "control and status register" ]
pub mod comp2_csr { # [ doc = "Reader of register COMP2_CSR" ]
pub type R = crate :: R < u32 , super :: COMP2_CSR > ; # [ doc = "Writer for register COMP2_CSR" ]
pub type W = crate :: W < u32 , super :: COMP2_CSR > ; # [ doc = "Register COMP2_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: COMP2_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Comparator 2 enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP2EN_A { # [ doc = "0: Comparator disabled" ]
DISABLED = 0 , # [ doc = "1: Comparator enabled" ]
ENABLED = 1 } impl From < COMP2EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP2EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP2EN`" ]
pub type COMP2EN_R = crate :: R < bool , COMP2EN_A > ; impl COMP2EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP2EN_A { match self . bits { false => COMP2EN_A :: DISABLED , true => COMP2EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == COMP2EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == COMP2EN_A :: ENABLED } } # [ doc = "Write proxy for field `COMP2EN`" ]
pub struct COMP2EN_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP2EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Comparator disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( COMP2EN_A :: DISABLED ) } # [ doc = "Comparator enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( COMP2EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Comparator 2 inverting input selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP2INMSEL_A { # [ doc = "0: 1/4 of VRefint" ]
ONEQUARTERVREF = 0 , # [ doc = "1: 1/2 of VRefint" ]
ONEHALFVREF = 1 , # [ doc = "2: 3/4 of VRefint" ]
THREEQUARTERVREF = 2 , # [ doc = "3: VRefint" ]
VREF = 3 , # [ doc = "4: PA4 or DAC1_CH1 output if enabled" ]
PA4_DAC1_CH1 = 4 , # [ doc = "5: DAC1_CH2" ]
DAC1_CH2 = 5 , # [ doc = "6: PA2" ]
PA2 = 6 } impl From < COMP2INMSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP2INMSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP2INMSEL`" ]
pub type COMP2INMSEL_R = crate :: R < u8 , COMP2INMSEL_A > ; impl COMP2INMSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP2INMSEL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP2INMSEL_A :: ONEQUARTERVREF ) , 1 => Val ( COMP2INMSEL_A :: ONEHALFVREF ) , 2 => Val ( COMP2INMSEL_A :: THREEQUARTERVREF ) , 3 => Val ( COMP2INMSEL_A :: VREF ) , 4 => Val ( COMP2INMSEL_A :: PA4_DAC1_CH1 ) , 5 => Val ( COMP2INMSEL_A :: DAC1_CH2 ) , 6 => Val ( COMP2INMSEL_A :: PA2 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ONEQUARTERVREF`" ]
# [ inline ( always ) ]
pub fn is_one_quarter_vref ( & self ) -> bool { * self == COMP2INMSEL_A :: ONEQUARTERVREF } # [ doc = "Checks if the value of the field is `ONEHALFVREF`" ]
# [ inline ( always ) ]
pub fn is_one_half_vref ( & self ) -> bool { * self == COMP2INMSEL_A :: ONEHALFVREF } # [ doc = "Checks if the value of the field is `THREEQUARTERVREF`" ]
# [ inline ( always ) ]
pub fn is_three_quarter_vref ( & self ) -> bool { * self == COMP2INMSEL_A :: THREEQUARTERVREF } # [ doc = "Checks if the value of the field is `VREF`" ]
# [ inline ( always ) ]
pub fn is_vref ( & self ) -> bool { * self == COMP2INMSEL_A :: VREF } # [ doc = "Checks if the value of the field is `PA4_DAC1_CH1`" ]
# [ inline ( always ) ]
pub fn is_pa4_dac1_ch1 ( & self ) -> bool { * self == COMP2INMSEL_A :: PA4_DAC1_CH1 } # [ doc = "Checks if the value of the field is `DAC1_CH2`" ]
# [ inline ( always ) ]
pub fn is_dac1_ch2 ( & self ) -> bool { * self == COMP2INMSEL_A :: DAC1_CH2 } # [ doc = "Checks if the value of the field is `PA2`" ]
# [ inline ( always ) ]
pub fn is_pa2 ( & self ) -> bool { * self == COMP2INMSEL_A :: PA2 } } # [ doc = "Write proxy for field `COMP2INMSEL`" ]
pub struct COMP2INMSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2INMSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP2INMSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "1/4 of VRefint" ]
# [ inline ( always ) ]
pub fn one_quarter_vref ( self ) -> & 'a mut W { self . variant ( COMP2INMSEL_A :: ONEQUARTERVREF ) } # [ doc = "1/2 of VRefint" ]
# [ inline ( always ) ]
pub fn one_half_vref ( self ) -> & 'a mut W { self . variant ( COMP2INMSEL_A :: ONEHALFVREF ) } # [ doc = "3/4 of VRefint" ]
# [ inline ( always ) ]
pub fn three_quarter_vref ( self ) -> & 'a mut W { self . variant ( COMP2INMSEL_A :: THREEQUARTERVREF ) } # [ doc = "VRefint" ]
# [ inline ( always ) ]
pub fn vref ( self ) -> & 'a mut W { self . variant ( COMP2INMSEL_A :: VREF ) } # [ doc = "PA4 or DAC1_CH1 output if enabled" ]
# [ inline ( always ) ]
pub fn pa4_dac1_ch1 ( self ) -> & 'a mut W { self . variant ( COMP2INMSEL_A :: PA4_DAC1_CH1 ) } # [ doc = "DAC1_CH2" ]
# [ inline ( always ) ]
pub fn dac1_ch2 ( self ) -> & 'a mut W { self . variant ( COMP2INMSEL_A :: DAC1_CH2 ) } # [ doc = "PA2" ]
# [ inline ( always ) ]
pub fn pa2 ( self ) -> & 'a mut W { self . variant ( COMP2INMSEL_A :: PA2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Comparator 2 output selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP2OUTSEL_A { # [ doc = "0: No selection" ]
NOSELECTION = 0 , # [ doc = "1: Timer 1 break input" ]
TIMER1BREAKINPUT = 1 , # [ doc = "2: Timer 1 break input 2" ]
TIMER1BREAKINPUT2 = 2 , # [ doc = "6: Timer 1 OCREF_CLR input" ]
TIMER1OCREFCLEARINPUT = 6 , # [ doc = "7: Timer 1 input capture 1" ]
TIMER1INPUTCAPTURE1 = 7 , # [ doc = "8: Timer 2 input capture 4" ]
TIMER2INPUTCAPTURE4 = 8 , # [ doc = "9: Timer 2 OCREF_CLR input" ]
TIMER2OCREFCLEARINPUT = 9 , # [ doc = "10: Timer 3 input capture 1" ]
TIMER3INPUTCAPTURE1 = 10 , # [ doc = "11: Timer 3 OCREF_CLR input" ]
TIMER3OCREFCLEARINPUT = 11 } impl From < COMP2OUTSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP2OUTSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP2OUTSEL`" ]
pub type COMP2OUTSEL_R = crate :: R < u8 , COMP2OUTSEL_A > ; impl COMP2OUTSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP2OUTSEL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP2OUTSEL_A :: NOSELECTION ) , 1 => Val ( COMP2OUTSEL_A :: TIMER1BREAKINPUT ) , 2 => Val ( COMP2OUTSEL_A :: TIMER1BREAKINPUT2 ) , 6 => Val ( COMP2OUTSEL_A :: TIMER1OCREFCLEARINPUT ) , 7 => Val ( COMP2OUTSEL_A :: TIMER1INPUTCAPTURE1 ) , 8 => Val ( COMP2OUTSEL_A :: TIMER2INPUTCAPTURE4 ) , 9 => Val ( COMP2OUTSEL_A :: TIMER2OCREFCLEARINPUT ) , 10 => Val ( COMP2OUTSEL_A :: TIMER3INPUTCAPTURE1 ) , 11 => Val ( COMP2OUTSEL_A :: TIMER3OCREFCLEARINPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOSELECTION`" ]
# [ inline ( always ) ]
pub fn is_no_selection ( & self ) -> bool { * self == COMP2OUTSEL_A :: NOSELECTION } # [ doc = "Checks if the value of the field is `TIMER1BREAKINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer1break_input ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER1BREAKINPUT } # [ doc = "Checks if the value of the field is `TIMER1BREAKINPUT2`" ]
# [ inline ( always ) ]
pub fn is_timer1break_input2 ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER1BREAKINPUT2 } # [ doc = "Checks if the value of the field is `TIMER1OCREFCLEARINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer1ocref_clear_input ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER1OCREFCLEARINPUT } # [ doc = "Checks if the value of the field is `TIMER1INPUTCAPTURE1`" ]
# [ inline ( always ) ]
pub fn is_timer1input_capture1 ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER1INPUTCAPTURE1 } # [ doc = "Checks if the value of the field is `TIMER2INPUTCAPTURE4`" ]
# [ inline ( always ) ]
pub fn is_timer2input_capture4 ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER2INPUTCAPTURE4 } # [ doc = "Checks if the value of the field is `TIMER2OCREFCLEARINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer2ocref_clear_input ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER2OCREFCLEARINPUT } # [ doc = "Checks if the value of the field is `TIMER3INPUTCAPTURE1`" ]
# [ inline ( always ) ]
pub fn is_timer3input_capture1 ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER3INPUTCAPTURE1 } # [ doc = "Checks if the value of the field is `TIMER3OCREFCLEARINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer3ocref_clear_input ( & self ) -> bool { * self == COMP2OUTSEL_A :: TIMER3OCREFCLEARINPUT } } # [ doc = "Write proxy for field `COMP2OUTSEL`" ]
pub struct COMP2OUTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2OUTSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP2OUTSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No selection" ]
# [ inline ( always ) ]
pub fn no_selection ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: NOSELECTION ) } # [ doc = "Timer 1 break input" ]
# [ inline ( always ) ]
pub fn timer1break_input ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER1BREAKINPUT ) } # [ doc = "Timer 1 break input 2" ]
# [ inline ( always ) ]
pub fn timer1break_input2 ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER1BREAKINPUT2 ) } # [ doc = "Timer 1 OCREF_CLR input" ]
# [ inline ( always ) ]
pub fn timer1ocref_clear_input ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER1OCREFCLEARINPUT ) } # [ doc = "Timer 1 input capture 1" ]
# [ inline ( always ) ]
pub fn timer1input_capture1 ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER1INPUTCAPTURE1 ) } # [ doc = "Timer 2 input capture 4" ]
# [ inline ( always ) ]
pub fn timer2input_capture4 ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER2INPUTCAPTURE4 ) } # [ doc = "Timer 2 OCREF_CLR input" ]
# [ inline ( always ) ]
pub fn timer2ocref_clear_input ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER2OCREFCLEARINPUT ) } # [ doc = "Timer 3 input capture 1" ]
# [ inline ( always ) ]
pub fn timer3input_capture1 ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER3INPUTCAPTURE1 ) } # [ doc = "Timer 3 OCREF_CLR input" ]
# [ inline ( always ) ]
pub fn timer3ocref_clear_input ( self ) -> & 'a mut W { self . variant ( COMP2OUTSEL_A :: TIMER3OCREFCLEARINPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 10 ) ) | ( ( ( value as u32 ) & 0x0f ) << 10 ) ; self . w } } # [ doc = "Comparator 2 output polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP2POL_A { # [ doc = "0: Output is not inverted" ]
NOTINVERTED = 0 , # [ doc = "1: Output is inverted" ]
INVERTED = 1 } impl From < COMP2POL_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP2POL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP2POL`" ]
pub type COMP2POL_R = crate :: R < bool , COMP2POL_A > ; impl COMP2POL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP2POL_A { match self . bits { false => COMP2POL_A :: NOTINVERTED , true => COMP2POL_A :: INVERTED } } # [ doc = "Checks if the value of the field is `NOTINVERTED`" ]
# [ inline ( always ) ]
pub fn is_not_inverted ( & self ) -> bool { * self == COMP2POL_A :: NOTINVERTED } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == COMP2POL_A :: INVERTED } } # [ doc = "Write proxy for field `COMP2POL`" ]
pub struct COMP2POL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2POL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP2POL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output is not inverted" ]
# [ inline ( always ) ]
pub fn not_inverted ( self ) -> & 'a mut W { self . variant ( COMP2POL_A :: NOTINVERTED ) } # [ doc = "Output is inverted" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( COMP2POL_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Comparator 2 blanking source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP2_BLANKING_A { # [ doc = "0: No blanking" ]
NOBLANKING = 0 , # [ doc = "1: TIM1 OC5 selected as blanking source" ]
TIM1OC5 = 1 , # [ doc = "2: TIM2 OC3 selected as blanking source" ]
TIM2OC3 = 2 , # [ doc = "3: TIM3 OC3 selected as blanking source" ]
TIM3OC3 = 3 } impl From < COMP2_BLANKING_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP2_BLANKING_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP2_BLANKING`" ]
pub type COMP2_BLANKING_R = crate :: R < u8 , COMP2_BLANKING_A > ; impl COMP2_BLANKING_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP2_BLANKING_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP2_BLANKING_A :: NOBLANKING ) , 1 => Val ( COMP2_BLANKING_A :: TIM1OC5 ) , 2 => Val ( COMP2_BLANKING_A :: TIM2OC3 ) , 3 => Val ( COMP2_BLANKING_A :: TIM3OC3 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOBLANKING`" ]
# [ inline ( always ) ]
pub fn is_no_blanking ( & self ) -> bool { * self == COMP2_BLANKING_A :: NOBLANKING } # [ doc = "Checks if the value of the field is `TIM1OC5`" ]
# [ inline ( always ) ]
pub fn is_tim1oc5 ( & self ) -> bool { * self == COMP2_BLANKING_A :: TIM1OC5 } # [ doc = "Checks if the value of the field is `TIM2OC3`" ]
# [ inline ( always ) ]
pub fn is_tim2oc3 ( & self ) -> bool { * self == COMP2_BLANKING_A :: TIM2OC3 } # [ doc = "Checks if the value of the field is `TIM3OC3`" ]
# [ inline ( always ) ]
pub fn is_tim3oc3 ( & self ) -> bool { * self == COMP2_BLANKING_A :: TIM3OC3 } } # [ doc = "Write proxy for field `COMP2_BLANKING`" ]
pub struct COMP2_BLANKING_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2_BLANKING_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP2_BLANKING_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No blanking" ]
# [ inline ( always ) ]
pub fn no_blanking ( self ) -> & 'a mut W { self . variant ( COMP2_BLANKING_A :: NOBLANKING ) } # [ doc = "TIM1 OC5 selected as blanking source" ]
# [ inline ( always ) ]
pub fn tim1oc5 ( self ) -> & 'a mut W { self . variant ( COMP2_BLANKING_A :: TIM1OC5 ) } # [ doc = "TIM2 OC3 selected as blanking source" ]
# [ inline ( always ) ]
pub fn tim2oc3 ( self ) -> & 'a mut W { self . variant ( COMP2_BLANKING_A :: TIM2OC3 ) } # [ doc = "TIM3 OC3 selected as blanking source" ]
# [ inline ( always ) ]
pub fn tim3oc3 ( self ) -> & 'a mut W { self . variant ( COMP2_BLANKING_A :: TIM3OC3 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "Comparator 2 output\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP2OUT_A { # [ doc = "0: Non-inverting input below inverting input" ]
LOW = 0 , # [ doc = "1: Non-inverting input above inverting input" ]
HIGH = 1 } impl From < COMP2OUT_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP2OUT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP2OUT`" ]
pub type COMP2OUT_R = crate :: R < bool , COMP2OUT_A > ; impl COMP2OUT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP2OUT_A { match self . bits { false => COMP2OUT_A :: LOW , true => COMP2OUT_A :: HIGH } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == COMP2OUT_A :: LOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == COMP2OUT_A :: HIGH } } # [ doc = "Comparator 2 lock\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP2LOCK_A { # [ doc = "0: Comparator CSR bits are read-write" ]
UNLOCKED = 0 , # [ doc = "1: Comparator CSR bits are read-only" ]
LOCKED = 1 } impl From < COMP2LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP2LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP2LOCK`" ]
pub type COMP2LOCK_R = crate :: R < bool , COMP2LOCK_A > ; impl COMP2LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP2LOCK_A { match self . bits { false => COMP2LOCK_A :: UNLOCKED , true => COMP2LOCK_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == COMP2LOCK_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == COMP2LOCK_A :: LOCKED } } # [ doc = "Write proxy for field `COMP2LOCK`" ]
pub struct COMP2LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP2LOCK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Comparator CSR bits are read-write" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( COMP2LOCK_A :: UNLOCKED ) } # [ doc = "Comparator CSR bits are read-only" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( COMP2LOCK_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reader of field `COMP2MODE`" ]
pub type COMP2MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP2MODE`" ]
pub struct COMP2MODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COMP2INPSEL`" ]
pub type COMP2INPSEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP2INPSEL`" ]
pub struct COMP2INPSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2INPSEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `COMP2WINMODE`" ]
pub type COMP2WINMODE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP2WINMODE`" ]
pub struct COMP2WINMODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2WINMODE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `COMP2HYST`" ]
pub type COMP2HYST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP2HYST`" ]
pub struct COMP2HYST_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2HYST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `COMP2INMSEL3`" ]
pub type COMP2INMSEL3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP2INMSEL3`" ]
pub struct COMP2INMSEL3_W < 'a > { w : & 'a mut W , } impl < 'a > COMP2INMSEL3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } impl R { # [ doc = "Bit 0 - Comparator 2 enable" ]
# [ inline ( always ) ]
pub fn comp2en ( & self ) -> COMP2EN_R { COMP2EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Comparator 2 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp2inmsel ( & self ) -> COMP2INMSEL_R { COMP2INMSEL_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 10:13 - Comparator 2 output selection" ]
# [ inline ( always ) ]
pub fn comp2outsel ( & self ) -> COMP2OUTSEL_R { COMP2OUTSEL_R :: new ( ( ( self . bits >> 10 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Comparator 2 output polarity" ]
# [ inline ( always ) ]
pub fn comp2pol ( & self ) -> COMP2POL_R { COMP2POL_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 18:20 - Comparator 2 blanking source" ]
# [ inline ( always ) ]
pub fn comp2_blanking ( & self ) -> COMP2_BLANKING_R { COMP2_BLANKING_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bit 30 - Comparator 2 output" ]
# [ inline ( always ) ]
pub fn comp2out ( & self ) -> COMP2OUT_R { COMP2OUT_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Comparator 2 lock" ]
# [ inline ( always ) ]
pub fn comp2lock ( & self ) -> COMP2LOCK_R { COMP2LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - Comparator 2 mode" ]
# [ inline ( always ) ]
pub fn comp2mode ( & self ) -> COMP2MODE_R { COMP2MODE_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Comparator 2 non inverted input" ]
# [ inline ( always ) ]
pub fn comp2inpsel ( & self ) -> COMP2INPSEL_R { COMP2INPSEL_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Comparator 2 window mode" ]
# [ inline ( always ) ]
pub fn comp2winmode ( & self ) -> COMP2WINMODE_R { COMP2WINMODE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - Comparator 2 hysteresis" ]
# [ inline ( always ) ]
pub fn comp2hyst ( & self ) -> COMP2HYST_R { COMP2HYST_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bit 22 - Comparator 2 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp2inmsel3 ( & self ) -> COMP2INMSEL3_R { COMP2INMSEL3_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Comparator 2 enable" ]
# [ inline ( always ) ]
pub fn comp2en ( & mut self ) -> COMP2EN_W { COMP2EN_W { w : self } } # [ doc = "Bits 4:6 - Comparator 2 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp2inmsel ( & mut self ) -> COMP2INMSEL_W { COMP2INMSEL_W { w : self } } # [ doc = "Bits 10:13 - Comparator 2 output selection" ]
# [ inline ( always ) ]
pub fn comp2outsel ( & mut self ) -> COMP2OUTSEL_W { COMP2OUTSEL_W { w : self } } # [ doc = "Bit 15 - Comparator 2 output polarity" ]
# [ inline ( always ) ]
pub fn comp2pol ( & mut self ) -> COMP2POL_W { COMP2POL_W { w : self } } # [ doc = "Bits 18:20 - Comparator 2 blanking source" ]
# [ inline ( always ) ]
pub fn comp2_blanking ( & mut self ) -> COMP2_BLANKING_W { COMP2_BLANKING_W { w : self } } # [ doc = "Bit 31 - Comparator 2 lock" ]
# [ inline ( always ) ]
pub fn comp2lock ( & mut self ) -> COMP2LOCK_W { COMP2LOCK_W { w : self } } # [ doc = "Bits 2:3 - Comparator 2 mode" ]
# [ inline ( always ) ]
pub fn comp2mode ( & mut self ) -> COMP2MODE_W { COMP2MODE_W { w : self } } # [ doc = "Bit 7 - Comparator 2 non inverted input" ]
# [ inline ( always ) ]
pub fn comp2inpsel ( & mut self ) -> COMP2INPSEL_W { COMP2INPSEL_W { w : self } } # [ doc = "Bit 9 - Comparator 2 window mode" ]
# [ inline ( always ) ]
pub fn comp2winmode ( & mut self ) -> COMP2WINMODE_W { COMP2WINMODE_W { w : self } } # [ doc = "Bits 16:17 - Comparator 2 hysteresis" ]
# [ inline ( always ) ]
pub fn comp2hyst ( & mut self ) -> COMP2HYST_W { COMP2HYST_W { w : self } } # [ doc = "Bit 22 - Comparator 2 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp2inmsel3 ( & mut self ) -> COMP2INMSEL3_W { COMP2INMSEL3_W { w : self } } } } # [ doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp4_csr](comp4_csr) module" ]
pub type COMP4_CSR = crate :: Reg < u32 , _COMP4_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _COMP4_CSR ; # [ doc = "`read()` method returns [comp4_csr::R](comp4_csr::R) reader structure" ]
impl crate :: Readable for COMP4_CSR { } # [ doc = "`write(|w| ..)` method takes [comp4_csr::W](comp4_csr::W) writer structure" ]
impl crate :: Writable for COMP4_CSR { } # [ doc = "control and status register" ]
pub mod comp4_csr { # [ doc = "Reader of register COMP4_CSR" ]
pub type R = crate :: R < u32 , super :: COMP4_CSR > ; # [ doc = "Writer for register COMP4_CSR" ]
pub type W = crate :: W < u32 , super :: COMP4_CSR > ; # [ doc = "Register COMP4_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: COMP4_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Comparator 4 enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP4EN_A { # [ doc = "0: Comparator disabled" ]
DISABLED = 0 , # [ doc = "1: Comparator enabled" ]
ENABLED = 1 } impl From < COMP4EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP4EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP4EN`" ]
pub type COMP4EN_R = crate :: R < bool , COMP4EN_A > ; impl COMP4EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP4EN_A { match self . bits { false => COMP4EN_A :: DISABLED , true => COMP4EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == COMP4EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == COMP4EN_A :: ENABLED } } # [ doc = "Write proxy for field `COMP4EN`" ]
pub struct COMP4EN_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP4EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Comparator disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( COMP4EN_A :: DISABLED ) } # [ doc = "Comparator enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( COMP4EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Comparator 4 inverting input selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP4INMSEL_A { # [ doc = "0: 1/4 of VRefint" ]
ONEQUARTERVREF = 0 , # [ doc = "1: 1/2 of VRefint" ]
ONEHALFVREF = 1 , # [ doc = "2: 3/4 of VRefint" ]
THREEQUARTERVREF = 2 , # [ doc = "3: VRefint" ]
VREF = 3 , # [ doc = "4: PA4 or DAC1_CH1 output if enabled" ]
PA4_DAC1_CH1 = 4 , # [ doc = "5: DAC1_CH2" ]
DAC1_CH2 = 5 , # [ doc = "7: PB2" ]
PB2 = 7 } impl From < COMP4INMSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP4INMSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP4INMSEL`" ]
pub type COMP4INMSEL_R = crate :: R < u8 , COMP4INMSEL_A > ; impl COMP4INMSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP4INMSEL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP4INMSEL_A :: ONEQUARTERVREF ) , 1 => Val ( COMP4INMSEL_A :: ONEHALFVREF ) , 2 => Val ( COMP4INMSEL_A :: THREEQUARTERVREF ) , 3 => Val ( COMP4INMSEL_A :: VREF ) , 4 => Val ( COMP4INMSEL_A :: PA4_DAC1_CH1 ) , 5 => Val ( COMP4INMSEL_A :: DAC1_CH2 ) , 7 => Val ( COMP4INMSEL_A :: PB2 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ONEQUARTERVREF`" ]
# [ inline ( always ) ]
pub fn is_one_quarter_vref ( & self ) -> bool { * self == COMP4INMSEL_A :: ONEQUARTERVREF } # [ doc = "Checks if the value of the field is `ONEHALFVREF`" ]
# [ inline ( always ) ]
pub fn is_one_half_vref ( & self ) -> bool { * self == COMP4INMSEL_A :: ONEHALFVREF } # [ doc = "Checks if the value of the field is `THREEQUARTERVREF`" ]
# [ inline ( always ) ]
pub fn is_three_quarter_vref ( & self ) -> bool { * self == COMP4INMSEL_A :: THREEQUARTERVREF } # [ doc = "Checks if the value of the field is `VREF`" ]
# [ inline ( always ) ]
pub fn is_vref ( & self ) -> bool { * self == COMP4INMSEL_A :: VREF } # [ doc = "Checks if the value of the field is `PA4_DAC1_CH1`" ]
# [ inline ( always ) ]
pub fn is_pa4_dac1_ch1 ( & self ) -> bool { * self == COMP4INMSEL_A :: PA4_DAC1_CH1 } # [ doc = "Checks if the value of the field is `DAC1_CH2`" ]
# [ inline ( always ) ]
pub fn is_dac1_ch2 ( & self ) -> bool { * self == COMP4INMSEL_A :: DAC1_CH2 } # [ doc = "Checks if the value of the field is `PB2`" ]
# [ inline ( always ) ]
pub fn is_pb2 ( & self ) -> bool { * self == COMP4INMSEL_A :: PB2 } } # [ doc = "Write proxy for field `COMP4INMSEL`" ]
pub struct COMP4INMSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4INMSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP4INMSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "1/4 of VRefint" ]
# [ inline ( always ) ]
pub fn one_quarter_vref ( self ) -> & 'a mut W { self . variant ( COMP4INMSEL_A :: ONEQUARTERVREF ) } # [ doc = "1/2 of VRefint" ]
# [ inline ( always ) ]
pub fn one_half_vref ( self ) -> & 'a mut W { self . variant ( COMP4INMSEL_A :: ONEHALFVREF ) } # [ doc = "3/4 of VRefint" ]
# [ inline ( always ) ]
pub fn three_quarter_vref ( self ) -> & 'a mut W { self . variant ( COMP4INMSEL_A :: THREEQUARTERVREF ) } # [ doc = "VRefint" ]
# [ inline ( always ) ]
pub fn vref ( self ) -> & 'a mut W { self . variant ( COMP4INMSEL_A :: VREF ) } # [ doc = "PA4 or DAC1_CH1 output if enabled" ]
# [ inline ( always ) ]
pub fn pa4_dac1_ch1 ( self ) -> & 'a mut W { self . variant ( COMP4INMSEL_A :: PA4_DAC1_CH1 ) } # [ doc = "DAC1_CH2" ]
# [ inline ( always ) ]
pub fn dac1_ch2 ( self ) -> & 'a mut W { self . variant ( COMP4INMSEL_A :: DAC1_CH2 ) } # [ doc = "PB2" ]
# [ inline ( always ) ]
pub fn pb2 ( self ) -> & 'a mut W { self . variant ( COMP4INMSEL_A :: PB2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Comparator 4 output selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP4OUTSEL_A { # [ doc = "0: No selection" ]
NOSELECTION = 0 , # [ doc = "1: Timer 1 break input" ]
TIMER1BREAKINPUT = 1 , # [ doc = "2: Timer 1 break input 2" ]
TIMER1BREAKINPUT2 = 2 , # [ doc = "6: Timer 3 input capture 3" ]
TIMER3INPUTCAPTURE3 = 6 , # [ doc = "8: Timer 15 input capture 2" ]
TIMER15INPUTCAPTURE2 = 8 , # [ doc = "10: Timer 15 OCREF_CLR input" ]
TIMER15OCREFCLEARINPUT = 10 , # [ doc = "11: Timer 3 OCREF_CLR input" ]
TIMER3OCREFCLEARINPUT = 11 } impl From < COMP4OUTSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP4OUTSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP4OUTSEL`" ]
pub type COMP4OUTSEL_R = crate :: R < u8 , COMP4OUTSEL_A > ; impl COMP4OUTSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP4OUTSEL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP4OUTSEL_A :: NOSELECTION ) , 1 => Val ( COMP4OUTSEL_A :: TIMER1BREAKINPUT ) , 2 => Val ( COMP4OUTSEL_A :: TIMER1BREAKINPUT2 ) , 6 => Val ( COMP4OUTSEL_A :: TIMER3INPUTCAPTURE3 ) , 8 => Val ( COMP4OUTSEL_A :: TIMER15INPUTCAPTURE2 ) , 10 => Val ( COMP4OUTSEL_A :: TIMER15OCREFCLEARINPUT ) , 11 => Val ( COMP4OUTSEL_A :: TIMER3OCREFCLEARINPUT ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOSELECTION`" ]
# [ inline ( always ) ]
pub fn is_no_selection ( & self ) -> bool { * self == COMP4OUTSEL_A :: NOSELECTION } # [ doc = "Checks if the value of the field is `TIMER1BREAKINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer1break_input ( & self ) -> bool { * self == COMP4OUTSEL_A :: TIMER1BREAKINPUT } # [ doc = "Checks if the value of the field is `TIMER1BREAKINPUT2`" ]
# [ inline ( always ) ]
pub fn is_timer1break_input2 ( & self ) -> bool { * self == COMP4OUTSEL_A :: TIMER1BREAKINPUT2 } # [ doc = "Checks if the value of the field is `TIMER3INPUTCAPTURE3`" ]
# [ inline ( always ) ]
pub fn is_timer3input_capture3 ( & self ) -> bool { * self == COMP4OUTSEL_A :: TIMER3INPUTCAPTURE3 } # [ doc = "Checks if the value of the field is `TIMER15INPUTCAPTURE2`" ]
# [ inline ( always ) ]
pub fn is_timer15input_capture2 ( & self ) -> bool { * self == COMP4OUTSEL_A :: TIMER15INPUTCAPTURE2 } # [ doc = "Checks if the value of the field is `TIMER15OCREFCLEARINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer15ocref_clear_input ( & self ) -> bool { * self == COMP4OUTSEL_A :: TIMER15OCREFCLEARINPUT } # [ doc = "Checks if the value of the field is `TIMER3OCREFCLEARINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer3ocref_clear_input ( & self ) -> bool { * self == COMP4OUTSEL_A :: TIMER3OCREFCLEARINPUT } } # [ doc = "Write proxy for field `COMP4OUTSEL`" ]
pub struct COMP4OUTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4OUTSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP4OUTSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No selection" ]
# [ inline ( always ) ]
pub fn no_selection ( self ) -> & 'a mut W { self . variant ( COMP4OUTSEL_A :: NOSELECTION ) } # [ doc = "Timer 1 break input" ]
# [ inline ( always ) ]
pub fn timer1break_input ( self ) -> & 'a mut W { self . variant ( COMP4OUTSEL_A :: TIMER1BREAKINPUT ) } # [ doc = "Timer 1 break input 2" ]
# [ inline ( always ) ]
pub fn timer1break_input2 ( self ) -> & 'a mut W { self . variant ( COMP4OUTSEL_A :: TIMER1BREAKINPUT2 ) } # [ doc = "Timer 3 input capture 3" ]
# [ inline ( always ) ]
pub fn timer3input_capture3 ( self ) -> & 'a mut W { self . variant ( COMP4OUTSEL_A :: TIMER3INPUTCAPTURE3 ) } # [ doc = "Timer 15 input capture 2" ]
# [ inline ( always ) ]
pub fn timer15input_capture2 ( self ) -> & 'a mut W { self . variant ( COMP4OUTSEL_A :: TIMER15INPUTCAPTURE2 ) } # [ doc = "Timer 15 OCREF_CLR input" ]
# [ inline ( always ) ]
pub fn timer15ocref_clear_input ( self ) -> & 'a mut W { self . variant ( COMP4OUTSEL_A :: TIMER15OCREFCLEARINPUT ) } # [ doc = "Timer 3 OCREF_CLR input" ]
# [ inline ( always ) ]
pub fn timer3ocref_clear_input ( self ) -> & 'a mut W { self . variant ( COMP4OUTSEL_A :: TIMER3OCREFCLEARINPUT ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 10 ) ) | ( ( ( value as u32 ) & 0x0f ) << 10 ) ; self . w } } # [ doc = "Comparator 4 output polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP4POL_A { # [ doc = "0: Output is not inverted" ]
NOTINVERTED = 0 , # [ doc = "1: Output is inverted" ]
INVERTED = 1 } impl From < COMP4POL_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP4POL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP4POL`" ]
pub type COMP4POL_R = crate :: R < bool , COMP4POL_A > ; impl COMP4POL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP4POL_A { match self . bits { false => COMP4POL_A :: NOTINVERTED , true => COMP4POL_A :: INVERTED } } # [ doc = "Checks if the value of the field is `NOTINVERTED`" ]
# [ inline ( always ) ]
pub fn is_not_inverted ( & self ) -> bool { * self == COMP4POL_A :: NOTINVERTED } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == COMP4POL_A :: INVERTED } } # [ doc = "Write proxy for field `COMP4POL`" ]
pub struct COMP4POL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4POL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP4POL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output is not inverted" ]
# [ inline ( always ) ]
pub fn not_inverted ( self ) -> & 'a mut W { self . variant ( COMP4POL_A :: NOTINVERTED ) } # [ doc = "Output is inverted" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( COMP4POL_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Comparator 4 blanking source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP4_BLANKING_A { # [ doc = "0: No blanking" ]
NOBLANKING = 0 , # [ doc = "1: TIM3 OC4 selected as blanking source" ]
TIM3OC4 = 1 , # [ doc = "3: TIM15 OC1 selected as blanking source" ]
TIM15OC1 = 3 } impl From < COMP4_BLANKING_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP4_BLANKING_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP4_BLANKING`" ]
pub type COMP4_BLANKING_R = crate :: R < u8 , COMP4_BLANKING_A > ; impl COMP4_BLANKING_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP4_BLANKING_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP4_BLANKING_A :: NOBLANKING ) , 1 => Val ( COMP4_BLANKING_A :: TIM3OC4 ) , 3 => Val ( COMP4_BLANKING_A :: TIM15OC1 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOBLANKING`" ]
# [ inline ( always ) ]
pub fn is_no_blanking ( & self ) -> bool { * self == COMP4_BLANKING_A :: NOBLANKING } # [ doc = "Checks if the value of the field is `TIM3OC4`" ]
# [ inline ( always ) ]
pub fn is_tim3oc4 ( & self ) -> bool { * self == COMP4_BLANKING_A :: TIM3OC4 } # [ doc = "Checks if the value of the field is `TIM15OC1`" ]
# [ inline ( always ) ]
pub fn is_tim15oc1 ( & self ) -> bool { * self == COMP4_BLANKING_A :: TIM15OC1 } } # [ doc = "Write proxy for field `COMP4_BLANKING`" ]
pub struct COMP4_BLANKING_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4_BLANKING_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP4_BLANKING_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No blanking" ]
# [ inline ( always ) ]
pub fn no_blanking ( self ) -> & 'a mut W { self . variant ( COMP4_BLANKING_A :: NOBLANKING ) } # [ doc = "TIM3 OC4 selected as blanking source" ]
# [ inline ( always ) ]
pub fn tim3oc4 ( self ) -> & 'a mut W { self . variant ( COMP4_BLANKING_A :: TIM3OC4 ) } # [ doc = "TIM15 OC1 selected as blanking source" ]
# [ inline ( always ) ]
pub fn tim15oc1 ( self ) -> & 'a mut W { self . variant ( COMP4_BLANKING_A :: TIM15OC1 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "Comparator 4 output\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP4OUT_A { # [ doc = "0: Non-inverting input below inverting input" ]
LOW = 0 , # [ doc = "1: Non-inverting input above inverting input" ]
HIGH = 1 } impl From < COMP4OUT_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP4OUT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP4OUT`" ]
pub type COMP4OUT_R = crate :: R < bool , COMP4OUT_A > ; impl COMP4OUT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP4OUT_A { match self . bits { false => COMP4OUT_A :: LOW , true => COMP4OUT_A :: HIGH } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == COMP4OUT_A :: LOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == COMP4OUT_A :: HIGH } } # [ doc = "Comparator 4 lock\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP4LOCK_A { # [ doc = "0: Comparator CSR bits are read-write" ]
UNLOCKED = 0 , # [ doc = "1: Comparator CSR bits are read-only" ]
LOCKED = 1 } impl From < COMP4LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP4LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP4LOCK`" ]
pub type COMP4LOCK_R = crate :: R < bool , COMP4LOCK_A > ; impl COMP4LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP4LOCK_A { match self . bits { false => COMP4LOCK_A :: UNLOCKED , true => COMP4LOCK_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == COMP4LOCK_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == COMP4LOCK_A :: LOCKED } } # [ doc = "Write proxy for field `COMP4LOCK`" ]
pub struct COMP4LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP4LOCK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Comparator CSR bits are read-write" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( COMP4LOCK_A :: UNLOCKED ) } # [ doc = "Comparator CSR bits are read-only" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( COMP4LOCK_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reader of field `COMP4WINMODE`" ]
pub type COMP4WINMODE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP4WINMODE`" ]
pub struct COMP4WINMODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4WINMODE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `COMP4MODE`" ]
pub type COMP4MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP4MODE`" ]
pub struct COMP4MODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COMP4INPSEL`" ]
pub type COMP4INPSEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP4INPSEL`" ]
pub struct COMP4INPSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4INPSEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `COMP4HYST`" ]
pub type COMP4HYST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP4HYST`" ]
pub struct COMP4HYST_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4HYST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `COMP4INMSEL3`" ]
pub type COMP4INMSEL3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP4INMSEL3`" ]
pub struct COMP4INMSEL3_W < 'a > { w : & 'a mut W , } impl < 'a > COMP4INMSEL3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } impl R { # [ doc = "Bit 0 - Comparator 4 enable" ]
# [ inline ( always ) ]
pub fn comp4en ( & self ) -> COMP4EN_R { COMP4EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Comparator 4 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp4inmsel ( & self ) -> COMP4INMSEL_R { COMP4INMSEL_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 10:13 - Comparator 4 output selection" ]
# [ inline ( always ) ]
pub fn comp4outsel ( & self ) -> COMP4OUTSEL_R { COMP4OUTSEL_R :: new ( ( ( self . bits >> 10 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Comparator 4 output polarity" ]
# [ inline ( always ) ]
pub fn comp4pol ( & self ) -> COMP4POL_R { COMP4POL_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 18:20 - Comparator 4 blanking source" ]
# [ inline ( always ) ]
pub fn comp4_blanking ( & self ) -> COMP4_BLANKING_R { COMP4_BLANKING_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bit 30 - Comparator 4 output" ]
# [ inline ( always ) ]
pub fn comp4out ( & self ) -> COMP4OUT_R { COMP4OUT_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Comparator 4 lock" ]
# [ inline ( always ) ]
pub fn comp4lock ( & self ) -> COMP4LOCK_R { COMP4LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Comparator 4 window mode" ]
# [ inline ( always ) ]
pub fn comp4winmode ( & self ) -> COMP4WINMODE_R { COMP4WINMODE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - Comparator 4 mode" ]
# [ inline ( always ) ]
pub fn comp4mode ( & self ) -> COMP4MODE_R { COMP4MODE_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Comparator 4 non inverted input" ]
# [ inline ( always ) ]
pub fn comp4inpsel ( & self ) -> COMP4INPSEL_R { COMP4INPSEL_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - Comparator 4 hysteresis" ]
# [ inline ( always ) ]
pub fn comp4hyst ( & self ) -> COMP4HYST_R { COMP4HYST_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bit 22 - Comparator 4 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp4inmsel3 ( & self ) -> COMP4INMSEL3_R { COMP4INMSEL3_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Comparator 4 enable" ]
# [ inline ( always ) ]
pub fn comp4en ( & mut self ) -> COMP4EN_W { COMP4EN_W { w : self } } # [ doc = "Bits 4:6 - Comparator 4 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp4inmsel ( & mut self ) -> COMP4INMSEL_W { COMP4INMSEL_W { w : self } } # [ doc = "Bits 10:13 - Comparator 4 output selection" ]
# [ inline ( always ) ]
pub fn comp4outsel ( & mut self ) -> COMP4OUTSEL_W { COMP4OUTSEL_W { w : self } } # [ doc = "Bit 15 - Comparator 4 output polarity" ]
# [ inline ( always ) ]
pub fn comp4pol ( & mut self ) -> COMP4POL_W { COMP4POL_W { w : self } } # [ doc = "Bits 18:20 - Comparator 4 blanking source" ]
# [ inline ( always ) ]
pub fn comp4_blanking ( & mut self ) -> COMP4_BLANKING_W { COMP4_BLANKING_W { w : self } } # [ doc = "Bit 31 - Comparator 4 lock" ]
# [ inline ( always ) ]
pub fn comp4lock ( & mut self ) -> COMP4LOCK_W { COMP4LOCK_W { w : self } } # [ doc = "Bit 9 - Comparator 4 window mode" ]
# [ inline ( always ) ]
pub fn comp4winmode ( & mut self ) -> COMP4WINMODE_W { COMP4WINMODE_W { w : self } } # [ doc = "Bits 2:3 - Comparator 4 mode" ]
# [ inline ( always ) ]
pub fn comp4mode ( & mut self ) -> COMP4MODE_W { COMP4MODE_W { w : self } } # [ doc = "Bit 7 - Comparator 4 non inverted input" ]
# [ inline ( always ) ]
pub fn comp4inpsel ( & mut self ) -> COMP4INPSEL_W { COMP4INPSEL_W { w : self } } # [ doc = "Bits 16:17 - Comparator 4 hysteresis" ]
# [ inline ( always ) ]
pub fn comp4hyst ( & mut self ) -> COMP4HYST_W { COMP4HYST_W { w : self } } # [ doc = "Bit 22 - Comparator 4 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp4inmsel3 ( & mut self ) -> COMP4INMSEL3_W { COMP4INMSEL3_W { w : self } } } } # [ doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp6_csr](comp6_csr) module" ]
pub type COMP6_CSR = crate :: Reg < u32 , _COMP6_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _COMP6_CSR ; # [ doc = "`read()` method returns [comp6_csr::R](comp6_csr::R) reader structure" ]
impl crate :: Readable for COMP6_CSR { } # [ doc = "`write(|w| ..)` method takes [comp6_csr::W](comp6_csr::W) writer structure" ]
impl crate :: Writable for COMP6_CSR { } # [ doc = "control and status register" ]
pub mod comp6_csr { # [ doc = "Reader of register COMP6_CSR" ]
pub type R = crate :: R < u32 , super :: COMP6_CSR > ; # [ doc = "Writer for register COMP6_CSR" ]
pub type W = crate :: W < u32 , super :: COMP6_CSR > ; # [ doc = "Register COMP6_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: COMP6_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Comparator 6 enable\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP6EN_A { # [ doc = "0: Comparator disabled" ]
DISABLED = 0 , # [ doc = "1: Comparator enabled" ]
ENABLED = 1 } impl From < COMP6EN_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP6EN_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP6EN`" ]
pub type COMP6EN_R = crate :: R < bool , COMP6EN_A > ; impl COMP6EN_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP6EN_A { match self . bits { false => COMP6EN_A :: DISABLED , true => COMP6EN_A :: ENABLED } } # [ doc = "Checks if the value of the field is `DISABLED`" ]
# [ inline ( always ) ]
pub fn is_disabled ( & self ) -> bool { * self == COMP6EN_A :: DISABLED } # [ doc = "Checks if the value of the field is `ENABLED`" ]
# [ inline ( always ) ]
pub fn is_enabled ( & self ) -> bool { * self == COMP6EN_A :: ENABLED } } # [ doc = "Write proxy for field `COMP6EN`" ]
pub struct COMP6EN_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6EN_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP6EN_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Comparator disabled" ]
# [ inline ( always ) ]
pub fn disabled ( self ) -> & 'a mut W { self . variant ( COMP6EN_A :: DISABLED ) } # [ doc = "Comparator enabled" ]
# [ inline ( always ) ]
pub fn enabled ( self ) -> & 'a mut W { self . variant ( COMP6EN_A :: ENABLED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Comparator 6 inverting input selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP6INMSEL_A { # [ doc = "0: 1/4 of VRefint" ]
ONEQUARTERVREF = 0 , # [ doc = "1: 1/2 of VRefint" ]
ONEHALFVREF = 1 , # [ doc = "2: 3/4 of VRefint" ]
THREEQUARTERVREF = 2 , # [ doc = "3: VRefint" ]
VREF = 3 , # [ doc = "4: PA4 or DAC1_CH1 output if enabled" ]
PA4_DAC1_CH1 = 4 , # [ doc = "5: DAC1_CH2" ]
DAC1_CH2 = 5 , # [ doc = "7: PB15" ]
PB15 = 7 } impl From < COMP6INMSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP6INMSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP6INMSEL`" ]
pub type COMP6INMSEL_R = crate :: R < u8 , COMP6INMSEL_A > ; impl COMP6INMSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP6INMSEL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP6INMSEL_A :: ONEQUARTERVREF ) , 1 => Val ( COMP6INMSEL_A :: ONEHALFVREF ) , 2 => Val ( COMP6INMSEL_A :: THREEQUARTERVREF ) , 3 => Val ( COMP6INMSEL_A :: VREF ) , 4 => Val ( COMP6INMSEL_A :: PA4_DAC1_CH1 ) , 5 => Val ( COMP6INMSEL_A :: DAC1_CH2 ) , 7 => Val ( COMP6INMSEL_A :: PB15 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `ONEQUARTERVREF`" ]
# [ inline ( always ) ]
pub fn is_one_quarter_vref ( & self ) -> bool { * self == COMP6INMSEL_A :: ONEQUARTERVREF } # [ doc = "Checks if the value of the field is `ONEHALFVREF`" ]
# [ inline ( always ) ]
pub fn is_one_half_vref ( & self ) -> bool { * self == COMP6INMSEL_A :: ONEHALFVREF } # [ doc = "Checks if the value of the field is `THREEQUARTERVREF`" ]
# [ inline ( always ) ]
pub fn is_three_quarter_vref ( & self ) -> bool { * self == COMP6INMSEL_A :: THREEQUARTERVREF } # [ doc = "Checks if the value of the field is `VREF`" ]
# [ inline ( always ) ]
pub fn is_vref ( & self ) -> bool { * self == COMP6INMSEL_A :: VREF } # [ doc = "Checks if the value of the field is `PA4_DAC1_CH1`" ]
# [ inline ( always ) ]
pub fn is_pa4_dac1_ch1 ( & self ) -> bool { * self == COMP6INMSEL_A :: PA4_DAC1_CH1 } # [ doc = "Checks if the value of the field is `DAC1_CH2`" ]
# [ inline ( always ) ]
pub fn is_dac1_ch2 ( & self ) -> bool { * self == COMP6INMSEL_A :: DAC1_CH2 } # [ doc = "Checks if the value of the field is `PB15`" ]
# [ inline ( always ) ]
pub fn is_pb15 ( & self ) -> bool { * self == COMP6INMSEL_A :: PB15 } } # [ doc = "Write proxy for field `COMP6INMSEL`" ]
pub struct COMP6INMSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6INMSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP6INMSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "1/4 of VRefint" ]
# [ inline ( always ) ]
pub fn one_quarter_vref ( self ) -> & 'a mut W { self . variant ( COMP6INMSEL_A :: ONEQUARTERVREF ) } # [ doc = "1/2 of VRefint" ]
# [ inline ( always ) ]
pub fn one_half_vref ( self ) -> & 'a mut W { self . variant ( COMP6INMSEL_A :: ONEHALFVREF ) } # [ doc = "3/4 of VRefint" ]
# [ inline ( always ) ]
pub fn three_quarter_vref ( self ) -> & 'a mut W { self . variant ( COMP6INMSEL_A :: THREEQUARTERVREF ) } # [ doc = "VRefint" ]
# [ inline ( always ) ]
pub fn vref ( self ) -> & 'a mut W { self . variant ( COMP6INMSEL_A :: VREF ) } # [ doc = "PA4 or DAC1_CH1 output if enabled" ]
# [ inline ( always ) ]
pub fn pa4_dac1_ch1 ( self ) -> & 'a mut W { self . variant ( COMP6INMSEL_A :: PA4_DAC1_CH1 ) } # [ doc = "DAC1_CH2" ]
# [ inline ( always ) ]
pub fn dac1_ch2 ( self ) -> & 'a mut W { self . variant ( COMP6INMSEL_A :: DAC1_CH2 ) } # [ doc = "PB15" ]
# [ inline ( always ) ]
pub fn pb15 ( self ) -> & 'a mut W { self . variant ( COMP6INMSEL_A :: PB15 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Comparator 6 output selection\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP6OUTSEL_A { # [ doc = "0: No selection" ]
NOSELECTION = 0 , # [ doc = "1: Timer 1 break input" ]
TIMER1BREAKINPUT = 1 , # [ doc = "2: Timer 1 break input 2" ]
TIMER1BREAKINPUT2 = 2 , # [ doc = "6: Timer 2 input capture 2" ]
TIMER2INPUTCAPTURE2 = 6 , # [ doc = "8: Timer 2 OCREF_CLR input" ]
TIMER2OCREFCLEARINPUT = 8 , # [ doc = "9: Timer 16 OCREF_CLR input" ]
TIMER16OCREFCLEARINPUT = 9 , # [ doc = "10: Timer 16 input capture 1" ]
TIMER16INPUTCAPTURE1 = 10 } impl From < COMP6OUTSEL_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP6OUTSEL_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP6OUTSEL`" ]
pub type COMP6OUTSEL_R = crate :: R < u8 , COMP6OUTSEL_A > ; impl COMP6OUTSEL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP6OUTSEL_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP6OUTSEL_A :: NOSELECTION ) , 1 => Val ( COMP6OUTSEL_A :: TIMER1BREAKINPUT ) , 2 => Val ( COMP6OUTSEL_A :: TIMER1BREAKINPUT2 ) , 6 => Val ( COMP6OUTSEL_A :: TIMER2INPUTCAPTURE2 ) , 8 => Val ( COMP6OUTSEL_A :: TIMER2OCREFCLEARINPUT ) , 9 => Val ( COMP6OUTSEL_A :: TIMER16OCREFCLEARINPUT ) , 10 => Val ( COMP6OUTSEL_A :: TIMER16INPUTCAPTURE1 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOSELECTION`" ]
# [ inline ( always ) ]
pub fn is_no_selection ( & self ) -> bool { * self == COMP6OUTSEL_A :: NOSELECTION } # [ doc = "Checks if the value of the field is `TIMER1BREAKINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer1break_input ( & self ) -> bool { * self == COMP6OUTSEL_A :: TIMER1BREAKINPUT } # [ doc = "Checks if the value of the field is `TIMER1BREAKINPUT2`" ]
# [ inline ( always ) ]
pub fn is_timer1break_input2 ( & self ) -> bool { * self == COMP6OUTSEL_A :: TIMER1BREAKINPUT2 } # [ doc = "Checks if the value of the field is `TIMER2INPUTCAPTURE2`" ]
# [ inline ( always ) ]
pub fn is_timer2input_capture2 ( & self ) -> bool { * self == COMP6OUTSEL_A :: TIMER2INPUTCAPTURE2 } # [ doc = "Checks if the value of the field is `TIMER2OCREFCLEARINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer2ocref_clear_input ( & self ) -> bool { * self == COMP6OUTSEL_A :: TIMER2OCREFCLEARINPUT } # [ doc = "Checks if the value of the field is `TIMER16OCREFCLEARINPUT`" ]
# [ inline ( always ) ]
pub fn is_timer16ocref_clear_input ( & self ) -> bool { * self == COMP6OUTSEL_A :: TIMER16OCREFCLEARINPUT } # [ doc = "Checks if the value of the field is `TIMER16INPUTCAPTURE1`" ]
# [ inline ( always ) ]
pub fn is_timer16input_capture1 ( & self ) -> bool { * self == COMP6OUTSEL_A :: TIMER16INPUTCAPTURE1 } } # [ doc = "Write proxy for field `COMP6OUTSEL`" ]
pub struct COMP6OUTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6OUTSEL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP6OUTSEL_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No selection" ]
# [ inline ( always ) ]
pub fn no_selection ( self ) -> & 'a mut W { self . variant ( COMP6OUTSEL_A :: NOSELECTION ) } # [ doc = "Timer 1 break input" ]
# [ inline ( always ) ]
pub fn timer1break_input ( self ) -> & 'a mut W { self . variant ( COMP6OUTSEL_A :: TIMER1BREAKINPUT ) } # [ doc = "Timer 1 break input 2" ]
# [ inline ( always ) ]
pub fn timer1break_input2 ( self ) -> & 'a mut W { self . variant ( COMP6OUTSEL_A :: TIMER1BREAKINPUT2 ) } # [ doc = "Timer 2 input capture 2" ]
# [ inline ( always ) ]
pub fn timer2input_capture2 ( self ) -> & 'a mut W { self . variant ( COMP6OUTSEL_A :: TIMER2INPUTCAPTURE2 ) } # [ doc = "Timer 2 OCREF_CLR input" ]
# [ inline ( always ) ]
pub fn timer2ocref_clear_input ( self ) -> & 'a mut W { self . variant ( COMP6OUTSEL_A :: TIMER2OCREFCLEARINPUT ) } # [ doc = "Timer 16 OCREF_CLR input" ]
# [ inline ( always ) ]
pub fn timer16ocref_clear_input ( self ) -> & 'a mut W { self . variant ( COMP6OUTSEL_A :: TIMER16OCREFCLEARINPUT ) } # [ doc = "Timer 16 input capture 1" ]
# [ inline ( always ) ]
pub fn timer16input_capture1 ( self ) -> & 'a mut W { self . variant ( COMP6OUTSEL_A :: TIMER16INPUTCAPTURE1 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 10 ) ) | ( ( ( value as u32 ) & 0x0f ) << 10 ) ; self . w } } # [ doc = "Comparator 6 output polarity\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP6POL_A { # [ doc = "0: Output is not inverted" ]
NOTINVERTED = 0 , # [ doc = "1: Output is inverted" ]
INVERTED = 1 } impl From < COMP6POL_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP6POL_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP6POL`" ]
pub type COMP6POL_R = crate :: R < bool , COMP6POL_A > ; impl COMP6POL_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP6POL_A { match self . bits { false => COMP6POL_A :: NOTINVERTED , true => COMP6POL_A :: INVERTED } } # [ doc = "Checks if the value of the field is `NOTINVERTED`" ]
# [ inline ( always ) ]
pub fn is_not_inverted ( & self ) -> bool { * self == COMP6POL_A :: NOTINVERTED } # [ doc = "Checks if the value of the field is `INVERTED`" ]
# [ inline ( always ) ]
pub fn is_inverted ( & self ) -> bool { * self == COMP6POL_A :: INVERTED } } # [ doc = "Write proxy for field `COMP6POL`" ]
pub struct COMP6POL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6POL_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP6POL_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Output is not inverted" ]
# [ inline ( always ) ]
pub fn not_inverted ( self ) -> & 'a mut W { self . variant ( COMP6POL_A :: NOTINVERTED ) } # [ doc = "Output is inverted" ]
# [ inline ( always ) ]
pub fn inverted ( self ) -> & 'a mut W { self . variant ( COMP6POL_A :: INVERTED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Comparator 6 blanking source\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
# [ repr ( u8 ) ]
pub enum COMP6_BLANKING_A { # [ doc = "0: No blanking" ]
NOBLANKING = 0 , # [ doc = "3: TIM2 OC4 selected as blanking source" ]
TIM2OC4 = 3 , # [ doc = "4: TIM15 OC2 selected as blanking source" ]
TIM15OC2 = 4 } impl From < COMP6_BLANKING_A > for u8 { # [ inline ( always ) ]
fn from ( variant : COMP6_BLANKING_A ) -> Self { variant as _ } } # [ doc = "Reader of field `COMP6_BLANKING`" ]
pub type COMP6_BLANKING_R = crate :: R < u8 , COMP6_BLANKING_A > ; impl COMP6_BLANKING_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> crate :: Variant < u8 , COMP6_BLANKING_A > { use crate :: Variant :: * ; match self . bits { 0 => Val ( COMP6_BLANKING_A :: NOBLANKING ) , 3 => Val ( COMP6_BLANKING_A :: TIM2OC4 ) , 4 => Val ( COMP6_BLANKING_A :: TIM15OC2 ) , i => Res ( i ) } } # [ doc = "Checks if the value of the field is `NOBLANKING`" ]
# [ inline ( always ) ]
pub fn is_no_blanking ( & self ) -> bool { * self == COMP6_BLANKING_A :: NOBLANKING } # [ doc = "Checks if the value of the field is `TIM2OC4`" ]
# [ inline ( always ) ]
pub fn is_tim2oc4 ( & self ) -> bool { * self == COMP6_BLANKING_A :: TIM2OC4 } # [ doc = "Checks if the value of the field is `TIM15OC2`" ]
# [ inline ( always ) ]
pub fn is_tim15oc2 ( & self ) -> bool { * self == COMP6_BLANKING_A :: TIM15OC2 } } # [ doc = "Write proxy for field `COMP6_BLANKING`" ]
pub struct COMP6_BLANKING_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6_BLANKING_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP6_BLANKING_A ) -> & 'a mut W { unsafe { self . bits ( variant . into ( ) ) } } # [ doc = "No blanking" ]
# [ inline ( always ) ]
pub fn no_blanking ( self ) -> & 'a mut W { self . variant ( COMP6_BLANKING_A :: NOBLANKING ) } # [ doc = "TIM2 OC4 selected as blanking source" ]
# [ inline ( always ) ]
pub fn tim2oc4 ( self ) -> & 'a mut W { self . variant ( COMP6_BLANKING_A :: TIM2OC4 ) } # [ doc = "TIM15 OC2 selected as blanking source" ]
# [ inline ( always ) ]
pub fn tim15oc2 ( self ) -> & 'a mut W { self . variant ( COMP6_BLANKING_A :: TIM15OC2 ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "Comparator 6 output\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP6OUT_A { # [ doc = "0: Non-inverting input below inverting input" ]
LOW = 0 , # [ doc = "1: Non-inverting input above inverting input" ]
HIGH = 1 } impl From < COMP6OUT_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP6OUT_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP6OUT`" ]
pub type COMP6OUT_R = crate :: R < bool , COMP6OUT_A > ; impl COMP6OUT_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP6OUT_A { match self . bits { false => COMP6OUT_A :: LOW , true => COMP6OUT_A :: HIGH } } # [ doc = "Checks if the value of the field is `LOW`" ]
# [ inline ( always ) ]
pub fn is_low ( & self ) -> bool { * self == COMP6OUT_A :: LOW } # [ doc = "Checks if the value of the field is `HIGH`" ]
# [ inline ( always ) ]
pub fn is_high ( & self ) -> bool { * self == COMP6OUT_A :: HIGH } } # [ doc = "Comparator 6 lock\n\nValue on reset: 0" ]
# [ derive ( Clone , Copy , Debug , PartialEq ) ]
pub enum COMP6LOCK_A { # [ doc = "0: Comparator CSR bits are read-write" ]
UNLOCKED = 0 , # [ doc = "1: Comparator CSR bits are read-only" ]
LOCKED = 1 } impl From < COMP6LOCK_A > for bool { # [ inline ( always ) ]
fn from ( variant : COMP6LOCK_A ) -> Self { variant as u8 != 0 } } # [ doc = "Reader of field `COMP6LOCK`" ]
pub type COMP6LOCK_R = crate :: R < bool , COMP6LOCK_A > ; impl COMP6LOCK_R { # [ doc = r"Get enumerated values variant" ]
# [ inline ( always ) ]
pub fn variant ( & self ) -> COMP6LOCK_A { match self . bits { false => COMP6LOCK_A :: UNLOCKED , true => COMP6LOCK_A :: LOCKED } } # [ doc = "Checks if the value of the field is `UNLOCKED`" ]
# [ inline ( always ) ]
pub fn is_unlocked ( & self ) -> bool { * self == COMP6LOCK_A :: UNLOCKED } # [ doc = "Checks if the value of the field is `LOCKED`" ]
# [ inline ( always ) ]
pub fn is_locked ( & self ) -> bool { * self == COMP6LOCK_A :: LOCKED } } # [ doc = "Write proxy for field `COMP6LOCK`" ]
pub struct COMP6LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6LOCK_W < 'a > { # [ doc = r"Writes `variant` to the field" ]
# [ inline ( always ) ]
pub fn variant ( self , variant : COMP6LOCK_A ) -> & 'a mut W { { self . bit ( variant . into ( ) ) } } # [ doc = "Comparator CSR bits are read-write" ]
# [ inline ( always ) ]
pub fn unlocked ( self ) -> & 'a mut W { self . variant ( COMP6LOCK_A :: UNLOCKED ) } # [ doc = "Comparator CSR bits are read-only" ]
# [ inline ( always ) ]
pub fn locked ( self ) -> & 'a mut W { self . variant ( COMP6LOCK_A :: LOCKED ) } # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } # [ doc = "Reader of field `COMP6WINMODE`" ]
pub type COMP6WINMODE_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP6WINMODE`" ]
pub struct COMP6WINMODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6WINMODE_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 9 ) ) | ( ( ( value as u32 ) & 0x01 ) << 9 ) ; self . w } } # [ doc = "Reader of field `COMP6MODE`" ]
pub type COMP6MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP6MODE`" ]
pub struct COMP6MODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COMP6INPSEL`" ]
pub type COMP6INPSEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP6INPSEL`" ]
pub struct COMP6INPSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6INPSEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `COMP6HYST`" ]
pub type COMP6HYST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP6HYST`" ]
pub struct COMP6HYST_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6HYST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `COMP6INMSEL3`" ]
pub type COMP6INMSEL3_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP6INMSEL3`" ]
pub struct COMP6INMSEL3_W < 'a > { w : & 'a mut W , } impl < 'a > COMP6INMSEL3_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 22 ) ) | ( ( ( value as u32 ) & 0x01 ) << 22 ) ; self . w } } impl R { # [ doc = "Bit 0 - Comparator 6 enable" ]
# [ inline ( always ) ]
pub fn comp6en ( & self ) -> COMP6EN_R { COMP6EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bits 4:6 - Comparator 6 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp6inmsel ( & self ) -> COMP6INMSEL_R { COMP6INMSEL_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 10:13 - Comparator 6 output selection" ]
# [ inline ( always ) ]
pub fn comp6outsel ( & self ) -> COMP6OUTSEL_R { COMP6OUTSEL_R :: new ( ( ( self . bits >> 10 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Comparator 6 output polarity" ]
# [ inline ( always ) ]
pub fn comp6pol ( & self ) -> COMP6POL_R { COMP6POL_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 18:20 - Comparator 6 blanking source" ]
# [ inline ( always ) ]
pub fn comp6_blanking ( & self ) -> COMP6_BLANKING_R { COMP6_BLANKING_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bit 30 - Comparator 6 output" ]
# [ inline ( always ) ]
pub fn comp6out ( & self ) -> COMP6OUT_R { COMP6OUT_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Comparator 6 lock" ]
# [ inline ( always ) ]
pub fn comp6lock ( & self ) -> COMP6LOCK_R { COMP6LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } # [ doc = "Bit 9 - Comparator 6 window mode" ]
# [ inline ( always ) ]
pub fn comp6winmode ( & self ) -> COMP6WINMODE_R { COMP6WINMODE_R :: new ( ( ( self . bits >> 9 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - Comparator 6 mode" ]
# [ inline ( always ) ]
pub fn comp6mode ( & self ) -> COMP6MODE_R { COMP6MODE_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bit 7 - Comparator 6 non inverted input" ]
# [ inline ( always ) ]
pub fn comp6inpsel ( & self ) -> COMP6INPSEL_R { COMP6INPSEL_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - Comparator 6 hysteresis" ]
# [ inline ( always ) ]
pub fn comp6hyst ( & self ) -> COMP6HYST_R { COMP6HYST_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bit 22 - Comparator 6 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp6inmsel3 ( & self ) -> COMP6INMSEL3_R { COMP6INMSEL3_R :: new ( ( ( self . bits >> 22 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Comparator 6 enable" ]
# [ inline ( always ) ]
pub fn comp6en ( & mut self ) -> COMP6EN_W { COMP6EN_W { w : self } } # [ doc = "Bits 4:6 - Comparator 6 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp6inmsel ( & mut self ) -> COMP6INMSEL_W { COMP6INMSEL_W { w : self } } # [ doc = "Bits 10:13 - Comparator 6 output selection" ]
# [ inline ( always ) ]
pub fn comp6outsel ( & mut self ) -> COMP6OUTSEL_W { COMP6OUTSEL_W { w : self } } # [ doc = "Bit 15 - Comparator 6 output polarity" ]
# [ inline ( always ) ]
pub fn comp6pol ( & mut self ) -> COMP6POL_W { COMP6POL_W { w : self } } # [ doc = "Bits 18:20 - Comparator 6 blanking source" ]
# [ inline ( always ) ]
pub fn comp6_blanking ( & mut self ) -> COMP6_BLANKING_W { COMP6_BLANKING_W { w : self } } # [ doc = "Bit 31 - Comparator 6 lock" ]
# [ inline ( always ) ]
pub fn comp6lock ( & mut self ) -> COMP6LOCK_W { COMP6LOCK_W { w : self } } # [ doc = "Bit 9 - Comparator 6 window mode" ]
# [ inline ( always ) ]
pub fn comp6winmode ( & mut self ) -> COMP6WINMODE_W { COMP6WINMODE_W { w : self } } # [ doc = "Bits 2:3 - Comparator 6 mode" ]
# [ inline ( always ) ]
pub fn comp6mode ( & mut self ) -> COMP6MODE_W { COMP6MODE_W { w : self } } # [ doc = "Bit 7 - Comparator 6 non inverted input" ]
# [ inline ( always ) ]
pub fn comp6inpsel ( & mut self ) -> COMP6INPSEL_W { COMP6INPSEL_W { w : self } } # [ doc = "Bits 16:17 - Comparator 6 hysteresis" ]
# [ inline ( always ) ]
pub fn comp6hyst ( & mut self ) -> COMP6HYST_W { COMP6HYST_W { w : self } } # [ doc = "Bit 22 - Comparator 6 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp6inmsel3 ( & mut self ) -> COMP6INMSEL3_W { COMP6INMSEL3_W { w : self } } } } # [ doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp3_csr](comp3_csr) module" ]
pub type COMP3_CSR = crate :: Reg < u32 , _COMP3_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _COMP3_CSR ; # [ doc = "`read()` method returns [comp3_csr::R](comp3_csr::R) reader structure" ]
impl crate :: Readable for COMP3_CSR { } # [ doc = "`write(|w| ..)` method takes [comp3_csr::W](comp3_csr::W) writer structure" ]
impl crate :: Writable for COMP3_CSR { } # [ doc = "control and status register" ]
pub mod comp3_csr { # [ doc = "Reader of register COMP3_CSR" ]
pub type R = crate :: R < u32 , super :: COMP3_CSR > ; # [ doc = "Writer for register COMP3_CSR" ]
pub type W = crate :: W < u32 , super :: COMP3_CSR > ; # [ doc = "Register COMP3_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: COMP3_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `COMP3EN`" ]
pub type COMP3EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP3EN`" ]
pub struct COMP3EN_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `COMP3MODE`" ]
pub type COMP3MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP3MODE`" ]
pub struct COMP3MODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COMP3INMSEL`" ]
pub type COMP3INMSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP3INMSEL`" ]
pub struct COMP3INMSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3INMSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `COMP3INPSEL`" ]
pub type COMP3INPSEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP3INPSEL`" ]
pub struct COMP3INPSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3INPSEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `COMP3OUTSEL`" ]
pub type COMP3OUTSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP3OUTSEL`" ]
pub struct COMP3OUTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3OUTSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 10 ) ) | ( ( ( value as u32 ) & 0x0f ) << 10 ) ; self . w } } # [ doc = "Reader of field `COMP3POL`" ]
pub type COMP3POL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP3POL`" ]
pub struct COMP3POL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3POL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `COMP3HYST`" ]
pub type COMP3HYST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP3HYST`" ]
pub struct COMP3HYST_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3HYST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `COMP3_BLANKING`" ]
pub type COMP3_BLANKING_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP3_BLANKING`" ]
pub struct COMP3_BLANKING_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3_BLANKING_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "Reader of field `COMP3OUT`" ]
pub type COMP3OUT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `COMP3LOCK`" ]
pub type COMP3LOCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP3LOCK`" ]
pub struct COMP3LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > COMP3LOCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - Comparator 3 enable" ]
# [ inline ( always ) ]
pub fn comp3en ( & self ) -> COMP3EN_R { COMP3EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - Comparator 3 mode" ]
# [ inline ( always ) ]
pub fn comp3mode ( & self ) -> COMP3MODE_R { COMP3MODE_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:6 - Comparator 3 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp3inmsel ( & self ) -> COMP3INMSEL_R { COMP3INMSEL_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 7 - Comparator 3 non inverted input" ]
# [ inline ( always ) ]
pub fn comp3inpsel ( & self ) -> COMP3INPSEL_R { COMP3INPSEL_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 10:13 - Comparator 3 output selection" ]
# [ inline ( always ) ]
pub fn comp3outsel ( & self ) -> COMP3OUTSEL_R { COMP3OUTSEL_R :: new ( ( ( self . bits >> 10 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Comparator 3 output polarity" ]
# [ inline ( always ) ]
pub fn comp3pol ( & self ) -> COMP3POL_R { COMP3POL_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - Comparator 3 hysteresis" ]
# [ inline ( always ) ]
pub fn comp3hyst ( & self ) -> COMP3HYST_R { COMP3HYST_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:20 - Comparator 3 blanking source" ]
# [ inline ( always ) ]
pub fn comp3_blanking ( & self ) -> COMP3_BLANKING_R { COMP3_BLANKING_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bit 30 - Comparator 3 output" ]
# [ inline ( always ) ]
pub fn comp3out ( & self ) -> COMP3OUT_R { COMP3OUT_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Comparator 3 lock" ]
# [ inline ( always ) ]
pub fn comp3lock ( & self ) -> COMP3LOCK_R { COMP3LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Comparator 3 enable" ]
# [ inline ( always ) ]
pub fn comp3en ( & mut self ) -> COMP3EN_W { COMP3EN_W { w : self } } # [ doc = "Bits 2:3 - Comparator 3 mode" ]
# [ inline ( always ) ]
pub fn comp3mode ( & mut self ) -> COMP3MODE_W { COMP3MODE_W { w : self } } # [ doc = "Bits 4:6 - Comparator 3 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp3inmsel ( & mut self ) -> COMP3INMSEL_W { COMP3INMSEL_W { w : self } } # [ doc = "Bit 7 - Comparator 3 non inverted input" ]
# [ inline ( always ) ]
pub fn comp3inpsel ( & mut self ) -> COMP3INPSEL_W { COMP3INPSEL_W { w : self } } # [ doc = "Bits 10:13 - Comparator 3 output selection" ]
# [ inline ( always ) ]
pub fn comp3outsel ( & mut self ) -> COMP3OUTSEL_W { COMP3OUTSEL_W { w : self } } # [ doc = "Bit 15 - Comparator 3 output polarity" ]
# [ inline ( always ) ]
pub fn comp3pol ( & mut self ) -> COMP3POL_W { COMP3POL_W { w : self } } # [ doc = "Bits 16:17 - Comparator 3 hysteresis" ]
# [ inline ( always ) ]
pub fn comp3hyst ( & mut self ) -> COMP3HYST_W { COMP3HYST_W { w : self } } # [ doc = "Bits 18:20 - Comparator 3 blanking source" ]
# [ inline ( always ) ]
pub fn comp3_blanking ( & mut self ) -> COMP3_BLANKING_W { COMP3_BLANKING_W { w : self } } # [ doc = "Bit 31 - Comparator 3 lock" ]
# [ inline ( always ) ]
pub fn comp3lock ( & mut self ) -> COMP3LOCK_W { COMP3LOCK_W { w : self } } } } # [ doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp5_csr](comp5_csr) module" ]
pub type COMP5_CSR = crate :: Reg < u32 , _COMP5_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _COMP5_CSR ; # [ doc = "`read()` method returns [comp5_csr::R](comp5_csr::R) reader structure" ]
impl crate :: Readable for COMP5_CSR { } # [ doc = "`write(|w| ..)` method takes [comp5_csr::W](comp5_csr::W) writer structure" ]
impl crate :: Writable for COMP5_CSR { } # [ doc = "control and status register" ]
pub mod comp5_csr { # [ doc = "Reader of register COMP5_CSR" ]
pub type R = crate :: R < u32 , super :: COMP5_CSR > ; # [ doc = "Writer for register COMP5_CSR" ]
pub type W = crate :: W < u32 , super :: COMP5_CSR > ; # [ doc = "Register COMP5_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: COMP5_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `COMP5EN`" ]
pub type COMP5EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP5EN`" ]
pub struct COMP5EN_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `COMP5MODE`" ]
pub type COMP5MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP5MODE`" ]
pub struct COMP5MODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COMP5INMSEL`" ]
pub type COMP5INMSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP5INMSEL`" ]
pub struct COMP5INMSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5INMSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `COMP5INPSEL`" ]
pub type COMP5INPSEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP5INPSEL`" ]
pub struct COMP5INPSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5INPSEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `COMP5OUTSEL`" ]
pub type COMP5OUTSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP5OUTSEL`" ]
pub struct COMP5OUTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5OUTSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 10 ) ) | ( ( ( value as u32 ) & 0x0f ) << 10 ) ; self . w } } # [ doc = "Reader of field `COMP5POL`" ]
pub type COMP5POL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP5POL`" ]
pub struct COMP5POL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5POL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `COMP5HYST`" ]
pub type COMP5HYST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP5HYST`" ]
pub struct COMP5HYST_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5HYST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `COMP5_BLANKING`" ]
pub type COMP5_BLANKING_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP5_BLANKING`" ]
pub struct COMP5_BLANKING_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5_BLANKING_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "Reader of field `COMP5OUT`" ]
pub type COMP5OUT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `COMP5LOCK`" ]
pub type COMP5LOCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP5LOCK`" ]
pub struct COMP5LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > COMP5LOCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - Comparator 5 enable" ]
# [ inline ( always ) ]
pub fn comp5en ( & self ) -> COMP5EN_R { COMP5EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - Comparator 5 mode" ]
# [ inline ( always ) ]
pub fn comp5mode ( & self ) -> COMP5MODE_R { COMP5MODE_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:6 - Comparator 5 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp5inmsel ( & self ) -> COMP5INMSEL_R { COMP5INMSEL_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 7 - Comparator 5 non inverted input" ]
# [ inline ( always ) ]
pub fn comp5inpsel ( & self ) -> COMP5INPSEL_R { COMP5INPSEL_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 10:13 - Comparator 5 output selection" ]
# [ inline ( always ) ]
pub fn comp5outsel ( & self ) -> COMP5OUTSEL_R { COMP5OUTSEL_R :: new ( ( ( self . bits >> 10 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Comparator 5 output polarity" ]
# [ inline ( always ) ]
pub fn comp5pol ( & self ) -> COMP5POL_R { COMP5POL_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - Comparator 5 hysteresis" ]
# [ inline ( always ) ]
pub fn comp5hyst ( & self ) -> COMP5HYST_R { COMP5HYST_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:20 - Comparator 5 blanking source" ]
# [ inline ( always ) ]
pub fn comp5_blanking ( & self ) -> COMP5_BLANKING_R { COMP5_BLANKING_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bit 30 - Comparator 5 output" ]
# [ inline ( always ) ]
pub fn comp5out ( & self ) -> COMP5OUT_R { COMP5OUT_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Comparator 5 lock" ]
# [ inline ( always ) ]
pub fn comp5lock ( & self ) -> COMP5LOCK_R { COMP5LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Comparator 5 enable" ]
# [ inline ( always ) ]
pub fn comp5en ( & mut self ) -> COMP5EN_W { COMP5EN_W { w : self } } # [ doc = "Bits 2:3 - Comparator 5 mode" ]
# [ inline ( always ) ]
pub fn comp5mode ( & mut self ) -> COMP5MODE_W { COMP5MODE_W { w : self } } # [ doc = "Bits 4:6 - Comparator 5 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp5inmsel ( & mut self ) -> COMP5INMSEL_W { COMP5INMSEL_W { w : self } } # [ doc = "Bit 7 - Comparator 5 non inverted input" ]
# [ inline ( always ) ]
pub fn comp5inpsel ( & mut self ) -> COMP5INPSEL_W { COMP5INPSEL_W { w : self } } # [ doc = "Bits 10:13 - Comparator 5 output selection" ]
# [ inline ( always ) ]
pub fn comp5outsel ( & mut self ) -> COMP5OUTSEL_W { COMP5OUTSEL_W { w : self } } # [ doc = "Bit 15 - Comparator 5 output polarity" ]
# [ inline ( always ) ]
pub fn comp5pol ( & mut self ) -> COMP5POL_W { COMP5POL_W { w : self } } # [ doc = "Bits 16:17 - Comparator 5 hysteresis" ]
# [ inline ( always ) ]
pub fn comp5hyst ( & mut self ) -> COMP5HYST_W { COMP5HYST_W { w : self } } # [ doc = "Bits 18:20 - Comparator 5 blanking source" ]
# [ inline ( always ) ]
pub fn comp5_blanking ( & mut self ) -> COMP5_BLANKING_W { COMP5_BLANKING_W { w : self } } # [ doc = "Bit 31 - Comparator 5 lock" ]
# [ inline ( always ) ]
pub fn comp5lock ( & mut self ) -> COMP5LOCK_W { COMP5LOCK_W { w : self } } } } # [ doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp7_csr](comp7_csr) module" ]
pub type COMP7_CSR = crate :: Reg < u32 , _COMP7_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _COMP7_CSR ; # [ doc = "`read()` method returns [comp7_csr::R](comp7_csr::R) reader structure" ]
impl crate :: Readable for COMP7_CSR { } # [ doc = "`write(|w| ..)` method takes [comp7_csr::W](comp7_csr::W) writer structure" ]
impl crate :: Writable for COMP7_CSR { } # [ doc = "control and status register" ]
pub mod comp7_csr { # [ doc = "Reader of register COMP7_CSR" ]
pub type R = crate :: R < u32 , super :: COMP7_CSR > ; # [ doc = "Writer for register COMP7_CSR" ]
pub type W = crate :: W < u32 , super :: COMP7_CSR > ; # [ doc = "Register COMP7_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: COMP7_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `COMP7EN`" ]
pub type COMP7EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP7EN`" ]
pub struct COMP7EN_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `COMP7MODE`" ]
pub type COMP7MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP7MODE`" ]
pub struct COMP7MODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COMP7INMSEL`" ]
pub type COMP7INMSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP7INMSEL`" ]
pub struct COMP7INMSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7INMSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `COMP7INPSEL`" ]
pub type COMP7INPSEL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP7INPSEL`" ]
pub struct COMP7INPSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7INPSEL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 7 ) ) | ( ( ( value as u32 ) & 0x01 ) << 7 ) ; self . w } } # [ doc = "Reader of field `COMP7OUTSEL`" ]
pub type COMP7OUTSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP7OUTSEL`" ]
pub struct COMP7OUTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7OUTSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 10 ) ) | ( ( ( value as u32 ) & 0x0f ) << 10 ) ; self . w } } # [ doc = "Reader of field `COMP7POL`" ]
pub type COMP7POL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP7POL`" ]
pub struct COMP7POL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7POL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `COMP7HYST`" ]
pub type COMP7HYST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP7HYST`" ]
pub struct COMP7HYST_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7HYST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `COMP7_BLANKING`" ]
pub type COMP7_BLANKING_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP7_BLANKING`" ]
pub struct COMP7_BLANKING_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7_BLANKING_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "Reader of field `COMP7OUT`" ]
pub type COMP7OUT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `COMP7LOCK`" ]
pub type COMP7LOCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP7LOCK`" ]
pub struct COMP7LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > COMP7LOCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - Comparator 7 enable" ]
# [ inline ( always ) ]
pub fn comp7en ( & self ) -> COMP7EN_R { COMP7EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - Comparator 7 mode" ]
# [ inline ( always ) ]
pub fn comp7mode ( & self ) -> COMP7MODE_R { COMP7MODE_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:6 - Comparator 7 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp7inmsel ( & self ) -> COMP7INMSEL_R { COMP7INMSEL_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bit 7 - Comparator 7 non inverted input" ]
# [ inline ( always ) ]
pub fn comp7inpsel ( & self ) -> COMP7INPSEL_R { COMP7INPSEL_R :: new ( ( ( self . bits >> 7 ) & 0x01 ) != 0 ) } # [ doc = "Bits 10:13 - Comparator 7 output selection" ]
# [ inline ( always ) ]
pub fn comp7outsel ( & self ) -> COMP7OUTSEL_R { COMP7OUTSEL_R :: new ( ( ( self . bits >> 10 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Comparator 7 output polarity" ]
# [ inline ( always ) ]
pub fn comp7pol ( & self ) -> COMP7POL_R { COMP7POL_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - Comparator 7 hysteresis" ]
# [ inline ( always ) ]
pub fn comp7hyst ( & self ) -> COMP7HYST_R { COMP7HYST_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:20 - Comparator 7 blanking source" ]
# [ inline ( always ) ]
pub fn comp7_blanking ( & self ) -> COMP7_BLANKING_R { COMP7_BLANKING_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bit 30 - Comparator 7 output" ]
# [ inline ( always ) ]
pub fn comp7out ( & self ) -> COMP7OUT_R { COMP7OUT_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Comparator 7 lock" ]
# [ inline ( always ) ]
pub fn comp7lock ( & self ) -> COMP7LOCK_R { COMP7LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Comparator 7 enable" ]
# [ inline ( always ) ]
pub fn comp7en ( & mut self ) -> COMP7EN_W { COMP7EN_W { w : self } } # [ doc = "Bits 2:3 - Comparator 7 mode" ]
# [ inline ( always ) ]
pub fn comp7mode ( & mut self ) -> COMP7MODE_W { COMP7MODE_W { w : self } } # [ doc = "Bits 4:6 - Comparator 7 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp7inmsel ( & mut self ) -> COMP7INMSEL_W { COMP7INMSEL_W { w : self } } # [ doc = "Bit 7 - Comparator 7 non inverted input" ]
# [ inline ( always ) ]
pub fn comp7inpsel ( & mut self ) -> COMP7INPSEL_W { COMP7INPSEL_W { w : self } } # [ doc = "Bits 10:13 - Comparator 7 output selection" ]
# [ inline ( always ) ]
pub fn comp7outsel ( & mut self ) -> COMP7OUTSEL_W { COMP7OUTSEL_W { w : self } } # [ doc = "Bit 15 - Comparator 7 output polarity" ]
# [ inline ( always ) ]
pub fn comp7pol ( & mut self ) -> COMP7POL_W { COMP7POL_W { w : self } } # [ doc = "Bits 16:17 - Comparator 7 hysteresis" ]
# [ inline ( always ) ]
pub fn comp7hyst ( & mut self ) -> COMP7HYST_W { COMP7HYST_W { w : self } } # [ doc = "Bits 18:20 - Comparator 7 blanking source" ]
# [ inline ( always ) ]
pub fn comp7_blanking ( & mut self ) -> COMP7_BLANKING_W { COMP7_BLANKING_W { w : self } } # [ doc = "Bit 31 - Comparator 7 lock" ]
# [ inline ( always ) ]
pub fn comp7lock ( & mut self ) -> COMP7LOCK_W { COMP7LOCK_W { w : self } } } } # [ doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp1_csr](comp1_csr) module" ]
pub type COMP1_CSR = crate :: Reg < u32 , _COMP1_CSR > ; # [ allow ( missing_docs ) ]
# [ doc ( hidden ) ]
pub struct _COMP1_CSR ; # [ doc = "`read()` method returns [comp1_csr::R](comp1_csr::R) reader structure" ]
impl crate :: Readable for COMP1_CSR { } # [ doc = "`write(|w| ..)` method takes [comp1_csr::W](comp1_csr::W) writer structure" ]
impl crate :: Writable for COMP1_CSR { } # [ doc = "control and status register" ]
pub mod comp1_csr { # [ doc = "Reader of register COMP1_CSR" ]
pub type R = crate :: R < u32 , super :: COMP1_CSR > ; # [ doc = "Writer for register COMP1_CSR" ]
pub type W = crate :: W < u32 , super :: COMP1_CSR > ; # [ doc = "Register COMP1_CSR `reset()`'s with value 0" ]
impl crate :: ResetValue for super :: COMP1_CSR { type Type = u32 ; # [ inline ( always ) ]
fn reset_value ( ) -> Self :: Type { 0 } } # [ doc = "Reader of field `COMP1EN`" ]
pub type COMP1EN_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP1EN`" ]
pub struct COMP1EN_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1EN_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! 0x01 ) | ( ( value as u32 ) & 0x01 ) ; self . w } } # [ doc = "Reader of field `COMP1_INP_DAC`" ]
pub type COMP1_INP_DAC_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP1_INP_DAC`" ]
pub struct COMP1_INP_DAC_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1_INP_DAC_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 1 ) ) | ( ( ( value as u32 ) & 0x01 ) << 1 ) ; self . w } } # [ doc = "Reader of field `COMP1MODE`" ]
pub type COMP1MODE_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP1MODE`" ]
pub struct COMP1MODE_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1MODE_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 2 ) ) | ( ( ( value as u32 ) & 0x03 ) << 2 ) ; self . w } } # [ doc = "Reader of field `COMP1INMSEL`" ]
pub type COMP1INMSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP1INMSEL`" ]
pub struct COMP1INMSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1INMSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 4 ) ) | ( ( ( value as u32 ) & 0x07 ) << 4 ) ; self . w } } # [ doc = "Reader of field `COMP1OUTSEL`" ]
pub type COMP1OUTSEL_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP1OUTSEL`" ]
pub struct COMP1OUTSEL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1OUTSEL_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x0f << 10 ) ) | ( ( ( value as u32 ) & 0x0f ) << 10 ) ; self . w } } # [ doc = "Reader of field `COMP1POL`" ]
pub type COMP1POL_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP1POL`" ]
pub struct COMP1POL_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1POL_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 15 ) ) | ( ( ( value as u32 ) & 0x01 ) << 15 ) ; self . w } } # [ doc = "Reader of field `COMP1HYST`" ]
pub type COMP1HYST_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP1HYST`" ]
pub struct COMP1HYST_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1HYST_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x03 << 16 ) ) | ( ( ( value as u32 ) & 0x03 ) << 16 ) ; self . w } } # [ doc = "Reader of field `COMP1_BLANKING`" ]
pub type COMP1_BLANKING_R = crate :: R < u8 , u8 > ; # [ doc = "Write proxy for field `COMP1_BLANKING`" ]
pub struct COMP1_BLANKING_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1_BLANKING_W < 'a > { # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub unsafe fn bits ( self , value : u8 ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x07 << 18 ) ) | ( ( ( value as u32 ) & 0x07 ) << 18 ) ; self . w } } # [ doc = "Reader of field `COMP1OUT`" ]
pub type COMP1OUT_R = crate :: R < bool , bool > ; # [ doc = "Reader of field `COMP1LOCK`" ]
pub type COMP1LOCK_R = crate :: R < bool , bool > ; # [ doc = "Write proxy for field `COMP1LOCK`" ]
pub struct COMP1LOCK_W < 'a > { w : & 'a mut W , } impl < 'a > COMP1LOCK_W < 'a > { # [ doc = r"Sets the field bit" ]
# [ inline ( always ) ]
pub fn set_bit ( self ) -> & 'a mut W { self . bit ( true ) } # [ doc = r"Clears the field bit" ]
# [ inline ( always ) ]
pub fn clear_bit ( self ) -> & 'a mut W { self . bit ( false ) } # [ doc = r"Writes raw bits to the field" ]
# [ inline ( always ) ]
pub fn bit ( self , value : bool ) -> & 'a mut W { self . w . bits = ( self . w . bits & ! ( 0x01 << 31 ) ) | ( ( ( value as u32 ) & 0x01 ) << 31 ) ; self . w } } impl R { # [ doc = "Bit 0 - Comparator 1 enable" ]
# [ inline ( always ) ]
pub fn comp1en ( & self ) -> COMP1EN_R { COMP1EN_R :: new ( ( self . bits & 0x01 ) != 0 ) } # [ doc = "Bit 1 - Comparator 1 non inverting input connection to DAC output" ]
# [ inline ( always ) ]
pub fn comp1_inp_dac ( & self ) -> COMP1_INP_DAC_R { COMP1_INP_DAC_R :: new ( ( ( self . bits >> 1 ) & 0x01 ) != 0 ) } # [ doc = "Bits 2:3 - Comparator 1 mode" ]
# [ inline ( always ) ]
pub fn comp1mode ( & self ) -> COMP1MODE_R { COMP1MODE_R :: new ( ( ( self . bits >> 2 ) & 0x03 ) as u8 ) } # [ doc = "Bits 4:6 - Comparator 1 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp1inmsel ( & self ) -> COMP1INMSEL_R { COMP1INMSEL_R :: new ( ( ( self . bits >> 4 ) & 0x07 ) as u8 ) } # [ doc = "Bits 10:13 - Comparator 1 output selection" ]
# [ inline ( always ) ]
pub fn comp1outsel ( & self ) -> COMP1OUTSEL_R { COMP1OUTSEL_R :: new ( ( ( self . bits >> 10 ) & 0x0f ) as u8 ) } # [ doc = "Bit 15 - Comparator 1 output polarity" ]
# [ inline ( always ) ]
pub fn comp1pol ( & self ) -> COMP1POL_R { COMP1POL_R :: new ( ( ( self . bits >> 15 ) & 0x01 ) != 0 ) } # [ doc = "Bits 16:17 - Comparator 1 hysteresis" ]
# [ inline ( always ) ]
pub fn comp1hyst ( & self ) -> COMP1HYST_R { COMP1HYST_R :: new ( ( ( self . bits >> 16 ) & 0x03 ) as u8 ) } # [ doc = "Bits 18:20 - Comparator 1 blanking source" ]
# [ inline ( always ) ]
pub fn comp1_blanking ( & self ) -> COMP1_BLANKING_R { COMP1_BLANKING_R :: new ( ( ( self . bits >> 18 ) & 0x07 ) as u8 ) } # [ doc = "Bit 30 - Comparator 1 output" ]
# [ inline ( always ) ]
pub fn comp1out ( & self ) -> COMP1OUT_R { COMP1OUT_R :: new ( ( ( self . bits >> 30 ) & 0x01 ) != 0 ) } # [ doc = "Bit 31 - Comparator 1 lock" ]
# [ inline ( always ) ]
pub fn comp1lock ( & self ) -> COMP1LOCK_R { COMP1LOCK_R :: new ( ( ( self . bits >> 31 ) & 0x01 ) != 0 ) } } impl W { # [ doc = "Bit 0 - Comparator 1 enable" ]
# [ inline ( always ) ]
pub fn comp1en ( & mut self ) -> COMP1EN_W { COMP1EN_W { w : self } } # [ doc = "Bit 1 - Comparator 1 non inverting input connection to DAC output" ]
# [ inline ( always ) ]
pub fn comp1_inp_dac ( & mut self ) -> COMP1_INP_DAC_W { COMP1_INP_DAC_W { w : self } } # [ doc = "Bits 2:3 - Comparator 1 mode" ]
# [ inline ( always ) ]
pub fn comp1mode ( & mut self ) -> COMP1MODE_W { COMP1MODE_W { w : self } } # [ doc = "Bits 4:6 - Comparator 1 inverting input selection" ]
# [ inline ( always ) ]
pub fn comp1inmsel ( & mut self ) -> COMP1INMSEL_W { COMP1INMSEL_W { w : self } } # [ doc = "Bits 10:13 - Comparator 1 output selection" ]
# [ inline ( always ) ]
pub fn comp1outsel ( & mut self ) -> COMP1OUTSEL_W { COMP1OUTSEL_W { w : self } } # [ doc = "Bit 15 - Comparator 1 output polarity" ]
# [ inline ( always ) ]
pub fn comp1pol ( & mut self ) -> COMP1POL_W { COMP1POL_W { w : self } } # [ doc = "Bits 16:17 - Comparator 1 hysteresis" ]
# [ inline ( always ) ]
pub fn comp1hyst ( & mut self ) -> COMP1HYST_W { COMP1HYST_W { w : self } } # [ doc = "Bits 18:20 - Comparator 1 blanking source" ]
# [ inline ( always ) ]
pub fn comp1_blanking ( & mut self ) -> COMP1_BLANKING_W { COMP1_BLANKING_W { w : self } } # [ doc = "Bit 31 - Comparator 1 lock" ]
# [ inline ( always ) ]
pub fn comp1lock ( & mut self ) -> COMP1LOCK_W { COMP1LOCK_W { w : self } } } } } # [ no_mangle ]
static mut DEVICE_PERIPHERALS : bool = false ; # [ doc = r"All the peripherals" ]
# [ allow ( non_snake_case ) ]
pub struct Peripherals { # [ doc = "GPIOA" ]
pub GPIOA : GPIOA , # [ doc = "GPIOH" ]
pub GPIOH : GPIOH , # [ doc = "GPIOB" ]
pub GPIOB : GPIOB , # [ doc = "GPIOD" ]
pub GPIOD : GPIOD , # [ doc = "GPIOE" ]
pub GPIOE : GPIOE , # [ doc = "GPIOF" ]
pub GPIOF : GPIOF , # [ doc = "GPIOG" ]
pub GPIOG : GPIOG , # [ doc = "TSC" ]
pub TSC : TSC , # [ doc = "CRC" ]
pub CRC : CRC , # [ doc = "FLASH" ]
pub FLASH : FLASH , # [ doc = "RCC" ]
pub RCC : RCC , # [ doc = "DMA1" ]
pub DMA1 : DMA1 , # [ doc = "DMA2" ]
pub DMA2 : DMA2 , # [ doc = "TIM2" ]
pub TIM2 : TIM2 , # [ doc = "TIM5" ]
pub TIM5 : TIM5 , # [ doc = "TIM3" ]
pub TIM3 : TIM3 , # [ doc = "TIM4" ]
pub TIM4 : TIM4 , # [ doc = "TIM19" ]
pub TIM19 : TIM19 , # [ doc = "TIM15" ]
pub TIM15 : TIM15 , # [ doc = "TIM16" ]
pub TIM16 : TIM16 , # [ doc = "TIM17" ]
pub TIM17 : TIM17 , # [ doc = "TIM20" ]
pub TIM20 : TIM20 , # [ doc = "USART1" ]
pub USART1 : USART1 , # [ doc = "USART2" ]
pub USART2 : USART2 , # [ doc = "USART3" ]
pub USART3 : USART3 , # [ doc = "UART4" ]
pub UART4 : UART4 , # [ doc = "UART5" ]
pub UART5 : UART5 , # [ doc = "SPI1" ]
pub SPI1 : SPI1 , # [ doc = "SPI2" ]
pub SPI2 : SPI2 , # [ doc = "SPI3" ]
pub SPI3 : SPI3 , # [ doc = "I2S2EXT" ]
pub I2S2EXT : I2S2EXT , # [ doc = "I2S3EXT" ]
pub I2S3EXT : I2S3EXT , # [ doc = "SPI4" ]
pub SPI4 : SPI4 , # [ doc = "EXTI" ]
pub EXTI : EXTI , # [ doc = "PWR" ]
pub PWR : PWR , # [ doc = "CAN" ]
pub CAN : CAN , # [ doc = "USB" ]
pub USB : USB , # [ doc = "I2C1" ]
pub I2C1 : I2C1 , # [ doc = "I2C2" ]
pub I2C2 : I2C2 , # [ doc = "I2C3" ]
pub I2C3 : I2C3 , # [ doc = "IWDG" ]
pub IWDG : IWDG , # [ doc = "WWDG" ]
pub WWDG : WWDG , # [ doc = "RTC" ]
pub RTC : RTC , # [ doc = "SDADC1" ]
pub SDADC1 : SDADC1 , # [ doc = "SDADC2" ]
pub SDADC2 : SDADC2 , # [ doc = "SDADC3" ]
pub SDADC3 : SDADC3 , # [ doc = "DAC2" ]
pub DAC2 : DAC2 , # [ doc = "TIM6" ]
pub TIM6 : TIM6 , # [ doc = "TIM7" ]
pub TIM7 : TIM7 , # [ doc = "TIM18" ]
pub TIM18 : TIM18 , # [ doc = "TIM13" ]
pub TIM13 : TIM13 , # [ doc = "TIM14" ]
pub TIM14 : TIM14 , # [ doc = "TIM12" ]
pub TIM12 : TIM12 , # [ doc = "DAC1" ]
pub DAC1 : DAC1 , # [ doc = "DBGMCU" ]
pub DBGMCU : DBGMCU , # [ doc = "FMC" ]
pub FMC : FMC , # [ doc = "TIM1" ]
pub TIM1 : TIM1 , # [ doc = "TIM8" ]
pub TIM8 : TIM8 , # [ doc = "SYSCFG" ]
pub SYSCFG : SYSCFG , # [ doc = "FPU" ]
pub FPU : FPU , # [ doc = "STK" ]
pub STK : STK , # [ doc = "NVIC_STIR" ]
pub NVIC_STIR : NVIC_STIR , # [ doc = "FPU_CPACR" ]
pub FPU_CPACR : FPU_CPACR , # [ doc = "SCB_ACTRL" ]
pub SCB_ACTRL : SCB_ACTRL , # [ doc = "ADC1" ]
pub ADC1 : ADC1 , # [ doc = "ADC2" ]
pub ADC2 : ADC2 , # [ doc = "ADC3" ]
pub ADC3 : ADC3 , # [ doc = "ADC4" ]
pub ADC4 : ADC4 , # [ doc = "ADC1_2" ]
pub ADC1_2 : ADC1_2 , # [ doc = "ADC3_4" ]
pub ADC3_4 : ADC3_4 , # [ doc = "GPIOC" ]
pub GPIOC : GPIOC , # [ doc = "OPAMP" ]
pub OPAMP : OPAMP , # [ doc = "COMP" ]
pub COMP : COMP , } impl Peripherals { # [ doc = r"Returns all the peripherals *once*" ]
# [ inline ]
pub fn take ( ) -> Option < Self > { cortex_m :: interrupt :: free ( | _ | { if unsafe { DEVICE_PERIPHERALS } { None } else { Some ( unsafe { Peripherals :: steal ( ) } ) } } ) } # [ doc = r"Unchecked version of `Peripherals::take`" ]
# [ inline ]
pub unsafe fn steal ( ) -> Self { DEVICE_PERIPHERALS = true ; Peripherals { GPIOA : GPIOA { _marker : PhantomData } , GPIOH : GPIOH { _marker : PhantomData } , GPIOB : GPIOB { _marker : PhantomData } , GPIOD : GPIOD { _marker : PhantomData } , GPIOE : GPIOE { _marker : PhantomData } , GPIOF : GPIOF { _marker : PhantomData } , GPIOG : GPIOG { _marker : PhantomData } , TSC : TSC { _marker : PhantomData } , CRC : CRC { _marker : PhantomData } , FLASH : FLASH { _marker : PhantomData } , RCC : RCC { _marker : PhantomData } , DMA1 : DMA1 { _marker : PhantomData } , DMA2 : DMA2 { _marker : PhantomData } , TIM2 : TIM2 { _marker : PhantomData } , TIM5 : TIM5 { _marker : PhantomData } , TIM3 : TIM3 { _marker : PhantomData } , TIM4 : TIM4 { _marker : PhantomData } , TIM19 : TIM19 { _marker : PhantomData } , TIM15 : TIM15 { _marker : PhantomData } , TIM16 : TIM16 { _marker : PhantomData } , TIM17 : TIM17 { _marker : PhantomData } , TIM20 : TIM20 { _marker : PhantomData } , USART1 : USART1 { _marker : PhantomData } , USART2 : USART2 { _marker : PhantomData } , USART3 : USART3 { _marker : PhantomData } , UART4 : UART4 { _marker : PhantomData } , UART5 : UART5 { _marker : PhantomData } , SPI1 : SPI1 { _marker : PhantomData } , SPI2 : SPI2 { _marker : PhantomData } , SPI3 : SPI3 { _marker : PhantomData } , I2S2EXT : I2S2EXT { _marker : PhantomData } , I2S3EXT : I2S3EXT { _marker : PhantomData } , SPI4 : SPI4 { _marker : PhantomData } , EXTI : EXTI { _marker : PhantomData } , PWR : PWR { _marker : PhantomData } , CAN : CAN { _marker : PhantomData } , USB : USB { _marker : PhantomData } , I2C1 : I2C1 { _marker : PhantomData } , I2C2 : I2C2 { _marker : PhantomData } , I2C3 : I2C3 { _marker : PhantomData } , IWDG : IWDG { _marker : PhantomData } , WWDG : WWDG { _marker : PhantomData } , RTC : RTC { _marker : PhantomData } , SDADC1 : SDADC1 { _marker : PhantomData } , SDADC2 : SDADC2 { _marker : PhantomData } , SDADC3 : SDADC3 { _marker : PhantomData } , DAC2 : DAC2 { _marker : PhantomData } , TIM6 : TIM6 { _marker : PhantomData } , TIM7 : TIM7 { _marker : PhantomData } , TIM18 : TIM18 { _marker : PhantomData } , TIM13 : TIM13 { _marker : PhantomData } , TIM14 : TIM14 { _marker : PhantomData } , TIM12 : TIM12 { _marker : PhantomData } , DAC1 : DAC1 { _marker : PhantomData } , DBGMCU : DBGMCU { _marker : PhantomData } , FMC : FMC { _marker : PhantomData } , TIM1 : TIM1 { _marker : PhantomData } , TIM8 : TIM8 { _marker : PhantomData } , SYSCFG : SYSCFG { _marker : PhantomData } , FPU : FPU { _marker : PhantomData } , STK : STK { _marker : PhantomData } , NVIC_STIR : NVIC_STIR { _marker : PhantomData } , FPU_CPACR : FPU_CPACR { _marker : PhantomData } , SCB_ACTRL : SCB_ACTRL { _marker : PhantomData } , ADC1 : ADC1 { _marker : PhantomData } , ADC2 : ADC2 { _marker : PhantomData } , ADC3 : ADC3 { _marker : PhantomData } , ADC4 : ADC4 { _marker : PhantomData } , ADC1_2 : ADC1_2 { _marker : PhantomData } , ADC3_4 : ADC3_4 { _marker : PhantomData } , GPIOC : GPIOC { _marker : PhantomData } , OPAMP : OPAMP { _marker : PhantomData } , COMP : COMP { _marker : PhantomData } , } } }