///Register `AHB1FZR` reader
pub type R = crate::R<AHB1FZRrs>;
///Register `AHB1FZR` writer
pub type W = crate::W<AHB1FZRrs>;
///Field `DBG_GPDMA1_0_STOP` reader - GPDMA1 channel 0 stop in debug
pub type DBG_GPDMA1_0_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_0_STOP` writer - GPDMA1 channel 0 stop in debug
pub type DBG_GPDMA1_0_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_1_STOP` reader - GPDMA1 channel 1 stop in debug
pub type DBG_GPDMA1_1_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_1_STOP` writer - GPDMA1 channel 1 stop in debug
pub type DBG_GPDMA1_1_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_2_STOP` reader - GPDMA1 channel 2 stop in debug
pub type DBG_GPDMA1_2_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_2_STOP` writer - GPDMA1 channel 2 stop in debug
pub type DBG_GPDMA1_2_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_3_STOP` reader - GPDMA1 channel 3 stop in debug
pub type DBG_GPDMA1_3_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_3_STOP` writer - GPDMA1 channel 3 stop in debug
pub type DBG_GPDMA1_3_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_4_STOP` reader - GPDMA1 channel 4 stop in debug
pub type DBG_GPDMA1_4_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_4_STOP` writer - GPDMA1 channel 4 stop in debug
pub type DBG_GPDMA1_4_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_5_STOP` reader - GPDMA1 channel 5 stop in debug
pub type DBG_GPDMA1_5_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_5_STOP` writer - GPDMA1 channel 5 stop in debug
pub type DBG_GPDMA1_5_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_6_STOP` reader - GPDMA1 channel 6 stop in debug
pub type DBG_GPDMA1_6_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_6_STOP` writer - GPDMA1 channel 6 stop in debug
pub type DBG_GPDMA1_6_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_7_STOP` reader - GPDMA1 channel 7 stop in debug
pub type DBG_GPDMA1_7_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_7_STOP` writer - GPDMA1 channel 7 stop in debug
pub type DBG_GPDMA1_7_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_8_STOP` reader - GPDMA1 channel 8 stop in debug
pub type DBG_GPDMA1_8_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_8_STOP` writer - GPDMA1 channel 8 stop in debug
pub type DBG_GPDMA1_8_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_9_STOP` reader - GPDMA1 channel 9 stop in debug
pub type DBG_GPDMA1_9_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_9_STOP` writer - GPDMA1 channel 9 stop in debug
pub type DBG_GPDMA1_9_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_10_STOP` reader - GPDMA1 channel 10 stop in debug
pub type DBG_GPDMA1_10_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_10_STOP` writer - GPDMA1 channel 10 stop in debug
pub type DBG_GPDMA1_10_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_11_STOP` reader - GPDMA1 channel 11 stop in debug
pub type DBG_GPDMA1_11_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_11_STOP` writer - GPDMA1 channel 11 stop in debug
pub type DBG_GPDMA1_11_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_12_STOP` reader - GPDMA1 channel 12 stop in debug
pub type DBG_GPDMA1_12_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_12_STOP` writer - GPDMA1 channel 12 stop in debug
pub type DBG_GPDMA1_12_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_13_STOP` reader - GPDMA1 channel 13 stop in debug
pub type DBG_GPDMA1_13_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_13_STOP` writer - GPDMA1 channel 13 stop in debug
pub type DBG_GPDMA1_13_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_14_STOP` reader - GPDMA1 channel 14 stop in debug
pub type DBG_GPDMA1_14_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_14_STOP` writer - GPDMA1 channel 14 stop in debug
pub type DBG_GPDMA1_14_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA1_15_STOP` reader - GPDMA1 channel 15 stop in debug
pub type DBG_GPDMA1_15_STOP_R = crate::BitReader;
///Field `DBG_GPDMA1_15_STOP` writer - GPDMA1 channel 15 stop in debug
pub type DBG_GPDMA1_15_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_0_STOP` reader - GPDMA2 channel 0 stop in debug
pub type DBG_GPDMA2_0_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_0_STOP` writer - GPDMA2 channel 0 stop in debug
pub type DBG_GPDMA2_0_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_1_STOP` reader - GPDMA2 channel 1 stop in debug
pub type DBG_GPDMA2_1_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_1_STOP` writer - GPDMA2 channel 1 stop in debug
pub type DBG_GPDMA2_1_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_2_STOP` reader - GPDMA2 channel 2 stop in debug
pub type DBG_GPDMA2_2_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_2_STOP` writer - GPDMA2 channel 2 stop in debug
pub type DBG_GPDMA2_2_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_3_STOP` reader - GPDMA2 channel 3 stop in debug
pub type DBG_GPDMA2_3_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_3_STOP` writer - GPDMA2 channel 3 stop in debug
pub type DBG_GPDMA2_3_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_4_STOP` reader - GPDMA2 channel 4 stop in debug
pub type DBG_GPDMA2_4_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_4_STOP` writer - GPDMA2 channel 4 stop in debug
pub type DBG_GPDMA2_4_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_5_STOP` reader - GPDMA2 channel 5 stop in debug
pub type DBG_GPDMA2_5_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_5_STOP` writer - GPDMA2 channel 5 stop in debug
pub type DBG_GPDMA2_5_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_6_STOP` reader - GPDMA2 channel 6 stop in debug
pub type DBG_GPDMA2_6_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_6_STOP` writer - GPDMA2 channel 6 stop in debug
pub type DBG_GPDMA2_6_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_7_STOP` reader - GPDMA2 channel 7 stop in debug
pub type DBG_GPDMA2_7_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_7_STOP` writer - GPDMA2 channel 7 stop in debug
pub type DBG_GPDMA2_7_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_8_STOP` reader - GPDMA2 channel 8 stop in debug
pub type DBG_GPDMA2_8_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_8_STOP` writer - GPDMA2 channel 8 stop in debug
pub type DBG_GPDMA2_8_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_9_STOP` reader - GPDMA2 channel 9 stop in debug
pub type DBG_GPDMA2_9_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_9_STOP` writer - GPDMA2 channel 9 stop in debug
pub type DBG_GPDMA2_9_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_10_STOP` reader - GPDMA2 channel 10 stop in debug
pub type DBG_GPDMA2_10_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_10_STOP` writer - GPDMA2 channel 10 stop in debug
pub type DBG_GPDMA2_10_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_11_STOP` reader - GPDMA2 channel 11 stop in debug
pub type DBG_GPDMA2_11_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_11_STOP` writer - GPDMA2 channel 11 stop in debug
pub type DBG_GPDMA2_11_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_12_STOP` reader - GPDMA2 channel 12 stop in debug
pub type DBG_GPDMA2_12_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_12_STOP` writer - GPDMA2 channel 12 stop in debug
pub type DBG_GPDMA2_12_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_13_STOP` reader - GPDMA2 channel 13 stop in debug
pub type DBG_GPDMA2_13_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_13_STOP` writer - GPDMA2 channel 13 stop in debug
pub type DBG_GPDMA2_13_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_14_STOP` reader - GPDMA2 channel 14 stop in debug
pub type DBG_GPDMA2_14_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_14_STOP` writer - GPDMA2 channel 14 stop in debug
pub type DBG_GPDMA2_14_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBG_GPDMA2_15_STOP` reader - GPDMA2 channel 15 stop in debug
pub type DBG_GPDMA2_15_STOP_R = crate::BitReader;
///Field `DBG_GPDMA2_15_STOP` writer - GPDMA2 channel 15 stop in debug
pub type DBG_GPDMA2_15_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    ///Bit 0 - GPDMA1 channel 0 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_0_stop(&self) -> DBG_GPDMA1_0_STOP_R {
        DBG_GPDMA1_0_STOP_R::new((self.bits & 1) != 0)
    }
    ///Bit 1 - GPDMA1 channel 1 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_1_stop(&self) -> DBG_GPDMA1_1_STOP_R {
        DBG_GPDMA1_1_STOP_R::new(((self.bits >> 1) & 1) != 0)
    }
    ///Bit 2 - GPDMA1 channel 2 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_2_stop(&self) -> DBG_GPDMA1_2_STOP_R {
        DBG_GPDMA1_2_STOP_R::new(((self.bits >> 2) & 1) != 0)
    }
    ///Bit 3 - GPDMA1 channel 3 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_3_stop(&self) -> DBG_GPDMA1_3_STOP_R {
        DBG_GPDMA1_3_STOP_R::new(((self.bits >> 3) & 1) != 0)
    }
    ///Bit 4 - GPDMA1 channel 4 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_4_stop(&self) -> DBG_GPDMA1_4_STOP_R {
        DBG_GPDMA1_4_STOP_R::new(((self.bits >> 4) & 1) != 0)
    }
    ///Bit 5 - GPDMA1 channel 5 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_5_stop(&self) -> DBG_GPDMA1_5_STOP_R {
        DBG_GPDMA1_5_STOP_R::new(((self.bits >> 5) & 1) != 0)
    }
    ///Bit 6 - GPDMA1 channel 6 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_6_stop(&self) -> DBG_GPDMA1_6_STOP_R {
        DBG_GPDMA1_6_STOP_R::new(((self.bits >> 6) & 1) != 0)
    }
    ///Bit 7 - GPDMA1 channel 7 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_7_stop(&self) -> DBG_GPDMA1_7_STOP_R {
        DBG_GPDMA1_7_STOP_R::new(((self.bits >> 7) & 1) != 0)
    }
    ///Bit 8 - GPDMA1 channel 8 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_8_stop(&self) -> DBG_GPDMA1_8_STOP_R {
        DBG_GPDMA1_8_STOP_R::new(((self.bits >> 8) & 1) != 0)
    }
    ///Bit 9 - GPDMA1 channel 9 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_9_stop(&self) -> DBG_GPDMA1_9_STOP_R {
        DBG_GPDMA1_9_STOP_R::new(((self.bits >> 9) & 1) != 0)
    }
    ///Bit 10 - GPDMA1 channel 10 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_10_stop(&self) -> DBG_GPDMA1_10_STOP_R {
        DBG_GPDMA1_10_STOP_R::new(((self.bits >> 10) & 1) != 0)
    }
    ///Bit 11 - GPDMA1 channel 11 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_11_stop(&self) -> DBG_GPDMA1_11_STOP_R {
        DBG_GPDMA1_11_STOP_R::new(((self.bits >> 11) & 1) != 0)
    }
    ///Bit 12 - GPDMA1 channel 12 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_12_stop(&self) -> DBG_GPDMA1_12_STOP_R {
        DBG_GPDMA1_12_STOP_R::new(((self.bits >> 12) & 1) != 0)
    }
    ///Bit 13 - GPDMA1 channel 13 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_13_stop(&self) -> DBG_GPDMA1_13_STOP_R {
        DBG_GPDMA1_13_STOP_R::new(((self.bits >> 13) & 1) != 0)
    }
    ///Bit 14 - GPDMA1 channel 14 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_14_stop(&self) -> DBG_GPDMA1_14_STOP_R {
        DBG_GPDMA1_14_STOP_R::new(((self.bits >> 14) & 1) != 0)
    }
    ///Bit 15 - GPDMA1 channel 15 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_15_stop(&self) -> DBG_GPDMA1_15_STOP_R {
        DBG_GPDMA1_15_STOP_R::new(((self.bits >> 15) & 1) != 0)
    }
    ///Bit 16 - GPDMA2 channel 0 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_0_stop(&self) -> DBG_GPDMA2_0_STOP_R {
        DBG_GPDMA2_0_STOP_R::new(((self.bits >> 16) & 1) != 0)
    }
    ///Bit 17 - GPDMA2 channel 1 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_1_stop(&self) -> DBG_GPDMA2_1_STOP_R {
        DBG_GPDMA2_1_STOP_R::new(((self.bits >> 17) & 1) != 0)
    }
    ///Bit 18 - GPDMA2 channel 2 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_2_stop(&self) -> DBG_GPDMA2_2_STOP_R {
        DBG_GPDMA2_2_STOP_R::new(((self.bits >> 18) & 1) != 0)
    }
    ///Bit 19 - GPDMA2 channel 3 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_3_stop(&self) -> DBG_GPDMA2_3_STOP_R {
        DBG_GPDMA2_3_STOP_R::new(((self.bits >> 19) & 1) != 0)
    }
    ///Bit 20 - GPDMA2 channel 4 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_4_stop(&self) -> DBG_GPDMA2_4_STOP_R {
        DBG_GPDMA2_4_STOP_R::new(((self.bits >> 20) & 1) != 0)
    }
    ///Bit 21 - GPDMA2 channel 5 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_5_stop(&self) -> DBG_GPDMA2_5_STOP_R {
        DBG_GPDMA2_5_STOP_R::new(((self.bits >> 21) & 1) != 0)
    }
    ///Bit 22 - GPDMA2 channel 6 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_6_stop(&self) -> DBG_GPDMA2_6_STOP_R {
        DBG_GPDMA2_6_STOP_R::new(((self.bits >> 22) & 1) != 0)
    }
    ///Bit 23 - GPDMA2 channel 7 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_7_stop(&self) -> DBG_GPDMA2_7_STOP_R {
        DBG_GPDMA2_7_STOP_R::new(((self.bits >> 23) & 1) != 0)
    }
    ///Bit 24 - GPDMA2 channel 8 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_8_stop(&self) -> DBG_GPDMA2_8_STOP_R {
        DBG_GPDMA2_8_STOP_R::new(((self.bits >> 24) & 1) != 0)
    }
    ///Bit 25 - GPDMA2 channel 9 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_9_stop(&self) -> DBG_GPDMA2_9_STOP_R {
        DBG_GPDMA2_9_STOP_R::new(((self.bits >> 25) & 1) != 0)
    }
    ///Bit 26 - GPDMA2 channel 10 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_10_stop(&self) -> DBG_GPDMA2_10_STOP_R {
        DBG_GPDMA2_10_STOP_R::new(((self.bits >> 26) & 1) != 0)
    }
    ///Bit 27 - GPDMA2 channel 11 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_11_stop(&self) -> DBG_GPDMA2_11_STOP_R {
        DBG_GPDMA2_11_STOP_R::new(((self.bits >> 27) & 1) != 0)
    }
    ///Bit 28 - GPDMA2 channel 12 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_12_stop(&self) -> DBG_GPDMA2_12_STOP_R {
        DBG_GPDMA2_12_STOP_R::new(((self.bits >> 28) & 1) != 0)
    }
    ///Bit 29 - GPDMA2 channel 13 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_13_stop(&self) -> DBG_GPDMA2_13_STOP_R {
        DBG_GPDMA2_13_STOP_R::new(((self.bits >> 29) & 1) != 0)
    }
    ///Bit 30 - GPDMA2 channel 14 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_14_stop(&self) -> DBG_GPDMA2_14_STOP_R {
        DBG_GPDMA2_14_STOP_R::new(((self.bits >> 30) & 1) != 0)
    }
    ///Bit 31 - GPDMA2 channel 15 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_15_stop(&self) -> DBG_GPDMA2_15_STOP_R {
        DBG_GPDMA2_15_STOP_R::new(((self.bits >> 31) & 1) != 0)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("AHB1FZR")
            .field("dbg_gpdma1_0_stop", &self.dbg_gpdma1_0_stop())
            .field("dbg_gpdma1_1_stop", &self.dbg_gpdma1_1_stop())
            .field("dbg_gpdma1_2_stop", &self.dbg_gpdma1_2_stop())
            .field("dbg_gpdma1_3_stop", &self.dbg_gpdma1_3_stop())
            .field("dbg_gpdma1_4_stop", &self.dbg_gpdma1_4_stop())
            .field("dbg_gpdma1_5_stop", &self.dbg_gpdma1_5_stop())
            .field("dbg_gpdma1_6_stop", &self.dbg_gpdma1_6_stop())
            .field("dbg_gpdma1_7_stop", &self.dbg_gpdma1_7_stop())
            .field("dbg_gpdma1_8_stop", &self.dbg_gpdma1_8_stop())
            .field("dbg_gpdma1_9_stop", &self.dbg_gpdma1_9_stop())
            .field("dbg_gpdma1_10_stop", &self.dbg_gpdma1_10_stop())
            .field("dbg_gpdma1_11_stop", &self.dbg_gpdma1_11_stop())
            .field("dbg_gpdma1_12_stop", &self.dbg_gpdma1_12_stop())
            .field("dbg_gpdma1_13_stop", &self.dbg_gpdma1_13_stop())
            .field("dbg_gpdma1_14_stop", &self.dbg_gpdma1_14_stop())
            .field("dbg_gpdma1_15_stop", &self.dbg_gpdma1_15_stop())
            .field("dbg_gpdma2_0_stop", &self.dbg_gpdma2_0_stop())
            .field("dbg_gpdma2_1_stop", &self.dbg_gpdma2_1_stop())
            .field("dbg_gpdma2_2_stop", &self.dbg_gpdma2_2_stop())
            .field("dbg_gpdma2_3_stop", &self.dbg_gpdma2_3_stop())
            .field("dbg_gpdma2_4_stop", &self.dbg_gpdma2_4_stop())
            .field("dbg_gpdma2_5_stop", &self.dbg_gpdma2_5_stop())
            .field("dbg_gpdma2_6_stop", &self.dbg_gpdma2_6_stop())
            .field("dbg_gpdma2_7_stop", &self.dbg_gpdma2_7_stop())
            .field("dbg_gpdma2_8_stop", &self.dbg_gpdma2_8_stop())
            .field("dbg_gpdma2_9_stop", &self.dbg_gpdma2_9_stop())
            .field("dbg_gpdma2_10_stop", &self.dbg_gpdma2_10_stop())
            .field("dbg_gpdma2_11_stop", &self.dbg_gpdma2_11_stop())
            .field("dbg_gpdma2_12_stop", &self.dbg_gpdma2_12_stop())
            .field("dbg_gpdma2_13_stop", &self.dbg_gpdma2_13_stop())
            .field("dbg_gpdma2_14_stop", &self.dbg_gpdma2_14_stop())
            .field("dbg_gpdma2_15_stop", &self.dbg_gpdma2_15_stop())
            .finish()
    }
}
impl W {
    ///Bit 0 - GPDMA1 channel 0 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_0_stop(&mut self) -> DBG_GPDMA1_0_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_0_STOP_W::new(self, 0)
    }
    ///Bit 1 - GPDMA1 channel 1 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_1_stop(&mut self) -> DBG_GPDMA1_1_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_1_STOP_W::new(self, 1)
    }
    ///Bit 2 - GPDMA1 channel 2 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_2_stop(&mut self) -> DBG_GPDMA1_2_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_2_STOP_W::new(self, 2)
    }
    ///Bit 3 - GPDMA1 channel 3 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_3_stop(&mut self) -> DBG_GPDMA1_3_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_3_STOP_W::new(self, 3)
    }
    ///Bit 4 - GPDMA1 channel 4 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_4_stop(&mut self) -> DBG_GPDMA1_4_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_4_STOP_W::new(self, 4)
    }
    ///Bit 5 - GPDMA1 channel 5 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_5_stop(&mut self) -> DBG_GPDMA1_5_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_5_STOP_W::new(self, 5)
    }
    ///Bit 6 - GPDMA1 channel 6 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_6_stop(&mut self) -> DBG_GPDMA1_6_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_6_STOP_W::new(self, 6)
    }
    ///Bit 7 - GPDMA1 channel 7 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_7_stop(&mut self) -> DBG_GPDMA1_7_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_7_STOP_W::new(self, 7)
    }
    ///Bit 8 - GPDMA1 channel 8 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_8_stop(&mut self) -> DBG_GPDMA1_8_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_8_STOP_W::new(self, 8)
    }
    ///Bit 9 - GPDMA1 channel 9 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_9_stop(&mut self) -> DBG_GPDMA1_9_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_9_STOP_W::new(self, 9)
    }
    ///Bit 10 - GPDMA1 channel 10 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_10_stop(&mut self) -> DBG_GPDMA1_10_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_10_STOP_W::new(self, 10)
    }
    ///Bit 11 - GPDMA1 channel 11 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_11_stop(&mut self) -> DBG_GPDMA1_11_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_11_STOP_W::new(self, 11)
    }
    ///Bit 12 - GPDMA1 channel 12 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_12_stop(&mut self) -> DBG_GPDMA1_12_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_12_STOP_W::new(self, 12)
    }
    ///Bit 13 - GPDMA1 channel 13 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_13_stop(&mut self) -> DBG_GPDMA1_13_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_13_STOP_W::new(self, 13)
    }
    ///Bit 14 - GPDMA1 channel 14 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_14_stop(&mut self) -> DBG_GPDMA1_14_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_14_STOP_W::new(self, 14)
    }
    ///Bit 15 - GPDMA1 channel 15 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma1_15_stop(&mut self) -> DBG_GPDMA1_15_STOP_W<AHB1FZRrs> {
        DBG_GPDMA1_15_STOP_W::new(self, 15)
    }
    ///Bit 16 - GPDMA2 channel 0 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_0_stop(&mut self) -> DBG_GPDMA2_0_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_0_STOP_W::new(self, 16)
    }
    ///Bit 17 - GPDMA2 channel 1 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_1_stop(&mut self) -> DBG_GPDMA2_1_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_1_STOP_W::new(self, 17)
    }
    ///Bit 18 - GPDMA2 channel 2 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_2_stop(&mut self) -> DBG_GPDMA2_2_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_2_STOP_W::new(self, 18)
    }
    ///Bit 19 - GPDMA2 channel 3 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_3_stop(&mut self) -> DBG_GPDMA2_3_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_3_STOP_W::new(self, 19)
    }
    ///Bit 20 - GPDMA2 channel 4 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_4_stop(&mut self) -> DBG_GPDMA2_4_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_4_STOP_W::new(self, 20)
    }
    ///Bit 21 - GPDMA2 channel 5 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_5_stop(&mut self) -> DBG_GPDMA2_5_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_5_STOP_W::new(self, 21)
    }
    ///Bit 22 - GPDMA2 channel 6 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_6_stop(&mut self) -> DBG_GPDMA2_6_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_6_STOP_W::new(self, 22)
    }
    ///Bit 23 - GPDMA2 channel 7 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_7_stop(&mut self) -> DBG_GPDMA2_7_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_7_STOP_W::new(self, 23)
    }
    ///Bit 24 - GPDMA2 channel 8 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_8_stop(&mut self) -> DBG_GPDMA2_8_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_8_STOP_W::new(self, 24)
    }
    ///Bit 25 - GPDMA2 channel 9 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_9_stop(&mut self) -> DBG_GPDMA2_9_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_9_STOP_W::new(self, 25)
    }
    ///Bit 26 - GPDMA2 channel 10 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_10_stop(&mut self) -> DBG_GPDMA2_10_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_10_STOP_W::new(self, 26)
    }
    ///Bit 27 - GPDMA2 channel 11 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_11_stop(&mut self) -> DBG_GPDMA2_11_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_11_STOP_W::new(self, 27)
    }
    ///Bit 28 - GPDMA2 channel 12 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_12_stop(&mut self) -> DBG_GPDMA2_12_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_12_STOP_W::new(self, 28)
    }
    ///Bit 29 - GPDMA2 channel 13 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_13_stop(&mut self) -> DBG_GPDMA2_13_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_13_STOP_W::new(self, 29)
    }
    ///Bit 30 - GPDMA2 channel 14 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_14_stop(&mut self) -> DBG_GPDMA2_14_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_14_STOP_W::new(self, 30)
    }
    ///Bit 31 - GPDMA2 channel 15 stop in debug
    #[inline(always)]
    pub fn dbg_gpdma2_15_stop(&mut self) -> DBG_GPDMA2_15_STOP_W<AHB1FZRrs> {
        DBG_GPDMA2_15_STOP_W::new(self, 31)
    }
}
/**DBGMCU AHB1 peripheral freeze register

You can [`read`](crate::Reg::read) this register and get [`ahb1fzr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ahb1fzr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct AHB1FZRrs;
impl crate::RegisterSpec for AHB1FZRrs {
    type Ux = u32;
}
///`read()` method returns [`ahb1fzr::R`](R) reader structure
impl crate::Readable for AHB1FZRrs {}
///`write(|w| ..)` method takes [`ahb1fzr::W`](W) writer structure
impl crate::Writable for AHB1FZRrs {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
///`reset()` method sets AHB1FZR to value 0
impl crate::Resettable for AHB1FZRrs {
    const RESET_VALUE: u32 = 0;
}
