#[doc = "Reader of register SDMMC_DTIMER"]
pub type R = crate::R<u32, super::SDMMC_DTIMER>;
#[doc = "Writer for register SDMMC_DTIMER"]
pub type W = crate::W<u32, super::SDMMC_DTIMER>;
#[doc = "Register SDMMC_DTIMER `reset()`'s with value 0"]
impl crate::ResetValue for super::SDMMC_DTIMER {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `DATATIME`"]
pub type DATATIME_R = crate::R<u32, u32>;
#[doc = "Write proxy for field `DATATIME`"]
pub struct DATATIME_W<'a> {
    w: &'a mut W,
}
impl<'a> DATATIME_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u32) -> &'a mut W {
        self.w.bits = (self.w.bits & !0xffff_ffff) | ((value as u32) & 0xffff_ffff);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:31 - Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."]
    #[inline(always)]
    pub fn datatime(&self) -> DATATIME_R {
        DATATIME_R::new((self.bits & 0xffff_ffff) as u32)
    }
}
impl W {
    #[doc = "Bits 0:31 - Data and R1b busy timeout period This bit can only be written when the CPSM and DPSM are not active (CPSMACT = 0 and DPSMACT = 0). Data and R1b busy timeout period expressed in card bus clock periods."]
    #[inline(always)]
    pub fn datatime(&mut self) -> DATATIME_W {
        DATATIME_W { w: self }
    }
}
